diff options
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/ARM/ifcvt2.ll | 9 | ||||
| -rw-r--r-- | test/CodeGen/ARM/ifcvt5.ll | 6 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll | 11 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-branch.ll | 24 | ||||
| -rw-r--r-- | test/CodeGen/X86/tail-opts.ll | 23 |
5 files changed, 47 insertions, 26 deletions
diff --git a/test/CodeGen/ARM/ifcvt2.ll b/test/CodeGen/ARM/ifcvt2.ll index ce57d73..d9cac80 100644 --- a/test/CodeGen/ARM/ifcvt2.ll +++ b/test/CodeGen/ARM/ifcvt2.ll @@ -1,7 +1,8 @@ -; RUN: llc < %s -march=arm -; RUN: llc < %s -march=arm | grep bxlt | count 1 -; RUN: llc < %s -march=arm | grep bxgt | count 1 -; RUN: llc < %s -march=arm | grep bxge | count 1 +; RUN: llc < %s -march=arm > %t +; RUN: grep bxlt %t | count 1 +; RUN: grep bxgt %t | count 1 +; RUN: not grep bxge %t +; RUN: not grep bxle %t define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { %tmp2 = icmp sgt i32 %c, 10 diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll index 8677ce5..bca2ae3 100644 --- a/test/CodeGen/ARM/ifcvt5.ll +++ b/test/CodeGen/ARM/ifcvt5.ll @@ -9,7 +9,7 @@ entry: ret void } -define void @t1(i32 %a, i32 %b) { +define i32 @t1(i32 %a, i32 %b) { ; CHECK: t1: ; CHECK: ldmialt sp!, {r7, pc} entry: @@ -18,8 +18,8 @@ entry: cond_true: ; preds = %entry tail call void @foo( i32 %b ) - ret void + ret i32 0 UnifiedReturnBlock: ; preds = %entry - ret void + ret i32 1 } diff --git a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll index bfb7f6e..e3086a3 100644 --- a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll +++ b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll @@ -1,6 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv7-eabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s - -; A fix for PR5204 will require this check to be changed. +; PR5204 %"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" = type { i8* } %"struct.__gnu_cxx::new_allocator<char>" = type <{ i8 }> @@ -11,11 +10,9 @@ define weak arm_aapcs_vfpcc i32 @_ZNKSs7compareERKSs(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) { ; CHECK: _ZNKSs7compareERKSs: -; CHECK: it ne -; CHECK-NEXT: ldmiane.w -; CHECK-NEXT: itt eq -; CHECK-NEXT: subeq.w -; CHECK-NEXT: ldmiaeq.w +; CHECK: it eq +; CHECK-NEXT: subeq.w r0, r6, r8 +; CHECK-NEXT: ldmia.w sp, {r4, r5, r6, r8, r9, pc} entry: %0 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) ; <i32> [#uses=3] %1 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) ; <i32> [#uses=3] diff --git a/test/CodeGen/Thumb2/thumb2-branch.ll b/test/CodeGen/Thumb2/thumb2-branch.ll index 1298384..1d2af7a 100644 --- a/test/CodeGen/Thumb2/thumb2-branch.ll +++ b/test/CodeGen/Thumb2/thumb2-branch.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s -define void @f1(i32 %a, i32 %b, i32* %v) { +define i32 @f1(i32 %a, i32 %b, i32* %v) { entry: ; CHECK: f1: ; CHECK: bne LBB @@ -9,13 +9,13 @@ entry: cond_true: ; preds = %entry store i32 0, i32* %v - ret void + ret i32 0 return: ; preds = %entry - ret void + ret i32 1 } -define void @f2(i32 %a, i32 %b, i32* %v) { +define i32 @f2(i32 %a, i32 %b, i32* %v) { entry: ; CHECK: f2: ; CHECK: bge LBB @@ -24,13 +24,13 @@ entry: cond_true: ; preds = %entry store i32 0, i32* %v - ret void + ret i32 0 return: ; preds = %entry - ret void + ret i32 1 } -define void @f3(i32 %a, i32 %b, i32* %v) { +define i32 @f3(i32 %a, i32 %b, i32* %v) { entry: ; CHECK: f3: ; CHECK: bhs LBB @@ -39,13 +39,13 @@ entry: cond_true: ; preds = %entry store i32 0, i32* %v - ret void + ret i32 0 return: ; preds = %entry - ret void + ret i32 1 } -define void @f4(i32 %a, i32 %b, i32* %v) { +define i32 @f4(i32 %a, i32 %b, i32* %v) { entry: ; CHECK: f4: ; CHECK: blo LBB @@ -54,8 +54,8 @@ entry: cond_true: ; preds = %entry store i32 0, i32* %v - ret void + ret i32 0 return: ; preds = %entry - ret void + ret i32 1 } diff --git a/test/CodeGen/X86/tail-opts.ll b/test/CodeGen/X86/tail-opts.ll index 4d93bd7..9662ad6 100644 --- a/test/CodeGen/X86/tail-opts.ll +++ b/test/CodeGen/X86/tail-opts.ll @@ -406,3 +406,26 @@ bb12: return: ret void } + +; Tail-merging should merge the two ret instructions since one side +; can fall-through into the ret and the other side has to branch anyway. + +; CHECK: TESTE: +; CHECK: imulq +; CHECK-NEXT: LBB8_2: +; CHECK-NEXT: ret + +define i64 @TESTE(i64 %parami, i64 %paraml) nounwind readnone { +entry: + %cmp = icmp slt i64 %parami, 1 ; <i1> [#uses=1] + %varx.0 = select i1 %cmp, i64 1, i64 %parami ; <i64> [#uses=1] + %cmp410 = icmp slt i64 %paraml, 1 ; <i1> [#uses=1] + br i1 %cmp410, label %for.end, label %bb.nph + +bb.nph: ; preds = %entry + %tmp15 = mul i64 %paraml, %parami ; <i64> [#uses=1] + ret i64 %tmp15 + +for.end: ; preds = %entry + ret i64 %varx.0 +} |