diff options
Diffstat (limited to 'test/CodeGen')
695 files changed, 28550 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll b/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll new file mode 100644 index 0000000..49ebead --- /dev/null +++ b/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 + + %struct.layer_data = type { int, [2048 x ubyte], ubyte*, [16 x ubyte], uint, ubyte*, int, int, [64 x int], [64 x int], [64 x int], [64 x int], int, int, int, int, int, int, int, int, int, int, int, int, [12 x [64 x short]] } +%ld = external global %struct.layer_data* + +void %main() { +entry: + br bool false, label %bb169.i, label %cond_true11 + +bb169.i: + ret void + +cond_true11: + %tmp.i32 = load %struct.layer_data** %ld + %tmp3.i35 = getelementptr %struct.layer_data* %tmp.i32, int 0, uint 1, int 2048 + %tmp.i36 = getelementptr %struct.layer_data* %tmp.i32, int 0, uint 2 + store ubyte* %tmp3.i35, ubyte** %tmp.i36 + store ubyte* %tmp3.i35, ubyte** null + ret void +} diff --git a/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll new file mode 100644 index 0000000..3661c4c --- /dev/null +++ b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll @@ -0,0 +1,103 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 + +@quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1] +@dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1] +@A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1] + +define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) { +entry: + %predicted_block = alloca [4 x [4 x i32]], align 4 ; <[4 x [4 x i32]]*> [#uses=1] + br label %cond_next489 + +cond_next489: ; preds = %cond_false, %bb471 + %j.7.in = load i8* null ; <i8> [#uses=1] + %i.8.in = load i8* null ; <i8> [#uses=1] + %i.8 = zext i8 %i.8.in to i32 ; <i32> [#uses=4] + %j.7 = zext i8 %j.7.in to i32 ; <i32> [#uses=4] + %tmp495 = getelementptr [4 x [4 x i32]]* %predicted_block, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=2] + %tmp496 = load i32* %tmp495 ; <i32> [#uses=2] + %tmp502 = load i32* null ; <i32> [#uses=1] + %tmp542 = getelementptr [6 x [4 x [4 x i32]]]* @quant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1] + %tmp543 = load i32* %tmp542 ; <i32> [#uses=1] + %tmp548 = ashr i32 0, 0 ; <i32> [#uses=3] + %tmp561 = sub i32 0, %tmp496 ; <i32> [#uses=3] + %abscond563 = icmp sgt i32 %tmp561, -1 ; <i1> [#uses=1] + %abs564 = select i1 %abscond563, i32 %tmp561, i32 0 ; <i32> [#uses=1] + %tmp572 = mul i32 %abs564, %tmp543 ; <i32> [#uses=1] + %tmp574 = add i32 %tmp572, 0 ; <i32> [#uses=1] + %tmp576 = ashr i32 %tmp574, 0 ; <i32> [#uses=7] + %tmp579 = icmp eq i32 %tmp548, %tmp576 ; <i1> [#uses=1] + br i1 %tmp579, label %bb712, label %cond_next589 + +cond_next589: ; preds = %cond_next489 + %tmp605 = getelementptr [6 x [4 x [4 x i32]]]* @dequant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1] + %tmp606 = load i32* %tmp605 ; <i32> [#uses=1] + %tmp612 = load i32* null ; <i32> [#uses=1] + %tmp629 = load i32* null ; <i32> [#uses=1] + %tmp629a = sitofp i32 %tmp629 to double ; <double> [#uses=1] + %tmp631 = mul double %tmp629a, 0.000000e+00 ; <double> [#uses=1] + %tmp632 = add double 0.000000e+00, %tmp631 ; <double> [#uses=1] + %tmp642 = call fastcc i32 @sign( i32 %tmp576, i32 %tmp561 ) ; <i32> [#uses=1] + %tmp650 = mul i32 %tmp606, %tmp642 ; <i32> [#uses=1] + %tmp656 = mul i32 %tmp650, %tmp612 ; <i32> [#uses=1] + %tmp658 = shl i32 %tmp656, 0 ; <i32> [#uses=1] + %tmp659 = ashr i32 %tmp658, 6 ; <i32> [#uses=1] + %tmp660 = sub i32 0, %tmp659 ; <i32> [#uses=1] + %tmp666 = sub i32 %tmp660, %tmp496 ; <i32> [#uses=1] + %tmp667 = sitofp i32 %tmp666 to double ; <double> [#uses=2] + call void @levrun_linfo_inter( i32 %tmp576, i32 0, i32* null, i32* null ) + %tmp671 = mul double %tmp667, %tmp667 ; <double> [#uses=1] + %tmp675 = add double %tmp671, 0.000000e+00 ; <double> [#uses=1] + %tmp678 = fcmp oeq double %tmp632, %tmp675 ; <i1> [#uses=1] + br i1 %tmp678, label %cond_true679, label %cond_false693 + +cond_true679: ; preds = %cond_next589 + %abscond681 = icmp sgt i32 %tmp548, -1 ; <i1> [#uses=1] + %abs682 = select i1 %abscond681, i32 %tmp548, i32 0 ; <i32> [#uses=1] + %abscond684 = icmp sgt i32 %tmp576, -1 ; <i1> [#uses=1] + %abs685 = select i1 %abscond684, i32 %tmp576, i32 0 ; <i32> [#uses=1] + %tmp686 = icmp slt i32 %abs682, %abs685 ; <i1> [#uses=1] + br i1 %tmp686, label %cond_next702, label %cond_false689 + +cond_false689: ; preds = %cond_true679 + %tmp739 = icmp eq i32 %tmp576, 0 ; <i1> [#uses=1] + br i1 %tmp579, label %bb737, label %cond_false708 + +cond_false693: ; preds = %cond_next589 + ret i32 0 + +cond_next702: ; preds = %cond_true679 + ret i32 0 + +cond_false708: ; preds = %cond_false689 + ret i32 0 + +bb712: ; preds = %cond_next489 + ret i32 0 + +bb737: ; preds = %cond_false689 + br i1 %tmp739, label %cond_next791, label %cond_true740 + +cond_true740: ; preds = %bb737 + %tmp761 = call fastcc i32 @sign( i32 %tmp576, i32 0 ) ; <i32> [#uses=1] + %tmp780 = load i32* null ; <i32> [#uses=1] + %tmp785 = getelementptr [4 x [4 x i32]]* @A, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1] + %tmp786 = load i32* %tmp785 ; <i32> [#uses=1] + %tmp781 = mul i32 %tmp780, %tmp761 ; <i32> [#uses=1] + %tmp787 = mul i32 %tmp781, %tmp786 ; <i32> [#uses=1] + %tmp789 = shl i32 %tmp787, 0 ; <i32> [#uses=1] + %tmp790 = ashr i32 %tmp789, 6 ; <i32> [#uses=1] + br label %cond_next791 + +cond_next791: ; preds = %cond_true740, %bb737 + %ilev.1 = phi i32 [ %tmp790, %cond_true740 ], [ 0, %bb737 ] ; <i32> [#uses=1] + %tmp796 = load i32* %tmp495 ; <i32> [#uses=1] + %tmp798 = add i32 %tmp796, %ilev.1 ; <i32> [#uses=1] + %tmp812 = mul i32 0, %tmp502 ; <i32> [#uses=0] + %tmp818 = call fastcc i32 @sign( i32 0, i32 %tmp798 ) ; <i32> [#uses=0] + unreachable +} + +declare i32 @sign(i32, i32) + +declare void @levrun_linfo_inter(i32, i32, i32*, i32*) diff --git a/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll b/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll new file mode 100644 index 0000000..19c156d --- /dev/null +++ b/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin + +%struct.rtx_def = type { i8 } +@str = external global [7 x i8] + +define void @f1() { + %D = alloca %struct.rtx_def, align 1 + %tmp1 = bitcast %struct.rtx_def* %D to i32* + %tmp7 = load i32* %tmp1 + %tmp14 = lshr i32 %tmp7, 1 + %tmp1415 = and i32 %tmp14, 1 + call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 ) + ret void +} + +declare void @printf(i32, ...) diff --git a/test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll b/test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll new file mode 100644 index 0000000..ee52cf0 --- /dev/null +++ b/test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin + + %struct.color_sample = type { i32 } + %struct.ref = type { %struct.color_sample, i16, i16 } + +define void @zcvrs() { + br i1 false, label %bb22, label %UnifiedReturnBlock + +bb22: + br i1 false, label %bb64, label %UnifiedReturnBlock + +bb64: + %tmp67 = urem i32 0, 0 + %tmp69 = icmp slt i32 %tmp67, 10 + %iftmp.13.0 = select i1 %tmp69, i8 48, i8 55 + %tmp75 = add i8 %iftmp.13.0, 0 + store i8 %tmp75, i8* null + %tmp81 = udiv i32 0, 0 + %tmp83 = icmp eq i32 %tmp81, 0 + br i1 %tmp83, label %bb85, label %bb64 + +bb85: + ret void + +UnifiedReturnBlock: + ret void +} diff --git a/test/CodeGen/ARM/2007-03-06-AddR7.ll b/test/CodeGen/ARM/2007-03-06-AddR7.ll new file mode 100644 index 0000000..5e136dd --- /dev/null +++ b/test/CodeGen/ARM/2007-03-06-AddR7.ll @@ -0,0 +1,117 @@ +; RUN: llvm-as < %s | llc -march=thumb +; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin -relocation-model=pic \ +; RUN: -mattr=+v6,+vfp2 | not grep {add r., r7, #2 \\* 4} + + %struct.__fooAllocator = type opaque + %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** } + %struct.__fooZ = type opaque + %struct.__fooU = type opaque + %struct.__fooString = type opaque + %struct.__fooV = type opaque + %struct.fooXBase = type { i32, [4 x i8] } + %struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* } + %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] } + %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* } + %struct.aa_ivar = type { i8*, i8*, i32 } + %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] } + %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* } + %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] } + %struct.aa_object = type { %struct.aa_class* } + %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] } + %struct.aa_ss = type opaque +@__kfooYTypeID = external global i32 ; <i32*> [#uses=3] +@__fooYClass = external constant %struct.fooXClass ; <%struct.fooXClass*> [#uses=1] +@__fooXClassTableSize = external global i32 ; <i32*> [#uses=1] +@__fooXAaClassTable = external global i32* ; <i32**> [#uses=1] +@s.10319 = external global %struct.aa_ss* ; <%struct.aa_ss**> [#uses=2] +@str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1] + + +define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zext { +entry: + %args = alloca i8*, align 4 ; <i8**> [#uses=5] + %args4 = bitcast i8** %args to i8* ; <i8*> [#uses=2] + call void @llvm.va_start( i8* %args4 ) + %tmp6 = load i32* @__kfooYTypeID ; <i32> [#uses=1] + icmp eq i32 %tmp6, 0 ; <i1>:0 [#uses=1] + br i1 %0, label %cond_true, label %cond_next + +cond_true: ; preds = %entry + %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass ) ; <i32> [#uses=1] + store i32 %tmp7, i32* @__kfooYTypeID + br label %cond_next + +cond_next: ; preds = %cond_true, %entry + %tmp8 = load i32* @__kfooYTypeID ; <i32> [#uses=2] + %tmp15 = load i32* @__fooXClassTableSize ; <i32> [#uses=1] + icmp ugt i32 %tmp15, %tmp8 ; <i1>:1 [#uses=1] + br i1 %1, label %cond_next18, label %cond_true58 + +cond_next18: ; preds = %cond_next + %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0 ; <i32*> [#uses=1] + %tmp22 = load i32* %tmp21 ; <i32> [#uses=2] + %tmp29 = load i32** @__fooXAaClassTable ; <i32*> [#uses=1] + %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ; <i32*> [#uses=1] + %tmp32 = load i32* %tmp31 ; <i32> [#uses=1] + icmp eq i32 %tmp22, %tmp32 ; <i1>:2 [#uses=1] + %.not = xor i1 %2, true ; <i1> [#uses=1] + icmp ugt i32 %tmp22, 4095 ; <i1>:3 [#uses=1] + %bothcond = and i1 %.not, %3 ; <i1> [#uses=1] + br i1 %bothcond, label %cond_true58, label %bb48 + +bb48: ; preds = %cond_next18 + %tmp78 = call i32 @strlen( i8* %componentDesc ) ; <i32> [#uses=4] + %tmp92 = alloca i32, i32 %tmp78 ; <i32*> [#uses=2] + icmp sgt i32 %tmp78, 0 ; <i1>:4 [#uses=1] + br i1 %4, label %cond_true111, label %bb114 + +cond_true58: ; preds = %cond_next18, %cond_next + %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*> [#uses=2] + icmp eq %struct.aa_ss* %tmp59, null ; <i1>:5 [#uses=1] + %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ; <i8*> [#uses=2] + br i1 %5, label %cond_true60, label %cond_next64 + +cond_true60: ; preds = %cond_true58 + %tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) ) ; <%struct.aa_ss*> [#uses=2] + store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319 + %tmp66137 = volatile load i8** %args ; <i8*> [#uses=1] + %tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137 ) zext ; <i8> [#uses=1] + ret i8 %tmp73138 + +cond_next64: ; preds = %cond_true58 + %tmp66 = volatile load i8** %args ; <i8*> [#uses=1] + %tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zext ; <i8> [#uses=1] + ret i8 %tmp73 + +cond_true111: ; preds = %cond_true111, %bb48 + %idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ] ; <i32> [#uses=2] + %tmp95 = volatile load i8** %args ; <i8*> [#uses=2] + %tmp97 = getelementptr i8* %tmp95, i32 4 ; <i8*> [#uses=1] + volatile store i8* %tmp97, i8** %args + %tmp9899 = bitcast i8* %tmp95 to i32* ; <i32*> [#uses=1] + %tmp100 = load i32* %tmp9899 ; <i32> [#uses=1] + %tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0 ; <i32*> [#uses=1] + store i32 %tmp100, i32* %tmp104 + %indvar.next = add i32 %idx.2132.0, 1 ; <i32> [#uses=2] + icmp eq i32 %indvar.next, %tmp78 ; <i1>:6 [#uses=1] + br i1 %6, label %bb114, label %cond_true111 + +bb114: ; preds = %cond_true111, %bb48 + call void @llvm.va_end( i8* %args4 ) + %tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zext ; <i8> [#uses=1] + ret i8 %tmp122 +} + +declare i32 @_fooXRegisterClass(%struct.fooXClass*) + +declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zext + +declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...) + +declare %struct.aa_ss* @sel_registerName(i8*) + +declare void @llvm.va_start(i8*) + +declare i32 @strlen(i8*) + +declare void @llvm.va_end(i8*) diff --git a/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll b/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll new file mode 100644 index 0000000..7317e62 --- /dev/null +++ b/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 + +define fastcc i8* @read_sleb128(i8* %p, i32* %val) { + br label %bb + +bb: ; preds = %bb, %0 + %p_addr.0 = getelementptr i8* %p, i32 0 ; <i8*> [#uses=1] + %tmp2 = load i8* %p_addr.0 ; <i8> [#uses=2] + %tmp4.rec = add i32 0, 1 ; <i32> [#uses=1] + %tmp4 = getelementptr i8* %p, i32 %tmp4.rec ; <i8*> [#uses=1] + %tmp56 = zext i8 %tmp2 to i32 ; <i32> [#uses=1] + %tmp7 = and i32 %tmp56, 127 ; <i32> [#uses=1] + %tmp9 = shl i32 %tmp7, 0 ; <i32> [#uses=1] + %tmp11 = or i32 %tmp9, 0 ; <i32> [#uses=1] + icmp slt i8 %tmp2, 0 ; <i1>:1 [#uses=1] + br i1 %1, label %bb, label %cond_next28 + +cond_next28: ; preds = %bb + store i32 %tmp11, i32* %val + ret i8* %tmp4 +} diff --git a/test/CodeGen/ARM/2007-03-13-InstrSched.ll b/test/CodeGen/ARM/2007-03-13-InstrSched.ll new file mode 100644 index 0000000..8fdff52 --- /dev/null +++ b/test/CodeGen/ARM/2007-03-13-InstrSched.ll @@ -0,0 +1,48 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic \ +; RUN: -mattr=+v6 -stats |& grep asm-printer | grep 41 + +define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) { +newFuncRoot: + br label %bb74 + +bb78.exitStub: ; preds = %bb74 + store i32 %d2.1, i32* %d2.1.out + store i32 %d3.1, i32* %d3.1.out + store i32 %d0.1, i32* %d0.1.out + store i32 %d1.1, i32* %d1.1.out + ret void + +bb74: ; preds = %bb26, %newFuncRoot + %fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ] ; <i32> [#uses=3] + %fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ] ; <i32*> [#uses=1] + %d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2] + %d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2] + %d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2] + %d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2] + %fm.1 = load i32* %fm.1.in ; <i32> [#uses=4] + icmp eq i32 %fp.1.rec, %tmp8 ; <i1>:0 [#uses=1] + br i1 %0, label %bb78.exitStub, label %bb26 + +bb26: ; preds = %bb74 + %tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec ; <i32**> [#uses=1] + %tmp30 = load i32** %tmp28 ; <i32*> [#uses=4] + %tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph ; <i32*> [#uses=1] + %tmp34 = load i32* %tmp33 ; <i32> [#uses=1] + %tmp38 = getelementptr i32* %tmp30, i32 %tmp36224 ; <i32*> [#uses=1] + %tmp39 = load i32* %tmp38 ; <i32> [#uses=1] + %tmp42 = mul i32 %tmp34, %fm.1 ; <i32> [#uses=1] + %tmp44 = add i32 %tmp42, %d0.1 ; <i32> [#uses=1] + %tmp48 = getelementptr i32* %tmp30, i32 %tmp46223 ; <i32*> [#uses=1] + %tmp49 = load i32* %tmp48 ; <i32> [#uses=1] + %tmp52 = mul i32 %tmp39, %fm.1 ; <i32> [#uses=1] + %tmp54 = add i32 %tmp52, %d1.1 ; <i32> [#uses=1] + %tmp58 = getelementptr i32* %tmp30, i32 %tmp56222 ; <i32*> [#uses=1] + %tmp59 = load i32* %tmp58 ; <i32> [#uses=1] + %tmp62 = mul i32 %tmp49, %fm.1 ; <i32> [#uses=1] + %tmp64 = add i32 %tmp62, %d2.1 ; <i32> [#uses=1] + %tmp67 = mul i32 %tmp59, %fm.1 ; <i32> [#uses=1] + %tmp69 = add i32 %tmp67, %d3.1 ; <i32> [#uses=1] + %tmp71.rec = add i32 %fp.1.rec, 1 ; <i32> [#uses=2] + %tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec ; <i32*> [#uses=1] + br label %bb74 +} diff --git a/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll b/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll new file mode 100644 index 0000000..32daf83 --- /dev/null +++ b/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll @@ -0,0 +1,96 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi +; PR1257 + + %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 } + %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 } + %struct.c_arg_info = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i8 } + %struct.c_language_function = type { %struct.stmt_tree_s } + %struct.c_switch = type opaque + %struct.eh_status = type opaque + %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** } + %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } + %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 } + %struct.ht_identifier = type { i8*, i32, i32 } + %struct.initial_value_struct = type opaque + %struct.lang_decl = type { i8 } + %struct.language_function = type { %struct.c_language_function, %struct.tree_node*, %struct.tree_node*, %struct.c_switch*, %struct.c_arg_info*, i32, i32, i32, i32 } + %struct.location_t = type { i8*, i32 } + %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] } + %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] } + %struct.rtx_def = type { i16, i8, i8, %struct.u } + %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } + %struct.stmt_tree_s = type { %struct.tree_node*, i32 } + %struct.temp_slot = type opaque + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } + %struct.tree_decl_u1 = type { i64 } + %struct.tree_decl_u2 = type { %struct.function* } + %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier } + %struct.tree_node = type { %struct.tree_decl } + %struct.u = type { [1 x i64] } + %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } + %struct.varasm_status = type opaque + %struct.varray_head_tag = type opaque + %union.tree_ann_d = type opaque + + +define void @declspecs_add_type(i32 %spec.1) { +entry: + %spec.1961 = zext i32 %spec.1 to i64 ; <i64> [#uses=1] + %spec.1961.adj = shl i64 %spec.1961, 32 ; <i64> [#uses=1] + %spec.1961.adj.ins = or i64 %spec.1961.adj, 0 ; <i64> [#uses=2] + %tmp10959 = lshr i64 %spec.1961.adj.ins, 32 ; <i64> [#uses=2] + %tmp1920 = inttoptr i64 %tmp10959 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1] + %tmp21 = getelementptr %struct.tree_common* %tmp1920, i32 0, i32 3 ; <i8*> [#uses=1] + %tmp2122 = bitcast i8* %tmp21 to i32* ; <i32*> [#uses=1] + br i1 false, label %cond_next53, label %cond_true + +cond_true: ; preds = %entry + ret void + +cond_next53: ; preds = %entry + br i1 false, label %cond_true63, label %cond_next689 + +cond_true63: ; preds = %cond_next53 + ret void + +cond_next689: ; preds = %cond_next53 + br i1 false, label %cond_false841, label %bb743 + +bb743: ; preds = %cond_next689 + ret void + +cond_false841: ; preds = %cond_next689 + br i1 false, label %cond_true851, label %cond_true918 + +cond_true851: ; preds = %cond_false841 + tail call void @lookup_name( ) + br i1 false, label %bb866, label %cond_next856 + +cond_next856: ; preds = %cond_true851 + ret void + +bb866: ; preds = %cond_true851 + %tmp874 = load i32* %tmp2122 ; <i32> [#uses=1] + %tmp876877 = trunc i32 %tmp874 to i8 ; <i8> [#uses=1] + icmp eq i8 %tmp876877, 1 ; <i1>:0 [#uses=1] + br i1 %0, label %cond_next881, label %cond_true878 + +cond_true878: ; preds = %bb866 + unreachable + +cond_next881: ; preds = %bb866 + %tmp884885 = inttoptr i64 %tmp10959 to %struct.tree_identifier* ; <%struct.tree_identifier*> [#uses=1] + %tmp887 = getelementptr %struct.tree_identifier* %tmp884885, i32 0, i32 1, i32 0 ; <i8**> [#uses=1] + %tmp888 = load i8** %tmp887 ; <i8*> [#uses=1] + tail call void (i32, ...)* @error( i32 undef, i8* %tmp888 ) + ret void + +cond_true918: ; preds = %cond_false841 + %tmp920957 = trunc i64 %spec.1961.adj.ins to i32 ; <i32> [#uses=0] + ret void +} + +declare void @error(i32, ...) + +declare void @lookup_name() diff --git a/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll new file mode 100644 index 0000000..5a62401 --- /dev/null +++ b/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll @@ -0,0 +1,947 @@ +; RUN: llvm-as < %s | llc -march=arm +; PR1266 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "arm-linux-gnueabi" + %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 } + %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] } + %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] } + %struct.VEC_tree = type { i32, i32, [1 x %struct.tree_node*] } + %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 } + %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } + %struct.addr_diff_vec_flags = type { i8, i8, i8, i8 } + %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 } + %struct.attribute_spec = type { i8*, i32, i32, i8, i8, i8, %struct.tree_node* (%struct.tree_node**, %struct.tree_node*, %struct.tree_node*, i32, i8*)* } + %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 } + %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* } + %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] } + %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* } + %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } + %struct.cgraph_edge = type { %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.tree_node*, i8*, i8* } + %struct.cgraph_global_info = type { %struct.cgraph_node*, i32, i8 } + %struct.cgraph_local_info = type { i32, i8, i8, i8, i8, i8, i8, i8 } + %struct.cgraph_node = type { %struct.tree_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, i8*, %struct.cgraph_local_info, %struct.cgraph_global_info, %struct.cgraph_rtl_info, i32, i8, i8, i8, i8, i8 } + %struct.cgraph_rtl_info = type { i32, i8, i8 } + %struct.cl_perfunc_opts = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32 } + %struct.cselib_val_struct = type opaque + %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] } + %struct.def_operand_ptr = type { %struct.tree_node** } + %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] } + %struct.diagnostic_context = type { %struct.pretty_printer*, [8 x i32], i8, i8, i8, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (i8*, i8**)*, %struct.tree_node*, i32, i32 } + %struct.diagnostic_info = type { %struct.text_info, %struct.location_t, i32 } + %struct.die_struct = type opaque + %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 } + %struct.edge_def_insns = type { %struct.rtx_def* } + %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 } + %struct.eh_status = type opaque + %struct.elt_list = type opaque + %struct.elt_t = type { %struct.tree_node*, %struct.tree_node* } + %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** } + %struct.et_node = type opaque + %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } + %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 } + %struct.ggc_root_tab = type { i8*, i32, i32, void (i8*)*, void (i8*)* } + %struct.gimplify_ctx = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.varray_head_tag*, %struct.htab*, i32, i8, i8 } + %struct.gimplify_init_ctor_preeval_data = type { %struct.tree_node*, i32 } + %struct.ht_identifier = type { i8*, i32, i32 } + %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 } + %struct.initial_value_struct = type opaque + %struct.lang_decl = type opaque + %struct.lang_hooks = type { i8*, i32, i32 (i32)*, i32 (i32, i8**)*, void (%struct.diagnostic_context*)*, i32 (i32, i8*, i32)*, i8 (i8*, i32) zext *, i8 (i8**) zext *, i8 () zext *, void ()*, void ()*, void (i32)*, void ()*, i64 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.rtx_def* (%struct.tree_node*, %struct.rtx_def*, i32, i32, %struct.rtx_def**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i32 (%struct.rtx_def*, %struct.tree_node*)*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zext *, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*)*, void (%struct.tree_node*)*, i8 () zext *, i8, i8, void ()*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, i8* (%struct.tree_node*, i32)*, i32 (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.diagnostic_context*, i8*)*, %struct.tree_node* (%struct.tree_node*)*, i64 (i64)*, %struct.attribute_spec*, %struct.attribute_spec*, %struct.attribute_spec*, i32 (%struct.tree_node*)*, %struct.lang_hooks_for_functions, %struct.lang_hooks_for_tree_inlining, %struct.lang_hooks_for_callgraph, %struct.lang_hooks_for_tree_dump, %struct.lang_hooks_for_decls, %struct.lang_hooks_for_types, i32 (%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*, i32, i32, i8*, %struct.tree_node*)* } + %struct.lang_hooks_for_callgraph = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node*)*, void (%struct.tree_node*)* } + %struct.lang_hooks_for_decls = type { i32 ()*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* ()*, i8 (%struct.tree_node*) zext *, void ()*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zext *, i8* (%struct.tree_node*)* } + %struct.lang_hooks_for_functions = type { void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, i8 (%struct.tree_node*) zext * } + %struct.lang_hooks_for_tree_dump = type { i8 (i8*, %struct.tree_node*) zext *, i32 (%struct.tree_node*)* } + %struct.lang_hooks_for_tree_inlining = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*)*, i32 (%struct.tree_node**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*)*, i32 (%struct.tree_node*, %struct.tree_node*)*, i32 (%struct.tree_node*)*, i8 (%struct.tree_node*, %struct.tree_node*) zext *, i32 (%struct.tree_node*)*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32)* } + %struct.lang_hooks_for_types = type { %struct.tree_node* (i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (i32, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*, i8*)*, void (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i8 } + %struct.lang_type = type opaque + %struct.language_function = type opaque + %struct.location_t = type { i8*, i32 } + %struct.loop = type opaque + %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] } + %struct.mem_attrs = type { i64, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32 } + %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 } + %struct.output_buffer = type { %struct.obstack, %struct.FILE*, i32, [128 x i8] } + %struct.phi_arg_d = type { %struct.tree_node*, i8 } + %struct.pointer_set_t = type opaque + %struct.pretty_printer = type { %struct.output_buffer*, i8*, i32, i32, i32, i32, i32, i8 (%struct.pretty_printer*, %struct.text_info*) zext *, i8, i8 } + %struct.ptr_info_def = type { i8, %struct.bitmap_head_def*, %struct.tree_node* } + %struct.real_value = type { i8, [3 x i8], [5 x i32] } + %struct.reg_attrs = type { %struct.tree_node*, i64 } + %struct.reg_info_def = type opaque + %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 } + %struct.rtunion = type { i32 } + %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] } + %struct.rtx_def = type { i16, i8, i8, %struct.u } + %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } + %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 } + %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* } + %struct.temp_slot = type opaque + %struct.text_info = type { i8*, i8**, i32 } + %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* } + %struct.tree_ann_d = type { %struct.stmt_ann_d } + %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree } + %struct.tree_block = type { %struct.tree_common, i8, [3 x i8], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 } + %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } + %struct.tree_decl_u1 = type { i64 } + %struct.tree_decl_u1_a = type { i32 } + %struct.tree_decl_u2 = type { %struct.function* } + %struct.tree_exp = type { %struct.tree_common, %struct.location_t*, i32, %struct.tree_node*, [1 x %struct.tree_node*] } + %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier } + %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi } + %struct.tree_int_cst_lowhi = type { i64, i64 } + %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } + %struct.tree_node = type { %struct.tree_decl } + %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, i32, i32, i32, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] } + %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* } + %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, i32, %struct.ptr_info_def*, %struct.tree_node*, i8* } + %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* } + %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* } + %struct.tree_stmt_iterator = type { %struct.tree_statement_list_node*, %struct.tree_node* } + %struct.tree_string = type { %struct.tree_common, i32, [1 x i8] } + %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* } + %struct.tree_type_symtab = type { i32 } + %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, i32 } + %struct.tree_vec = type { %struct.tree_common, i32, [1 x %struct.tree_node*] } + %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* } + %struct.u = type { [1 x i64] } + %struct.use_operand_ptr = type { %struct.tree_node** } + %struct.use_optype_d = type { i32, [1 x %struct.def_operand_ptr] } + %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* } + %struct.v_may_def_optype_d = type { i32, [1 x %struct.elt_t] } + %struct.v_must_def_optype_d = type { i32, [1 x %struct.elt_t] } + %struct.value_set = type opaque + %struct.var_ann_d = type { %struct.tree_ann_common_d, i8, i8, %struct.tree_node*, %struct.varray_head_tag*, i32, i32, i32, %struct.tree_node*, %struct.tree_node* } + %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } + %struct.varasm_status = type opaque + %struct.varray_data = type { [1 x i64] } + %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u } + %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] } +@gt_pch_rs_gt_gimplify_h = external global [2 x %struct.ggc_root_tab] ; <[2 x %struct.ggc_root_tab]*> [#uses=0] +@tmp_var_id_num = external global i32 ; <i32*> [#uses=0] +@gt_ggc_r_gt_gimplify_h = external global [1 x %struct.ggc_root_tab] ; <[1 x %struct.ggc_root_tab]*> [#uses=0] +@__FUNCTION__.19956 = external global [15 x i8] ; <[15 x i8]*> [#uses=0] +@str = external global [42 x i8] ; <[42 x i8]*> [#uses=1] +@__FUNCTION__.19974 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] +@gimplify_ctxp = external global %struct.gimplify_ctx* ; <%struct.gimplify_ctx**> [#uses=0] +@cl_pf_opts = external global %struct.cl_perfunc_opts ; <%struct.cl_perfunc_opts*> [#uses=0] +@__FUNCTION__.20030 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] +@__FUNCTION__.20099 = external global [24 x i8] ; <[24 x i8]*> [#uses=0] +@global_trees = external global [47 x %struct.tree_node*] ; <[47 x %struct.tree_node*]*> [#uses=0] +@tree_code_type = external global [0 x i32] ; <[0 x i32]*> [#uses=2] +@current_function_decl = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=0] +@str1 = external global [2 x i8] ; <[2 x i8]*> [#uses=0] +@str2 = external global [7 x i8] ; <[7 x i8]*> [#uses=0] +@__FUNCTION__.20151 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@__FUNCTION__.20221 = external global [9 x i8] ; <[9 x i8]*> [#uses=0] +@tree_code_length = external global [0 x i8] ; <[0 x i8]*> [#uses=0] +@__FUNCTION__.20435 = external global [17 x i8] ; <[17 x i8]*> [#uses=0] +@__FUNCTION__.20496 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@cfun = external global %struct.function* ; <%struct.function**> [#uses=0] +@__FUNCTION__.20194 = external global [15 x i8] ; <[15 x i8]*> [#uses=0] +@__FUNCTION__.19987 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.20532 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.20583 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@__FUNCTION__.20606 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] +@__FUNCTION__.20644 = external global [17 x i8] ; <[17 x i8]*> [#uses=0] +@__FUNCTION__.20681 = external global [13 x i8] ; <[13 x i8]*> [#uses=0] +@__FUNCTION__.20700 = external global [13 x i8] ; <[13 x i8]*> [#uses=0] +@__FUNCTION__.21426 = external global [20 x i8] ; <[20 x i8]*> [#uses=0] +@__FUNCTION__.21471 = external global [17 x i8] ; <[17 x i8]*> [#uses=0] +@__FUNCTION__.21962 = external global [27 x i8] ; <[27 x i8]*> [#uses=0] +@__FUNCTION__.22992 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.23735 = external global [15 x i8] ; <[15 x i8]*> [#uses=0] +@lang_hooks = external global %struct.lang_hooks ; <%struct.lang_hooks*> [#uses=0] +@__FUNCTION__.27383 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] +@__FUNCTION__.20776 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.10672 = external global [9 x i8] ; <[9 x i8]*> [#uses=0] +@str3 = external global [47 x i8] ; <[47 x i8]*> [#uses=0] +@str4 = external global [7 x i8] ; <[7 x i8]*> [#uses=0] +@__FUNCTION__.20065 = external global [25 x i8] ; <[25 x i8]*> [#uses=0] +@__FUNCTION__.23256 = external global [16 x i8] ; <[16 x i8]*> [#uses=0] +@__FUNCTION__.23393 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@__FUNCTION__.20043 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.20729 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] +@__FUNCTION__.20563 = external global [24 x i8] ; <[24 x i8]*> [#uses=0] +@__FUNCTION__.10663 = external global [10 x i8] ; <[10 x i8]*> [#uses=0] +@__FUNCTION__.20367 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.20342 = external global [15 x i8] ; <[15 x i8]*> [#uses=0] +@input_location = external global %struct.location_t ; <%struct.location_t*> [#uses=0] +@__FUNCTION__.24510 = external global [27 x i8] ; <[27 x i8]*> [#uses=0] +@__FUNCTION__.25097 = external global [25 x i8] ; <[25 x i8]*> [#uses=0] +@__FUNCTION__.24705 = external global [26 x i8] ; <[26 x i8]*> [#uses=0] +@str5 = external global [2 x i8] ; <[2 x i8]*> [#uses=0] +@__FUNCTION__.25136 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.24450 = external global [31 x i8] ; <[31 x i8]*> [#uses=0] +@implicit_built_in_decls = external global [471 x %struct.tree_node*] ; <[471 x %struct.tree_node*]*> [#uses=0] +@__FUNCTION__.24398 = external global [31 x i8] ; <[31 x i8]*> [#uses=0] +@__FUNCTION__.26156 = external global [14 x i8] ; <[14 x i8]*> [#uses=1] +@unknown_location = external global %struct.location_t ; <%struct.location_t*> [#uses=0] +@__FUNCTION__.23038 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@str6 = external global [43 x i8] ; <[43 x i8]*> [#uses=0] +@__FUNCTION__.25476 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@__FUNCTION__.22136 = external global [20 x i8] ; <[20 x i8]*> [#uses=1] +@__FUNCTION__.21997 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] +@__FUNCTION__.21247 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@built_in_decls = external global [471 x %struct.tree_node*] ; <[471 x %struct.tree_node*]*> [#uses=0] +@__FUNCTION__.21924 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@__FUNCTION__.21861 = external global [25 x i8] ; <[25 x i8]*> [#uses=0] +@global_dc = external global %struct.diagnostic_context* ; <%struct.diagnostic_context**> [#uses=0] +@__FUNCTION__.25246 = external global [32 x i8] ; <[32 x i8]*> [#uses=0] +@str7 = external global [4 x i8] ; <[4 x i8]*> [#uses=0] +@stderr = external global %struct.FILE* ; <%struct.FILE**> [#uses=0] +@str8 = external global [24 x i8] ; <[24 x i8]*> [#uses=0] +@str9 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] +@__FUNCTION__.27653 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.27322 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.27139 = external global [20 x i8] ; <[20 x i8]*> [#uses=0] +@__FUNCTION__.22462 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] +@str10 = external global [6 x i8] ; <[6 x i8]*> [#uses=0] +@__FUNCTION__.25389 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@__FUNCTION__.25650 = external global [18 x i8] ; <[18 x i8]*> [#uses=0] +@str11 = external global [32 x i8] ; <[32 x i8]*> [#uses=0] +@str12 = external global [3 x i8] ; <[3 x i8]*> [#uses=0] +@str13 = external global [44 x i8] ; <[44 x i8]*> [#uses=0] +@__FUNCTION__.27444 = external global [14 x i8] ; <[14 x i8]*> [#uses=0] +@timevar_enable = external global i8 ; <i8*> [#uses=0] +@__FUNCTION__.27533 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] +@flag_instrument_function_entry_exit = external global i32 ; <i32*> [#uses=0] +@__FUNCTION__.25331 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] +@__FUNCTION__.20965 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@str14 = external global [12 x i8] ; <[12 x i8]*> [#uses=0] +@__FUNCTION__.26053 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@__FUNCTION__.26004 = external global [20 x i8] ; <[20 x i8]*> [#uses=0] +@str15 = external global [8 x i8] ; <[8 x i8]*> [#uses=0] +@__FUNCTION__.21584 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] +@str16 = external global [12 x i8] ; <[12 x i8]*> [#uses=0] +@__FUNCTION__.25903 = external global [28 x i8] ; <[28 x i8]*> [#uses=0] +@__FUNCTION__.22930 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] +@__FUNCTION__.23832 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@str17 = external global [6 x i8] ; <[6 x i8]*> [#uses=0] +@__FUNCTION__.24620 = external global [24 x i8] ; <[24 x i8]*> [#uses=0] +@__FUNCTION__.24582 = external global [30 x i8] ; <[30 x i8]*> [#uses=0] +@__FUNCTION__.21382 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] +@__FUNCTION__.21117 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] + + +declare void @push_gimplify_context() + +declare i32 @gimple_tree_hash(i8*) + +declare i32 @iterative_hash_expr(%struct.tree_node*, i32) + +declare i32 @gimple_tree_eq(i8*, i8*) + +declare i32 @operand_equal_p(%struct.tree_node*, %struct.tree_node*, i32) + +declare void @fancy_abort(i8*, i32, i8*) + +declare i8* @xcalloc(i32, i32) + +declare %struct.htab* @htab_create(i32, i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*) + +declare void @free(i8*) + +declare void @gimple_push_bind_expr(%struct.tree_node*) + +declare void @gimple_pop_bind_expr() + +declare %struct.tree_node* @gimple_current_bind_expr() + +declare fastcc void @gimple_push_condition() + +declare %struct.tree_node* @create_artificial_label() + +declare %struct.tree_node* @build_decl_stat(i32, %struct.tree_node*, %struct.tree_node*) + +declare void @tree_class_check_failed(%struct.tree_node*, i32, i8*, i32, i8*) + +declare %struct.tree_node* @create_tmp_var_name(i8*) + +declare i32 @strlen(i8*) + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +declare i32 @sprintf(i8*, i8*, ...) + +declare %struct.tree_node* @get_identifier(i8*) + +declare %struct.tree_node* @create_tmp_var_raw(%struct.tree_node*, i8*) + +declare %struct.tree_node* @build_qualified_type(%struct.tree_node*, i32) + +declare i8* @get_name(%struct.tree_node*) + +declare void @tree_operand_check_failed(i32, i32, i8*, i32, i8*) + +declare void @tree_check_failed(%struct.tree_node*, i8*, i32, i8*, ...) + +declare void @declare_tmp_vars(%struct.tree_node*, %struct.tree_node*) + +declare %struct.tree_node* @nreverse(%struct.tree_node*) + +declare void @gimple_add_tmp_var(%struct.tree_node*) + +declare void @record_vars(%struct.tree_node*) + +declare %struct.tree_node* @create_tmp_var(%struct.tree_node*, i8*) + +declare void @pop_gimplify_context(%struct.tree_node*) + +declare void @htab_delete(%struct.htab*) + +declare fastcc void @annotate_one_with_locus(%struct.tree_node*, i32, i32) + +declare void @annotate_with_locus(%struct.tree_node*, i32, i32) + +declare %struct.tree_node* @mostly_copy_tree_r(%struct.tree_node**, i32*, i8*) + +declare %struct.tree_node* @copy_tree_r(%struct.tree_node**, i32*, i8*) + +declare %struct.tree_node* @mark_decls_volatile_r(%struct.tree_node**, i32*, i8*) + +declare %struct.tree_node* @copy_if_shared_r(%struct.tree_node**, i32*, i8*) + +declare %struct.tree_node* @walk_tree(%struct.tree_node**, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*) + +declare %struct.tree_node* @unmark_visited_r(%struct.tree_node**, i32*, i8*) + +declare fastcc void @unshare_body(%struct.tree_node**, %struct.tree_node*) + +declare %struct.cgraph_node* @cgraph_node(%struct.tree_node*) + +declare fastcc void @unvisit_body(%struct.tree_node**, %struct.tree_node*) + +declare void @unshare_all_trees(%struct.tree_node*) + +declare %struct.tree_node* @unshare_expr(%struct.tree_node*) + +declare %struct.tree_node* @build_and_jump(%struct.tree_node**) + +declare %struct.tree_node* @build1_stat(i32, %struct.tree_node*, %struct.tree_node*) + +declare i32 @compare_case_labels(i8*, i8*) + +declare i32 @tree_int_cst_compare(%struct.tree_node*, %struct.tree_node*) + +declare void @sort_case_labels(%struct.tree_node*) + +declare void @tree_vec_elt_check_failed(i32, i32, i8*, i32, i8*) + +declare void @qsort(i8*, i32, i32, i32 (i8*, i8*)*) + +declare %struct.tree_node* @force_labels_r(%struct.tree_node**, i32*, i8*) + +declare fastcc void @canonicalize_component_ref(%struct.tree_node**) + +declare %struct.tree_node* @get_unwidened(%struct.tree_node*, %struct.tree_node*) + +declare fastcc void @maybe_with_size_expr(%struct.tree_node**) + +declare %struct.tree_node* @substitute_placeholder_in_expr(%struct.tree_node*, %struct.tree_node*) + +declare %struct.tree_node* @build2_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*) + +declare fastcc %struct.tree_node* @gimple_boolify(%struct.tree_node*) + +declare %struct.tree_node* @convert(%struct.tree_node*, %struct.tree_node*) + +declare %struct.tree_node* @gimplify_init_ctor_preeval_1(%struct.tree_node**, i32*, i8*) + +declare i64 @get_alias_set(%struct.tree_node*) + +declare i32 @alias_sets_conflict_p(i64, i64) + +declare fastcc i8 @cpt_same_type(%struct.tree_node*, %struct.tree_node*) zext + +declare %struct.tree_node* @check_pointer_types_r(%struct.tree_node**, i32*, i8*) + +declare %struct.tree_node* @voidify_wrapper_expr(%struct.tree_node*, %struct.tree_node*) + +declare i32 @integer_zerop(%struct.tree_node*) + +declare fastcc void @append_to_statement_list_1(%struct.tree_node*, %struct.tree_node**) + +declare %struct.tree_node* @alloc_stmt_list() + +declare void @tsi_link_after(%struct.tree_stmt_iterator*, %struct.tree_node*, i32) + +declare void @append_to_statement_list_force(%struct.tree_node*, %struct.tree_node**) + +declare void @append_to_statement_list(%struct.tree_node*, %struct.tree_node**) + +declare fastcc %struct.tree_node* @shortcut_cond_r(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**) + +declare %struct.tree_node* @build3_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*) + +declare fastcc %struct.tree_node* @shortcut_cond_expr(%struct.tree_node*) + +declare %struct.tree_node* @expr_last(%struct.tree_node*) + +declare i8 @block_may_fallthru(%struct.tree_node*) zext + +declare fastcc void @gimple_pop_condition(%struct.tree_node**) + +declare %struct.tree_node* @gimple_build_eh_filter(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*) + +declare void @annotate_all_with_locus(%struct.tree_node**, i32, i32) + +declare fastcc %struct.tree_node* @internal_get_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**, i8 zext ) + +define i32 @gimplify_expr(%struct.tree_node** %expr_p, %struct.tree_node** %pre_p, %struct.tree_node** %post_p, i8 (%struct.tree_node*) zext * %gimple_test_f, i32 %fallback) { +entry: + %internal_post = alloca %struct.tree_node*, align 4 ; <%struct.tree_node**> [#uses=2] + %pre_p_addr.0 = select i1 false, %struct.tree_node** null, %struct.tree_node** %pre_p ; <%struct.tree_node**> [#uses=7] + %post_p_addr.0 = select i1 false, %struct.tree_node** %internal_post, %struct.tree_node** %post_p ; <%struct.tree_node**> [#uses=7] + br i1 false, label %bb277, label %bb191 + +bb191: ; preds = %entry + ret i32 0 + +bb277: ; preds = %entry + %tmp283 = call i32 null( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 ) ; <i32> [#uses=1] + switch i32 %tmp283, label %bb7478 [ + i32 0, label %cond_next289 + i32 -1, label %cond_next298 + ] + +cond_next289: ; preds = %bb277 + ret i32 0 + +cond_next298: ; preds = %bb277 + switch i32 0, label %bb7444 [ + i32 24, label %bb7463 + i32 25, label %bb7463 + i32 26, label %bb7463 + i32 27, label %bb7463 + i32 28, label %bb7463 + i32 33, label %bb4503 + i32 39, label %bb397 + i32 40, label %bb5650 + i32 41, label %bb4339 + i32 42, label %bb4350 + i32 43, label %bb4350 + i32 44, label %bb319 + i32 45, label %bb397 + i32 46, label %bb6124 + i32 47, label %bb7463 + i32 49, label %bb5524 + i32 50, label %bb1283 + i32 51, label %bb1289 + i32 52, label %bb1289 + i32 53, label %bb5969 + i32 54, label %bb408 + i32 56, label %bb5079 + i32 57, label %bb428 + i32 59, label %bb5965 + i32 74, label %bb4275 + i32 75, label %bb4275 + i32 76, label %bb4275 + i32 77, label %bb4275 + i32 91, label %bb1296 + i32 92, label %bb1296 + i32 96, label %bb1322 + i32 112, label %bb2548 + i32 113, label %bb2548 + i32 115, label %bb397 + i32 116, label %bb5645 + i32 117, label %bb1504 + i32 121, label %bb397 + i32 122, label %bb397 + i32 123, label %bb313 + i32 124, label %bb313 + i32 125, label %bb313 + i32 126, label %bb313 + i32 127, label %bb2141 + i32 128, label %cond_next5873 + i32 129, label %cond_next5873 + i32 130, label %bb4536 + i32 131, label %bb5300 + i32 132, label %bb5170 + i32 133, label %bb5519 + i32 134, label %bb5091 + i32 135, label %bb5083 + i32 136, label %bb5087 + i32 137, label %bb5382 + i32 139, label %bb7463 + i32 140, label %bb7463 + i32 142, label %bb5974 + i32 143, label %bb6049 + i32 147, label %bb6296 + i32 151, label %cond_next6474 + ] + +bb313: ; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298 + ret i32 0 + +bb319: ; preds = %cond_next298 + ret i32 0 + +bb397: ; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298 + ret i32 0 + +bb408: ; preds = %cond_next298 + %tmp413 = call fastcc i32 @gimplify_cond_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, %struct.tree_node* null, i32 %fallback ) ; <i32> [#uses=0] + ret i32 0 + +bb428: ; preds = %cond_next298 + ret i32 0 + +bb1283: ; preds = %cond_next298 + ret i32 0 + +bb1289: ; preds = %cond_next298, %cond_next298 + ret i32 0 + +bb1296: ; preds = %cond_next298, %cond_next298 + ret i32 0 + +bb1322: ; preds = %cond_next298 + ret i32 0 + +bb1504: ; preds = %cond_next298 + ret i32 0 + +bb2141: ; preds = %cond_next298 + ret i32 0 + +bb2548: ; preds = %cond_next298, %cond_next298 + %tmp2554 = load %struct.tree_node** %expr_p ; <%struct.tree_node*> [#uses=2] + %tmp2562 = and i32 0, 255 ; <i32> [#uses=1] + %tmp2569 = add i8 0, -4 ; <i8> [#uses=1] + icmp ugt i8 %tmp2569, 5 ; <i1>:0 [#uses=2] + %tmp2587 = load i8* null ; <i8> [#uses=1] + icmp eq i8 %tmp2587, 0 ; <i1>:1 [#uses=2] + %tmp2607 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=2] + br i1 false, label %bb2754, label %cond_next2617 + +cond_next2617: ; preds = %bb2548 + ret i32 0 + +bb2754: ; preds = %bb2548 + br i1 %0, label %cond_true2780, label %cond_next2783 + +cond_true2780: ; preds = %bb2754 + call void @tree_class_check_failed( %struct.tree_node* %tmp2554, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) + unreachable + +cond_next2783: ; preds = %bb2754 + %tmp2825 = and i32 0, 255 ; <i32> [#uses=1] + %tmp2829 = load i32* null ; <i32> [#uses=1] + %tmp28292830 = trunc i32 %tmp2829 to i8 ; <i8> [#uses=1] + %tmp2832 = add i8 %tmp28292830, -4 ; <i8> [#uses=1] + icmp ugt i8 %tmp2832, 5 ; <i1>:2 [#uses=1] + icmp eq i8 0, 0 ; <i1>:3 [#uses=1] + %tmp28652866 = bitcast %struct.tree_node* %tmp2607 to %struct.tree_exp* ; <%struct.tree_exp*> [#uses=1] + %tmp2868 = getelementptr %struct.tree_exp* %tmp28652866, i32 0, i32 4, i32 0 ; <%struct.tree_node**> [#uses=1] + %tmp2870 = load %struct.tree_node** %tmp2868 ; <%struct.tree_node*> [#uses=1] + br i1 %1, label %cond_true2915, label %cond_next2927 + +cond_true2915: ; preds = %cond_next2783 + unreachable + +cond_next2927: ; preds = %cond_next2783 + %tmp2938 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=1] + %tmp2944 = load i32* null ; <i32> [#uses=1] + %tmp2946 = and i32 %tmp2944, 255 ; <i32> [#uses=1] + %tmp2949 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp2946 ; <i32*> [#uses=1] + %tmp2950 = load i32* %tmp2949 ; <i32> [#uses=1] + icmp eq i32 %tmp2950, 2 ; <i1>:4 [#uses=1] + br i1 %4, label %cond_next2954, label %cond_true2951 + +cond_true2951: ; preds = %cond_next2927 + call void @tree_class_check_failed( %struct.tree_node* %tmp2938, i32 2, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) + unreachable + +cond_next2954: ; preds = %cond_next2927 + br i1 %0, label %cond_true2991, label %cond_next2994 + +cond_true2991: ; preds = %cond_next2954 + unreachable + +cond_next2994: ; preds = %cond_next2954 + br i1 %1, label %cond_true3009, label %cond_next3021 + +cond_true3009: ; preds = %cond_next2994 + call void @tree_operand_check_failed( i32 0, i32 %tmp2562, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) + unreachable + +cond_next3021: ; preds = %cond_next2994 + br i1 %2, label %cond_true3044, label %cond_next3047 + +cond_true3044: ; preds = %cond_next3021 + call void @tree_class_check_failed( %struct.tree_node* %tmp2607, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) + unreachable + +cond_next3047: ; preds = %cond_next3021 + br i1 %3, label %cond_true3062, label %cond_next3074 + +cond_true3062: ; preds = %cond_next3047 + call void @tree_operand_check_failed( i32 0, i32 %tmp2825, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) + unreachable + +cond_next3074: ; preds = %cond_next3047 + %tmp3084 = getelementptr %struct.tree_node* %tmp2870, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1] + %tmp3085 = load %struct.tree_node** %tmp3084 ; <%struct.tree_node*> [#uses=1] + %tmp31043105 = bitcast %struct.tree_node* %tmp3085 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1] + %tmp3106 = getelementptr %struct.tree_type* %tmp31043105, i32 0, i32 6 ; <i16*> [#uses=1] + %tmp31063107 = bitcast i16* %tmp3106 to i32* ; <i32*> [#uses=1] + %tmp3108 = load i32* %tmp31063107 ; <i32> [#uses=1] + xor i32 %tmp3108, 0 ; <i32>:5 [#uses=1] + %tmp81008368 = and i32 %5, 65024 ; <i32> [#uses=1] + icmp eq i32 %tmp81008368, 0 ; <i1>:6 [#uses=1] + br i1 %6, label %cond_next3113, label %bb3351 + +cond_next3113: ; preds = %cond_next3074 + ret i32 0 + +bb3351: ; preds = %cond_next3074 + %tmp3354 = call i8 @tree_ssa_useless_type_conversion( %struct.tree_node* %tmp2554 ) zext ; <i8> [#uses=1] + icmp eq i8 %tmp3354, 0 ; <i1>:7 [#uses=1] + %tmp3424 = load i32* null ; <i32> [#uses=1] + br i1 %7, label %cond_next3417, label %cond_true3356 + +cond_true3356: ; preds = %bb3351 + ret i32 0 + +cond_next3417: ; preds = %bb3351 + br i1 false, label %cond_true3429, label %cond_next4266 + +cond_true3429: ; preds = %cond_next3417 + %tmp3443 = and i32 %tmp3424, 255 ; <i32> [#uses=0] + ret i32 0 + +cond_next4266: ; preds = %cond_next3417 + %tmp4268 = load %struct.tree_node** %expr_p ; <%struct.tree_node*> [#uses=1] + icmp eq %struct.tree_node* %tmp4268, null ; <i1>:8 [#uses=1] + br i1 %8, label %bb4275, label %bb7463 + +bb4275: ; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298 + %tmp4289 = and i32 0, 255 ; <i32> [#uses=2] + %tmp4292 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp4289 ; <i32*> [#uses=1] + %tmp4293 = load i32* %tmp4292 ; <i32> [#uses=1] + %tmp42934294 = trunc i32 %tmp4293 to i8 ; <i8> [#uses=1] + %tmp4296 = add i8 %tmp42934294, -4 ; <i8> [#uses=1] + icmp ugt i8 %tmp4296, 5 ; <i1>:9 [#uses=1] + br i1 %9, label %cond_true4297, label %cond_next4300 + +cond_true4297: ; preds = %bb4275 + unreachable + +cond_next4300: ; preds = %bb4275 + %tmp4314 = load i8* null ; <i8> [#uses=1] + icmp eq i8 %tmp4314, 0 ; <i1>:10 [#uses=1] + br i1 %10, label %cond_true4315, label %cond_next4327 + +cond_true4315: ; preds = %cond_next4300 + call void @tree_operand_check_failed( i32 0, i32 %tmp4289, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 3997, i8* getelementptr ([14 x i8]* @__FUNCTION__.26156, i32 0, i32 0) ) + unreachable + +cond_next4327: ; preds = %cond_next4300 + %tmp4336 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zext * @is_gimple_val, i32 1 ) ; <i32> [#uses=0] + ret i32 0 + +bb4339: ; preds = %cond_next298 + ret i32 0 + +bb4350: ; preds = %cond_next298, %cond_next298 + ret i32 0 + +bb4503: ; preds = %cond_next298 + ret i32 0 + +bb4536: ; preds = %cond_next298 + ret i32 0 + +bb5079: ; preds = %cond_next298 + ret i32 0 + +bb5083: ; preds = %cond_next298 + ret i32 0 + +bb5087: ; preds = %cond_next298 + ret i32 0 + +bb5091: ; preds = %cond_next298 + ret i32 0 + +bb5170: ; preds = %cond_next298 + ret i32 0 + +bb5300: ; preds = %cond_next298 + ret i32 0 + +bb5382: ; preds = %cond_next298 + ret i32 0 + +bb5519: ; preds = %cond_next298 + ret i32 0 + +bb5524: ; preds = %cond_next298 + ret i32 0 + +bb5645: ; preds = %cond_next298 + ret i32 0 + +bb5650: ; preds = %cond_next298 + ret i32 0 + +cond_next5873: ; preds = %cond_next298, %cond_next298 + ret i32 0 + +bb5965: ; preds = %cond_next298 + %tmp5968 = call fastcc i32 @gimplify_cleanup_point_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0 ) ; <i32> [#uses=0] + ret i32 0 + +bb5969: ; preds = %cond_next298 + %tmp5973 = call fastcc i32 @gimplify_target_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 ) ; <i32> [#uses=0] + ret i32 0 + +bb5974: ; preds = %cond_next298 + ret i32 0 + +bb6049: ; preds = %cond_next298 + ret i32 0 + +bb6124: ; preds = %cond_next298 + ret i32 0 + +bb6296: ; preds = %cond_next298 + ret i32 0 + +cond_next6474: ; preds = %cond_next298 + icmp eq %struct.tree_node** %internal_post, %post_p_addr.0 ; <i1>:11 [#uses=1] + %iftmp.381.0 = select i1 %11, %struct.tree_node** null, %struct.tree_node** %post_p_addr.0 ; <%struct.tree_node**> [#uses=1] + %tmp6490 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %iftmp.381.0, i8 (%struct.tree_node*) zext * %gimple_test_f, i32 %fallback ) ; <i32> [#uses=0] + %tmp6551 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zext * @is_gimple_val, i32 1 ) ; <i32> [#uses=0] + ret i32 0 + +bb7444: ; preds = %cond_next298 + ret i32 0 + +bb7463: ; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298 + ret i32 0 + +bb7478: ; preds = %bb277 + ret i32 0 +} + +declare i8 @is_gimple_formal_tmp_rhs(%struct.tree_node*) zext + +declare void @gimplify_and_add(%struct.tree_node*, %struct.tree_node**) + +declare %struct.tree_node* @get_initialized_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**) + +declare %struct.tree_node* @get_formal_tmp_var(%struct.tree_node*, %struct.tree_node**) + +declare fastcc void @gimplify_init_ctor_preeval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.gimplify_init_ctor_preeval_data*) + +declare i8 @type_contains_placeholder_p(%struct.tree_node*) zext + +declare i8 @is_gimple_mem_rhs(%struct.tree_node*) zext + +declare fastcc i32 @gimplify_modify_expr_rhs(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zext ) + +declare %struct.tree_node* @fold_indirect_ref(%struct.tree_node*) + +declare fastcc i32 @gimplify_compound_expr(%struct.tree_node**, %struct.tree_node**, i8 zext ) + +declare i8 @is_gimple_lvalue(%struct.tree_node*) zext + +declare void @categorize_ctor_elements(%struct.tree_node*, i64*, i64*, i64*, i8*) + +declare void @lhd_set_decl_assembler_name(%struct.tree_node*) + +declare i64 @int_size_in_bytes(%struct.tree_node*) + +declare i32 @can_move_by_pieces(i64, i32) + +declare i64 @count_type_elements(%struct.tree_node*) + +declare void @gimplify_stmt(%struct.tree_node**) + +declare %struct.tree_node* @get_base_address(%struct.tree_node*) + +declare fastcc void @gimplify_init_ctor_eval(%struct.tree_node*, %struct.tree_node*, %struct.tree_node**, i8 zext ) + +declare %struct.tree_node* @build_complex(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*) + +declare i8 (%struct.tree_node*) zext * @rhs_predicate_for(%struct.tree_node*) + +declare %struct.tree_node* @build_vector(%struct.tree_node*, %struct.tree_node*) + +declare i8 @is_gimple_val(%struct.tree_node*) zext + +declare i8 @is_gimple_reg_type(%struct.tree_node*) zext + +declare fastcc i32 @gimplify_cond_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node*, i32) + +declare fastcc i32 @gimplify_modify_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zext ) + +declare %struct.tree_node* @tree_cons_stat(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*) + +declare %struct.tree_node* @build_fold_addr_expr(%struct.tree_node*) + +declare %struct.tree_node* @build_function_call_expr(%struct.tree_node*, %struct.tree_node*) + +declare i8 @is_gimple_addressable(%struct.tree_node*) zext + +declare i8 @is_gimple_reg(%struct.tree_node*) zext + +declare %struct.tree_node* @make_ssa_name(%struct.tree_node*, %struct.tree_node*) + +declare i8 @tree_ssa_useless_type_conversion(%struct.tree_node*) zext + +declare fastcc i32 @gimplify_self_mod_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zext ) + +declare fastcc i32 @gimplify_compound_lval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i32) + +declare %struct.tree_node* @get_callee_fndecl(%struct.tree_node*) + +declare %struct.tree_node* @fold_builtin(%struct.tree_node*, i8 zext ) + +declare void @error(i8*, ...) + +declare %struct.tree_node* @build_empty_stmt() + +declare i8 @fold_builtin_next_arg(%struct.tree_node*) zext + +declare fastcc i32 @gimplify_arg(%struct.tree_node**, %struct.tree_node**) + +declare i8 @is_gimple_call_addr(%struct.tree_node*) zext + +declare i32 @call_expr_flags(%struct.tree_node*) + +declare void @recalculate_side_effects(%struct.tree_node*) + +declare %struct.tree_node* @fold_convert(%struct.tree_node*, %struct.tree_node*) + +declare void @recompute_tree_invarant_for_addr_expr(%struct.tree_node*) + +declare i32 @gimplify_va_arg_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**) + +declare %struct.tree_node* @size_int_kind(i64, i32) + +declare %struct.tree_node* @size_binop(i32, %struct.tree_node*, %struct.tree_node*) + +declare %struct.tree_node* @build4_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*) + +declare void @gimplify_type_sizes(%struct.tree_node*, %struct.tree_node**) + +declare void @gimplify_one_sizepos(%struct.tree_node**, %struct.tree_node**) + +declare %struct.tree_node* @build_pointer_type(%struct.tree_node*) + +declare %struct.tree_node* @build_fold_indirect_ref(%struct.tree_node*) + +declare fastcc i32 @gimplify_bind_expr(%struct.tree_node**, %struct.tree_node*, %struct.tree_node**) + +declare fastcc void @gimplify_loop_expr(%struct.tree_node**, %struct.tree_node**) + +declare fastcc i32 @gimplify_switch_expr(%struct.tree_node**, %struct.tree_node**) + +declare %struct.tree_node* @decl_function_context(%struct.tree_node*) + +declare %struct.varray_head_tag* @varray_grow(%struct.varray_head_tag*, i32) + +declare fastcc void @gimplify_return_expr(%struct.tree_node*, %struct.tree_node**) + +declare fastcc i32 @gimplify_save_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**) + +declare fastcc i32 @gimplify_asm_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**) + +declare void @gimplify_to_stmt_list(%struct.tree_node**) + +declare fastcc i32 @gimplify_cleanup_point_expr(%struct.tree_node**, %struct.tree_node**) + +declare fastcc i32 @gimplify_target_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**) + +declare void @tsi_delink(%struct.tree_stmt_iterator*) + +declare void @tsi_link_before(%struct.tree_stmt_iterator*, %struct.tree_node*, i32) + +declare i8 @is_gimple_stmt(%struct.tree_node*) zext + +declare void @print_generic_expr(%struct.FILE*, %struct.tree_node*, i32) + +declare void @debug_tree(%struct.tree_node*) + +declare void @internal_error(i8*, ...) + +declare %struct.tree_node* @force_gimple_operand(%struct.tree_node*, %struct.tree_node**, i8 zext , %struct.tree_node*) + +declare i8 @is_gimple_reg_rhs(%struct.tree_node*) zext + +declare void @add_referenced_tmp_var(%struct.tree_node*) + +declare i8 @contains_placeholder_p(%struct.tree_node*) zext + +declare %struct.varray_head_tag* @varray_init(i32, i32, i8*) + +declare i32 @handled_component_p(%struct.tree_node*) + +declare void @varray_check_failed(%struct.varray_head_tag*, i32, i8*, i32, i8*) + +declare %struct.tree_node* @array_ref_low_bound(%struct.tree_node*) + +declare i8 @is_gimple_min_invariant(%struct.tree_node*) zext + +declare i8 @is_gimple_formal_tmp_reg(%struct.tree_node*) zext + +declare %struct.tree_node* @array_ref_element_size(%struct.tree_node*) + +declare %struct.tree_node* @component_ref_field_offset(%struct.tree_node*) + +declare i8 @is_gimple_min_lval(%struct.tree_node*) zext + +declare void @varray_underflow(%struct.varray_head_tag*, i8*, i32, i8*) + +declare i32 @list_length(%struct.tree_node*) + +declare i8 @parse_output_constraint(i8**, i32, i32, i32, i8*, i8*, i8*) zext + +declare i8* @xstrdup(i8*) + +declare %struct.tree_node* @build_string(i32, i8*) + +declare i8* @strchr(i8*, i32) + +declare %struct.tree_node* @build_tree_list_stat(%struct.tree_node*, %struct.tree_node*) + +declare %struct.tree_node* @chainon(%struct.tree_node*, %struct.tree_node*) + +declare i8 @parse_input_constraint(i8**, i32, i32, i32, i32, i8**, i8*, i8*) zext + +declare i8 @is_gimple_asm_val(%struct.tree_node*) zext + +declare void @gimplify_body(%struct.tree_node**, %struct.tree_node*, i8 zext ) + +declare void @timevar_push_1(i32) + +declare %struct.tree_node* @gimplify_parameters() + +declare %struct.tree_node* @expr_only(%struct.tree_node*) + +declare void @timevar_pop_1(i32) + +declare void @gimplify_function_tree(%struct.tree_node*) + +declare void @allocate_struct_function(%struct.tree_node*) + +declare %struct.tree_node* @make_tree_vec_stat(i32) + +declare %struct.tree_node* @tsi_split_statement_list_after(%struct.tree_stmt_iterator*) + +declare i8 @is_gimple_condexpr(%struct.tree_node*) zext + +declare %struct.tree_node* @invert_truthvalue(%struct.tree_node*) + +declare i8 @initializer_zerop(%struct.tree_node*) zext + +declare i32 @simple_cst_equal(%struct.tree_node*, %struct.tree_node*) + +declare i32 @aggregate_value_p(%struct.tree_node*, %struct.tree_node*) + +declare i32 @fwrite(i8*, i32, i32, %struct.FILE*) diff --git a/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll new file mode 100644 index 0000000..f927ef4 --- /dev/null +++ b/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll @@ -0,0 +1,35 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi +; PR1279 + + %struct.rtx_def = type { i16, i8, i8, %struct.u } + %struct.u = type { [1 x i64] } + +define fastcc void @find_reloads_address(%struct.rtx_def** %loc) { +entry: + %ad_addr = alloca %struct.rtx_def* ; <%struct.rtx_def**> [#uses=2] + br i1 false, label %cond_next416, label %cond_true340 + +cond_true340: ; preds = %entry + ret void + +cond_next416: ; preds = %entry + %tmp1085 = load %struct.rtx_def** %ad_addr ; <%struct.rtx_def*> [#uses=1] + br i1 false, label %bb1084, label %cond_true418 + +cond_true418: ; preds = %cond_next416 + ret void + +bb1084: ; preds = %cond_next416 + br i1 false, label %cond_true1092, label %cond_next1102 + +cond_true1092: ; preds = %bb1084 + %tmp1094 = getelementptr %struct.rtx_def* %tmp1085, i32 0, i32 3 ; <%struct.u*> [#uses=1] + %tmp10981099 = bitcast %struct.u* %tmp1094 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=2] + %tmp1101 = load %struct.rtx_def** %tmp10981099 ; <%struct.rtx_def*> [#uses=1] + store %struct.rtx_def* %tmp1101, %struct.rtx_def** %ad_addr + br label %cond_next1102 + +cond_next1102: ; preds = %cond_true1092, %bb1084 + %loc_addr.0 = phi %struct.rtx_def** [ %tmp10981099, %cond_true1092 ], [ %loc, %bb1084 ] ; <%struct.rtx_def**> [#uses=0] + ret void +} diff --git a/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll new file mode 100644 index 0000000..55d2993 --- /dev/null +++ b/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll @@ -0,0 +1,101 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi +; PR1279 + + %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 } + %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 } + %struct.eh_status = type opaque + %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** } + %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } + %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 } + %struct.initial_value_struct = type opaque + %struct.lang_decl = type opaque + %struct.language_function = type opaque + %struct.location_t = type { i8*, i32 } + %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] } + %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] } + %struct.rtx_def = type { i16, i8, i8, %struct.u } + %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } + %struct.temp_slot = type opaque + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } + %struct.tree_decl_u1 = type { i64 } + %struct.tree_decl_u2 = type { %struct.function* } + %struct.tree_node = type { %struct.tree_decl } + %struct.u = type { [1 x i64] } + %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } + %struct.varasm_status = type opaque + %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u } + %union.tree_ann_d = type opaque +@str469 = external global [42 x i8] ; <[42 x i8]*> [#uses=0] +@__FUNCTION__.24265 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] + +declare void @fancy_abort() + +define fastcc void @fold_builtin_bitop() { +entry: + br i1 false, label %cond_true105, label %UnifiedReturnBlock + +cond_true105: ; preds = %entry + br i1 false, label %cond_true134, label %UnifiedReturnBlock + +cond_true134: ; preds = %cond_true105 + switch i32 0, label %bb479 [ + i32 378, label %bb313 + i32 380, label %bb313 + i32 381, label %bb313 + i32 383, label %bb366 + i32 385, label %bb366 + i32 386, label %bb366 + i32 403, label %bb250 + i32 405, label %bb250 + i32 406, label %bb250 + i32 434, label %bb464 + i32 436, label %bb464 + i32 437, label %bb464 + i32 438, label %bb441 + i32 440, label %bb441 + i32 441, label %bb441 + ] + +bb250: ; preds = %cond_true134, %cond_true134, %cond_true134 + ret void + +bb313: ; preds = %cond_true134, %cond_true134, %cond_true134 + ret void + +bb366: ; preds = %cond_true134, %cond_true134, %cond_true134 + ret void + +bb441: ; preds = %cond_true134, %cond_true134, %cond_true134 + ret void + +bb457: ; preds = %bb464, %bb457 + %tmp459 = add i64 0, 1 ; <i64> [#uses=1] + br i1 false, label %bb474.preheader, label %bb457 + +bb464: ; preds = %cond_true134, %cond_true134, %cond_true134 + br i1 false, label %bb474.preheader, label %bb457 + +bb474.preheader: ; preds = %bb464, %bb457 + %result.5.ph = phi i64 [ 0, %bb464 ], [ %tmp459, %bb457 ] ; <i64> [#uses=1] + br label %bb474 + +bb467: ; preds = %bb474 + %indvar.next586 = add i64 %indvar585, 1 ; <i64> [#uses=1] + br label %bb474 + +bb474: ; preds = %bb467, %bb474.preheader + %indvar585 = phi i64 [ 0, %bb474.preheader ], [ %indvar.next586, %bb467 ] ; <i64> [#uses=2] + br i1 false, label %bb476, label %bb467 + +bb476: ; preds = %bb474 + %result.5 = add i64 %indvar585, %result.5.ph ; <i64> [#uses=0] + ret void + +bb479: ; preds = %cond_true134 + tail call void @fancy_abort( ) + unreachable + +UnifiedReturnBlock: ; preds = %cond_true105, %entry + ret void +} diff --git a/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll new file mode 100644 index 0000000..ef5a1ae --- /dev/null +++ b/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll @@ -0,0 +1,55 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-apple-darwin + + %struct.H_TBL = type { [17 x i8], [256 x i8], i32 } + %struct.Q_TBL = type { [64 x i16], i32 } + %struct.anon = type { [80 x i8] } + %struct.X_c_coef_ccler = type { void (%struct.X_Y*, i32)*, i32 (%struct.X_Y*, i8***)* } + %struct.X_c_main_ccler = type { void (%struct.X_Y*, i32)*, void (%struct.X_Y*, i8**, i32*, i32)* } + %struct.X_c_prep_ccler = type { void (%struct.X_Y*, i32)*, void (%struct.X_Y*, i8**, i32*, i32, i8***, i32*, i32)* } + %struct.X_color_converter = type { void (%struct.X_Y*)*, void (%struct.X_Y*, i8**, i8***, i32, i32)* } + %struct.X_common_struct = type { %struct.X_error_mgr*, %struct.X_memory_mgr*, %struct.X_progress_mgr*, i8*, i32, i32 } + %struct.X_comp_master = type { void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, i32, i32 } + %struct.X_component_info = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Q_TBL*, i8* } + %struct.X_Y = type { %struct.X_error_mgr*, %struct.X_memory_mgr*, %struct.X_progress_mgr*, i8*, i32, i32, %struct.X_destination_mgr*, i32, i32, i32, i32, double, i32, i32, i32, %struct.X_component_info*, [4 x %struct.Q_TBL*], [4 x %struct.H_TBL*], [4 x %struct.H_TBL*], [16 x i8], [16 x i8], [16 x i8], i32, %struct.X_scan_info*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.X_component_info*], i32, i32, i32, [10 x i32], i32, i32, i32, i32, %struct.X_comp_master*, %struct.X_c_main_ccler*, %struct.X_c_prep_ccler*, %struct.X_c_coef_ccler*, %struct.X_marker_writer*, %struct.X_color_converter*, %struct.X_downssr*, %struct.X_forward_D*, %struct.X_entropy_en*, %struct.X_scan_info*, i32 } + %struct.X_destination_mgr = type { i8*, i32, void (%struct.X_Y*)*, i32 (%struct.X_Y*)*, void (%struct.X_Y*)* } + %struct.X_downssr = type { void (%struct.X_Y*)*, void (%struct.X_Y*, i8***, i32, i8***, i32)*, i32 } + %struct.X_entropy_en = type { void (%struct.X_Y*, i32)*, i32 (%struct.X_Y*, [64 x i16]**)*, void (%struct.X_Y*)* } + %struct.X_error_mgr = type { void (%struct.X_common_struct*)*, void (%struct.X_common_struct*, i32)*, void (%struct.X_common_struct*)*, void (%struct.X_common_struct*, i8*)*, void (%struct.X_common_struct*)*, i32, %struct.anon, i32, i32, i8**, i32, i8**, i32, i32 } + %struct.X_forward_D = type { void (%struct.X_Y*)*, void (%struct.X_Y*, %struct.X_component_info*, i8**, [64 x i16]*, i32, i32, i32)* } + %struct.X_marker_writer = type { void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*, i32, i32)*, void (%struct.X_Y*, i32)* } + %struct.X_memory_mgr = type { i8* (%struct.X_common_struct*, i32, i32)*, i8* (%struct.X_common_struct*, i32, i32)*, i8** (%struct.X_common_struct*, i32, i32, i32)*, [64 x i16]** (%struct.X_common_struct*, i32, i32, i32)*, %struct.jvirt_sAY_cc* (%struct.X_common_struct*, i32, i32, i32, i32, i32)*, %struct.jvirt_bAY_cc* (%struct.X_common_struct*, i32, i32, i32, i32, i32)*, void (%struct.X_common_struct*)*, i8** (%struct.X_common_struct*, %struct.jvirt_sAY_cc*, i32, i32, i32)*, [64 x i16]** (%struct.X_common_struct*, %struct.jvirt_bAY_cc*, i32, i32, i32)*, void (%struct.X_common_struct*, i32)*, void (%struct.X_common_struct*)*, i32, i32 } + %struct.X_progress_mgr = type { void (%struct.X_common_struct*)*, i32, i32, i32, i32 } + %struct.X_scan_info = type { i32, [4 x i32], i32, i32, i32, i32 } + %struct.jvirt_bAY_cc = type opaque + %struct.jvirt_sAY_cc = type opaque + +define void @test(%struct.X_Y* %cinfo) { +entry: + br i1 false, label %bb.preheader, label %return + +bb.preheader: ; preds = %entry + %tbl.014.us = load i32* null ; <i32> [#uses=1] + br i1 false, label %cond_next.us, label %bb + +cond_next51.us: ; preds = %cond_next.us, %cond_true33.us.cond_true46.us_crit_edge + %htblptr.019.1.us = phi %struct.H_TBL** [ %tmp37.us, %cond_true33.us.cond_true46.us_crit_edge ], [ %tmp37.us, %cond_next.us ] ; <%struct.H_TBL**> [#uses=0] + ret void + +cond_true33.us.cond_true46.us_crit_edge: ; preds = %cond_next.us + call void @_C_X_a_HT( ) + br label %cond_next51.us + +cond_next.us: ; preds = %bb.preheader + %tmp37.us = getelementptr %struct.X_Y* %cinfo, i32 0, i32 17, i32 %tbl.014.us ; <%struct.H_TBL**> [#uses=3] + %tmp4524.us = load %struct.H_TBL** %tmp37.us ; <%struct.H_TBL*> [#uses=1] + icmp eq %struct.H_TBL* %tmp4524.us, null ; <i1>:0 [#uses=1] + br i1 %0, label %cond_true33.us.cond_true46.us_crit_edge, label %cond_next51.us + +bb: ; preds = %bb.preheader + ret void + +return: ; preds = %entry + ret void +} + +declare void @_C_X_a_HT() diff --git a/test/CodeGen/ARM/2007-04-03-PEIBug.ll b/test/CodeGen/ARM/2007-04-03-PEIBug.ll new file mode 100644 index 0000000..e412127 --- /dev/null +++ b/test/CodeGen/ARM/2007-04-03-PEIBug.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=arm | not grep {add.*#0} + +define i32 @foo() { +entry: + %A = alloca [1123 x i32], align 16 ; <[1123 x i32]*> [#uses=1] + %B = alloca [3123 x i32], align 16 ; <[3123 x i32]*> [#uses=1] + %C = alloca [12312 x i32], align 16 ; <[12312 x i32]*> [#uses=1] + %tmp = call i32 (...)* @bar( [3123 x i32]* %B, [1123 x i32]* %A, [12312 x i32]* %C ) ; <i32> [#uses=0] + ret i32 undef +} + +declare i32 @bar(...) diff --git a/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll b/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll new file mode 100644 index 0000000..42f5034 --- /dev/null +++ b/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll @@ -0,0 +1,99 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic | \ +; RUN: not grep LPC9 + + %struct.B = type { i32 } + %struct.anon = type { void (%struct.B*)*, i32 } +@str = internal constant [7 x i8] c"i, %d\0A\00" ; <[7 x i8]*> [#uses=1] +@str1 = internal constant [7 x i8] c"j, %d\0A\00" ; <[7 x i8]*> [#uses=1] + +define internal void @_ZN1B1iEv(%struct.B* %this) { +entry: + %tmp1 = getelementptr %struct.B* %this, i32 0, i32 0 ; <i32*> [#uses=1] + %tmp2 = load i32* %tmp1 ; <i32> [#uses=1] + %tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @str, i32 0, i32 0), i32 %tmp2 ) ; <i32> [#uses=0] + ret void +} + +declare i32 @printf(i8*, ...) + +define internal void @_ZN1B1jEv(%struct.B* %this) { +entry: + %tmp1 = getelementptr %struct.B* %this, i32 0, i32 0 ; <i32*> [#uses=1] + %tmp2 = load i32* %tmp1 ; <i32> [#uses=1] + %tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @str1, i32 0, i32 0), i32 %tmp2 ) ; <i32> [#uses=0] + ret void +} + +define i32 @main() { +entry: + %b.i29 = alloca %struct.B, align 4 ; <%struct.B*> [#uses=3] + %b.i1 = alloca %struct.B, align 4 ; <%struct.B*> [#uses=3] + %b.i = alloca %struct.B, align 4 ; <%struct.B*> [#uses=3] + %tmp2.i = getelementptr %struct.B* %b.i, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 4, i32* %tmp2.i + br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit, label %cond_true.i + +cond_true.i: ; preds = %entry + %b2.i = bitcast %struct.B* %b.i to i8* ; <i8*> [#uses=1] + %ctg23.i = getelementptr i8* %b2.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1] + %tmp121314.i = bitcast i8* %ctg23.i to i32 (...)*** ; <i32 (...)***> [#uses=1] + %tmp15.i = load i32 (...)*** %tmp121314.i ; <i32 (...)**> [#uses=1] + %tmp151.i = bitcast i32 (...)** %tmp15.i to i8* ; <i8*> [#uses=1] + %ctg2.i = getelementptr i8* %tmp151.i, i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) ; <i8*> [#uses=1] + %tmp2021.i = bitcast i8* %ctg2.i to i32 (...)** ; <i32 (...)**> [#uses=1] + %tmp22.i = load i32 (...)** %tmp2021.i ; <i32 (...)*> [#uses=1] + %tmp2223.i = bitcast i32 (...)* %tmp22.i to void (%struct.B*)* ; <void (%struct.B*)*> [#uses=1] + br label %_Z3fooiM1BFvvE.exit + +_Z3fooiM1BFvvE.exit: ; preds = %cond_true.i, %entry + %iftmp.2.0.i = phi void (%struct.B*)* [ %tmp2223.i, %cond_true.i ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to void (%struct.B*)*), %entry ] ; <void (%struct.B*)*> [#uses=1] + %b4.i = bitcast %struct.B* %b.i to i8* ; <i8*> [#uses=1] + %ctg25.i = getelementptr i8* %b4.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1] + %tmp3031.i = bitcast i8* %ctg25.i to %struct.B* ; <%struct.B*> [#uses=1] + call void %iftmp.2.0.i( %struct.B* %tmp3031.i ) + %tmp2.i30 = getelementptr %struct.B* %b.i29, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 6, i32* %tmp2.i30 + br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit56, label %cond_true.i46 + +cond_true.i46: ; preds = %_Z3fooiM1BFvvE.exit + %b2.i35 = bitcast %struct.B* %b.i29 to i8* ; <i8*> [#uses=1] + %ctg23.i36 = getelementptr i8* %b2.i35, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1] + %tmp121314.i37 = bitcast i8* %ctg23.i36 to i32 (...)*** ; <i32 (...)***> [#uses=1] + %tmp15.i38 = load i32 (...)*** %tmp121314.i37 ; <i32 (...)**> [#uses=1] + %tmp151.i41 = bitcast i32 (...)** %tmp15.i38 to i8* ; <i8*> [#uses=1] + %ctg2.i42 = getelementptr i8* %tmp151.i41, i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) ; <i8*> [#uses=1] + %tmp2021.i43 = bitcast i8* %ctg2.i42 to i32 (...)** ; <i32 (...)**> [#uses=1] + %tmp22.i44 = load i32 (...)** %tmp2021.i43 ; <i32 (...)*> [#uses=1] + %tmp2223.i45 = bitcast i32 (...)* %tmp22.i44 to void (%struct.B*)* ; <void (%struct.B*)*> [#uses=1] + br label %_Z3fooiM1BFvvE.exit56 + +_Z3fooiM1BFvvE.exit56: ; preds = %cond_true.i46, %_Z3fooiM1BFvvE.exit + %iftmp.2.0.i49 = phi void (%struct.B*)* [ %tmp2223.i45, %cond_true.i46 ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to void (%struct.B*)*), %_Z3fooiM1BFvvE.exit ] ; <void (%struct.B*)*> [#uses=1] + %b4.i53 = bitcast %struct.B* %b.i29 to i8* ; <i8*> [#uses=1] + %ctg25.i54 = getelementptr i8* %b4.i53, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1] + %tmp3031.i55 = bitcast i8* %ctg25.i54 to %struct.B* ; <%struct.B*> [#uses=1] + call void %iftmp.2.0.i49( %struct.B* %tmp3031.i55 ) + %tmp2.i2 = getelementptr %struct.B* %b.i1, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 -1, i32* %tmp2.i2 + br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit28, label %cond_true.i18 + +cond_true.i18: ; preds = %_Z3fooiM1BFvvE.exit56 + %b2.i7 = bitcast %struct.B* %b.i1 to i8* ; <i8*> [#uses=1] + %ctg23.i8 = getelementptr i8* %b2.i7, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1] + %tmp121314.i9 = bitcast i8* %ctg23.i8 to i32 (...)*** ; <i32 (...)***> [#uses=1] + %tmp15.i10 = load i32 (...)*** %tmp121314.i9 ; <i32 (...)**> [#uses=1] + %tmp151.i13 = bitcast i32 (...)** %tmp15.i10 to i8* ; <i8*> [#uses=1] + %ctg2.i14 = getelementptr i8* %tmp151.i13, i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) ; <i8*> [#uses=1] + %tmp2021.i15 = bitcast i8* %ctg2.i14 to i32 (...)** ; <i32 (...)**> [#uses=1] + %tmp22.i16 = load i32 (...)** %tmp2021.i15 ; <i32 (...)*> [#uses=1] + %tmp2223.i17 = bitcast i32 (...)* %tmp22.i16 to void (%struct.B*)* ; <void (%struct.B*)*> [#uses=1] + br label %_Z3fooiM1BFvvE.exit28 + +_Z3fooiM1BFvvE.exit28: ; preds = %cond_true.i18, %_Z3fooiM1BFvvE.exit56 + %iftmp.2.0.i21 = phi void (%struct.B*)* [ %tmp2223.i17, %cond_true.i18 ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to void (%struct.B*)*), %_Z3fooiM1BFvvE.exit56 ] ; <void (%struct.B*)*> [#uses=1] + %b4.i25 = bitcast %struct.B* %b.i1 to i8* ; <i8*> [#uses=1] + %ctg25.i26 = getelementptr i8* %b4.i25, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1] + %tmp3031.i27 = bitcast i8* %ctg25.i26 to %struct.B* ; <%struct.B*> [#uses=1] + call void %iftmp.2.0.i21( %struct.B* %tmp3031.i27 ) + ret i32 0 +} diff --git a/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll b/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll new file mode 100644 index 0000000..ec70a59 --- /dev/null +++ b/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll @@ -0,0 +1,32 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" +target triple = "arm-apple-darwin8" + %struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8 } +@search = external global %struct.CHESS_POSITION ; <%struct.CHESS_POSITION*> [#uses=3] +@file_mask = external global [8 x i64] ; <[8 x i64]*> [#uses=1] +@rank_mask.1.b = external global i1 ; <i1*> [#uses=1] + +define fastcc void @EvaluateDevelopment() { +entry: + %tmp7 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 7) ; <i64> [#uses=1] + %tmp50 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 0) ; <i64> [#uses=1] + %tmp52 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 1) ; <i64> [#uses=1] + %tmp53 = or i64 %tmp52, %tmp50 ; <i64> [#uses=1] + %tmp57.b = load i1* @rank_mask.1.b ; <i1> [#uses=1] + %tmp57 = select i1 %tmp57.b, i64 71776119061217280, i64 0 ; <i64> [#uses=1] + %tmp58 = and i64 %tmp57, %tmp7 ; <i64> [#uses=1] + %tmp59 = lshr i64 %tmp58, 8 ; <i64> [#uses=1] + %tmp63 = load i64* getelementptr ([8 x i64]* @file_mask, i32 0, i32 4) ; <i64> [#uses=1] + %tmp64 = or i64 %tmp63, 0 ; <i64> [#uses=1] + %tmp65 = and i64 %tmp59, %tmp53 ; <i64> [#uses=1] + %tmp66 = and i64 %tmp65, %tmp64 ; <i64> [#uses=1] + %tmp67 = icmp eq i64 %tmp66, 0 ; <i1> [#uses=1] + br i1 %tmp67, label %cond_next145, label %cond_true70 + +cond_true70: ; preds = %entry + ret void + +cond_next145: ; preds = %entry + ret void +} diff --git a/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll new file mode 100644 index 0000000..b850728 --- /dev/null +++ b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll @@ -0,0 +1,113 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin + + %struct.Connection = type { i32, [10 x i8], i32 } + %struct.IntChunk = type { %struct.cppobjtype, i32, i32*, i32 } + %struct.Point = type { i8*, %struct.cppobjtype, i16 (%struct.Point*) sext *, i16 (%struct.Point*) sext *, double (%struct.Point*)*, double (%struct.Point*)* } + %struct.RefPoint = type { %struct.Point*, %struct.cppobjtype } + %struct.ShortArray = type { %struct.cppobjtype, i32, i16* } + %struct.TestObj = type { i8*, %struct.cppobjtype, i8, [32 x i8], i8*, i8**, i16, i16, i32, i32, i32, i32, float, double, %struct.cppobjtype, i32, i16*, i16**, i8**, i32, %struct.XyPoint, [3 x %struct.Connection], %struct.Point*, %struct.XyPoint*, i32, i8*, i8*, i16*, %struct.ShortArray, %struct.IntChunk, %struct.cppobjtype, %struct.cppobjtype, %struct.RefPoint, i32, %struct.cppobjtype, %struct.cppobjtype } + %struct.XyPoint = type { i16, i16 } + %struct.cppobjtype = type { i32, i16, i16 } +@Msg = external global [256 x i8] ; <[256 x i8]*> [#uses=1] +@.str53615 = external constant [48 x i8] ; <[48 x i8]*> [#uses=1] +@FirstTime.4637.b = external global i1 ; <i1*> [#uses=1] + +define fastcc void @Draw7(i32 %Option, i32* %Status) { +entry: + %tmp115.b = load i1* @FirstTime.4637.b ; <i1> [#uses=1] + br i1 %tmp115.b, label %cond_next239, label %cond_next.i + +cond_next.i: ; preds = %entry + ret void + +cond_next239: ; preds = %entry + %tmp242 = icmp eq i32 0, 0 ; <i1> [#uses=1] + br i1 %tmp242, label %cond_next253, label %cond_next296 + +cond_next253: ; preds = %cond_next239 + switch i32 %Option, label %bb1326 [ + i32 3, label %cond_true258 + i32 4, label %cond_true268 + i32 2, label %cond_true279 + i32 1, label %cond_next315 + ] + +cond_true258: ; preds = %cond_next253 + ret void + +cond_true268: ; preds = %cond_next253 + ret void + +cond_true279: ; preds = %cond_next253 + ret void + +cond_next296: ; preds = %cond_next239 + ret void + +cond_next315: ; preds = %cond_next253 + %tmp1140 = icmp eq i32 0, 0 ; <i1> [#uses=1] + br i1 %tmp1140, label %cond_true1143, label %bb1326 + +cond_true1143: ; preds = %cond_next315 + %tmp1148 = icmp eq i32 0, 0 ; <i1> [#uses=4] + br i1 %tmp1148, label %cond_next1153, label %cond_true1151 + +cond_true1151: ; preds = %cond_true1143 + ret void + +cond_next1153: ; preds = %cond_true1143 + %tmp8.i.i185 = icmp eq i32 0, 0 ; <i1> [#uses=1] + br i1 %tmp8.i.i185, label %TestObj_new1.exit, label %cond_true.i.i187 + +cond_true.i.i187: ; preds = %cond_next1153 + ret void + +TestObj_new1.exit: ; preds = %cond_next1153 + %tmp1167 = icmp eq i16 0, 0 ; <i1> [#uses=1] + %tmp1178 = icmp eq i32 0, 0 ; <i1> [#uses=1] + %bothcond = and i1 %tmp1167, %tmp1178 ; <i1> [#uses=1] + br i1 %bothcond, label %bb1199, label %bb1181 + +bb1181: ; preds = %TestObj_new1.exit + ret void + +bb1199: ; preds = %TestObj_new1.exit + br i1 %tmp1148, label %cond_next1235, label %Object_Dump.exit302 + +Object_Dump.exit302: ; preds = %bb1199 + ret void + +cond_next1235: ; preds = %bb1199 + %bothcond10485 = or i1 false, %tmp1148 ; <i1> [#uses=1] + br i1 %bothcond10485, label %cond_next1267, label %cond_true1248 + +cond_true1248: ; preds = %cond_next1235 + ret void + +cond_next1267: ; preds = %cond_next1235 + br i1 %tmp1148, label %cond_next1275, label %cond_true1272 + +cond_true1272: ; preds = %cond_next1267 + %tmp1273 = load %struct.TestObj** null ; <%struct.TestObj*> [#uses=2] + %tmp2930.i = ptrtoint %struct.TestObj* %tmp1273 to i32 ; <i32> [#uses=1] + %tmp42.i348 = sub i32 0, %tmp2930.i ; <i32> [#uses=1] + %tmp45.i = getelementptr %struct.TestObj* %tmp1273, i32 0, i32 0 ; <i8**> [#uses=2] + %tmp48.i = load i8** %tmp45.i ; <i8*> [#uses=1] + %tmp50.i350 = call i32 (i8*, i8*, ...)* @sprintf( i8* getelementptr ([256 x i8]* @Msg, i32 0, i32 0), i8* getelementptr ([48 x i8]* @.str53615, i32 0, i32 0), i8* null, i8** %tmp45.i, i8* %tmp48.i ) ; <i32> [#uses=0] + br i1 false, label %cond_true.i632.i, label %Ut_TraceMsg.exit648.i + +cond_true.i632.i: ; preds = %cond_true1272 + ret void + +Ut_TraceMsg.exit648.i: ; preds = %cond_true1272 + %tmp57.i = getelementptr i8* null, i32 %tmp42.i348 ; <i8*> [#uses=0] + ret void + +cond_next1275: ; preds = %cond_next1267 + ret void + +bb1326: ; preds = %cond_next315, %cond_next253 + ret void +} + +declare i32 @sprintf(i8*, i8*, ...) diff --git a/test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll b/test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll new file mode 100644 index 0000000..159be4e --- /dev/null +++ b/test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll @@ -0,0 +1,41 @@ +; RUN: llvm-as < %s | llc | not grep r11 + +target triple = "thumb-linux-gnueabi" + %struct.__sched_param = type { i32 } + %struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, i8*, i32 } +@i.1882 = internal global i32 1 ; <i32*> [#uses=2] +@.str = internal constant [14 x i8] c"Thread 1: %d\0A\00" ; <[14 x i8]*> [#uses=1] +@.str1 = internal constant [14 x i8] c"Thread 2: %d\0A\00" ; <[14 x i8]*> [#uses=1] + +define i8* @f(i8* %a) { +entry: + %tmp1 = load i32* @i.1882 ; <i32> [#uses=1] + %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=2] + store i32 %tmp2, i32* @i.1882 + %tmp34 = inttoptr i32 %tmp2 to i8* ; <i8*> [#uses=1] + ret i8* %tmp34 +} + +define i32 @main() { +entry: + %t = alloca i32, align 4 ; <i32*> [#uses=4] + %ret = alloca i32, align 4 ; <i32*> [#uses=3] + %tmp1 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; <i32> [#uses=0] + %tmp2 = load i32* %t ; <i32> [#uses=1] + %ret3 = bitcast i32* %ret to i8** ; <i8**> [#uses=2] + %tmp4 = call i32 @pthread_join( i32 %tmp2, i8** %ret3 ) ; <i32> [#uses=0] + %tmp5 = load i32* %ret ; <i32> [#uses=1] + %tmp7 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str, i32 0, i32 0), i32 %tmp5 ) ; <i32> [#uses=0] + %tmp8 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; <i32> [#uses=0] + %tmp9 = load i32* %t ; <i32> [#uses=1] + %tmp11 = call i32 @pthread_join( i32 %tmp9, i8** %ret3 ) ; <i32> [#uses=0] + %tmp12 = load i32* %ret ; <i32> [#uses=1] + %tmp14 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 %tmp12 ) ; <i32> [#uses=0] + ret i32 0 +} + +declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*) + +declare i32 @pthread_join(i32, i8**) + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/ARM/2007-05-07-jumptoentry.ll b/test/CodeGen/ARM/2007-05-07-jumptoentry.ll new file mode 100644 index 0000000..11431be --- /dev/null +++ b/test/CodeGen/ARM/2007-05-07-jumptoentry.ll @@ -0,0 +1,58 @@ +; RUN: llvm-as < %s | llc | not grep 1_0 +; This used to create an extra branch to 'entry', LBB1_0. + +; ModuleID = 'bug.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" +target triple = "arm-apple-darwin8" + %struct.HexxagonMove = type { i8, i8, i32 } + %struct.HexxagonMoveList = type { i32, %struct.HexxagonMove* } + +define void @_ZN16HexxagonMoveList8sortListEv(%struct.HexxagonMoveList* %this) { +entry: + %tmp51 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 0 ; <i32*> [#uses=1] + %tmp2 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 1 ; <%struct.HexxagonMove**> [#uses=2] + br label %bb49 + +bb1: ; preds = %bb49 + %tmp3 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=5] + %tmp6 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 2 ; <i32*> [#uses=1] + %tmp7 = load i32* %tmp6 ; <i32> [#uses=2] + %tmp12 = add i32 %i.1, 1 ; <i32> [#uses=7] + %tmp14 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 2 ; <i32*> [#uses=1] + %tmp15 = load i32* %tmp14 ; <i32> [#uses=1] + %tmp16 = icmp slt i32 %tmp7, %tmp15 ; <i1> [#uses=1] + br i1 %tmp16, label %cond_true, label %bb49 + +cond_true: ; preds = %bb1 + %tmp23.0 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 0 ; <i8*> [#uses=2] + %tmp67 = load i8* %tmp23.0 ; <i8> [#uses=1] + %tmp23.1 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 1 ; <i8*> [#uses=1] + %tmp68 = load i8* %tmp23.1 ; <i8> [#uses=1] + %tmp3638 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 0 ; <i8*> [#uses=1] + tail call void @llvm.memcpy.i32( i8* %tmp23.0, i8* %tmp3638, i32 8, i32 4 ) + %tmp41 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=3] + %tmp44.0 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 0 ; <i8*> [#uses=1] + store i8 %tmp67, i8* %tmp44.0 + %tmp44.1 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 1 ; <i8*> [#uses=1] + store i8 %tmp68, i8* %tmp44.1 + %tmp44.2 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 2 ; <i32*> [#uses=1] + store i32 %tmp7, i32* %tmp44.2 + br label %bb49 + +bb49: ; preds = %bb59, %cond_true, %bb1, %entry + %i.1 = phi i32 [ 0, %entry ], [ %tmp12, %bb1 ], [ %tmp12, %cond_true ], [ 0, %bb59 ] ; <i32> [#uses=5] + %move.2 = phi i32 [ 0, %entry ], [ 1, %cond_true ], [ %move.2, %bb1 ], [ 0, %bb59 ] ; <i32> [#uses=2] + %tmp52 = load i32* %tmp51 ; <i32> [#uses=1] + %tmp53 = add i32 %tmp52, -1 ; <i32> [#uses=1] + %tmp55 = icmp sgt i32 %tmp53, %i.1 ; <i1> [#uses=1] + br i1 %tmp55, label %bb1, label %bb59 + +bb59: ; preds = %bb49 + %tmp61 = icmp eq i32 %move.2, 0 ; <i1> [#uses=1] + br i1 %tmp61, label %return, label %bb49 + +return: ; preds = %bb59 + ret void +} + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) diff --git a/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll new file mode 100644 index 0000000..15efd60 --- /dev/null +++ b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll @@ -0,0 +1,65 @@ +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | wc -l | grep 1 +; Check that calls to baz and quux are tail-merged. + +; ModuleID = 'tail.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define i32 @f(i32 %i, i32 %q) { +entry: + %i_addr = alloca i32 ; <i32*> [#uses=2] + %q_addr = alloca i32 ; <i32*> [#uses=2] + %retval = alloca i32, align 4 ; <i32*> [#uses=1] + "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 %i, i32* %i_addr + store i32 %q, i32* %q_addr + %tmp = load i32* %i_addr ; <i32> [#uses=1] + %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1] + %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1] + %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1] + br i1 %toBool, label %cond_true, label %cond_false + +cond_true: ; preds = %entry + %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] + br label %cond_next + +cond_false: ; preds = %entry + %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0] + %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] + br label %cond_next + +cond_next: ; preds = %cond_false, %cond_true + %tmp7 = load i32* %q_addr ; <i32> [#uses=1] + %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1] + %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1] + %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1] + br i1 %toBool10, label %cond_true11, label %cond_false15 + +cond_true11: ; preds = %cond_next + %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0] + %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0] + br label %cond_next18 + +cond_false15: ; preds = %cond_next + %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0] + br label %cond_next18 + +cond_next18: ; preds = %cond_false15, %cond_true11 + %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + br label %return + +return: ; preds = %cond_next18 + %retval20 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval20 +} + +declare i32 @bar(...) + +declare i32 @baz(...) + +declare i32 @foo(...) + +declare i32 @quux(...) diff --git a/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll new file mode 100644 index 0000000..70c0777 --- /dev/null +++ b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll @@ -0,0 +1,66 @@ +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | wc -l | grep 1 +; Check that calls to baz and quux are tail-merged. + +; ModuleID = 'tail.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define i32 @f(i32 %i, i32 %q) { +entry: + %i_addr = alloca i32 ; <i32*> [#uses=2] + %q_addr = alloca i32 ; <i32*> [#uses=2] + %retval = alloca i32, align 4 ; <i32*> [#uses=1] + "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 %i, i32* %i_addr + store i32 %q, i32* %q_addr + %tmp = load i32* %i_addr ; <i32> [#uses=1] + %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1] + %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1] + %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1] + br i1 %toBool, label %cond_true, label %cond_false + +cond_true: ; preds = %entry + %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] + %tmp7 = load i32* %q_addr ; <i32> [#uses=1] + %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1] + %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1] + %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1] + br i1 %toBool10, label %cond_true11, label %cond_false15 + +cond_false: ; preds = %entry + %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0] + %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] + %tmp27 = load i32* %q_addr ; <i32> [#uses=1] + %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1] + %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1] + %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1] + br i1 %toBool210, label %cond_true11, label %cond_false15 + +cond_true11: ; preds = %cond_next + %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0] + %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0] + br label %cond_next18 + +cond_false15: ; preds = %cond_next + %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0] + br label %cond_next18 + +cond_next18: ; preds = %cond_false15, %cond_true11 + %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + br label %return + +return: ; preds = %cond_next18 + %retval20 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval20 +} + +declare i32 @bar(...) + +declare i32 @baz(...) + +declare i32 @foo(...) + +declare i32 @quux(...) diff --git a/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll b/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll new file mode 100644 index 0000000..58c5f89 --- /dev/null +++ b/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 + +define i32 @test3() { + tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 ) + ret i32 11 +} diff --git a/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll new file mode 100644 index 0000000..430b368 --- /dev/null +++ b/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll @@ -0,0 +1,30 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi +; PR1406 + + %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* } + %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* } + %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 } + %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] } + %struct.AVOption = type opaque + %struct.AVPaletteControl = type { i32, [256 x i32] } + %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] } + %struct.AVRational = type { i32, i32 } + %struct.RcOverride = type { i32, i32, i32, float } + +define i32 @decode_init(%struct.AVCodecContext* %avctx) { +entry: + br i1 false, label %bb, label %cond_next789 + +bb: ; preds = %bb, %entry + br i1 false, label %bb59, label %bb + +bb59: ; preds = %bb + %tmp68 = sdiv i64 0, 0 ; <i64> [#uses=1] + %tmp6869 = trunc i64 %tmp68 to i32 ; <i32> [#uses=2] + %tmp81 = call i32 asm "smull $0, $1, $2, $3 \0A\09mov $0, $0, lsr $4\0A\09add $1, $0, $1, lsl $5\0A\09", "=&r,=*&r,r,r,i,i"( i32* null, i32 %tmp6869, i32 13316085, i32 23, i32 9 ) ; <i32> [#uses=0] + %tmp90 = call i32 asm "smull $0, $1, $2, $3 \0A\09mov $0, $0, lsr $4\0A\09add $1, $0, $1, lsl $5\0A\09", "=&r,=*&r,r,r,i,i"( i32* null, i32 %tmp6869, i32 10568984, i32 23, i32 9 ) ; <i32> [#uses=0] + unreachable + +cond_next789: ; preds = %entry + ret i32 0 +} diff --git a/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll new file mode 100644 index 0000000..94c116d --- /dev/null +++ b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll @@ -0,0 +1,68 @@ +; RUN: llvm-as < %s | llc -march=arm | grep bl.*baz | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep bl.*quux | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*baz | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*quux | wc -l | grep 2 +; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 works. + +; ModuleID = 'tail.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define i32 @f(i32 %i, i32 %q) { +entry: + %i_addr = alloca i32 ; <i32*> [#uses=2] + %q_addr = alloca i32 ; <i32*> [#uses=2] + %retval = alloca i32, align 4 ; <i32*> [#uses=1] + "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 %i, i32* %i_addr + store i32 %q, i32* %q_addr + %tmp = load i32* %i_addr ; <i32> [#uses=1] + %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1] + %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1] + %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1] + br i1 %toBool, label %cond_true, label %cond_false + +cond_true: ; preds = %entry + %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] + %tmp7 = load i32* %q_addr ; <i32> [#uses=1] + %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1] + %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1] + %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1] + br i1 %toBool10, label %cond_true11, label %cond_false15 + +cond_false: ; preds = %entry + %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0] + %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] + %tmp27 = load i32* %q_addr ; <i32> [#uses=1] + %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1] + %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1] + %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1] + br i1 %toBool210, label %cond_true11, label %cond_false15 + +cond_true11: ; preds = %cond_next + %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0] + %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0] + br label %cond_next18 + +cond_false15: ; preds = %cond_next + %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0] + br label %cond_next18 + +cond_next18: ; preds = %cond_false15, %cond_true11 + %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + br label %return + +return: ; preds = %cond_next18 + %retval20 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval20 +} + +declare i32 @bar(...) + +declare i32 @baz(...) + +declare i32 @foo(...) + +declare i32 @quux(...) diff --git a/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll new file mode 100644 index 0000000..de32a26 --- /dev/null +++ b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll @@ -0,0 +1,34 @@ +; RUN: llvm-as < %s | llc -march=arm | not grep {str.*\\!} + + %struct.shape_edge_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32 } + %struct.shape_path_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32, i32, i32 } + %struct.shape_pool_t = type { i8* (%struct.shape_pool_t*, i8*, i32)*, i8* (%struct.shape_pool_t*, i32)*, void (%struct.shape_pool_t*, i8*)* } + +define %struct.shape_path_t* @shape_path_alloc(%struct.shape_pool_t* %pool, i32* %shape) { +entry: + br i1 false, label %cond_false, label %bb45 + +bb45: ; preds = %entry + ret %struct.shape_path_t* null + +cond_false: ; preds = %entry + br i1 false, label %bb140, label %bb174 + +bb140: ; preds = %bb140, %cond_false + %indvar = phi i32 [ 0, %cond_false ], [ %indvar.next, %bb140 ] ; <i32> [#uses=2] + %edge.230.0.rec = shl i32 %indvar, 1 ; <i32> [#uses=3] + %edge.230.0 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.rec ; <%struct.shape_edge_t*> [#uses=1] + %edge.230.0.sum6970 = or i32 %edge.230.0.rec, 1 ; <i32> [#uses=2] + %tmp154 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.sum6970 ; <%struct.shape_edge_t*> [#uses=1] + %tmp11.i5 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.sum6970, i32 0 ; <%struct.shape_edge_t**> [#uses=1] + store %struct.shape_edge_t* %edge.230.0, %struct.shape_edge_t** %tmp11.i5 + store %struct.shape_edge_t* %tmp154, %struct.shape_edge_t** null + %tmp16254.0.rec = add i32 %edge.230.0.rec, 2 ; <i32> [#uses=1] + %xp.350.sum = add i32 0, %tmp16254.0.rec ; <i32> [#uses=1] + %tmp168 = icmp slt i32 %xp.350.sum, 0 ; <i1> [#uses=1] + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] + br i1 %tmp168, label %bb140, label %bb174 + +bb174: ; preds = %bb140, %cond_false + ret %struct.shape_path_t* null +} diff --git a/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll b/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll new file mode 100644 index 0000000..d21a8f2 --- /dev/null +++ b/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll @@ -0,0 +1,237 @@ +; RUN: llvm-as < %s | llc +; PR1424 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "arm-linux-gnueabi" + %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* } + %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* } + %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 } + %struct.AVEvalExpr = type opaque + %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] } + %struct.AVOption = type opaque + %struct.AVPaletteControl = type { i32, [256 x i32] } + %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] } + %struct.AVRational = type { i32, i32 } + %struct.BlockNode = type { i16, i16, i8, [3 x i8], i8, i8 } + %struct.DSPContext = type { void (i16*, i8*, i32)*, void (i16*, i8*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, i32 (i16*)*, void (i8*, i8*, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, void (i16*)*, i32 (i8*, i32)*, i32 (i8*, i32)*, [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], i32 (i8*, i16*, i32)*, [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [2 x void (i8*, i8*, i8*, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [8 x void (i8*, i8*, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [10 x void (i8*, i32, i32, i32, i32)*], [10 x void (i8*, i8*, i32, i32, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i16*, i32)*, [2 x [4 x i32 (i8*, i8*, i8*, i32, i32)*]], void (i8*, i8*, i32)*, void (i8*, i8*, i8*, i32)*, void (i8*, i8*, i8*, i32, i32*, i32*)*, void (i32*, i32*, i32)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32)*, void (i8*, i32, i32, i32)*, void ([4 x [4 x i16]]*, i8*, [40 x i8]*, [40 x [2 x i16]]*, i32, i32, i32, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32)*, void (float*, float*, i32)*, void (float*, float*, i32)*, void (float*, float*, float*, i32)*, void (float*, float*, float*, float*, i32, i32, i32)*, void (i16*, float*, i32)*, void (i16*)*, void (i16*)*, void (i16*)*, void (i8*, i32, i16*)*, void (i8*, i32, i16*)*, [64 x i8], i32, i32 (i16*, i16*, i16*, i32)*, void (i16*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void ([4 x i16]*)*, void (i32*, i32*, i32*, i32*, i32*, i32*, i32)*, void (i32*, i32)*, void (i8*, i32, i8**, i32, i32, i32, i32, i32, %struct.slice_buffer*, i32, i8*)*, void (i8*, i32, i32)*, [4 x void (i8*, i32, i8*, i32, i32, i32)*], void (i16*)*, void (i16*, i32)*, void (i16*, i32)*, void (i16*, i32)*, void (i8*, i32)*, void (i8*, i32)*, [16 x void (i8*, i8*, i32, i32)*] } + %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } + %struct.GetBitContext = type { i8*, i8*, i32*, i32, i32, i32, i32 } + %struct.MJpegContext = type opaque + %struct.MotionEstContext = type { %struct.AVCodecContext*, i32, [4 x [2 x i32]], [4 x [2 x i32]], i8*, i8*, [2 x i8*], i8*, i32, i32*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x [4 x i8*]], [4 x [4 x i8*]], i32, i32, i32, i32, i32, [4 x void (i8*, i8*, i32, i32)*]*, [4 x void (i8*, i8*, i32, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [4097 x i8]*, i8*, i32 (%struct.MpegEncContext*, i32*, i32*, i32, i32, i32, i32, i32)* } + %struct.MpegEncContext = type { %struct.AVCodecContext*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Picture*, %struct.Picture**, %struct.Picture**, i32, i32, [8 x %struct.MpegEncContext*], %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture*, %struct.Picture*, %struct.Picture*, [3 x i8*], [3 x i32], i16*, [3 x i16*], [20 x i16], i32, i32, i8*, i8*, i8*, i8*, i8*, [16 x i16]*, [3 x [16 x i16]*], i32, i8*, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, [5 x i32], i32, i32, i32, i32, %struct.DSPContext, i32, i32, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i8*], [2 x [2 x i8*]], i32, i32, i32, [2 x [4 x [2 x i32]]], [2 x [2 x i32]], [2 x [2 x [2 x i32]]], i8*, [2 x [64 x i16]], %struct.MotionEstContext, i32, i32, i32, i32, i32, i32, i16*, [6 x i32], [6 x i32], [3 x i8*], i32*, [64 x i16], [64 x i16], [64 x i16], [64 x i16], i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [8 x i32], [64 x i32]*, [64 x i32]*, [2 x [64 x i16]]*, [2 x [64 x i16]]*, [12 x i32], %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, [64 x i32]*, [2 x i32], [64 x i16]*, i8*, i64, i64, i32, i32, %struct.RateControlContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, %struct.GetBitContext, i32, i32, i32, %struct.ParseContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [2 x i32]], [2 x [2 x i32]], [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, [3 x i32], %struct.MJpegContext*, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [65 x [65 x [2 x i32]]]]*, i32, i32, %struct.GetBitContext, i32, i32, i32, i8*, i32, [2 x [2 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i8*, i32, [12 x i16*], [64 x i16]*, [8 x [64 x i16]]*, i32 (%struct.MpegEncContext*, [64 x i16]*)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, void (%struct.MpegEncContext*, i16*)* } + %struct.ParseContext = type { i8*, i32, i32, i32, i32, i32, i32, i32 } + %struct.Picture = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*], [3 x i8*], [2 x [2 x i16]*], i32*, [2 x i32], i32, i32, i32, i32, [2 x [16 x i32]], [2 x i32], i32, i32, i16*, i16*, i8*, i32*, i32 } + %struct.Plane = type { i32, i32, [8 x [4 x %struct.SubBand]] } + %struct.Predictor = type { double, double, double } + %struct.PutBitContext = type { i32, i32, i8*, i8*, i8* } + %struct.RangeCoder = type { i32, i32, i32, i32, [256 x i8], [256 x i8], i8*, i8*, i8* } + %struct.RateControlContext = type { %struct.FILE*, i32, %struct.RateControlEntry*, double, [5 x %struct.Predictor], double, double, double, double, double, [5 x double], i32, i32, [5 x i64], [5 x i64], [5 x i64], [5 x i64], [5 x i32], i32, i8*, float, i32, %struct.AVEvalExpr* } + %struct.RateControlEntry = type { i32, float, i32, i32, i32, i32, i32, i64, i32, float, i32, i32, i32, i32, i32, i32 } + %struct.RcOverride = type { i32, i32, i32, float } + %struct.ScanTable = type { i8*, [64 x i8], [64 x i8] } + %struct.SnowContext = type { %struct.AVCodecContext*, %struct.RangeCoder, %struct.DSPContext, %struct.AVFrame, %struct.AVFrame, %struct.AVFrame, [8 x %struct.AVFrame], %struct.AVFrame, [32 x i8], [4224 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [8 x [2 x i16]*], [8 x i32*], i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.Plane], %struct.BlockNode*, [1024 x i32], i32, %struct.slice_buffer, %struct.MpegEncContext } + %struct.SubBand = type { i32, i32, i32, i32, i32, i32*, i32, i32, i32, %struct.x_and_coeff*, %struct.SubBand*, [519 x [32 x i8]] } + %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 } + %struct.slice_buffer = type { i32**, i32**, i32, i32, i32, i32, i32* } + %struct.x_and_coeff = type { i16, i16 } + +define fastcc void @iterative_me(%struct.SnowContext* %s) { +entry: + %state = alloca [4224 x i8], align 8 ; <[4224 x i8]*> [#uses=0] + %best_rd4233 = alloca i32, align 4 ; <i32*> [#uses=0] + %tmp21 = getelementptr %struct.SnowContext* %s, i32 0, i32 36 ; <i32*> [#uses=2] + br label %bb4198 + +bb79: ; preds = %bb4189.preheader + br i1 false, label %cond_next239, label %cond_true + +cond_true: ; preds = %bb79 + ret void + +cond_next239: ; preds = %bb79 + %tmp286 = alloca i8, i32 0 ; <i8*> [#uses=0] + ret void + +bb4198: ; preds = %bb4189.preheader, %entry + br i1 false, label %bb4189.preheader, label %bb4204 + +bb4189.preheader: ; preds = %bb4198 + br i1 false, label %bb79, label %bb4198 + +bb4204: ; preds = %bb4198 + br i1 false, label %bb4221, label %cond_next4213 + +cond_next4213: ; preds = %bb4204 + ret void + +bb4221: ; preds = %bb4204 + br i1 false, label %bb5242.preheader, label %UnifiedReturnBlock + +bb5242.preheader: ; preds = %bb4221 + br label %bb5242 + +bb4231: ; preds = %bb5233 + %tmp4254.sum = add i32 0, 1 ; <i32> [#uses=2] + br i1 false, label %bb4559, label %cond_next4622 + +bb4559: ; preds = %bb4231 + ret void + +cond_next4622: ; preds = %bb4231 + %tmp4637 = load i16* null ; <i16> [#uses=1] + %tmp46374638 = sext i16 %tmp4637 to i32 ; <i32> [#uses=1] + %tmp4642 = load i16* null ; <i16> [#uses=1] + %tmp46424643 = sext i16 %tmp4642 to i32 ; <i32> [#uses=1] + %tmp4648 = load i16* null ; <i16> [#uses=1] + %tmp46484649 = sext i16 %tmp4648 to i32 ; <i32> [#uses=1] + %tmp4653 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 0 ; <i16*> [#uses=1] + %tmp4654 = load i16* %tmp4653 ; <i16> [#uses=1] + %tmp46544655 = sext i16 %tmp4654 to i32 ; <i32> [#uses=1] + %tmp4644 = add i32 %tmp46374638, 2 ; <i32> [#uses=1] + %tmp4650 = add i32 %tmp4644, %tmp46424643 ; <i32> [#uses=1] + %tmp4656 = add i32 %tmp4650, %tmp46484649 ; <i32> [#uses=1] + %tmp4657 = add i32 %tmp4656, %tmp46544655 ; <i32> [#uses=2] + %tmp4658 = ashr i32 %tmp4657, 2 ; <i32> [#uses=1] + %tmp4662 = load i16* null ; <i16> [#uses=1] + %tmp46624663 = sext i16 %tmp4662 to i32 ; <i32> [#uses=1] + %tmp4672 = getelementptr %struct.BlockNode* null, i32 0, i32 1 ; <i16*> [#uses=1] + %tmp4673 = load i16* %tmp4672 ; <i16> [#uses=1] + %tmp46734674 = sext i16 %tmp4673 to i32 ; <i32> [#uses=1] + %tmp4678 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 1 ; <i16*> [#uses=1] + %tmp4679 = load i16* %tmp4678 ; <i16> [#uses=1] + %tmp46794680 = sext i16 %tmp4679 to i32 ; <i32> [#uses=1] + %tmp4669 = add i32 %tmp46624663, 2 ; <i32> [#uses=1] + %tmp4675 = add i32 %tmp4669, 0 ; <i32> [#uses=1] + %tmp4681 = add i32 %tmp4675, %tmp46734674 ; <i32> [#uses=1] + %tmp4682 = add i32 %tmp4681, %tmp46794680 ; <i32> [#uses=2] + %tmp4683 = ashr i32 %tmp4682, 2 ; <i32> [#uses=1] + %tmp4703 = load i32* %tmp21 ; <i32> [#uses=1] + %tmp4707 = shl i32 %tmp4703, 0 ; <i32> [#uses=4] + %tmp4710 = load %struct.BlockNode** null ; <%struct.BlockNode*> [#uses=6] + %tmp4713 = mul i32 %tmp4707, %mb_y.4 ; <i32> [#uses=1] + %tmp4715 = add i32 %tmp4713, %mb_x.7 ; <i32> [#uses=7] + store i8 0, i8* null + store i8 0, i8* null + %tmp47594761 = bitcast %struct.BlockNode* null to i8* ; <i8*> [#uses=2] + call void @llvm.memcpy.i32( i8* null, i8* %tmp47594761, i32 10, i32 0 ) + %tmp4716.sum5775 = add i32 %tmp4715, 1 ; <i32> [#uses=1] + %tmp4764 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5775 ; <%struct.BlockNode*> [#uses=1] + %tmp47644766 = bitcast %struct.BlockNode* %tmp4764 to i8* ; <i8*> [#uses=1] + %tmp4716.sum5774 = add i32 %tmp4715, %tmp4707 ; <i32> [#uses=0] + %tmp47704772 = bitcast %struct.BlockNode* null to i8* ; <i8*> [#uses=1] + %tmp4774 = add i32 %tmp4707, 1 ; <i32> [#uses=1] + %tmp4716.sum5773 = add i32 %tmp4774, %tmp4715 ; <i32> [#uses=1] + %tmp4777 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5773 ; <%struct.BlockNode*> [#uses=1] + %tmp47774779 = bitcast %struct.BlockNode* %tmp4777 to i8* ; <i8*> [#uses=1] + %tmp4781 = icmp slt i32 %mb_x.7, 0 ; <i1> [#uses=1] + %tmp4788 = or i1 %tmp4781, %tmp4784 ; <i1> [#uses=2] + br i1 %tmp4788, label %cond_true4791, label %cond_next4794 + +cond_true4791: ; preds = %cond_next4622 + unreachable + +cond_next4794: ; preds = %cond_next4622 + %tmp4797 = icmp slt i32 %mb_x.7, %tmp4707 ; <i1> [#uses=1] + br i1 %tmp4797, label %cond_next4803, label %cond_true4800 + +cond_true4800: ; preds = %cond_next4794 + unreachable + +cond_next4803: ; preds = %cond_next4794 + %tmp4825 = ashr i32 %tmp4657, 12 ; <i32> [#uses=1] + shl i32 %tmp4682, 4 ; <i32>:0 [#uses=1] + %tmp4828 = and i32 %0, -64 ; <i32> [#uses=1] + %tmp4831 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 2 ; <i8*> [#uses=0] + %tmp4826 = add i32 %tmp4828, %tmp4825 ; <i32> [#uses=1] + %tmp4829 = add i32 %tmp4826, 0 ; <i32> [#uses=1] + %tmp4835 = add i32 %tmp4829, 0 ; <i32> [#uses=1] + store i32 %tmp4835, i32* null + %tmp48534854 = trunc i32 %tmp4658 to i16 ; <i16> [#uses=1] + %tmp4856 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 0 ; <i16*> [#uses=1] + store i16 %tmp48534854, i16* %tmp4856 + %tmp48574858 = trunc i32 %tmp4683 to i16 ; <i16> [#uses=1] + %tmp4860 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 1 ; <i16*> [#uses=1] + store i16 %tmp48574858, i16* %tmp4860 + %tmp4866 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 4 ; <i8*> [#uses=0] + br i1 false, label %bb4933, label %cond_false4906 + +cond_false4906: ; preds = %cond_next4803 + call void @llvm.memcpy.i32( i8* %tmp47594761, i8* null, i32 10, i32 0 ) + call void @llvm.memcpy.i32( i8* %tmp47644766, i8* null, i32 10, i32 0 ) + call void @llvm.memcpy.i32( i8* %tmp47704772, i8* null, i32 10, i32 0 ) + call void @llvm.memcpy.i32( i8* %tmp47774779, i8* null, i32 10, i32 0 ) + br label %bb5215 + +bb4933: ; preds = %bb5215, %cond_next4803 + br i1 false, label %cond_true4944, label %bb5215 + +cond_true4944: ; preds = %bb4933 + %tmp4982 = load i32* %tmp21 ; <i32> [#uses=1] + %tmp4986 = shl i32 %tmp4982, 0 ; <i32> [#uses=2] + %tmp4992 = mul i32 %tmp4986, %mb_y.4 ; <i32> [#uses=1] + %tmp4994 = add i32 %tmp4992, %mb_x.7 ; <i32> [#uses=5] + %tmp4995.sum5765 = add i32 %tmp4994, 1 ; <i32> [#uses=1] + %tmp5043 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5765 ; <%struct.BlockNode*> [#uses=1] + %tmp50435045 = bitcast %struct.BlockNode* %tmp5043 to i8* ; <i8*> [#uses=2] + call void @llvm.memcpy.i32( i8* null, i8* %tmp50435045, i32 10, i32 0 ) + %tmp4995.sum5764 = add i32 %tmp4994, %tmp4986 ; <i32> [#uses=1] + %tmp5049 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5764 ; <%struct.BlockNode*> [#uses=1] + %tmp50495051 = bitcast %struct.BlockNode* %tmp5049 to i8* ; <i8*> [#uses=2] + call void @llvm.memcpy.i32( i8* null, i8* %tmp50495051, i32 10, i32 0 ) + %tmp4995.sum5763 = add i32 0, %tmp4994 ; <i32> [#uses=1] + %tmp5056 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5763 ; <%struct.BlockNode*> [#uses=1] + %tmp50565058 = bitcast %struct.BlockNode* %tmp5056 to i8* ; <i8*> [#uses=1] + br i1 %tmp4788, label %cond_true5070, label %cond_next5073 + +cond_true5070: ; preds = %cond_true4944 + unreachable + +cond_next5073: ; preds = %cond_true4944 + %tmp5139 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 1 ; <i16*> [#uses=0] + %tmp5145 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 4 ; <i8*> [#uses=0] + call void @llvm.memcpy.i32( i8* %tmp50435045, i8* null, i32 10, i32 0 ) + call void @llvm.memcpy.i32( i8* %tmp50495051, i8* null, i32 10, i32 0 ) + call void @llvm.memcpy.i32( i8* %tmp50565058, i8* null, i32 10, i32 0 ) + br label %bb5215 + +bb5215: ; preds = %cond_next5073, %bb4933, %cond_false4906 + %i4232.3 = phi i32 [ 0, %cond_false4906 ], [ 0, %cond_next5073 ], [ 0, %bb4933 ] ; <i32> [#uses=1] + %tmp5217 = icmp slt i32 %i4232.3, 4 ; <i1> [#uses=1] + br i1 %tmp5217, label %bb4933, label %bb5220 + +bb5220: ; preds = %bb5215 + br i1 false, label %bb5230, label %cond_true5226 + +cond_true5226: ; preds = %bb5220 + ret void + +bb5230: ; preds = %bb5220 + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] + br label %bb5233 + +bb5233: ; preds = %bb5233.preheader, %bb5230 + %indvar = phi i32 [ 0, %bb5233.preheader ], [ %indvar.next, %bb5230 ] ; <i32> [#uses=2] + %mb_x.7 = shl i32 %indvar, 1 ; <i32> [#uses=4] + br i1 false, label %bb4231, label %bb5239 + +bb5239: ; preds = %bb5233 + %indvar.next37882 = add i32 %indvar37881, 1 ; <i32> [#uses=1] + br label %bb5242 + +bb5242: ; preds = %bb5239, %bb5242.preheader + %indvar37881 = phi i32 [ 0, %bb5242.preheader ], [ %indvar.next37882, %bb5239 ] ; <i32> [#uses=2] + %mb_y.4 = shl i32 %indvar37881, 1 ; <i32> [#uses=3] + br i1 false, label %bb5233.preheader, label %bb5248 + +bb5233.preheader: ; preds = %bb5242 + %tmp4784 = icmp slt i32 %mb_y.4, 0 ; <i1> [#uses=1] + br label %bb5233 + +bb5248: ; preds = %bb5242 + ret void + +UnifiedReturnBlock: ; preds = %bb4221 + ret void +} + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) diff --git a/test/CodeGen/ARM/addrmode.ll b/test/CodeGen/ARM/addrmode.ll new file mode 100644 index 0000000..a3832c0 --- /dev/null +++ b/test/CodeGen/ARM/addrmode.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=arm -stats |& grep asm-printer | grep 4 + +define i32 @t1(i32 %a) { + %b = mul i32 %a, 9 + %c = inttoptr i32 %b to i32* + %d = load i32* %c + ret i32 %d +} + +define i32 @t2(i32 %a) { + %b = mul i32 %a, -7 + %c = inttoptr i32 %b to i32* + %d = load i32* %c + ret i32 %d +} diff --git a/test/CodeGen/ARM/aliases.ll b/test/CodeGen/ARM/aliases.ll new file mode 100644 index 0000000..bd7555a --- /dev/null +++ b/test/CodeGen/ARM/aliases.ll @@ -0,0 +1,32 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=arm-linux-gnueabi -o %t -f +; RUN: grep -c set %t | grep 5 +; RUN: grep -c globl %t | grep 4 +; RUN: grep -c weak %t | grep 1 + +@bar = external global i32 +@foo1 = alias i32* @bar +@foo2 = alias i32* @bar + +%FunTy = type i32() + +declare i32 @foo_f() +@bar_f = alias weak %FunTy* @foo_f + +@bar_i = alias internal i32* @bar + +@A = alias bitcast (i32* @bar to i64*) + +define i32 @test() { +entry: + %tmp = load i32* @foo1 + %tmp1 = load i32* @foo2 + %tmp0 = load i32* @bar_i + %tmp2 = call i32 @foo_f() + %tmp3 = add i32 %tmp, %tmp2 + %tmp4 = call %FunTy* @bar_f() + %tmp5 = add i32 %tmp3, %tmp4 + %tmp6 = add i32 %tmp1, %tmp5 + %tmp7 = add i32 %tmp6, %tmp0 + ret i32 %tmp7 +} diff --git a/test/CodeGen/ARM/align.ll b/test/CodeGen/ARM/align.ll new file mode 100644 index 0000000..d145946 --- /dev/null +++ b/test/CodeGen/ARM/align.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep align.*1 | wc | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \ +; RUN: grep align.*2 | wc | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \ +; RUN: grep align.*3 | wc | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \ +; RUN: grep align.*2 | wc | grep 4 + +%a = global bool true +%b = global sbyte 1 +%c = global short 2 +%d = global int 3 +%e = global long 4 +%f = global float 5.0 +%g = global double 6.0 diff --git a/test/CodeGen/ARM/alloca.ll b/test/CodeGen/ARM/alloca.ll new file mode 100644 index 0000000..b98a674 --- /dev/null +++ b/test/CodeGen/ARM/alloca.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mtriple=arm-linux-gnu | \ +; RUN: grep {mov r11, sp} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mtriple=arm-linux-gnu | \ +; RUN: grep {mov sp, r11} + +void %f(uint %a) { +entry: + %tmp = alloca sbyte, uint %a + call void %g( sbyte* %tmp, uint %a, uint 1, uint 2, uint 3 ) + ret void +} + +declare void %g(sbyte*, uint, uint, uint, uint) diff --git a/test/CodeGen/ARM/argaddr.ll b/test/CodeGen/ARM/argaddr.ll new file mode 100644 index 0000000..a131721 --- /dev/null +++ b/test/CodeGen/ARM/argaddr.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +void %f(int %a, int %b, int %c, int %d, int %e) { +entry: + %a_addr = alloca int ; <int*> [#uses=2] + %b_addr = alloca int ; <int*> [#uses=2] + %c_addr = alloca int ; <int*> [#uses=2] + %d_addr = alloca int ; <int*> [#uses=2] + %e_addr = alloca int ; <int*> [#uses=2] + store int %a, int* %a_addr + store int %b, int* %b_addr + store int %c, int* %c_addr + store int %d, int* %d_addr + store int %e, int* %e_addr + call void %g( int* %a_addr, int* %b_addr, int* %c_addr, int* %d_addr, int* %e_addr ) + ret void +} + +declare void %g(int*, int*, int*, int*, int*) diff --git a/test/CodeGen/ARM/arguments.ll b/test/CodeGen/ARM/arguments.ll new file mode 100644 index 0000000..fbaaa23 --- /dev/null +++ b/test/CodeGen/ARM/arguments.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \ +; RUN: grep {mov r0, r2} | wc -l | grep 1 +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \ +; RUN: grep {mov r0, r1} | wc -l | grep 1 + +define i32 @f(i32 %a, i64 %b) { + %tmp = call i32 @g(i64 %b) + ret i32 %tmp +} + +declare i32 @g(i64) diff --git a/test/CodeGen/ARM/arm-asm.ll b/test/CodeGen/ARM/arm-asm.ll new file mode 100644 index 0000000..6b8ce9a --- /dev/null +++ b/test/CodeGen/ARM/arm-asm.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm + +void %frame_dummy() { +entry: + %tmp1 = tail call void (sbyte*)* (void (sbyte*)*)* asm "", "=r,0,~{dirflag},~{fpsr},~{flags}"( void (sbyte*)* null ) + ret void +} diff --git a/test/CodeGen/ARM/arm-negative-stride.ll b/test/CodeGen/ARM/arm-negative-stride.ll new file mode 100644 index 0000000..1048fb7 --- /dev/null +++ b/test/CodeGen/ARM/arm-negative-stride.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=arm | grep {str r1, \\\[r.*, -r.*, lsl #2\} + +define void @test(i32* %P, i32 %A, i32 %i) { +entry: + icmp eq i32 %i, 0 ; <i1>:0 [#uses=1] + br i1 %0, label %return, label %bb + +bb: ; preds = %bb, %entry + %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2] + %i_addr.09.0 = sub i32 %i, %indvar ; <i32> [#uses=1] + %tmp2 = getelementptr i32* %P, i32 %i_addr.09.0 ; <i32*> [#uses=1] + store i32 %A, i32* %tmp2 + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2] + icmp eq i32 %indvar.next, %i ; <i1>:1 [#uses=1] + br i1 %1, label %return, label %bb + +return: ; preds = %bb, %entry + ret void +} + diff --git a/test/CodeGen/ARM/bits.ll b/test/CodeGen/ARM/bits.ll new file mode 100644 index 0000000..82b4fa7 --- /dev/null +++ b/test/CodeGen/ARM/bits.ll @@ -0,0 +1,36 @@ +; RUN: llvm-as < %s | llc -march=arm > %t +; RUN: grep and %t | wc -l | grep 1 +; RUN: grep orr %t | wc -l | grep 1 +; RUN: grep eor %t | wc -l | grep 1 +; RUN: grep mov.*lsl %t | wc -l | grep 1 +; RUN: grep mov.*asr %t | wc -l | grep 1 + +define i32 @f1(i32 %a, i32 %b) { +entry: + %tmp2 = and i32 %b, %a ; <i32> [#uses=1] + ret i32 %tmp2 +} + +define i32 @f2(i32 %a, i32 %b) { +entry: + %tmp2 = or i32 %b, %a ; <i32> [#uses=1] + ret i32 %tmp2 +} + +define i32 @f3(i32 %a, i32 %b) { +entry: + %tmp2 = xor i32 %b, %a ; <i32> [#uses=1] + ret i32 %tmp2 +} + +define i32 @f4(i32 %a, i32 %b) { +entry: + %tmp3 = shl i32 %a, %b ; <i32> [#uses=1] + ret i32 %tmp3 +} + +define i32 @f5(i32 %a, i32 %b) { +entry: + %tmp3 = ashr i32 %a, %b ; <i32> [#uses=1] + ret i32 %tmp3 +} diff --git a/test/CodeGen/ARM/branch.ll b/test/CodeGen/ARM/branch.ll new file mode 100644 index 0000000..df28f42 --- /dev/null +++ b/test/CodeGen/ARM/branch.ll @@ -0,0 +1,57 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm > %t +; RUN: grep bne %t +; RUN: grep bge %t +; RUN: grep bhs %t +; RUN: grep blo %t + +void %f1(int %a, int %b, int* %v) { +entry: + %tmp = seteq int %a, %b ; <bool> [#uses=1] + br bool %tmp, label %cond_true, label %return + +cond_true: ; preds = %entry + store int 0, int* %v + ret void + +return: ; preds = %entry + ret void +} + +void %f2(int %a, int %b, int* %v) { +entry: + %tmp = setlt int %a, %b ; <bool> [#uses=1] + br bool %tmp, label %cond_true, label %return + +cond_true: ; preds = %entry + store int 0, int* %v + ret void + +return: ; preds = %entry + ret void +} + +void %f3(uint %a, uint %b, int* %v) { +entry: + %tmp = setlt uint %a, %b ; <bool> [#uses=1] + br bool %tmp, label %cond_true, label %return + +cond_true: ; preds = %entry + store int 0, int* %v + ret void + +return: ; preds = %entry + ret void +} + +void %f4(uint %a, uint %b, int* %v) { +entry: + %tmp = setlt uint %a, %b ; <bool> [#uses=1] + br bool %tmp, label %return, label %cond_true + +cond_true: ; preds = %entry + store int 0, int* %v + ret void + +return: ; preds = %entry + ret void +} diff --git a/test/CodeGen/ARM/bx_fold.ll b/test/CodeGen/ARM/bx_fold.ll new file mode 100644 index 0000000..437b318 --- /dev/null +++ b/test/CodeGen/ARM/bx_fold.ll @@ -0,0 +1,30 @@ +; RUN: llvm-as < %s | llc -march=arm +; RUN: llvm-as < %s | llc -march=arm | not grep bx + +define void @test(i32 %Ptr, i8* %L) { +entry: + br label %bb1 + +bb: ; preds = %bb1 + %gep.upgrd.1 = zext i32 %indvar to i64 ; <i64> [#uses=1] + %tmp7 = getelementptr i8* %L, i64 %gep.upgrd.1 ; <i8*> [#uses=1] + store i8 0, i8* %tmp7 + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] + br label %bb1 + +bb1: ; preds = %bb, %entry + %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3] + %i.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2] + %tmp = tail call i32 (...)* @bar( ) ; <i32> [#uses=1] + %tmp2 = add i32 %i.0, %tmp ; <i32> [#uses=1] + %Ptr_addr.0 = sub i32 %Ptr, %tmp2 ; <i32> [#uses=0] + %tmp12 = icmp eq i32 %i.0, %Ptr ; <i1> [#uses=1] + %tmp12.not = xor i1 %tmp12, true ; <i1> [#uses=1] + %bothcond = and i1 %tmp12.not, false ; <i1> [#uses=1] + br i1 %bothcond, label %bb, label %bb18 + +bb18: ; preds = %bb1 + ret void +} + +declare i32 @bar(...) diff --git a/test/CodeGen/ARM/call.ll b/test/CodeGen/ARM/call.ll new file mode 100644 index 0000000..c7e10b1 --- /dev/null +++ b/test/CodeGen/ARM/call.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep {mov lr, pc} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5t | grep blx +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mtriple=arm-linux-gnueabi\ +; RUN: -relocation-model=pic | grep {PLT} + +%t = weak global int ()* null +declare void %g(int, int, int, int) + +void %f() { + call void %g( int 1, int 2, int 3, int 4 ) + ret void +} + +void %g() { + %tmp = load int ()** %t + %tmp = tail call int %tmp( ) + ret void +} diff --git a/test/CodeGen/ARM/call_nolink.ll b/test/CodeGen/ARM/call_nolink.ll new file mode 100644 index 0000000..1af6fad --- /dev/null +++ b/test/CodeGen/ARM/call_nolink.ll @@ -0,0 +1,52 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \ +; RUN: not grep {bx lr} + + %struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* } +@r = external global [14 x i32] ; <[14 x i32]*> [#uses=4] +@isa = external global [13 x %struct.anon] ; <[13 x %struct.anon]*> [#uses=1] +@pgm = external global [2 x { i32, [3 x i32] }] ; <[2 x { i32, [3 x i32] }]*> [#uses=4] +@numi = external global i32 ; <i32*> [#uses=1] +@counter = external global [2 x i32] ; <[2 x i32]*> [#uses=1] + + +define void @main_bb_2E_i_bb205_2E_i_2E_i_bb115_2E_i_2E_i() { +newFuncRoot: + br label %bb115.i.i + +bb115.i.i.bb170.i.i_crit_edge.exitStub: ; preds = %bb115.i.i + ret void + +bb115.i.i.bb115.i.i_crit_edge: ; preds = %bb115.i.i + br label %bb115.i.i + +bb115.i.i: ; preds = %bb115.i.i.bb115.i.i_crit_edge, %newFuncRoot + %i_addr.3210.0.i.i = phi i32 [ %tmp166.i.i, %bb115.i.i.bb115.i.i_crit_edge ], [ 0, %newFuncRoot ] ; <i32> [#uses=7] + %tmp124.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 0 ; <i32*> [#uses=1] + %tmp125.i.i = load i32* %tmp124.i.i ; <i32> [#uses=1] + %tmp126.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp125.i.i ; <i32*> [#uses=1] + %tmp127.i.i = load i32* %tmp126.i.i ; <i32> [#uses=1] + %tmp131.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 1 ; <i32*> [#uses=1] + %tmp132.i.i = load i32* %tmp131.i.i ; <i32> [#uses=1] + %tmp133.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp132.i.i ; <i32*> [#uses=1] + %tmp134.i.i = load i32* %tmp133.i.i ; <i32> [#uses=1] + %tmp138.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 2 ; <i32*> [#uses=1] + %tmp139.i.i = load i32* %tmp138.i.i ; <i32> [#uses=1] + %tmp140.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp139.i.i ; <i32*> [#uses=1] + %tmp141.i.i = load i32* %tmp140.i.i ; <i32> [#uses=1] + %tmp143.i.i = add i32 %i_addr.3210.0.i.i, 12 ; <i32> [#uses=1] + %tmp146.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 0 ; <i32*> [#uses=1] + %tmp147.i.i = load i32* %tmp146.i.i ; <i32> [#uses=1] + %tmp149.i.i = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 %tmp147.i.i, i32 0 ; <i32 (i32, i32, i32)**> [#uses=1] + %tmp150.i.i = load i32 (i32, i32, i32)** %tmp149.i.i ; <i32 (i32, i32, i32)*> [#uses=1] + %tmp154.i.i = tail call i32 %tmp150.i.i( i32 %tmp127.i.i, i32 %tmp134.i.i, i32 %tmp141.i.i ) ; <i32> [#uses=1] + %tmp155.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp143.i.i ; <i32*> [#uses=1] + store i32 %tmp154.i.i, i32* %tmp155.i.i + %tmp159.i.i = getelementptr [2 x i32]* @counter, i32 0, i32 %i_addr.3210.0.i.i ; <i32*> [#uses=2] + %tmp160.i.i = load i32* %tmp159.i.i ; <i32> [#uses=1] + %tmp161.i.i = add i32 %tmp160.i.i, 1 ; <i32> [#uses=1] + store i32 %tmp161.i.i, i32* %tmp159.i.i + %tmp166.i.i = add i32 %i_addr.3210.0.i.i, 1 ; <i32> [#uses=2] + %tmp168.i.i = load i32* @numi ; <i32> [#uses=1] + icmp slt i32 %tmp166.i.i, %tmp168.i.i ; <i1>:0 [#uses=1] + br i1 %0, label %bb115.i.i.bb115.i.i_crit_edge, label %bb115.i.i.bb170.i.i_crit_edge.exitStub +} diff --git a/test/CodeGen/ARM/clz.ll b/test/CodeGen/ARM/clz.ll new file mode 100644 index 0000000..cdde95a --- /dev/null +++ b/test/CodeGen/ARM/clz.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5t | grep clz + +declare uint %llvm.ctlz.i32(uint) + +uint %test(uint %x) { + %tmp.1 = call uint %llvm.ctlz.i32( uint %x ) + ret uint %tmp.1 +} diff --git a/test/CodeGen/ARM/compare-call.ll b/test/CodeGen/ARM/compare-call.ll new file mode 100644 index 0000000..3fcded8 --- /dev/null +++ b/test/CodeGen/ARM/compare-call.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6,+vfp2 | \ +; RUN: grep fcmpes + +void %test3(float* %glob, int %X) { +entry: + %tmp = load float* %glob ; <float> [#uses=1] + %tmp2 = getelementptr float* %glob, int 2 ; <float*> [#uses=1] + %tmp3 = load float* %tmp2 ; <float> [#uses=1] + %tmp = setgt float %tmp, %tmp3 ; <bool> [#uses=1] + br bool %tmp, label %cond_true, label %UnifiedReturnBlock + +cond_true: ; preds = %entry + %tmp = tail call int (...)* %bar( ) ; <int> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare int %bar(...) diff --git a/test/CodeGen/ARM/constants.ll b/test/CodeGen/ARM/constants.ll new file mode 100644 index 0000000..7302617 --- /dev/null +++ b/test/CodeGen/ARM/constants.ll @@ -0,0 +1,46 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {mov r0, #0} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {mov r0, #255$} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {mov r0.*256} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {orr.*256} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {mov r0, .*-1073741761} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {mov r0, .*1008} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {cmp r0, #1, 16} | wc -l | grep 1 + +uint %f1() { + ret uint 0 +} + +uint %f2() { + ret uint 255 +} + +uint %f3() { + ret uint 256 +} + +uint %f4() { + ret uint 257 +} + +uint %f5() { + ret uint 3221225535 +} + +uint %f6() { + ret uint 1008 +} + +void %f7(uint %a) { + %b = setgt uint %a, 65536 + br bool %b, label %r, label %r + +r: + ret void +} diff --git a/test/CodeGen/ARM/ctors_dtors.ll b/test/CodeGen/ARM/ctors_dtors.ll new file mode 100644 index 0000000..cf58ca4 --- /dev/null +++ b/test/CodeGen/ARM/ctors_dtors.ll @@ -0,0 +1,25 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \ +; RUN: grep {\\.mod_init_func} +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \ +; RUN: grep {\\.mod_term_func} +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnu | \ +; RUN: grep {\\.section \\.ctors,"aw",.progbits} +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnu | \ +; RUN: grep {\\.section \\.dtors,"aw",.progbits} +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \ +; RUN: grep {\\.section \\.init_array,"aw",.init_array} +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \ +; RUN: grep {\\.section \\.fini_array,"aw",.fini_array} + +%llvm.global_ctors = appending global [1 x { int, void ()* }] [ { int, void ()* } { int 65535, void ()* %__mf_init } ] ; <[1 x { int, void ()* }]*> [#uses=0] +%llvm.global_dtors = appending global [1 x { int, void ()* }] [ { int, void ()* } { int 65535, void ()* %__mf_fini } ] ; <[1 x { int, void ()* }]*> [#uses=0] + +void %__mf_init() { +entry: + ret void +} + +void %__mf_fini() { +entry: + ret void +} diff --git a/test/CodeGen/ARM/dg.exp b/test/CodeGen/ARM/dg.exp new file mode 100644 index 0000000..ba4ade5 --- /dev/null +++ b/test/CodeGen/ARM/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target ARM] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] +} diff --git a/test/CodeGen/ARM/div.ll b/test/CodeGen/ARM/div.ll new file mode 100644 index 0000000..3f8a752 --- /dev/null +++ b/test/CodeGen/ARM/div.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm > %t +; RUN: grep __divsi3 %t +; RUN: grep __udivsi3 %t +; RUN: grep __modsi3 %t +; RUN: grep __umodsi3 %t + +int %f1(int %a, int %b) { +entry: + %tmp1 = div int %a, %b + ret int %tmp1 +} + +uint %f2(uint %a, uint %b) { +entry: + %tmp1 = div uint %a, %b + ret uint %tmp1 +} + +int %f3(int %a, int %b) { +entry: + %tmp1 = rem int %a, %b + ret int %tmp1 +} + +uint %f4(uint %a, uint %b) { +entry: + %tmp1 = rem uint %a, %b + ret uint %tmp1 +} diff --git a/test/CodeGen/ARM/dyn-stackalloc.ll b/test/CodeGen/ARM/dyn-stackalloc.ll new file mode 100644 index 0000000..602fd9b --- /dev/null +++ b/test/CodeGen/ARM/dyn-stackalloc.ll @@ -0,0 +1,60 @@ +; RUN: llvm-as < %s | llc -march=arm +; RUN: llvm-as < %s | llc -march=thumb | not grep {ldr sp} +; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin | \ +; RUN: not grep {sub.*r7} +; RUN: llvm-as < %s | llc -march=thumb | grep 4294967280 + + %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } + %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } + +define void @t1(%struct.state* %v) { + %tmp6 = load i32* null + %tmp8 = alloca float, i32 %tmp6 + store i32 1, i32* null + br i1 false, label %bb123.preheader, label %return + +bb123.preheader: + br i1 false, label %bb43, label %return + +bb43: + call fastcc void @f1( float* %tmp8, float* null, i32 0 ) + %tmp70 = load i32* null + %tmp85 = getelementptr float* %tmp8, i32 0 + call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 ) + ret void + +return: + ret void +} + +declare fastcc void @f1(float*, float*, i32) + +declare fastcc void @f2(float*, float*, float*, i32) + + %struct.comment = type { i8**, i32*, i32, i8* } +@str215 = external global [2 x i8] + +define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) { + %tmp1 = call i32 @strlen( i8* %tag ) + %tmp3 = call i32 @strlen( i8* %contents ) + %tmp4 = add i32 %tmp1, 2 + %tmp5 = add i32 %tmp4, %tmp3 + %tmp6 = alloca i8, i32 %tmp5 + %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag ) + %tmp6.len = call i32 @strlen( i8* %tmp6 ) + %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len + call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 ) + %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents ) + call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 ) + ret void +} + +declare i32 @strlen(i8*) + +declare i8* @strcat(i8*, i8*) + +declare fastcc void @comment_add(%struct.comment*, i8*) + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +declare i8* @strcpy(i8*, i8*) diff --git a/test/CodeGen/ARM/extloadi1.ll b/test/CodeGen/ARM/extloadi1.ll new file mode 100644 index 0000000..b4dcd7f --- /dev/null +++ b/test/CodeGen/ARM/extloadi1.ll @@ -0,0 +1,22 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm + +%handler_installed.6144.b = external global bool ; <bool*> [#uses=1] + + +void %__mf_sigusr1_respond() { +entry: + %tmp8.b = load bool* %handler_installed.6144.b ; <bool> [#uses=1] + br bool false, label %cond_true7, label %cond_next + +cond_next: ; preds = %entry + br bool %tmp8.b, label %bb, label %cond_next3 + +cond_next3: ; preds = %cond_next + ret void + +bb: ; preds = %cond_next + ret void + +cond_true7: ; preds = %entry + ret void +} diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll new file mode 100644 index 0000000..e24a5d8 --- /dev/null +++ b/test/CodeGen/ARM/fcopysign.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=arm | grep bic | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | \ +; RUN: grep fneg | wc -l | grep 2 + +define float @test1(float %x, double %y) { + %tmp = fpext float %x to double + %tmp2 = tail call double @copysign( double %tmp, double %y ) + %tmp3 = fptrunc double %tmp2 to float + ret float %tmp3 +} + +define double @test2(double %x, float %y) { + %tmp = fpext float %y to double + %tmp2 = tail call double @copysign( double %x, double %tmp ) + ret double %tmp2 +} + +declare double @copysign(double, double) diff --git a/test/CodeGen/ARM/fnmul.ll b/test/CodeGen/ARM/fnmul.ll new file mode 100644 index 0000000..87a30c9 --- /dev/null +++ b/test/CodeGen/ARM/fnmul.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fnmuld +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 -enable-sign-dependent-rounding-fp-math | grep fmul + + +define double @t1(double %a, double %b) { +entry: + %tmp2 = sub double -0.000000e+00, %a ; <double> [#uses=1] + %tmp4 = mul double %tmp2, %b ; <double> [#uses=1] + ret double %tmp4 +} + diff --git a/test/CodeGen/ARM/fp.ll b/test/CodeGen/ARM/fp.ll new file mode 100644 index 0000000..4de9a06 --- /dev/null +++ b/test/CodeGen/ARM/fp.ll @@ -0,0 +1,61 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 > %t +; RUN: grep fmsr %t | wc -l | grep 4 +; RUN: grep fsitos %t +; RUN: grep fmrs %t | wc -l | grep 2 +; RUN: grep fsitod %t +; RUN: grep fmrrd %t | wc -l | grep 5 +; RUN: grep fmdrr %t | wc -l | grep 2 +; RUN: grep fldd %t +; RUN: grep fuitod %t +; RUN: grep fuitos %t +; RUN: grep 1065353216 %t + +float %f(int %a) { +entry: + %tmp = cast int %a to float ; <float> [#uses=1] + ret float %tmp +} + +double %g(int %a) { +entry: + %tmp = cast int %a to double ; <double> [#uses=1] + ret double %tmp +} + +double %uint_to_double(uint %a) { +entry: + %tmp = cast uint %a to double + ret double %tmp +} + +float %uint_to_float(uint %a) { +entry: + %tmp = cast uint %a to float + ret float %tmp +} + + +double %h(double* %v) { +entry: + %tmp = load double* %v ; <double> [#uses=1] + ret double %tmp +} + +float %h2() { +entry: + ret float 1.000000e+00 +} + +double %f2(double %a) { + ret double %a +} + +void %f3() { +entry: + %tmp = call double %f5() ; <double> [#uses=1] + call void %f4(double %tmp ) + ret void +} + +declare void %f4(double) +declare double %f5() diff --git a/test/CodeGen/ARM/fparith.ll b/test/CodeGen/ARM/fparith.ll new file mode 100644 index 0000000..0e503a6 --- /dev/null +++ b/test/CodeGen/ARM/fparith.ll @@ -0,0 +1,86 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 > %t +; RUN: grep fadds %t +; RUN: grep faddd %t +; RUN: grep fmuls %t +; RUN: grep fmuld %t +; RUN: grep fnegs %t +; RUN: grep fnegd %t +; RUN: grep fdivs %t +; RUN: grep fdivd %t + + +float %f1(float %a, float %b) { +entry: + %tmp = add float %a, %b + ret float %tmp +} + +double %f2(double %a, double %b) { +entry: + %tmp = add double %a, %b + ret double %tmp +} + +float %f3(float %a, float %b) { +entry: + %tmp = mul float %a, %b + ret float %tmp +} + +double %f4(double %a, double %b) { +entry: + %tmp = mul double %a, %b + ret double %tmp +} + +float %f5(float %a, float %b) { +entry: + %tmp = sub float %a, %b + ret float %tmp +} + +double %f6(double %a, double %b) { +entry: + %tmp = sub double %a, %b + ret double %tmp +} + +float %f7(float %a) { +entry: + %tmp1 = sub float -0.000000e+00, %a + ret float %tmp1 +} + +double %f8(double %a) { +entry: + %tmp1 = sub double -0.000000e+00, %a + ret double %tmp1 +} + +float %f9(float %a, float %b) { +entry: + %tmp1 = div float %a, %b + ret float %tmp1 +} + +double %f10(double %a, double %b) { +entry: + %tmp1 = div double %a, %b + ret double %tmp1 +} + +float %f11(float %a) { +entry: + %tmp1 = call float %fabsf(float %a) + ret float %tmp1 +} + +declare float %fabsf(float) + +double %f12(double %a) { +entry: + %tmp1 = call double %fabs(double %a) + ret double %tmp1 +} + +declare double %fabs(double) diff --git a/test/CodeGen/ARM/fpcmp.ll b/test/CodeGen/ARM/fpcmp.ll new file mode 100644 index 0000000..adee88c --- /dev/null +++ b/test/CodeGen/ARM/fpcmp.ll @@ -0,0 +1,57 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 > %t +; RUN: grep movmi %t +; RUN: grep moveq %t +; RUN: grep movgt %t +; RUN: grep movge %t +; RUN: grep movne %t +; RUN: grep fcmped %t | wc -l | grep 1 +; RUN: grep fcmpes %t | wc -l | grep 6 + +int %f1(float %a) { +entry: + %tmp = setlt float %a, 1.000000e+00 ; <bool> [#uses=1] + %tmp = cast bool %tmp to int ; <int> [#uses=1] + ret int %tmp +} + +int %f2(float %a) { +entry: + %tmp = seteq float %a, 1.000000e+00 ; <bool> [#uses=1] + %tmp = cast bool %tmp to int ; <int> [#uses=1] + ret int %tmp +} + +int %f3(float %a) { +entry: + %tmp = setgt float %a, 1.000000e+00 ; <bool> [#uses=1] + %tmp = cast bool %tmp to int ; <int> [#uses=1] + ret int %tmp +} + +int %f4(float %a) { +entry: + %tmp = setge float %a, 1.000000e+00 ; <bool> [#uses=1] + %tmp = cast bool %tmp to int ; <int> [#uses=1] + ret int %tmp +} + +int %f5(float %a) { +entry: + %tmp = setle float %a, 1.000000e+00 ; <bool> [#uses=1] + %tmp = cast bool %tmp to int ; <int> [#uses=1] + ret int %tmp +} + +int %f6(float %a) { +entry: + %tmp = setne float %a, 1.000000e+00 ; <bool> [#uses=1] + %tmp = cast bool %tmp to int ; <int> [#uses=1] + ret int %tmp +} + +int %g1(double %a) { +entry: + %tmp = setlt double %a, 1.000000e+00 ; <bool> [#uses=1] + %tmp = cast bool %tmp to int ; <int> [#uses=1] + ret int %tmp +} diff --git a/test/CodeGen/ARM/fpcmp_ueq.ll b/test/CodeGen/ARM/fpcmp_ueq.ll new file mode 100644 index 0000000..3e749af --- /dev/null +++ b/test/CodeGen/ARM/fpcmp_ueq.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=arm | grep moveq +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep movvs + +define i32 @f7(float %a, float %b) { +entry: + %tmp = fcmp ueq float %a,%b + %retval = select i1 %tmp, i32 666, i32 42 + ret i32 %retval +} + diff --git a/test/CodeGen/ARM/fpconv.ll b/test/CodeGen/ARM/fpconv.ll new file mode 100644 index 0000000..06e8069 --- /dev/null +++ b/test/CodeGen/ARM/fpconv.ll @@ -0,0 +1,71 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 > %t +; RUN: grep fcvtsd %t +; RUN: grep fcvtds %t +; RUN: grep ftosizs %t +; RUN: grep ftouizs %t +; RUN: grep ftosizd %t +; RUN: grep ftouizd %t +; RUN: grep fsitos %t +; RUN: grep fsitod %t +; RUN: grep fuitos %t +; RUN: grep fuitod %t + +float %f1(double %x) { +entry: + %tmp1 = cast double %x to float + ret float %tmp1 +} + +double %f2(float %x) { +entry: + %tmp1 = cast float %x to double + ret double %tmp1 +} + +int %f3(float %x) { +entry: + %tmp = cast float %x to int + ret int %tmp +} + +uint %f4(float %x) { +entry: + %tmp = cast float %x to uint + ret uint %tmp +} + +int %f5(double %x) { +entry: + %tmp = cast double %x to int + ret int %tmp +} + +uint %f6(double %x) { +entry: + %tmp = cast double %x to uint + ret uint %tmp +} + +float %f7(int %a) { +entry: + %tmp = cast int %a to float + ret float %tmp +} + +double %f8(int %a) { +entry: + %tmp = cast int %a to double + ret double %tmp +} + +float %f9(uint %a) { +entry: + %tmp = cast uint %a to float + ret float %tmp +} + +double %f10(uint %a) { +entry: + %tmp = cast uint %a to double + ret double %tmp +} diff --git a/test/CodeGen/ARM/fpmem.ll b/test/CodeGen/ARM/fpmem.ll new file mode 100644 index 0000000..3ed9f2d --- /dev/null +++ b/test/CodeGen/ARM/fpmem.ll @@ -0,0 +1,22 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {mov r0, #0} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep {flds.*\\\[} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep {fsts.*\\\[} | wc -l | grep 1 + +float %f1(float %a) { + ret float 0.000000e+00 +} + +float %f2(float* %v, float %u) { + %tmp = load float* %v + %tmp1 = add float %tmp, %u + ret float %tmp1 +} + +void %f3(float %a, float %b, float* %v) { + %tmp = add float %a, %b + store float %tmp, float* %v + ret void +} diff --git a/test/CodeGen/ARM/fptoint.ll b/test/CodeGen/ARM/fptoint.ll new file mode 100644 index 0000000..b0db83c --- /dev/null +++ b/test/CodeGen/ARM/fptoint.ll @@ -0,0 +1,47 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fmrs | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | not grep fmrrd + +@i = weak global i32 0 ; <i32*> [#uses=2] +@u = weak global i32 0 ; <i32*> [#uses=2] + +define i32 @foo1(float *%x) { + %tmp1 = load float* %x + %tmp2 = bitcast float %tmp1 to i32 + ret i32 %tmp2 +} + +define i64 @foo2(double *%x) { + %tmp1 = load double* %x + %tmp2 = bitcast double %tmp1 to i64 + ret i64 %tmp2 +} + +define void @foo5(float %x) { + %tmp1 = fptosi float %x to i32 + store i32 %tmp1, i32* @i + ret void +} + +define void @foo6(float %x) { + %tmp1 = fptoui float %x to i32 + store i32 %tmp1, i32* @u + ret void +} + +define void @foo7(double %x) { + %tmp1 = fptosi double %x to i32 + store i32 %tmp1, i32* @i + ret void +} + +define void @foo8(double %x) { + %tmp1 = fptoui double %x to i32 + store i32 %tmp1, i32* @u + ret void +} + +define void @foo9(double %x) { + %tmp = fptoui double %x to i16 + store i16 %tmp, i16* null + ret void +} diff --git a/test/CodeGen/ARM/frame_thumb.ll b/test/CodeGen/ARM/frame_thumb.ll new file mode 100644 index 0000000..fe82db9 --- /dev/null +++ b/test/CodeGen/ARM/frame_thumb.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-apple-darwin \ +; RUN: -disable-fp-elim | not grep {r11} +; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-linux-gnueabi \ +; RUN: -disable-fp-elim | not grep {r11} + +define i32 @f() { +entry: + ret i32 10 +} diff --git a/test/CodeGen/ARM/hello.ll b/test/CodeGen/ARM/hello.ll new file mode 100644 index 0000000..d494800 --- /dev/null +++ b/test/CodeGen/ARM/hello.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=arm +; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep mov | wc -l | grep 1 +; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu --disable-fp-elim | \ +; RUN: grep mov | wc -l | grep 3 +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | wc -l | grep 2 + +@str = internal constant [12 x i8] c"Hello World\00" + +define i32 @main() { + %tmp = call i32 @puts( i8* getelementptr ([12 x i8]* @str, i32 0, i64 0) ) ; <i32> [#uses=0] + ret i32 0 +} + +declare i32 @puts(i8*) diff --git a/test/CodeGen/ARM/iabs.ll b/test/CodeGen/ARM/iabs.ll new file mode 100644 index 0000000..f10591f --- /dev/null +++ b/test/CodeGen/ARM/iabs.ll @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | llc -march=arm -stats |& \ +; RUN: grep {3 .*Number of machine instrs printed} +; RUN: llvm-as < %s | llc -march=thumb -stats |& \ +; RUN: grep {4 .*Number of machine instrs printed} + +;; Integer absolute value, should produce something as good as: ARM: +;; add r3, r0, r0, asr #31 +;; eor r0, r3, r0, asr #31 +;; bx lr +;; Thumb: +;; asr r2, r0, #31 +;; add r0, r0, r2 +;; eor r0, r2 +;; bx lr + +define i32 @test(i32 %a) { + %tmp1neg = sub i32 0, %a + %b = icmp sgt i32 %a, -1 + %abs = select i1 %b, i32 %a, i32 %tmp1neg + ret i32 %abs +} + diff --git a/test/CodeGen/ARM/ifcvt1.ll b/test/CodeGen/ARM/ifcvt1.ll new file mode 100644 index 0000000..b76b3e3 --- /dev/null +++ b/test/CodeGen/ARM/ifcvt1.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | wc -l | grep 1 + +define i32 @t1(i32 %a, i32 %b) { + %tmp2 = icmp eq i32 %a, 0 + br i1 %tmp2, label %cond_false, label %cond_true + +cond_true: + %tmp5 = add i32 %b, 1 + ret i32 %tmp5 + +cond_false: + %tmp7 = add i32 %b, -1 + ret i32 %tmp7 +} diff --git a/test/CodeGen/ARM/ifcvt2.ll b/test/CodeGen/ARM/ifcvt2.ll new file mode 100644 index 0000000..96400ea --- /dev/null +++ b/test/CodeGen/ARM/ifcvt2.ll @@ -0,0 +1,36 @@ +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxlt | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxgt | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxge | wc -l | grep 1 + +define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { + %tmp2 = icmp sgt i32 %c, 10 + %tmp5 = icmp slt i32 %d, 4 + %tmp8 = or i1 %tmp5, %tmp2 + %tmp13 = add i32 %b, %a + br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock + +cond_true: + %tmp15 = add i32 %tmp13, %c + %tmp1821 = sub i32 %tmp15, %d + ret i32 %tmp1821 + +UnifiedReturnBlock: + ret i32 %tmp13 +} + +define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) { + %tmp2 = icmp sgt i32 %c, 10 + %tmp5 = icmp slt i32 %d, 4 + %tmp8 = and i1 %tmp5, %tmp2 + %tmp13 = add i32 %b, %a + br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock + +cond_true: + %tmp15 = add i32 %tmp13, %c + %tmp1821 = sub i32 %tmp15, %d + ret i32 %tmp1821 + +UnifiedReturnBlock: + ret i32 %tmp13 +} diff --git a/test/CodeGen/ARM/ifcvt3.ll b/test/CodeGen/ARM/ifcvt3.ll new file mode 100644 index 0000000..0236386 --- /dev/null +++ b/test/CodeGen/ARM/ifcvt3.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep cmpne | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | wc -l | grep 2 + +define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { + switch i32 %c, label %cond_next [ + i32 1, label %cond_true + i32 7, label %cond_true + ] + +cond_true: + %tmp12 = add i32 %a, 1 + %tmp1518 = add i32 %tmp12, %b + ret i32 %tmp1518 + +cond_next: + %tmp15 = add i32 %b, %a + ret i32 %tmp15 +} diff --git a/test/CodeGen/ARM/ifcvt4.ll b/test/CodeGen/ARM/ifcvt4.ll new file mode 100644 index 0000000..1a5728e --- /dev/null +++ b/test/CodeGen/ARM/ifcvt4.ll @@ -0,0 +1,38 @@ +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep subgt | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep suble | wc -l | grep 1 +; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt. + +define i32 @t(i32 %a, i32 %b) { +entry: + %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1] + br i1 %tmp1434, label %bb17, label %bb.outer + +bb.outer: ; preds = %cond_false, %entry + %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5] + %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1] + br label %bb + +bb: ; preds = %cond_true, %bb.outer + %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2] + %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1] + %tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1] + %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6] + %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1] + br i1 %tmp3, label %cond_true, label %cond_false + +cond_true: ; preds = %bb + %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2] + %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1] + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] + br i1 %tmp1437, label %bb17, label %bb + +cond_false: ; preds = %bb + %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2] + %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1] + br i1 %tmp14, label %bb17, label %bb.outer + +bb17: ; preds = %cond_false, %cond_true, %entry + %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1] + ret i32 %a_addr.026.1 +} diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll new file mode 100644 index 0000000..4a3c137 --- /dev/null +++ b/test/CodeGen/ARM/ifcvt5.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep blge | wc -l | grep 1 + +@x = external global i32* ; <i32**> [#uses=1] + +define void @foo(i32 %a) { +entry: + %tmp = load i32** @x ; <i32*> [#uses=1] + store i32 %a, i32* %tmp + ret void +} + +define void @t1(i32 %a, i32 %b) { +entry: + %tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1] + br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock + +cond_true: ; preds = %entry + tail call void @foo( i32 %b ) + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} diff --git a/test/CodeGen/ARM/ifcvt6.ll b/test/CodeGen/ARM/ifcvt6.ll new file mode 100644 index 0000000..18aaf13 --- /dev/null +++ b/test/CodeGen/ARM/ifcvt6.ll @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion +; RUN: llvm-as < %s | \ +; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ +; RUN: grep cmpne | wc -l | grep 1 +; RUN: llvm-as < %s | \ +; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ +; RUN: grep ldmhi | wc -l | grep 1 + +define void @foo(i32 %X, i32 %Y) { +entry: + %tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1] + %tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1] + %tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1] + br i1 %tmp7, label %cond_true, label %UnifiedReturnBlock + +cond_true: ; preds = %entry + %tmp10 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare i32 @bar(...) diff --git a/test/CodeGen/ARM/ifcvt7.ll b/test/CodeGen/ARM/ifcvt7.ll new file mode 100644 index 0000000..4816cea --- /dev/null +++ b/test/CodeGen/ARM/ifcvt7.ll @@ -0,0 +1,39 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion +; RUN: llvm-as < %s | \ +; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ +; RUN: grep cmpeq | wc -l | grep 1 +; RUN: llvm-as < %s | \ +; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ +; RUN: grep moveq | wc -l | grep 1 +; RUN: llvm-as < %s | \ +; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ +; RUN: grep ldmeq | wc -l | grep 1 +; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1. + + %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } + +define fastcc i32 @CountTree(%struct.quad_struct* %tree) { +entry: + br label %tailrecurse + +tailrecurse: ; preds = %bb, %entry + %tmp6 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1] + %tmp9 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=2] + %tmp12 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1] + %tmp14 = icmp eq %struct.quad_struct* null, null ; <i1> [#uses=1] + %tmp17 = icmp eq %struct.quad_struct* %tmp6, null ; <i1> [#uses=1] + %tmp23 = icmp eq %struct.quad_struct* %tmp9, null ; <i1> [#uses=1] + %tmp29 = icmp eq %struct.quad_struct* %tmp12, null ; <i1> [#uses=1] + %bothcond = and i1 %tmp17, %tmp14 ; <i1> [#uses=1] + %bothcond1 = and i1 %bothcond, %tmp23 ; <i1> [#uses=1] + %bothcond2 = and i1 %bothcond1, %tmp29 ; <i1> [#uses=1] + br i1 %bothcond2, label %return, label %bb + +bb: ; preds = %tailrecurse + %tmp41 = tail call fastcc i32 @CountTree( %struct.quad_struct* %tmp9 ) ; <i32> [#uses=0] + br label %tailrecurse + +return: ; preds = %tailrecurse + ret i32 0 +} diff --git a/test/CodeGen/ARM/ifcvt8.ll b/test/CodeGen/ARM/ifcvt8.ll new file mode 100644 index 0000000..c401e68 --- /dev/null +++ b/test/CodeGen/ARM/ifcvt8.ll @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion +; RUN: llvm-as < %s | \ +; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ +; RUN: grep ldmne | wc -l | grep 1 + + %struct.SString = type { i8*, i32, i32 } + +declare void @abort() + +define fastcc void @t(%struct.SString* %word, i8 sext %c) { +entry: + %tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1] + br i1 %tmp1, label %cond_true, label %cond_false + +cond_true: ; preds = %entry + tail call void @abort( ) + unreachable + +cond_false: ; preds = %entry + ret void +} diff --git a/test/CodeGen/ARM/illegal-vector-bitcast.ll b/test/CodeGen/ARM/illegal-vector-bitcast.ll new file mode 100644 index 0000000..6785cfd --- /dev/null +++ b/test/CodeGen/ARM/illegal-vector-bitcast.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=arm + +define void @foo(<8 x float>* %f, <8 x float>* %g, <4 x i64>* %y) +{ + %h = load <8 x float>* %f + %i = mul <8 x float> %h, <float 1.1, float 3.3, float 4.4, float 5.4, float 0.5, float 0.6, float 0.7, float 0.8> + %m = bitcast <8 x float> %i to <4 x i64> + %z = load <4 x i64>* %y + %n = mul <4 x i64> %z, %m + %p = bitcast <4 x i64> %n to <8 x float> + store <8 x float> %p, <8 x float>* %g + ret void +} diff --git a/test/CodeGen/ARM/imm.ll b/test/CodeGen/ARM/imm.ll new file mode 100644 index 0000000..31db7a3 --- /dev/null +++ b/test/CodeGen/ARM/imm.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | not grep CPI + +int %test1(int %A) { + %B = add int %A, -268435441 ; 0xF000000F + ret int %B +} + +int %test2() { + ret int 65533 +} + +int %test3(int %A) { + %B = or int %A, 65533 + ret int %B +} + + diff --git a/test/CodeGen/ARM/inlineasm.ll b/test/CodeGen/ARM/inlineasm.ll new file mode 100644 index 0000000..2f7332a --- /dev/null +++ b/test/CodeGen/ARM/inlineasm.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 + +define i32 @test1(i32 %tmp54) { + %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; <i32> [#uses=1] + ret i32 %tmp56 +} + +define void @test2() { + %tmp1 = call i64 asm "ldmia $1!, {$0, ${0:H}}", "=r,=*r,1"( i32** null, i32* null ) ; <i64> [#uses=2] + %tmp2 = lshr i64 %tmp1, 32 ; <i64> [#uses=1] + %tmp3 = trunc i64 %tmp2 to i32 ; <i32> [#uses=1] + %tmp4 = call i32 asm "pkhbt $0, $1, $2, lsl #16", "=r,r,r"( i32 0, i32 %tmp3 ) ; <i32> [#uses=0] + ret void +} + +define void @test3() { + tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 ) + ret void +} diff --git a/test/CodeGen/ARM/inlineasm2.ll b/test/CodeGen/ARM/inlineasm2.ll new file mode 100644 index 0000000..69394eb --- /dev/null +++ b/test/CodeGen/ARM/inlineasm2.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 + +define double @__ieee754_sqrt(double %x) { + %tmp2 = tail call double asm "fsqrtd ${0:P}, ${1:P}", "=w,w"( double %x ) + ret double %tmp2 +} + +define float @__ieee754_sqrtf(float %x) { + %tmp2 = tail call float asm "fsqrts $0, $1", "=w,w"( float %x ) + ret float %tmp2 +} diff --git a/test/CodeGen/ARM/insn-sched1.ll b/test/CodeGen/ARM/insn-sched1.ll new file mode 100644 index 0000000..6dc4650 --- /dev/null +++ b/test/CodeGen/ARM/insn-sched1.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 |\ +; RUN: grep mov | wc -l | grep 3 + +int %test(int %x) { + %tmp = cast int %x to short + %tmp2 = tail call int %f( int 1, short %tmp ) + ret int %tmp2 +} + +declare int %f(int, short) diff --git a/test/CodeGen/ARM/ispositive.ll b/test/CodeGen/ARM/ispositive.ll new file mode 100644 index 0000000..8dcac30 --- /dev/null +++ b/test/CodeGen/ARM/ispositive.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31} +; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31} + +define i32 @test1(i32 %X) { +entry: + icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] + zext i1 %0 to i32 ; <i32>:1 [#uses=1] + ret i32 %1 +} + diff --git a/test/CodeGen/ARM/large-stack.ll b/test/CodeGen/ARM/large-stack.ll new file mode 100644 index 0000000..5f85ec0 --- /dev/null +++ b/test/CodeGen/ARM/large-stack.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=arm +; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | wc -l | grep 5 + +define void @test1() { + %tmp = alloca [ 64 x i32 ] , align 4 + ret void +} + +define void @test2() { + %tmp = alloca [ 4168 x i8 ] , align 4 + ret void +} + +define i32 @test3() { + %retval = alloca i32, align 4 + %tmp = alloca i32, align 4 + %a = alloca [805306369 x i8], align 16 + store i32 0, i32* %tmp + %tmp1 = load i32* %tmp + ret i32 %tmp1 +} diff --git a/test/CodeGen/ARM/ldm.ll b/test/CodeGen/ARM/ldm.ll new file mode 100644 index 0000000..b69e04d --- /dev/null +++ b/test/CodeGen/ARM/ldm.ll @@ -0,0 +1,34 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep ldmia | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep ldmib | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \ +; RUN: grep {ldmfd sp\!} | wc -l | grep 3 + +%X = external global [0 x int] + +int %t1() { + %tmp = load int* getelementptr ([0 x int]* %X, int 0, int 0) + %tmp3 = load int* getelementptr ([0 x int]* %X, int 0, int 1) + %tmp4 = tail call int %f1( int %tmp, int %tmp3 ) + ret int %tmp4 +} + +int %t2() { + %tmp = load int* getelementptr ([0 x int]* %X, int 0, int 2) + %tmp3 = load int* getelementptr ([0 x int]* %X, int 0, int 3) + %tmp5 = load int* getelementptr ([0 x int]* %X, int 0, int 4) + %tmp6 = tail call int %f2( int %tmp, int %tmp3, int %tmp5 ) + ret int %tmp6 +} + +int %t3() { + %tmp = load int* getelementptr ([0 x int]* %X, int 0, int 1) + %tmp3 = load int* getelementptr ([0 x int]* %X, int 0, int 2) + %tmp5 = load int* getelementptr ([0 x int]* %X, int 0, int 3) + %tmp6 = tail call int %f2( int %tmp, int %tmp3, int %tmp5 ) + ret int %tmp6 +} + +declare int %f1(int, int) +declare int %f2(int, int, int) diff --git a/test/CodeGen/ARM/ldr.ll b/test/CodeGen/ARM/ldr.ll new file mode 100644 index 0000000..3a9ab81 --- /dev/null +++ b/test/CodeGen/ARM/ldr.ll @@ -0,0 +1,22 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {ldr r0} | wc -l | grep 3 + +int %f1(int* %v) { +entry: + %tmp = load int* %v ; <int> [#uses=1] + ret int %tmp +} + +int %f2(int* %v) { +entry: + %tmp2 = getelementptr int* %v, int 1023 ; <int*> [#uses=1] + %tmp = load int* %tmp2 ; <int> [#uses=1] + ret int %tmp +} + +int %f3(int* %v) { +entry: + %tmp2 = getelementptr int* %v, int 1024 ; <int*> [#uses=1] + %tmp = load int* %tmp2 ; <int> [#uses=1] + ret int %tmp +} diff --git a/test/CodeGen/ARM/ldr_ext.ll b/test/CodeGen/ARM/ldr_ext.ll new file mode 100644 index 0000000..2b50b30 --- /dev/null +++ b/test/CodeGen/ARM/ldr_ext.ll @@ -0,0 +1,32 @@ +; RUN: llvm-as < %s | llc -march=arm | grep ldrb | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrh | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrsb | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrsh | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | wc -l | grep 1 + +define i32 @test1(i8* %v.pntr.s0.u1) { + %tmp.u = load i8* %v.pntr.s0.u1 + %tmp1.s = zext i8 %tmp.u to i32 + ret i32 %tmp1.s +} + +define i32 @test2(i16* %v.pntr.s0.u1) { + %tmp.u = load i16* %v.pntr.s0.u1 + %tmp1.s = zext i16 %tmp.u to i32 + ret i32 %tmp1.s +} + +define i32 @test3(i8* %v.pntr.s1.u0) { + %tmp.s = load i8* %v.pntr.s1.u0 + %tmp1.s = sext i8 %tmp.s to i32 + ret i32 %tmp1.s +} + +define i32 @test4() { + %tmp.s = load i16* null + %tmp1.s = sext i16 %tmp.s to i32 + ret i32 %tmp1.s +} diff --git a/test/CodeGen/ARM/ldr_frame.ll b/test/CodeGen/ARM/ldr_frame.ll new file mode 100644 index 0000000..1fd6ed3 --- /dev/null +++ b/test/CodeGen/ARM/ldr_frame.ll @@ -0,0 +1,32 @@ +; RUN: llvm-as < %s | llc -march=arm | not grep mov +; RUN: llvm-as < %s | llc -march=thumb | grep cpy | wc -l | grep 2 + +define i32 @f1() { + %buf = alloca [32 x i32], align 4 + %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0 + %tmp1 = load i32* %tmp + ret i32 %tmp1 +} + +define i32 @f2() { + %buf = alloca [32 x i8], align 4 + %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0 + %tmp1 = load i8* %tmp + %tmp2 = zext i8 %tmp1 to i32 + ret i32 %tmp2 +} + +define i32 @f3() { + %buf = alloca [32 x i32], align 4 + %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32 + %tmp1 = load i32* %tmp + ret i32 %tmp1 +} + +define i32 @f4() { + %buf = alloca [32 x i8], align 4 + %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2 + %tmp1 = load i8* %tmp + %tmp2 = zext i8 %tmp1 to i32 + ret i32 %tmp2 +} diff --git a/test/CodeGen/ARM/ldr_post.ll b/test/CodeGen/ARM/ldr_post.ll new file mode 100644 index 0000000..78b3135 --- /dev/null +++ b/test/CodeGen/ARM/ldr_post.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {ldr.*\\\[.*\],} | wc -l | grep 1 + +int %test(int %a, int %b, int %c) { + %tmp1 = mul int %a, %b + %tmp2 = cast int %tmp1 to int* + %tmp3 = load int* %tmp2 + %tmp4 = sub int %tmp1, %c + %tmp5 = mul int %tmp4, %tmp3 + ret int %tmp5 +} diff --git a/test/CodeGen/ARM/ldr_pre.ll b/test/CodeGen/ARM/ldr_pre.ll new file mode 100644 index 0000000..e9af1c9 --- /dev/null +++ b/test/CodeGen/ARM/ldr_pre.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {ldr.*\\!} | wc -l | grep 2 + +int *%test1(int *%X, int *%dest) { + %Y = getelementptr int* %X, int 4 + %A = load int* %Y + store int %A, int* %dest + ret int* %Y +} + +int %test2(int %a, int %b, int %c) { + %tmp1 = sub int %a, %b + %tmp2 = cast int %tmp1 to int* + %tmp3 = load int* %tmp2 + %tmp4 = sub int %tmp1, %c + %tmp5 = add int %tmp4, %tmp3 + ret int %tmp5 +} diff --git a/test/CodeGen/ARM/load-global.ll b/test/CodeGen/ARM/load-global.ll new file mode 100644 index 0000000..fe9bf82 --- /dev/null +++ b/test/CodeGen/ARM/load-global.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=arm-apple-darwin -relocation-model=static | \ +; RUN: not grep {L_G\$non_lazy_ptr} +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=arm-apple-darwin -relocation-model=dynamic-no-pic | \ +; RUN: grep {L_G\$non_lazy_ptr} | wc -l | grep 2 +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=arm-apple-darwin -relocation-model=pic | \ +; RUN: grep {ldr.*pc} | wc -l | grep 1 +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=arm-linux-gnueabi -relocation-model=pic | \ +; RUN: grep {GOT} | wc -l | grep 1 + +@G = external global i32 + +define i32 @test1() { + %tmp = load i32* @G + ret i32 %tmp +} diff --git a/test/CodeGen/ARM/load.ll b/test/CodeGen/ARM/load.ll new file mode 100644 index 0000000..f3d6cf6 --- /dev/null +++ b/test/CodeGen/ARM/load.ll @@ -0,0 +1,33 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm > %t +; RUN: grep ldrsb %t +; RUN: grep ldrb %t +; RUN: grep ldrsh %t +; RUN: grep ldrh %t + +int %f1(sbyte* %p) { +entry: + %tmp = load sbyte* %p ; <sbyte> [#uses=1] + %tmp = cast sbyte %tmp to int ; <int> [#uses=1] + ret int %tmp +} + +int %f2(ubyte* %p) { +entry: + %tmp = load ubyte* %p ; <sbyte> [#uses=1] + %tmp = cast ubyte %tmp to int ; <int> [#uses=1] + ret int %tmp +} + +int %f3(short* %p) { +entry: + %tmp = load short* %p ; <sbyte> [#uses=1] + %tmp = cast short %tmp to int ; <int> [#uses=1] + ret int %tmp +} + +int %f4(ushort* %p) { +entry: + %tmp = load ushort* %p ; <sbyte> [#uses=1] + %tmp = cast ushort %tmp to int ; <int> [#uses=1] + ret int %tmp +} diff --git a/test/CodeGen/ARM/long-setcc.ll b/test/CodeGen/ARM/long-setcc.ll new file mode 100644 index 0000000..9111ab3 --- /dev/null +++ b/test/CodeGen/ARM/long-setcc.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=arm | grep cmp | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep cmp | wc -l | grep 1 + + +define i1 @t1(i64 %x) { + %B = icmp slt i64 %x, 0 + ret i1 %B +} + +define i1 @t2(i64 %x) { + %tmp = icmp ult i64 %x, 4294967296 + ret i1 %tmp +} + +define i1 @t3(i32 %x) { + %tmp = icmp ugt i32 %x, -1 + ret i1 %tmp +} diff --git a/test/CodeGen/ARM/long.ll b/test/CodeGen/ARM/long.ll new file mode 100644 index 0000000..54da192 --- /dev/null +++ b/test/CodeGen/ARM/long.ll @@ -0,0 +1,86 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep -- {-2147483648} | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep adds | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep adc | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep {subs } | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep sbc | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep smull | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep umull | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \ +; RUN: grep mvn | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \ +; RUN: grep adc | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \ +; RUN: grep sbc | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | grep __muldi3 +; END. + +long %f1() { +entry: + ret long 0 +} + +long %f2() { +entry: + ret long 1 +} + +long %f3() { +entry: + ret long 2147483647 +} + +long %f4() { +entry: + ret long 2147483648 +} + +long %f5() { +entry: + ret long 9223372036854775807 +} + +ulong %f6(ulong %x, ulong %y) { +entry: + %tmp1 = add ulong %y, 1 + ret ulong %tmp1 +} + +void %f7() { +entry: + %tmp = call long %f8() + ret void +} +declare long %f8() + +long %f9(long %a, long %b) { +entry: + %tmp = sub long %a, %b + ret long %tmp +} + +long %f(int %a, int %b) { +entry: + %tmp = cast int %a to long + %tmp1 = cast int %b to long + %tmp2 = mul long %tmp1, %tmp + ret long %tmp2 +} + +ulong %g(uint %a, uint %b) { +entry: + %tmp = cast uint %a to ulong + %tmp1 = cast uint %b to ulong + %tmp2 = mul ulong %tmp1, %tmp + ret ulong %tmp2 +} + +ulong %f10() { +entry: + %a = alloca ulong, align 8 + %retval = load ulong* %a + ret ulong %retval +} diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll new file mode 100644 index 0000000..b0a3ee8 --- /dev/null +++ b/test/CodeGen/ARM/long_shift.ll @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | llc -march=thumb +; RUN: llvm-as < %s | llc -march=arm > %t +; RUN: grep rrx %t | wc -l | grep 1 +; RUN: grep __ashldi3 %t +; RUN: grep __ashrdi3 %t +; RUN: grep __lshrdi3 %t + +define i64 @f0(i64 %A, i64 %B) { + %tmp = bitcast i64 %A to i64 + %tmp2 = lshr i64 %B, 1 + %tmp3 = sub i64 %tmp, %tmp2 + ret i64 %tmp3 +} + +define i32 @f1(i64 %x, i64 %y) { + %a = shl i64 %x, %y + %b = trunc i64 %a to i32 + ret i32 %b +} + +define i32 @f2(i64 %x, i64 %y) { + %a = ashr i64 %x, %y + %b = trunc i64 %a to i32 + ret i32 %b +} + +define i32 @f3(i64 %x, i64 %y) { + %a = lshr i64 %x, %y + %b = trunc i64 %a to i32 + ret i32 %b +} diff --git a/test/CodeGen/ARM/lsr-code-insertion.ll b/test/CodeGen/ARM/lsr-code-insertion.ll new file mode 100644 index 0000000..04b856f --- /dev/null +++ b/test/CodeGen/ARM/lsr-code-insertion.ll @@ -0,0 +1,60 @@ +; RUN: llvm-as < %s | llc -stats |& grep {40.*Number of machine instrs printed} +; This test really wants to check that the resultant "cond_true" block only +; has a single store in it, and that cond_true55 only has code to materialize +; the constant and do a store. We do *not* want something like this: +; +;LBB1_3: @cond_true +; add r8, r0, r6 +; str r10, [r8, #+4] +; + +target triple = "arm-apple-darwin8" + +define void @foo(i32* %mc, i32* %mpp, i32* %ip, i32* %dpp, i32* %tpmm, i32 %M, i32* %tpim, i32* %tpdm, i32* %bp, i32* %ms, i32 %xmb) { +entry: + %tmp6584 = icmp slt i32 %M, 1 ; <i1> [#uses=1] + br i1 %tmp6584, label %return, label %bb + +bb: ; preds = %cond_next59, %entry + %indvar = phi i32 [ 0, %entry ], [ %k.069.0, %cond_next59 ] ; <i32> [#uses=6] + %k.069.0 = add i32 %indvar, 1 ; <i32> [#uses=3] + %tmp3 = getelementptr i32* %mpp, i32 %indvar ; <i32*> [#uses=1] + %tmp4 = load i32* %tmp3 ; <i32> [#uses=1] + %tmp8 = getelementptr i32* %tpmm, i32 %indvar ; <i32*> [#uses=1] + %tmp9 = load i32* %tmp8 ; <i32> [#uses=1] + %tmp10 = add i32 %tmp9, %tmp4 ; <i32> [#uses=2] + %tmp13 = getelementptr i32* %mc, i32 %k.069.0 ; <i32*> [#uses=5] + store i32 %tmp10, i32* %tmp13 + %tmp17 = getelementptr i32* %ip, i32 %indvar ; <i32*> [#uses=1] + %tmp18 = load i32* %tmp17 ; <i32> [#uses=1] + %tmp22 = getelementptr i32* %tpim, i32 %indvar ; <i32*> [#uses=1] + %tmp23 = load i32* %tmp22 ; <i32> [#uses=1] + %tmp24 = add i32 %tmp23, %tmp18 ; <i32> [#uses=2] + %tmp30 = icmp sgt i32 %tmp24, %tmp10 ; <i1> [#uses=1] + br i1 %tmp30, label %cond_true, label %cond_next + +cond_true: ; preds = %bb + store i32 %tmp24, i32* %tmp13 + br label %cond_next + +cond_next: ; preds = %cond_true, %bb + %tmp39 = load i32* %tmp13 ; <i32> [#uses=1] + %tmp42 = getelementptr i32* %ms, i32 %k.069.0 ; <i32*> [#uses=1] + %tmp43 = load i32* %tmp42 ; <i32> [#uses=1] + %tmp44 = add i32 %tmp43, %tmp39 ; <i32> [#uses=2] + store i32 %tmp44, i32* %tmp13 + %tmp52 = icmp slt i32 %tmp44, -987654321 ; <i1> [#uses=1] + br i1 %tmp52, label %cond_true55, label %cond_next59 + +cond_true55: ; preds = %cond_next + store i32 -987654321, i32* %tmp13 + br label %cond_next59 + +cond_next59: ; preds = %cond_true55, %cond_next + %tmp61 = add i32 %indvar, 2 ; <i32> [#uses=1] + %tmp65 = icmp sgt i32 %tmp61, %M ; <i1> [#uses=1] + br i1 %tmp65, label %return, label %bb + +return: ; preds = %cond_next59, %entry + ret void +} diff --git a/test/CodeGen/ARM/lsr-scale-addr-mode.ll b/test/CodeGen/ARM/lsr-scale-addr-mode.ll new file mode 100644 index 0000000..230cf3e --- /dev/null +++ b/test/CodeGen/ARM/lsr-scale-addr-mode.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=arm | grep -F {str r2, \[r0, +r3, lsl #2\]} +; Should use scaled addressing mode. + +define void @sintzero(i32* %a) { +entry: + store i32 0, i32* %a + br label %cond_next + +cond_next: ; preds = %cond_next, %entry + %indvar = phi i32 [ 0, %entry ], [ %tmp25, %cond_next ] ; <i32> [#uses=1] + %tmp25 = add i32 %indvar, 1 ; <i32> [#uses=3] + %tmp36 = getelementptr i32* %a, i32 %tmp25 ; <i32*> [#uses=1] + store i32 0, i32* %tmp36 + icmp eq i32 %tmp25, -1 ; <i1>:0 [#uses=1] + br i1 %0, label %return, label %cond_next + +return: ; preds = %cond_next + ret void +} diff --git a/test/CodeGen/ARM/mem.ll b/test/CodeGen/ARM/mem.ll new file mode 100644 index 0000000..d598d47 --- /dev/null +++ b/test/CodeGen/ARM/mem.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep strb +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep strh + +void %f1() { +entry: + store ubyte 0, ubyte* null + ret void +} + +void %f2() { +entry: + store short 0, short* null + ret void +} diff --git a/test/CodeGen/ARM/memfunc.ll b/test/CodeGen/ARM/memfunc.ll new file mode 100644 index 0000000..1b41010 --- /dev/null +++ b/test/CodeGen/ARM/memfunc.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm + +void %f() { +entry: + call void %llvm.memmove.i32( sbyte* null, sbyte* null, uint 64, uint 0 ) + call void %llvm.memcpy.i32( sbyte* null, sbyte* null, uint 64, uint 0 ) + call void %llvm.memset.i32( sbyte* null, ubyte 64, uint 0, uint 0 ) + unreachable +} + +declare void %llvm.memmove.i32(sbyte*, sbyte*, uint, uint) +declare void %llvm.memcpy.i32(sbyte*, sbyte*, uint, uint) +declare void %llvm.memset.i32(sbyte*, ubyte, uint, uint) diff --git a/test/CodeGen/ARM/mul.ll b/test/CodeGen/ARM/mul.ll new file mode 100644 index 0000000..7a2c43b --- /dev/null +++ b/test/CodeGen/ARM/mul.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=arm | grep mul | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=arm | grep lsl | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=thumb | grep mul | wc -l | grep 3 +; RUN: llvm-as < %s | llc -march=thumb | grep lsl | wc -l | grep 1 + +define i32 @f1(i32 %u) { + %tmp = mul i32 %u, %u + ret i32 %tmp +} + +define i32 @f2(i32 %u, i32 %v) { + %tmp = mul i32 %u, %v + ret i32 %tmp +} + +define i32 @f3(i32 %u) { + %tmp = mul i32 %u, 5 + ret i32 %tmp +} + +define i32 @f4(i32 %u) { + %tmp = mul i32 %u, 4 + ret i32 %tmp +} diff --git a/test/CodeGen/ARM/mulhi.ll b/test/CodeGen/ARM/mulhi.ll new file mode 100644 index 0000000..9367258 --- /dev/null +++ b/test/CodeGen/ARM/mulhi.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \ +; RUN: grep smmul | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep umull | wc -l | grep 1 + +int %smulhi(int %x, int %y) { + %tmp = cast int %x to ulong ; <ulong> [#uses=1] + %tmp1 = cast int %y to ulong ; <ulong> [#uses=1] + %tmp2 = mul ulong %tmp1, %tmp ; <ulong> [#uses=1] + %tmp3 = shr ulong %tmp2, ubyte 32 ; <ulong> [#uses=1] + %tmp3 = cast ulong %tmp3 to int ; <int> [#uses=1] + ret int %tmp3 +} + +int %umulhi(uint %x, uint %y) { + %tmp = cast uint %x to ulong ; <ulong> [#uses=1] + %tmp1 = cast uint %y to ulong ; <ulong> [#uses=1] + %tmp2 = mul ulong %tmp1, %tmp ; <ulong> [#uses=1] + %tmp3 = shr ulong %tmp2, ubyte 32 ; <ulong> [#uses=1] + %tmp3 = cast ulong %tmp3 to int ; <int> [#uses=1] + ret int %tmp3 +} + diff --git a/test/CodeGen/ARM/mvn.ll b/test/CodeGen/ARM/mvn.ll new file mode 100644 index 0000000..3f4a6f7 --- /dev/null +++ b/test/CodeGen/ARM/mvn.ll @@ -0,0 +1,72 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 8 +; END. + +int %f1() { +entry: + ret int -1 +} + +int %f2(int %a) { +entry: + %tmpnot = xor int %a, -1 ; <int> [#uses=1] + ret int %tmpnot +} + +int %f3(int %a) { +entry: + %tmp1 = shl int %a, ubyte 2 ; <int> [#uses=1] + %tmp1not = xor int %tmp1, -1 ; <int> [#uses=1] + ret int %tmp1not +} + +int %f4(int %a, ubyte %b) { +entry: + %tmp3 = shl int %a, ubyte %b ; <int> [#uses=1] + %tmp3not = xor int %tmp3, -1 ; <int> [#uses=1] + ret int %tmp3not +} + +uint %f5(uint %a) { +entry: + %tmp1 = lshr uint %a, ubyte 2 ; <uint> [#uses=1] + %tmp1not = xor uint %tmp1, 4294967295 ; <uint> [#uses=1] + ret uint %tmp1not +} + +uint %f6(uint %a, ubyte %b) { +entry: + %tmp2 = lshr uint %a, ubyte %b ; <uint> [#uses=1] + %tmp2not = xor uint %tmp2, 4294967295 ; <uint> [#uses=1] + ret uint %tmp2not +} + +int %f7(int %a) { +entry: + %tmp1 = ashr int %a, ubyte 2 ; <int> [#uses=1] + %tmp1not = xor int %tmp1, -1 ; <int> [#uses=1] + ret int %tmp1not +} + +int %f8(int %a, ubyte %b) { +entry: + %tmp3 = ashr int %a, ubyte %b ; <int> [#uses=1] + %tmp3not = xor int %tmp3, -1 ; <int> [#uses=1] + ret int %tmp3not +} + +int %f9() { +entry: + %tmp4845 = add int 0, 0 + br label %cond_true4848 + +cond_true4848: ; preds = %bb4835 + %tmp4851 = sub int -3, 0 ; <int> [#uses=1] + %abc = add int %tmp4851, %tmp4845 + ret int %abc +} + +bool %f10(int %a) { +entry: + %tmp102 = seteq int -2, %a ; <bool> [#uses=1] + ret bool %tmp102 +} diff --git a/test/CodeGen/ARM/pack.ll b/test/CodeGen/ARM/pack.ll new file mode 100644 index 0000000..8cd392b --- /dev/null +++ b/test/CodeGen/ARM/pack.ll @@ -0,0 +1,80 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \ +; RUN: grep pkhbt | wc -l | grep 5 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \ +; RUN: grep pkhtb | wc -l | grep 4 +; END. + +implementation ; Functions: + +int %test1(int %X, int %Y) { + %tmp1 = and int %X, 65535 ; <int> [#uses=1] + %tmp4 = shl int %Y, ubyte 16 ; <int> [#uses=1] + %tmp5 = or int %tmp4, %tmp1 ; <int> [#uses=1] + ret int %tmp5 +} + +int %test1a(int %X, int %Y) { + %tmp19 = and int %X, 65535 ; <int> [#uses=1] + %tmp37 = shl int %Y, ubyte 16 ; <int> [#uses=1] + %tmp5 = or int %tmp37, %tmp19 ; <int> [#uses=1] + ret int %tmp5 +} + +int %test2(int %X, int %Y) { + %tmp1 = and int %X, 65535 ; <int> [#uses=1] + %tmp3 = shl int %Y, ubyte 12 ; <int> [#uses=1] + %tmp4 = and int %tmp3, -65536 ; <int> [#uses=1] + %tmp57 = or int %tmp4, %tmp1 ; <int> [#uses=1] + ret int %tmp57 +} + +int %test3(int %X, int %Y) { + %tmp19 = and int %X, 65535 ; <int> [#uses=1] + %tmp37 = shl int %Y, ubyte 18 ; <int> [#uses=1] + %tmp5 = or int %tmp37, %tmp19 ; <int> [#uses=1] + ret int %tmp5 +} + +int %test4(int %X, int %Y) { + %tmp1 = and int %X, 65535 ; <int> [#uses=1] + %tmp3 = and int %Y, -65536 ; <int> [#uses=1] + %tmp46 = or int %tmp3, %tmp1 ; <int> [#uses=1] + ret int %tmp46 +} + +int %test5(int %X, int %Y) { + %tmp17 = and int %X, -65536 ; <int> [#uses=1] + %tmp2 = cast int %Y to uint ; <uint> [#uses=1] + %tmp4 = shr uint %tmp2, ubyte 16 ; <uint> [#uses=1] + %tmp4 = cast uint %tmp4 to int ; <int> [#uses=1] + %tmp5 = or int %tmp4, %tmp17 ; <int> [#uses=1] + ret int %tmp5 +} + +int %test5a(int %X, int %Y) { + %tmp110 = and int %X, -65536 ; <int> [#uses=1] + %Y = cast int %Y to uint ; <uint> [#uses=1] + %tmp37 = shr uint %Y, ubyte 16 ; <uint> [#uses=1] + %tmp39 = cast uint %tmp37 to int ; <int> [#uses=1] + %tmp5 = or int %tmp39, %tmp110 ; <int> [#uses=1] + ret int %tmp5 +} + +int %test6(int %X, int %Y) { + %tmp1 = and int %X, -65536 ; <int> [#uses=1] + %Y = cast int %Y to uint ; <uint> [#uses=1] + %tmp37 = shr uint %Y, ubyte 12 ; <uint> [#uses=1] + %tmp38 = cast uint %tmp37 to int ; <int> [#uses=1] + %tmp4 = and int %tmp38, 65535 ; <int> [#uses=1] + %tmp59 = or int %tmp4, %tmp1 ; <int> [#uses=1] + ret int %tmp59 +} + +int %test7(int %X, int %Y) { + %tmp1 = and int %X, -65536 ; <int> [#uses=1] + %tmp3 = shr int %Y, ubyte 18 ; <int> [#uses=1] + %tmp4 = and int %tmp3, 65535 ; <int> [#uses=1] + %tmp57 = or int %tmp4, %tmp1 ; <int> [#uses=1] + ret int %tmp57 +} + diff --git a/test/CodeGen/ARM/ret0.ll b/test/CodeGen/ARM/ret0.ll new file mode 100644 index 0000000..176b2e0 --- /dev/null +++ b/test/CodeGen/ARM/ret0.ll @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +int %test() { + ret int 0 +} diff --git a/test/CodeGen/ARM/ret_arg1.ll b/test/CodeGen/ARM/ret_arg1.ll new file mode 100644 index 0000000..d490cb3 --- /dev/null +++ b/test/CodeGen/ARM/ret_arg1.ll @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +int %test(int %a1) { + ret int %a1 +} diff --git a/test/CodeGen/ARM/ret_arg2.ll b/test/CodeGen/ARM/ret_arg2.ll new file mode 100644 index 0000000..eb155da --- /dev/null +++ b/test/CodeGen/ARM/ret_arg2.ll @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +int %test(int %a1, int %a2) { + ret int %a2 +} diff --git a/test/CodeGen/ARM/ret_arg3.ll b/test/CodeGen/ARM/ret_arg3.ll new file mode 100644 index 0000000..41fc930 --- /dev/null +++ b/test/CodeGen/ARM/ret_arg3.ll @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +int %test(int %a1, int %a2, int %a3) { + ret int %a3 +} diff --git a/test/CodeGen/ARM/ret_arg4.ll b/test/CodeGen/ARM/ret_arg4.ll new file mode 100644 index 0000000..e04f296 --- /dev/null +++ b/test/CodeGen/ARM/ret_arg4.ll @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +int %test(int %a1, int %a2, int %a3, int %a4) { + ret int %a4 +} diff --git a/test/CodeGen/ARM/ret_arg5.ll b/test/CodeGen/ARM/ret_arg5.ll new file mode 100644 index 0000000..a49929b --- /dev/null +++ b/test/CodeGen/ARM/ret_arg5.ll @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +int %test(int %a1, int %a2, int %a3, int %a4, int %a5) { + ret int %a5 +} diff --git a/test/CodeGen/ARM/ret_void.ll b/test/CodeGen/ARM/ret_void.ll new file mode 100644 index 0000000..5cd82e3 --- /dev/null +++ b/test/CodeGen/ARM/ret_void.ll @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +void %test() { + ret void +} diff --git a/test/CodeGen/ARM/rev.ll b/test/CodeGen/ARM/rev.ll new file mode 100644 index 0000000..0072dae --- /dev/null +++ b/test/CodeGen/ARM/rev.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | grep rev16 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | grep revsh + +int %test1(uint %X) { + %tmp1 = shr uint %X, ubyte 8 ; <uint> [#uses=1] + %tmp1 = cast uint %tmp1 to int ; <int> [#uses=2] + %X15 = cast uint %X to int ; <int> [#uses=1] + %tmp4 = shl int %X15, ubyte 8 ; <int> [#uses=2] + %tmp2 = and int %tmp1, 16711680 ; <int> [#uses=1] + %tmp5 = and int %tmp4, -16777216 ; <int> [#uses=1] + %tmp9 = and int %tmp1, 255 ; <int> [#uses=1] + %tmp13 = and int %tmp4, 65280 ; <int> [#uses=1] + %tmp6 = or int %tmp5, %tmp2 ; <int> [#uses=1] + %tmp10 = or int %tmp6, %tmp13 ; <int> [#uses=1] + %tmp14 = or int %tmp10, %tmp9 ; <int> [#uses=1] + ret int %tmp14 +} + +int %test2(uint %X) { ; revsh + %tmp1 = shr uint %X, ubyte 8 ; <uint> [#uses=1] + %tmp1 = cast uint %tmp1 to short ; <short> [#uses=1] + %tmp3 = cast uint %X to short ; <short> [#uses=1] + %tmp2 = and short %tmp1, 255 ; <short> [#uses=1] + %tmp4 = shl short %tmp3, ubyte 8 ; <short> [#uses=1] + %tmp5 = or short %tmp2, %tmp4 ; <short> [#uses=1] + %tmp5 = cast short %tmp5 to int ; <int> [#uses=1] + ret int %tmp5 +} + diff --git a/test/CodeGen/ARM/section.ll b/test/CodeGen/ARM/section.ll new file mode 100644 index 0000000..fcb86c5 --- /dev/null +++ b/test/CodeGen/ARM/section.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | \ +; RUN: grep {__DTOR_END__:} +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | \ +; RUN: grep {.section .dtors,"aw",.progbits} + +%__DTOR_END__ = internal global [1 x int] zeroinitializer, section ".dtors" diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll new file mode 100644 index 0000000..7758a8d --- /dev/null +++ b/test/CodeGen/ARM/select.ll @@ -0,0 +1,63 @@ +; RUN: llvm-as < %s | llc -march=arm | grep moveq | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep movgt | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep movlt | wc -l | grep 3 +; RUN: llvm-as < %s | llc -march=arm | grep movle | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep movls | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep movhi | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep fcpydmi | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep beq | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bgt | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep blt | wc -l | grep 3 +; RUN: llvm-as < %s | llc -march=thumb | grep ble | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bls | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bhi | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep __ltdf2 + +define i32 @f1(i32 %a.s) { +entry: + %tmp = icmp eq i32 %a.s, 4 + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f2(i32 %a.s) { +entry: + %tmp = icmp sgt i32 %a.s, 4 + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f3(i32 %a.s, i32 %b.s) { +entry: + %tmp = icmp slt i32 %a.s, %b.s + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f4(i32 %a.s, i32 %b.s) { +entry: + %tmp = icmp sle i32 %a.s, %b.s + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f5(i32 %a.u, i32 %b.u) { +entry: + %tmp = icmp ule i32 %a.u, %b.u + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f6(i32 %a.u, i32 %b.u) { +entry: + %tmp = icmp ugt i32 %a.u, %b.u + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define double @f7(double %a, double %b) { + %tmp = fcmp olt double %a, 1.234e+00 + %tmp1 = select i1 %tmp, double -1.000e+00, double %b + ret double %tmp1 +} diff --git a/test/CodeGen/ARM/select_xform.ll b/test/CodeGen/ARM/select_xform.ll new file mode 100644 index 0000000..36071be --- /dev/null +++ b/test/CodeGen/ARM/select_xform.ll @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -march=arm +; RUN: llvm-as < %s | llc -march=arm | grep mov | wc -l | grep 2 + +define i32 @t1(i32 %a, i32 %b, i32 %c) { + %tmp1 = icmp sgt i32 %c, 10 + %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 + %tmp3 = add i32 %tmp2, %b + ret i32 %tmp3 +} + +define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) { + %tmp1 = icmp sgt i32 %c, 10 + %tmp2 = select i1 %tmp1, i32 0, i32 10 + %tmp3 = sub i32 %b, %tmp2 + ret i32 %tmp3 +} diff --git a/test/CodeGen/ARM/shifter_operand.ll b/test/CodeGen/ARM/shifter_operand.ll new file mode 100644 index 0000000..313caed --- /dev/null +++ b/test/CodeGen/ARM/shifter_operand.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep add | grep lsl +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep bic | grep asr + +int %test1(int %X, int %Y, ubyte %sh) { + %A = shl int %Y, ubyte %sh + %B = add int %X, %A + ret int %B +} + +int %test2(int %X, int %Y, ubyte %sh) { + %A = shr int %Y, ubyte %sh + %B = xor int %A, -1 + %C = and int %X, %B + ret int %C +} diff --git a/test/CodeGen/ARM/smul.ll b/test/CodeGen/ARM/smul.ll new file mode 100644 index 0000000..4ea61f3 --- /dev/null +++ b/test/CodeGen/ARM/smul.ll @@ -0,0 +1,35 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE | \ +; RUN: grep smulbt | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE | \ +; RUN: grep smultt | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE | \ +; RUN: grep smlabt | wc -l | grep 1 + +%x = weak global short 0 +%y = weak global short 0 + +int %f1(int %y) { + %tmp = load short* %x + %tmp1 = add short %tmp, 2 + %tmp2 = cast short %tmp1 to int + %tmp3 = shr int %y, ubyte 16 + %tmp4 = mul int %tmp2, %tmp3 + ret int %tmp4 +} + +int %f2(int %x, int %y) { + %tmp1 = shr int %x, ubyte 16 + %tmp3 = shr int %y, ubyte 16 + %tmp4 = mul int %tmp3, %tmp1 + ret int %tmp4 +} + +int %f3(int %a, short %x, int %y) { + %tmp = cast short %x to int + %tmp2 = shr int %y, ubyte 16 + %tmp3 = mul int %tmp2, %tmp + %tmp5 = add int %tmp3, %a + ret int %tmp5 +} diff --git a/test/CodeGen/ARM/stack-frame.ll b/test/CodeGen/ARM/stack-frame.ll new file mode 100644 index 0000000..fc34785 --- /dev/null +++ b/test/CodeGen/ARM/stack-frame.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=arm +; RUN: llvm-as < %s | llc -march=arm | grep add | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb +; RUN: llvm-as < %s | llc -march=thumb | grep add | wc -l | grep 1 + +define void @f1() { + %c = alloca i8, align 1 + ret void +} + +define i32 @f2() { + ret i32 1 +} + + diff --git a/test/CodeGen/ARM/str_post.ll b/test/CodeGen/ARM/str_post.ll new file mode 100644 index 0000000..a388f54 --- /dev/null +++ b/test/CodeGen/ARM/str_post.ll @@ -0,0 +1,21 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {strh .*\\\[.*\], #-4} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {str .*\\\[.*\],} | wc -l | grep 1 + +short %test1(int *%X, short *%A) { + %Y = load int* %X + %tmp1 = cast int %Y to short + store short %tmp1, short* %A + %tmp2 = cast short* %A to short + %tmp3 = sub short %tmp2, 4 + ret short %tmp3 +} + +int %test2(int *%X, int *%A) { + %Y = load int* %X + store int %Y, int* %A + %tmp1 = cast int* %A to int + %tmp2 = sub int %tmp1, 4 + ret int %tmp2 +} diff --git a/test/CodeGen/ARM/str_pre.ll b/test/CodeGen/ARM/str_pre.ll new file mode 100644 index 0000000..69f9928 --- /dev/null +++ b/test/CodeGen/ARM/str_pre.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep {str.*\\!} | wc -l | grep 2 + +void %test1(int *%X, int *%A, int **%dest) { + %B = load int* %A + %Y = getelementptr int* %X, int 4 + store int %B, int* %Y + store int* %Y, int** %dest + ret void +} + +short *%test2(short *%X, int *%A) { + %B = load int* %A + %Y = getelementptr short* %X, int 4 + %tmp = cast int %B to short + store short %tmp, short* %Y + ret short* %Y +} diff --git a/test/CodeGen/ARM/str_trunc.ll b/test/CodeGen/ARM/str_trunc.ll new file mode 100644 index 0000000..5a1b961 --- /dev/null +++ b/test/CodeGen/ARM/str_trunc.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep strb | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ +; RUN: grep strh | wc -l | grep 1 + +void %test1(int %v, short* %ptr) { + %tmp = cast int %v to short + store short %tmp, short* %ptr + ret void +} + +void %test2(int %v, ubyte* %ptr) { + %tmp = cast int %v to ubyte + store ubyte %tmp, ubyte* %ptr + ret void +} diff --git a/test/CodeGen/ARM/sxt_rot.ll b/test/CodeGen/ARM/sxt_rot.ll new file mode 100644 index 0000000..bf62d08 --- /dev/null +++ b/test/CodeGen/ARM/sxt_rot.ll @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \ +; RUN: grep sxtb | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \ +; RUN: grep sxtab | wc -l | grep 1 + +define i8 @test1(i32 %A) sext { + %B = lshr i32 %A, 8 + %C = shl i32 %A, 24 + %D = or i32 %B, %C + %E = trunc i32 %D to i8 + ret i8 %E +} + +define i32 @test2(i32 %A, i32 %X) sext { + %B = lshr i32 %A, 8 + %C = shl i32 %A, 24 + %D = or i32 %B, %C + %E = trunc i32 %D to i8 + %F = sext i8 %E to i32 + %G = add i32 %F, %X + ret i32 %G +} diff --git a/test/CodeGen/ARM/thumb-imm.ll b/test/CodeGen/ARM/thumb-imm.ll new file mode 100644 index 0000000..2be393a --- /dev/null +++ b/test/CodeGen/ARM/thumb-imm.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=thumb | not grep CPI + + +define i32 @test1() { + ret i32 1000 +} + +define i32 @test2() { + ret i32 -256 +} diff --git a/test/CodeGen/ARM/tls1.ll b/test/CodeGen/ARM/tls1.ll new file mode 100644 index 0000000..6866a42 --- /dev/null +++ b/test/CodeGen/ARM/tls1.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \ +; RUN: grep {i(tpoff)} +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \ +; RUN: grep {__aeabi_read_tp} +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi \ +; RUN: -relocation-model=pic | grep {__tls_get_addr} + + +@i = thread_local global i32 15 ; <i32*> [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; <i32> [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} diff --git a/test/CodeGen/ARM/tls2.ll b/test/CodeGen/ARM/tls2.ll new file mode 100644 index 0000000..90e3bcf --- /dev/null +++ b/test/CodeGen/ARM/tls2.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \ +; RUN: grep {i(gottpoff)} +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \ +; RUN: grep {ldr r., \[pc, r.\]} +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi \ +; RUN: -relocation-model=pic | grep {__tls_get_addr} + +@i = external thread_local global i32 ; <i32*> [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; <i32> [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} diff --git a/test/CodeGen/ARM/trunc_ldr.ll b/test/CodeGen/ARM/trunc_ldr.ll new file mode 100644 index 0000000..bb13ac9 --- /dev/null +++ b/test/CodeGen/ARM/trunc_ldr.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=arm | grep ldrb.*7 | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrsb.*7 | wc -l | grep 1 + + %struct.A = type { i8, i8, i8, i8, i16, i8, i8, %struct.B** } + %struct.B = type { float, float, i32, i32, i32, [0 x i8] } + +define i8 @f1(%struct.A* %d) { + %tmp2 = getelementptr %struct.A* %d, i32 0, i32 4 + %tmp23 = bitcast i16* %tmp2 to i32* + %tmp4 = load i32* %tmp23 + %tmp512 = lshr i32 %tmp4, 24 + %tmp56 = trunc i32 %tmp512 to i8 + ret i8 %tmp56 +} + +define i32 @f2(%struct.A* %d) { + %tmp2 = getelementptr %struct.A* %d, i32 0, i32 4 + %tmp23 = bitcast i16* %tmp2 to i32* + %tmp4 = load i32* %tmp23 + %tmp512 = lshr i32 %tmp4, 24 + %tmp56 = trunc i32 %tmp512 to i8 + %tmp57 = sext i8 %tmp56 to i32 + ret i32 %tmp57 +} diff --git a/test/CodeGen/ARM/tst_teq.ll b/test/CodeGen/ARM/tst_teq.ll new file mode 100644 index 0000000..e5aa029 --- /dev/null +++ b/test/CodeGen/ARM/tst_teq.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=arm | grep tst +; RUN: llvm-as < %s | llc -march=arm | grep teq +; RUN: llvm-as < %s | llc -march=thumb | grep tst + +define i32 @f(i32 %a) { +entry: + %tmp2 = and i32 %a, 255 ; <i32> [#uses=1] + icmp eq i32 %tmp2, 0 ; <i1>:0 [#uses=1] + %retval = select i1 %0, i32 20, i32 10 ; <i32> [#uses=1] + ret i32 %retval +} + +define i32 @g(i32 %a) { +entry: + %tmp2 = xor i32 %a, 255 + icmp eq i32 %tmp2, 0 ; <i1>:0 [#uses=1] + %retval = select i1 %0, i32 20, i32 10 ; <i32> [#uses=1] + ret i32 %retval +} diff --git a/test/CodeGen/ARM/unord.ll b/test/CodeGen/ARM/unord.ll new file mode 100644 index 0000000..ce587f0 --- /dev/null +++ b/test/CodeGen/ARM/unord.ll @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -march=arm | grep movne | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep moveq | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bne | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep beq | wc -l | grep 1 + +define i32 @f1(float %X, float %Y) { + %tmp = fcmp uno float %X, %Y + %retval = select i1 %tmp, i32 1, i32 -1 + ret i32 %retval +} + +define i32 @f2(float %X, float %Y) { + %tmp = fcmp ord float %X, %Y + %retval = select i1 %tmp, i32 1, i32 -1 + ret i32 %retval +} diff --git a/test/CodeGen/ARM/uxt_rot.ll b/test/CodeGen/ARM/uxt_rot.ll new file mode 100644 index 0000000..d15c650 --- /dev/null +++ b/test/CodeGen/ARM/uxt_rot.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtb | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtab | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxth | wc -l | grep 1 + +define i8 @test1(i32 %A.u) zext { + %B.u = trunc i32 %A.u to i8 + ret i8 %B.u +} + +define i32 @test2(i32 %A.u, i32 %B.u) zext { + %C.u = trunc i32 %B.u to i8 + %D.u = zext i8 %C.u to i32 + %E.u = add i32 %A.u, %D.u + ret i32 %E.u +} + +define i32 @test3(i32 %A.u) zext { + %B.u = lshr i32 %A.u, 8 + %C.u = shl i32 %A.u, 24 + %D.u = or i32 %B.u, %C.u + %E.u = trunc i32 %D.u to i16 + %F.u = zext i16 %E.u to i32 + ret i32 %F.u +} diff --git a/test/CodeGen/ARM/uxtb.ll b/test/CodeGen/ARM/uxtb.ll new file mode 100644 index 0000000..86c99da --- /dev/null +++ b/test/CodeGen/ARM/uxtb.ll @@ -0,0 +1,76 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \ +; RUN: grep uxt | wc -l | grep 10 +; END. + +uint %test1(uint %x) { + %tmp1 = and uint %x, 16711935 ; <uint> [#uses=1] + ret uint %tmp1 +} + +uint %test2(uint %x) { + %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1] + ret uint %tmp2 +} + +uint %test3(uint %x) { + %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1] + ret uint %tmp2 +} + +uint %test4(uint %x) { + %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp6 = and uint %tmp1, 16711935 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test5(uint %x) { + %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1] + ret uint %tmp2 +} + +uint %test6(uint %x) { + %tmp1 = shr uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 255 ; <uint> [#uses=1] + %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1] + %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test7(uint %x) { + %tmp1 = shr uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 255 ; <uint> [#uses=1] + %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1] + %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test8(uint %x) { + %tmp1 = shl uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16711680 ; <uint> [#uses=1] + %tmp5 = shr uint %x, ubyte 24 ; <uint> [#uses=1] + %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test9(uint %x) { + %tmp1 = shr uint %x, ubyte 24 ; <uint> [#uses=1] + %tmp4 = shl uint %x, ubyte 8 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1] + %tmp6 = or uint %tmp5, %tmp1 ; <uint> [#uses=1] + ret uint %tmp6 +} + +uint %test10(uint %p0) { + %tmp1 = shr uint %p0, ubyte 7 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 16253176 ; <uint> [#uses=2] + %tmp4 = shr uint %tmp2, ubyte 5 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 458759 ; <uint> [#uses=1] + %tmp7 = or uint %tmp5, %tmp2 ; <uint> [#uses=1] + ret uint %tmp7 +} + diff --git a/test/CodeGen/ARM/vargs.ll b/test/CodeGen/ARM/vargs.ll new file mode 100644 index 0000000..aa5e8e6 --- /dev/null +++ b/test/CodeGen/ARM/vargs.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +%str = internal constant [43 x sbyte] c"Hello World %d %d %d %d %d %d %d %d %d %d\0A\00" ; <[43 x sbyte]*> [#uses=1] + +implementation ; Functions: + +int %main() { +entry: + %tmp = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([43 x sbyte]* %str, int 0, uint 0), int 1, int 2, int 3, int 4, int 5, int 6, int 7, int 8, int 9, int 10 ) ; <int> [#uses=0] + %tmp2 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([43 x sbyte]* %str, int 0, uint 0), int 10, int 9, int 8, int 7, int 6, int 5, int 4, int 3, int 2, int 1 ) ; <int> [#uses=0] + ret int 11 +} + +declare int %printf(sbyte*, ...) diff --git a/test/CodeGen/ARM/vargs2.ll b/test/CodeGen/ARM/vargs2.ll new file mode 100644 index 0000000..a58516f --- /dev/null +++ b/test/CodeGen/ARM/vargs2.ll @@ -0,0 +1,36 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb +; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \ +; RUN: grep pop | wc -l | grep 2 + +%str = internal constant [4 x sbyte] c"%d\0A\00" ; <[4 x sbyte]*> [#uses=1] + +implementation ; Functions: + +void %f(int %a, ...) { +entry: + %va = alloca sbyte*, align 4 ; <sbyte**> [#uses=4] + call void %llvm.va_start( sbyte** %va ) + br label %bb + +bb: ; preds = %bb, %entry + %a_addr.0 = phi int [ %a, %entry ], [ %tmp5, %bb ] ; <int> [#uses=2] + %tmp = volatile load sbyte** %va ; <sbyte*> [#uses=2] + %tmp2 = getelementptr sbyte* %tmp, int 4 ; <sbyte*> [#uses=1] + volatile store sbyte* %tmp2, sbyte** %va + %tmp5 = add int %a_addr.0, -1 ; <int> [#uses=1] + %tmp = seteq int %a_addr.0, 1 ; <bool> [#uses=1] + br bool %tmp, label %bb7, label %bb + +bb7: ; preds = %bb + %tmp3 = cast sbyte* %tmp to int* ; <int*> [#uses=1] + %tmp = load int* %tmp3 ; <int> [#uses=1] + %tmp10 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([4 x sbyte]* %str, int 0, uint 0), int %tmp ) ; <int> [#uses=0] + call void %llvm.va_end( sbyte** %va ) + ret void +} + +declare void %llvm.va_start(sbyte**) + +declare int %printf(sbyte*, ...) + +declare void %llvm.va_end(sbyte**) diff --git a/test/CodeGen/ARM/vargs_align.ll b/test/CodeGen/ARM/vargs_align.ll new file mode 100644 index 0000000..8d49e19 --- /dev/null +++ b/test/CodeGen/ARM/vargs_align.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \ +; RUN: grep {add sp, sp, #16} | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \ +; RUN: grep {add sp, sp, #12} | wc -l | grep 2 + +define i32 @f(i32 %a, ...) { +entry: + %a_addr = alloca i32 ; <i32*> [#uses=1] + %retval = alloca i32, align 4 ; <i32*> [#uses=2] + %tmp = alloca i32, align 4 ; <i32*> [#uses=2] + "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 %a, i32* %a_addr + store i32 0, i32* %tmp + %tmp1 = load i32* %tmp ; <i32> [#uses=1] + store i32 %tmp1, i32* %retval + br label %return + +return: ; preds = %entry + %retval2 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval2 +} diff --git a/test/CodeGen/ARM/vfp.ll b/test/CodeGen/ARM/vfp.ll new file mode 100644 index 0000000..b2a6d70 --- /dev/null +++ b/test/CodeGen/ARM/vfp.ll @@ -0,0 +1,150 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep fabs | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep fmscs | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep fcvt | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep fuito | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep fto.i | wc -l | grep 4 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep bmi | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep bgt | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ +; RUN: grep fcmpezs | wc -l | grep 1 + +void %test(float *%P, double* %D) { + %A = load float* %P + %B = load double* %D + store float %A, float* %P + store double %B, double* %D + ret void +} + +declare float %fabsf(float) +declare double %fabs(double) + +void %test_abs(float *%P, double* %D) { + %a = load float* %P + %b = call float %fabsf(float %a) + store float %b, float* %P + + %A = load double* %D + %B = call double %fabs(double %A) + store double %B, double* %D + ret void +} + +void %test_add(float *%P, double* %D) { + %a = load float* %P + %b = add float %a, %a + store float %b, float* %P + + %A = load double* %D + %B = add double %A, %A + store double %B, double* %D + ret void +} + +void %test_ext_round(float *%P, double* %D) { + %a = load float* %P + %b = cast float %a to double + + %A = load double* %D + %B = cast double %A to float + + store double %b, double* %D + store float %B, float* %P + ret void +} + +void %test_fma(float *%P1, float* %P2, float *%P3) { + %a1 = load float* %P1 + %a2 = load float* %P2 + %a3 = load float* %P3 + + %X = mul float %a1, %a2 + %Y = sub float %X, %a3 + + store float %Y, float* %P1 + ret void +} + +int %test_ftoi(float *%P1) { + %a1 = load float* %P1 + %b1 = cast float %a1 to int + ret int %b1 +} + +uint %test_ftou(float *%P1) { + %a1 = load float* %P1 + %b1 = cast float %a1 to uint + ret uint %b1 +} + +int %test_dtoi(double *%P1) { + %a1 = load double* %P1 + %b1 = cast double %a1 to int + ret int %b1 +} + +uint %test_dtou(double *%P1) { + %a1 = load double* %P1 + %b1 = cast double %a1 to uint + ret uint %b1 +} + +void %test_utod(double *%P1, uint %X) { + %b1 = cast uint %X to double + store double %b1, double* %P1 + ret void +} + +void %test_utod2(double *%P1, ubyte %X) { + %b1 = cast ubyte %X to double + store double %b1, double* %P1 + ret void +} + +void %test_cmp(float* %glob, int %X) { +entry: + %tmp = load float* %glob ; <float> [#uses=2] + %tmp3 = getelementptr float* %glob, int 2 ; <float*> [#uses=1] + %tmp4 = load float* %tmp3 ; <float> [#uses=2] + %tmp = seteq float %tmp, %tmp4 ; <bool> [#uses=1] + %tmp5 = tail call bool %llvm.isunordered.f32( float %tmp, float %tmp4 ) ; <bool> [#uses=1] + %tmp6 = or bool %tmp, %tmp5 ; <bool> [#uses=1] + br bool %tmp6, label %cond_true, label %cond_false + +cond_true: ; preds = %entry + %tmp = tail call int (...)* %bar( ) ; <int> [#uses=0] + ret void + +cond_false: ; preds = %entry + %tmp7 = tail call int (...)* %baz( ) ; <int> [#uses=0] + ret void +} + +declare bool %llvm.isunordered.f32(float, float) + +declare int %bar(...) + +declare int %baz(...) + +void %test_cmpfp0(float* %glob, int %X) { +entry: + %tmp = load float* %glob ; <float> [#uses=1] + %tmp = setgt float %tmp, 0.000000e+00 ; <bool> [#uses=1] + br bool %tmp, label %cond_true, label %cond_false + +cond_true: ; preds = %entry + %tmp = tail call int (...)* %bar( ) ; <int> [#uses=0] + ret void + +cond_false: ; preds = %entry + %tmp1 = tail call int (...)* %baz( ) ; <int> [#uses=0] + ret void +} + diff --git a/test/CodeGen/ARM/weak.ll b/test/CodeGen/ARM/weak.ll new file mode 100644 index 0000000..f1294d8 --- /dev/null +++ b/test/CodeGen/ARM/weak.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep .weak.*f +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep .weak.*h + +implementation ; Functions: + +weak uint %f() { +entry: + unreachable +} + +void %g() { +entry: + tail call void %h( ) + ret void +} + +declare extern_weak void %h() diff --git a/test/CodeGen/ARM/weak2.ll b/test/CodeGen/ARM/weak2.ll new file mode 100644 index 0000000..a57a767 --- /dev/null +++ b/test/CodeGen/ARM/weak2.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=arm | grep .weak + +define i32 @f(i32 %a) { +entry: + %tmp2 = icmp eq i32 %a, 0 ; <i1> [#uses=1] + %t.0 = select i1 %tmp2, i32 (...)* null, i32 (...)* @test_weak ; <i32 (...)*> [#uses=2] + %tmp5 = icmp eq i32 (...)* %t.0, null ; <i1> [#uses=1] + br i1 %tmp5, label %UnifiedReturnBlock, label %cond_true8 + +cond_true8: ; preds = %entry + %tmp10 = tail call i32 (...)* %t.0( ) ; <i32> [#uses=1] + ret i32 %tmp10 + +UnifiedReturnBlock: ; preds = %entry + ret i32 250 +} + +declare extern_weak i32 @test_weak(...) diff --git a/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll b/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll new file mode 100644 index 0000000..59c6505 --- /dev/null +++ b/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll @@ -0,0 +1,19 @@ +; There should be exactly two calls here (memset and malloc), no more. +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep jsr | wc -l | grep 2 + +%typedef.bc_struct = type opaque + +implementation ; Functions: + +declare void %llvm.memset.i64(sbyte*, ubyte, ulong, uint) + +bool %l12_l94_bc_divide_endif_2E_3_2E_ce(int* %tmp.71.reload, uint %scale2.1.3, uint %extra.0, %typedef.bc_struct* %n1, %typedef.bc_struct* %n2, int* %tmp.92.reload, uint %tmp.94.reload, int* %tmp.98.reload, uint %tmp.100.reload, sbyte** %tmp.112.out, uint* %tmp.157.out, sbyte** %tmp.158.out) { +newFuncRoot: + %tmp.120 = add uint %extra.0, 2 ; <uint> [#uses=1] + %tmp.122 = add uint %tmp.120, %tmp.94.reload ; <uint> [#uses=1] + %tmp.123 = add uint %tmp.122, %tmp.100.reload ; <uint> [#uses=2] + %tmp.112 = malloc sbyte, uint %tmp.123 ; <sbyte*> [#uses=3] + %tmp.137 = cast uint %tmp.123 to ulong ; <ulong> [#uses=1] + tail call void %llvm.memset.i64( sbyte* %tmp.112, ubyte 0, ulong %tmp.137, uint 0 ) + ret bool true +} diff --git a/test/CodeGen/Alpha/2005-12-12-MissingFCMov.ll b/test/CodeGen/Alpha/2005-12-12-MissingFCMov.ll new file mode 100644 index 0000000..5b9fa19 --- /dev/null +++ b/test/CodeGen/Alpha/2005-12-12-MissingFCMov.ll @@ -0,0 +1,44 @@ +; This shouldn't crash +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha + +; ModuleID = 'bugpoint-reduced-simplified.bc' +target endian = little +target pointersize = 64 +%.str_4 = external global [44 x sbyte] ; <[44 x sbyte]*> [#uses=0] + +implementation ; Functions: + +declare void %printf(int, ...) + +void %main() { +entry: + %tmp.11861 = setlt long 0, 1 ; <bool> [#uses=1] + %tmp.19466 = setlt long 0, 1 ; <bool> [#uses=1] + %tmp.21571 = setlt long 0, 1 ; <bool> [#uses=1] + %tmp.36796 = setlt long 0, 1 ; <bool> [#uses=1] + br bool %tmp.11861, label %loopexit.2, label %no_exit.2 + +no_exit.2: ; preds = %entry + ret void + +loopexit.2: ; preds = %entry + br bool %tmp.19466, label %loopexit.3, label %no_exit.3.preheader + +no_exit.3.preheader: ; preds = %loopexit.2 + ret void + +loopexit.3: ; preds = %loopexit.2 + br bool %tmp.21571, label %no_exit.6, label %no_exit.4 + +no_exit.4: ; preds = %loopexit.3 + ret void + +no_exit.6: ; preds = %no_exit.6, %loopexit.3 + %tmp.30793 = setgt long 0, 0 ; <bool> [#uses=1] + br bool %tmp.30793, label %loopexit.6, label %no_exit.6 + +loopexit.6: ; preds = %no_exit.6 + %Z.1 = select bool %tmp.36796, double 1.000000e+00, double 0x3FEFFF7CEDE74EAE ; <double> [#uses=2] + tail call void (int, ...)* %printf( int 0, long 0, long 0, long 0, double 1.000000e+00, double 1.000000e+00, double %Z.1, double %Z.1 ) + ret void +} diff --git a/test/CodeGen/Alpha/2006-01-18-MissedGlobal.ll b/test/CodeGen/Alpha/2006-01-18-MissedGlobal.ll new file mode 100644 index 0000000..f0a5c17 --- /dev/null +++ b/test/CodeGen/Alpha/2006-01-18-MissedGlobal.ll @@ -0,0 +1,30 @@ +; The global symbol should be legalized +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha + +target endian = little +target pointersize = 64 + %struct.LIST_HELP = type { %struct.LIST_HELP*, sbyte* } + %struct._IO_FILE = type { int, sbyte*, sbyte*, sbyte*, sbyte*, sbyte*, sbyte*, sbyte*, sbyte*, sbyte*, sbyte*, sbyte*, %struct._IO_marker*, %struct._IO_FILE*, int, int, long, ushort, sbyte, [1 x sbyte], sbyte*, long, sbyte*, sbyte*, int, [44 x sbyte] } + %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, int } +%clause_SORT = external global [21 x %struct.LIST_HELP*] ; <[21 x %struct.LIST_HELP*]*> [#uses=1] +%ia_in = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=1] +%multvec_j = external global [100 x uint] ; <[100 x uint]*> [#uses=1] + +implementation ; Functions: + +void %main(int %argc) { +clock_Init.exit: + %tmp.5.i575 = load int* null ; <int> [#uses=1] + %tmp.309 = seteq int %tmp.5.i575, 0 ; <bool> [#uses=1] + br bool %tmp.309, label %UnifiedReturnBlock, label %then.17 + +then.17: ; preds = %clock_Init.exit + store %struct._IO_FILE* null, %struct._IO_FILE** %ia_in + %savedstack = call sbyte* %llvm.stacksave( ) ; <sbyte*> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %clock_Init.exit + ret void +} + +declare sbyte* %llvm.stacksave() diff --git a/test/CodeGen/Alpha/2006-01-26-VaargBreak.ll b/test/CodeGen/Alpha/2006-01-26-VaargBreak.ll new file mode 100644 index 0000000..e58152e --- /dev/null +++ b/test/CodeGen/Alpha/2006-01-26-VaargBreak.ll @@ -0,0 +1,17 @@ +; This shouldn't crash +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha + +; ModuleID = 'simp.bc' +target endian = little +target pointersize = 64 +target triple = "alphaev6-unknown-linux-gnu" +deplibs = [ "c", "crtend", "stdc++" ] + %struct.__va_list_tag = type { sbyte*, int } + +implementation ; Functions: + +uint %emit_library_call_value(int %nargs, ...) { +entry: + %tmp.223 = va_arg %struct.__va_list_tag* null, uint ; <uint> [#uses=0] + ret uint %tmp.223 +} diff --git a/test/CodeGen/Alpha/2006-04-04-zextload.ll b/test/CodeGen/Alpha/2006-04-04-zextload.ll new file mode 100644 index 0000000..75ad7e0 --- /dev/null +++ b/test/CodeGen/Alpha/2006-04-04-zextload.ll @@ -0,0 +1,36 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha + +target endian = little +target pointersize = 64 +target triple = "alphaev67-unknown-linux-gnu" + %llvm.dbg.compile_unit.type = type { uint, { }*, uint, uint, sbyte*, sbyte*, sbyte* } + %struct._Callback_list = type { %struct._Callback_list*, void (uint, %struct.ios_base*, int)*, int, int } + %struct._Impl = type { int, %struct.facet**, ulong, %struct.facet**, sbyte** } + %struct._Words = type { sbyte*, long } + "struct.__codecvt_abstract_base<char,char,__mbstate_t>" = type { %struct.facet } + "struct.basic_streambuf<char,std::char_traits<char> >" = type { int (...)**, sbyte*, sbyte*, sbyte*, sbyte*, sbyte*, sbyte*, %struct.locale } + %struct.facet = type { int (...)**, int } + %struct.ios_base = type { int (...)**, long, long, uint, uint, uint, %struct._Callback_list*, %struct._Words, [8 x %struct._Words], int, %struct._Words*, %struct.locale } + %struct.locale = type { %struct._Impl* } + "struct.ostreambuf_iterator<char,std::char_traits<char> >" = type { "struct.basic_streambuf<char,std::char_traits<char> >"*, bool } +%llvm.dbg.compile_unit1047 = external global %llvm.dbg.compile_unit.type ; <%llvm.dbg.compile_unit.type*> [#uses=1] + +implementation ; Functions: + +void %_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIdEES3_S3_RSt8ios_baseccT_() { +entry: + %tmp234 = seteq sbyte 0, 0 ; <bool> [#uses=1] + br bool %tmp234, label %cond_next243, label %cond_true235 + +cond_true235: ; preds = %entry + ret void + +cond_next243: ; preds = %entry + %tmp428 = load long* null ; <long> [#uses=1] + %tmp428 = cast long %tmp428 to uint ; <uint> [#uses=1] + %tmp429 = alloca sbyte, uint %tmp428 ; <sbyte*> [#uses=0] + call void %llvm.dbg.stoppoint( uint 1146, uint 0, { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit1047 to { }*) ) + unreachable +} + +declare void %llvm.dbg.stoppoint(uint, uint, { }*) diff --git a/test/CodeGen/Alpha/2006-07-03-ASMFormalLowering.ll b/test/CodeGen/Alpha/2006-07-03-ASMFormalLowering.ll new file mode 100644 index 0000000..0f2da53 --- /dev/null +++ b/test/CodeGen/Alpha/2006-07-03-ASMFormalLowering.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha + +target endian = little +target pointersize = 64 +target triple = "alphaev67-unknown-linux-gnu" + +implementation ; Functions: + +int %_ZN9__gnu_cxx18__exchange_and_addEPVii(int* %__mem, int %__val) { +entry: + %__tmp = alloca int, align 4 ; <int*> [#uses=1] + %tmp3 = call int asm sideeffect "\0A$$Lxadd_0:\0A\09ldl_l $0,$3\0A\09addl $0,$4,$1\0A\09stl_c $1,$2\0A\09beq $1,$$Lxadd_0\0A\09mb", "=&r,=*&r,=*m,m,r"( int* %__tmp, int* %__mem, int* %__mem, int %__val ) ; <int> [#uses=1] + ret int %tmp3 +} + +void %_ZN9__gnu_cxx12__atomic_addEPVii(int* %__mem, int %__val) { +entry: + %tmp2 = call int asm sideeffect "\0A$$Ladd_1:\0A\09ldl_l $0,$2\0A\09addl $0,$3,$0\0A\09stl_c $0,$1\0A\09beq $0,$$Ladd_1\0A\09mb", "=&r,=*m,m,r"( int* %__mem, int* %__mem, int %__val ) ; <int> [#uses=0] + ret void +} diff --git a/test/CodeGen/Alpha/2006-11-01-vastart.ll b/test/CodeGen/Alpha/2006-11-01-vastart.ll new file mode 100644 index 0000000..61d6db9 --- /dev/null +++ b/test/CodeGen/Alpha/2006-11-01-vastart.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha + +target datalayout = "e-p:64:64" +target endian = little +target pointersize = 64 +target triple = "alphaev67-unknown-linux-gnu" + %struct.va_list = type { sbyte*, int, int } + +implementation ; Functions: + +void %yyerror(int, ...) { +entry: + call void %llvm.va_start( %struct.va_list* null ) + ret void +} + +declare void %llvm.va_start(%struct.va_list*) + diff --git a/test/CodeGen/Alpha/add.ll b/test/CodeGen/Alpha/add.ll new file mode 100644 index 0000000..16ce2b0 --- /dev/null +++ b/test/CodeGen/Alpha/add.ll @@ -0,0 +1,179 @@ +;test all the shifted and signextending adds and subs with and without consts +; +; RUN: llvm-as < %s | llc -march=alpha -o %t.s -f +; RUN: grep { addl} %t.s | wc -l | grep 2 +; RUN: grep { addq} %t.s | wc -l | grep 2 +; RUN: grep { subl} %t.s | wc -l | grep 2 +; RUN: grep { subq} %t.s | wc -l | grep 1 +; +; RUN: grep {lda \$0,-100(\$16)} %t.s | wc -l | grep 1 +; RUN: grep {s4addl} %t.s | wc -l | grep 2 +; RUN: grep {s8addl} %t.s | wc -l | grep 2 +; RUN: grep {s4addq} %t.s | wc -l | grep 2 +; RUN: grep {s8addq} %t.s | wc -l | grep 2 +; +; RUN: grep {s4subl} %t.s | wc -l | grep 2 +; RUN: grep {s8subl} %t.s | wc -l | grep 2 +; RUN: grep {s4subq} %t.s | wc -l | grep 2 +; RUN: grep {s8subq} %t.s | wc -l | grep 2 + + +define i32 @al(i32 sext %x.s, i32 sext %y.s) sext { +entry: + %tmp.3.s = add i32 %y.s, %x.s ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i32 @ali(i32 sext %x.s) sext { +entry: + %tmp.3.s = add i32 100, %x.s ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i64 @aq(i64 sext %x.s, i64 sext %y.s) sext { +entry: + %tmp.3.s = add i64 %y.s, %x.s ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i64 @aqi(i64 %x.s) { +entry: + %tmp.3.s = add i64 100, %x.s ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i32 @sl(i32 sext %x.s, i32 sext %y.s) sext { +entry: + %tmp.3.s = sub i32 %y.s, %x.s ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i32 @sli(i32 sext %x.s) sext { +entry: + %tmp.3.s = sub i32 %x.s, 100 ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i64 @sq(i64 %x.s, i64 %y.s) { +entry: + %tmp.3.s = sub i64 %y.s, %x.s ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i64 @sqi(i64 %x.s) { +entry: + %tmp.3.s = sub i64 %x.s, 100 ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i32 @a4l(i32 sext %x.s, i32 sext %y.s) sext { +entry: + %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1] + %tmp.3.s = add i32 %tmp.1.s, %x.s ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i32 @a8l(i32 sext %x.s, i32 sext %y.s) sext { +entry: + %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1] + %tmp.3.s = add i32 %tmp.1.s, %x.s ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i64 @a4q(i64 %x.s, i64 %y.s) { +entry: + %tmp.1.s = shl i64 %y.s, 2 ; <i64> [#uses=1] + %tmp.3.s = add i64 %tmp.1.s, %x.s ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i64 @a8q(i64 %x.s, i64 %y.s) { +entry: + %tmp.1.s = shl i64 %y.s, 3 ; <i64> [#uses=1] + %tmp.3.s = add i64 %tmp.1.s, %x.s ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i32 @a4li(i32 sext %y.s) sext { +entry: + %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1] + %tmp.3.s = add i32 100, %tmp.1.s ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i32 @a8li(i32 sext %y.s) sext { +entry: + %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1] + %tmp.3.s = add i32 100, %tmp.1.s ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i64 @a4qi(i64 %y.s) { +entry: + %tmp.1.s = shl i64 %y.s, 2 ; <i64> [#uses=1] + %tmp.3.s = add i64 100, %tmp.1.s ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i64 @a8qi(i64 %y.s) { +entry: + %tmp.1.s = shl i64 %y.s, 3 ; <i64> [#uses=1] + %tmp.3.s = add i64 100, %tmp.1.s ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i32 @s4l(i32 sext %x.s, i32 sext %y.s) sext { +entry: + %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1] + %tmp.3.s = sub i32 %tmp.1.s, %x.s ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i32 @s8l(i32 sext %x.s, i32 sext %y.s) sext { +entry: + %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1] + %tmp.3.s = sub i32 %tmp.1.s, %x.s ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i64 @s4q(i64 %x.s, i64 %y.s) { +entry: + %tmp.1.s = shl i64 %y.s, 2 ; <i64> [#uses=1] + %tmp.3.s = sub i64 %tmp.1.s, %x.s ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i64 @s8q(i64 %x.s, i64 %y.s) { +entry: + %tmp.1.s = shl i64 %y.s, 3 ; <i64> [#uses=1] + %tmp.3.s = sub i64 %tmp.1.s, %x.s ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i32 @s4li(i32 sext %y.s) sext { +entry: + %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1] + %tmp.3.s = sub i32 %tmp.1.s, 100 ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i32 @s8li(i32 sext %y.s) sext { +entry: + %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1] + %tmp.3.s = sub i32 %tmp.1.s, 100 ; <i32> [#uses=1] + ret i32 %tmp.3.s +} + +define i64 @s4qi(i64 %y.s) { +entry: + %tmp.1.s = shl i64 %y.s, 2 ; <i64> [#uses=1] + %tmp.3.s = sub i64 %tmp.1.s, 100 ; <i64> [#uses=1] + ret i64 %tmp.3.s +} + +define i64 @s8qi(i64 %y.s) { +entry: + %tmp.1.s = shl i64 %y.s, 3 ; <i64> [#uses=1] + %tmp.3.s = sub i64 %tmp.1.s, 100 ; <i64> [#uses=1] + ret i64 %tmp.3.s +} diff --git a/test/CodeGen/Alpha/bic.ll b/test/CodeGen/Alpha/bic.ll new file mode 100644 index 0000000..4e55d18 --- /dev/null +++ b/test/CodeGen/Alpha/bic.ll @@ -0,0 +1,11 @@ +; Make sure this testcase codegens to the bic instruction +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep {bic} + +implementation ; Functions: + +long %bar(long %x, long %y) { +entry: + %tmp.1 = xor long %x, -1 ; <long> [#uses=1] + %tmp.2 = and long %y, %tmp.1 + ret long %tmp.2 +} diff --git a/test/CodeGen/Alpha/bsr.ll b/test/CodeGen/Alpha/bsr.ll new file mode 100644 index 0000000..32ea0cb --- /dev/null +++ b/test/CodeGen/Alpha/bsr.ll @@ -0,0 +1,13 @@ +; Make sure this testcase codegens the bsr instruction +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep bsr + +implementation + +internal long %abc(int %x) { + %tmp.2 = add int %x, -1 ; <int> [#uses=1] + %tmp.0 = call long %abc( int %tmp.2 ) ; <long> [#uses=1] + %tmp.5 = add int %x, -2 ; <int> [#uses=1] + %tmp.3 = call long %abc( int %tmp.5 ) ; <long> [#uses=1] + %tmp.6 = add long %tmp.0, %tmp.3 ; <long> [#uses=1] + ret long %tmp.6 +} diff --git a/test/CodeGen/Alpha/call_adj.ll b/test/CodeGen/Alpha/call_adj.ll new file mode 100644 index 0000000..da47c6c --- /dev/null +++ b/test/CodeGen/Alpha/call_adj.ll @@ -0,0 +1,15 @@ +;All this should do is not crash +;RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha + +target endian = little +target pointersize = 64 +target triple = "alphaev67-unknown-linux-gnu" + +implementation ; Functions: + +void %_ZNSt13basic_filebufIcSt11char_traitsIcEE22_M_convert_to_externalEPcl(uint %f) { +entry: + %tmp49 = alloca sbyte, uint %f ; <sbyte*> [#uses=1] + %tmp = call uint null( sbyte* null, sbyte* null, sbyte* null, sbyte* null, sbyte* null, sbyte* null, sbyte* null) + ret void +} diff --git a/test/CodeGen/Alpha/cmov.ll b/test/CodeGen/Alpha/cmov.ll new file mode 100644 index 0000000..33f1eb8 --- /dev/null +++ b/test/CodeGen/Alpha/cmov.ll @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | not grep cmovlt +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep cmoveq + + +long %cmov_lt(long %a, long %c) { +entry: + %tmp.1 = setlt long %c, 0 + %retval = select bool %tmp.1, long %a, long 10 + ret long %retval +} + +long %cmov_const(long %a, long %b, long %c) { +entry: + %tmp.1 = setlt long %a, %b + %retval = select bool %tmp.1, long %c, long 10 + ret long %retval +} + +long %cmov_lt2(long %a, long %c) { +entry: + %tmp.1 = setgt long %c, 0 + %retval = select bool %tmp.1, long 10, long %a + ret long %retval +} diff --git a/test/CodeGen/Alpha/cmpbge.ll b/test/CodeGen/Alpha/cmpbge.ll new file mode 100644 index 0000000..b7b1c09 --- /dev/null +++ b/test/CodeGen/Alpha/cmpbge.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep cmpbge | wc -l | grep 2 + +bool %test1(ulong %A, ulong %B) { + %C = and ulong %A, 255 + %D = and ulong %B, 255 + %E = setge ulong %C, %D + ret bool %E +} + +bool %test2(ulong %a, ulong %B) { + %A = shl ulong %a, ubyte 1 + %C = and ulong %A, 254 + %D = and ulong %B, 255 + %E = setge ulong %C, %D + ret bool %E +} diff --git a/test/CodeGen/Alpha/ctlz.ll b/test/CodeGen/Alpha/ctlz.ll new file mode 100644 index 0000000..0ad014d --- /dev/null +++ b/test/CodeGen/Alpha/ctlz.ll @@ -0,0 +1,14 @@ +; Make sure this testcase codegens to the ctlz instruction +; RUN: llvm-as < %s | llc -march=alpha -mcpu=ev67 | grep -i ctlz +; RUN: llvm-as < %s | llc -march=alpha -mattr=+CIX | grep -i ctlz +; RUN: llvm-as < %s | llc -march=alpha -mcpu=ev6 | not grep -i ctlz +; RUN: llvm-as < %s | llc -march=alpha -mcpu=ev56 | not grep -i ctlz +; RUN: llvm-as < %s | llc -march=alpha -mattr=-CIX | not grep -i ctlz + +declare i32 @llvm.ctlz.i8(i8) + +define i32 @bar(i8 %x) { +entry: + %tmp.1 = call i32 @llvm.ctlz.i8( i8 %x ) + ret i32 %tmp.1 +} diff --git a/test/CodeGen/Alpha/ctlz_e.ll b/test/CodeGen/Alpha/ctlz_e.ll new file mode 100644 index 0000000..9d7c44c --- /dev/null +++ b/test/CodeGen/Alpha/ctlz_e.ll @@ -0,0 +1,12 @@ +; Make sure this testcase does not use ctpop +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | not grep -i ctpop + +declare ulong %llvm.ctlz.i64(ulong) + +implementation ; Functions: + +ulong %bar(ulong %x) { +entry: + %tmp.1 = call ulong %llvm.ctlz.i64( ulong %x ) + ret ulong %tmp.1 +} diff --git a/test/CodeGen/Alpha/ctpop.ll b/test/CodeGen/Alpha/ctpop.ll new file mode 100644 index 0000000..388c121 --- /dev/null +++ b/test/CodeGen/Alpha/ctpop.ll @@ -0,0 +1,20 @@ +; Make sure this testcase codegens to the ctpop instruction +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev67 | grep -i ctpop +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mattr=+CIX | \ +; RUN: grep -i ctpop +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev6 | \ +; RUN: not grep -i ctpop +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev56 | \ +; RUN: not grep -i ctpop +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mattr=-CIX | \ +; RUN: not grep -i ctpop + +declare long %llvm.ctpop.i64(long) + +implementation ; Functions: + +long %bar(long %x) { +entry: + %tmp.1 = call long %llvm.ctpop.i64( long %x ) + ret long %tmp.1 +} diff --git a/test/CodeGen/Alpha/dg.exp b/test/CodeGen/Alpha/dg.exp new file mode 100644 index 0000000..fb9f710 --- /dev/null +++ b/test/CodeGen/Alpha/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target Alpha] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll}]] +} diff --git a/test/CodeGen/Alpha/eqv.ll b/test/CodeGen/Alpha/eqv.ll new file mode 100644 index 0000000..76bbc92 --- /dev/null +++ b/test/CodeGen/Alpha/eqv.ll @@ -0,0 +1,11 @@ +; Make sure this testcase codegens to the eqv instruction +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep eqv + +implementation ; Functions: + +long %bar(long %x, long %y) { +entry: + %tmp.1 = xor long %x, -1 ; <long> [#uses=1] + %tmp.2 = xor long %y, %tmp.1 + ret long %tmp.2 +} diff --git a/test/CodeGen/Alpha/i32_sub_1.ll b/test/CodeGen/Alpha/i32_sub_1.ll new file mode 100644 index 0000000..ae254f2 --- /dev/null +++ b/test/CodeGen/Alpha/i32_sub_1.ll @@ -0,0 +1,9 @@ +; Make sure this testcase codegens to the ctpop instruction +; RUN: llvm-as < %s | llc -march=alpha | grep -i {subl \$16,1,\$0} + + +define i32 @foo(i32 sext %x) sext { +entry: + %tmp.1 = add i32 %x, -1 ; <int> [#uses=1] + ret i32 %tmp.1 +} diff --git a/test/CodeGen/Alpha/jmp_table.ll b/test/CodeGen/Alpha/jmp_table.ll new file mode 100644 index 0000000..175e7bf --- /dev/null +++ b/test/CodeGen/Alpha/jmp_table.ll @@ -0,0 +1,101 @@ +; try to check that we have the most important instructions, which shouldn't +; appear otherwise +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep jmp +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep gprel32 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep ldl +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep rodata +; END. + +target endian = little +target pointersize = 64 +target triple = "alphaev67-unknown-linux-gnu" +%str = internal constant [2 x sbyte] c"1\00" ; <[2 x sbyte]*> [#uses=1] +%str1 = internal constant [2 x sbyte] c"2\00" ; <[2 x sbyte]*> [#uses=1] +%str2 = internal constant [2 x sbyte] c"3\00" ; <[2 x sbyte]*> [#uses=1] +%str3 = internal constant [2 x sbyte] c"4\00" ; <[2 x sbyte]*> [#uses=1] +%str4 = internal constant [2 x sbyte] c"5\00" ; <[2 x sbyte]*> [#uses=1] +%str5 = internal constant [2 x sbyte] c"6\00" ; <[2 x sbyte]*> [#uses=1] +%str6 = internal constant [2 x sbyte] c"7\00" ; <[2 x sbyte]*> [#uses=1] +%str7 = internal constant [2 x sbyte] c"8\00" ; <[2 x sbyte]*> [#uses=1] + +implementation ; Functions: + +int %main(int %x, sbyte** %y) { +entry: + %x_addr = alloca int ; <int*> [#uses=2] + %y_addr = alloca sbyte** ; <sbyte***> [#uses=1] + %retval = alloca int, align 4 ; <int*> [#uses=2] + %tmp = alloca int, align 4 ; <int*> [#uses=2] + %foo = alloca sbyte*, align 8 ; <sbyte**> [#uses=9] + "alloca point" = cast int 0 to int ; <int> [#uses=0] + store int %x, int* %x_addr + store sbyte** %y, sbyte*** %y_addr + %tmp = load int* %x_addr ; <int> [#uses=1] + switch int %tmp, label %bb15 [ + int 1, label %bb + int 2, label %bb1 + int 3, label %bb3 + int 4, label %bb5 + int 5, label %bb7 + int 6, label %bb9 + int 7, label %bb11 + int 8, label %bb13 + ] + +bb: ; preds = %entry + %tmp = getelementptr [2 x sbyte]* %str, int 0, ulong 0 ; <sbyte*> [#uses=1] + store sbyte* %tmp, sbyte** %foo + br label %bb16 + +bb1: ; preds = %entry + %tmp2 = getelementptr [2 x sbyte]* %str1, int 0, ulong 0 ; <sbyte*> [#uses=1] + store sbyte* %tmp2, sbyte** %foo + br label %bb16 + +bb3: ; preds = %entry + %tmp4 = getelementptr [2 x sbyte]* %str2, int 0, ulong 0 ; <sbyte*> [#uses=1] + store sbyte* %tmp4, sbyte** %foo + br label %bb16 + +bb5: ; preds = %entry + %tmp6 = getelementptr [2 x sbyte]* %str3, int 0, ulong 0 ; <sbyte*> [#uses=1] + store sbyte* %tmp6, sbyte** %foo + br label %bb16 + +bb7: ; preds = %entry + %tmp8 = getelementptr [2 x sbyte]* %str4, int 0, ulong 0 ; <sbyte*> [#uses=1] + store sbyte* %tmp8, sbyte** %foo + br label %bb16 + +bb9: ; preds = %entry + %tmp10 = getelementptr [2 x sbyte]* %str5, int 0, ulong 0 ; <sbyte*> [#uses=1] + store sbyte* %tmp10, sbyte** %foo + br label %bb16 + +bb11: ; preds = %entry + %tmp12 = getelementptr [2 x sbyte]* %str6, int 0, ulong 0 ; <sbyte*> [#uses=1] + store sbyte* %tmp12, sbyte** %foo + br label %bb16 + +bb13: ; preds = %entry + %tmp14 = getelementptr [2 x sbyte]* %str7, int 0, ulong 0 ; <sbyte*> [#uses=1] + store sbyte* %tmp14, sbyte** %foo + br label %bb16 + +bb15: ; preds = %entry + br label %bb16 + +bb16: ; preds = %bb15, %bb13, %bb11, %bb9, %bb7, %bb5, %bb3, %bb1, %bb + %tmp17 = load sbyte** %foo ; <sbyte*> [#uses=1] + %tmp18 = call int (...)* %print( sbyte* %tmp17 ) ; <int> [#uses=0] + store int 0, int* %tmp + %tmp19 = load int* %tmp ; <int> [#uses=1] + store int %tmp19, int* %retval + br label %return + +return: ; preds = %bb16 + %retval = load int* %retval ; <int> [#uses=1] + ret int %retval +} + +declare int %print(...) diff --git a/test/CodeGen/Alpha/mul5.ll b/test/CodeGen/Alpha/mul5.ll new file mode 100644 index 0000000..8159ff0 --- /dev/null +++ b/test/CodeGen/Alpha/mul5.ll @@ -0,0 +1,51 @@ +; Make sure this testcase does not use mulq +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | \ +; RUN: not grep -i mul + +implementation ; Functions: + +ulong %foo1(ulong %x) { +entry: + %tmp.1 = mul ulong %x, 9 ; <ulong> [#uses=1] + ret ulong %tmp.1 +} +ulong %foo3(ulong %x) { +entry: + %tmp.1 = mul ulong %x, 259 + ret ulong %tmp.1 +} + +ulong %foo4l(ulong %x) { +entry: + %tmp.1 = mul ulong %x, 260 + ret ulong %tmp.1 +} + +ulong %foo4ln(ulong %x) { +entry: + %tmp.1 = mul ulong %x, 508 + ret ulong %tmp.1 +} +ulong %foo4ln_more(ulong %x) { +entry: + %tmp.1 = mul ulong %x, 252 + ret ulong %tmp.1 +} + +ulong %foo1n(ulong %x) { +entry: + %tmp.1 = mul ulong %x, 511 + ret ulong %tmp.1 +} + +ulong %foo8l(ulong %x) { +entry: + %tmp.1 = mul ulong %x, 768 + ret ulong %tmp.1 +} + +long %bar(long %x) { +entry: + %tmp.1 = mul long %x, 5 ; <long> [#uses=1] + ret long %tmp.1 +} diff --git a/test/CodeGen/Alpha/neg1.ll b/test/CodeGen/Alpha/neg1.ll new file mode 100644 index 0000000..037e3a2 --- /dev/null +++ b/test/CodeGen/Alpha/neg1.ll @@ -0,0 +1,9 @@ +; Make sure this testcase codegens to the lda -1 instruction +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep {\\-1} + +implementation ; Functions: + +long %bar() { +entry: + ret long -1 +} diff --git a/test/CodeGen/Alpha/not.ll b/test/CodeGen/Alpha/not.ll new file mode 100644 index 0000000..3423aa7 --- /dev/null +++ b/test/CodeGen/Alpha/not.ll @@ -0,0 +1,10 @@ +; Make sure this testcase codegens to the ornot instruction +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep eqv + +implementation ; Functions: + +long %bar(long %x) { +entry: + %tmp.1 = xor long %x, -1 ; <long> [#uses=1] + ret long %tmp.1 +} diff --git a/test/CodeGen/Alpha/ornot.ll b/test/CodeGen/Alpha/ornot.ll new file mode 100644 index 0000000..d2da888 --- /dev/null +++ b/test/CodeGen/Alpha/ornot.ll @@ -0,0 +1,11 @@ +; Make sure this testcase codegens to the ornot instruction +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep ornot + +implementation ; Functions: + +long %bar(long %x, long %y) { +entry: + %tmp.1 = xor long %x, -1 ; <long> [#uses=1] + %tmp.2 = or long %y, %tmp.1 + ret long %tmp.2 +} diff --git a/test/CodeGen/Alpha/rpcc.ll b/test/CodeGen/Alpha/rpcc.ll new file mode 100644 index 0000000..ba143a6 --- /dev/null +++ b/test/CodeGen/Alpha/rpcc.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep rpcc + +declare ulong %llvm.readcyclecounter() + +ulong %foo() { +entry: +%tmp.1 = call ulong %llvm.readcyclecounter () +ret ulong %tmp.1 +} + diff --git a/test/CodeGen/Alpha/srl_and.ll b/test/CodeGen/Alpha/srl_and.ll new file mode 100644 index 0000000..2ed1bf9 --- /dev/null +++ b/test/CodeGen/Alpha/srl_and.ll @@ -0,0 +1,10 @@ +; Make sure this testcase codegens to the zapnot instruction +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep zapnot + +ulong %foo(ulong %y) { +entry: + %tmp = shr ulong %y, ubyte 3 ; <ulong> [#uses=1] + %tmp2 = and ulong %tmp, 8191 ; <ulong> [#uses=1] + ret ulong %tmp2 +} + diff --git a/test/CodeGen/Alpha/weak.ll b/test/CodeGen/Alpha/weak.ll new file mode 100644 index 0000000..aefaefd --- /dev/null +++ b/test/CodeGen/Alpha/weak.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep .weak.*f +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep .weak.*h + +implementation ; Functions: + +weak uint %f() { +entry: + unreachable +} + +void %g() { +entry: + tail call void %h( ) + ret void +} + +declare extern_weak void %h() diff --git a/test/CodeGen/Alpha/zapnot.ll b/test/CodeGen/Alpha/zapnot.ll new file mode 100644 index 0000000..05e90ec --- /dev/null +++ b/test/CodeGen/Alpha/zapnot.ll @@ -0,0 +1,9 @@ +; Make sure this testcase codegens to the bic instruction +; RUN: llvm-as < %s | llc -march=alpha | grep zapnot + + +define i16 @foo(i64 %y) zext { +entry: + %tmp.1 = trunc i64 %y to i16 ; <ushort> [#uses=1] + ret i16 %tmp.1 +} diff --git a/test/CodeGen/Alpha/zapnot2.ll b/test/CodeGen/Alpha/zapnot2.ll new file mode 100644 index 0000000..d026edd --- /dev/null +++ b/test/CodeGen/Alpha/zapnot2.ll @@ -0,0 +1,10 @@ +; Make sure this testcase codegens to the zapnot instruction +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep zapnot + +implementation ; Functions: + +long %bar(long %x) { +entry: + %tmp.1 = and long %x, 16711935 ; <long> [#uses=1] + ret long %tmp.1 +} diff --git a/test/CodeGen/Alpha/zapnot3.ll b/test/CodeGen/Alpha/zapnot3.ll new file mode 100644 index 0000000..c106b6d --- /dev/null +++ b/test/CodeGen/Alpha/zapnot3.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep zapnot + +;demanded bits mess up this mask in a hard to fix way +;ulong %foo(ulong %y) { +; %tmp = and ulong %y, 65535 +; %tmp2 = shr ulong %tmp, ubyte 3 +; ret ulong %tmp2 +;} + +ulong %foo2(ulong %y) { + %tmp = shr ulong %y, ubyte 3 ; <ulong> [#uses=1] + %tmp2 = and ulong %tmp, 8191 ; <ulong> [#uses=1] + ret ulong %tmp2 +} + diff --git a/test/CodeGen/Alpha/zapnot4.ll b/test/CodeGen/Alpha/zapnot4.ll new file mode 100644 index 0000000..b805607 --- /dev/null +++ b/test/CodeGen/Alpha/zapnot4.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep zapnot + +ulong %foo(ulong %y) { + %tmp = shl ulong %y, ubyte 3 ; <ulong> [#uses=1] + %tmp2 = and ulong %tmp, 65535 ; <ulong> [#uses=1] + ret ulong %tmp2 +} + diff --git a/test/CodeGen/CBackend/2002-05-16-NameCollide.ll b/test/CodeGen/CBackend/2002-05-16-NameCollide.ll new file mode 100644 index 0000000..249927d --- /dev/null +++ b/test/CodeGen/CBackend/2002-05-16-NameCollide.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; Make sure that global variables do not collide if they have the same name, +; but different types. + +%X = global int 5 +%X = global long 7 diff --git a/test/CodeGen/CBackend/2002-05-21-MissingReturn.ll b/test/CodeGen/CBackend/2002-05-21-MissingReturn.ll new file mode 100644 index 0000000..775a762 --- /dev/null +++ b/test/CodeGen/CBackend/2002-05-21-MissingReturn.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; This case was emitting code that looked like this: +; ... +; llvm_BB1: /* no statement here */ +; } +; +; Which the Sun C compiler rejected, so now we are sure to put a return +; instruction in there if the basic block is otherwise empty. +; +void "test"() { + br label %BB1 +BB2: + br label %BB2 +BB1: + ret void +} diff --git a/test/CodeGen/CBackend/2002-08-19-ConstPointerRef.ll b/test/CodeGen/CBackend/2002-08-19-ConstPointerRef.ll new file mode 100644 index 0000000..c8d1201 --- /dev/null +++ b/test/CodeGen/CBackend/2002-08-19-ConstPointerRef.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; Test const pointer refs & forward references + +%t3 = global int * %t1 ;; Forward reference +%t1 = global int 4 + diff --git a/test/CodeGen/CBackend/2002-08-19-ConstantExpr.ll b/test/CodeGen/CBackend/2002-08-19-ConstantExpr.ll new file mode 100644 index 0000000..2842faa --- /dev/null +++ b/test/CodeGen/CBackend/2002-08-19-ConstantExpr.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +global int* cast (float* %0 to int*) ;; Forward numeric reference +global float* %0 ;; Duplicate forward numeric reference +global float 0.0 + +%array = constant [2 x int] [ int 12, int 52 ] +%arrayPtr = global int* getelementptr ([2 x int]* %array, long 0, long 0) ;; int* &%array[0][0] + diff --git a/test/CodeGen/CBackend/2002-08-19-DataPointer.ll b/test/CodeGen/CBackend/2002-08-19-DataPointer.ll new file mode 100644 index 0000000..ca2af79 --- /dev/null +++ b/test/CodeGen/CBackend/2002-08-19-DataPointer.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +%sptr1 = global [11x sbyte]* %somestr ;; Forward ref to a constant +%somestr = constant [11x sbyte] c"hello world" + diff --git a/test/CodeGen/CBackend/2002-08-19-FunctionPointer.ll b/test/CodeGen/CBackend/2002-08-19-FunctionPointer.ll new file mode 100644 index 0000000..baf7d78 --- /dev/null +++ b/test/CodeGen/CBackend/2002-08-19-FunctionPointer.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +%fptr = global void() * %f ;; Forward ref method defn +declare void "f"() ;; External method + diff --git a/test/CodeGen/CBackend/2002-08-19-HardConstantExpr.ll b/test/CodeGen/CBackend/2002-08-19-HardConstantExpr.ll new file mode 100644 index 0000000..51bc950 --- /dev/null +++ b/test/CodeGen/CBackend/2002-08-19-HardConstantExpr.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +%array = constant [2 x int] [ int 12, int 52 ] ; <[2 x int]*> [#uses=1] +%arrayPtr = global int* getelementptr ([2 x int]* %array, long 0, long 0) ; <int**> [#uses=1] + diff --git a/test/CodeGen/CBackend/2002-08-20-RecursiveTypes.ll b/test/CodeGen/CBackend/2002-08-20-RecursiveTypes.ll new file mode 100644 index 0000000..fdcdeed --- /dev/null +++ b/test/CodeGen/CBackend/2002-08-20-RecursiveTypes.ll @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +%MyIntList = uninitialized global { \2 *, int } + diff --git a/test/CodeGen/CBackend/2002-08-20-UnnamedArgument.ll b/test/CodeGen/CBackend/2002-08-20-UnnamedArgument.ll new file mode 100644 index 0000000..3ec23fb --- /dev/null +++ b/test/CodeGen/CBackend/2002-08-20-UnnamedArgument.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; The C Writer bombs on this testcase because it tries the print the prototype +; for the test function, which tries to print the argument name. The function +; has not been incorporated into the slot calculator, so after it does the name +; lookup, it tries a slot calculator lookup, which fails. + +int %test(int) { + ret int 0 +} + diff --git a/test/CodeGen/CBackend/2002-08-26-IndirectCallTest.ll b/test/CodeGen/CBackend/2002-08-26-IndirectCallTest.ll new file mode 100644 index 0000000..4a977e8 --- /dev/null +++ b/test/CodeGen/CBackend/2002-08-26-IndirectCallTest.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; Indirect function call test... found by Joel & Brian +; + +%taskArray = uninitialized global int* + +void %test(int %X) { + %Y = add int %X, -1 ; <int>:1 [#uses=3] + %cast100 = cast int %Y to long ; <uint> [#uses=1] + %gep100 = getelementptr int** %taskArray, long %cast100 ; <int**> [#uses=1] + %fooPtr = load int** %gep100 ; <int*> [#uses=1] + %cast101 = cast int* %fooPtr to void (int)* ; <void (int)*> [#uses=1] + call void %cast101( int 1000 ) + ret void +} diff --git a/test/CodeGen/CBackend/2002-08-30-StructureOrderingTest.ll b/test/CodeGen/CBackend/2002-08-30-StructureOrderingTest.ll new file mode 100644 index 0000000..d8477d5 --- /dev/null +++ b/test/CodeGen/CBackend/2002-08-30-StructureOrderingTest.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; This testcase fails because the C backend does not arrange to output the +; contents of a structure type before it outputs the structure type itself. + +%Y = uninitialized global { {int } } +%X = uninitialized global { float } diff --git a/test/CodeGen/CBackend/2002-09-20-ArrayTypeFailure.ll b/test/CodeGen/CBackend/2002-09-20-ArrayTypeFailure.ll new file mode 100644 index 0000000..6158b2f --- /dev/null +++ b/test/CodeGen/CBackend/2002-09-20-ArrayTypeFailure.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + + + +implementation + +void %test() { + %X = alloca [4xint] + ret void +} diff --git a/test/CodeGen/CBackend/2002-09-20-VarArgPrototypes.ll b/test/CodeGen/CBackend/2002-09-20-VarArgPrototypes.ll new file mode 100644 index 0000000..f3841f4 --- /dev/null +++ b/test/CodeGen/CBackend/2002-09-20-VarArgPrototypes.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + + +declare void %foo(...) + + diff --git a/test/CodeGen/CBackend/2002-10-15-OpaqueTypeProblem.ll b/test/CodeGen/CBackend/2002-10-15-OpaqueTypeProblem.ll new file mode 100644 index 0000000..1a9cdb7 --- /dev/null +++ b/test/CodeGen/CBackend/2002-10-15-OpaqueTypeProblem.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + + %MPI_Comm = type %struct.Comm* + %struct.Comm = type opaque +%thing = global %MPI_Comm* null ; <%MPI_Comm**> [#uses=0] + +implementation ; Functions: diff --git a/test/CodeGen/CBackend/2002-10-16-External.ll b/test/CodeGen/CBackend/2002-10-16-External.ll new file mode 100644 index 0000000..d60a3d8 --- /dev/null +++ b/test/CodeGen/CBackend/2002-10-16-External.ll @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +%bob = external global int ; <int*> [#uses=2] + diff --git a/test/CodeGen/CBackend/2002-10-30-FunctionPointerAlloca.ll b/test/CodeGen/CBackend/2002-10-30-FunctionPointerAlloca.ll new file mode 100644 index 0000000..b887488 --- /dev/null +++ b/test/CodeGen/CBackend/2002-10-30-FunctionPointerAlloca.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + + + %BitField = type int + %tokenptr = type %BitField* + +implementation + +void %test() { + %pmf1 = alloca %tokenptr (%tokenptr, sbyte*)* + ret void +} diff --git a/test/CodeGen/CBackend/2002-11-06-PrintEscaped.ll b/test/CodeGen/CBackend/2002-11-06-PrintEscaped.ll new file mode 100644 index 0000000..62c0e27 --- /dev/null +++ b/test/CodeGen/CBackend/2002-11-06-PrintEscaped.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +%testString = internal constant [18 x sbyte] c "Escaped newline\n\00" + +implementation + +declare int %printf(sbyte*, ...) + +int %main() { + call int (sbyte*, ...)* %printf( sbyte* getelementptr ([18 x sbyte]* %testString, long 0, long 0)) + ret int 0 +} diff --git a/test/CodeGen/CBackend/2003-05-12-IntegerSizeWarning.ll b/test/CodeGen/CBackend/2003-05-12-IntegerSizeWarning.ll new file mode 100644 index 0000000..2c6a596 --- /dev/null +++ b/test/CodeGen/CBackend/2003-05-12-IntegerSizeWarning.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; Apparently this constant was unsigned in ISO C 90, but not in C 99. + +int %foo() { + ret int -2147483648 +} diff --git a/test/CodeGen/CBackend/2003-05-13-VarArgFunction.ll b/test/CodeGen/CBackend/2003-05-13-VarArgFunction.ll new file mode 100644 index 0000000..1e08b2d --- /dev/null +++ b/test/CodeGen/CBackend/2003-05-13-VarArgFunction.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; This testcase breaks the C backend, because gcc doesn't like (...) functions +; with no arguments at all. + +void %test(long %Ptr) { + %P = cast long %Ptr to void(...) * + call void(...)* %P(long %Ptr) + ret void +} diff --git a/test/CodeGen/CBackend/2003-05-31-MissingStructName.ll b/test/CodeGen/CBackend/2003-05-31-MissingStructName.ll new file mode 100644 index 0000000..567d8e4 --- /dev/null +++ b/test/CodeGen/CBackend/2003-05-31-MissingStructName.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; The C backend was dying when there was no typename for a struct type! + +declare int %test(int,{ [32 x int] }*) + diff --git a/test/CodeGen/CBackend/2003-06-01-NullPointerType.ll b/test/CodeGen/CBackend/2003-06-01-NullPointerType.ll new file mode 100644 index 0000000..224ba15 --- /dev/null +++ b/test/CodeGen/CBackend/2003-06-01-NullPointerType.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + + +%X = type { int, float } + +void %test() { + getelementptr %X* null, long 0, uint 1 + ret void +} diff --git a/test/CodeGen/CBackend/2003-06-11-HexConstant.ll b/test/CodeGen/CBackend/2003-06-11-HexConstant.ll new file mode 100644 index 0000000..bc5691f --- /dev/null +++ b/test/CodeGen/CBackend/2003-06-11-HexConstant.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; Make sure hex constant does not continue into a valid hexadecimal letter/number +%version = global [3 x sbyte] c"\001\00" + diff --git a/test/CodeGen/CBackend/2003-06-11-LiteralStringProblem.ll b/test/CodeGen/CBackend/2003-06-11-LiteralStringProblem.ll new file mode 100644 index 0000000..7af255b --- /dev/null +++ b/test/CodeGen/CBackend/2003-06-11-LiteralStringProblem.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + + +%version = global [3 x sbyte] c"1\00\00" + diff --git a/test/CodeGen/CBackend/2003-06-23-PromotedExprs.llx b/test/CodeGen/CBackend/2003-06-23-PromotedExprs.llx new file mode 100644 index 0000000..d7f8e56 --- /dev/null +++ b/test/CodeGen/CBackend/2003-06-23-PromotedExprs.llx @@ -0,0 +1,16 @@ + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c > %t1.cbe.c +; RUN: gcc -B/usr/bin/ %t1.cbe.c -o %t1.cbe +; RUN: %t1.cbe + +bool %doTest(ubyte %x) { + %dec.0 = add ubyte %x, 255 + %tmp.1001 = trunc ubyte %dec.0 to bool + ret bool %tmp.1001 +} + +int %main () { + %result = call bool %doTest(ubyte 1) + %p = cast bool %result to int + ret int %p +} diff --git a/test/CodeGen/CBackend/2003-06-28-InvokeSupport.ll b/test/CodeGen/CBackend/2003-06-28-InvokeSupport.ll new file mode 100644 index 0000000..f69c7dc --- /dev/null +++ b/test/CodeGen/CBackend/2003-06-28-InvokeSupport.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + + +declare int %callee(int, int) + + +int %test(int %X) { + %A = invoke int %callee(int %X, int 5) to label %Ok except label %Threw +Ok: + %B = phi int [%A, %0], [-1, %Threw] + ret int %B +Threw: + br label %Ok +} diff --git a/test/CodeGen/CBackend/2003-06-28-LinkOnceGlobalVars.llx b/test/CodeGen/CBackend/2003-06-28-LinkOnceGlobalVars.llx new file mode 100644 index 0000000..75e223d --- /dev/null +++ b/test/CodeGen/CBackend/2003-06-28-LinkOnceGlobalVars.llx @@ -0,0 +1,4 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | grep common | grep X + +%X = linkonce global int 5 + diff --git a/test/CodeGen/CBackend/2003-10-12-NANGlobalInits.ll b/test/CodeGen/CBackend/2003-10-12-NANGlobalInits.ll new file mode 100644 index 0000000..a82d7e5 --- /dev/null +++ b/test/CodeGen/CBackend/2003-10-12-NANGlobalInits.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; This is a non-normal FP value: it's a nan. +%NAN = global { float } { float 0x7FF8000000000000 } +%NANs = global { float } { float 0x7FF4000000000000 } diff --git a/test/CodeGen/CBackend/2003-10-23-UnusedType.ll b/test/CodeGen/CBackend/2003-10-23-UnusedType.ll new file mode 100644 index 0000000..e073928 --- /dev/null +++ b/test/CodeGen/CBackend/2003-10-23-UnusedType.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + + +%A = type { uint, sbyte*, { uint, uint, uint, uint, uint, uint, uint, uint }*, ushort } + +void %test(%A *) { ret void } diff --git a/test/CodeGen/CBackend/2003-10-28-CastToPtrToStruct.ll b/test/CodeGen/CBackend/2003-10-28-CastToPtrToStruct.ll new file mode 100644 index 0000000..4c7ab32 --- /dev/null +++ b/test/CodeGen/CBackend/2003-10-28-CastToPtrToStruct.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +; reduced from DOOM. +%union._XEvent = type { int } +%.X_event_9 = global %union._XEvent zeroinitializer + +implementation ; Functions: +void %I_InitGraphics() { +shortcirc_next.3: ; preds = %no_exit.1 + %tmp.319 = load int* getelementptr ({ int, int }* cast (%union._XEvent* %.X_event_9 to { int, int }*), long 0, uint 1) ; <int> [#uses=1] + ret void +} diff --git a/test/CodeGen/CBackend/2003-11-21-ConstantShiftExpr.ll b/test/CodeGen/CBackend/2003-11-21-ConstantShiftExpr.ll new file mode 100644 index 0000000..3866200 --- /dev/null +++ b/test/CodeGen/CBackend/2003-11-21-ConstantShiftExpr.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +%y = weak global sbyte 0 +implementation +uint %testcaseshr() { +entry: + ret uint shr (uint cast (sbyte* %y to uint), ubyte 4) +} +uint %testcaseshl() { +entry: + ret uint shl (uint cast (sbyte* %y to uint), ubyte 4) +} diff --git a/test/CodeGen/CBackend/2004-02-13-FrameReturnAddress.llx b/test/CodeGen/CBackend/2004-02-13-FrameReturnAddress.llx new file mode 100644 index 0000000..973e6d8 --- /dev/null +++ b/test/CodeGen/CBackend/2004-02-13-FrameReturnAddress.llx @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | grep builtin_return_address + +declare sbyte* %llvm.returnaddress(uint) +declare sbyte* %llvm.frameaddress(uint) + +sbyte *%test1() { + %X = call sbyte* %llvm.returnaddress(uint 0) + ret sbyte* %X +} + +sbyte *%test2() { + %X = call sbyte* %llvm.frameaddress(uint 0) + ret sbyte* %X +} diff --git a/test/CodeGen/CBackend/2004-02-15-PreexistingExternals.llx b/test/CodeGen/CBackend/2004-02-15-PreexistingExternals.llx new file mode 100644 index 0000000..1afa47b --- /dev/null +++ b/test/CodeGen/CBackend/2004-02-15-PreexistingExternals.llx @@ -0,0 +1,16 @@ +; The intrinsic lowering pass was lowering intrinsics like llvm.memcpy to +; explicitly specified prototypes, inserting a new function if the old one +; didn't exist. This caused there to be two external memcpy functions in +; this testcase for example, which caused the CBE to mangle one, screwing +; everything up. :( Test that this does not happen anymore. +; +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | not grep _memcpy + +declare void %llvm.memcpy.i32(sbyte*, sbyte*, uint,uint) +declare float* %memcpy(int*, uint,int) + +int %test(sbyte *%A, sbyte* %B, int* %C) { + call float* %memcpy(int* %C, uint 4, int 17) + call void %llvm.memcpy.i32(sbyte* %A, sbyte* %B, uint 123, uint 14) + ret int 7 +} diff --git a/test/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx b/test/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx new file mode 100644 index 0000000..87a642b --- /dev/null +++ b/test/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx @@ -0,0 +1,10 @@ +; This is a non-normal FP value +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | grep FPConstant | grep static + +float %func () { + ret float 0xFFF0000000000000 ; -inf +} + +double %func2() { + ret double 0xFF20000000000000 ; -inf +} diff --git a/test/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.llx b/test/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.llx new file mode 100644 index 0000000..997f1c9 --- /dev/null +++ b/test/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.llx @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | grep func1 | grep WEAK + +implementation + +linkonce int %func1 () { + ret int 5 +} + diff --git a/test/CodeGen/CBackend/2004-08-09-va-end-null.ll b/test/CodeGen/CBackend/2004-08-09-va-end-null.ll new file mode 100644 index 0000000..f8e8fe5 --- /dev/null +++ b/test/CodeGen/CBackend/2004-08-09-va-end-null.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +declare void %llvm.va_end(sbyte*) + +void %test() { + call void %llvm.va_end( sbyte* null ) + ret void +} + diff --git a/test/CodeGen/CBackend/2004-11-13-FunctionPointerCast.llx b/test/CodeGen/CBackend/2004-11-13-FunctionPointerCast.llx new file mode 100644 index 0000000..99bb602 --- /dev/null +++ b/test/CodeGen/CBackend/2004-11-13-FunctionPointerCast.llx @@ -0,0 +1,17 @@ +; The CBE should not emit code that casts the function pointer. This causes +; GCC to get testy and insert trap instructions instead of doing the right +; thing. :( +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +implementation + +declare void %external(sbyte*) + +int %test(int *%X) { + %RV = call int (int*)* cast (void(sbyte*)* %external to int(int*)*)(int* %X) + ret int %RV +} + + + + diff --git a/test/CodeGen/CBackend/2004-12-03-ExternStatics.ll b/test/CodeGen/CBackend/2004-12-03-ExternStatics.ll new file mode 100644 index 0000000..a285dae --- /dev/null +++ b/test/CodeGen/CBackend/2004-12-03-ExternStatics.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | not grep extern.*msg + +; This is PR472 + +%msg = internal global [6 x sbyte] c"hello\00" + +implementation ; Functions: + +sbyte* %foo() { +entry: + ret sbyte* getelementptr ([6 x sbyte]* %msg, int 0, int 0) +} diff --git a/test/CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll b/test/CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll new file mode 100644 index 0000000..ebe4566 --- /dev/null +++ b/test/CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +int %foo() { + ret int and (int 123456, int cast (int()* %foo to int)) +} diff --git a/test/CodeGen/CBackend/2005-02-14-VolatileOperations.ll b/test/CodeGen/CBackend/2005-02-14-VolatileOperations.ll new file mode 100644 index 0000000..e161e46 --- /dev/null +++ b/test/CodeGen/CBackend/2005-02-14-VolatileOperations.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | grep volatile + +void %test(int* %P) { + %X = volatile load int*%P + volatile store int %X, int* %P + ret void +} diff --git a/test/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll b/test/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll new file mode 100644 index 0000000..5349488 --- /dev/null +++ b/test/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c + +%JNIEnv = type %struct.JNINa* +%struct.JNINa = type { sbyte*, sbyte*, sbyte*, void (%JNIEnv*)* } + diff --git a/test/CodeGen/CBackend/2005-07-14-NegationToMinusMinus.ll b/test/CodeGen/CBackend/2005-07-14-NegationToMinusMinus.ll new file mode 100644 index 0000000..e73eb63 --- /dev/null +++ b/test/CodeGen/CBackend/2005-07-14-NegationToMinusMinus.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | not grep -- --65535 +; PR596 + +target endian = little +target pointersize = 32 +target triple = "i686-pc-linux-gnu" + +implementation ; Functions: + +declare void %func(int) + +void %funcb() { +entry: + %tmp.1 = sub int 0, -65535 ; <int> [#uses=1] + call void %func( int %tmp.1 ) + br label %return + +return: ; preds = %entry + ret void +} diff --git a/test/CodeGen/CBackend/2005-08-23-Fmod.ll b/test/CodeGen/CBackend/2005-08-23-Fmod.ll new file mode 100644 index 0000000..5ce1e96 --- /dev/null +++ b/test/CodeGen/CBackend/2005-08-23-Fmod.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | grep fmod + +double %test(double %A, double %B) { + %C = rem double %A, %B + ret double %C +} diff --git a/test/CodeGen/CBackend/2005-09-27-VolatileFuncPtr.ll b/test/CodeGen/CBackend/2005-09-27-VolatileFuncPtr.ll new file mode 100644 index 0000000..32a7088 --- /dev/null +++ b/test/CodeGen/CBackend/2005-09-27-VolatileFuncPtr.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | grep {\\* *volatile *\\*} + +%G = external global void()* + +void %test() { + volatile store void()* %test, void()** %G + volatile load void()** %G + ret void +} diff --git a/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll b/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll new file mode 100644 index 0000000..5c6babf --- /dev/null +++ b/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll @@ -0,0 +1,48 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | \ +; RUN: grep __BITCAST | wc -l | grep 14 + +int %test1(float %F) { + %X = bitcast float %F to int + ret int %X +} + +float %test2(int %I) { + %X = bitcast int %I to float + ret float %X +} + +long %test3(double %D) { + %X = bitcast double %D to long + ret long %X +} + +double %test4(long %L) { + %X = bitcast long %L to double + ret double %X +} + +double %test5(double %D) { + %X = bitcast double %D to double + %Y = add double %X, 2.0 + %Z = bitcast double %Y to long + %res = bitcast long %Z to double + ret double %res +} + +float %test6(float %F) { + %X = bitcast float %F to float + %Y = add float %X, 2.0 + %Z = bitcast float %Y to int + %res = bitcast int %Z to float + ret float %res +} + +int %main(int %argc, sbyte** %argv) { + %a = call int %test1(float 3.1415926) + %b = call float %test2(int %a) + %c = call long %test3(double 3.1415926) + %d = call double %test4(long %c) + %e = call double %test5(double 7.0) + %f = call float %test6(float 7.0) + ret int %a +} diff --git a/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll b/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll new file mode 100644 index 0000000..359feba --- /dev/null +++ b/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll @@ -0,0 +1,27 @@ +; For PR1099 +; RUN: llvm-as < %s | llc -march=c | \ +; RUN: grep {return ((((llvm_cbe_tmp2 == llvm_cbe_b_0_0_val)) ? (1) : (0)))} + +target datalayout = "e-p:32:32" +target triple = "i686-apple-darwin8" + %struct.Connector = type { i16, i16, i8, i8, %struct.Connector*, i8* } + + +define i1 @prune_match_entry_2E_ce(%struct.Connector* %a, i16 %b.0.0.val) { +newFuncRoot: + br label %entry.ce + +cond_next.exitStub: ; preds = %entry.ce + ret i1 true + +entry.return_crit_edge.exitStub: ; preds = %entry.ce + ret i1 false + +entry.ce: ; preds = %newFuncRoot + %tmp1 = getelementptr %struct.Connector* %a, i32 0, i32 0 ; <i16*> [#uses=1] + %tmp2 = load i16* %tmp1 ; <i16> [#uses=1] + %tmp3 = icmp eq i16 %tmp2, %b.0.0.val ; <i1> [#uses=1] + br i1 %tmp3, label %cond_next.exitStub, label %entry.return_crit_edge.exitStub +} + + diff --git a/test/CodeGen/CBackend/2007-01-15-NamedArrayType.ll b/test/CodeGen/CBackend/2007-01-15-NamedArrayType.ll new file mode 100644 index 0000000..a9eeff3 --- /dev/null +++ b/test/CodeGen/CBackend/2007-01-15-NamedArrayType.ll @@ -0,0 +1,11 @@ +; PR918 +; RUN: llvm-as < %s | llc -march=c | not grep fixarray_array3 + +%structtype_s = type { i32 } +%fixarray_array3 = type [3 x %structtype_s] + +define i32 @witness(%fixarray_array3* %p) { + %q = getelementptr %fixarray_array3* %p, i32 0, i32 0, i32 0 + %v = load i32* %q + ret i32 %v +} diff --git a/test/CodeGen/CBackend/2007-01-17-StackSaveNRestore.ll b/test/CodeGen/CBackend/2007-01-17-StackSaveNRestore.ll new file mode 100644 index 0000000..8fe06b7 --- /dev/null +++ b/test/CodeGen/CBackend/2007-01-17-StackSaveNRestore.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=c | grep __builtin_stack_save +; RUN: llvm-as < %s | llc -march=c | grep __builtin_stack_restore +; PR1028 + +declare i8* @llvm.stacksave() +declare void @llvm.stackrestore(i8*) + +define i8* @test() { + %s = call i8* @llvm.stacksave() + call void @llvm.stackrestore(i8* %s) + ret i8* %s +} diff --git a/test/CodeGen/CBackend/2007-02-05-memset.ll b/test/CodeGen/CBackend/2007-02-05-memset.ll new file mode 100644 index 0000000..f253b30 --- /dev/null +++ b/test/CodeGen/CBackend/2007-02-05-memset.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=c +; PR1181 +target datalayout = "e-p:64:64" +target triple = "x86_64-apple-darwin8" + + +declare void @llvm.memset.i64(i8*, i8, i64, i32) + +define fastcc void @InitUser_data_unregistered() { +entry: + tail call void @llvm.memset.i64( i8* null, i8 0, i64 65496, i32 1 ) + ret void +} diff --git a/test/CodeGen/CBackend/2007-02-23-NameConflicts.ll b/test/CodeGen/CBackend/2007-02-23-NameConflicts.ll new file mode 100644 index 0000000..2bc4d51 --- /dev/null +++ b/test/CodeGen/CBackend/2007-02-23-NameConflicts.ll @@ -0,0 +1,13 @@ +; PR1164 +; RUN: llvm-as < %s | llc -march=c | grep {llvm_cbe_A = \\*llvm_cbe_G;} +; RUN: llvm-as < %s | llc -march=c | grep {llvm_cbe_B = \\*(<mp_0_1);} +; RUN: llvm-as < %s | llc -march=c | grep {return (llvm_cbe_A + llvm_cbe_B);} +@G = global i32 123 +@ltmp_0_1 = global i32 123 + +define i32 @test(i32 *%G) { + %A = load i32* %G + %B = load i32* @ltmp_0_1 + %C = add i32 %A, %B + ret i32 %C +} diff --git a/test/CodeGen/CBackend/2007-07-11-PackedStruct.ll b/test/CodeGen/CBackend/2007-07-11-PackedStruct.ll new file mode 100644 index 0000000..6057616 --- /dev/null +++ b/test/CodeGen/CBackend/2007-07-11-PackedStruct.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=c | grep {packed} + + %struct.p = type <{ i16 }> + +define i32 @main() { +entry: + %t = alloca %struct.p, align 2 + ret i32 5 +} diff --git a/test/CodeGen/CBackend/dg.exp b/test/CodeGen/CBackend/dg.exp new file mode 100644 index 0000000..304b90f --- /dev/null +++ b/test/CodeGen/CBackend/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target CBackend] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] +} diff --git a/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll b/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll new file mode 100644 index 0000000..3e2dbfe --- /dev/null +++ b/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as -o - | llc + +; This caused the backend to assert out with: +; SparcInstrInfo.cpp:103: failed assertion `0 && "Unexpected unsigned type"' +; +implementation + +declare void "bar"(sbyte* %G) + +void "foo"() +begin + %cast225 = cast ulong 123456 to sbyte* ; <sbyte*> [#uses=1] + call void %bar( sbyte* %cast225) + ret void +end diff --git a/test/CodeGen/Generic/2002-04-16-StackFrameSizeAlignment.ll b/test/CodeGen/Generic/2002-04-16-StackFrameSizeAlignment.ll new file mode 100644 index 0000000..d7e138a --- /dev/null +++ b/test/CodeGen/Generic/2002-04-16-StackFrameSizeAlignment.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +; Compiling this file produces: +; Sparc.cpp:91: failed assertion `(offset - OFFSET) % getStackFrameSizeAlignment() == 0' +; +implementation + +declare int "SIM"(sbyte* %A, sbyte* %B, int %M, int %N, int %K, [256 x int]* %V, int %Q, int %R, int %nseq) + +void "foo"() +begin +bb0: ;[#uses=0] + %V = alloca [256 x int], uint 256 ; <[256 x int]*> [#uses=1] + call int %SIM( sbyte* null, sbyte* null, int 0, int 0, int 0, [256 x int]* %V, int 0, int 0, int 2 ) ; <int>:0 [#uses=0] + ret void +end + + diff --git a/test/CodeGen/Generic/2003-05-27-phifcmpd.ll b/test/CodeGen/Generic/2003-05-27-phifcmpd.ll new file mode 100644 index 0000000..5c795fa --- /dev/null +++ b/test/CodeGen/Generic/2003-05-27-phifcmpd.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %QRiterate(int %p.1, double %tmp.212) { +entry: ; No predecessors! + %tmp.184 = setgt int %p.1, 0 ; <bool> [#uses=1] + br bool %tmp.184, label %shortcirc_next.1, label %shortcirc_done.1 + +shortcirc_next.1: ; preds = %entry + %tmp.213 = setne double %tmp.212, 0.000000e+00 + br label %shortcirc_done.1 + +shortcirc_done.1: ; preds = %entry, %shortcirc_next.1 + %val.1 = phi bool [ false, %entry ], [ %tmp.213, %shortcirc_next.1 ] + br bool %val.1, label %shortcirc_next.1, label %exit.1 + +exit.1: + ret void +} diff --git a/test/CodeGen/Generic/2003-05-27-useboolinotherbb.ll b/test/CodeGen/Generic/2003-05-27-useboolinotherbb.ll new file mode 100644 index 0000000..8df84f0 --- /dev/null +++ b/test/CodeGen/Generic/2003-05-27-useboolinotherbb.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + + +void %QRiterate(double %tmp.212) { + %tmp.213 = setne double %tmp.212, 0.000000e+00 + br label %shortcirc_next.1 + +shortcirc_next.1: ; preds = %entry + br bool %tmp.213, label %shortcirc_next.1, label %exit.1 + +exit.1: + ret void +} diff --git a/test/CodeGen/Generic/2003-05-27-usefsubasbool.ll b/test/CodeGen/Generic/2003-05-27-usefsubasbool.ll new file mode 100644 index 0000000..40f4d4d --- /dev/null +++ b/test/CodeGen/Generic/2003-05-27-usefsubasbool.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %QRiterate(double %tmp.212) { +entry: ; No predecessors! + br label %shortcirc_next.1 + +shortcirc_next.1: ; preds = %entry + %tmp.213 = setne double %tmp.212, 0.000000e+00 + br bool %tmp.213, label %shortcirc_next.1, label %exit.1 + +exit.1: + ret void +} diff --git a/test/CodeGen/Generic/2003-05-28-ManyArgs.ll b/test/CodeGen/Generic/2003-05-28-ManyArgs.ll new file mode 100644 index 0000000..8600638 --- /dev/null +++ b/test/CodeGen/Generic/2003-05-28-ManyArgs.ll @@ -0,0 +1,156 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +;; Date: May 28, 2003. +;; From: test/Programs/External/SPEC/CINT2000/175.vpr.llvm.bc +;; Function: int %main(int %argc.1, sbyte** %argv.1) +;; +;; Error: A function call with about 56 arguments causes an assertion failure +;; in llc because the register allocator cannot find a register +;; not used explicitly by the call instruction. +;; +;; Cause: Regalloc was not keeping track of free registers correctly. +;; It was counting the registers allocated to all outgoing arguments, +;; even though most of those are copied to the stack (so those +;; registers are not actually used by the call instruction). +;; +;; Fixed: By rewriting selection and allocation so that selection explicitly +;; inserts all copy operations required for passing arguments and +;; for the return value of a call, copying to/from registers +;; and/or to stack locations as needed. +;; + + %struct..s_annealing_sched = type { uint, float, float, float, float } + %struct..s_chan = type { uint, float, float, float, float } + %struct..s_det_routing_arch = type { uint, float, float, float, uint, int, short, short, short, float, float } + %struct..s_placer_opts = type { int, float, int, uint, sbyte*, uint, int } + %struct..s_router_opts = type { float, float, float, float, float, int, int, uint, int } + %struct..s_segment_inf = type { float, int, short, short, float, float, uint, float, float } + %struct..s_switch_inf = type { uint, float, float, float, float } + +implementation + +int %main(int %argc.1, sbyte** %argv.1) { +entry: + %net_file = alloca [300 x sbyte] + %place_file = alloca [300 x sbyte] + %arch_file = alloca [300 x sbyte] + %route_file = alloca [300 x sbyte] + %full_stats = alloca uint + %operation = alloca int + %verify_binary_search = alloca uint + %show_graphics = alloca uint + %annealing_sched = alloca %struct..s_annealing_sched + %placer_opts = alloca %struct..s_placer_opts + %router_opts = alloca %struct..s_router_opts + %det_routing_arch = alloca %struct..s_det_routing_arch + %segment_inf = alloca %struct..s_segment_inf* + %timing_inf = alloca { uint, float, float, float, float, float, float, float, float, float, float } + %tmp.101 = getelementptr %struct..s_placer_opts* %placer_opts, long 0, uint 4 + %tmp.105 = getelementptr [300 x sbyte]* %net_file, long 0, long 0 + %tmp.106 = getelementptr [300 x sbyte]* %arch_file, long 0, long 0 + %tmp.107 = getelementptr [300 x sbyte]* %place_file, long 0, long 0 + %tmp.108 = getelementptr [300 x sbyte]* %route_file, long 0, long 0 + %tmp.109 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 0 + %tmp.112 = getelementptr %struct..s_placer_opts* %placer_opts, long 0, uint 0 + %tmp.114 = getelementptr %struct..s_placer_opts* %placer_opts, long 0, uint 6 + %tmp.118 = getelementptr %struct..s_router_opts* %router_opts, long 0, uint 7 + %tmp.135 = load int* %operation + %tmp.137 = load int* %tmp.112 + %tmp.138 = getelementptr %struct..s_placer_opts* %placer_opts, long 0, uint 1 + %tmp.139 = load float* %tmp.138 + %tmp.140 = getelementptr %struct..s_placer_opts* %placer_opts, long 0, uint 2 + %tmp.141 = load int* %tmp.140 + %tmp.142 = getelementptr %struct..s_placer_opts* %placer_opts, long 0, uint 3 + %tmp.143 = load uint* %tmp.142 + %tmp.145 = load sbyte** %tmp.101 + %tmp.146 = getelementptr %struct..s_placer_opts* %placer_opts, long 0, uint 5 + %tmp.147 = load uint* %tmp.146 + %tmp.149 = load int* %tmp.114 + %tmp.154 = load uint* %full_stats + %tmp.155 = load uint* %verify_binary_search + %tmp.156 = getelementptr %struct..s_annealing_sched* %annealing_sched, long 0, uint 0 + %tmp.157 = load uint* %tmp.156 + %tmp.158 = getelementptr %struct..s_annealing_sched* %annealing_sched, long 0, uint 1 + %tmp.159 = load float* %tmp.158 + %tmp.160 = getelementptr %struct..s_annealing_sched* %annealing_sched, long 0, uint 2 + %tmp.161 = load float* %tmp.160 + %tmp.162 = getelementptr %struct..s_annealing_sched* %annealing_sched, long 0, uint 3 + %tmp.163 = load float* %tmp.162 + %tmp.164 = getelementptr %struct..s_annealing_sched* %annealing_sched, long 0, uint 4 + %tmp.165 = load float* %tmp.164 + %tmp.166 = getelementptr %struct..s_router_opts* %router_opts, long 0, uint 0 + %tmp.167 = load float* %tmp.166 + %tmp.168 = getelementptr %struct..s_router_opts* %router_opts, long 0, uint 1 + %tmp.169 = load float* %tmp.168 + %tmp.170 = getelementptr %struct..s_router_opts* %router_opts, long 0, uint 2 + %tmp.171 = load float* %tmp.170 + %tmp.172 = getelementptr %struct..s_router_opts* %router_opts, long 0, uint 3 + %tmp.173 = load float* %tmp.172 + %tmp.174 = getelementptr %struct..s_router_opts* %router_opts, long 0, uint 4 + %tmp.175 = load float* %tmp.174 + %tmp.176 = getelementptr %struct..s_router_opts* %router_opts, long 0, uint 5 + %tmp.177 = load int* %tmp.176 + %tmp.178 = getelementptr %struct..s_router_opts* %router_opts, long 0, uint 6 + %tmp.179 = load int* %tmp.178 + %tmp.181 = load uint* %tmp.118 + %tmp.182 = getelementptr %struct..s_router_opts* %router_opts, long 0, uint 8 + %tmp.183 = load int* %tmp.182 + %tmp.184 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 0 + %tmp.185 = load uint* %tmp.184 + %tmp.186 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 1 + %tmp.187 = load float* %tmp.186 + %tmp.188 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 2 + %tmp.189 = load float* %tmp.188 + %tmp.190 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 3 + %tmp.191 = load float* %tmp.190 + %tmp.192 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 4 + %tmp.193 = load uint* %tmp.192 + %tmp.194 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 5 + %tmp.195 = load int* %tmp.194 + %tmp.196 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 6 + %tmp.197 = load short* %tmp.196 + %tmp.198 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 7 + %tmp.199 = load short* %tmp.198 + %tmp.200 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 8 + %tmp.201 = load short* %tmp.200 + %tmp.202 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 9 + %tmp.203 = load float* %tmp.202 + %tmp.204 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, long 0, uint 10 + %tmp.205 = load float* %tmp.204 + %tmp.206 = load %struct..s_segment_inf** %segment_inf + %tmp.208 = load uint* %tmp.109 + %tmp.209 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 1 + %tmp.210 = load float* %tmp.209 + %tmp.211 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 2 + %tmp.212 = load float* %tmp.211 + %tmp.213 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 3 + %tmp.214 = load float* %tmp.213 + %tmp.215 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 4 + %tmp.216 = load float* %tmp.215 + %tmp.217 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 5 + %tmp.218 = load float* %tmp.217 + %tmp.219 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 6 + %tmp.220 = load float* %tmp.219 + %tmp.221 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 7 + %tmp.222 = load float* %tmp.221 + %tmp.223 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 8 + %tmp.224 = load float* %tmp.223 + %tmp.225 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 9 + %tmp.226 = load float* %tmp.225 + %tmp.227 = getelementptr { uint, float, float, float, float, float, float, float, float, float, float }* %timing_inf, long 0, uint 10 + %tmp.228 = load float* %tmp.227 + call void %place_and_route( int %tmp.135, int %tmp.137, float %tmp.139, int %tmp.141, uint %tmp.143, sbyte* %tmp.145, uint %tmp.147, int %tmp.149, sbyte* %tmp.107, sbyte* %tmp.105, sbyte* %tmp.106, sbyte* %tmp.108, uint %tmp.154, uint %tmp.155, uint %tmp.157, float %tmp.159, float %tmp.161, float %tmp.163, float %tmp.165, float %tmp.167, float %tmp.169, float %tmp.171, float %tmp.173, float %tmp.175, int %tmp.177, int %tmp.179, uint %tmp.181, int %tmp.183, uint %tmp.185, float %tmp.187, float %tmp.189, float %tmp.191, uint %tmp.193, int %tmp.195, short %tmp.197, short %tmp.199, short %tmp.201, float %tmp.203, float %tmp.205, %struct..s_segment_inf* %tmp.206, uint %tmp.208, float %tmp.210, float %tmp.212, float %tmp.214, float %tmp.216, float %tmp.218, float %tmp.220, float %tmp.222, float %tmp.224, float %tmp.226, float %tmp.228 ) + %tmp.231 = load uint* %show_graphics + %tmp.232 = setne uint %tmp.231, 0 + br bool %tmp.232, label %then.2, label %endif.2 + +then.2: + br label %endif.2 + +endif.2: + ret int 0 +} + +declare int %printf(sbyte*, ...) + +declare void %place_and_route(int, int, float, int, uint, sbyte*, uint, int, sbyte*, sbyte*, sbyte*, sbyte*, uint, uint, uint, float, float, float, float, float, float, float, float, float, int, int, uint, int, uint, float, float, float, uint, int, short, short, short, float, float, %struct..s_segment_inf*, uint, float, float, float, float, float, float, float, float, float, float) diff --git a/test/CodeGen/Generic/2003-05-30-BadFoldGEP.ll b/test/CodeGen/Generic/2003-05-30-BadFoldGEP.ll new file mode 100644 index 0000000..61d802c --- /dev/null +++ b/test/CodeGen/Generic/2003-05-30-BadFoldGEP.ll @@ -0,0 +1,50 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +;; Date: May 28, 2003. +;; From: test/Programs/External/SPEC/CINT2000/254.gap.llvm.bc +;; Function: int %OpenOutput(sbyte* %filename.1) +;; +;; Error: A sequence of GEPs is folded incorrectly by llc during selection +;; causing an assertion about a dynamic casting error. +;; This code sequence was produced (correctly) by preselection +;; from a nested pair of ConstantExpr getelementptrs. +;; The code below is the output of preselection. +;; The original ConstantExprs are included in a comment. +;; +;; Cause: FoldGetElemChain() was inserting an extra leading 0 even though +;; the first instruction in the sequence contributes no indices. +;; The next instruction contributes a leading non-zero so another +;; zero should not be added before it! +;; + + +%FileType = type { int, [256 x sbyte], int, int, int, int } +%OutputFiles = uninitialized global [16 x %FileType] +%Output = internal global %FileType* null + + +implementation; Functions: + +internal int %OpenOutput(sbyte* %filename.1) { +entry: + %tmp.0 = load %FileType** %Output + %tmp.4 = getelementptr %FileType* %tmp.0, long 1 + + ;;------ Original instruction in 254.gap.llvm.bc: + ;; %tmp.10 = seteq { int, [256 x sbyte], int, int, int, int }* %tmp.4, getelementptr ([16 x { int, [256 x sbyte], int, int, int, int }]* getelementptr ([16 x { int, [256 x sbyte], int, int, int, int }]* %OutputFiles, long 1), long 0, long 0) + + ;;------ Code sequence produced by preselection phase for above instr: + ;; This code sequence is folded incorrectly by llc during selection + ;; causing an assertion about a dynamic casting error. + %addrOfGlobal = getelementptr [16 x %FileType]* %OutputFiles, long 0 + %constantGEP = getelementptr [16 x %FileType]* %addrOfGlobal, long 1 + %constantGEP = getelementptr [16 x %FileType]* %constantGEP, long 0, long 0 + %tmp.10 = seteq %FileType* %tmp.4, %constantGEP + br bool %tmp.10, label %return, label %endif.0 + +endif.0: + ret int 0 + +return: + ret int 1 +} diff --git a/test/CodeGen/Generic/2003-05-30-BadPreselectPhi.ll b/test/CodeGen/Generic/2003-05-30-BadPreselectPhi.ll new file mode 100644 index 0000000..e9cac7f --- /dev/null +++ b/test/CodeGen/Generic/2003-05-30-BadPreselectPhi.ll @@ -0,0 +1,34 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +;; Date: May 28, 2003. +;; From: test/Programs/SingleSource/richards_benchmark.c +;; Function: struct task *handlerfn(struct packet *pkt) +;; +;; Error: PreSelection puts the arguments of the Phi just before +;; the Phi instead of in predecessor blocks. This later +;; causes llc to produces an invalid register <NULL VALUE> +;; for the phi arguments. + + %struct..packet = type { %struct..packet*, int, int, int, [4 x sbyte] } + %struct..task = type { %struct..task*, int, int, %struct..packet*, int, %struct..task* (%struct..packet*)*, int, int } +%v1 = external global int +%v2 = external global int + +implementation ; Functions: + +%struct..task* %handlerfn(%struct..packet* %pkt.2) { +entry: ; No predecessors! + %tmp.1 = setne %struct..packet* %pkt.2, null + br bool %tmp.1, label %cond_false, label %cond_continue + +cond_false: ; preds = %entry + br label %cond_continue + +cond_continue: ; preds = %entry, %cond_false + %mem_tmp.0 = phi int* [ %v2, %cond_false ], [ %v1, %entry ] + %tmp.12 = cast int* %mem_tmp.0 to %struct..packet* + call void %append( %struct..packet* %pkt.2, %struct..packet* %tmp.12 ) + ret %struct..task* null +} + +declare void %append(%struct..packet*, %struct..packet*) diff --git a/test/CodeGen/Generic/2003-07-06-BadIntCmp.ll b/test/CodeGen/Generic/2003-07-06-BadIntCmp.ll new file mode 100644 index 0000000..a741ebc --- /dev/null +++ b/test/CodeGen/Generic/2003-07-06-BadIntCmp.ll @@ -0,0 +1,52 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +;; Date: May 28, 2003. +;; From: test/Programs/MultiSource/Olden-perimeter/maketree.c +;; Function: int CheckOutside(int x, int y) +;; +;; Note: The .ll code below for this regression test has identical +;; behavior to the above function up to the error, but then prints +;; true/false on the two branches. +;; +;; Error: llc generates a branch-on-xcc instead of branch-on-icc, which +;; is wrong because the value being compared (int euclid = x*x + y*y) +;; overflows, so that the 64-bit and 32-bit compares are not equal. + +%.str_1 = internal constant [6 x sbyte] c"true\0A\00" +%.str_2 = internal constant [7 x sbyte] c"false\0A\00" + +implementation ; Functions: + +declare int %printf(sbyte*, ...) + +internal void %__main() { +entry: ; No predecessors! + ret void +} + +internal void %CheckOutside(int %x.1, int %y.1) { +entry: ; No predecessors! + %tmp.2 = mul int %x.1, %x.1 ; <int> [#uses=1] + %tmp.5 = mul int %y.1, %y.1 ; <int> [#uses=1] + %tmp.6 = add int %tmp.2, %tmp.5 ; <int> [#uses=1] + %tmp.8 = setle int %tmp.6, 4194304 ; <bool> [#uses=1] + br bool %tmp.8, label %then, label %else + +then: ; preds = %entry + %tmp.11 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([6 x sbyte]* %.str_1, long 0, long 0) ) ; <int> [#uses=0] + br label %UnifiedExitNode + +else: ; preds = %entry + %tmp.13 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([7 x sbyte]* %.str_2, long 0, long 0) ) ; <int> [#uses=0] + br label %UnifiedExitNode + +UnifiedExitNode: ; preds = %then, %else + ret void +} + +int %main() { +entry: ; No predecessors! + call void %__main( ) + call void %CheckOutside( int 2097152, int 2097152 ) + ret int 0 +} diff --git a/test/CodeGen/Generic/2003-07-07-BadLongConst.ll b/test/CodeGen/Generic/2003-07-07-BadLongConst.ll new file mode 100644 index 0000000..376ef19 --- /dev/null +++ b/test/CodeGen/Generic/2003-07-07-BadLongConst.ll @@ -0,0 +1,22 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + + +%.str_1 = internal constant [42 x sbyte] c" ui = %u (0x%x)\09\09UL-ui = %lld (0x%llx)\0A\00" + +implementation ; Functions: + +declare int %printf(sbyte*, ...) + +internal ulong %getL() { +entry: ; No predecessors! + ret ulong 12659530247033960611 +} + +int %main(int %argc.1, sbyte** %argv.1) { +entry: ; No predecessors! + %tmp.11 = call ulong %getL( ) + %tmp.5 = cast ulong %tmp.11 to uint + %tmp.23 = and ulong %tmp.11, 18446744069414584320 + %tmp.16 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([42 x sbyte]* %.str_1, long 0, long 0), uint %tmp.5, uint %tmp.5, ulong %tmp.23, ulong %tmp.23 ) + ret int 0 +} diff --git a/test/CodeGen/Generic/2003-07-08-BadCastToBool.ll b/test/CodeGen/Generic/2003-07-08-BadCastToBool.ll new file mode 100644 index 0000000..2fede53 --- /dev/null +++ b/test/CodeGen/Generic/2003-07-08-BadCastToBool.ll @@ -0,0 +1,36 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +;; Date: Jul 8, 2003. +;; From: test/Programs/MultiSource/Olden-perimeter +;; Function: int %adj(uint %d.1, uint %ct.1) +;; +;; Errors: (1) cast-int-to-bool was being treated as a NOP (i.e., the int +;; register was treated as effectively true if non-zero). +;; This cannot be used for later boolean operations. +;; (2) (A or NOT(B)) was being folded into A orn B, which is ok +;; for bitwise operations but not booleans! For booleans, +;; the result has to be compared with 0. + +%.str_1 = internal constant [30 x sbyte] c"d = %d, ct = %d, d ^ ct = %d\0A\00" + + +implementation ; Functions: + +declare int %printf(sbyte*, ...) + +int %adj(uint %d.1, uint %ct.1) { +entry: + %tmp.19 = seteq uint %ct.1, 2 + %tmp.22.not = cast uint %ct.1 to bool + %tmp.221 = xor bool %tmp.22.not, true + %tmp.26 = or bool %tmp.19, %tmp.221 + %tmp.27 = cast bool %tmp.26 to int + ret int %tmp.27 +} + +int %main() { +entry: + %result = call int %adj(uint 3, uint 2) + %tmp.0 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([30 x sbyte]* %.str_1, long 0, long 0), uint 3, uint 2, int %result) + ret int 0 +} diff --git a/test/CodeGen/Generic/2003-07-29-BadConstSbyte.ll b/test/CodeGen/Generic/2003-07-29-BadConstSbyte.ll new file mode 100644 index 0000000..09a0431 --- /dev/null +++ b/test/CodeGen/Generic/2003-07-29-BadConstSbyte.ll @@ -0,0 +1,41 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +;; Date: Jul 29, 2003. +;; From: test/Programs/MultiSource/Ptrdist-bc +;; Function: --- +;; Global: %yy_ec = internal constant [256 x sbyte] ... +;; A subset of this array is used in the test below. +;; +;; Error: Character '\07' was being emitted as '\a', at yy_ec[38]. +;; When loaded, this returned the value 97 ('a'), instead of 7. +;; +;; Incorrect LLC Output for the array yy_ec was: +;; yy_ec_1094: +;; .ascii "\000\001\001\001\001\001\001\001\001\002\003\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\002\004\005\001\001\006\a\001\b\t\n\v\f\r\016\017\020\020\020\020\020\020\020\020\020\020\001\021\022\023\024\001\001\025\025\025\025\025\025\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\026\027\030\031\032\001\033\034\035\036\037 !\"#$%&'()*+,-./$0$1$234\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001" +;; + + +%yy_ec = internal constant [6 x sbyte] c"\06\07\01\08\01\09" + +%.str_3 = internal constant [8 x sbyte] c"[%d] = \00" +%.str_4 = internal constant [4 x sbyte] c"%d\0A\00" + +implementation + +declare int %printf(sbyte*, ...) + +int %main() { +entry: + br label %loopentry +loopentry: + %i = phi long [0, %entry], [%inc.i, %loopentry] + %cptr = getelementptr [6 x sbyte]* %yy_ec, long 0, long %i + %c = load sbyte* %cptr + %ignore = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([8 x sbyte]* %.str_3, long 0, long 0), long %i) + %ignore2 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([4 x sbyte]* %.str_4, long 0, long 0), sbyte %c) + %inc.i = add long %i, 1 + %done = setle long %inc.i, 5 + br bool %done, label %loopentry, label %exit.1 +exit.1: + ret int 0 +}; diff --git a/test/CodeGen/Generic/2004-02-08-UnwindSupport.llx b/test/CodeGen/Generic/2004-02-08-UnwindSupport.llx new file mode 100644 index 0000000..6e57fbc --- /dev/null +++ b/test/CodeGen/Generic/2004-02-08-UnwindSupport.llx @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -enable-correct-eh-support + +int %test() { + unwind +} + +int %main() { + %X = invoke int %test() to label %cont except label %EH +cont: + ret int 1 +EH: + ret int 0 +} diff --git a/test/CodeGen/Generic/2004-05-09-LiveVarPartialRegister.llx b/test/CodeGen/Generic/2004-05-09-LiveVarPartialRegister.llx new file mode 100644 index 0000000..82d33a0 --- /dev/null +++ b/test/CodeGen/Generic/2004-05-09-LiveVarPartialRegister.llx @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%global_long_1 = linkonce global long 7 +%global_long_2 = linkonce global long 49 + +implementation ; Functions: + +int %main() { + %l1 = load long* %global_long_1 + %l2 = load long* %global_long_2 + %cond = setle long %l1, %l2 + %cast2 = cast bool %cond to int + %RV = sub int 1, %cast2 + ret int %RV +} diff --git a/test/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll b/test/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll new file mode 100644 index 0000000..e47aa18 --- /dev/null +++ b/test/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll @@ -0,0 +1,19 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %intersect_pixel() { +entry: + %tmp125 = call bool %llvm.isunordered.f64( double 0.000000e+00, double 0.000000e+00 ) ; <bool> [#uses=1] + %tmp126 = or bool %tmp125, false ; <bool> [#uses=1] + %tmp126.not = xor bool %tmp126, true ; <bool> [#uses=1] + %brmerge1 = or bool %tmp126.not, false ; <bool> [#uses=1] + br bool %brmerge1, label %bb154, label %cond_false133 + +cond_false133: ; preds = %entry + ret void + +bb154: ; preds = %entry + %tmp164 = seteq uint 0, 0 ; <bool> [#uses=0] + ret void +} + +declare bool %llvm.isunordered.f64(double, double) diff --git a/test/CodeGen/Generic/2005-04-09-GlobalInPHI.ll b/test/CodeGen/Generic/2005-04-09-GlobalInPHI.ll new file mode 100644 index 0000000..54f9883 --- /dev/null +++ b/test/CodeGen/Generic/2005-04-09-GlobalInPHI.ll @@ -0,0 +1,21 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + %struct.TypHeader = type { uint, %struct.TypHeader**, [3 x sbyte], ubyte } +%.str_67 = external global [4 x sbyte] ; <[4 x sbyte]*> [#uses=1] +%.str_87 = external global [17 x sbyte] ; <[17 x sbyte]*> [#uses=1] + +implementation ; Functions: + +void %PrBinop() { +entry: + br bool false, label %cond_true, label %else.0 + +cond_true: ; preds = %entry + br label %else.0 + +else.0: + %tmp.167.1 = phi int [ cast ([17 x sbyte]* %.str_87 to int), %entry ], [ 0, %cond_true ] + call void %Pr( sbyte* getelementptr ([4 x sbyte]* %.str_67, int 0, int 0), int 0, int 0 ) + ret void +} + +declare void %Pr(sbyte*, int, int) diff --git a/test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll b/test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll new file mode 100644 index 0000000..3224d1a --- /dev/null +++ b/test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; Test that llvm.memcpy works with a i64 length operand on all targets. + + +declare void %llvm.memcpy.i64(sbyte*, sbyte*, ulong, uint) + +void %l12_l94_bc_divide_endif_2E_3_2E_ce() { +newFuncRoot: + tail call void %llvm.memcpy.i64( sbyte* null, sbyte* null, ulong 0, uint 1 ) + unreachable +} diff --git a/test/CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll b/test/CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll new file mode 100644 index 0000000..e7cce1f --- /dev/null +++ b/test/CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %test() { + %X = alloca {} + ret void +} diff --git a/test/CodeGen/Generic/2005-10-21-longlonggtu.ll b/test/CodeGen/Generic/2005-10-21-longlonggtu.ll new file mode 100644 index 0000000..d445e59 --- /dev/null +++ b/test/CodeGen/Generic/2005-10-21-longlonggtu.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +float %t(long %u_arg) { + %u = cast long %u_arg to ulong ; <ulong> [#uses=1] + %tmp5 = add ulong %u, 9007199254740991 ; <ulong> [#uses=1] + %tmp = setgt ulong %tmp5, 18014398509481982 ; <bool> [#uses=1] + br bool %tmp, label %T, label %F +T: + ret float 1.0 +F: + call float %t(long 0) + ret float 0.0 +} diff --git a/test/CodeGen/Generic/2005-12-01-Crash.ll b/test/CodeGen/Generic/2005-12-01-Crash.ll new file mode 100644 index 0000000..a9d8deb --- /dev/null +++ b/test/CodeGen/Generic/2005-12-01-Crash.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%str = external global [36 x sbyte] ; <[36 x sbyte]*> [#uses=0] +%str = external global [29 x sbyte] ; <[29 x sbyte]*> [#uses=0] +%str1 = external global [29 x sbyte] ; <[29 x sbyte]*> [#uses=0] +%str2 = external global [29 x sbyte] ; <[29 x sbyte]*> [#uses=1] +%str = external global [2 x sbyte] ; <[2 x sbyte]*> [#uses=0] +%str3 = external global [2 x sbyte] ; <[2 x sbyte]*> [#uses=0] +%str4 = external global [2 x sbyte] ; <[2 x sbyte]*> [#uses=0] +%str5 = external global [2 x sbyte] ; <[2 x sbyte]*> [#uses=0] + +implementation ; Functions: + +void %printArgsNoRet(int %a1, float %a2, sbyte %a3, double %a4, sbyte* %a5, int %a6, float %a7, sbyte %a8, double %a9, sbyte* %a10, int %a11, float %a12, sbyte %a13, double %a14, sbyte* %a15) { +entry: + %tmp17 = cast sbyte %a13 to int ; <int> [#uses=1] + %tmp23 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([29 x sbyte]* %str2, int 0, uint 0), int %a11, double 0.000000e+00, int %tmp17, double %a14, int 0 ) ; <int> [#uses=0] + ret void +} + +declare int %printf(sbyte*, ...) + +declare int %main(int, sbyte**) diff --git a/test/CodeGen/Generic/2005-12-12-ExpandSextInreg.ll b/test/CodeGen/Generic/2005-12-12-ExpandSextInreg.ll new file mode 100644 index 0000000..ef1359e --- /dev/null +++ b/test/CodeGen/Generic/2005-12-12-ExpandSextInreg.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +long %test(long %A) { + %B = cast long %A to sbyte + %C = cast sbyte %B to long + ret long %C +} diff --git a/test/CodeGen/Generic/2006-01-12-BadSetCCFold.ll b/test/CodeGen/Generic/2006-01-12-BadSetCCFold.ll new file mode 100644 index 0000000..876e9f2 --- /dev/null +++ b/test/CodeGen/Generic/2006-01-12-BadSetCCFold.ll @@ -0,0 +1,37 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + + %struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, int, int } + +implementation ; Functions: + +void %main() { +entry: + br bool false, label %then.2.i, label %endif.2.i + +then.2.i: ; preds = %entry + br label %dealwithargs.exit + +endif.2.i: ; preds = %entry + br bool false, label %then.3.i, label %dealwithargs.exit + +then.3.i: ; preds = %endif.2.i + br label %dealwithargs.exit + +dealwithargs.exit: ; preds = %then.3.i, %endif.2.i, %then.2.i + %n_nodes.4 = phi int [ 64, %then.3.i ], [ 64, %then.2.i ], [ 64, %endif.2.i ] ; <int> [#uses=1] + %tmp.14.i1134.i.i = setgt int %n_nodes.4, 1 ; <bool> [#uses=2] + br bool %tmp.14.i1134.i.i, label %no_exit.i12.i.i, label %fill_table.exit22.i.i + +no_exit.i12.i.i: ; preds = %no_exit.i12.i.i, %dealwithargs.exit + br bool false, label %fill_table.exit22.i.i, label %no_exit.i12.i.i + +fill_table.exit22.i.i: ; preds = %no_exit.i12.i.i, %dealwithargs.exit + %cur_node.0.i8.1.i.i = phi %struct.node_t* [ undef, %dealwithargs.exit ], [ null, %no_exit.i12.i.i ] ; <%struct.node_t*> [#uses=0] + br bool %tmp.14.i1134.i.i, label %no_exit.i.preheader.i.i, label %make_tables.exit.i + +no_exit.i.preheader.i.i: ; preds = %fill_table.exit22.i.i + ret void + +make_tables.exit.i: ; preds = %fill_table.exit22.i.i + ret void +} diff --git a/test/CodeGen/Generic/2006-01-18-InvalidBranchOpcodeAssert.ll b/test/CodeGen/Generic/2006-01-18-InvalidBranchOpcodeAssert.ll new file mode 100644 index 0000000..73fd658 --- /dev/null +++ b/test/CodeGen/Generic/2006-01-18-InvalidBranchOpcodeAssert.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; This crashed the PPC backend. + +void %test() { + %tmp125 = call bool %llvm.isunordered.f64( double 0.000000e+00, double 0.000000e+00 ) ; <bool> [#uses=1] + br bool %tmp125, label %bb154, label %cond_false133 + +cond_false133: ; preds = %entry + ret void + +bb154: ; preds = %entry + %tmp164 = seteq uint 0, 0 ; <bool> [#uses=0] + ret void +} + +declare bool %llvm.isunordered.f64(double, double) diff --git a/test/CodeGen/Generic/2006-02-12-InsertLibcall.ll b/test/CodeGen/Generic/2006-02-12-InsertLibcall.ll new file mode 100644 index 0000000..d18ce14 --- /dev/null +++ b/test/CodeGen/Generic/2006-02-12-InsertLibcall.ll @@ -0,0 +1,60 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +%G = external global int + +void %encode_one_frame(long %tmp.2i) { +entry: + %tmp.9 = seteq int 0, 0 ; <bool> [#uses=1] + br bool %tmp.9, label %endif.0, label %shortcirc_next.0 + +then.5.i: ; preds = %shortcirc_next.i + %tmp.114.i = div long %tmp.2i, 3 ; <long> [#uses=1] + %tmp.111.i = call long %lseek( int 0, long %tmp.114.i, int 1 ) ; <long> [#uses=0] + ret void + +shortcirc_next.0: ; preds = %entry + ret void + +endif.0: ; preds = %entry + %tmp.324.i = seteq int 0, 0 ; <bool> [#uses=2] + %tmp.362.i = setlt int 0, 0 ; <bool> [#uses=1] + br bool %tmp.324.i, label %else.4.i, label %then.11.i37 + +then.11.i37: ; preds = %endif.0 + ret void + +else.4.i: ; preds = %endif.0 + br bool %tmp.362.i, label %else.5.i, label %then.12.i + +then.12.i: ; preds = %else.4.i + ret void + +else.5.i: ; preds = %else.4.i + br bool %tmp.324.i, label %then.0.i40, label %then.17.i + +then.17.i: ; preds = %else.5.i + ret void + +then.0.i40: ; preds = %else.5.i + %tmp.8.i42 = seteq int 0, 0 ; <bool> [#uses=1] + br bool %tmp.8.i42, label %else.1.i56, label %then.1.i52 + +then.1.i52: ; preds = %then.0.i40 + ret void + +else.1.i56: ; preds = %then.0.i40 + %tmp.28.i = load int* %G + %tmp.29.i = seteq int %tmp.28.i, 1 ; <bool> [#uses=1] + br bool %tmp.29.i, label %shortcirc_next.i, label %shortcirc_done.i + +shortcirc_next.i: ; preds = %else.1.i56 + %tmp.34.i = seteq int 0, 3 ; <bool> [#uses=1] + br bool %tmp.34.i, label %then.5.i, label %endif.5.i + +shortcirc_done.i: ; preds = %else.1.i56 + ret void + +endif.5.i: ; preds = %shortcirc_next.i + ret void +} + +declare long %lseek(int, long, int) diff --git a/test/CodeGen/Generic/2006-03-01-dagcombineinfloop.ll b/test/CodeGen/Generic/2006-03-01-dagcombineinfloop.ll new file mode 100644 index 0000000..797af74 --- /dev/null +++ b/test/CodeGen/Generic/2006-03-01-dagcombineinfloop.ll @@ -0,0 +1,98 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; Infinite loop in the dag combiner, reduced from 176.gcc. + + %struct._obstack_chunk = type { sbyte*, %struct._obstack_chunk*, [4 x sbyte] } + %struct.anon = type { int } + %struct.lang_decl = type opaque + %struct.lang_type = type { int, [1 x %struct.tree_node*] } + %struct.obstack = type { int, %struct._obstack_chunk*, sbyte*, sbyte*, sbyte*, int, int, %struct._obstack_chunk* (...)*, void (...)*, sbyte*, ubyte } + %struct.rtx_def = type { ushort, ubyte, ubyte, [1 x %struct.anon] } + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, ubyte, ubyte, ubyte, ubyte } + %struct.tree_decl = type { [12 x sbyte], sbyte*, int, %struct.tree_node*, uint, ubyte, ubyte, ubyte, ubyte, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.anon, { %struct.rtx_def* }, %struct.tree_node*, %struct.lang_decl* } + %struct.tree_list = type { [12 x sbyte], %struct.tree_node*, %struct.tree_node* } + %struct.tree_node = type { %struct.tree_decl } + %struct.tree_type = type { [12 x sbyte], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, uint, ubyte, ubyte, ubyte, ubyte, uint, %struct.tree_node*, %struct.tree_node*, %struct.anon, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.obstack*, %struct.lang_type* } +%void_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1] +%char_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1] +%short_integer_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1] +%short_unsigned_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1] +%float_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1] +%signed_char_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1] +%unsigned_char_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1] + +implementation ; Functions: + +fastcc int %self_promoting_args_p(%struct.tree_node* %parms) { +entry: + %tmp915 = seteq %struct.tree_node* %parms, null ; <bool> [#uses=1] + br bool %tmp915, label %return, label %cond_true92.preheader + +cond_true: ; preds = %cond_true92 + %tmp9.not = setne %struct.tree_node* %tmp2, %tmp7 ; <bool> [#uses=1] + %tmp14 = seteq %struct.tree_node* %tmp2, null ; <bool> [#uses=1] + %bothcond = or bool %tmp9.not, %tmp14 ; <bool> [#uses=1] + br bool %bothcond, label %return, label %cond_next18 + +cond_next12: ; preds = %cond_true92 + %tmp14.old = seteq %struct.tree_node* %tmp2, null ; <bool> [#uses=1] + br bool %tmp14.old, label %return, label %cond_next18 + +cond_next18: ; preds = %cond_next12, %cond_true + %tmp20 = cast %struct.tree_node* %tmp2 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1] + %tmp21 = getelementptr %struct.tree_type* %tmp20, int 0, uint 17 ; <%struct.tree_node**> [#uses=1] + %tmp22 = load %struct.tree_node** %tmp21 ; <%struct.tree_node*> [#uses=6] + %tmp24 = seteq %struct.tree_node* %tmp22, %tmp23 ; <bool> [#uses=1] + br bool %tmp24, label %return, label %cond_next28 + +cond_next28: ; preds = %cond_next18 + %tmp30 = cast %struct.tree_node* %tmp2 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1] + %tmp = getelementptr %struct.tree_common* %tmp30, int 0, uint 2 ; <ubyte*> [#uses=1] + %tmp = cast ubyte* %tmp to uint* ; <uint*> [#uses=1] + %tmp = load uint* %tmp ; <uint> [#uses=1] + %tmp32 = cast uint %tmp to ubyte ; <ubyte> [#uses=1] + %tmp33 = seteq ubyte %tmp32, 7 ; <bool> [#uses=1] + br bool %tmp33, label %cond_true34, label %cond_next84 + +cond_true34: ; preds = %cond_next28 + %tmp40 = seteq %struct.tree_node* %tmp22, %tmp39 ; <bool> [#uses=1] + %tmp49 = seteq %struct.tree_node* %tmp22, %tmp48 ; <bool> [#uses=1] + %bothcond6 = or bool %tmp40, %tmp49 ; <bool> [#uses=1] + %tmp58 = seteq %struct.tree_node* %tmp22, %tmp57 ; <bool> [#uses=1] + %bothcond7 = or bool %bothcond6, %tmp58 ; <bool> [#uses=1] + %tmp67 = seteq %struct.tree_node* %tmp22, %tmp66 ; <bool> [#uses=1] + %bothcond8 = or bool %bothcond7, %tmp67 ; <bool> [#uses=1] + %tmp76 = seteq %struct.tree_node* %tmp22, %tmp75 ; <bool> [#uses=1] + %bothcond9 = or bool %bothcond8, %tmp76 ; <bool> [#uses=2] + %brmerge = or bool %bothcond9, %tmp ; <bool> [#uses=1] + %bothcond9 = cast bool %bothcond9 to int ; <int> [#uses=1] + %.mux = xor int %bothcond9, 1 ; <int> [#uses=1] + br bool %brmerge, label %return, label %cond_true92 + +cond_next84: ; preds = %cond_next28 + br bool %tmp, label %return, label %cond_true92 + +cond_true92.preheader: ; preds = %entry + %tmp7 = load %struct.tree_node** %void_type_node ; <%struct.tree_node*> [#uses=1] + %tmp23 = load %struct.tree_node** %float_type_node ; <%struct.tree_node*> [#uses=1] + %tmp39 = load %struct.tree_node** %char_type_node ; <%struct.tree_node*> [#uses=1] + %tmp48 = load %struct.tree_node** %signed_char_type_node ; <%struct.tree_node*> [#uses=1] + %tmp57 = load %struct.tree_node** %unsigned_char_type_node ; <%struct.tree_node*> [#uses=1] + %tmp66 = load %struct.tree_node** %short_integer_type_node ; <%struct.tree_node*> [#uses=1] + %tmp75 = load %struct.tree_node** %short_unsigned_type_node ; <%struct.tree_node*> [#uses=1] + br label %cond_true92 + +cond_true92: ; preds = %cond_true92.preheader, %cond_next84, %cond_true34 + %t.0.0 = phi %struct.tree_node* [ %parms, %cond_true92.preheader ], [ %tmp6, %cond_true34 ], [ %tmp6, %cond_next84 ] ; <%struct.tree_node*> [#uses=2] + %tmp = cast %struct.tree_node* %t.0.0 to %struct.tree_list* ; <%struct.tree_list*> [#uses=1] + %tmp = getelementptr %struct.tree_list* %tmp, int 0, uint 2 ; <%struct.tree_node**> [#uses=1] + %tmp2 = load %struct.tree_node** %tmp ; <%struct.tree_node*> [#uses=5] + %tmp4 = cast %struct.tree_node* %t.0.0 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1] + %tmp5 = getelementptr %struct.tree_common* %tmp4, int 0, uint 0 ; <%struct.tree_node**> [#uses=1] + %tmp6 = load %struct.tree_node** %tmp5 ; <%struct.tree_node*> [#uses=3] + %tmp = seteq %struct.tree_node* %tmp6, null ; <bool> [#uses=3] + br bool %tmp, label %cond_true, label %cond_next12 + +return: ; preds = %cond_next84, %cond_true34, %cond_next18, %cond_next12, %cond_true, %entry + %retval.0 = phi int [ 1, %entry ], [ 1, %cond_next84 ], [ %.mux, %cond_true34 ], [ 0, %cond_next18 ], [ 0, %cond_next12 ], [ 0, %cond_true ] ; <int> [#uses=1] + ret int %retval.0 +} diff --git a/test/CodeGen/Generic/2006-03-27-DebugInfoNULLDeclare.ll b/test/CodeGen/Generic/2006-03-27-DebugInfoNULLDeclare.ll new file mode 100644 index 0000000..4e262f8 --- /dev/null +++ b/test/CodeGen/Generic/2006-03-27-DebugInfoNULLDeclare.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +implementation ; Functions: + +declare void %llvm.dbg.declare({ }*, { }*) + +void %foo() { + call void %llvm.dbg.declare( { }* null, { }* null ) + ret void +} diff --git a/test/CodeGen/Generic/2006-04-11-vecload.ll b/test/CodeGen/Generic/2006-04-11-vecload.ll new file mode 100644 index 0000000..056edac --- /dev/null +++ b/test/CodeGen/Generic/2006-04-11-vecload.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah + +; The vload was getting memoized to the previous scalar load! + +void %VertexProgram2() { + %xFloat0.688 = load float* null ; <float> [#uses=0] + %loadVector37.712 = load <4 x float>* null ; <<4 x float>> [#uses=1] + %inFloat3.713 = insertelement <4 x float> %loadVector37.712, float 0.000000e+00, uint 3 ; <<4 x float>> [#uses=1] + store <4 x float> %inFloat3.713, <4 x float>* null + unreachable +} + diff --git a/test/CodeGen/Generic/2006-04-26-SetCCAnd.ll b/test/CodeGen/Generic/2006-04-26-SetCCAnd.ll new file mode 100644 index 0000000..2a424be --- /dev/null +++ b/test/CodeGen/Generic/2006-04-26-SetCCAnd.ll @@ -0,0 +1,43 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; PR748 + +%G = external global ushort ; <ushort*> [#uses=1] + +implementation ; Functions: + +void %OmNewObjHdr() { +entry: + br bool false, label %endif.4, label %then.0 + +then.0: ; preds = %entry + ret void + +endif.4: ; preds = %entry + br bool false, label %else.3, label %shortcirc_next.3 + +shortcirc_next.3: ; preds = %endif.4 + ret void + +else.3: ; preds = %endif.4 + switch int 0, label %endif.10 [ + int 5001, label %then.10 + int -5008, label %then.10 + ] + +then.10: ; preds = %else.3, %else.3 + %tmp.112 = load ushort* null ; <ushort> [#uses=2] + %tmp.113 = load ushort* %G ; <ushort> [#uses=2] + %tmp.114 = setgt ushort %tmp.112, %tmp.113 ; <bool> [#uses=1] + %tmp.120 = setlt ushort %tmp.112, %tmp.113 ; <bool> [#uses=1] + %bothcond = and bool %tmp.114, %tmp.120 ; <bool> [#uses=1] + br bool %bothcond, label %else.4, label %then.11 + +then.11: ; preds = %then.10 + ret void + +else.4: ; preds = %then.10 + ret void + +endif.10: ; preds = %else.3 + ret void +} diff --git a/test/CodeGen/Generic/2006-04-28-Sign-extend-bool.ll b/test/CodeGen/Generic/2006-04-28-Sign-extend-bool.ll new file mode 100644 index 0000000..068d680 --- /dev/null +++ b/test/CodeGen/Generic/2006-04-28-Sign-extend-bool.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +int %test(int %tmp93) { + %tmp98 = shl int %tmp93, ubyte 31 ; <int> [#uses=1] + %tmp99 = shr int %tmp98, ubyte 31 ; <int> [#uses=1] + %tmp99 = cast int %tmp99 to sbyte ; <sbyte> [#uses=1] + %tmp99100 = cast sbyte %tmp99 to int ; <int> [#uses=1] + ret int %tmp99100 +} + diff --git a/test/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll b/test/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll new file mode 100644 index 0000000..ac7e19d --- /dev/null +++ b/test/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll @@ -0,0 +1,33 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + + %struct.FILE = type { ubyte*, int, int, short, short, %struct.__sbuf, int, sbyte*, int (sbyte*)*, int (sbyte*, sbyte*, int)*, long (sbyte*, long, int)*, int (sbyte*, sbyte*, int)*, %struct.__sbuf, %struct.__sFILEX*, int, [3 x ubyte], [1 x ubyte], %struct.__sbuf, int, long } + %struct.SYMBOL_TABLE_ENTRY = type { [9 x sbyte], [9 x sbyte], int, int, uint, %struct.SYMBOL_TABLE_ENTRY* } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { ubyte*, int } +%str14 = external global [6 x sbyte] ; <[6 x sbyte]*> [#uses=0] + +implementation ; Functions: + +declare void %fprintf(int, ...) + +void %OUTPUT_TABLE(%struct.SYMBOL_TABLE_ENTRY* %SYM_TAB) { +entry: + %tmp11 = getelementptr %struct.SYMBOL_TABLE_ENTRY* %SYM_TAB, int 0, uint 1, int 0 ; <sbyte*> [#uses=2] + %tmp.i = cast sbyte* %tmp11 to ubyte* ; <ubyte*> [#uses=1] + br label %bb.i + +bb.i: ; preds = %cond_next.i, %entry + %s1.0.i = phi ubyte* [ %tmp.i, %entry ], [ null, %cond_next.i ] ; <ubyte*> [#uses=0] + br bool false, label %cond_true.i31, label %cond_next.i + +cond_true.i31: ; preds = %bb.i + call void (int, ...)* %fprintf( int 0, sbyte* %tmp11, sbyte* null ) + ret void + +cond_next.i: ; preds = %bb.i + br bool false, label %bb.i, label %bb19.i + +bb19.i: ; preds = %cond_next.i + ret void +} + diff --git a/test/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll b/test/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll new file mode 100644 index 0000000..0cf2e93 --- /dev/null +++ b/test/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -fast + +float %test(uint %tmp12771278) { + switch uint %tmp12771278, label %bb1279 [ + ] + +bb1279: ; preds = %cond_next1272 + ret float 1.0 +} + diff --git a/test/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll b/test/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll new file mode 100644 index 0000000..a910b58 --- /dev/null +++ b/test/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll @@ -0,0 +1,37 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -fast + + %struct.cl_perfunc_opts = type { ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, int, int, int, int, int, int, int } +%cl_pf_opts = external global %struct.cl_perfunc_opts ; <%struct.cl_perfunc_opts*> [#uses=2] + +implementation ; Functions: + +void %set_flags_from_O() { +entry: + %tmp22 = setgt int 0, 0 ; <bool> [#uses=1] + br bool %tmp22, label %cond_true23, label %cond_next159 + +cond_true23: ; preds = %entry + %tmp138 = getelementptr %struct.cl_perfunc_opts* %cl_pf_opts, int 0, uint 8 ; <ubyte*> [#uses=1] + %tmp138 = cast ubyte* %tmp138 to uint* ; <uint*> [#uses=2] + %tmp139 = load uint* %tmp138 ; <uint> [#uses=1] + %tmp140 = shl uint 1, ubyte 27 ; <uint> [#uses=1] + %tmp141 = and uint %tmp140, 134217728 ; <uint> [#uses=1] + %tmp142 = and uint %tmp139, 4160749567 ; <uint> [#uses=1] + %tmp143 = or uint %tmp142, %tmp141 ; <uint> [#uses=1] + store uint %tmp143, uint* %tmp138 + %tmp144 = getelementptr %struct.cl_perfunc_opts* %cl_pf_opts, int 0, uint 8 ; <ubyte*> [#uses=1] + %tmp144 = cast ubyte* %tmp144 to uint* ; <uint*> [#uses=1] + %tmp145 = load uint* %tmp144 ; <uint> [#uses=1] + %tmp146 = shl uint %tmp145, ubyte 22 ; <uint> [#uses=1] + %tmp147 = shr uint %tmp146, ubyte 31 ; <uint> [#uses=1] + %tmp147 = cast uint %tmp147 to ubyte ; <ubyte> [#uses=1] + %tmp148 = seteq ubyte %tmp147, 0 ; <bool> [#uses=1] + br bool %tmp148, label %cond_true149, label %cond_next159 + +cond_true149: ; preds = %cond_true23 + %tmp150 = cast ubyte* null to uint* ; <uint*> [#uses=0] + ret void + +cond_next159: ; preds = %cond_true23, %entry + ret void +} diff --git a/test/CodeGen/Generic/2006-06-28-SimplifySetCCCrash.ll b/test/CodeGen/Generic/2006-06-28-SimplifySetCCCrash.ll new file mode 100644 index 0000000..1fe13f8 --- /dev/null +++ b/test/CodeGen/Generic/2006-06-28-SimplifySetCCCrash.ll @@ -0,0 +1,281 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + %struct.rtunion = type { long } + %struct.rtx_def = type { ushort, ubyte, ubyte, [1 x %struct.rtunion] } +%ix86_cpu = external global uint ; <uint*> [#uses=1] +%which_alternative = external global int ; <int*> [#uses=3] + +implementation ; Functions: + +declare fastcc int %recog() + +void %athlon_fp_unit_ready_cost() { +entry: + %tmp = setlt int 0, 0 ; <bool> [#uses=1] + br bool %tmp, label %cond_true.i, label %cond_true + +cond_true: ; preds = %entry + ret void + +cond_true.i: ; preds = %entry + %tmp8.i = tail call fastcc int %recog( ) ; <int> [#uses=1] + switch int %tmp8.i, label %UnifiedReturnBlock [ + int -1, label %bb2063 + int 19, label %bb2035 + int 20, label %bb2035 + int 21, label %bb2035 + int 23, label %bb2035 + int 24, label %bb2035 + int 27, label %bb2035 + int 32, label %bb2035 + int 33, label %bb1994 + int 35, label %bb2035 + int 36, label %bb1994 + int 90, label %bb1948 + int 94, label %bb1948 + int 95, label %bb1948 + int 101, label %bb1648 + int 102, label %bb1648 + int 103, label %bb1648 + int 104, label %bb1648 + int 133, label %bb1419 + int 135, label %bb1238 + int 136, label %bb1238 + int 137, label %bb1238 + int 138, label %bb1238 + int 139, label %bb1201 + int 140, label %bb1201 + int 141, label %bb1154 + int 142, label %bb1126 + int 144, label %bb1201 + int 145, label %bb1126 + int 146, label %bb1201 + int 147, label %bb1126 + int 148, label %bb1201 + int 149, label %bb1126 + int 150, label %bb1201 + int 151, label %bb1126 + int 152, label %bb1096 + int 153, label %bb1096 + int 154, label %bb1096 + int 157, label %bb1096 + int 158, label %bb1096 + int 159, label %bb1096 + int 162, label %bb1096 + int 163, label %bb1096 + int 164, label %bb1096 + int 167, label %bb1201 + int 168, label %bb1201 + int 170, label %bb1201 + int 171, label %bb1201 + int 173, label %bb1201 + int 174, label %bb1201 + int 176, label %bb1201 + int 177, label %bb1201 + int 179, label %bb993 + int 180, label %bb993 + int 181, label %bb993 + int 182, label %bb993 + int 183, label %bb993 + int 184, label %bb993 + int 365, label %bb1126 + int 366, label %bb1126 + int 367, label %bb1126 + int 368, label %bb1126 + int 369, label %bb1126 + int 370, label %bb1126 + int 371, label %bb1126 + int 372, label %bb1126 + int 373, label %bb1126 + int 384, label %bb1126 + int 385, label %bb1126 + int 386, label %bb1126 + int 387, label %bb1126 + int 388, label %bb1126 + int 389, label %bb1126 + int 390, label %bb1126 + int 391, label %bb1126 + int 392, label %bb1126 + int 525, label %bb919 + int 526, label %bb839 + int 528, label %bb919 + int 529, label %bb839 + int 531, label %cond_next6.i119 + int 532, label %cond_next6.i97 + int 533, label %cond_next6.i81 + int 534, label %bb495 + int 536, label %cond_next6.i81 + int 537, label %cond_next6.i81 + int 538, label %bb396 + int 539, label %bb288 + int 541, label %bb396 + int 542, label %bb396 + int 543, label %bb396 + int 544, label %bb396 + int 545, label %bb189 + int 546, label %cond_next6.i + int 547, label %bb189 + int 548, label %cond_next6.i + int 549, label %bb189 + int 550, label %cond_next6.i + int 551, label %bb189 + int 552, label %cond_next6.i + int 553, label %bb189 + int 554, label %cond_next6.i + int 555, label %bb189 + int 556, label %cond_next6.i + int 557, label %bb189 + int 558, label %cond_next6.i + int 618, label %bb40 + int 619, label %bb18 + int 620, label %bb40 + int 621, label %bb10 + int 622, label %bb10 + ] + +bb10: ; preds = %cond_true.i, %cond_true.i + ret void + +bb18: ; preds = %cond_true.i + ret void + +bb40: ; preds = %cond_true.i, %cond_true.i + ret void + +cond_next6.i: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb189: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb288: ; preds = %cond_true.i + ret void + +bb396: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb495: ; preds = %cond_true.i + ret void + +cond_next6.i81: ; preds = %cond_true.i, %cond_true.i, %cond_true.i + ret void + +cond_next6.i97: ; preds = %cond_true.i + ret void + +cond_next6.i119: ; preds = %cond_true.i + %tmp.i126 = seteq ushort 0, 78 ; <bool> [#uses=1] + br bool %tmp.i126, label %cond_next778, label %bb802 + +cond_next778: ; preds = %cond_next6.i119 + %tmp781 = seteq uint 0, 1 ; <bool> [#uses=1] + br bool %tmp781, label %cond_next784, label %bb790 + +cond_next784: ; preds = %cond_next778 + %tmp785 = load uint* %ix86_cpu ; <uint> [#uses=1] + %tmp786 = seteq uint %tmp785, 5 ; <bool> [#uses=1] + br bool %tmp786, label %UnifiedReturnBlock, label %bb790 + +bb790: ; preds = %cond_next784, %cond_next778 + %tmp793 = seteq uint 0, 1 ; <bool> [#uses=0] + ret void + +bb802: ; preds = %cond_next6.i119 + ret void + +bb839: ; preds = %cond_true.i, %cond_true.i + ret void + +bb919: ; preds = %cond_true.i, %cond_true.i + ret void + +bb993: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb1096: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb1126: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb1154: ; preds = %cond_true.i + ret void + +bb1201: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb1238: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb1419: ; preds = %cond_true.i + ret void + +bb1648: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + %tmp1650 = load int* %which_alternative ; <int> [#uses=1] + switch int %tmp1650, label %bb1701 [ + int 0, label %cond_next1675 + int 1, label %cond_next1675 + int 2, label %cond_next1675 + ] + +cond_next1675: ; preds = %bb1648, %bb1648, %bb1648 + ret void + +bb1701: ; preds = %bb1648 + %tmp1702 = load int* %which_alternative ; <int> [#uses=1] + switch int %tmp1702, label %bb1808 [ + int 0, label %cond_next1727 + int 1, label %cond_next1727 + int 2, label %cond_next1727 + ] + +cond_next1727: ; preds = %bb1701, %bb1701, %bb1701 + ret void + +bb1808: ; preds = %bb1701 + %bothcond696 = or bool false, false ; <bool> [#uses=1] + br bool %bothcond696, label %bb1876, label %cond_next1834 + +cond_next1834: ; preds = %bb1808 + ret void + +bb1876: ; preds = %bb1808 + %tmp1877signed = load int* %which_alternative ; <int> [#uses=4] + %tmp1877 = cast int %tmp1877signed to uint ; <uint> [#uses=1] + %bothcond699 = setlt uint %tmp1877, 2 ; <bool> [#uses=1] + %tmp1888 = seteq int %tmp1877signed, 2 ; <bool> [#uses=1] + %bothcond700 = or bool %bothcond699, %tmp1888 ; <bool> [#uses=1] + %bothcond700.not = xor bool %bothcond700, true ; <bool> [#uses=1] + %tmp1894 = seteq int %tmp1877signed, 3 ; <bool> [#uses=1] + %bothcond701 = or bool %tmp1894, %bothcond700.not ; <bool> [#uses=1] + %bothcond702 = or bool %bothcond701, false ; <bool> [#uses=1] + br bool %bothcond702, label %UnifiedReturnBlock, label %cond_next1902 + +cond_next1902: ; preds = %bb1876 + switch int %tmp1877signed, label %cond_next1937 [ + int 0, label %bb1918 + int 1, label %bb1918 + int 2, label %bb1918 + ] + +bb1918: ; preds = %cond_next1902, %cond_next1902, %cond_next1902 + ret void + +cond_next1937: ; preds = %cond_next1902 + ret void + +bb1948: ; preds = %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb1994: ; preds = %cond_true.i, %cond_true.i + ret void + +bb2035: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i + ret void + +bb2063: ; preds = %cond_true.i + ret void + +UnifiedReturnBlock: ; preds = %bb1876, %cond_next784, %cond_true.i + %UnifiedRetVal = phi int [ 100, %bb1876 ], [ 100, %cond_true.i ], [ 4, %cond_next784 ] ; <int> [#uses=0] + ret void +} diff --git a/test/CodeGen/Generic/2006-07-03-schedulers.ll b/test/CodeGen/Generic/2006-07-03-schedulers.ll new file mode 100644 index 0000000..6edb7a0 --- /dev/null +++ b/test/CodeGen/Generic/2006-07-03-schedulers.ll @@ -0,0 +1,40 @@ +; RUN: llvm-upgrade %s | llvm-as | llc -pre-RA-sched=none +; RUN: llvm-upgrade %s | llvm-as | llc -pre-RA-sched=default +; RUN: llvm-upgrade %s | llvm-as | llc -pre-RA-sched=simple +; RUN: llvm-upgrade %s | llvm-as | llc -pre-RA-sched=simple-noitin +; RUN: llvm-upgrade %s | llvm-as | llc -pre-RA-sched=list-td +; RUN: llvm-upgrade %s | llvm-as | llc -pre-RA-sched=list-tdrr +; RUN: llvm-upgrade %s | llvm-as | llc -pre-RA-sched=list-burr +; PR859 + +implementation +declare int "printf"(sbyte*, int, float) + + +int "testissue"(int %i, float %x, float %y) +begin + br label %bb1 +bb1: + %x1 = mul float %x, %y ;; x1 + %y1 = mul float %y, 0.75 ;; y1 + %z1 = add float %x1, %y1 ;; z1 = x1 + y1 + + %x2 = mul float %x, 0.5 ;; x2 + %y2 = mul float %y, 0.9 ;; y2 + %z2 = add float %x2, %y2 ;; z2 = x2 + y2 + + %z3 = add float %z1, %z2 ;; z3 = z1 + z2 + + %i1 = shl int %i, ubyte 3 ;; i1 + %j1 = add int %i, 7 ;; j1 + %m1 = add int %i1, %j1 ;; k1 = i1 + j1 +;; %m1 = div int %k1, 99 ;; m1 = k1 / 99 + + %b = setle int %m1, 6 ;; (m1 <= 6)? + br bool %b, label %bb1, label %bb2 + +bb2: + %Msg = cast ulong 0 to sbyte * + call int %printf(sbyte* %Msg, int %m1, float %z3) + ret int 0 +end diff --git a/test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll b/test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll new file mode 100644 index 0000000..68aadc5 --- /dev/null +++ b/test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll @@ -0,0 +1,115 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + + %struct.CUMULATIVE_ARGS = type { int, int, int, int, int, int, int, int, int, int, int, int, int, int } + %struct.VEC_edge = type { uint, uint, [1 x %struct.edge_def*] } + %struct._obstack_chunk = type { sbyte*, %struct._obstack_chunk*, [4 x sbyte] } + %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, sbyte*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, long, int, int, int, int } + %struct.bb_ann_d = type { %struct.tree_node*, ubyte, %struct.edge_prediction* } + %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, uint, [4 x uint] } + %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, uint, %struct.bitmap_obstack* } + %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } + %struct.cost_pair = type { %struct.iv_cand*, uint, %struct.bitmap_head_def* } + %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] } + %struct.def_operand_ptr = type { %struct.tree_node** } + %struct.def_optype_d = type { uint, [1 x %struct.def_operand_ptr] } + %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, sbyte*, %struct.location_t*, int, int, long, uint } + %struct.edge_def_insns = type { %struct.rtx_def* } + %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, uint, int } + %struct.eh_status = type opaque + %struct.emit_status = type { int, int, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, int, %struct.location_t, int, ubyte*, %struct.rtx_def** } + %struct.et_node = type opaque + %struct.expr_status = type { int, int, int, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } + %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, int, int, int, int, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, ubyte, int, long, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, int, %struct.var_refs_queue*, int, int, %struct.rtvec_def*, %struct.tree_node*, int, int, int, %struct.machine_function*, uint, uint, bool, bool, %struct.language_function*, %struct.rtx_def*, uint, int, int, int, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, ubyte, ubyte, ubyte } + %struct.htab = type { uint (sbyte*)*, int (sbyte*, sbyte*)*, void (sbyte*)*, sbyte**, uint, uint, uint, uint, uint, sbyte* (uint, uint)*, void (sbyte*)*, sbyte*, sbyte* (sbyte*, uint, uint)*, void (sbyte*, sbyte*)*, uint } + %struct.initial_value_struct = type opaque + %struct.iv = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, bool, bool, uint } + %struct.iv_cand = type { uint, bool, uint, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.iv*, uint } + %struct.iv_use = type { uint, uint, %struct.iv*, %struct.tree_node*, %struct.tree_node**, %struct.bitmap_head_def*, uint, %struct.cost_pair*, %struct.iv_cand* } + %struct.ivopts_data = type { %struct.loop*, %struct.htab*, uint, %struct.version_info*, %struct.bitmap_head_def*, uint, %struct.varray_head_tag*, %struct.varray_head_tag*, %struct.bitmap_head_def*, bool } + %struct.lang_decl = type opaque + %struct.language_function = type opaque + %struct.location_t = type { sbyte*, int } + %struct.loop = type { int, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.lpt_decision, uint, uint, %struct.edge_def**, int, %struct.basic_block_def*, %struct.basic_block_def*, uint, %struct.edge_def**, int, %struct.edge_def**, int, %struct.simple_bitmap_def*, int, %struct.loop**, int, %struct.loop*, %struct.loop*, %struct.loop*, %struct.loop*, int, sbyte*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, int, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound*, %struct.edge_def*, bool } + %struct.lpt_decision = type { uint, uint } + %struct.machine_function = type { %struct.stack_local_entry*, sbyte*, %struct.rtx_def*, int, int, int, int, int } + %struct.nb_iter_bound = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound* } + %struct.obstack = type { int, %struct._obstack_chunk*, sbyte*, sbyte*, sbyte*, int, int, %struct._obstack_chunk* (sbyte*, int)*, void (sbyte*, %struct._obstack_chunk*)*, sbyte*, ubyte } + %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, int, int, int } + %struct.rtvec_def = type { int, [1 x %struct.rtx_def*] } + %struct.rtx_def = type { ushort, ubyte, ubyte, %struct.u } + %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } + %struct.simple_bitmap_def = type { uint, uint, uint, [1 x ulong] } + %struct.stack_local_entry = type opaque + %struct.stmt_ann_d = type { %struct.tree_ann_common_d, ubyte, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, uint } + %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* } + %struct.temp_slot = type opaque + %struct.tree_ann_common_d = type { uint, sbyte*, %struct.tree_node* } + %struct.tree_ann_d = type { %struct.stmt_ann_d } + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, ubyte, ubyte, ubyte, ubyte, ubyte } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, uint, %struct.tree_node*, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, uint, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, int, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, long, %struct.lang_decl* } + %struct.tree_decl_u1 = type { long } + %struct.tree_decl_u2 = type { %struct.function* } + %struct.tree_node = type { %struct.tree_decl } + %struct.u = type { [1 x long] } + %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* } + %struct.v_may_def_optype_d = type { uint, [1 x %struct.v_def_use_operand_type_t] } + %struct.var_refs_queue = type { %struct.rtx_def*, uint, int, %struct.var_refs_queue* } + %struct.varasm_status = type opaque + %struct.varray_head_tag = type { uint, uint, uint, sbyte*, %struct.u } + %struct.version_info = type { %struct.tree_node*, %struct.iv*, bool, uint, bool } + %struct.vuse_optype_d = type { uint, [1 x %struct.tree_node*] } + +implementation ; Functions: + +bool %determine_use_iv_cost(%struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand) { +entry: + switch uint 0, label %bb91 [ + uint 0, label %bb + uint 1, label %bb6 + uint 3, label %cond_next135 + ] + +bb: ; preds = %entry + ret bool false + +bb6: ; preds = %entry + br bool false, label %bb87, label %cond_next27 + +cond_next27: ; preds = %bb6 + br bool false, label %cond_true30, label %cond_next55 + +cond_true30: ; preds = %cond_next27 + br bool false, label %cond_next41, label %cond_true35 + +cond_true35: ; preds = %cond_true30 + ret bool false + +cond_next41: ; preds = %cond_true30 + %tmp44 = call uint %force_var_cost( %struct.ivopts_data* %data, %struct.tree_node* null, %struct.bitmap_head_def** null ) ; <uint> [#uses=2] + %tmp46 = div uint %tmp44, 5 ; <uint> [#uses=1] + call void %set_use_iv_cost( %struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand, uint %tmp46, %struct.bitmap_head_def* null ) + %tmp44.off = add uint %tmp44, 4244967296 ; <uint> [#uses=1] + %tmp52 = setgt uint %tmp44.off, 4 ; <bool> [#uses=1] + %tmp52 = cast bool %tmp52 to int ; <int> [#uses=1] + br label %bb87 + +cond_next55: ; preds = %cond_next27 + ret bool false + +bb87: ; preds = %cond_next41, %bb6 + %tmp2.0 = phi int [ %tmp52, %cond_next41 ], [ 1, %bb6 ] ; <int> [#uses=0] + ret bool false + +bb91: ; preds = %entry + ret bool false + +cond_next135: ; preds = %entry + %tmp193 = call bool %determine_use_iv_cost_generic( %struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand ) ; <bool> [#uses=0] + ret bool false +} + +declare void %set_use_iv_cost(%struct.ivopts_data*, %struct.iv_use*, %struct.iv_cand*, uint, %struct.bitmap_head_def*) + +declare uint %force_var_cost(%struct.ivopts_data*, %struct.tree_node*, %struct.bitmap_head_def**) + +declare bool %determine_use_iv_cost_generic(%struct.ivopts_data*, %struct.iv_use*, %struct.iv_cand*) diff --git a/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll b/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll new file mode 100644 index 0000000..e2f07e8 --- /dev/null +++ b/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll @@ -0,0 +1,115 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -regalloc=local + + %struct.CHESS_POSITION = type { ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, ulong, uint, int, sbyte, sbyte, [64 x sbyte], sbyte, sbyte, sbyte, sbyte, sbyte } +%search = external global %struct.CHESS_POSITION ; <%struct.CHESS_POSITION*> [#uses=2] +%bishop_shift_rl45 = external global [64 x int] ; <[64 x int]*> [#uses=1] +%bishop_shift_rr45 = external global [64 x int] ; <[64 x int]*> [#uses=1] +%black_outpost = external global [64 x sbyte] ; <[64 x sbyte]*> [#uses=1] +%bishop_mobility_rl45 = external global [64 x [256 x int]] ; <[64 x [256 x int]]*> [#uses=1] +%bishop_mobility_rr45 = external global [64 x [256 x int]] ; <[64 x [256 x int]]*> [#uses=1] + +implementation ; Functions: + +declare fastcc int %FirstOne() + +fastcc void %Evaluate() { +entry: + br bool false, label %cond_false186, label %cond_true + +cond_true: ; preds = %entry + ret void + +cond_false186: ; preds = %entry + br bool false, label %cond_true293, label %bb203 + +bb203: ; preds = %cond_false186 + ret void + +cond_true293: ; preds = %cond_false186 + br bool false, label %cond_true298, label %cond_next317 + +cond_true298: ; preds = %cond_true293 + br bool false, label %cond_next518, label %cond_true397.preheader + +cond_next317: ; preds = %cond_true293 + ret void + +cond_true397.preheader: ; preds = %cond_true298 + ret void + +cond_next518: ; preds = %cond_true298 + br bool false, label %bb1069, label %cond_true522 + +cond_true522: ; preds = %cond_next518 + ret void + +bb1069: ; preds = %cond_next518 + br bool false, label %cond_next1131, label %bb1096 + +bb1096: ; preds = %bb1069 + ret void + +cond_next1131: ; preds = %bb1069 + br bool false, label %cond_next1207, label %cond_true1150 + +cond_true1150: ; preds = %cond_next1131 + ret void + +cond_next1207: ; preds = %cond_next1131 + br bool false, label %cond_next1219, label %cond_true1211 + +cond_true1211: ; preds = %cond_next1207 + ret void + +cond_next1219: ; preds = %cond_next1207 + br bool false, label %cond_true1223, label %cond_next1283 + +cond_true1223: ; preds = %cond_next1219 + br bool false, label %cond_true1254, label %cond_true1264 + +cond_true1254: ; preds = %cond_true1223 + br bool false, label %bb1567, label %cond_true1369.preheader + +cond_true1264: ; preds = %cond_true1223 + ret void + +cond_next1283: ; preds = %cond_next1219 + ret void + +cond_true1369.preheader: ; preds = %cond_true1254 + ret void + +bb1567: ; preds = %cond_true1254 + %tmp1580 = load ulong* getelementptr (%struct.CHESS_POSITION* %search, int 0, uint 3) ; <ulong> [#uses=1] + %tmp1591 = load ulong* getelementptr (%struct.CHESS_POSITION* %search, int 0, uint 4) ; <ulong> [#uses=1] + %tmp1572 = tail call fastcc int %FirstOne( ) ; <int> [#uses=5] + %tmp1582 = getelementptr [64 x int]* %bishop_shift_rl45, int 0, int %tmp1572 ; <int*> [#uses=1] + %tmp1583 = load int* %tmp1582 ; <int> [#uses=1] + %tmp1583 = cast int %tmp1583 to ubyte ; <ubyte> [#uses=1] + %tmp1584 = shr ulong %tmp1580, ubyte %tmp1583 ; <ulong> [#uses=1] + %tmp1584 = cast ulong %tmp1584 to uint ; <uint> [#uses=1] + %tmp1585 = and uint %tmp1584, 255 ; <uint> [#uses=1] + %tmp1587 = getelementptr [64 x [256 x int]]* %bishop_mobility_rl45, int 0, int %tmp1572, uint %tmp1585 ; <int*> [#uses=1] + %tmp1588 = load int* %tmp1587 ; <int> [#uses=1] + %tmp1593 = getelementptr [64 x int]* %bishop_shift_rr45, int 0, int %tmp1572 ; <int*> [#uses=1] + %tmp1594 = load int* %tmp1593 ; <int> [#uses=1] + %tmp1594 = cast int %tmp1594 to ubyte ; <ubyte> [#uses=1] + %tmp1595 = shr ulong %tmp1591, ubyte %tmp1594 ; <ulong> [#uses=1] + %tmp1595 = cast ulong %tmp1595 to uint ; <uint> [#uses=1] + %tmp1596 = and uint %tmp1595, 255 ; <uint> [#uses=1] + %tmp1598 = getelementptr [64 x [256 x int]]* %bishop_mobility_rr45, int 0, int %tmp1572, uint %tmp1596 ; <int*> [#uses=1] + %tmp1599 = load int* %tmp1598 ; <int> [#uses=1] + %tmp1600.neg = sub int 0, %tmp1588 ; <int> [#uses=1] + %tmp1602 = sub int %tmp1600.neg, %tmp1599 ; <int> [#uses=1] + %tmp1604 = getelementptr [64 x sbyte]* %black_outpost, int 0, int %tmp1572 ; <sbyte*> [#uses=1] + %tmp1605 = load sbyte* %tmp1604 ; <sbyte> [#uses=1] + %tmp1606 = seteq sbyte %tmp1605, 0 ; <bool> [#uses=1] + br bool %tmp1606, label %cond_next1637, label %cond_true1607 + +cond_true1607: ; preds = %bb1567 + ret void + +cond_next1637: ; preds = %bb1567 + %tmp1662 = sub int %tmp1602, 0 ; <int> [#uses=0] + ret void +} diff --git a/test/CodeGen/Generic/2006-09-06-SwitchLowering.ll b/test/CodeGen/Generic/2006-09-06-SwitchLowering.ll new file mode 100644 index 0000000..2b12926 --- /dev/null +++ b/test/CodeGen/Generic/2006-09-06-SwitchLowering.ll @@ -0,0 +1,96 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %foo() { + br label %cond_true813.i + +cond_true813.i: ; preds = %0 + br bool false, label %cond_true818.i, label %cond_next1146.i + +cond_true818.i: ; preds = %cond_true813.i + br bool false, label %recog_memoized.exit52, label %cond_next1146.i + +recog_memoized.exit52: ; preds = %cond_true818.i + switch int 0, label %bb886.i.preheader [ + int 0, label %bb907.i + int 44, label %bb866.i + int 103, label %bb874.i + int 114, label %bb874.i + ] + +bb857.i: ; preds = %bb886.i, %bb866.i + %tmp862.i494.24 = phi sbyte* [ null, %bb866.i ], [ %tmp862.i494.26, %bb886.i ] ; <sbyte*> [#uses=4] + switch int 0, label %bb886.i.preheader [ + int 0, label %bb907.i + int 44, label %bb866.i + int 103, label %bb874.i + int 114, label %bb874.i + ] + +bb866.i.loopexit: ; preds = %bb874.i + br label %bb866.i + +bb866.i.loopexit31: ; preds = %cond_true903.i + br label %bb866.i + +bb866.i: ; preds = %bb866.i.loopexit31, %bb866.i.loopexit, %bb857.i, %recog_memoized.exit52 + br bool false, label %bb907.i, label %bb857.i + +bb874.i.preheader.loopexit: ; preds = %cond_true903.i, %cond_true903.i + ret void + +bb874.i: ; preds = %bb857.i, %bb857.i, %recog_memoized.exit52, %recog_memoized.exit52 + %tmp862.i494.25 = phi sbyte* [ %tmp862.i494.24, %bb857.i ], [ %tmp862.i494.24, %bb857.i ], [ undef, %recog_memoized.exit52 ], [ undef, %recog_memoized.exit52 ] ; <sbyte*> [#uses=1] + switch int 0, label %bb886.i.preheader.loopexit [ + int 0, label %bb907.i + int 44, label %bb866.i.loopexit + int 103, label %bb874.i.backedge + int 114, label %bb874.i.backedge + ] + +bb874.i.backedge: ; preds = %bb874.i, %bb874.i + ret void + +bb886.i.preheader.loopexit: ; preds = %bb874.i + ret void + +bb886.i.preheader: ; preds = %bb857.i, %recog_memoized.exit52 + %tmp862.i494.26 = phi sbyte* [ undef, %recog_memoized.exit52 ], [ %tmp862.i494.24, %bb857.i ] ; <sbyte*> [#uses=1] + br label %bb886.i + +bb886.i: ; preds = %cond_true903.i, %bb886.i.preheader + br bool false, label %bb857.i, label %cond_true903.i + +cond_true903.i: ; preds = %bb886.i + switch int 0, label %bb886.i [ + int 0, label %bb907.i + int 44, label %bb866.i.loopexit31 + int 103, label %bb874.i.preheader.loopexit + int 114, label %bb874.i.preheader.loopexit + ] + +bb907.i: ; preds = %cond_true903.i, %bb874.i, %bb866.i, %bb857.i, %recog_memoized.exit52 + %tmp862.i494.0 = phi sbyte* [ %tmp862.i494.24, %bb857.i ], [ null, %bb866.i ], [ undef, %recog_memoized.exit52 ], [ %tmp862.i494.25, %bb874.i ], [ null, %cond_true903.i ] ; <sbyte*> [#uses=1] + br bool false, label %cond_next1146.i, label %cond_true910.i + +cond_true910.i: ; preds = %bb907.i + ret void + +cond_next1146.i: ; preds = %bb907.i, %cond_true818.i, %cond_true813.i + %tmp862.i494.1 = phi sbyte* [ %tmp862.i494.0, %bb907.i ], [ undef, %cond_true818.i ], [ undef, %cond_true813.i ] ; <sbyte*> [#uses=0] + ret void + +bb2060.i: ; No predecessors! + br bool false, label %cond_true2064.i, label %bb2067.i + +cond_true2064.i: ; preds = %bb2060.i + unreachable + +bb2067.i: ; preds = %bb2060.i + ret void + +cond_next3473: ; No predecessors! + ret void + +cond_next3521: ; No predecessors! + ret void +} diff --git a/test/CodeGen/Generic/2006-10-27-CondFolding.ll b/test/CodeGen/Generic/2006-10-27-CondFolding.ll new file mode 100644 index 0000000..8bf3c11 --- /dev/null +++ b/test/CodeGen/Generic/2006-10-27-CondFolding.ll @@ -0,0 +1,21 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %start_pass_huff(int %gather_statistics) { +entry: + %tmp = seteq int %gather_statistics, 0 ; <bool> [#uses=1] + br bool false, label %cond_next22, label %bb166 + +cond_next22: ; preds = %entry + %bothcond = and bool false, %tmp ; <bool> [#uses=1] + br bool %bothcond, label %bb34, label %bb46 + +bb34: ; preds = %cond_next22 + ret void + +bb46: ; preds = %cond_next22 + ret void + +bb166: ; preds = %entry + ret void +} + diff --git a/test/CodeGen/Generic/2006-10-29-Crash.ll b/test/CodeGen/Generic/2006-10-29-Crash.ll new file mode 100644 index 0000000..8857c93 --- /dev/null +++ b/test/CodeGen/Generic/2006-10-29-Crash.ll @@ -0,0 +1,21 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %form_component_prediction(int %dy) { +entry: + %tmp7 = and int %dy, 1 ; <int> [#uses=1] + %tmp27 = seteq int %tmp7, 0 ; <bool> [#uses=1] + br bool false, label %cond_next30, label %bb115 + +cond_next30: ; preds = %entry + ret void + +bb115: ; preds = %entry + %bothcond1 = or bool %tmp27, false ; <bool> [#uses=1] + br bool %bothcond1, label %bb228, label %cond_next125 + +cond_next125: ; preds = %bb115 + ret void + +bb228: ; preds = %bb115 + ret void +} diff --git a/test/CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll b/test/CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll new file mode 100644 index 0000000..330bee6 --- /dev/null +++ b/test/CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep adc + +; PR987 + +declare void %llvm.memcpy.i64(sbyte*, sbyte*, ulong, uint) + +void %foo(ulong %a) { + %b = add ulong %a, 1 +call void %llvm.memcpy.i64( sbyte* null, sbyte* null, ulong %b, uint 1 ) + ret void +} diff --git a/test/CodeGen/Generic/2006-11-20-DAGCombineCrash.ll b/test/CodeGen/Generic/2006-11-20-DAGCombineCrash.ll new file mode 100644 index 0000000..6a76079 --- /dev/null +++ b/test/CodeGen/Generic/2006-11-20-DAGCombineCrash.ll @@ -0,0 +1,44 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; PR1011 + + %struct.mng_data = type { sbyte* (%struct.mng_data*, uint)*, int, int, int, sbyte, sbyte, int, int, int, int, int } + +implementation ; Functions: + +void %mng_display_bgr565() { +entry: + br bool false, label %bb.preheader, label %return + +bb.preheader: ; preds = %entry + br bool false, label %cond_true48, label %cond_next80 + +cond_true48: ; preds = %bb.preheader + %tmp = load ubyte* null ; <ubyte> [#uses=1] + %tmp51 = cast ubyte %tmp to ushort ; <ushort> [#uses=1] + %tmp99 = load sbyte* null ; <sbyte> [#uses=1] + %tmp54 = cast sbyte %tmp99 to ubyte ; <ubyte> [#uses=1] + %tmp54 = cast ubyte %tmp54 to int ; <int> [#uses=1] + %tmp55 = lshr int %tmp54, ubyte 3 ; <int> [#uses=1] + %tmp55 = cast int %tmp55 to ushort ; <ushort> [#uses=1] + %tmp52 = shl ushort %tmp51, ubyte 5 ; <ushort> [#uses=1] + %tmp56 = and ushort %tmp55, 28 ; <ushort> [#uses=1] + %tmp57 = or ushort %tmp56, %tmp52 ; <ushort> [#uses=1] + %tmp60 = cast ushort %tmp57 to uint ; <uint> [#uses=1] + %tmp62 = xor uint 0, 65535 ; <uint> [#uses=1] + %tmp63 = mul uint %tmp60, %tmp62 ; <uint> [#uses=1] + %tmp65 = add uint 0, %tmp63 ; <uint> [#uses=1] + %tmp69 = add uint 0, %tmp65 ; <uint> [#uses=1] + %tmp70 = lshr uint %tmp69, ubyte 16 ; <uint> [#uses=1] + %tmp70 = cast uint %tmp70 to ushort ; <ushort> [#uses=1] + %tmp75 = lshr ushort %tmp70, ubyte 8 ; <ushort> [#uses=1] + %tmp75 = cast ushort %tmp75 to ubyte ; <ubyte> [#uses=1] + %tmp76 = lshr ubyte %tmp75, ubyte 5 ; <ubyte> [#uses=1] + store ubyte %tmp76, ubyte* null + ret void + +cond_next80: ; preds = %bb.preheader + ret void + +return: ; preds = %entry + ret void +} diff --git a/test/CodeGen/Generic/2006-12-16-InlineAsmCrash.ll b/test/CodeGen/Generic/2006-12-16-InlineAsmCrash.ll new file mode 100644 index 0000000..e4a3906 --- /dev/null +++ b/test/CodeGen/Generic/2006-12-16-InlineAsmCrash.ll @@ -0,0 +1,34 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; PR1049 +target datalayout = "e-p:32:32" +target endian = little +target pointersize = 32 +target triple = "i686-pc-linux-gnu" + %struct.QBasicAtomic = type { int } + %struct.QByteArray = type { "struct.QByteArray::Data"* } + "struct.QByteArray::Data" = type { %struct.QBasicAtomic, int, int, sbyte*, [1 x sbyte] } + %struct.QFactoryLoader = type { %struct.QObject } + %struct.QImageIOHandler = type { int (...)**, %struct.QImageIOHandlerPrivate* } + %struct.QImageIOHandlerPrivate = type opaque + %struct.QImageWriter = type { %struct.QImageWriterPrivate* } + %struct.QImageWriterPrivate = type { %struct.QByteArray, %struct.QFactoryLoader*, bool, %struct.QImageIOHandler*, int, float, %struct.QString, %struct.QString, uint, %struct.QString, %struct.QImageWriter* } + "struct.QList<QByteArray>" = type { "struct.QList<QByteArray>::._20" } + "struct.QList<QByteArray>::._20" = type { %struct.QListData } + %struct.QListData = type { "struct.QListData::Data"* } + "struct.QListData::Data" = type { %struct.QBasicAtomic, int, int, int, ubyte, [1 x sbyte*] } + %struct.QObject = type { int (...)**, %struct.QObjectData* } + %struct.QObjectData = type { int (...)**, %struct.QObject*, %struct.QObject*, "struct.QList<QByteArray>", ubyte, [3 x ubyte], int, int } + %struct.QString = type { "struct.QString::Data"* } + "struct.QString::Data" = type { %struct.QBasicAtomic, int, int, ushort*, ubyte, ubyte, [1 x ushort] } + +implementation ; Functions: + +bool %_ZNK12QImageWriter8canWriteEv() { + %tmp62 = load %struct.QImageWriterPrivate** null ; <%struct.QImageWriterPrivate*> [#uses=1] + %tmp = getelementptr %struct.QImageWriterPrivate* %tmp62, int 0, uint 9 ; <%struct.QString*> [#uses=1] + %tmp75 = call %struct.QString* %_ZN7QStringaSERKS_( %struct.QString* %tmp, %struct.QString* null ) ; <%struct.QString*> [#uses=0] + call void asm sideeffect "lock\0Adecl $0\0Asetne 1", "=*m"( int* null ) + ret bool false +} + +declare %struct.QString* %_ZN7QStringaSERKS_(%struct.QString*, %struct.QString*) diff --git a/test/CodeGen/Generic/2007-01-15-LoadSelectCycle.ll b/test/CodeGen/Generic/2007-01-15-LoadSelectCycle.ll new file mode 100644 index 0000000..49203d9 --- /dev/null +++ b/test/CodeGen/Generic/2007-01-15-LoadSelectCycle.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc +; PR1114 + +declare i1 @foo() + +define i32 @test(i32* %A, i32* %B) { + %a = load i32* %A + %b = load i32* %B + %cond = call i1 @foo() + %c = select i1 %cond, i32 %a, i32 %b + ret i32 %c +} diff --git a/test/CodeGen/Generic/2007-02-16-BranchFold.ll b/test/CodeGen/Generic/2007-02-16-BranchFold.ll new file mode 100644 index 0000000..0a8e49e --- /dev/null +++ b/test/CodeGen/Generic/2007-02-16-BranchFold.ll @@ -0,0 +1,95 @@ +; PR 1200 +; RUN: llvm-as < %s | llc -enable-tail-merge=0 | not grep jmp + +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32" +target triple = "i686-apple-darwin8" + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.Index_Map = type { i32, %struct.item_set** } + %struct.Item = type { [4 x i16], %struct.rule* } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { i8*, i32 } + %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* } + %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* } + %struct.list = type { i8*, %struct.list* } + %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** } + %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* } + %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* } + %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] } + %struct.plank = type { i8*, %struct.list*, i32 } + %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* } + %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 } + %struct.stateMap = type { i8*, %struct.plank*, i32, i16* } + %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** } +@outfile = external global %struct.FILE* ; <%struct.FILE**> [#uses=1] +@str1 = external global [11 x i8] ; <[11 x i8]*> [#uses=1] + +declare i32 @fprintf(%struct.FILE*, i8*, ...) + +define i16 @main_bb_2E_i9_2E_i_2E_i932_2E_ce(%struct.list* %l_addr.01.0.i2.i.i929, %struct.operator** %tmp66.i62.i.out) { +newFuncRoot: + br label %bb.i9.i.i932.ce + +NewDefault: ; preds = %LeafBlock, %LeafBlock1, %LeafBlock2, %LeafBlock3 + br label %bb36.i.i.exitStub + +bb36.i.i.exitStub: ; preds = %NewDefault + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 0 + +bb.i14.i.exitStub: ; preds = %LeafBlock + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 1 + +bb12.i.i935.exitStub: ; preds = %LeafBlock1 + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 2 + +bb20.i.i937.exitStub: ; preds = %LeafBlock2 + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 3 + +bb28.i.i938.exitStub: ; preds = %LeafBlock3 + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 4 + +bb.i9.i.i932.ce: ; preds = %newFuncRoot + %tmp1.i3.i.i930 = getelementptr %struct.list* %l_addr.01.0.i2.i.i929, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2.i4.i.i931 = load i8** %tmp1.i3.i.i930 ; <i8*> [#uses=1] + %tmp66.i62.i = bitcast i8* %tmp2.i4.i.i931 to %struct.operator* ; <%struct.operator*> [#uses=7] + %tmp1.i6.i = getelementptr %struct.operator* %tmp66.i62.i, i32 0, i32 2 ; <i32*> [#uses=1] + %tmp2.i7.i = load i32* %tmp1.i6.i ; <i32> [#uses=1] + %tmp3.i8.i = load %struct.FILE** @outfile ; <%struct.FILE*> [#uses=1] + %tmp5.i9.i = call i32 (%struct.FILE*, i8*, ...)* @fprintf( %struct.FILE* %tmp3.i8.i, i8* getelementptr ([11 x i8]* @str1, i32 0, i32 0), i32 %tmp2.i7.i ) ; <i32> [#uses=0] + %tmp7.i10.i = getelementptr %struct.operator* %tmp66.i62.i, i32 0, i32 5 ; <i32*> [#uses=1] + %tmp8.i11.i = load i32* %tmp7.i10.i ; <i32> [#uses=7] + br label %NodeBlock5 + +NodeBlock5: ; preds = %bb.i9.i.i932.ce + icmp slt i32 %tmp8.i11.i, 1 ; <i1>:0 [#uses=1] + br i1 %0, label %NodeBlock, label %NodeBlock4 + +NodeBlock4: ; preds = %NodeBlock5 + icmp slt i32 %tmp8.i11.i, 2 ; <i1>:1 [#uses=1] + br i1 %1, label %LeafBlock2, label %LeafBlock3 + +LeafBlock3: ; preds = %NodeBlock4 + icmp eq i32 %tmp8.i11.i, 2 ; <i1>:2 [#uses=1] + br i1 %2, label %bb28.i.i938.exitStub, label %NewDefault + +LeafBlock2: ; preds = %NodeBlock4 + icmp eq i32 %tmp8.i11.i, 1 ; <i1>:3 [#uses=1] + br i1 %3, label %bb20.i.i937.exitStub, label %NewDefault + +NodeBlock: ; preds = %NodeBlock5 + icmp slt i32 %tmp8.i11.i, 0 ; <i1>:4 [#uses=1] + br i1 %4, label %LeafBlock, label %LeafBlock1 + +LeafBlock1: ; preds = %NodeBlock + icmp eq i32 %tmp8.i11.i, 0 ; <i1>:5 [#uses=1] + br i1 %5, label %bb12.i.i935.exitStub, label %NewDefault + +LeafBlock: ; preds = %NodeBlock + icmp eq i32 %tmp8.i11.i, -1 ; <i1>:6 [#uses=1] + br i1 %6, label %bb.i14.i.exitStub, label %NewDefault +} diff --git a/test/CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll b/test/CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll new file mode 100644 index 0000000..63a1498 --- /dev/null +++ b/test/CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll @@ -0,0 +1,13 @@ +; PR1219 +; RUN: llvm-as < %s | llc -march=x86 | grep {movl \$1, %eax} + +define i32 @test(i1 %X) { +old_entry1: + %hvar2 = zext i1 %X to i32 + %C = icmp sgt i32 %hvar2, -1 + br i1 %C, label %cond_true15, label %cond_true +cond_true15: + ret i32 1 +cond_true: + ret i32 2 +} diff --git a/test/CodeGen/Generic/2007-02-25-invoke.ll b/test/CodeGen/Generic/2007-02-25-invoke.ll new file mode 100644 index 0000000..6dba99e --- /dev/null +++ b/test/CodeGen/Generic/2007-02-25-invoke.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc + +; PR1224 + +declare i32 @test() +define i32 @test2() { + %A = invoke i32 @test() to label %invcont unwind label %blat +invcont: + ret i32 %A +blat: + ret i32 0 +} diff --git a/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll b/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll new file mode 100644 index 0000000..9cbf314 --- /dev/null +++ b/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc +; XFAIL: sparc-sun-solaris2 +; PR1308 +; PR1557 + +define i32 @stuff(i32, ...) { + %foo = alloca i8* + %bar = alloca i32* + %A = call i32 asm sideeffect "inline asm $0 $2 $3 $4", "=r,0,i,m,m"( i32 0, i32 1, i8** %foo, i32** %bar ) + ret i32 %A +} diff --git a/test/CodeGen/Generic/2007-04-13-SwitchLowerBadPhi.ll b/test/CodeGen/Generic/2007-04-13-SwitchLowerBadPhi.ll new file mode 100644 index 0000000..b95a361 --- /dev/null +++ b/test/CodeGen/Generic/2007-04-13-SwitchLowerBadPhi.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -fast +; PR 1323 + +; ModuleID = 'test.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + %struct.comp = type { i8*, i32, i8*, [3 x i8], i32 } + +define void @regbranch() { +cond_next240.i: + br i1 false, label %cond_true251.i, label %cond_next272.i + +cond_true251.i: ; preds = %cond_next240.i + switch i8 0, label %cond_next272.i [ + i8 42, label %bb268.i + i8 43, label %bb268.i + i8 63, label %bb268.i + ] + +bb268.i: ; preds = %cond_true251.i, %cond_true251.i, %cond_true251.i + br label %cond_next272.i + +cond_next272.i: ; preds = %bb268.i, %cond_true251.i, %cond_next240.i + %len.2.i = phi i32 [ 0, %bb268.i ], [ 0, %cond_next240.i ], [ 0, %cond_true251.i ] ; <i32> [#uses=1] + %tmp278.i = icmp eq i32 %len.2.i, 1 ; <i1> [#uses=0] + ret void +} diff --git a/test/CodeGen/Generic/2007-04-14-BitTestsBadMask.ll b/test/CodeGen/Generic/2007-04-14-BitTestsBadMask.ll new file mode 100644 index 0000000..5490687 --- /dev/null +++ b/test/CodeGen/Generic/2007-04-14-BitTestsBadMask.ll @@ -0,0 +1,160 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep 8388635 +; RUN: llvm-as < %s | llc -march=x86-64 | grep 4294981120 +; PR 1325 + +; ModuleID = 'bugpoint.test.bc' +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "powerpc-apple-darwin8.8.0" +;target triple = "i686-linux-gnu" + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { i8*, i32 } +@PL_rsfp = external global %struct.FILE* ; <%struct.FILE**> [#uses=1] +@PL_bufend = external global i8* ; <i8**> [#uses=1] +@PL_in_eval = external global i32 ; <i32*> [#uses=1] + +declare fastcc void @incline(i8*) + +define i16 @Perl_skipspace_bb60(i8* %s, i8** %s_addr.4.out) { +newFuncRoot: + %tmp138.loc = alloca i8* ; <i8**> [#uses=2] + %s_addr.4.loc = alloca i8* ; <i8**> [#uses=2] + %tmp274.loc = alloca i8* ; <i8**> [#uses=2] + br label %bb60 + +cond_next154.UnifiedReturnBlock_crit_edge.exitStub: ; preds = %codeRepl + store i8* %s_addr.4.reload, i8** %s_addr.4.out + ret i16 0 + +cond_next161.UnifiedReturnBlock_crit_edge.exitStub: ; preds = %codeRepl + store i8* %s_addr.4.reload, i8** %s_addr.4.out + ret i16 1 + +cond_next167.UnifiedReturnBlock_crit_edge.exitStub: ; preds = %codeRepl + store i8* %s_addr.4.reload, i8** %s_addr.4.out + ret i16 2 + +cond_false29.i.cond_true190_crit_edge.exitStub: ; preds = %codeRepl + store i8* %s_addr.4.reload, i8** %s_addr.4.out + ret i16 3 + +cond_next.i.cond_true190_crit_edge.exitStub: ; preds = %codeRepl + store i8* %s_addr.4.reload, i8** %s_addr.4.out + ret i16 4 + +cond_true19.i.cond_true190_crit_edge.exitStub: ; preds = %codeRepl + store i8* %s_addr.4.reload, i8** %s_addr.4.out + ret i16 5 + +bb60: ; preds = %bb60.backedge, %newFuncRoot + %s_addr.2 = phi i8* [ %s, %newFuncRoot ], [ %s_addr.2.be, %bb60.backedge ] ; <i8*> [#uses=3] + %tmp61 = load i8** @PL_bufend ; <i8*> [#uses=1] + %tmp63 = icmp ult i8* %s_addr.2, %tmp61 ; <i1> [#uses=1] + br i1 %tmp63, label %bb60.cond_next67_crit_edge, label %bb60.bb101_crit_edge + +bb37: ; preds = %cond_next67.bb37_crit_edge5, %cond_next67.bb37_crit_edge4, %cond_next67.bb37_crit_edge3, %cond_next67.bb37_crit_edge2, %cond_next67.bb37_crit_edge + %tmp40 = icmp eq i8 %tmp69, 10 ; <i1> [#uses=1] + %tmp43 = getelementptr i8* %s_addr.27.2, i32 1 ; <i8*> [#uses=5] + br i1 %tmp40, label %cond_true45, label %bb37.bb60_crit_edge + +cond_true45: ; preds = %bb37 + %tmp46 = volatile load i32* @PL_in_eval ; <i32> [#uses=1] + %tmp47 = icmp eq i32 %tmp46, 0 ; <i1> [#uses=1] + br i1 %tmp47, label %cond_true45.bb60_crit_edge, label %cond_true50 + +cond_true50: ; preds = %cond_true45 + %tmp51 = volatile load %struct.FILE** @PL_rsfp ; <%struct.FILE*> [#uses=1] + %tmp52 = icmp eq %struct.FILE* %tmp51, null ; <i1> [#uses=1] + br i1 %tmp52, label %cond_true55, label %cond_true50.bb60_crit_edge + +cond_true55: ; preds = %cond_true50 + tail call fastcc void @incline( i8* %tmp43 ) + br label %bb60.backedge + +cond_next67: ; preds = %Perl_newSV.exit.cond_next67_crit_edge, %cond_true148.cond_next67_crit_edge, %bb60.cond_next67_crit_edge + %s_addr.27.2 = phi i8* [ %s_addr.2, %bb60.cond_next67_crit_edge ], [ %tmp274.reload, %Perl_newSV.exit.cond_next67_crit_edge ], [ %tmp138.reload, %cond_true148.cond_next67_crit_edge ] ; <i8*> [#uses=3] + %tmp69 = load i8* %s_addr.27.2 ; <i8> [#uses=2] + switch i8 %tmp69, label %cond_next67.bb101_crit_edge [ + i8 32, label %cond_next67.bb37_crit_edge + i8 9, label %cond_next67.bb37_crit_edge2 + i8 10, label %cond_next67.bb37_crit_edge3 + i8 13, label %cond_next67.bb37_crit_edge4 + i8 12, label %cond_next67.bb37_crit_edge5 + ] + +codeRepl: ; preds = %bb101.preheader + %targetBlock = call i16 @Perl_skipspace_bb60_bb101( i8* %s_addr.27.3.ph, i8** %tmp274.loc, i8** %s_addr.4.loc, i8** %tmp138.loc ) ; <i16> [#uses=1] + %tmp274.reload = load i8** %tmp274.loc ; <i8*> [#uses=4] + %s_addr.4.reload = load i8** %s_addr.4.loc ; <i8*> [#uses=6] + %tmp138.reload = load i8** %tmp138.loc ; <i8*> [#uses=1] + switch i16 %targetBlock, label %cond_true19.i.cond_true190_crit_edge.exitStub [ + i16 0, label %cond_next271.bb60_crit_edge + i16 1, label %cond_true290.bb60_crit_edge + i16 2, label %cond_true295.bb60_crit_edge + i16 3, label %Perl_newSV.exit.cond_next67_crit_edge + i16 4, label %cond_true148.cond_next67_crit_edge + i16 5, label %cond_next154.UnifiedReturnBlock_crit_edge.exitStub + i16 6, label %cond_next161.UnifiedReturnBlock_crit_edge.exitStub + i16 7, label %cond_next167.UnifiedReturnBlock_crit_edge.exitStub + i16 8, label %cond_false29.i.cond_true190_crit_edge.exitStub + i16 9, label %cond_next.i.cond_true190_crit_edge.exitStub + ] + +bb37.bb60_crit_edge: ; preds = %bb37 + br label %bb60.backedge + +cond_true45.bb60_crit_edge: ; preds = %cond_true45 + br label %bb60.backedge + +cond_true50.bb60_crit_edge: ; preds = %cond_true50 + br label %bb60.backedge + +bb60.cond_next67_crit_edge: ; preds = %bb60 + br label %cond_next67 + +bb60.bb101_crit_edge: ; preds = %bb60 + br label %bb101.preheader + +cond_next67.bb101_crit_edge: ; preds = %cond_next67 + br label %bb101.preheader + +cond_next67.bb37_crit_edge: ; preds = %cond_next67 + br label %bb37 + +cond_next67.bb37_crit_edge2: ; preds = %cond_next67 + br label %bb37 + +cond_next67.bb37_crit_edge3: ; preds = %cond_next67 + br label %bb37 + +cond_next67.bb37_crit_edge4: ; preds = %cond_next67 + br label %bb37 + +cond_next67.bb37_crit_edge5: ; preds = %cond_next67 + br label %bb37 + +cond_true148.cond_next67_crit_edge: ; preds = %codeRepl + br label %cond_next67 + +cond_next271.bb60_crit_edge: ; preds = %codeRepl + br label %bb60.backedge + +cond_true290.bb60_crit_edge: ; preds = %codeRepl + br label %bb60.backedge + +cond_true295.bb60_crit_edge: ; preds = %codeRepl + br label %bb60.backedge + +Perl_newSV.exit.cond_next67_crit_edge: ; preds = %codeRepl + br label %cond_next67 + +bb101.preheader: ; preds = %cond_next67.bb101_crit_edge, %bb60.bb101_crit_edge + %s_addr.27.3.ph = phi i8* [ %s_addr.27.2, %cond_next67.bb101_crit_edge ], [ %s_addr.2, %bb60.bb101_crit_edge ] ; <i8*> [#uses=1] + br label %codeRepl + +bb60.backedge: ; preds = %cond_true295.bb60_crit_edge, %cond_true290.bb60_crit_edge, %cond_next271.bb60_crit_edge, %cond_true50.bb60_crit_edge, %cond_true45.bb60_crit_edge, %bb37.bb60_crit_edge, %cond_true55 + %s_addr.2.be = phi i8* [ %tmp43, %cond_true55 ], [ %tmp43, %bb37.bb60_crit_edge ], [ %tmp43, %cond_true45.bb60_crit_edge ], [ %tmp43, %cond_true50.bb60_crit_edge ], [ %tmp274.reload, %cond_next271.bb60_crit_edge ], [ %tmp274.reload, %cond_true290.bb60_crit_edge ], [ %tmp274.reload, %cond_true295.bb60_crit_edge ] ; <i8*> [#uses=1] + br label %bb60 +} + +declare i16 @Perl_skipspace_bb60_bb101(i8*, i8**, i8**, i8**) diff --git a/test/CodeGen/Generic/2007-04-14-EHSelectorCrash.ll b/test/CodeGen/Generic/2007-04-14-EHSelectorCrash.ll new file mode 100644 index 0000000..be039bf --- /dev/null +++ b/test/CodeGen/Generic/2007-04-14-EHSelectorCrash.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -enable-eh +; RUN: llvm-as < %s | llc -enable-eh -march=x86-64 +; XFAIL: * +; Un-XFAIL this when PR1508 is fixed. + +; PR1326 + +@__gnat_others_value = external constant i32 ; <i32*> [#uses=1] + +define void @_ada_eh() { +entry: + %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* null, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=0] + ret void +} + +declare i32 @llvm.eh.selector(i8*, i8*, ...) + +declare i32 @__gnat_eh_personality(...) diff --git a/test/CodeGen/Generic/2007-04-17-lsr-crash.ll b/test/CodeGen/Generic/2007-04-17-lsr-crash.ll new file mode 100644 index 0000000..4257e9f --- /dev/null +++ b/test/CodeGen/Generic/2007-04-17-lsr-crash.ll @@ -0,0 +1,35 @@ +; RUN: llvm-as < %s | llc + +define void @foo(i32 %inTextSize) { +entry: + br label %bb236.outer + +cond_next193: ; preds = %bb236 + %tmp211 = add i32 %inTextSize_addr.1.ph17, -2 ; <i32> [#uses=1] + br i1 false, label %cond_next232, label %cond_true227 + +cond_true227: ; preds = %cond_next193 + ret void + +cond_next232: ; preds = %cond_next193 + %indvar.next49 = add i32 %indvar48, 1 ; <i32> [#uses=1] + br label %bb236.outer + +bb236.outer: ; preds = %cond_next232, %entry + %indvar48 = phi i32 [ %indvar.next49, %cond_next232 ], [ 0, %entry ] ; <i32> [#uses=2] + %inTextSize_addr.1.ph17 = phi i32 [ %tmp211, %cond_next232 ], [ %inTextSize, %entry ] ; <i32> [#uses=3] + %tmp.50 = sub i32 0, %indvar48 ; <i32> [#uses=1] + %tmp219 = icmp eq i32 %tmp.50, 0 ; <i1> [#uses=1] + br i1 %tmp219, label %bb236.us, label %bb236 + +bb236.us: ; preds = %bb236.outer + %inTextSize_addr.1.us = add i32 0, %inTextSize_addr.1.ph17 ; <i32> [#uses=0] + ret void + +bb236: ; preds = %bb236.outer + %tmp238 = icmp eq i32 %inTextSize_addr.1.ph17, 0 ; <i1> [#uses=1] + br i1 %tmp238, label %exit, label %cond_next193 + +exit: ; preds = %bb236 + ret void +} diff --git a/test/CodeGen/Generic/2007-04-27-BitTestsBadMask.ll b/test/CodeGen/Generic/2007-04-27-BitTestsBadMask.ll new file mode 100644 index 0000000..f891599 --- /dev/null +++ b/test/CodeGen/Generic/2007-04-27-BitTestsBadMask.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep -c je | grep 3 +; RUN: llvm-as < %s | llc -march=x86-64 | grep 4297064449 +; PR 1325+ + +define i32 @foo(i8 %bar) { +entry: + switch i8 %bar, label %bb1203 [ + i8 117, label %bb1204 + i8 85, label %bb1204 + i8 106, label %bb1204 + ] + +bb1203: ; preds = %entry + ret i32 1 + +bb1204: ; preds = %entry, %entry, %entry + ret i32 2 +} diff --git a/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll b/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll new file mode 100644 index 0000000..6f8fbae --- /dev/null +++ b/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc +; XFAIL: sparc-sun-solaris2 +; PR1557 + +; Test that we can have an "X" output constraint. + +define void @test(i16 * %t) { + call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"( i16* %t ) + ret void +} diff --git a/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll b/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll new file mode 100644 index 0000000..cd72495 --- /dev/null +++ b/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc +; XFAIL: sparc-sun-solaris2 +; PR1557 + + %struct..0anon = type { [100 x i32] } + +define void @test() { +entry: + %currfpu = alloca %struct..0anon, align 16 ; <%struct..0anon*> [#uses=2] + %mxcsr = alloca %struct..0anon, align 16 ; <%struct..0anon*> [#uses=1] + call void asm sideeffect "fnstenv $0", "=*m,~{dirflag},~{fpsr},~{flags}"( %struct..0anon* %currfpu ) + call void asm sideeffect "$0 $1", "=*m,*m,~{dirflag},~{fpsr},~{flags}"( %struct..0anon* %mxcsr, %struct..0anon* %currfpu ) + ret void +} + diff --git a/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll b/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll new file mode 100644 index 0000000..71b4c85 --- /dev/null +++ b/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | llc +; PR1228 + + "struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" = type { i8* } + "struct.std::locale" = type { "struct.std::locale::_Impl"* } + "struct.std::locale::_Impl" = type { i32, "struct.std::locale::facet"**, i32, "struct.std::locale::facet"**, i8** } + "struct.std::locale::facet" = type { i32 (...)**, i32 } + "struct.std::string" = type { "struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" } + +define void @_ZNKSt6locale4nameEv("struct.std::string"* %agg.result) { +entry: + %tmp105 = icmp eq i8* null, null ; <i1> [#uses=1] + br i1 %tmp105, label %cond_true, label %cond_true222 + +cond_true: ; preds = %entry + invoke void @_ZNSs14_M_replace_auxEjjjc( ) + to label %cond_next1328 unwind label %cond_true1402 + +cond_true222: ; preds = %cond_true222, %entry + %tmp207 = call i32 @strcmp( ) ; <i32> [#uses=1] + %tmp208 = icmp eq i32 %tmp207, 0 ; <i1> [#uses=2] + %bothcond1480 = and i1 %tmp208, false ; <i1> [#uses=1] + br i1 %bothcond1480, label %cond_true222, label %cond_next226.loopexit + +cond_next226.loopexit: ; preds = %cond_true222 + %phitmp = xor i1 %tmp208, true ; <i1> [#uses=1] + br i1 %phitmp, label %cond_false280, label %cond_true235 + +cond_true235: ; preds = %cond_next226.loopexit + invoke void @_ZNSs6assignEPKcj( ) + to label %cond_next1328 unwind label %cond_true1402 + +cond_false280: ; preds = %cond_next226.loopexit + invoke void @_ZNSs7reserveEj( ) + to label %invcont282 unwind label %cond_true1402 + +invcont282: ; preds = %cond_false280 + invoke void @_ZNSs6appendEPKcj( ) + to label %invcont317 unwind label %cond_true1402 + +invcont317: ; preds = %invcont282 + ret void + +cond_next1328: ; preds = %cond_true235, %cond_true + ret void + +cond_true1402: ; preds = %invcont282, %cond_false280, %cond_true235, %cond_true + ret void +} + +declare void @_ZNSs14_M_replace_auxEjjjc() + +declare i32 @strcmp() + +declare void @_ZNSs6assignEPKcj() + +declare void @_ZNSs7reserveEj() + +declare void @_ZNSs6appendEPKcj() diff --git a/test/CodeGen/Generic/2007-05-03-EHTypeInfo.ll b/test/CodeGen/Generic/2007-05-03-EHTypeInfo.ll new file mode 100644 index 0000000..2efe939 --- /dev/null +++ b/test/CodeGen/Generic/2007-05-03-EHTypeInfo.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -enable-eh + + %struct.exception = type { i8, i8, i32, i8*, i8*, i32, i8* } +@program_error = external global %struct.exception ; <%struct.exception*> [#uses=1] + +define void @typeinfo() { +entry: + %eh_typeid = tail call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @program_error, i32 0, i32 0) ) ; <i32> [#uses=0] + ret void +} + +declare i32 @llvm.eh.typeid.for(i8*) diff --git a/test/CodeGen/Generic/2007-05-05-Personality.ll b/test/CodeGen/Generic/2007-05-05-Personality.ll new file mode 100644 index 0000000..8c3737c --- /dev/null +++ b/test/CodeGen/Generic/2007-05-05-Personality.ll @@ -0,0 +1,35 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -enable-eh -o - | grep zPLR + +@error = external global i8 ; <i8*> [#uses=2] + +define void @_ada_x() { +entry: + invoke void @raise( ) + to label %eh_then unwind label %unwind + +unwind: ; preds = %entry + %eh_ptr = tail call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] + %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i8* @error ) ; <i32> [#uses=1] + %eh_typeid = tail call i32 @llvm.eh.typeid.for( i8* @error ) ; <i32> [#uses=1] + %tmp2 = icmp eq i32 %eh_select, %eh_typeid ; <i1> [#uses=1] + br i1 %tmp2, label %eh_then, label %Unwind + +eh_then: ; preds = %unwind, %entry + ret void + +Unwind: ; preds = %unwind + tail call i32 (...)* @_Unwind_Resume( i8* %eh_ptr ) ; <i32>:0 [#uses=0] + unreachable +} + +declare void @raise() + +declare i8* @llvm.eh.exception() + +declare i32 @llvm.eh.selector(i8*, i8*, ...) + +declare i32 @llvm.eh.typeid.for(i8*) + +declare i32 @__gnat_eh_personality(...) + +declare i32 @_Unwind_Resume(...) diff --git a/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll b/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll new file mode 100644 index 0000000..7495795 --- /dev/null +++ b/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll @@ -0,0 +1,90 @@ +; RUN: llvm-as < %s | llc + + %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* } + %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* } + %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 } + %struct.AVEvalExpr = type opaque + %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] } + %struct.AVOption = type opaque + %struct.AVPaletteControl = type { i32, [256 x i32] } + %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] } + %struct.AVRational = type { i32, i32 } + %struct.DSPContext = type { void (i16*, i8*, i32)*, void (i16*, i8*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, void (i16*)*, i32 (i8*, i32)*, i32 (i8*, i32)*, [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], i32 (i8*, i16*, i32)*, [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [2 x void (i8*, i8*, i8*, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [8 x void (i8*, i8*, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [10 x void (i8*, i32, i32, i32, i32)*], [10 x void (i8*, i8*, i32, i32, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i16*, i32)*, [2 x [4 x i32 (i8*, i8*, i8*, i32, i32)*]], void (i8*, i8*, i32)*, void (i8*, i8*, i8*, i32)*, void (i8*, i8*, i8*, i32, i32*, i32*)*, void (i32*, i32*, i32)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32)*, void (i8*, i32, i32, i32)*, void ([4 x [4 x i16]]*, i8*, [40 x i8]*, [40 x [2 x i16]]*, i32, i32, i32, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32)*, void (float*, float*, i32)*, void (float*, float*, i32)*, void (float*, float*, float*, i32)*, void (float*, float*, float*, float*, i32, i32, i32)*, void (i16*, float*, i32)*, void (i16*)*, void (i16*)*, void (i16*)*, void (i8*, i32, i16*)*, void (i8*, i32, i16*)*, [64 x i8], i32, i32 (i16*, i16*, i16*, i32)*, void (i16*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void ([4 x i16]*)*, void (i32*, i32*, i32*, i32*, i32*, i32*, i32)*, void (i32*, i32)*, void (i8*, i32, i8**, i32, i32, i32, i32, i32, %struct.slice_buffer*, i32, i8*)*, void (i8*, i32, i32)*, [4 x void (i8*, i32, i8*, i32, i32, i32)*], void (i16*)*, void (i16*, i32)*, void (i16*, i32)*, void (i16*, i32)*, void (i8*, i32)*, void (i8*, i32)*, [16 x void (i8*, i8*, i32, i32)*] } + %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } + %struct.GetBitContext = type { i8*, i8*, i32*, i32, i32, i32, i32 } + %struct.MJpegContext = type opaque + %struct.MotionEstContext = type { %struct.AVCodecContext*, i32, [4 x [2 x i32]], [4 x [2 x i32]], i8*, i8*, [2 x i8*], i8*, i32, i32*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x [4 x i8*]], [4 x [4 x i8*]], i32, i32, i32, i32, i32, [4 x void (i8*, i8*, i32, i32)*]*, [4 x void (i8*, i8*, i32, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [4097 x i8]*, i8*, i32 (%struct.MpegEncContext*, i32*, i32*, i32, i32, i32, i32, i32)* } + %struct.MpegEncContext = type { %struct.AVCodecContext*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Picture*, %struct.Picture**, %struct.Picture**, i32, i32, [8 x %struct.MpegEncContext*], %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture*, %struct.Picture*, %struct.Picture*, [3 x i8*], [3 x i32], i16*, [3 x i16*], [20 x i16], i32, i32, i8*, i8*, i8*, i8*, i8*, [16 x i16]*, [3 x [16 x i16]*], i32, i8*, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, [5 x i32], i32, i32, i32, i32, %struct.DSPContext, i32, i32, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i8*], [2 x [2 x i8*]], i32, i32, i32, [2 x [4 x [2 x i32]]], [2 x [2 x i32]], [2 x [2 x [2 x i32]]], i8*, [2 x [64 x i16]], %struct.MotionEstContext, i32, i32, i32, i32, i32, i32, i16*, [6 x i32], [6 x i32], [3 x i8*], i32*, [64 x i16], [64 x i16], [64 x i16], [64 x i16], i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [8 x i32], [64 x i32]*, [64 x i32]*, [2 x [64 x i16]]*, [2 x [64 x i16]]*, [12 x i32], %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, [64 x i32]*, [2 x i32], [64 x i16]*, i8*, i64, i64, i32, i32, %struct.RateControlContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, %struct.GetBitContext, i32, i32, i32, %struct.ParseContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [2 x i32]], [2 x [2 x i32]], [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, [3 x i32], %struct.MJpegContext*, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [65 x [65 x [2 x i32]]]]*, i32, i32, %struct.GetBitContext, i32, i32, i32, i8*, i32, [2 x [2 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i8*, i32, [12 x i16*], [64 x i16]*, [8 x [64 x i16]]*, i32 (%struct.MpegEncContext*, [64 x i16]*)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, void (%struct.MpegEncContext*, i16*)* } + %struct.ParseContext = type { i8*, i32, i32, i32, i32, i32, i32, i32 } + %struct.Picture = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*], [3 x i8*], [2 x [2 x i16]*], i32*, [2 x i32], i32, i32, i32, i32, [2 x [16 x i32]], [2 x i32], i32, i32, i16*, i16*, i8*, i32*, i32 } + %struct.Predictor = type { double, double, double } + %struct.PutBitContext = type { i32, i32, i8*, i8*, i8* } + %struct.RateControlContext = type { %struct.FILE*, i32, %struct.RateControlEntry*, double, [5 x %struct.Predictor], double, double, double, double, double, [5 x double], i32, i32, [5 x i64], [5 x i64], [5 x i64], [5 x i64], [5 x i32], i32, i8*, float, i32, %struct.AVEvalExpr* } + %struct.RateControlEntry = type { i32, float, i32, i32, i32, i32, i32, i64, i32, float, i32, i32, i32, i32, i32, i32 } + %struct.RcOverride = type { i32, i32, i32, float } + %struct.ScanTable = type { i8*, [64 x i8], [64 x i8] } + %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 } + %struct.slice_buffer = type opaque + +define float @ff_rate_estimate_qscale(%struct.MpegEncContext* %s, i32 %dry_run) { +entry: + br i1 false, label %cond_false163, label %cond_true135 + +cond_true135: ; preds = %entry + ret float 0.000000e+00 + +cond_false163: ; preds = %entry + br i1 false, label %cond_true203, label %cond_next211 + +cond_true203: ; preds = %cond_false163 + ret float 0.000000e+00 + +cond_next211: ; preds = %cond_false163 + br i1 false, label %cond_false243, label %cond_true220 + +cond_true220: ; preds = %cond_next211 + br i1 false, label %cond_next237, label %cond_true225 + +cond_true225: ; preds = %cond_true220 + ret float 0.000000e+00 + +cond_next237: ; preds = %cond_true220 + br i1 false, label %cond_false785, label %cond_true735 + +cond_false243: ; preds = %cond_next211 + ret float 0.000000e+00 + +cond_true735: ; preds = %cond_next237 + ret float 0.000000e+00 + +cond_false785: ; preds = %cond_next237 + br i1 false, label %cond_true356.i.preheader, label %bb359.i + +cond_true356.i.preheader: ; preds = %cond_false785 + %tmp116117.i = zext i8 0 to i32 ; <i32> [#uses=1] + br i1 false, label %cond_false.i, label %cond_next159.i + +cond_false.i: ; preds = %cond_true356.i.preheader + ret float 0.000000e+00 + +cond_next159.i: ; preds = %cond_true356.i.preheader + %tmp178.i = add i32 %tmp116117.i, -128 ; <i32> [#uses=2] + %tmp181.i = mul i32 %tmp178.i, %tmp178.i ; <i32> [#uses=1] + %tmp181182.i = sitofp i32 %tmp181.i to float ; <float> [#uses=1] + %tmp199200.pn.in.i = mul float %tmp181182.i, 0.000000e+00 ; <float> [#uses=1] + %tmp199200.pn.i = fpext float %tmp199200.pn.in.i to double ; <double> [#uses=1] + %tmp201.pn.i = sub double 1.000000e+00, %tmp199200.pn.i ; <double> [#uses=1] + %factor.2.in.i = mul double 0.000000e+00, %tmp201.pn.i ; <double> [#uses=1] + %factor.2.i = fptrunc double %factor.2.in.i to float ; <float> [#uses=1] + br i1 false, label %cond_next312.i, label %cond_false222.i + +cond_false222.i: ; preds = %cond_next159.i + ret float 0.000000e+00 + +cond_next312.i: ; preds = %cond_next159.i + %tmp313314.i = fpext float %factor.2.i to double ; <double> [#uses=0] + ret float 0.000000e+00 + +bb359.i: ; preds = %cond_false785 + ret float 0.000000e+00 +} diff --git a/test/CodeGen/Generic/2007-06-06-CriticalEdgeLandingPad.ll b/test/CodeGen/Generic/2007-06-06-CriticalEdgeLandingPad.ll new file mode 100644 index 0000000..2ad0019 --- /dev/null +++ b/test/CodeGen/Generic/2007-06-06-CriticalEdgeLandingPad.ll @@ -0,0 +1,2866 @@ +; RUN: llvm-as < %s | llc -enable-eh -asm-verbose -o - | \ +; RUN: grep -A 3 {Llabel137.*Region start} | grep {5.*Action} +; PR1422 +; PR1508 + +target triple = "i686-pc-linux-gnu" + %struct.exception = type { i8, i8, i32, i8*, i8*, i32, i8* } + %struct.string___XUB = type { i32, i32 } + %struct.string___XUP = type { i8*, %struct.string___XUB* } + %struct.system__secondary_stack__mark_id = type { i8*, i32 } +@weekS.154 = internal constant [28 x i8] c"SSUNSMONSTUESWEDSTHUSFRISSAT" ; <[28 x i8]*> [#uses=1] +@weekN.179 = internal constant [8 x i8] c"\01\05\09\0D\11\15\19\1D" ; <[8 x i8]*> [#uses=1] +@C.28.862 = internal constant %struct.string___XUB { i32 1, i32 85 } ; <%struct.string___XUB*> [#uses=1] +@C.29.865 = internal constant %struct.string___XUB { i32 1, i32 7 } ; <%struct.string___XUB*> [#uses=1] +@C.30.904 = internal constant %struct.string___XUB { i32 1, i32 30 } ; <%struct.string___XUB*> [#uses=1] +@C.32.910 = internal constant %struct.string___XUB { i32 1, i32 28 } ; <%struct.string___XUB*> [#uses=1] +@C.35.915 = internal constant %struct.string___XUB { i32 1, i32 24 } ; <%struct.string___XUB*> [#uses=1] +@C.36.923 = internal constant %struct.string___XUB { i32 1, i32 29 } ; <%struct.string___XUB*> [#uses=1] +@C.98.1466 = internal constant %struct.string___XUB { i32 1, i32 31 } ; <%struct.string___XUB*> [#uses=1] +@C.101.1473 = internal constant %struct.string___XUB { i32 1, i32 46 } ; <%struct.string___XUB*> [#uses=1] +@C.104.1478 = internal constant %struct.string___XUB { i32 1, i32 25 } ; <%struct.string___XUB*> [#uses=1] +@C.124.1606 = internal constant %struct.string___XUB { i32 1, i32 18 } ; <%struct.string___XUB*> [#uses=1] +@C.143.1720 = internal constant [2 x i32] [ i32 1, i32 2 ] ; <[2 x i32]*> [#uses=1] +@C.146.1725 = internal constant %struct.string___XUB { i32 1, i32 37 } ; <%struct.string___XUB*> [#uses=1] +@C.170.1990 = internal constant %struct.string___XUB { i32 1, i32 19 } ; <%struct.string___XUB*> [#uses=1] +@C.178.2066 = internal constant %struct.string___XUB { i32 1, i32 27 } ; <%struct.string___XUB*> [#uses=1] +@.str = internal constant [13 x i8] c"c36104b.adb\00\00" ; <[13 x i8]*> [#uses=1] +@.str1 = internal constant [85 x i8] c"CONSTRAINT_ERROR IS RAISED OR NOT IN DYNAMIC DISCRETE_RANGES WITH EXPLICIT TYPE_MARKS" ; <[85 x i8]*> [#uses=1] +@.str2 = internal constant [7 x i8] c"C36104B" ; <[7 x i8]*> [#uses=1] +@constraint_error = external global %struct.exception ; <%struct.exception*> [#uses=18] +@__gnat_others_value = external constant i32 ; <i32*> [#uses=37] +@.str3 = internal constant [30 x i8] c"CONSTRAINT_ERROR NOT RAISED 1 " ; <[30 x i8]*> [#uses=1] +@system__soft_links__abort_undefer = external global void ()* ; <void ()**> [#uses=30] +@.str4 = internal constant [28 x i8] c"UNHANDLED EXCEPTION RAISED 1" ; <[28 x i8]*> [#uses=1] +@.str5 = internal constant [24 x i8] c"WRONG EXCEPTION RAISED 1" ; <[24 x i8]*> [#uses=1] +@.str6 = internal constant [29 x i8] c"CONSTRAINT_ERROR NOT RAISED 3" ; <[29 x i8]*> [#uses=1] +@.str7 = internal constant [24 x i8] c"WRONG EXCEPTION RAISED 3" ; <[24 x i8]*> [#uses=1] +@.str10 = internal constant [24 x i8] c"WRONG EXCEPTION RAISED 4" ; <[24 x i8]*> [#uses=1] +@.str11 = internal constant [30 x i8] c"CONSTRAINT_ERROR NOT RAISED 7 " ; <[30 x i8]*> [#uses=1] +@.str12 = internal constant [28 x i8] c"UNHANDLED EXCEPTION RAISED 7" ; <[28 x i8]*> [#uses=1] +@.str13 = internal constant [24 x i8] c"WRONG EXCEPTION RAISED 7" ; <[24 x i8]*> [#uses=1] +@.str14 = internal constant [30 x i8] c"CONSTRAINT_ERROR NOT RAISED 8 " ; <[30 x i8]*> [#uses=1] +@.str15 = internal constant [28 x i8] c"UNHANDLED EXCEPTION RAISED 8" ; <[28 x i8]*> [#uses=1] +@.str16 = internal constant [24 x i8] c"WRONG EXCEPTION RAISED 8" ; <[24 x i8]*> [#uses=1] +@.str17 = internal constant [30 x i8] c"CONSTRAINT_ERROR NOT RAISED 9 " ; <[30 x i8]*> [#uses=1] +@.str18 = internal constant [24 x i8] c"WRONG EXCEPTION RAISED 9" ; <[24 x i8]*> [#uses=1] +@.str19 = internal constant [31 x i8] c"CONSTRAINT_ERROR NOT RAISED 10 " ; <[31 x i8]*> [#uses=1] +@.str20 = internal constant [46 x i8] c"DID NOT RAISE CONSTRAINT_ERROR AT PROPER PLACE" ; <[46 x i8]*> [#uses=1] +@.str21 = internal constant [25 x i8] c"WRONG EXCEPTION RAISED 10" ; <[25 x i8]*> [#uses=1] +@.str22 = internal constant [31 x i8] c"CONSTRAINT_ERROR NOT RAISED 11 " ; <[31 x i8]*> [#uses=1] +@.str23 = internal constant [25 x i8] c"WRONG EXCEPTION RAISED 11" ; <[25 x i8]*> [#uses=1] +@.str24 = internal constant [30 x i8] c"'FIRST OF NULL ARRAY INCORRECT" ; <[30 x i8]*> [#uses=1] +@.str25 = internal constant [18 x i8] c"EXCEPTION RAISED 1" ; <[18 x i8]*> [#uses=1] +@.str26 = internal constant [18 x i8] c"EXCEPTION RAISED 3" ; <[18 x i8]*> [#uses=1] +@.str27 = internal constant [31 x i8] c"'LENGTH OF NULL ARRAY INCORRECT" ; <[31 x i8]*> [#uses=1] +@.str28 = internal constant [18 x i8] c"EXCEPTION RAISED 5" ; <[18 x i8]*> [#uses=1] +@.str29 = internal constant [37 x i8] c"EVALUATION OF EXPRESSION IS INCORRECT" ; <[37 x i8]*> [#uses=1] +@.str30 = internal constant [18 x i8] c"EXCEPTION RAISED 7" ; <[18 x i8]*> [#uses=1] +@.str32 = internal constant [18 x i8] c"EXCEPTION RAISED 9" ; <[18 x i8]*> [#uses=1] +@.str33 = internal constant [19 x i8] c"EXCEPTION RAISED 10" ; <[19 x i8]*> [#uses=1] +@.str34 = internal constant [19 x i8] c"EXCEPTION RAISED 12" ; <[19 x i8]*> [#uses=1] +@.str35 = internal constant [27 x i8] c"INCORRECT 'IN' EVALUATION 1" ; <[27 x i8]*> [#uses=1] +@.str36 = internal constant [27 x i8] c"INCORRECT 'IN' EVALUATION 2" ; <[27 x i8]*> [#uses=1] +@.str37 = internal constant [29 x i8] c"INCORRECT 'NOT IN' EVALUATION" ; <[29 x i8]*> [#uses=1] +@.str38 = internal constant [19 x i8] c"EXCEPTION RAISED 52" ; <[19 x i8]*> [#uses=1] + +define void @_ada_c36104b() { +entry: + %tmp9 = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3] + %tmp12 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp15 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp31 = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3] + %tmp34 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp37 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp46 = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3] + %tmp49 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp52 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp55 = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3] + %tmp58 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp61 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp63 = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3] + %tmp66 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp69 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp72 = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3] + %tmp75 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp78 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %tmp123 = call i32 @report__ident_int( i32 0 ) ; <i32> [#uses=3] + %tmp125 = icmp ugt i32 %tmp123, 6 ; <i1> [#uses=1] + br i1 %tmp125, label %cond_true, label %cond_next136 + +cond_true: ; preds = %entry + call void @__gnat_rcheck_10( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 50 ) + unreachable + +cond_next136: ; preds = %entry + %tmp137138 = trunc i32 %tmp123 to i8 ; <i8> [#uses=21] + %tmp139 = icmp ugt i8 %tmp137138, 6 ; <i1> [#uses=1] + br i1 %tmp139, label %bb, label %bb144 + +bb: ; preds = %cond_next136 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 50 ) + unreachable + +bb144: ; preds = %cond_next136 + %tmp150 = call i32 @report__ident_int( i32 1 ) ; <i32> [#uses=4] + %tmp154 = icmp ugt i32 %tmp150, 6 ; <i1> [#uses=1] + br i1 %tmp154, label %cond_true157, label %cond_next169 + +cond_true157: ; preds = %bb144 + call void @__gnat_rcheck_10( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 51 ) + unreachable + +cond_next169: ; preds = %bb144 + %tmp170171 = trunc i32 %tmp150 to i8 ; <i8> [#uses=34] + %tmp172 = icmp ugt i8 %tmp170171, 6 ; <i1> [#uses=1] + br i1 %tmp172, label %bb175, label %bb178 + +bb175: ; preds = %cond_next169 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 51 ) + unreachable + +bb178: ; preds = %cond_next169 + %tmp184 = call i32 @report__ident_int( i32 2 ) ; <i32> [#uses=3] + %tmp188 = icmp ugt i32 %tmp184, 6 ; <i1> [#uses=1] + br i1 %tmp188, label %cond_true191, label %cond_next203 + +cond_true191: ; preds = %bb178 + call void @__gnat_rcheck_10( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 52 ) + unreachable + +cond_next203: ; preds = %bb178 + %tmp204205 = trunc i32 %tmp184 to i8 ; <i8> [#uses=30] + %tmp206 = icmp ugt i8 %tmp204205, 6 ; <i1> [#uses=3] + br i1 %tmp206, label %bb209, label %bb212 + +bb209: ; preds = %cond_next203 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 52 ) + unreachable + +bb212: ; preds = %cond_next203 + %tmp218 = call i32 @report__ident_int( i32 3 ) ; <i32> [#uses=4] + %tmp222 = icmp ugt i32 %tmp218, 6 ; <i1> [#uses=1] + br i1 %tmp222, label %cond_true225, label %cond_next237 + +cond_true225: ; preds = %bb212 + call void @__gnat_rcheck_10( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 53 ) + unreachable + +cond_next237: ; preds = %bb212 + %tmp238239 = trunc i32 %tmp218 to i8 ; <i8> [#uses=34] + %tmp240 = icmp ugt i8 %tmp238239, 6 ; <i1> [#uses=2] + br i1 %tmp240, label %bb243, label %bb246 + +bb243: ; preds = %cond_next237 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 53 ) + unreachable + +bb246: ; preds = %cond_next237 + %tmp252 = call i32 @report__ident_int( i32 4 ) ; <i32> [#uses=3] + %tmp256 = icmp ugt i32 %tmp252, 6 ; <i1> [#uses=1] + br i1 %tmp256, label %cond_true259, label %cond_next271 + +cond_true259: ; preds = %bb246 + call void @__gnat_rcheck_10( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 54 ) + unreachable + +cond_next271: ; preds = %bb246 + %tmp272273 = trunc i32 %tmp252 to i8 ; <i8> [#uses=27] + %tmp274 = icmp ugt i8 %tmp272273, 6 ; <i1> [#uses=4] + br i1 %tmp274, label %bb277, label %bb280 + +bb277: ; preds = %cond_next271 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 54 ) + unreachable + +bb280: ; preds = %cond_next271 + %tmp286 = call i32 @report__ident_int( i32 5 ) ; <i32> [#uses=3] + %tmp290 = icmp ugt i32 %tmp286, 6 ; <i1> [#uses=1] + br i1 %tmp290, label %cond_true293, label %cond_next305 + +cond_true293: ; preds = %bb280 + call void @__gnat_rcheck_10( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 55 ) + unreachable + +cond_next305: ; preds = %bb280 + %tmp306307 = trunc i32 %tmp286 to i8 ; <i8> [#uses=16] + %tmp308 = icmp ugt i8 %tmp306307, 6 ; <i1> [#uses=1] + br i1 %tmp308, label %bb311, label %bb314 + +bb311: ; preds = %cond_next305 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 55 ) + unreachable + +bb314: ; preds = %cond_next305 + %tmp320 = call i32 @report__ident_int( i32 6 ) ; <i32> [#uses=2] + %tmp324 = icmp ugt i32 %tmp320, 6 ; <i1> [#uses=1] + br i1 %tmp324, label %cond_true327, label %cond_next339 + +cond_true327: ; preds = %bb314 + call void @__gnat_rcheck_10( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 56 ) + unreachable + +cond_next339: ; preds = %bb314 + %tmp340341 = trunc i32 %tmp320 to i8 ; <i8> [#uses=4] + %tmp342 = icmp ugt i8 %tmp340341, 6 ; <i1> [#uses=1] + br i1 %tmp342, label %bb345, label %bb348 + +bb345: ; preds = %cond_next339 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 56 ) + unreachable + +bb348: ; preds = %cond_next339 + %tmp364 = icmp ult i8 %tmp272273, %tmp204205 ; <i1> [#uses=2] + br i1 %tmp364, label %cond_next383, label %cond_true367 + +cond_true367: ; preds = %bb348 + %tmp370 = icmp ult i8 %tmp204205, %tmp170171 ; <i1> [#uses=1] + %tmp374 = icmp ugt i8 %tmp272273, %tmp306307 ; <i1> [#uses=1] + %tmp378 = or i1 %tmp374, %tmp370 ; <i1> [#uses=1] + br i1 %tmp378, label %cond_true381, label %cond_next383 + +cond_true381: ; preds = %cond_true367 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 59 ) + unreachable + +cond_next383: ; preds = %cond_true367, %bb348 + %tmp384 = call i32 @report__ident_int( i32 -5 ) ; <i32> [#uses=15] + %tmp388 = add i32 %tmp384, 10 ; <i32> [#uses=1] + %tmp389 = icmp ugt i32 %tmp388, 20 ; <i1> [#uses=1] + br i1 %tmp389, label %cond_true392, label %cond_next393 + +cond_true392: ; preds = %cond_next383 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 63 ) + unreachable + +cond_next393: ; preds = %cond_next383 + %tmp394 = call i32 @report__ident_int( i32 5 ) ; <i32> [#uses=18] + %tmp398 = add i32 %tmp394, 10 ; <i32> [#uses=1] + %tmp399 = icmp ugt i32 %tmp398, 20 ; <i1> [#uses=1] + br i1 %tmp399, label %cond_true402, label %cond_next403 + +cond_true402: ; preds = %cond_next393 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 64 ) + unreachable + +cond_next403: ; preds = %cond_next393 + %tmp416 = icmp slt i32 %tmp394, %tmp384 ; <i1> [#uses=1] + br i1 %tmp416, label %cond_next437, label %cond_true419 + +cond_true419: ; preds = %cond_next403 + %tmp423 = icmp slt i32 %tmp384, -10 ; <i1> [#uses=1] + %tmp428 = icmp sgt i32 %tmp394, 10 ; <i1> [#uses=1] + %tmp432 = or i1 %tmp428, %tmp423 ; <i1> [#uses=1] + br i1 %tmp432, label %cond_true435, label %cond_next437 + +cond_true435: ; preds = %cond_true419 + call void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 63 ) + unreachable + +cond_next437: ; preds = %cond_true419, %cond_next403 + call void @report__test( i64 or (i64 zext (i32 ptrtoint ([7 x i8]* @.str2 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.29.865 to i32) to i64), i64 32)), i64 or (i64 zext (i32 ptrtoint ([85 x i8]* @.str1 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.28.862 to i32) to i64), i64 32)) ) + %tmp453 = icmp sgt i32 %tmp384, 0 ; <i1> [#uses=1] + %tmp458 = icmp slt i32 %tmp394, 6 ; <i1> [#uses=1] + %tmp462 = or i1 %tmp458, %tmp453 ; <i1> [#uses=3] + br i1 %tmp462, label %cond_true465, label %cond_next467 + +cond_true465: ; preds = %cond_next437 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 80 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind + +unwind: ; preds = %cleanup798, %unwind783, %cond_true465 + %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid8065921 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp8085923 = icmp eq i32 %eh_select, %eh_typeid8065921 ; <i1> [#uses=1] + br i1 %tmp8085923, label %eh_then809, label %eh_else823 + +cond_next467: ; preds = %cond_next437 + invoke void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp9 sret ) + to label %invcont472 unwind label %unwind468 + +unwind468: ; preds = %cleanup, %unwind480, %cond_next467 + %eh_ptr469 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select471 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr469, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid5928 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp7815929 = icmp eq i32 %eh_select471, %eh_typeid5928 ; <i1> [#uses=1] + br i1 %tmp7815929, label %eh_then, label %cleanup805 + +invcont472: ; preds = %cond_next467 + %tmp475 = getelementptr %struct.system__secondary_stack__mark_id* %tmp9, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp476 = load i8** %tmp475 ; <i8*> [#uses=2] + %tmp478 = getelementptr %struct.system__secondary_stack__mark_id* %tmp9, i32 0, i32 1 ; <i32*> [#uses=1] + %tmp479 = load i32* %tmp478 ; <i32> [#uses=2] + %tmp485 = invoke i32 @report__ident_int( i32 1 ) + to label %invcont484 unwind label %unwind480 ; <i32> [#uses=2] + +unwind480: ; preds = %invcont734, %invcont717, %cond_next665, %cond_true663, %cond_next639, %cond_true637, %cond_next613, %cond_true611, %cond_next587, %cond_true585, %cond_next561, %cond_true559, %cond_next535, %cond_true533, %cond_next509, %cond_true507, %invcont472 + %eh_ptr481 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select483 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr481, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + %tmp7685575 = ptrtoint i8* %tmp476 to i32 ; <i32> [#uses=1] + %tmp76855755576 = zext i32 %tmp7685575 to i64 ; <i64> [#uses=1] + %tmp7715572 = zext i32 %tmp479 to i64 ; <i64> [#uses=1] + %tmp77155725573 = shl i64 %tmp7715572, 32 ; <i64> [#uses=1] + %tmp77155725573.ins = or i64 %tmp77155725573, %tmp76855755576 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp77155725573.ins ) + to label %cleanup779 unwind label %unwind468 + +invcont484: ; preds = %invcont472 + %tmp492 = icmp slt i32 %tmp485, %tmp384 ; <i1> [#uses=1] + %tmp500 = icmp sgt i32 %tmp485, %tmp394 ; <i1> [#uses=1] + %tmp504 = or i1 %tmp492, %tmp500 ; <i1> [#uses=1] + br i1 %tmp504, label %cond_true507, label %cond_next509 + +cond_true507: ; preds = %invcont484 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 86 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind480 + +cond_next509: ; preds = %invcont484 + %tmp511 = invoke i32 @report__ident_int( i32 1 ) + to label %invcont510 unwind label %unwind480 ; <i32> [#uses=3] + +invcont510: ; preds = %cond_next509 + %tmp518 = icmp slt i32 %tmp511, %tmp384 ; <i1> [#uses=1] + %tmp526 = icmp sgt i32 %tmp511, %tmp394 ; <i1> [#uses=1] + %tmp530 = or i1 %tmp518, %tmp526 ; <i1> [#uses=1] + br i1 %tmp530, label %cond_true533, label %cond_next535 + +cond_true533: ; preds = %invcont510 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 86 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind480 + +cond_next535: ; preds = %invcont510 + %tmp537 = invoke i32 @report__ident_int( i32 1 ) + to label %invcont536 unwind label %unwind480 ; <i32> [#uses=2] + +invcont536: ; preds = %cond_next535 + %tmp544 = icmp slt i32 %tmp537, %tmp384 ; <i1> [#uses=1] + %tmp552 = icmp sgt i32 %tmp537, %tmp394 ; <i1> [#uses=1] + %tmp556 = or i1 %tmp544, %tmp552 ; <i1> [#uses=1] + br i1 %tmp556, label %cond_true559, label %cond_next561 + +cond_true559: ; preds = %invcont536 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 86 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind480 + +cond_next561: ; preds = %invcont536 + %tmp563 = invoke i32 @report__ident_int( i32 1 ) + to label %invcont562 unwind label %unwind480 ; <i32> [#uses=2] + +invcont562: ; preds = %cond_next561 + %tmp570 = icmp slt i32 %tmp563, %tmp384 ; <i1> [#uses=1] + %tmp578 = icmp sgt i32 %tmp563, %tmp394 ; <i1> [#uses=1] + %tmp582 = or i1 %tmp570, %tmp578 ; <i1> [#uses=1] + br i1 %tmp582, label %cond_true585, label %cond_next587 + +cond_true585: ; preds = %invcont562 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 86 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind480 + +cond_next587: ; preds = %invcont562 + %tmp589 = invoke i32 @report__ident_int( i32 1 ) + to label %invcont588 unwind label %unwind480 ; <i32> [#uses=2] + +invcont588: ; preds = %cond_next587 + %tmp596 = icmp slt i32 %tmp589, %tmp384 ; <i1> [#uses=1] + %tmp604 = icmp sgt i32 %tmp589, %tmp394 ; <i1> [#uses=1] + %tmp608 = or i1 %tmp596, %tmp604 ; <i1> [#uses=1] + br i1 %tmp608, label %cond_true611, label %cond_next613 + +cond_true611: ; preds = %invcont588 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 86 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind480 + +cond_next613: ; preds = %invcont588 + %tmp615 = invoke i32 @report__ident_int( i32 1 ) + to label %invcont614 unwind label %unwind480 ; <i32> [#uses=2] + +invcont614: ; preds = %cond_next613 + %tmp622 = icmp slt i32 %tmp615, %tmp384 ; <i1> [#uses=1] + %tmp630 = icmp sgt i32 %tmp615, %tmp394 ; <i1> [#uses=1] + %tmp634 = or i1 %tmp622, %tmp630 ; <i1> [#uses=1] + br i1 %tmp634, label %cond_true637, label %cond_next639 + +cond_true637: ; preds = %invcont614 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 86 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind480 + +cond_next639: ; preds = %invcont614 + %tmp641 = invoke i32 @report__ident_int( i32 1 ) + to label %invcont640 unwind label %unwind480 ; <i32> [#uses=2] + +invcont640: ; preds = %cond_next639 + %tmp648 = icmp slt i32 %tmp641, %tmp384 ; <i1> [#uses=1] + %tmp656 = icmp sgt i32 %tmp641, %tmp394 ; <i1> [#uses=1] + %tmp660 = or i1 %tmp648, %tmp656 ; <i1> [#uses=1] + br i1 %tmp660, label %cond_true663, label %cond_next665 + +cond_true663: ; preds = %invcont640 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 86 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind480 + +cond_next665: ; preds = %invcont640 + invoke void @system__img_int__image_integer( %struct.string___XUP* %tmp12 sret , i32 %tmp511 ) + to label %invcont717 unwind label %unwind480 + +invcont717: ; preds = %cond_next665 + %tmp719 = getelementptr %struct.string___XUP* %tmp12, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp720 = load i8** %tmp719 ; <i8*> [#uses=1] + %tmp7205888 = ptrtoint i8* %tmp720 to i32 ; <i32> [#uses=1] + %tmp72058885889 = zext i32 %tmp7205888 to i64 ; <i64> [#uses=1] + %tmp722 = getelementptr %struct.string___XUP* %tmp12, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp723 = load %struct.string___XUB** %tmp722 ; <%struct.string___XUB*> [#uses=1] + %tmp7235884 = ptrtoint %struct.string___XUB* %tmp723 to i32 ; <i32> [#uses=1] + %tmp72358845885 = zext i32 %tmp7235884 to i64 ; <i64> [#uses=1] + %tmp723588458855886 = shl i64 %tmp72358845885, 32 ; <i64> [#uses=1] + %tmp723588458855886.ins = or i64 %tmp723588458855886, %tmp72058885889 ; <i64> [#uses=1] + invoke void @system__string_ops__str_concat( %struct.string___XUP* %tmp15 sret , i64 or (i64 zext (i32 ptrtoint ([30 x i8]* @.str3 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.30.904 to i32) to i64), i64 32)), i64 %tmp723588458855886.ins ) + to label %invcont734 unwind label %unwind480 + +invcont734: ; preds = %invcont717 + %tmp736 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp737 = load i8** %tmp736 ; <i8*> [#uses=1] + %tmp7375876 = ptrtoint i8* %tmp737 to i32 ; <i32> [#uses=1] + %tmp73758765877 = zext i32 %tmp7375876 to i64 ; <i64> [#uses=1] + %tmp739 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp740 = load %struct.string___XUB** %tmp739 ; <%struct.string___XUB*> [#uses=1] + %tmp7405872 = ptrtoint %struct.string___XUB* %tmp740 to i32 ; <i32> [#uses=1] + %tmp74058725873 = zext i32 %tmp7405872 to i64 ; <i64> [#uses=1] + %tmp740587258735874 = shl i64 %tmp74058725873, 32 ; <i64> [#uses=1] + %tmp740587258735874.ins = or i64 %tmp740587258735874, %tmp73758765877 ; <i64> [#uses=1] + invoke void @report__failed( i64 %tmp740587258735874.ins ) + to label %cleanup unwind label %unwind480 + +cleanup: ; preds = %invcont734 + %tmp7515581 = ptrtoint i8* %tmp476 to i32 ; <i32> [#uses=1] + %tmp75155815582 = zext i32 %tmp7515581 to i64 ; <i64> [#uses=1] + %tmp7545578 = zext i32 %tmp479 to i64 ; <i64> [#uses=1] + %tmp75455785579 = shl i64 %tmp7545578, 32 ; <i64> [#uses=1] + %tmp75455785579.ins = or i64 %tmp75455785579, %tmp75155815582 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp75455785579.ins ) + to label %cond_true856 unwind label %unwind468 + +cleanup779: ; preds = %unwind480 + %eh_typeid = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp781 = icmp eq i32 %eh_select483, %eh_typeid ; <i1> [#uses=1] + br i1 %tmp781, label %eh_then, label %cleanup805 + +eh_then: ; preds = %cleanup779, %unwind468 + %eh_exception.35924.0 = phi i8* [ %eh_ptr469, %unwind468 ], [ %eh_ptr481, %cleanup779 ] ; <i8*> [#uses=3] + invoke void @__gnat_begin_handler( i8* %eh_exception.35924.0 ) + to label %invcont787 unwind label %unwind783 + +unwind783: ; preds = %invcont789, %invcont787, %eh_then + %eh_ptr784 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] + %eh_select786 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr784, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_exception.35924.0 ) + to label %cleanup805 unwind label %unwind + +invcont787: ; preds = %eh_then + %tmp788 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp788( ) + to label %invcont789 unwind label %unwind783 + +invcont789: ; preds = %invcont787 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([28 x i8]* @.str4 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.32.910 to i32) to i64), i64 32)) ) + to label %cleanup798 unwind label %unwind783 + +cleanup798: ; preds = %invcont789 + invoke void @__gnat_end_handler( i8* %eh_exception.35924.0 ) + to label %cond_true856 unwind label %unwind + +cleanup805: ; preds = %unwind783, %cleanup779, %unwind468 + %eh_selector.0 = phi i32 [ %eh_select471, %unwind468 ], [ %eh_select483, %cleanup779 ], [ %eh_select786, %unwind783 ] ; <i32> [#uses=2] + %eh_exception.0 = phi i8* [ %eh_ptr469, %unwind468 ], [ %eh_ptr481, %cleanup779 ], [ %eh_ptr784, %unwind783 ] ; <i8*> [#uses=2] + %eh_typeid806 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp808 = icmp eq i32 %eh_selector.0, %eh_typeid806 ; <i1> [#uses=1] + br i1 %tmp808, label %eh_then809, label %eh_else823 + +eh_then809: ; preds = %cleanup805, %unwind + %eh_exception.05914.0 = phi i8* [ %eh_ptr, %unwind ], [ %eh_exception.0, %cleanup805 ] ; <i8*> [#uses=3] + invoke void @__gnat_begin_handler( i8* %eh_exception.05914.0 ) + to label %invcont815 unwind label %unwind813 + +unwind813: ; preds = %invcont815, %eh_then809 + %eh_ptr814 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_exception.05914.0 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr814 ) ; <i32>:0 [#uses=0] + unreachable + +invcont815: ; preds = %eh_then809 + %tmp816 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp816( ) + to label %cleanup819 unwind label %unwind813 + +cleanup819: ; preds = %invcont815 + call void @__gnat_end_handler( i8* %eh_exception.05914.0 ) + %tmp8595931 = icmp ult i8 %tmp170171, %tmp204205 ; <i1> [#uses=1] + %tmp8635932 = icmp ugt i8 %tmp170171, %tmp272273 ; <i1> [#uses=1] + %tmp8675933 = or i1 %tmp8635932, %tmp8595931 ; <i1> [#uses=1] + br i1 %tmp8675933, label %cond_true870, label %bb887 + +eh_else823: ; preds = %cleanup805, %unwind + %eh_selector.05912.1 = phi i32 [ %eh_select, %unwind ], [ %eh_selector.0, %cleanup805 ] ; <i32> [#uses=1] + %eh_exception.05914.1 = phi i8* [ %eh_ptr, %unwind ], [ %eh_exception.0, %cleanup805 ] ; <i8*> [#uses=4] + %eh_typeid824 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp826 = icmp eq i32 %eh_selector.05912.1, %eh_typeid824 ; <i1> [#uses=1] + br i1 %tmp826, label %eh_then827, label %Unwind + +eh_then827: ; preds = %eh_else823 + invoke void @__gnat_begin_handler( i8* %eh_exception.05914.1 ) + to label %invcont833 unwind label %unwind831 + +unwind831: ; preds = %invcont835, %invcont833, %eh_then827 + %eh_ptr832 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_exception.05914.1 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr832 ) ; <i32>:1 [#uses=0] + unreachable + +invcont833: ; preds = %eh_then827 + %tmp834 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp834( ) + to label %invcont835 unwind label %unwind831 + +invcont835: ; preds = %invcont833 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([24 x i8]* @.str5 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.35.915 to i32) to i64), i64 32)) ) + to label %cleanup844 unwind label %unwind831 + +cleanup844: ; preds = %invcont835 + call void @__gnat_end_handler( i8* %eh_exception.05914.1 ) + br label %cond_true856 + +cond_true856: ; preds = %cleanup844, %cleanup798, %cleanup + %tmp859 = icmp ult i8 %tmp170171, %tmp204205 ; <i1> [#uses=1] + %tmp863 = icmp ugt i8 %tmp170171, %tmp272273 ; <i1> [#uses=1] + %tmp867 = or i1 %tmp863, %tmp859 ; <i1> [#uses=1] + br i1 %tmp867, label %cond_true870, label %bb887 + +cond_true870: ; preds = %cond_true856, %cleanup819 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 103 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind871 + +unwind871: ; preds = %cond_next905, %bb887, %cond_true870 + %sat.3 = phi i8 [ %tmp340341, %cond_true870 ], [ %sat.1, %bb887 ], [ %sat.0, %cond_next905 ] ; <i8> [#uses=2] + %eh_ptr872 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=8] + %eh_select874 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr872, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid915 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp917 = icmp eq i32 %eh_select874, %eh_typeid915 ; <i1> [#uses=1] + br i1 %tmp917, label %eh_then918, label %eh_else932 + +bb887: ; preds = %cond_next901, %cond_true856, %cleanup819 + %indvar = phi i8 [ %indvar.next10, %cond_next901 ], [ 0, %cond_true856 ], [ 0, %cleanup819 ] ; <i8> [#uses=2] + %sat.1 = phi i8 [ %sat.0, %cond_next901 ], [ %tmp340341, %cond_true856 ], [ %tmp340341, %cleanup819 ] ; <i8> [#uses=2] + %tmp889 = invoke i8 @report__equal( i32 2, i32 2 ) + to label %invcont888 unwind label %unwind871 ; <i8> [#uses=1] + +invcont888: ; preds = %bb887 + %i.4 = add i8 %indvar, %tmp170171 ; <i8> [#uses=1] + %tmp890 = icmp eq i8 %tmp889, 0 ; <i1> [#uses=1] + %sat.0 = select i1 %tmp890, i8 %sat.1, i8 6 ; <i8> [#uses=3] + %tmp897 = icmp eq i8 %i.4, %tmp170171 ; <i1> [#uses=1] + br i1 %tmp897, label %cond_next905, label %cond_next901 + +cond_next901: ; preds = %invcont888 + %indvar.next10 = add i8 %indvar, 1 ; <i8> [#uses=1] + br label %bb887 + +cond_next905: ; preds = %invcont888 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([29 x i8]* @.str6 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.36.923 to i32) to i64), i64 32)) ) + to label %finally913 unwind label %unwind871 + +eh_then918: ; preds = %unwind871 + invoke void @__gnat_begin_handler( i8* %eh_ptr872 ) + to label %invcont924 unwind label %unwind922 + +unwind922: ; preds = %invcont924, %eh_then918 + %eh_ptr923 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr872 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr923 ) ; <i32>:2 [#uses=0] + unreachable + +invcont924: ; preds = %eh_then918 + %tmp925 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp925( ) + to label %cleanup928 unwind label %unwind922 + +cleanup928: ; preds = %invcont924 + call void @__gnat_end_handler( i8* %eh_ptr872 ) + br i1 %tmp462, label %cond_true973, label %UnifiedReturnBlock35 + +eh_else932: ; preds = %unwind871 + %eh_typeid933 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp935 = icmp eq i32 %eh_select874, %eh_typeid933 ; <i1> [#uses=1] + br i1 %tmp935, label %eh_then936, label %Unwind + +eh_then936: ; preds = %eh_else932 + invoke void @__gnat_begin_handler( i8* %eh_ptr872 ) + to label %invcont942 unwind label %unwind940 + +unwind940: ; preds = %invcont944, %invcont942, %eh_then936 + %eh_ptr941 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr872 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr941 ) ; <i32>:3 [#uses=0] + unreachable + +invcont942: ; preds = %eh_then936 + %tmp943 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp943( ) + to label %invcont944 unwind label %unwind940 + +invcont944: ; preds = %invcont942 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([24 x i8]* @.str7 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.35.915 to i32) to i64), i64 32)) ) + to label %cleanup953 unwind label %unwind940 + +cleanup953: ; preds = %invcont944 + call void @__gnat_end_handler( i8* %eh_ptr872 ) + br label %finally913 + +finally913: ; preds = %cleanup953, %cond_next905 + %sat.4 = phi i8 [ %sat.3, %cleanup953 ], [ %sat.0, %cond_next905 ] ; <i8> [#uses=1] + br i1 %tmp462, label %cond_true973, label %UnifiedReturnBlock35 + +cond_true973: ; preds = %finally913, %cleanup928 + %sat.45934.0 = phi i8 [ %sat.3, %cleanup928 ], [ %sat.4, %finally913 ] ; <i8> [#uses=9] + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 119 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind974 + +unwind974: ; preds = %cond_true973 + %eh_ptr975 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=8] + %eh_select977 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr975, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid13135959 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp13155961 = icmp eq i32 %eh_select977, %eh_typeid13135959 ; <i1> [#uses=1] + br i1 %tmp13155961, label %eh_then1316, label %eh_else1330 + +eh_then1316: ; preds = %unwind974 + invoke void @__gnat_begin_handler( i8* %eh_ptr975 ) + to label %invcont1322 unwind label %unwind1320 + +unwind1320: ; preds = %invcont1322, %eh_then1316 + %eh_ptr1321 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr975 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr1321 ) ; <i32>:4 [#uses=0] + unreachable + +invcont1322: ; preds = %eh_then1316 + %tmp1323 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp1323( ) + to label %cleanup1326 unwind label %unwind1320 + +cleanup1326: ; preds = %invcont1322 + call void @__gnat_end_handler( i8* %eh_ptr975 ) + br label %finally1311 + +eh_else1330: ; preds = %unwind974 + %eh_typeid1331 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp1333 = icmp eq i32 %eh_select977, %eh_typeid1331 ; <i1> [#uses=1] + br i1 %tmp1333, label %eh_then1334, label %Unwind + +eh_then1334: ; preds = %eh_else1330 + invoke void @__gnat_begin_handler( i8* %eh_ptr975 ) + to label %invcont1340 unwind label %unwind1338 + +unwind1338: ; preds = %invcont1342, %invcont1340, %eh_then1334 + %eh_ptr1339 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr975 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr1339 ) ; <i32>:5 [#uses=0] + unreachable + +invcont1340: ; preds = %eh_then1334 + %tmp1341 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp1341( ) + to label %invcont1342 unwind label %unwind1338 + +invcont1342: ; preds = %invcont1340 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([24 x i8]* @.str10 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.35.915 to i32) to i64), i64 32)) ) + to label %cleanup1351 unwind label %unwind1338 + +cleanup1351: ; preds = %invcont1342 + call void @__gnat_end_handler( i8* %eh_ptr975 ) + br label %finally1311 + +finally1311: ; preds = %cleanup1351, %cleanup1326 + %tmp1356 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=6] + %tmp13571358 = and i32 %tmp184, 255 ; <i32> [#uses=11] + %tmp13831384 = and i32 %tmp252, 255 ; <i32> [#uses=5] + %tmp1387 = add i32 %tmp13571358, -1 ; <i32> [#uses=2] + %tmp1388 = icmp sge i32 %tmp13831384, %tmp1387 ; <i1> [#uses=1] + %max1389 = select i1 %tmp1388, i32 %tmp13831384, i32 %tmp1387 ; <i32> [#uses=1] + %tmp1392 = sub i32 %max1389, %tmp13571358 ; <i32> [#uses=1] + %tmp1393 = add i32 %tmp1392, 1 ; <i32> [#uses=2] + %tmp1394 = icmp sgt i32 %tmp1393, -1 ; <i1> [#uses=1] + %max1395 = select i1 %tmp1394, i32 %tmp1393, i32 0 ; <i32> [#uses=5] + %tmp1397 = alloca i8, i32 %max1395 ; <i8*> [#uses=2] + %tmp1401 = icmp ult i8 %tmp238239, %tmp170171 ; <i1> [#uses=2] + br i1 %tmp1401, label %cond_next1425, label %cond_true1404 + +cond_true1404: ; preds = %finally1311 + %tmp1407 = icmp ult i8 %tmp170171, %tmp204205 ; <i1> [#uses=1] + %tmp1411 = icmp ugt i8 %tmp238239, %tmp272273 ; <i1> [#uses=1] + %tmp1415 = or i1 %tmp1411, %tmp1407 ; <i1> [#uses=1] + br i1 %tmp1415, label %cond_true1418, label %cond_next1425 + +cond_true1418: ; preds = %cond_true1404 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 144 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind1419 + +unwind1419: ; preds = %cleanup1702, %cleanup1686, %unwind1676, %cond_next1548, %cond_true1546, %cond_true1418 + %eh_ptr1420 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select1422 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr1420, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid17215981 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp17235983 = icmp eq i32 %eh_select1422, %eh_typeid17215981 ; <i1> [#uses=1] + br i1 %tmp17235983, label %eh_then1724, label %eh_else1742 + +cond_next1425: ; preds = %cond_true1404, %finally1311 + %tmp14281429 = and i32 %tmp150, 255 ; <i32> [#uses=3] + %tmp14841485 = and i32 %tmp218, 255 ; <i32> [#uses=3] + %tmp1488 = add i32 %tmp14281429, -1 ; <i32> [#uses=2] + %tmp1489 = icmp sge i32 %tmp14841485, %tmp1488 ; <i1> [#uses=1] + %max1490 = select i1 %tmp1489, i32 %tmp14841485, i32 %tmp1488 ; <i32> [#uses=1] + %tmp1493 = sub i32 %max1490, %tmp14281429 ; <i32> [#uses=1] + %tmp1494 = add i32 %tmp1493, 1 ; <i32> [#uses=2] + %tmp1495 = icmp sgt i32 %tmp1494, -1 ; <i1> [#uses=1] + %max1496 = select i1 %tmp1495, i32 %tmp1494, i32 0 ; <i32> [#uses=1] + %tmp1497 = alloca i8, i32 %max1496 ; <i8*> [#uses=3] + %tmp1504 = icmp ugt i8 %tmp170171, %tmp238239 ; <i1> [#uses=1] + br i1 %tmp1504, label %cond_next1526, label %bb1509 + +bb1509: ; preds = %cond_next1425 + store i8 %tmp238239, i8* %tmp1497 + %tmp1518 = icmp eq i8 %tmp238239, %tmp170171 ; <i1> [#uses=1] + br i1 %tmp1518, label %cond_next1526, label %cond_next1522.preheader + +cond_next1522.preheader: ; preds = %bb1509 + %J64b.55984.8 = add i8 %tmp170171, 1 ; <i8> [#uses=1] + br label %cond_next1522 + +cond_next1522: ; preds = %cond_next1522, %cond_next1522.preheader + %indvar6241 = phi i8 [ 0, %cond_next1522.preheader ], [ %indvar.next, %cond_next1522 ] ; <i8> [#uses=2] + %tmp1524 = add i8 %J64b.55984.8, %indvar6241 ; <i8> [#uses=2] + %tmp151015115988 = zext i8 %tmp1524 to i32 ; <i32> [#uses=1] + %tmp15135989 = sub i32 %tmp151015115988, %tmp14281429 ; <i32> [#uses=1] + %tmp15145990 = getelementptr i8* %tmp1497, i32 %tmp15135989 ; <i8*> [#uses=1] + store i8 %tmp238239, i8* %tmp15145990 + %tmp15185992 = icmp eq i8 %tmp238239, %tmp1524 ; <i1> [#uses=1] + %indvar.next = add i8 %indvar6241, 1 ; <i8> [#uses=1] + br i1 %tmp15185992, label %cond_next1526, label %cond_next1522 + +cond_next1526: ; preds = %cond_next1522, %bb1509, %cond_next1425 + %tmp15271528 = zext i8 %tmp272273 to i64 ; <i64> [#uses=1] + %tmp15291530 = zext i8 %tmp204205 to i64 ; <i64> [#uses=1] + %tmp1531 = sub i64 %tmp15271528, %tmp15291530 ; <i64> [#uses=1] + %tmp1532 = add i64 %tmp1531, 1 ; <i64> [#uses=2] + %tmp1533 = icmp sgt i64 %tmp1532, -1 ; <i1> [#uses=1] + %max1534 = select i1 %tmp1533, i64 %tmp1532, i64 0 ; <i64> [#uses=1] + %tmp15351536 = zext i8 %tmp238239 to i64 ; <i64> [#uses=1] + %tmp15371538 = zext i8 %tmp170171 to i64 ; <i64> [#uses=1] + %tmp1539 = sub i64 %tmp15351536, %tmp15371538 ; <i64> [#uses=1] + %tmp1540 = add i64 %tmp1539, 1 ; <i64> [#uses=2] + %tmp1541 = icmp sgt i64 %tmp1540, -1 ; <i1> [#uses=1] + %max1542 = select i1 %tmp1541, i64 %tmp1540, i64 0 ; <i64> [#uses=1] + %tmp1543 = icmp eq i64 %max1534, %max1542 ; <i1> [#uses=1] + br i1 %tmp1543, label %cond_next1548, label %cond_true1546 + +cond_true1546: ; preds = %cond_next1526 + invoke void @__gnat_rcheck_07( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 144 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind1419 + +cond_next1548: ; preds = %cond_next1526 + call void @llvm.memcpy.i32( i8* %tmp1397, i8* %tmp1497, i32 %max1395, i32 1 ) + invoke void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp31 sret ) + to label %invcont1552 unwind label %unwind1419 + +invcont1552: ; preds = %cond_next1548 + %tmp1555 = getelementptr %struct.system__secondary_stack__mark_id* %tmp31, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp1556 = load i8** %tmp1555 ; <i8*> [#uses=3] + %tmp1558 = getelementptr %struct.system__secondary_stack__mark_id* %tmp31, i32 0, i32 1 ; <i32*> [#uses=1] + %tmp1559 = load i32* %tmp1558 ; <i32> [#uses=3] + %tmp1562 = icmp ult i8 %tmp238239, %tmp204205 ; <i1> [#uses=1] + %tmp1566 = icmp ugt i8 %tmp238239, %tmp272273 ; <i1> [#uses=1] + %tmp1570 = or i1 %tmp1566, %tmp1562 ; <i1> [#uses=1] + br i1 %tmp1570, label %cond_true1573, label %cond_next1591 + +cond_true1573: ; preds = %invcont1552 + invoke void @__gnat_rcheck_05( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 148 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind1574 + +unwind1574: ; preds = %invcont1638, %invcont1621, %bb1607, %bb1605, %cond_true1573 + %eh_ptr1575 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select1577 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr1575, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid1652 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp1654 = icmp eq i32 %eh_select1577, %eh_typeid1652 ; <i1> [#uses=1] + br i1 %tmp1654, label %eh_then1655, label %cleanup1686 + +cond_next1591: ; preds = %invcont1552 + %tmp1595 = sub i32 %tmp14841485, %tmp13571358 ; <i32> [#uses=1] + %tmp1596 = getelementptr i8* %tmp1397, i32 %tmp1595 ; <i8*> [#uses=1] + %tmp1597 = load i8* %tmp1596 ; <i8> [#uses=2] + %tmp1599 = icmp ugt i8 %tmp1597, 6 ; <i1> [#uses=1] + br i1 %tmp1599, label %bb1605, label %bb1607 + +bb1605: ; preds = %cond_next1591 + invoke void @__gnat_rcheck_06( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 148 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind1574 + +bb1607: ; preds = %cond_next1591 + %tmp16151616 = zext i8 %tmp1597 to i32 ; <i32> [#uses=1] + invoke void @system__img_enum__image_enumeration_8( %struct.string___XUP* %tmp34 sret , i32 %tmp16151616, i64 or (i64 zext (i32 ptrtoint ([28 x i8]* @weekS.154 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.32.910 to i32) to i64), i64 32)), i8* getelementptr ([8 x i8]* @weekN.179, i32 0, i32 0) ) + to label %invcont1621 unwind label %unwind1574 + +invcont1621: ; preds = %bb1607 + %tmp1623 = getelementptr %struct.string___XUP* %tmp34, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp1624 = load i8** %tmp1623 ; <i8*> [#uses=1] + %tmp16245815 = ptrtoint i8* %tmp1624 to i32 ; <i32> [#uses=1] + %tmp162458155816 = zext i32 %tmp16245815 to i64 ; <i64> [#uses=1] + %tmp1626 = getelementptr %struct.string___XUP* %tmp34, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp1627 = load %struct.string___XUB** %tmp1626 ; <%struct.string___XUB*> [#uses=1] + %tmp16275811 = ptrtoint %struct.string___XUB* %tmp1627 to i32 ; <i32> [#uses=1] + %tmp162758115812 = zext i32 %tmp16275811 to i64 ; <i64> [#uses=1] + %tmp1627581158125813 = shl i64 %tmp162758115812, 32 ; <i64> [#uses=1] + %tmp1627581158125813.ins = or i64 %tmp1627581158125813, %tmp162458155816 ; <i64> [#uses=1] + invoke void @system__string_ops__str_concat( %struct.string___XUP* %tmp37 sret , i64 or (i64 zext (i32 ptrtoint ([30 x i8]* @.str11 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.30.904 to i32) to i64), i64 32)), i64 %tmp1627581158125813.ins ) + to label %invcont1638 unwind label %unwind1574 + +invcont1638: ; preds = %invcont1621 + %tmp1640 = getelementptr %struct.string___XUP* %tmp37, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp1641 = load i8** %tmp1640 ; <i8*> [#uses=1] + %tmp16415803 = ptrtoint i8* %tmp1641 to i32 ; <i32> [#uses=1] + %tmp164158035804 = zext i32 %tmp16415803 to i64 ; <i64> [#uses=1] + %tmp1643 = getelementptr %struct.string___XUP* %tmp37, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp1644 = load %struct.string___XUB** %tmp1643 ; <%struct.string___XUB*> [#uses=1] + %tmp16445799 = ptrtoint %struct.string___XUB* %tmp1644 to i32 ; <i32> [#uses=1] + %tmp164457995800 = zext i32 %tmp16445799 to i64 ; <i64> [#uses=1] + %tmp1644579958005801 = shl i64 %tmp164457995800, 32 ; <i64> [#uses=1] + %tmp1644579958005801.ins = or i64 %tmp1644579958005801, %tmp164158035804 ; <i64> [#uses=1] + invoke void @report__failed( i64 %tmp1644579958005801.ins ) + to label %cleanup1702 unwind label %unwind1574 + +eh_then1655: ; preds = %unwind1574 + invoke void @__gnat_begin_handler( i8* %eh_ptr1575 ) + to label %invcont1663 unwind label %unwind1659 + +unwind1659: ; preds = %invcont1665, %invcont1663, %eh_then1655 + %eh_ptr1660 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] + %eh_select1662 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr1660, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_ptr1575 ) + to label %cleanup1686 unwind label %unwind1676 + +invcont1663: ; preds = %eh_then1655 + %tmp1664 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp1664( ) + to label %invcont1665 unwind label %unwind1659 + +invcont1665: ; preds = %invcont1663 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([28 x i8]* @.str12 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.32.910 to i32) to i64), i64 32)) ) + to label %cleanup1674 unwind label %unwind1659 + +cleanup1674: ; preds = %invcont1665 + invoke void @__gnat_end_handler( i8* %eh_ptr1575 ) + to label %cleanup1702 unwind label %unwind1676 + +unwind1676: ; preds = %cleanup1674, %unwind1659 + %eh_ptr1677 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] + %eh_select1679 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr1677, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=1] + %tmp169255575995 = ptrtoint i8* %tmp1556 to i32 ; <i32> [#uses=1] + %tmp1692555755585996 = zext i32 %tmp169255575995 to i64 ; <i64> [#uses=1] + %tmp169555545997 = zext i32 %tmp1559 to i64 ; <i64> [#uses=1] + %tmp1695555455555998 = shl i64 %tmp169555545997, 32 ; <i64> [#uses=1] + %tmp169555545555.ins5999 = or i64 %tmp1695555455555998, %tmp1692555755585996 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp169555545555.ins5999 ) + to label %cleanup1720 unwind label %unwind1419 + +cleanup1686: ; preds = %unwind1659, %unwind1574 + %eh_selector.18 = phi i32 [ %eh_select1577, %unwind1574 ], [ %eh_select1662, %unwind1659 ] ; <i32> [#uses=1] + %eh_exception.18 = phi i8* [ %eh_ptr1575, %unwind1574 ], [ %eh_ptr1660, %unwind1659 ] ; <i8*> [#uses=1] + %tmp16925557 = ptrtoint i8* %tmp1556 to i32 ; <i32> [#uses=1] + %tmp169255575558 = zext i32 %tmp16925557 to i64 ; <i64> [#uses=1] + %tmp16955554 = zext i32 %tmp1559 to i64 ; <i64> [#uses=1] + %tmp169555545555 = shl i64 %tmp16955554, 32 ; <i64> [#uses=1] + %tmp169555545555.ins = or i64 %tmp169555545555, %tmp169255575558 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp169555545555.ins ) + to label %cleanup1720 unwind label %unwind1419 + +cleanup1702: ; preds = %cleanup1674, %invcont1638 + %tmp17095551 = ptrtoint i8* %tmp1556 to i32 ; <i32> [#uses=1] + %tmp170955515552 = zext i32 %tmp17095551 to i64 ; <i64> [#uses=1] + %tmp17125548 = zext i32 %tmp1559 to i64 ; <i64> [#uses=1] + %tmp171255485549 = shl i64 %tmp17125548, 32 ; <i64> [#uses=1] + %tmp171255485549.ins = or i64 %tmp171255485549, %tmp170955515552 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp171255485549.ins ) + to label %cleanup1773 unwind label %unwind1419 + +cleanup1720: ; preds = %cleanup1686, %unwind1676 + %eh_selector.185993.1 = phi i32 [ %eh_select1679, %unwind1676 ], [ %eh_selector.18, %cleanup1686 ] ; <i32> [#uses=2] + %eh_exception.185994.1 = phi i8* [ %eh_ptr1677, %unwind1676 ], [ %eh_exception.18, %cleanup1686 ] ; <i8*> [#uses=2] + %eh_typeid1721 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp1723 = icmp eq i32 %eh_selector.185993.1, %eh_typeid1721 ; <i1> [#uses=1] + br i1 %tmp1723, label %eh_then1724, label %eh_else1742 + +eh_then1724: ; preds = %cleanup1720, %unwind1419 + %eh_exception.135974.0 = phi i8* [ %eh_ptr1420, %unwind1419 ], [ %eh_exception.185994.1, %cleanup1720 ] ; <i8*> [#uses=3] + invoke void @__gnat_begin_handler( i8* %eh_exception.135974.0 ) + to label %invcont1730 unwind label %unwind1728 + +unwind1728: ; preds = %invcont1730, %eh_then1724 + %eh_ptr1729 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_exception.135974.0 ) + to label %cleanup1771 unwind label %unwind1736 + +invcont1730: ; preds = %eh_then1724 + %tmp1731 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp1731( ) + to label %cleanup1734 unwind label %unwind1728 + +cleanup1734: ; preds = %invcont1730 + invoke void @__gnat_end_handler( i8* %eh_exception.135974.0 ) + to label %cleanup1773 unwind label %unwind1736 + +unwind1736: ; preds = %cleanup1763, %unwind1750, %cleanup1734, %unwind1728 + %eh_ptr1737 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp1356 ) + call void @llvm.stackrestore( i8* %tmp1356 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr1737 ) ; <i32>:6 [#uses=0] + unreachable + +eh_else1742: ; preds = %cleanup1720, %unwind1419 + %eh_selector.135972.1 = phi i32 [ %eh_select1422, %unwind1419 ], [ %eh_selector.185993.1, %cleanup1720 ] ; <i32> [#uses=1] + %eh_exception.135974.1 = phi i8* [ %eh_ptr1420, %unwind1419 ], [ %eh_exception.185994.1, %cleanup1720 ] ; <i8*> [#uses=4] + %eh_typeid1743 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp1745 = icmp eq i32 %eh_selector.135972.1, %eh_typeid1743 ; <i1> [#uses=1] + br i1 %tmp1745, label %eh_then1746, label %cleanup1771 + +eh_then1746: ; preds = %eh_else1742 + invoke void @__gnat_begin_handler( i8* %eh_exception.135974.1 ) + to label %invcont1752 unwind label %unwind1750 + +unwind1750: ; preds = %invcont1754, %invcont1752, %eh_then1746 + %eh_ptr1751 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_exception.135974.1 ) + to label %cleanup1771 unwind label %unwind1736 + +invcont1752: ; preds = %eh_then1746 + %tmp1753 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp1753( ) + to label %invcont1754 unwind label %unwind1750 + +invcont1754: ; preds = %invcont1752 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([24 x i8]* @.str13 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.35.915 to i32) to i64), i64 32)) ) + to label %cleanup1763 unwind label %unwind1750 + +cleanup1763: ; preds = %invcont1754 + invoke void @__gnat_end_handler( i8* %eh_exception.135974.1 ) + to label %cleanup1773 unwind label %unwind1736 + +cleanup1771: ; preds = %unwind1750, %eh_else1742, %unwind1728 + %eh_exception.20 = phi i8* [ %eh_ptr1729, %unwind1728 ], [ %eh_exception.135974.1, %eh_else1742 ], [ %eh_ptr1751, %unwind1750 ] ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp1356 ) + call void @llvm.stackrestore( i8* %tmp1356 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_exception.20 ) ; <i32>:7 [#uses=0] + unreachable + +cleanup1773: ; preds = %cleanup1763, %cleanup1734, %cleanup1702 + call void @llvm.stackrestore( i8* %tmp1356 ) + call void @llvm.stackrestore( i8* %tmp1356 ) + %tmp1780 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=6] + %tmp17811782 = and i32 %tmp150, 255 ; <i32> [#uses=4] + %tmp18071808 = and i32 %tmp286, 255 ; <i32> [#uses=2] + %tmp1811 = add i32 %tmp17811782, -1 ; <i32> [#uses=2] + %tmp1812 = icmp sge i32 %tmp18071808, %tmp1811 ; <i1> [#uses=1] + %max1813 = select i1 %tmp1812, i32 %tmp18071808, i32 %tmp1811 ; <i32> [#uses=1] + %tmp1816 = sub i32 %max1813, %tmp17811782 ; <i32> [#uses=1] + %tmp1817 = add i32 %tmp1816, 1 ; <i32> [#uses=2] + %tmp1818 = icmp sgt i32 %tmp1817, -1 ; <i1> [#uses=1] + %max1819 = select i1 %tmp1818, i32 %tmp1817, i32 0 ; <i32> [#uses=3] + %tmp1821 = alloca i8, i32 %max1819 ; <i8*> [#uses=2] + %tmp1863 = alloca i8, i32 %max1819 ; <i8*> [#uses=3] + %tmp1870 = icmp ugt i8 %tmp170171, %tmp306307 ; <i1> [#uses=1] + br i1 %tmp1870, label %cond_next1900, label %bb1875 + +bb1875: ; preds = %cleanup1773 + store i8 %tmp238239, i8* %tmp1863 + %tmp1884 = icmp eq i8 %tmp306307, %tmp170171 ; <i1> [#uses=1] + br i1 %tmp1884, label %cond_next1900, label %cond_next1888.preheader + +cond_next1888.preheader: ; preds = %bb1875 + %J77b.26000.2 = add i8 %tmp170171, 1 ; <i8> [#uses=1] + br label %cond_next1888 + +cond_next1888: ; preds = %cond_next1888, %cond_next1888.preheader + %indvar6245 = phi i8 [ 0, %cond_next1888.preheader ], [ %indvar.next14, %cond_next1888 ] ; <i8> [#uses=2] + %tmp1890 = add i8 %J77b.26000.2, %indvar6245 ; <i8> [#uses=2] + %tmp187618776004 = zext i8 %tmp1890 to i32 ; <i32> [#uses=1] + %tmp18796005 = sub i32 %tmp187618776004, %tmp17811782 ; <i32> [#uses=1] + %tmp18806006 = getelementptr i8* %tmp1863, i32 %tmp18796005 ; <i8*> [#uses=1] + store i8 %tmp238239, i8* %tmp18806006 + %tmp18846008 = icmp eq i8 %tmp306307, %tmp1890 ; <i1> [#uses=1] + %indvar.next14 = add i8 %indvar6245, 1 ; <i8> [#uses=1] + br i1 %tmp18846008, label %cond_next1900, label %cond_next1888 + +unwind1895: ; preds = %cleanup2300, %cleanup2284, %unwind2274, %cond_next2149, %cond_true1946 + %eh_ptr1896 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select1898 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr1896, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid23196018 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp23216020 = icmp eq i32 %eh_select1898, %eh_typeid23196018 ; <i1> [#uses=1] + br i1 %tmp23216020, label %eh_then2322, label %eh_else2340 + +cond_next1900: ; preds = %cond_next1888, %bb1875, %cleanup1773 + call void @llvm.memcpy.i32( i8* %tmp1821, i8* %tmp1863, i32 %max1819, i32 1 ) + ret void + +cond_true1909: ; No predecessors! + %tmp1912 = icmp ult i8 %tmp170171, %tmp204205 ; <i1> [#uses=1] + %tmp1916 = icmp ugt i8 %tmp238239, %tmp272273 ; <i1> [#uses=1] + %tmp1920 = or i1 %tmp1916, %tmp1912 ; <i1> [#uses=0] + ret void + +cond_true1923: ; No predecessors! + ret void + +cond_next1926: ; No predecessors! + %tmp1929.not = icmp uge i8 %tmp238239, %tmp170171 ; <i1> [#uses=1] + %tmp1939 = icmp ugt i8 %tmp238239, %tmp306307 ; <i1> [#uses=2] + %bothcond = and i1 %tmp1939, %tmp1929.not ; <i1> [#uses=0] + ret void + +cond_true1946: ; No predecessors! + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 162 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind1895 + +cond_next2149: ; No predecessors! + invoke void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp46 sret ) + to label %invcont2150 unwind label %unwind1895 + +invcont2150: ; preds = %cond_next2149 + %tmp2153 = getelementptr %struct.system__secondary_stack__mark_id* %tmp46, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2154 = load i8** %tmp2153 ; <i8*> [#uses=3] + %tmp2156 = getelementptr %struct.system__secondary_stack__mark_id* %tmp46, i32 0, i32 1 ; <i32*> [#uses=1] + %tmp2157 = load i32* %tmp2156 ; <i32> [#uses=3] + %tmp2168 = or i1 %tmp1939, %tmp1401 ; <i1> [#uses=1] + br i1 %tmp2168, label %cond_true2171, label %cond_next2189 + +cond_true2171: ; preds = %invcont2150 + invoke void @__gnat_rcheck_05( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 165 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2172 + +unwind2172: ; preds = %invcont2236, %invcont2219, %bb2205, %bb2203, %cond_true2171 + %eh_ptr2173 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select2175 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2173, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid2250 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp2252 = icmp eq i32 %eh_select2175, %eh_typeid2250 ; <i1> [#uses=1] + br i1 %tmp2252, label %eh_then2253, label %cleanup2284 + +cond_next2189: ; preds = %invcont2150 + %tmp21902191 = and i32 %tmp218, 255 ; <i32> [#uses=1] + %tmp2193 = sub i32 %tmp21902191, %tmp17811782 ; <i32> [#uses=1] + %tmp2194 = getelementptr i8* %tmp1821, i32 %tmp2193 ; <i8*> [#uses=1] + %tmp2195 = load i8* %tmp2194 ; <i8> [#uses=2] + %tmp2197 = icmp ugt i8 %tmp2195, 6 ; <i1> [#uses=1] + br i1 %tmp2197, label %bb2203, label %bb2205 + +bb2203: ; preds = %cond_next2189 + invoke void @__gnat_rcheck_06( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 165 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2172 + +bb2205: ; preds = %cond_next2189 + %tmp22132214 = zext i8 %tmp2195 to i32 ; <i32> [#uses=1] + invoke void @system__img_enum__image_enumeration_8( %struct.string___XUP* %tmp49 sret , i32 %tmp22132214, i64 or (i64 zext (i32 ptrtoint ([28 x i8]* @weekS.154 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.32.910 to i32) to i64), i64 32)), i8* getelementptr ([8 x i8]* @weekN.179, i32 0, i32 0) ) + to label %invcont2219 unwind label %unwind2172 + +invcont2219: ; preds = %bb2205 + %tmp2221 = getelementptr %struct.string___XUP* %tmp49, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2222 = load i8** %tmp2221 ; <i8*> [#uses=1] + %tmp22225781 = ptrtoint i8* %tmp2222 to i32 ; <i32> [#uses=1] + %tmp222257815782 = zext i32 %tmp22225781 to i64 ; <i64> [#uses=1] + %tmp2224 = getelementptr %struct.string___XUP* %tmp49, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp2225 = load %struct.string___XUB** %tmp2224 ; <%struct.string___XUB*> [#uses=1] + %tmp22255777 = ptrtoint %struct.string___XUB* %tmp2225 to i32 ; <i32> [#uses=1] + %tmp222557775778 = zext i32 %tmp22255777 to i64 ; <i64> [#uses=1] + %tmp2225577757785779 = shl i64 %tmp222557775778, 32 ; <i64> [#uses=1] + %tmp2225577757785779.ins = or i64 %tmp2225577757785779, %tmp222257815782 ; <i64> [#uses=1] + invoke void @system__string_ops__str_concat( %struct.string___XUP* %tmp52 sret , i64 or (i64 zext (i32 ptrtoint ([30 x i8]* @.str14 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.30.904 to i32) to i64), i64 32)), i64 %tmp2225577757785779.ins ) + to label %invcont2236 unwind label %unwind2172 + +invcont2236: ; preds = %invcont2219 + %tmp2238 = getelementptr %struct.string___XUP* %tmp52, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2239 = load i8** %tmp2238 ; <i8*> [#uses=1] + %tmp22395769 = ptrtoint i8* %tmp2239 to i32 ; <i32> [#uses=1] + %tmp223957695770 = zext i32 %tmp22395769 to i64 ; <i64> [#uses=1] + %tmp2241 = getelementptr %struct.string___XUP* %tmp52, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp2242 = load %struct.string___XUB** %tmp2241 ; <%struct.string___XUB*> [#uses=1] + %tmp22425765 = ptrtoint %struct.string___XUB* %tmp2242 to i32 ; <i32> [#uses=1] + %tmp224257655766 = zext i32 %tmp22425765 to i64 ; <i64> [#uses=1] + %tmp2242576557665767 = shl i64 %tmp224257655766, 32 ; <i64> [#uses=1] + %tmp2242576557665767.ins = or i64 %tmp2242576557665767, %tmp223957695770 ; <i64> [#uses=1] + invoke void @report__failed( i64 %tmp2242576557665767.ins ) + to label %cleanup2300 unwind label %unwind2172 + +eh_then2253: ; preds = %unwind2172 + invoke void @__gnat_begin_handler( i8* %eh_ptr2173 ) + to label %invcont2261 unwind label %unwind2257 + +unwind2257: ; preds = %invcont2263, %invcont2261, %eh_then2253 + %eh_ptr2258 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] + %eh_select2260 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2258, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_ptr2173 ) + to label %cleanup2284 unwind label %unwind2274 + +invcont2261: ; preds = %eh_then2253 + %tmp2262 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp2262( ) + to label %invcont2263 unwind label %unwind2257 + +invcont2263: ; preds = %invcont2261 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([28 x i8]* @.str15 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.32.910 to i32) to i64), i64 32)) ) + to label %cleanup2272 unwind label %unwind2257 + +cleanup2272: ; preds = %invcont2263 + invoke void @__gnat_end_handler( i8* %eh_ptr2173 ) + to label %cleanup2300 unwind label %unwind2274 + +unwind2274: ; preds = %cleanup2272, %unwind2257 + %eh_ptr2275 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] + %eh_select2277 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2275, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=1] + %tmp229055456023 = ptrtoint i8* %tmp2154 to i32 ; <i32> [#uses=1] + %tmp2290554555466024 = zext i32 %tmp229055456023 to i64 ; <i64> [#uses=1] + %tmp229355426025 = zext i32 %tmp2157 to i64 ; <i64> [#uses=1] + %tmp2293554255436026 = shl i64 %tmp229355426025, 32 ; <i64> [#uses=1] + %tmp229355425543.ins6027 = or i64 %tmp2293554255436026, %tmp2290554555466024 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp229355425543.ins6027 ) + to label %cleanup2318 unwind label %unwind1895 + +cleanup2284: ; preds = %unwind2257, %unwind2172 + %eh_selector.24 = phi i32 [ %eh_select2175, %unwind2172 ], [ %eh_select2260, %unwind2257 ] ; <i32> [#uses=1] + %eh_exception.26 = phi i8* [ %eh_ptr2173, %unwind2172 ], [ %eh_ptr2258, %unwind2257 ] ; <i8*> [#uses=1] + %tmp22905545 = ptrtoint i8* %tmp2154 to i32 ; <i32> [#uses=1] + %tmp229055455546 = zext i32 %tmp22905545 to i64 ; <i64> [#uses=1] + %tmp22935542 = zext i32 %tmp2157 to i64 ; <i64> [#uses=1] + %tmp229355425543 = shl i64 %tmp22935542, 32 ; <i64> [#uses=1] + %tmp229355425543.ins = or i64 %tmp229355425543, %tmp229055455546 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp229355425543.ins ) + to label %cleanup2318 unwind label %unwind1895 + +cleanup2300: ; preds = %cleanup2272, %invcont2236 + %tmp23075539 = ptrtoint i8* %tmp2154 to i32 ; <i32> [#uses=1] + %tmp230755395540 = zext i32 %tmp23075539 to i64 ; <i64> [#uses=1] + %tmp23105536 = zext i32 %tmp2157 to i64 ; <i64> [#uses=1] + %tmp231055365537 = shl i64 %tmp23105536, 32 ; <i64> [#uses=1] + %tmp231055365537.ins = or i64 %tmp231055365537, %tmp230755395540 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp231055365537.ins ) + to label %cleanup2371 unwind label %unwind1895 + +cleanup2318: ; preds = %cleanup2284, %unwind2274 + %eh_selector.246021.1 = phi i32 [ %eh_select2277, %unwind2274 ], [ %eh_selector.24, %cleanup2284 ] ; <i32> [#uses=2] + %eh_exception.266022.1 = phi i8* [ %eh_ptr2275, %unwind2274 ], [ %eh_exception.26, %cleanup2284 ] ; <i8*> [#uses=2] + %eh_typeid2319 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp2321 = icmp eq i32 %eh_selector.246021.1, %eh_typeid2319 ; <i1> [#uses=1] + br i1 %tmp2321, label %eh_then2322, label %eh_else2340 + +eh_then2322: ; preds = %cleanup2318, %unwind1895 + %eh_exception.216011.0 = phi i8* [ %eh_ptr1896, %unwind1895 ], [ %eh_exception.266022.1, %cleanup2318 ] ; <i8*> [#uses=3] + invoke void @__gnat_begin_handler( i8* %eh_exception.216011.0 ) + to label %invcont2328 unwind label %unwind2326 + +unwind2326: ; preds = %invcont2328, %eh_then2322 + %eh_ptr2327 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_exception.216011.0 ) + to label %cleanup2369 unwind label %unwind2334 + +invcont2328: ; preds = %eh_then2322 + %tmp2329 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp2329( ) + to label %cleanup2332 unwind label %unwind2326 + +cleanup2332: ; preds = %invcont2328 + invoke void @__gnat_end_handler( i8* %eh_exception.216011.0 ) + to label %cleanup2371 unwind label %unwind2334 + +unwind2334: ; preds = %cleanup2361, %unwind2348, %cleanup2332, %unwind2326 + %eh_ptr2335 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp1780 ) + call void @llvm.stackrestore( i8* %tmp1780 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr2335 ) ; <i32>:8 [#uses=0] + unreachable + +eh_else2340: ; preds = %cleanup2318, %unwind1895 + %eh_selector.196009.1 = phi i32 [ %eh_select1898, %unwind1895 ], [ %eh_selector.246021.1, %cleanup2318 ] ; <i32> [#uses=1] + %eh_exception.216011.1 = phi i8* [ %eh_ptr1896, %unwind1895 ], [ %eh_exception.266022.1, %cleanup2318 ] ; <i8*> [#uses=4] + %eh_typeid2341 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp2343 = icmp eq i32 %eh_selector.196009.1, %eh_typeid2341 ; <i1> [#uses=1] + br i1 %tmp2343, label %eh_then2344, label %cleanup2369 + +eh_then2344: ; preds = %eh_else2340 + invoke void @__gnat_begin_handler( i8* %eh_exception.216011.1 ) + to label %invcont2350 unwind label %unwind2348 + +unwind2348: ; preds = %invcont2352, %invcont2350, %eh_then2344 + %eh_ptr2349 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_exception.216011.1 ) + to label %cleanup2369 unwind label %unwind2334 + +invcont2350: ; preds = %eh_then2344 + %tmp2351 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp2351( ) + to label %invcont2352 unwind label %unwind2348 + +invcont2352: ; preds = %invcont2350 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([24 x i8]* @.str16 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.35.915 to i32) to i64), i64 32)) ) + to label %cleanup2361 unwind label %unwind2348 + +cleanup2361: ; preds = %invcont2352 + invoke void @__gnat_end_handler( i8* %eh_exception.216011.1 ) + to label %cleanup2371 unwind label %unwind2334 + +cleanup2369: ; preds = %unwind2348, %eh_else2340, %unwind2326 + %eh_exception.28 = phi i8* [ %eh_ptr2327, %unwind2326 ], [ %eh_exception.216011.1, %eh_else2340 ], [ %eh_ptr2349, %unwind2348 ] ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp1780 ) + call void @llvm.stackrestore( i8* %tmp1780 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_exception.28 ) ; <i32>:9 [#uses=0] + unreachable + +cleanup2371: ; preds = %cleanup2361, %cleanup2332, %cleanup2300 + call void @llvm.stackrestore( i8* %tmp1780 ) + call void @llvm.stackrestore( i8* %tmp1780 ) + invoke void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp55 sret ) + to label %invcont2382 unwind label %unwind2378 + +unwind2378: ; preds = %cleanup2371 + %eh_ptr2379 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select2381 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2379, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid26496037 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp26516039 = icmp eq i32 %eh_select2381, %eh_typeid26496037 ; <i1> [#uses=1] + br i1 %tmp26516039, label %eh_then2652, label %eh_else2666 + +invcont2382: ; preds = %cleanup2371 + %tmp2385 = getelementptr %struct.system__secondary_stack__mark_id* %tmp55, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2386 = load i8** %tmp2385 ; <i8*> [#uses=2] + %tmp2388 = getelementptr %struct.system__secondary_stack__mark_id* %tmp55, i32 0, i32 1 ; <i32*> [#uses=1] + %tmp2389 = load i32* %tmp2388 ; <i32> [#uses=2] + %tmp2390 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=3] + %tmp2393 = icmp ult i8 %tmp306307, %tmp170171 ; <i1> [#uses=1] + br i1 %tmp2393, label %cond_next2417, label %cond_true2396 + +cond_true2396: ; preds = %invcont2382 + %tmp2399 = icmp ult i8 %tmp170171, %tmp204205 ; <i1> [#uses=1] + %tmp2403 = icmp ugt i8 %tmp306307, %tmp272273 ; <i1> [#uses=1] + %tmp2407 = or i1 %tmp2403, %tmp2399 ; <i1> [#uses=1] + br i1 %tmp2407, label %cond_true2410, label %cond_next2417 + +cond_true2410: ; preds = %cond_true2396 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 177 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2411 + +unwind2411: ; preds = %invcont2591, %invcont2574, %bb2560, %bb2558, %bb2524, %bb2506, %cond_true2410 + %eh_ptr2412 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select2414 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2412, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + %tmp26315527 = ptrtoint i8* %tmp2386 to i32 ; <i32> [#uses=1] + %tmp263155275528 = zext i32 %tmp26315527 to i64 ; <i64> [#uses=1] + %tmp26345524 = zext i32 %tmp2389 to i64 ; <i64> [#uses=1] + %tmp263455245525 = shl i64 %tmp26345524, 32 ; <i64> [#uses=1] + %tmp263455245525.ins = or i64 %tmp263455245525, %tmp263155275528 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp263455245525.ins ) + to label %cleanup2644 unwind label %unwind2618 + +cond_next2417: ; preds = %cond_true2396, %invcont2382 + %tmp2493 = icmp ugt i8 %tmp170171, %tmp238239 ; <i1> [#uses=1] + %tmp2500 = icmp ugt i8 %tmp238239, %tmp306307 ; <i1> [#uses=1] + %bothcond5903 = or i1 %tmp2500, %tmp2493 ; <i1> [#uses=1] + br i1 %bothcond5903, label %bb2506, label %cond_next2515 + +bb2506: ; preds = %cond_next2417 + invoke void @__gnat_rcheck_05( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 180 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2411 + +cond_next2515: ; preds = %cond_next2417 + br i1 %tmp240, label %bb2524, label %bb2526 + +bb2524: ; preds = %cond_next2515 + invoke void @__gnat_rcheck_06( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 180 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2411 + +bb2526: ; preds = %cond_next2515 + br i1 %tmp274, label %bb2558, label %bb2560 + +bb2558: ; preds = %bb2526 + invoke void @__gnat_rcheck_06( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 182 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2411 + +bb2560: ; preds = %bb2526 + invoke void @system__img_enum__image_enumeration_8( %struct.string___XUP* %tmp58 sret , i32 %tmp13831384, i64 or (i64 zext (i32 ptrtoint ([28 x i8]* @weekS.154 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.32.910 to i32) to i64), i64 32)), i8* getelementptr ([8 x i8]* @weekN.179, i32 0, i32 0) ) + to label %invcont2574 unwind label %unwind2411 + +invcont2574: ; preds = %bb2560 + %tmp2576 = getelementptr %struct.string___XUP* %tmp58, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2577 = load i8** %tmp2576 ; <i8*> [#uses=1] + %tmp25775747 = ptrtoint i8* %tmp2577 to i32 ; <i32> [#uses=1] + %tmp257757475748 = zext i32 %tmp25775747 to i64 ; <i64> [#uses=1] + %tmp2579 = getelementptr %struct.string___XUP* %tmp58, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp2580 = load %struct.string___XUB** %tmp2579 ; <%struct.string___XUB*> [#uses=1] + %tmp25805743 = ptrtoint %struct.string___XUB* %tmp2580 to i32 ; <i32> [#uses=1] + %tmp258057435744 = zext i32 %tmp25805743 to i64 ; <i64> [#uses=1] + %tmp2580574357445745 = shl i64 %tmp258057435744, 32 ; <i64> [#uses=1] + %tmp2580574357445745.ins = or i64 %tmp2580574357445745, %tmp257757475748 ; <i64> [#uses=1] + invoke void @system__string_ops__str_concat( %struct.string___XUP* %tmp61 sret , i64 or (i64 zext (i32 ptrtoint ([30 x i8]* @.str17 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.30.904 to i32) to i64), i64 32)), i64 %tmp2580574357445745.ins ) + to label %invcont2591 unwind label %unwind2411 + +invcont2591: ; preds = %invcont2574 + %tmp2593 = getelementptr %struct.string___XUP* %tmp61, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2594 = load i8** %tmp2593 ; <i8*> [#uses=1] + %tmp25945735 = ptrtoint i8* %tmp2594 to i32 ; <i32> [#uses=1] + %tmp259457355736 = zext i32 %tmp25945735 to i64 ; <i64> [#uses=1] + %tmp2596 = getelementptr %struct.string___XUP* %tmp61, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp2597 = load %struct.string___XUB** %tmp2596 ; <%struct.string___XUB*> [#uses=1] + %tmp25975731 = ptrtoint %struct.string___XUB* %tmp2597 to i32 ; <i32> [#uses=1] + %tmp259757315732 = zext i32 %tmp25975731 to i64 ; <i64> [#uses=1] + %tmp2597573157325733 = shl i64 %tmp259757315732, 32 ; <i64> [#uses=1] + %tmp2597573157325733.ins = or i64 %tmp2597573157325733, %tmp259457355736 ; <i64> [#uses=1] + invoke void @report__failed( i64 %tmp2597573157325733.ins ) + to label %cleanup2604 unwind label %unwind2411 + +cleanup2604: ; preds = %invcont2591 + %tmp26105533 = ptrtoint i8* %tmp2386 to i32 ; <i32> [#uses=1] + %tmp261055335534 = zext i32 %tmp26105533 to i64 ; <i64> [#uses=1] + %tmp26135530 = zext i32 %tmp2389 to i64 ; <i64> [#uses=1] + %tmp261355305531 = shl i64 %tmp26135530, 32 ; <i64> [#uses=1] + %tmp261355305531.ins = or i64 %tmp261355305531, %tmp261055335534 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp261355305531.ins ) + to label %cleanup2642 unwind label %unwind2618 + +unwind2618: ; preds = %cleanup2604, %unwind2411 + %eh_ptr2619 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select2621 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2619, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + call void @llvm.stackrestore( i8* %tmp2390 ) + %eh_typeid26493 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp26514 = icmp eq i32 %eh_select2621, %eh_typeid26493 ; <i1> [#uses=1] + br i1 %tmp26514, label %eh_then2652, label %eh_else2666 + +cleanup2642: ; preds = %cleanup2604 + call void @llvm.stackrestore( i8* %tmp2390 ) + %tmp26946042 = icmp ult i8 %tmp238239, %tmp137138 ; <i1> [#uses=1] + br i1 %tmp26946042, label %cond_next2718, label %cond_true2697 + +cleanup2644: ; preds = %unwind2411 + call void @llvm.stackrestore( i8* %tmp2390 ) + %eh_typeid2649 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp2651 = icmp eq i32 %eh_select2414, %eh_typeid2649 ; <i1> [#uses=1] + br i1 %tmp2651, label %eh_then2652, label %eh_else2666 + +eh_then2652: ; preds = %cleanup2644, %unwind2618, %unwind2378 + %eh_exception.296030.0 = phi i8* [ %eh_ptr2379, %unwind2378 ], [ %eh_ptr2619, %unwind2618 ], [ %eh_ptr2412, %cleanup2644 ] ; <i8*> [#uses=3] + invoke void @__gnat_begin_handler( i8* %eh_exception.296030.0 ) + to label %invcont2658 unwind label %unwind2656 + +unwind2656: ; preds = %invcont2658, %eh_then2652 + %eh_ptr2657 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_exception.296030.0 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr2657 ) ; <i32>:10 [#uses=0] + unreachable + +invcont2658: ; preds = %eh_then2652 + %tmp2659 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp2659( ) + to label %cleanup2662 unwind label %unwind2656 + +cleanup2662: ; preds = %invcont2658 + call void @__gnat_end_handler( i8* %eh_exception.296030.0 ) + %tmp26946043 = icmp ult i8 %tmp238239, %tmp137138 ; <i1> [#uses=1] + br i1 %tmp26946043, label %cond_next2718, label %cond_true2697 + +eh_else2666: ; preds = %cleanup2644, %unwind2618, %unwind2378 + %eh_selector.256028.1 = phi i32 [ %eh_select2381, %unwind2378 ], [ %eh_select2621, %unwind2618 ], [ %eh_select2414, %cleanup2644 ] ; <i32> [#uses=1] + %eh_exception.296030.1 = phi i8* [ %eh_ptr2379, %unwind2378 ], [ %eh_ptr2619, %unwind2618 ], [ %eh_ptr2412, %cleanup2644 ] ; <i8*> [#uses=4] + %eh_typeid2667 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp2669 = icmp eq i32 %eh_selector.256028.1, %eh_typeid2667 ; <i1> [#uses=1] + br i1 %tmp2669, label %eh_then2670, label %Unwind + +eh_then2670: ; preds = %eh_else2666 + invoke void @__gnat_begin_handler( i8* %eh_exception.296030.1 ) + to label %invcont2676 unwind label %unwind2674 + +unwind2674: ; preds = %invcont2678, %invcont2676, %eh_then2670 + %eh_ptr2675 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_exception.296030.1 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr2675 ) ; <i32>:11 [#uses=0] + unreachable + +invcont2676: ; preds = %eh_then2670 + %tmp2677 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp2677( ) + to label %invcont2678 unwind label %unwind2674 + +invcont2678: ; preds = %invcont2676 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([24 x i8]* @.str18 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.35.915 to i32) to i64), i64 32)) ) + to label %cleanup2687 unwind label %unwind2674 + +cleanup2687: ; preds = %invcont2678 + call void @__gnat_end_handler( i8* %eh_exception.296030.1 ) + %tmp2694 = icmp ult i8 %tmp238239, %tmp137138 ; <i1> [#uses=1] + br i1 %tmp2694, label %cond_next2718, label %cond_true2697 + +cond_true2697: ; preds = %cleanup2687, %cleanup2662, %cleanup2642 + %tmp2700 = icmp ult i8 %tmp137138, %tmp204205 ; <i1> [#uses=1] + %tmp2704 = icmp ugt i8 %tmp238239, %tmp272273 ; <i1> [#uses=1] + %tmp2708 = or i1 %tmp2704, %tmp2700 ; <i1> [#uses=1] + br i1 %tmp2708, label %cond_true2711, label %cond_next2718 + +cond_true2711: ; preds = %cond_true2697 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 192 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2712 + +unwind2712: ; preds = %cleanup2990, %unwind2975, %cond_true2711 + %eh_ptr2713 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select2715 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2713, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid29996053 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp30016055 = icmp eq i32 %eh_select2715, %eh_typeid29996053 ; <i1> [#uses=1] + br i1 %tmp30016055, label %eh_then3002, label %eh_else3016 + +cond_next2718: ; preds = %cond_true2697, %cleanup2687, %cleanup2662, %cleanup2642 + invoke void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp63 sret ) + to label %invcont2766 unwind label %unwind2762 + +unwind2762: ; preds = %cond_next2718 + %eh_ptr2763 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select2765 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2763, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid29686060 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp29706061 = icmp eq i32 %eh_select2765, %eh_typeid29686060 ; <i1> [#uses=1] + br i1 %tmp29706061, label %eh_then2971, label %cleanup2998 + +invcont2766: ; preds = %cond_next2718 + %tmp2769 = getelementptr %struct.system__secondary_stack__mark_id* %tmp63, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2770 = load i8** %tmp2769 ; <i8*> [#uses=2] + %tmp2772 = getelementptr %struct.system__secondary_stack__mark_id* %tmp63, i32 0, i32 1 ; <i32*> [#uses=1] + %tmp2773 = load i32* %tmp2772 ; <i32> [#uses=2] + %tmp2774 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=3] + %tmp2808 = icmp ugt i8 %tmp137138, %tmp204205 ; <i1> [#uses=1] + %tmp2815 = icmp ult i8 %tmp238239, %tmp204205 ; <i1> [#uses=1] + %bothcond5904 = or i1 %tmp2815, %tmp2808 ; <i1> [#uses=1] + br i1 %bothcond5904, label %bb2821, label %cond_next2834 + +bb2821: ; preds = %invcont2766 + invoke void @__gnat_rcheck_05( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 198 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2822 + +unwind2822: ; preds = %invcont2910, %invcont2893, %bb2879, %bb2877, %bb2843, %bb2821 + %eh_ptr2823 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select2825 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2823, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + %tmp29295521 = ptrtoint i8* %tmp2770 to i32 ; <i32> [#uses=1] + %tmp292955215522 = zext i32 %tmp29295521 to i64 ; <i64> [#uses=1] + %tmp29325518 = zext i32 %tmp2773 to i64 ; <i64> [#uses=1] + %tmp293255185519 = shl i64 %tmp29325518, 32 ; <i64> [#uses=1] + %tmp293255185519.ins = or i64 %tmp293255185519, %tmp292955215522 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp293255185519.ins ) + to label %cleanup2963 unwind label %unwind2937 + +cond_next2834: ; preds = %invcont2766 + br i1 %tmp206, label %bb2843, label %bb2845 + +bb2843: ; preds = %cond_next2834 + invoke void @__gnat_rcheck_06( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 198 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2822 + +bb2845: ; preds = %cond_next2834 + br i1 %tmp274, label %bb2877, label %bb2879 + +bb2877: ; preds = %bb2845 + invoke void @__gnat_rcheck_06( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 200 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind2822 + +bb2879: ; preds = %bb2845 + invoke void @system__img_enum__image_enumeration_8( %struct.string___XUP* %tmp66 sret , i32 %tmp13831384, i64 or (i64 zext (i32 ptrtoint ([28 x i8]* @weekS.154 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.32.910 to i32) to i64), i64 32)), i8* getelementptr ([8 x i8]* @weekN.179, i32 0, i32 0) ) + to label %invcont2893 unwind label %unwind2822 + +invcont2893: ; preds = %bb2879 + %tmp2895 = getelementptr %struct.string___XUP* %tmp66, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2896 = load i8** %tmp2895 ; <i8*> [#uses=1] + %tmp28965718 = ptrtoint i8* %tmp2896 to i32 ; <i32> [#uses=1] + %tmp289657185719 = zext i32 %tmp28965718 to i64 ; <i64> [#uses=1] + %tmp2898 = getelementptr %struct.string___XUP* %tmp66, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp2899 = load %struct.string___XUB** %tmp2898 ; <%struct.string___XUB*> [#uses=1] + %tmp28995714 = ptrtoint %struct.string___XUB* %tmp2899 to i32 ; <i32> [#uses=1] + %tmp289957145715 = zext i32 %tmp28995714 to i64 ; <i64> [#uses=1] + %tmp2899571457155716 = shl i64 %tmp289957145715, 32 ; <i64> [#uses=1] + %tmp2899571457155716.ins = or i64 %tmp2899571457155716, %tmp289657185719 ; <i64> [#uses=1] + invoke void @system__string_ops__str_concat( %struct.string___XUP* %tmp69 sret , i64 or (i64 zext (i32 ptrtoint ([31 x i8]* @.str19 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.98.1466 to i32) to i64), i64 32)), i64 %tmp2899571457155716.ins ) + to label %invcont2910 unwind label %unwind2822 + +invcont2910: ; preds = %invcont2893 + %tmp2912 = getelementptr %struct.string___XUP* %tmp69, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2913 = load i8** %tmp2912 ; <i8*> [#uses=1] + %tmp29135706 = ptrtoint i8* %tmp2913 to i32 ; <i32> [#uses=1] + %tmp291357065707 = zext i32 %tmp29135706 to i64 ; <i64> [#uses=1] + %tmp2915 = getelementptr %struct.string___XUP* %tmp69, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp2916 = load %struct.string___XUB** %tmp2915 ; <%struct.string___XUB*> [#uses=1] + %tmp29165702 = ptrtoint %struct.string___XUB* %tmp2916 to i32 ; <i32> [#uses=1] + %tmp291657025703 = zext i32 %tmp29165702 to i64 ; <i64> [#uses=1] + %tmp2916570257035704 = shl i64 %tmp291657025703, 32 ; <i64> [#uses=1] + %tmp2916570257035704.ins = or i64 %tmp2916570257035704, %tmp291357065707 ; <i64> [#uses=1] + invoke void @report__failed( i64 %tmp2916570257035704.ins ) + to label %cleanup2943 unwind label %unwind2822 + +unwind2937: ; preds = %cleanup2943, %unwind2822 + %eh_ptr2938 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select2940 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2938, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + call void @llvm.stackrestore( i8* %tmp2774 ) + %eh_typeid29685 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp29706 = icmp eq i32 %eh_select2940, %eh_typeid29685 ; <i1> [#uses=1] + br i1 %tmp29706, label %eh_then2971, label %cleanup2998 + +cleanup2943: ; preds = %invcont2910 + %tmp29505515 = ptrtoint i8* %tmp2770 to i32 ; <i32> [#uses=1] + %tmp295055155516 = zext i32 %tmp29505515 to i64 ; <i64> [#uses=1] + %tmp29535512 = zext i32 %tmp2773 to i64 ; <i64> [#uses=1] + %tmp295355125513 = shl i64 %tmp29535512, 32 ; <i64> [#uses=1] + %tmp295355125513.ins = or i64 %tmp295355125513, %tmp295055155516 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp295355125513.ins ) + to label %cleanup2961 unwind label %unwind2937 + +cleanup2961: ; preds = %cleanup2943 + call void @llvm.stackrestore( i8* %tmp2774 ) + %tmp3044.not6066 = icmp uge i8 %tmp272273, %tmp170171 ; <i1> [#uses=1] + %tmp30506067 = icmp ult i8 %tmp170171, %tmp204205 ; <i1> [#uses=1] + %bothcond59056068 = and i1 %tmp3044.not6066, %tmp30506067 ; <i1> [#uses=1] + br i1 %bothcond59056068, label %cond_true3061, label %cond_next3068 + +cleanup2963: ; preds = %unwind2822 + call void @llvm.stackrestore( i8* %tmp2774 ) + %eh_typeid2968 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp2970 = icmp eq i32 %eh_select2825, %eh_typeid2968 ; <i1> [#uses=1] + br i1 %tmp2970, label %eh_then2971, label %cleanup2998 + +eh_then2971: ; preds = %cleanup2963, %unwind2937, %unwind2762 + %eh_exception.356056.0 = phi i8* [ %eh_ptr2763, %unwind2762 ], [ %eh_ptr2938, %unwind2937 ], [ %eh_ptr2823, %cleanup2963 ] ; <i8*> [#uses=3] + invoke void @__gnat_begin_handler( i8* %eh_exception.356056.0 ) + to label %invcont2979 unwind label %unwind2975 + +unwind2975: ; preds = %invcont2981, %invcont2979, %eh_then2971 + %eh_ptr2976 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] + %eh_select2978 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr2976, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_exception.356056.0 ) + to label %cleanup2998 unwind label %unwind2712 + +invcont2979: ; preds = %eh_then2971 + %tmp2980 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp2980( ) + to label %invcont2981 unwind label %unwind2975 + +invcont2981: ; preds = %invcont2979 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([46 x i8]* @.str20 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.101.1473 to i32) to i64), i64 32)) ) + to label %cleanup2990 unwind label %unwind2975 + +cleanup2990: ; preds = %invcont2981 + invoke void @__gnat_end_handler( i8* %eh_exception.356056.0 ) + to label %finally2997 unwind label %unwind2712 + +cleanup2998: ; preds = %unwind2975, %cleanup2963, %unwind2937, %unwind2762 + %eh_selector.29 = phi i32 [ %eh_select2765, %unwind2762 ], [ %eh_select2940, %unwind2937 ], [ %eh_select2825, %cleanup2963 ], [ %eh_select2978, %unwind2975 ] ; <i32> [#uses=2] + %eh_exception.33 = phi i8* [ %eh_ptr2763, %unwind2762 ], [ %eh_ptr2938, %unwind2937 ], [ %eh_ptr2823, %cleanup2963 ], [ %eh_ptr2976, %unwind2975 ] ; <i8*> [#uses=2] + %eh_typeid2999 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp3001 = icmp eq i32 %eh_selector.29, %eh_typeid2999 ; <i1> [#uses=1] + br i1 %tmp3001, label %eh_then3002, label %eh_else3016 + +eh_then3002: ; preds = %cleanup2998, %unwind2712 + %eh_exception.336046.0 = phi i8* [ %eh_ptr2713, %unwind2712 ], [ %eh_exception.33, %cleanup2998 ] ; <i8*> [#uses=3] + invoke void @__gnat_begin_handler( i8* %eh_exception.336046.0 ) + to label %invcont3008 unwind label %unwind3006 + +unwind3006: ; preds = %invcont3008, %eh_then3002 + %eh_ptr3007 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_exception.336046.0 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr3007 ) ; <i32>:12 [#uses=0] + unreachable + +invcont3008: ; preds = %eh_then3002 + %tmp3009 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp3009( ) + to label %cleanup3012 unwind label %unwind3006 + +cleanup3012: ; preds = %invcont3008 + call void @__gnat_end_handler( i8* %eh_exception.336046.0 ) + %tmp3044.not6069 = icmp uge i8 %tmp272273, %tmp170171 ; <i1> [#uses=1] + %tmp30506070 = icmp ult i8 %tmp170171, %tmp204205 ; <i1> [#uses=1] + %bothcond59056071 = and i1 %tmp3044.not6069, %tmp30506070 ; <i1> [#uses=1] + br i1 %bothcond59056071, label %cond_true3061, label %cond_next3068 + +eh_else3016: ; preds = %cleanup2998, %unwind2712 + %eh_selector.296044.1 = phi i32 [ %eh_select2715, %unwind2712 ], [ %eh_selector.29, %cleanup2998 ] ; <i32> [#uses=1] + %eh_exception.336046.1 = phi i8* [ %eh_ptr2713, %unwind2712 ], [ %eh_exception.33, %cleanup2998 ] ; <i8*> [#uses=4] + %eh_typeid3017 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp3019 = icmp eq i32 %eh_selector.296044.1, %eh_typeid3017 ; <i1> [#uses=1] + br i1 %tmp3019, label %eh_then3020, label %Unwind + +eh_then3020: ; preds = %eh_else3016 + invoke void @__gnat_begin_handler( i8* %eh_exception.336046.1 ) + to label %invcont3026 unwind label %unwind3024 + +unwind3024: ; preds = %invcont3028, %invcont3026, %eh_then3020 + %eh_ptr3025 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_exception.336046.1 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr3025 ) ; <i32>:13 [#uses=0] + unreachable + +invcont3026: ; preds = %eh_then3020 + %tmp3027 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp3027( ) + to label %invcont3028 unwind label %unwind3024 + +invcont3028: ; preds = %invcont3026 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([25 x i8]* @.str21 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.104.1478 to i32) to i64), i64 32)) ) + to label %cleanup3037 unwind label %unwind3024 + +cleanup3037: ; preds = %invcont3028 + call void @__gnat_end_handler( i8* %eh_exception.336046.1 ) + br label %finally2997 + +finally2997: ; preds = %cleanup3037, %cleanup2990 + %tmp3044.not = icmp uge i8 %tmp272273, %tmp170171 ; <i1> [#uses=1] + %tmp3050 = icmp ult i8 %tmp170171, %tmp204205 ; <i1> [#uses=1] + %bothcond5905 = and i1 %tmp3044.not, %tmp3050 ; <i1> [#uses=1] + br i1 %bothcond5905, label %cond_true3061, label %cond_next3068 + +cond_true3061: ; preds = %finally2997, %cleanup3012, %cleanup2961 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 214 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3062 + +unwind3062: ; preds = %cleanup3340, %unwind3325, %cond_true3061 + %eh_ptr3063 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select3065 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr3063, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid33496081 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp33516083 = icmp eq i32 %eh_select3065, %eh_typeid33496081 ; <i1> [#uses=1] + br i1 %tmp33516083, label %eh_then3352, label %eh_else3366 + +cond_next3068: ; preds = %finally2997, %cleanup3012, %cleanup2961 + invoke void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp72 sret ) + to label %invcont3116 unwind label %unwind3112 + +unwind3112: ; preds = %cond_next3068 + %eh_ptr3113 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select3115 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr3113, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + %eh_typeid33186088 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp33206089 = icmp eq i32 %eh_select3115, %eh_typeid33186088 ; <i1> [#uses=1] + br i1 %tmp33206089, label %eh_then3321, label %cleanup3348 + +invcont3116: ; preds = %cond_next3068 + %tmp3119 = getelementptr %struct.system__secondary_stack__mark_id* %tmp72, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp3120 = load i8** %tmp3119 ; <i8*> [#uses=2] + %tmp3122 = getelementptr %struct.system__secondary_stack__mark_id* %tmp72, i32 0, i32 1 ; <i32*> [#uses=1] + %tmp3123 = load i32* %tmp3122 ; <i32> [#uses=2] + %tmp3124 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=3] + %tmp3158 = icmp ugt i8 %tmp170171, %tmp204205 ; <i1> [#uses=1] + %bothcond5906 = or i1 %tmp364, %tmp3158 ; <i1> [#uses=1] + br i1 %bothcond5906, label %bb3171, label %cond_next3184 + +bb3171: ; preds = %invcont3116 + invoke void @__gnat_rcheck_05( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 220 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3172 + +unwind3172: ; preds = %invcont3260, %invcont3243, %bb3229, %bb3227, %bb3193, %bb3171 + %eh_ptr3173 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select3175 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr3173, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + %tmp32795509 = ptrtoint i8* %tmp3120 to i32 ; <i32> [#uses=1] + %tmp327955095510 = zext i32 %tmp32795509 to i64 ; <i64> [#uses=1] + %tmp32825506 = zext i32 %tmp3123 to i64 ; <i64> [#uses=1] + %tmp328255065507 = shl i64 %tmp32825506, 32 ; <i64> [#uses=1] + %tmp328255065507.ins = or i64 %tmp328255065507, %tmp327955095510 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp328255065507.ins ) + to label %cleanup3313 unwind label %unwind3287 + +cond_next3184: ; preds = %invcont3116 + br i1 %tmp206, label %bb3193, label %bb3195 + +bb3193: ; preds = %cond_next3184 + invoke void @__gnat_rcheck_06( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 220 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3172 + +bb3195: ; preds = %cond_next3184 + br i1 %tmp274, label %bb3227, label %bb3229 + +bb3227: ; preds = %bb3195 + invoke void @__gnat_rcheck_06( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 222 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3172 + +bb3229: ; preds = %bb3195 + invoke void @system__img_enum__image_enumeration_8( %struct.string___XUP* %tmp75 sret , i32 %tmp13831384, i64 or (i64 zext (i32 ptrtoint ([28 x i8]* @weekS.154 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.32.910 to i32) to i64), i64 32)), i8* getelementptr ([8 x i8]* @weekN.179, i32 0, i32 0) ) + to label %invcont3243 unwind label %unwind3172 + +invcont3243: ; preds = %bb3229 + %tmp3245 = getelementptr %struct.string___XUP* %tmp75, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp3246 = load i8** %tmp3245 ; <i8*> [#uses=1] + %tmp32465684 = ptrtoint i8* %tmp3246 to i32 ; <i32> [#uses=1] + %tmp324656845685 = zext i32 %tmp32465684 to i64 ; <i64> [#uses=1] + %tmp3248 = getelementptr %struct.string___XUP* %tmp75, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp3249 = load %struct.string___XUB** %tmp3248 ; <%struct.string___XUB*> [#uses=1] + %tmp32495680 = ptrtoint %struct.string___XUB* %tmp3249 to i32 ; <i32> [#uses=1] + %tmp324956805681 = zext i32 %tmp32495680 to i64 ; <i64> [#uses=1] + %tmp3249568056815682 = shl i64 %tmp324956805681, 32 ; <i64> [#uses=1] + %tmp3249568056815682.ins = or i64 %tmp3249568056815682, %tmp324656845685 ; <i64> [#uses=1] + invoke void @system__string_ops__str_concat( %struct.string___XUP* %tmp78 sret , i64 or (i64 zext (i32 ptrtoint ([31 x i8]* @.str22 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.98.1466 to i32) to i64), i64 32)), i64 %tmp3249568056815682.ins ) + to label %invcont3260 unwind label %unwind3172 + +invcont3260: ; preds = %invcont3243 + %tmp3262 = getelementptr %struct.string___XUP* %tmp78, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp3263 = load i8** %tmp3262 ; <i8*> [#uses=1] + %tmp32635672 = ptrtoint i8* %tmp3263 to i32 ; <i32> [#uses=1] + %tmp326356725673 = zext i32 %tmp32635672 to i64 ; <i64> [#uses=1] + %tmp3265 = getelementptr %struct.string___XUP* %tmp78, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp3266 = load %struct.string___XUB** %tmp3265 ; <%struct.string___XUB*> [#uses=1] + %tmp32665668 = ptrtoint %struct.string___XUB* %tmp3266 to i32 ; <i32> [#uses=1] + %tmp326656685669 = zext i32 %tmp32665668 to i64 ; <i64> [#uses=1] + %tmp3266566856695670 = shl i64 %tmp326656685669, 32 ; <i64> [#uses=1] + %tmp3266566856695670.ins = or i64 %tmp3266566856695670, %tmp326356725673 ; <i64> [#uses=1] + invoke void @report__failed( i64 %tmp3266566856695670.ins ) + to label %cleanup3293 unwind label %unwind3172 + +unwind3287: ; preds = %cleanup3293, %unwind3172 + %eh_ptr3288 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select3290 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr3288, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=2] + call void @llvm.stackrestore( i8* %tmp3124 ) + %eh_typeid33187 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp33208 = icmp eq i32 %eh_select3290, %eh_typeid33187 ; <i1> [#uses=1] + br i1 %tmp33208, label %eh_then3321, label %cleanup3348 + +cleanup3293: ; preds = %invcont3260 + %tmp33005503 = ptrtoint i8* %tmp3120 to i32 ; <i32> [#uses=1] + %tmp330055035504 = zext i32 %tmp33005503 to i64 ; <i64> [#uses=1] + %tmp33035500 = zext i32 %tmp3123 to i64 ; <i64> [#uses=1] + %tmp330355005501 = shl i64 %tmp33035500, 32 ; <i64> [#uses=1] + %tmp330355005501.ins = or i64 %tmp330355005501, %tmp330055035504 ; <i64> [#uses=1] + invoke void @system__secondary_stack__ss_release( i64 %tmp330355005501.ins ) + to label %cleanup3311 unwind label %unwind3287 + +cleanup3311: ; preds = %cleanup3293 + call void @llvm.stackrestore( i8* %tmp3124 ) + br label %finally3347 + +cleanup3313: ; preds = %unwind3172 + call void @llvm.stackrestore( i8* %tmp3124 ) + %eh_typeid3318 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp3320 = icmp eq i32 %eh_select3175, %eh_typeid3318 ; <i1> [#uses=1] + br i1 %tmp3320, label %eh_then3321, label %cleanup3348 + +eh_then3321: ; preds = %cleanup3313, %unwind3287, %unwind3112 + %eh_exception.416084.0 = phi i8* [ %eh_ptr3113, %unwind3112 ], [ %eh_ptr3288, %unwind3287 ], [ %eh_ptr3173, %cleanup3313 ] ; <i8*> [#uses=3] + invoke void @__gnat_begin_handler( i8* %eh_exception.416084.0 ) + to label %invcont3329 unwind label %unwind3325 + +unwind3325: ; preds = %invcont3331, %invcont3329, %eh_then3321 + %eh_ptr3326 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] + %eh_select3328 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr3326, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_others_value ) ; <i32> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_exception.416084.0 ) + to label %cleanup3348 unwind label %unwind3062 + +invcont3329: ; preds = %eh_then3321 + %tmp3330 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp3330( ) + to label %invcont3331 unwind label %unwind3325 + +invcont3331: ; preds = %invcont3329 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([46 x i8]* @.str20 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.101.1473 to i32) to i64), i64 32)) ) + to label %cleanup3340 unwind label %unwind3325 + +cleanup3340: ; preds = %invcont3331 + invoke void @__gnat_end_handler( i8* %eh_exception.416084.0 ) + to label %finally3347 unwind label %unwind3062 + +cleanup3348: ; preds = %unwind3325, %cleanup3313, %unwind3287, %unwind3112 + %eh_selector.35 = phi i32 [ %eh_select3115, %unwind3112 ], [ %eh_select3290, %unwind3287 ], [ %eh_select3175, %cleanup3313 ], [ %eh_select3328, %unwind3325 ] ; <i32> [#uses=2] + %eh_exception.39 = phi i8* [ %eh_ptr3113, %unwind3112 ], [ %eh_ptr3288, %unwind3287 ], [ %eh_ptr3173, %cleanup3313 ], [ %eh_ptr3326, %unwind3325 ] ; <i8*> [#uses=2] + %eh_typeid3349 = call i32 @llvm.eh.typeid.for( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1] + %tmp3351 = icmp eq i32 %eh_selector.35, %eh_typeid3349 ; <i1> [#uses=1] + br i1 %tmp3351, label %eh_then3352, label %eh_else3366 + +eh_then3352: ; preds = %cleanup3348, %unwind3062 + %eh_exception.396074.0 = phi i8* [ %eh_ptr3063, %unwind3062 ], [ %eh_exception.39, %cleanup3348 ] ; <i8*> [#uses=3] + invoke void @__gnat_begin_handler( i8* %eh_exception.396074.0 ) + to label %invcont3358 unwind label %unwind3356 + +unwind3356: ; preds = %invcont3358, %eh_then3352 + %eh_ptr3357 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_exception.396074.0 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr3357 ) ; <i32>:14 [#uses=0] + unreachable + +invcont3358: ; preds = %eh_then3352 + %tmp3359 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp3359( ) + to label %cleanup3362 unwind label %unwind3356 + +cleanup3362: ; preds = %invcont3358 + call void @__gnat_end_handler( i8* %eh_exception.396074.0 ) + br label %finally3347 + +eh_else3366: ; preds = %cleanup3348, %unwind3062 + %eh_selector.356072.1 = phi i32 [ %eh_select3065, %unwind3062 ], [ %eh_selector.35, %cleanup3348 ] ; <i32> [#uses=1] + %eh_exception.396074.1 = phi i8* [ %eh_ptr3063, %unwind3062 ], [ %eh_exception.39, %cleanup3348 ] ; <i8*> [#uses=4] + %eh_typeid3367 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp3369 = icmp eq i32 %eh_selector.356072.1, %eh_typeid3367 ; <i1> [#uses=1] + br i1 %tmp3369, label %eh_then3370, label %Unwind + +eh_then3370: ; preds = %eh_else3366 + invoke void @__gnat_begin_handler( i8* %eh_exception.396074.1 ) + to label %invcont3376 unwind label %unwind3374 + +unwind3374: ; preds = %invcont3378, %invcont3376, %eh_then3370 + %eh_ptr3375 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_exception.396074.1 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr3375 ) ; <i32>:15 [#uses=0] + unreachable + +invcont3376: ; preds = %eh_then3370 + %tmp3377 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp3377( ) + to label %invcont3378 unwind label %unwind3374 + +invcont3378: ; preds = %invcont3376 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([25 x i8]* @.str23 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.104.1478 to i32) to i64), i64 32)) ) + to label %cleanup3387 unwind label %unwind3374 + +cleanup3387: ; preds = %invcont3378 + call void @__gnat_end_handler( i8* %eh_exception.396074.1 ) + br label %finally3347 + +finally3347: ; preds = %cleanup3387, %cleanup3362, %cleanup3340, %cleanup3311 + %tmp3392 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=2] + %tmp3398 = invoke i32 @report__ident_int( i32 -5 ) + to label %invcont3397 unwind label %unwind3393 ; <i32> [#uses=4] + +unwind3393: ; preds = %cond_true3555, %cond_true3543, %cond_next3451, %cond_true3448, %cond_true3420, %finally3347 + %eh_ptr3394 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select3396 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr3394, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=1] + call void @llvm.stackrestore( i8* %tmp3392 ) + %eh_typeid3571 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp3573 = icmp eq i32 %eh_select3396, %eh_typeid3571 ; <i1> [#uses=1] + br i1 %tmp3573, label %eh_then3574, label %Unwind + +invcont3397: ; preds = %finally3347 + %tmp3405 = icmp slt i32 %tmp3398, %tmp384 ; <i1> [#uses=2] + %tmp3413 = icmp sgt i32 %tmp3398, %tmp394 ; <i1> [#uses=1] + %tmp3417 = or i1 %tmp3405, %tmp3413 ; <i1> [#uses=1] + br i1 %tmp3417, label %cond_true3420, label %cond_next3422 + +cond_true3420: ; preds = %invcont3397 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 238 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3393 + +cond_next3422: ; preds = %invcont3397 + %tmp3426 = icmp slt i32 %tmp3398, -5 ; <i1> [#uses=1] + br i1 %tmp3426, label %cond_true3429, label %cond_next3451 + +cond_true3429: ; preds = %cond_next3422 + %tmp3441 = icmp slt i32 %tmp394, -6 ; <i1> [#uses=1] + %tmp3445 = or i1 %tmp3405, %tmp3441 ; <i1> [#uses=1] + br i1 %tmp3445, label %cond_true3448, label %cond_next3451 + +cond_true3448: ; preds = %cond_true3429 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 238 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3393 + +cond_next3451: ; preds = %cond_true3429, %cond_next3422 + %tmp3521 = invoke i32 @report__ident_int( i32 -5 ) + to label %invcont3520 unwind label %unwind3393 ; <i32> [#uses=3] + +invcont3520: ; preds = %cond_next3451 + %tmp3528 = icmp slt i32 %tmp3521, %tmp384 ; <i1> [#uses=1] + %tmp3536 = icmp sgt i32 %tmp3521, %tmp394 ; <i1> [#uses=1] + %tmp3540 = or i1 %tmp3528, %tmp3536 ; <i1> [#uses=1] + br i1 %tmp3540, label %cond_true3543, label %cond_next3545 + +cond_true3543: ; preds = %invcont3520 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 241 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3393 + +cond_next3545: ; preds = %invcont3520 + %tmp3552 = icmp eq i32 %tmp3398, %tmp3521 ; <i1> [#uses=1] + br i1 %tmp3552, label %cleanup3565, label %cond_true3555 + +cond_true3555: ; preds = %cond_next3545 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([30 x i8]* @.str24 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.30.904 to i32) to i64), i64 32)) ) + to label %cleanup3565 unwind label %unwind3393 + +cleanup3565: ; preds = %cond_true3555, %cond_next3545 + call void @llvm.stackrestore( i8* %tmp3392 ) + %tmp36006095 = icmp ult i8 %tmp137138, %sat.45934.0 ; <i1> [#uses=1] + br i1 %tmp36006095, label %cond_next3624, label %cond_true3603 + +eh_then3574: ; preds = %unwind3393 + invoke void @__gnat_begin_handler( i8* %eh_ptr3394 ) + to label %invcont3580 unwind label %unwind3578 + +unwind3578: ; preds = %invcont3582, %invcont3580, %eh_then3574 + %eh_ptr3579 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr3394 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr3579 ) ; <i32>:16 [#uses=0] + unreachable + +invcont3580: ; preds = %eh_then3574 + %tmp3581 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp3581( ) + to label %invcont3582 unwind label %unwind3578 + +invcont3582: ; preds = %invcont3580 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([18 x i8]* @.str25 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.124.1606 to i32) to i64), i64 32)) ) + to label %cleanup3591 unwind label %unwind3578 + +cleanup3591: ; preds = %invcont3582 + call void @__gnat_end_handler( i8* %eh_ptr3394 ) + %tmp3600 = icmp ult i8 %tmp137138, %sat.45934.0 ; <i1> [#uses=1] + br i1 %tmp3600, label %cond_next3624, label %cond_true3603 + +cond_true3603: ; preds = %cleanup3591, %cleanup3565 + %tmp3606 = icmp ult i8 %sat.45934.0, %tmp204205 ; <i1> [#uses=1] + %tmp3610 = icmp ugt i8 %tmp137138, %tmp272273 ; <i1> [#uses=1] + %tmp3614 = or i1 %tmp3606, %tmp3610 ; <i1> [#uses=1] + br i1 %tmp3614, label %cond_true3617, label %cond_next3624 + +cond_true3617: ; preds = %cond_true3603 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 250 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3618 + +unwind3618: ; preds = %bb3743, %cond_true3729, %bb3689, %cond_true3675, %bb3635, %cond_true3617 + %wed.3 = phi i8 [ %tmp238239, %cond_true3617 ], [ %wed.1, %bb3743 ], [ %tmp238239, %bb3689 ], [ %tmp238239, %bb3635 ], [ %tmp238239, %cond_true3675 ], [ %tmp238239, %cond_true3729 ] ; <i8> [#uses=1] + %tue.3 = phi i8 [ %tmp204205, %cond_true3617 ], [ %tue.2, %bb3743 ], [ %tue.2, %bb3689 ], [ %tue.1, %bb3635 ], [ %tue.2, %cond_true3675 ], [ %tue.2, %cond_true3729 ] ; <i8> [#uses=1] + %mon.3 = phi i8 [ %tmp170171, %cond_true3617 ], [ %mon.2, %bb3743 ], [ %mon.1, %bb3689 ], [ %tmp170171, %bb3635 ], [ %tmp170171, %cond_true3675 ], [ %mon.2, %cond_true3729 ] ; <i8> [#uses=1] + %eh_ptr3619 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select3621 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr3619, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=1] + %eh_typeid3854 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp3856 = icmp eq i32 %eh_select3621, %eh_typeid3854 ; <i1> [#uses=1] + br i1 %tmp3856, label %eh_then3857, label %Unwind + +cond_next3624: ; preds = %cond_true3603, %cleanup3591, %cleanup3565 + %tmp3629 = icmp ugt i8 %sat.45934.0, %tmp137138 ; <i1> [#uses=1] + br i1 %tmp3629, label %cond_next3653, label %bb3635 + +bb3635: ; preds = %cond_next3649, %cond_next3624 + %indvar6258 = phi i8 [ %indvar.next16, %cond_next3649 ], [ 0, %cond_next3624 ] ; <i8> [#uses=2] + %tue.1 = phi i8 [ %tue.0, %cond_next3649 ], [ %tmp204205, %cond_next3624 ] ; <i8> [#uses=2] + %tmp3637 = invoke i8 @report__equal( i32 2, i32 2 ) + to label %invcont3636 unwind label %unwind3618 ; <i8> [#uses=1] + +invcont3636: ; preds = %bb3635 + %i3633.4 = add i8 %indvar6258, %sat.45934.0 ; <i8> [#uses=1] + %tmp3638 = icmp eq i8 %tmp3637, 0 ; <i1> [#uses=1] + %tue.0 = select i1 %tmp3638, i8 %tue.1, i8 2 ; <i8> [#uses=2] + %tmp3645 = icmp eq i8 %i3633.4, %tmp137138 ; <i1> [#uses=1] + br i1 %tmp3645, label %cond_next3653, label %cond_next3649 + +cond_next3649: ; preds = %invcont3636 + %indvar.next16 = add i8 %indvar6258, 1 ; <i8> [#uses=1] + br label %bb3635 + +cond_next3653: ; preds = %invcont3636, %cond_next3624 + %tue.2 = phi i8 [ %tmp204205, %cond_next3624 ], [ %tue.0, %invcont3636 ] ; <i8> [#uses=6] + %tmp3658 = icmp ult i8 %tmp238239, %tmp306307 ; <i1> [#uses=1] + br i1 %tmp3658, label %cond_next3678, label %cond_true3661 + +cond_true3661: ; preds = %cond_next3653 + %tmp3664 = icmp ult i8 %tmp306307, %tmp204205 ; <i1> [#uses=1] + %tmp3668 = icmp ugt i8 %tmp238239, %tmp272273 ; <i1> [#uses=1] + %tmp3672 = or i1 %tmp3664, %tmp3668 ; <i1> [#uses=1] + br i1 %tmp3672, label %cond_true3675, label %cond_next3678 + +cond_true3675: ; preds = %cond_true3661 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 257 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3618 + +cond_next3678: ; preds = %cond_true3661, %cond_next3653 + %tmp3683 = icmp ugt i8 %tmp306307, %tmp238239 ; <i1> [#uses=1] + br i1 %tmp3683, label %cond_next3707, label %bb3689 + +bb3689: ; preds = %cond_next3703, %cond_next3678 + %indvar6261 = phi i8 [ %indvar.next18, %cond_next3703 ], [ 0, %cond_next3678 ] ; <i8> [#uses=2] + %mon.1 = phi i8 [ %mon.0, %cond_next3703 ], [ %tmp170171, %cond_next3678 ] ; <i8> [#uses=2] + %tmp3691 = invoke i8 @report__equal( i32 2, i32 2 ) + to label %invcont3690 unwind label %unwind3618 ; <i8> [#uses=1] + +invcont3690: ; preds = %bb3689 + %i3687.4 = add i8 %indvar6261, %tmp306307 ; <i8> [#uses=1] + %tmp3692 = icmp eq i8 %tmp3691, 0 ; <i1> [#uses=1] + %mon.0 = select i1 %tmp3692, i8 %mon.1, i8 1 ; <i8> [#uses=2] + %tmp3699 = icmp eq i8 %i3687.4, %tmp238239 ; <i1> [#uses=1] + br i1 %tmp3699, label %cond_next3707, label %cond_next3703 + +cond_next3703: ; preds = %invcont3690 + %indvar.next18 = add i8 %indvar6261, 1 ; <i8> [#uses=1] + br label %bb3689 + +cond_next3707: ; preds = %invcont3690, %cond_next3678 + %mon.2 = phi i8 [ %tmp170171, %cond_next3678 ], [ %mon.0, %invcont3690 ] ; <i8> [#uses=8] + %tmp3712 = icmp ult i8 %tmp137138, %mon.2 ; <i1> [#uses=1] + br i1 %tmp3712, label %cond_next3732, label %cond_true3715 + +cond_true3715: ; preds = %cond_next3707 + %tmp3718 = icmp ult i8 %mon.2, %tmp204205 ; <i1> [#uses=1] + %tmp3722 = icmp ugt i8 %tmp137138, %tmp272273 ; <i1> [#uses=1] + %tmp3726 = or i1 %tmp3718, %tmp3722 ; <i1> [#uses=1] + br i1 %tmp3726, label %cond_true3729, label %cond_next3732 + +cond_true3729: ; preds = %cond_true3715 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 264 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3618 + +cond_next3732: ; preds = %cond_true3715, %cond_next3707 + %tmp3737 = icmp ugt i8 %mon.2, %tmp137138 ; <i1> [#uses=1] + br i1 %tmp3737, label %finally3852, label %bb3743 + +bb3743: ; preds = %cond_next3757, %cond_next3732 + %indvar6265 = phi i8 [ %indvar.next20, %cond_next3757 ], [ 0, %cond_next3732 ] ; <i8> [#uses=2] + %wed.1 = phi i8 [ %wed.0, %cond_next3757 ], [ %tmp238239, %cond_next3732 ] ; <i8> [#uses=2] + %tmp3745 = invoke i8 @report__equal( i32 3, i32 3 ) + to label %invcont3744 unwind label %unwind3618 ; <i8> [#uses=1] + +invcont3744: ; preds = %bb3743 + %i3741.4 = add i8 %indvar6265, %mon.2 ; <i8> [#uses=1] + %tmp3746 = icmp eq i8 %tmp3745, 0 ; <i1> [#uses=1] + %wed.0 = select i1 %tmp3746, i8 %wed.1, i8 3 ; <i8> [#uses=2] + %tmp3753 = icmp eq i8 %i3741.4, %tmp137138 ; <i1> [#uses=1] + br i1 %tmp3753, label %finally3852, label %cond_next3757 + +cond_next3757: ; preds = %invcont3744 + %indvar.next20 = add i8 %indvar6265, 1 ; <i8> [#uses=1] + br label %bb3743 + +eh_then3857: ; preds = %unwind3618 + invoke void @__gnat_begin_handler( i8* %eh_ptr3619 ) + to label %invcont3863 unwind label %unwind3861 + +unwind3861: ; preds = %invcont3865, %invcont3863, %eh_then3857 + %eh_ptr3862 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr3619 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr3862 ) ; <i32>:17 [#uses=0] + unreachable + +invcont3863: ; preds = %eh_then3857 + %tmp3864 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp3864( ) + to label %invcont3865 unwind label %unwind3861 + +invcont3865: ; preds = %invcont3863 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([18 x i8]* @.str26 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.124.1606 to i32) to i64), i64 32)) ) + to label %cleanup3874 unwind label %unwind3861 + +cleanup3874: ; preds = %invcont3865 + call void @__gnat_end_handler( i8* %eh_ptr3619 ) + br label %finally3852 + +finally3852: ; preds = %cleanup3874, %invcont3744, %cond_next3732 + %wed.4 = phi i8 [ %wed.3, %cleanup3874 ], [ %tmp238239, %cond_next3732 ], [ %wed.0, %invcont3744 ] ; <i8> [#uses=4] + %tue.4 = phi i8 [ %tue.3, %cleanup3874 ], [ %tue.2, %cond_next3732 ], [ %tue.2, %invcont3744 ] ; <i8> [#uses=13] + %mon.4 = phi i8 [ %mon.3, %cleanup3874 ], [ %mon.2, %cond_next3732 ], [ %mon.2, %invcont3744 ] ; <i8> [#uses=18] + %tmp3885 = invoke i32 @report__ident_int( i32 -5 ) + to label %invcont3884 unwind label %unwind3880 ; <i32> [#uses=4] + +unwind3880: ; preds = %cond_true4138, %invcont4122, %cond_next4120, %cond_true4117, %cond_true4027, %cond_next3938, %cond_true3935, %cond_true3907, %finally3852 + %eh_ptr3881 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select3883 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr3881, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=1] + %eh_typeid4149 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp4151 = icmp eq i32 %eh_select3883, %eh_typeid4149 ; <i1> [#uses=1] + br i1 %tmp4151, label %eh_then4152, label %Unwind + +invcont3884: ; preds = %finally3852 + %tmp3892 = icmp slt i32 %tmp3885, %tmp384 ; <i1> [#uses=2] + %tmp3900 = icmp sgt i32 %tmp3885, %tmp394 ; <i1> [#uses=1] + %tmp3904 = or i1 %tmp3892, %tmp3900 ; <i1> [#uses=1] + br i1 %tmp3904, label %cond_true3907, label %cond_next3909 + +cond_true3907: ; preds = %invcont3884 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 312 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3880 + +cond_next3909: ; preds = %invcont3884 + %tmp3913 = icmp slt i32 %tmp3885, -5 ; <i1> [#uses=1] + br i1 %tmp3913, label %cond_true3916, label %cond_next3938 + +cond_true3916: ; preds = %cond_next3909 + %tmp3928 = icmp slt i32 %tmp394, -6 ; <i1> [#uses=1] + %tmp3932 = or i1 %tmp3892, %tmp3928 ; <i1> [#uses=1] + br i1 %tmp3932, label %cond_true3935, label %cond_next3938 + +cond_true3935: ; preds = %cond_true3916 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 312 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3880 + +cond_next3938: ; preds = %cond_true3916, %cond_next3909 + %tmp4005 = invoke i32 @report__ident_int( i32 -5 ) + to label %invcont4004 unwind label %unwind3880 ; <i32> [#uses=6] + +invcont4004: ; preds = %cond_next3938 + %tmp4012 = icmp slt i32 %tmp4005, %tmp384 ; <i1> [#uses=2] + %tmp4020 = icmp sgt i32 %tmp4005, %tmp394 ; <i1> [#uses=1] + %tmp4024 = or i1 %tmp4012, %tmp4020 ; <i1> [#uses=1] + br i1 %tmp4024, label %cond_true4027, label %cond_next4029 + +cond_true4027: ; preds = %invcont4004 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 313 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3880 + +cond_next4029: ; preds = %invcont4004 + %tmp4071 = icmp sgt i32 %tmp4005, -6 ; <i1> [#uses=1] + %tmp4078 = add i32 %tmp4005, 1073741823 ; <i32> [#uses=1] + %iftmp.132.0 = select i1 %tmp4071, i32 %tmp4078, i32 1073741818 ; <i32> [#uses=1] + %tmp4085 = sub i32 %iftmp.132.0, %tmp4005 ; <i32> [#uses=1] + %tmp4086 = shl i32 %tmp4085, 2 ; <i32> [#uses=2] + %tmp4087 = add i32 %tmp4086, 4 ; <i32> [#uses=1] + %tmp4088 = icmp sgt i32 %tmp4087, -1 ; <i1> [#uses=1] + %tmp4087.op = add i32 %tmp4086, 7 ; <i32> [#uses=1] + %tmp4087.op.op = and i32 %tmp4087.op, -4 ; <i32> [#uses=1] + %tmp4091 = select i1 %tmp4088, i32 %tmp4087.op.op, i32 0 ; <i32> [#uses=1] + %tmp4095 = icmp slt i32 %tmp4005, -5 ; <i1> [#uses=1] + br i1 %tmp4095, label %cond_true4098, label %cond_next4120 + +cond_true4098: ; preds = %cond_next4029 + %tmp4110 = icmp slt i32 %tmp394, -6 ; <i1> [#uses=1] + %tmp4114 = or i1 %tmp4012, %tmp4110 ; <i1> [#uses=1] + br i1 %tmp4114, label %cond_true4117, label %cond_next4120 + +cond_true4117: ; preds = %cond_true4098 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 313 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind3880 + +cond_next4120: ; preds = %cond_true4098, %cond_next4029 + %tmp4123 = invoke i8* @__gnat_malloc( i32 %tmp4091 ) + to label %invcont4122 unwind label %unwind3880 ; <i8*> [#uses=0] + +invcont4122: ; preds = %cond_next4120 + %tmp41254128 = sext i32 %tmp3885 to i64 ; <i64> [#uses=1] + %tmp4129 = sub i64 -5, %tmp41254128 ; <i64> [#uses=2] + %tmp4134 = invoke i32 @report__ident_int( i32 0 ) + to label %invcont4133 unwind label %unwind3880 ; <i32> [#uses=1] + +invcont4133: ; preds = %invcont4122 + %tmp4130 = icmp sgt i64 %tmp4129, -1 ; <i1> [#uses=1] + %tmp4129.cast = trunc i64 %tmp4129 to i32 ; <i32> [#uses=1] + %max41314132 = select i1 %tmp4130, i32 %tmp4129.cast, i32 0 ; <i32> [#uses=1] + %tmp4135 = icmp eq i32 %max41314132, %tmp4134 ; <i1> [#uses=1] + br i1 %tmp4135, label %finally4147, label %cond_true4138 + +cond_true4138: ; preds = %invcont4133 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([31 x i8]* @.str27 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.98.1466 to i32) to i64), i64 32)) ) + to label %finally4147 unwind label %unwind3880 + +eh_then4152: ; preds = %unwind3880 + invoke void @__gnat_begin_handler( i8* %eh_ptr3881 ) + to label %invcont4158 unwind label %unwind4156 + +unwind4156: ; preds = %invcont4160, %invcont4158, %eh_then4152 + %eh_ptr4157 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr3881 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr4157 ) ; <i32>:18 [#uses=0] + unreachable + +invcont4158: ; preds = %eh_then4152 + %tmp4159 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp4159( ) + to label %invcont4160 unwind label %unwind4156 + +invcont4160: ; preds = %invcont4158 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([18 x i8]* @.str28 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.124.1606 to i32) to i64), i64 32)) ) + to label %cleanup4169 unwind label %unwind4156 + +cleanup4169: ; preds = %invcont4160 + call void @__gnat_end_handler( i8* %eh_ptr3881 ) + br label %finally4147 + +finally4147: ; preds = %cleanup4169, %cond_true4138, %invcont4133 + %tmp4174 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=3] + %tmp4180 = invoke i32 @report__ident_int( i32 4 ) + to label %invcont4179 unwind label %unwind4175 ; <i32> [#uses=6] + +unwind4175: ; preds = %cond_true4292, %cond_true4187, %finally4147 + %eh_ptr4176 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select4178 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr4176, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=1] + %eh_typeid4304 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp4306 = icmp eq i32 %eh_select4178, %eh_typeid4304 ; <i1> [#uses=1] + br i1 %tmp4306, label %eh_then4307, label %cleanup4334 + +invcont4179: ; preds = %finally4147 + %tmp4184 = icmp slt i32 %tmp4180, 1 ; <i1> [#uses=1] + br i1 %tmp4184, label %cond_true4187, label %cond_next4189 + +cond_true4187: ; preds = %invcont4179 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 329 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind4175 + +cond_next4189: ; preds = %invcont4179 + %tmp4231 = icmp sgt i32 %tmp4180, 2 ; <i1> [#uses=2] + %tmp4238 = add i32 %tmp4180, 1073741823 ; <i32> [#uses=1] + %iftmp.138.0 = select i1 %tmp4231, i32 %tmp4238, i32 2 ; <i32> [#uses=1] + %tmp4245 = sub i32 %iftmp.138.0, %tmp4180 ; <i32> [#uses=1] + %tmp4246 = shl i32 %tmp4245, 2 ; <i32> [#uses=2] + %tmp4247 = add i32 %tmp4246, 4 ; <i32> [#uses=1] + %tmp4248 = icmp sgt i32 %tmp4247, -1 ; <i1> [#uses=1] + %tmp4247.op = add i32 %tmp4246, 7 ; <i32> [#uses=1] + %tmp4247.op.op = and i32 %tmp4247.op, -4 ; <i32> [#uses=1] + %tmp4251 = select i1 %tmp4248, i32 %tmp4247.op.op, i32 0 ; <i32> [#uses=1] + %tmp4253 = alloca i8, i32 %tmp4251 ; <i8*> [#uses=2] + %tmp42534254 = bitcast i8* %tmp4253 to i32* ; <i32*> [#uses=1] + br i1 %tmp4231, label %bb4276, label %cond_next4266.preheader + +cond_next4266.preheader: ; preds = %cond_next4189 + %J152b.36147.3 = add i32 %tmp4180, 1 ; <i32> [#uses=1] + br label %cond_next4266 + +cond_next4266: ; preds = %cond_next4266, %cond_next4266.preheader + %indvar6268 = phi i32 [ 0, %cond_next4266.preheader ], [ %indvar.next22, %cond_next4266 ] ; <i32> [#uses=3] + %tmp4273 = getelementptr i32* %tmp42534254, i32 %indvar6268 ; <i32*> [#uses=1] + store i32 5, i32* %tmp4273 + %tmp4275 = add i32 %J152b.36147.3, %indvar6268 ; <i32> [#uses=1] + %tmp42626151 = icmp sgt i32 %tmp4275, 2 ; <i1> [#uses=1] + %indvar.next22 = add i32 %indvar6268, 1 ; <i32> [#uses=1] + br i1 %tmp42626151, label %bb4276, label %cond_next4266 + +bb4276: ; preds = %cond_next4266, %cond_next4189 + %tmp4280 = sub i32 2, %tmp4180 ; <i32> [#uses=1] + %tmp4281 = icmp eq i32 %tmp4280, 1 ; <i1> [#uses=1] + br i1 %tmp4281, label %cond_true4284, label %cleanup4336 + +cond_true4284: ; preds = %bb4276 + %tmp4288 = call i32 (i8*, i8*, i32, ...)* @memcmp( i8* %tmp4253, i8* bitcast ([2 x i32]* @C.143.1720 to i8*), i32 8 ) ; <i32> [#uses=1] + %tmp4289 = icmp eq i32 %tmp4288, 0 ; <i1> [#uses=1] + br i1 %tmp4289, label %cond_true4292, label %cleanup4336 + +cond_true4292: ; preds = %cond_true4284 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str29 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.146.1725 to i32) to i64), i64 32)) ) + to label %cleanup4336 unwind label %unwind4175 + +eh_then4307: ; preds = %unwind4175 + invoke void @__gnat_begin_handler( i8* %eh_ptr4176 ) + to label %invcont4313 unwind label %unwind4311 + +unwind4311: ; preds = %invcont4315, %invcont4313, %eh_then4307 + %eh_ptr4312 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_ptr4176 ) + to label %cleanup4334 unwind label %unwind4326 + +invcont4313: ; preds = %eh_then4307 + %tmp4314 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp4314( ) + to label %invcont4315 unwind label %unwind4311 + +invcont4315: ; preds = %invcont4313 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([18 x i8]* @.str30 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.124.1606 to i32) to i64), i64 32)) ) + to label %cleanup4324 unwind label %unwind4311 + +cleanup4324: ; preds = %invcont4315 + invoke void @__gnat_end_handler( i8* %eh_ptr4176 ) + to label %cleanup4336 unwind label %unwind4326 + +unwind4326: ; preds = %cleanup4324, %unwind4311 + %eh_ptr4327 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp4174 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr4327 ) ; <i32>:19 [#uses=0] + unreachable + +cleanup4334: ; preds = %unwind4311, %unwind4175 + %eh_exception.50 = phi i8* [ %eh_ptr4176, %unwind4175 ], [ %eh_ptr4312, %unwind4311 ] ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp4174 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_exception.50 ) ; <i32>:20 [#uses=0] + unreachable + +cleanup4336: ; preds = %cleanup4324, %cond_true4292, %cond_true4284, %bb4276 + call void @llvm.stackrestore( i8* %tmp4174 ) + %tmp4338 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=6] + %tmp4379 = alloca i8, i32 %max1395 ; <i8*> [#uses=9] + %tmp4421 = alloca i8, i32 %max1395 ; <i8*> [#uses=3] + %tmp4428 = icmp ugt i8 %tmp204205, %tmp272273 ; <i1> [#uses=1] + br i1 %tmp4428, label %cond_next4458, label %bb4433 + +bb4433: ; preds = %cleanup4336 + store i8 %wed.4, i8* %tmp4421 + %tmp4442 = icmp eq i8 %tmp272273, %tmp204205 ; <i1> [#uses=1] + br i1 %tmp4442, label %cond_next4458, label %cond_next4446.preheader + +cond_next4446.preheader: ; preds = %bb4433 + %J161b.26152.2 = add i8 %tmp204205, 1 ; <i8> [#uses=1] + br label %cond_next4446 + +cond_next4446: ; preds = %cond_next4446, %cond_next4446.preheader + %indvar6271 = phi i8 [ 0, %cond_next4446.preheader ], [ %indvar.next24, %cond_next4446 ] ; <i8> [#uses=2] + %tmp4448 = add i8 %J161b.26152.2, %indvar6271 ; <i8> [#uses=2] + %tmp443444356156 = zext i8 %tmp4448 to i32 ; <i32> [#uses=1] + %tmp44376157 = sub i32 %tmp443444356156, %tmp13571358 ; <i32> [#uses=1] + %tmp44386158 = getelementptr i8* %tmp4421, i32 %tmp44376157 ; <i8*> [#uses=1] + store i8 %wed.4, i8* %tmp44386158 + %tmp44426160 = icmp eq i8 %tmp272273, %tmp4448 ; <i1> [#uses=1] + %indvar.next24 = add i8 %indvar6271, 1 ; <i8> [#uses=1] + br i1 %tmp44426160, label %cond_next4458, label %cond_next4446 + +unwind4453: ; preds = %cond_true4609, %cond_true4504, %cond_true4481 + %eh_ptr4454 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=4] + %eh_select4456 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr4454, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=1] + %eh_typeid4710 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp4712 = icmp eq i32 %eh_select4456, %eh_typeid4710 ; <i1> [#uses=1] + br i1 %tmp4712, label %eh_then4713, label %cleanup4740 + +cond_next4458: ; preds = %cond_next4446, %bb4433, %cleanup4336 + call void @llvm.memcpy.i32( i8* %tmp4379, i8* %tmp4421, i32 %max1395, i32 1 ) + %tmp4464 = icmp ult i8 %tmp137138, %mon.4 ; <i1> [#uses=2] + br i1 %tmp4464, label %cond_next4484, label %cond_true4467 + +cond_true4467: ; preds = %cond_next4458 + %tmp4470 = icmp ult i8 %mon.4, %tmp204205 ; <i1> [#uses=1] + %tmp4474 = icmp ugt i8 %tmp137138, %tmp272273 ; <i1> [#uses=1] + %tmp4478 = or i1 %tmp4470, %tmp4474 ; <i1> [#uses=1] + br i1 %tmp4478, label %cond_true4481, label %cond_next4484 + +cond_true4481: ; preds = %cond_true4467 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 340 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind4453 + +cond_next4484: ; preds = %cond_true4467, %cond_next4458 + %tmp4487 = icmp ult i8 %mon.4, %tue.4 ; <i1> [#uses=2] + br i1 %tmp4487, label %cond_next4507, label %cond_true4490 + +cond_true4490: ; preds = %cond_next4484 + %tmp4493 = icmp ult i8 %tue.4, %tmp204205 ; <i1> [#uses=1] + %tmp4497 = icmp ugt i8 %mon.4, %tmp272273 ; <i1> [#uses=1] + %tmp4501 = or i1 %tmp4497, %tmp4493 ; <i1> [#uses=1] + br i1 %tmp4501, label %cond_true4504, label %cond_next4507 + +cond_true4504: ; preds = %cond_true4490 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 340 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind4453 + +cond_next4507: ; preds = %cond_true4490, %cond_next4484 + %tmp45904591 = zext i8 %mon.4 to i64 ; <i64> [#uses=3] + %tmp45924593 = zext i8 %tue.4 to i64 ; <i64> [#uses=1] + %tmp4594 = sub i64 %tmp45904591, %tmp45924593 ; <i64> [#uses=1] + %tmp4595 = add i64 %tmp4594, 1 ; <i64> [#uses=2] + %tmp4596 = icmp sgt i64 %tmp4595, -1 ; <i1> [#uses=1] + %max4597 = select i1 %tmp4596, i64 %tmp4595, i64 0 ; <i64> [#uses=1] + %tmp45984599 = zext i8 %tmp137138 to i64 ; <i64> [#uses=1] + %tmp4602 = sub i64 %tmp45984599, %tmp45904591 ; <i64> [#uses=1] + %tmp4603 = add i64 %tmp4602, 1 ; <i64> [#uses=3] + %tmp4604 = icmp sgt i64 %tmp4603, -1 ; <i1> [#uses=2] + %max4605 = select i1 %tmp4604, i64 %tmp4603, i64 0 ; <i64> [#uses=1] + %tmp4606 = icmp eq i64 %max4597, %max4605 ; <i1> [#uses=1] + br i1 %tmp4606, label %cond_next4611, label %cond_true4609 + +cond_true4609: ; preds = %cond_next4507 + invoke void @__gnat_rcheck_07( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 340 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind4453 + +cond_next4611: ; preds = %cond_next4507 + %tmp46124613 = zext i8 %tue.4 to i32 ; <i32> [#uses=1] + %tmp4616 = sub i32 %tmp46124613, %tmp13571358 ; <i32> [#uses=2] + %tmp46244625 = zext i8 %mon.4 to i32 ; <i32> [#uses=1] + %tmp4628 = sub i32 %tmp46244625, %tmp13571358 ; <i32> [#uses=3] + %tmp4636 = icmp slt i32 %tmp4628, %tmp4616 ; <i1> [#uses=1] + %tmp4677 = icmp ugt i8 %tue.4, %mon.4 ; <i1> [#uses=2] + br i1 %tmp4636, label %cond_false4673, label %cond_true4639 + +cond_true4639: ; preds = %cond_next4611 + br i1 %tmp4677, label %cleanup4742, label %bb4648.preheader + +bb4648.preheader: ; preds = %cond_true4639 + %tmp46556217 = getelementptr i8* %tmp4379, i32 %tmp4628 ; <i8*> [#uses=1] + %tmp46566218 = load i8* %tmp46556217 ; <i8> [#uses=1] + %tmp46596220 = getelementptr i8* %tmp4379, i32 %tmp4616 ; <i8*> [#uses=1] + store i8 %tmp46566218, i8* %tmp46596220 + %tmp46646223 = icmp eq i8 %tue.4, %mon.4 ; <i1> [#uses=1] + br i1 %tmp46646223, label %cleanup4742, label %cond_next4668.preheader + +cond_next4668.preheader: ; preds = %bb4648.preheader + %tmp46616222.in = add i8 %mon.4, 1 ; <i8> [#uses=1] + %L174b.26213 = add i8 %tue.4, 1 ; <i8> [#uses=1] + %tmp.27 = sub i8 %mon.4, %tue.4 ; <i8> [#uses=1] + br label %cond_next4668 + +cond_next4668: ; preds = %cond_next4668, %cond_next4668.preheader + %indvar6275 = phi i8 [ 0, %cond_next4668.preheader ], [ %indvar.next26, %cond_next4668 ] ; <i8> [#uses=3] + %tmp46616222 = add i8 %tmp46616222.in, %indvar6275 ; <i8> [#uses=1] + %tmp4670 = add i8 %L174b.26213, %indvar6275 ; <i8> [#uses=1] + %tmp46494650 = zext i8 %tmp4670 to i32 ; <i32> [#uses=1] + %tmp46514652 = zext i8 %tmp46616222 to i32 ; <i32> [#uses=1] + %tmp4654 = sub i32 %tmp46514652, %tmp13571358 ; <i32> [#uses=1] + %tmp4655 = getelementptr i8* %tmp4379, i32 %tmp4654 ; <i8*> [#uses=1] + %tmp4656 = load i8* %tmp4655 ; <i8> [#uses=1] + %tmp4658 = sub i32 %tmp46494650, %tmp13571358 ; <i32> [#uses=1] + %tmp4659 = getelementptr i8* %tmp4379, i32 %tmp4658 ; <i8*> [#uses=1] + store i8 %tmp4656, i8* %tmp4659 + %indvar.next26 = add i8 %indvar6275, 1 ; <i8> [#uses=2] + %exitcond28 = icmp eq i8 %indvar.next26, %tmp.27 ; <i1> [#uses=1] + br i1 %exitcond28, label %cleanup4742, label %cond_next4668 + +cond_false4673: ; preds = %cond_next4611 + br i1 %tmp4677, label %cleanup4742, label %bb4682.preheader + +bb4682.preheader: ; preds = %cond_false4673 + %tmp468546866228 = and i32 %tmp123, 255 ; <i32> [#uses=1] + %tmp46886229 = sub i32 %tmp468546866228, %tmp13571358 ; <i32> [#uses=1] + %tmp46896230 = getelementptr i8* %tmp4379, i32 %tmp46886229 ; <i8*> [#uses=1] + %tmp46906231 = load i8* %tmp46896230 ; <i8> [#uses=1] + %tmp46936233 = getelementptr i8* %tmp4379, i32 %tmp4628 ; <i8*> [#uses=1] + store i8 %tmp46906231, i8* %tmp46936233 + %tmp46986236 = icmp eq i8 %mon.4, %tue.4 ; <i1> [#uses=1] + br i1 %tmp46986236, label %cleanup4742, label %cond_next4702.preheader + +cond_next4702.preheader: ; preds = %bb4682.preheader + %tmp46956235.in = add i8 %tmp137138, -1 ; <i8> [#uses=1] + %L172b.26226 = add i8 %mon.4, -1 ; <i8> [#uses=1] + %tmp.32 = sub i8 %mon.4, %tue.4 ; <i8> [#uses=1] + br label %cond_next4702 + +cond_next4702: ; preds = %cond_next4702, %cond_next4702.preheader + %indvar6278 = phi i8 [ 0, %cond_next4702.preheader ], [ %indvar.next30, %cond_next4702 ] ; <i8> [#uses=3] + %tmp46956235 = sub i8 %tmp46956235.in, %indvar6278 ; <i8> [#uses=1] + %tmp4704 = sub i8 %L172b.26226, %indvar6278 ; <i8> [#uses=1] + %tmp46834684 = zext i8 %tmp4704 to i32 ; <i32> [#uses=1] + %tmp46854686 = zext i8 %tmp46956235 to i32 ; <i32> [#uses=1] + %tmp4688 = sub i32 %tmp46854686, %tmp13571358 ; <i32> [#uses=1] + %tmp4689 = getelementptr i8* %tmp4379, i32 %tmp4688 ; <i8*> [#uses=1] + %tmp4690 = load i8* %tmp4689 ; <i8> [#uses=1] + %tmp4692 = sub i32 %tmp46834684, %tmp13571358 ; <i32> [#uses=1] + %tmp4693 = getelementptr i8* %tmp4379, i32 %tmp4692 ; <i8*> [#uses=1] + store i8 %tmp4690, i8* %tmp4693 + %indvar.next30 = add i8 %indvar6278, 1 ; <i8> [#uses=2] + %exitcond33 = icmp eq i8 %indvar.next30, %tmp.32 ; <i1> [#uses=1] + br i1 %exitcond33, label %cleanup4742, label %cond_next4702 + +eh_then4713: ; preds = %unwind4453 + invoke void @__gnat_begin_handler( i8* %eh_ptr4454 ) + to label %invcont4719 unwind label %unwind4717 + +unwind4717: ; preds = %invcont4719, %eh_then4713 + %eh_ptr4718 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + invoke void @__gnat_end_handler( i8* %eh_ptr4454 ) + to label %cleanup4740 unwind label %unwind4732 + +invcont4719: ; preds = %eh_then4713 + %tmp4720 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp4720( ) + to label %UnifiedReturnBlock35 unwind label %unwind4717 + +unwind4732: ; preds = %unwind4717 + %eh_ptr4733 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp4338 ) + call void @llvm.stackrestore( i8* %tmp4338 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr4733 ) ; <i32>:21 [#uses=0] + unreachable + +cleanup4740: ; preds = %unwind4717, %unwind4453 + %eh_exception.53 = phi i8* [ %eh_ptr4454, %unwind4453 ], [ %eh_ptr4718, %unwind4717 ] ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp4338 ) + call void @llvm.stackrestore( i8* %tmp4338 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_exception.53 ) ; <i32>:22 [#uses=0] + unreachable + +cleanup4742: ; preds = %cond_next4702, %bb4682.preheader, %cond_false4673, %cond_next4668, %bb4648.preheader, %cond_true4639 + call void @llvm.stackrestore( i8* %tmp4338 ) + call void @llvm.stackrestore( i8* %tmp4338 ) + %tmp4749 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=2] + br i1 %tmp4464, label %cond_next4776, label %UnifiedReturnBlock35 + +unwind4770: ; preds = %cond_next4776 + %eh_ptr4771 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select4773 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr4771, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=1] + call void @llvm.stackrestore( i8* %tmp4749 ) + %eh_typeid4874 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp4876 = icmp eq i32 %eh_select4773, %eh_typeid4874 ; <i1> [#uses=1] + br i1 %tmp4876, label %eh_then4877, label %Unwind + +cond_next4776: ; preds = %cleanup4742 + %tmp4856.cast = trunc i64 %tmp4603 to i32 ; <i32> [#uses=1] + %max48584859 = select i1 %tmp4604, i32 %tmp4856.cast, i32 0 ; <i32> [#uses=1] + %tmp4861 = invoke i8 @report__equal( i32 %max48584859, i32 0 ) + to label %invcont4860 unwind label %unwind4770 ; <i8> [#uses=1] + +invcont4860: ; preds = %cond_next4776 + %tmp4862 = icmp eq i8 %tmp4861, 0 ; <i1> [#uses=1] + %tue.8 = select i1 %tmp4862, i8 %tue.4, i8 2 ; <i8> [#uses=3] + call void @llvm.stackrestore( i8* %tmp4749 ) + %tmp49016170 = icmp ult i8 %mon.4, %tue.8 ; <i1> [#uses=1] + br i1 %tmp49016170, label %cond_next4925, label %cond_true4904 + +eh_then4877: ; preds = %unwind4770 + invoke void @__gnat_begin_handler( i8* %eh_ptr4771 ) + to label %invcont4883 unwind label %unwind4881 + +unwind4881: ; preds = %invcont4885, %invcont4883, %eh_then4877 + %eh_ptr4882 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr4771 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr4882 ) ; <i32>:23 [#uses=0] + unreachable + +invcont4883: ; preds = %eh_then4877 + %tmp4884 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp4884( ) + to label %invcont4885 unwind label %unwind4881 + +invcont4885: ; preds = %invcont4883 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([18 x i8]* @.str32 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.124.1606 to i32) to i64), i64 32)) ) + to label %cleanup4894 unwind label %unwind4881 + +cleanup4894: ; preds = %invcont4885 + call void @__gnat_end_handler( i8* %eh_ptr4771 ) + br i1 %tmp4487, label %cond_next4925, label %cond_true4904 + +cond_true4904: ; preds = %cleanup4894, %invcont4860 + %tue.96161.0 = phi i8 [ %tue.8, %invcont4860 ], [ %tue.4, %cleanup4894 ] ; <i8> [#uses=3] + %tmp4907 = icmp ult i8 %tue.96161.0, %tmp204205 ; <i1> [#uses=1] + %tmp4911 = icmp ugt i8 %mon.4, %tmp272273 ; <i1> [#uses=1] + %tmp4915 = or i1 %tmp4907, %tmp4911 ; <i1> [#uses=1] + br i1 %tmp4915, label %cond_true4918, label %cond_next4925 + +cond_true4918: ; preds = %cond_true4904 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 361 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind4919 + +unwind4919: ; preds = %cond_next4925, %cond_true4918 + %tue.96161.2 = phi i8 [ %tue.96161.0, %cond_true4918 ], [ %tue.96161.1, %cond_next4925 ] ; <i8> [#uses=1] + %eh_ptr4920 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select4922 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr4920, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=1] + %eh_typeid4987 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp4989 = icmp eq i32 %eh_select4922, %eh_typeid4987 ; <i1> [#uses=1] + br i1 %tmp4989, label %eh_then4990, label %Unwind + +cond_next4925: ; preds = %cond_true4904, %cleanup4894, %invcont4860 + %tue.96161.1 = phi i8 [ %tue.8, %invcont4860 ], [ %tue.4, %cleanup4894 ], [ %tue.96161.0, %cond_true4904 ] ; <i8> [#uses=6] + %tmp49714972 = zext i8 %tue.96161.1 to i64 ; <i64> [#uses=1] + %tmp4973 = sub i64 %tmp45904591, %tmp49714972 ; <i64> [#uses=1] + %tmp4974 = add i64 %tmp4973, 1 ; <i64> [#uses=2] + %tmp4975 = icmp sgt i64 %tmp4974, -1 ; <i1> [#uses=1] + %tmp4974.cast = trunc i64 %tmp4974 to i32 ; <i32> [#uses=1] + %max49764977 = select i1 %tmp4975, i32 %tmp4974.cast, i32 0 ; <i32> [#uses=1] + %tmp4979 = invoke i8 @report__equal( i32 %max49764977, i32 0 ) + to label %invcont4978 unwind label %unwind4919 ; <i8> [#uses=1] + +invcont4978: ; preds = %cond_next4925 + %tmp4980 = icmp eq i8 %tmp4979, 0 ; <i1> [#uses=1] + br i1 %tmp4980, label %finally4985, label %cond_true4983 + +cond_true4983: ; preds = %invcont4978 + %tmp50146178 = icmp ugt i8 %tue.96161.1, 1 ; <i1> [#uses=1] + br i1 %tmp50146178, label %cond_next5038, label %cond_true5017 + +eh_then4990: ; preds = %unwind4919 + invoke void @__gnat_begin_handler( i8* %eh_ptr4920 ) + to label %invcont4996 unwind label %unwind4994 + +unwind4994: ; preds = %invcont4998, %invcont4996, %eh_then4990 + %eh_ptr4995 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr4920 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr4995 ) ; <i32>:24 [#uses=0] + unreachable + +invcont4996: ; preds = %eh_then4990 + %tmp4997 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp4997( ) + to label %invcont4998 unwind label %unwind4994 + +invcont4998: ; preds = %invcont4996 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([19 x i8]* @.str33 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.170.1990 to i32) to i64), i64 32)) ) + to label %cleanup5007 unwind label %unwind4994 + +cleanup5007: ; preds = %invcont4998 + call void @__gnat_end_handler( i8* %eh_ptr4920 ) + br label %finally4985 + +finally4985: ; preds = %cleanup5007, %invcont4978 + %tue.96161.3 = phi i8 [ %tue.96161.2, %cleanup5007 ], [ %tue.96161.1, %invcont4978 ] ; <i8> [#uses=3] + %tmp5014 = icmp ult i8 %mon.4, %tue.96161.3 ; <i1> [#uses=1] + br i1 %tmp5014, label %cond_next5038, label %cond_true5017 + +cond_true5017: ; preds = %finally4985, %cond_true4983 + %tue.96161.4 = phi i8 [ %tue.96161.1, %cond_true4983 ], [ %tue.96161.3, %finally4985 ] ; <i8> [#uses=3] + %mon.86171.0 = phi i8 [ 1, %cond_true4983 ], [ %mon.4, %finally4985 ] ; <i8> [#uses=3] + %tmp5020 = icmp ult i8 %tue.96161.4, %tmp204205 ; <i1> [#uses=1] + %tmp5024 = icmp ugt i8 %mon.86171.0, %tmp272273 ; <i1> [#uses=1] + %tmp5028 = or i1 %tmp5024, %tmp5020 ; <i1> [#uses=1] + br i1 %tmp5028, label %cond_true5031, label %cond_next5038 + +cond_true5031: ; preds = %cond_true5017 + invoke void @__gnat_rcheck_12( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 375 ) + to label %UnifiedUnreachableBlock34 unwind label %unwind5032 + +unwind5032: ; preds = %cond_next5038, %cond_true5031 + %tue.96161.6 = phi i8 [ %tue.96161.4, %cond_true5031 ], [ %tue.96161.5, %cond_next5038 ] ; <i8> [#uses=1] + %mon.86171.2 = phi i8 [ %mon.86171.0, %cond_true5031 ], [ %mon.86171.1, %cond_next5038 ] ; <i8> [#uses=1] + %eh_ptr5033 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select5035 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr5033, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=1] + %eh_typeid5100 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp5102 = icmp eq i32 %eh_select5035, %eh_typeid5100 ; <i1> [#uses=1] + br i1 %tmp5102, label %eh_then5103, label %Unwind + +cond_next5038: ; preds = %cond_true5017, %finally4985, %cond_true4983 + %tue.96161.5 = phi i8 [ %tue.96161.1, %cond_true4983 ], [ %tue.96161.3, %finally4985 ], [ %tue.96161.4, %cond_true5017 ] ; <i8> [#uses=4] + %mon.86171.1 = phi i8 [ 1, %cond_true4983 ], [ %mon.4, %finally4985 ], [ %mon.86171.0, %cond_true5017 ] ; <i8> [#uses=4] + %tmp50825083 = zext i8 %mon.86171.1 to i64 ; <i64> [#uses=1] + %tmp50845085 = zext i8 %tue.96161.5 to i64 ; <i64> [#uses=1] + %tmp5086 = sub i64 %tmp50825083, %tmp50845085 ; <i64> [#uses=1] + %tmp5087 = add i64 %tmp5086, 1 ; <i64> [#uses=2] + %tmp5088 = icmp sgt i64 %tmp5087, -1 ; <i1> [#uses=1] + %tmp5087.cast = trunc i64 %tmp5087 to i32 ; <i32> [#uses=1] + %max50895090 = select i1 %tmp5088, i32 %tmp5087.cast, i32 0 ; <i32> [#uses=1] + %tmp5092 = invoke i8 @report__equal( i32 %max50895090, i32 0 ) + to label %invcont5091 unwind label %unwind5032 ; <i8> [#uses=1] + +invcont5091: ; preds = %cond_next5038 + %tmp5093 = icmp eq i8 %tmp5092, 0 ; <i1> [#uses=1] + br i1 %tmp5093, label %finally5098, label %cond_true5096 + +cond_true5096: ; preds = %invcont5091 + br label %finally5098 + +eh_then5103: ; preds = %unwind5032 + invoke void @__gnat_begin_handler( i8* %eh_ptr5033 ) + to label %invcont5109 unwind label %unwind5107 + +unwind5107: ; preds = %invcont5111, %invcont5109, %eh_then5103 + %eh_ptr5108 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr5033 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr5108 ) ; <i32>:25 [#uses=0] + unreachable + +invcont5109: ; preds = %eh_then5103 + %tmp5110 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp5110( ) + to label %invcont5111 unwind label %unwind5107 + +invcont5111: ; preds = %invcont5109 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([19 x i8]* @.str34 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.170.1990 to i32) to i64), i64 32)) ) + to label %cleanup5120 unwind label %unwind5107 + +cleanup5120: ; preds = %invcont5111 + call void @__gnat_end_handler( i8* %eh_ptr5033 ) + br label %finally5098 + +finally5098: ; preds = %cleanup5120, %cond_true5096, %invcont5091 + %tue.96161.7 = phi i8 [ %tue.96161.6, %cleanup5120 ], [ %tue.96161.5, %cond_true5096 ], [ %tue.96161.5, %invcont5091 ] ; <i8> [#uses=1] + %mon.86171.3 = phi i8 [ %mon.86171.2, %cleanup5120 ], [ %mon.86171.1, %cond_true5096 ], [ %mon.86171.1, %invcont5091 ] ; <i8> [#uses=2] + %wed.6 = phi i8 [ %wed.4, %cleanup5120 ], [ 3, %cond_true5096 ], [ %wed.4, %invcont5091 ] ; <i8> [#uses=5] + %not.tmp5135 = icmp uge i8 %tmp137138, %sat.45934.0 ; <i1> [#uses=1] + %tmp5151 = icmp uge i8 %sat.45934.0, %tmp306307 ; <i1> [#uses=1] + %tmp5155 = icmp ule i8 %sat.45934.0, %wed.6 ; <i1> [#uses=1] + %tmp5159 = and i1 %tmp5155, %tmp5151 ; <i1> [#uses=1] + %tmp5177 = icmp ult i8 %wed.6, %tmp272273 ; <i1> [#uses=1] + %tmp5184 = icmp ugt i8 %wed.6, %tue.96161.7 ; <i1> [#uses=1] + %bothcond5907 = or i1 %tmp5177, %tmp5184 ; <i1> [#uses=2] + %not.bothcond5907 = xor i1 %bothcond5907, true ; <i1> [#uses=1] + %tmp5198 = icmp uge i8 %tmp272273, %mon.86171.3 ; <i1> [#uses=1] + %tmp5202 = icmp ule i8 %tmp272273, %tmp137138 ; <i1> [#uses=1] + %tmp5206 = and i1 %tmp5198, %tmp5202 ; <i1> [#uses=1] + %not.bothcond5908 = icmp uge i8 %tmp306307, %sat.45934.0 ; <i1> [#uses=1] + %tmp5244 = icmp uge i8 %wed.6, %tmp306307 ; <i1> [#uses=1] + %tmp5248 = icmp ule i8 %wed.6, %mon.86171.3 ; <i1> [#uses=1] + %tmp5252 = and i1 %tmp5244, %tmp5248 ; <i1> [#uses=1] + %tmp5164 = or i1 %not.tmp5135, %not.bothcond5908 ; <i1> [#uses=1] + %tmp5194 = or i1 %tmp5164, %tmp5206 ; <i1> [#uses=1] + %tmp5210 = or i1 %tmp5194, %tmp5159 ; <i1> [#uses=1] + %tmp5240 = or i1 %tmp5210, %not.bothcond5907 ; <i1> [#uses=1] + %tmp5256 = or i1 %tmp5240, %tmp5252 ; <i1> [#uses=1] + br i1 %tmp5256, label %cond_true5259, label %cond_next5271 + +cond_true5259: ; preds = %finally5098 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([27 x i8]* @.str35 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.178.2066 to i32) to i64), i64 32)) ) + to label %cond_next5271 unwind label %unwind5266 + +unwind5266: ; preds = %cond_true5462, %invcont5429, %cond_next5401, %cond_true5393, %cond_next5374, %bb5359, %cond_next5347, %invcont5330, %invcont5305, %invcont5303, %invcont5294, %bb5293, %cond_next5281, %cond_next5271, %cond_true5259 + %eh_ptr5267 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5] + %eh_select5269 = call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr5267, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value ) ; <i32> [#uses=1] + %eh_typeid5473 = call i32 @llvm.eh.typeid.for( i8* bitcast (i32* @__gnat_others_value to i8*) ) ; <i32> [#uses=1] + %tmp5475 = icmp eq i32 %eh_select5269, %eh_typeid5473 ; <i1> [#uses=1] + br i1 %tmp5475, label %eh_then5476, label %Unwind + +cond_next5271: ; preds = %cond_true5259, %finally5098 + %tmp5273 = invoke i32 @report__ident_int( i32 0 ) + to label %invcont5272 unwind label %unwind5266 ; <i32> [#uses=2] + +invcont5272: ; preds = %cond_next5271 + %tmp5277 = icmp slt i32 %tmp5273, 10 ; <i1> [#uses=1] + br i1 %tmp5277, label %bb5292, label %cond_next5281 + +cond_next5281: ; preds = %invcont5272 + %tmp5283 = invoke i32 @report__ident_int( i32 -10 ) + to label %invcont5282 unwind label %unwind5266 ; <i32> [#uses=1] + +invcont5282: ; preds = %cond_next5281 + %tmp5287 = icmp sgt i32 %tmp5273, %tmp5283 ; <i1> [#uses=1] + br i1 %tmp5287, label %bb5292, label %bb5293 + +bb5292: ; preds = %invcont5282, %invcont5272 + br label %bb5293 + +bb5293: ; preds = %bb5292, %invcont5282 + %iftmp.179.0 = phi i1 [ false, %bb5292 ], [ true, %invcont5282 ] ; <i1> [#uses=1] + %tmp5295 = invoke i32 @report__ident_int( i32 10 ) + to label %invcont5294 unwind label %unwind5266 ; <i32> [#uses=1] + +invcont5294: ; preds = %bb5293 + %tmp5296 = icmp slt i32 %tmp5295, 1 ; <i1> [#uses=1] + %tmp5304 = invoke i32 @report__ident_int( i32 0 ) + to label %invcont5303 unwind label %unwind5266 ; <i32> [#uses=2] + +invcont5303: ; preds = %invcont5294 + %tmp5306 = invoke i32 @report__ident_int( i32 -10 ) + to label %invcont5305 unwind label %unwind5266 ; <i32> [#uses=1] + +invcont5305: ; preds = %invcont5303 + %tmp5331 = invoke i32 @report__ident_int( i32 -20 ) + to label %invcont5330 unwind label %unwind5266 ; <i32> [#uses=1] + +invcont5330: ; preds = %invcont5305 + %tmp5310 = icmp slt i32 %tmp5304, %tmp5306 ; <i1> [#uses=1] + %tmp5318 = icmp sgt i32 %tmp5304, -11 ; <i1> [#uses=1] + %bothcond5909 = or i1 %tmp5310, %tmp5318 ; <i1> [#uses=1] + %not.bothcond5909 = xor i1 %bothcond5909, true ; <i1> [#uses=1] + %tmp5332 = icmp sgt i32 %tmp5331, -1 ; <i1> [#uses=1] + %tmp5339 = invoke i32 @report__ident_int( i32 0 ) + to label %invcont5338 unwind label %unwind5266 ; <i32> [#uses=2] + +invcont5338: ; preds = %invcont5330 + %tmp5343 = icmp slt i32 %tmp5339, 6 ; <i1> [#uses=1] + br i1 %tmp5343, label %bb5358, label %cond_next5347 + +cond_next5347: ; preds = %invcont5338 + %tmp5349 = invoke i32 @report__ident_int( i32 5 ) + to label %invcont5348 unwind label %unwind5266 ; <i32> [#uses=1] + +invcont5348: ; preds = %cond_next5347 + %tmp5353 = icmp sgt i32 %tmp5339, %tmp5349 ; <i1> [#uses=1] + br i1 %tmp5353, label %bb5358, label %bb5359 + +bb5358: ; preds = %invcont5348, %invcont5338 + br label %bb5359 + +bb5359: ; preds = %bb5358, %invcont5348 + %iftmp.181.0 = phi i1 [ false, %bb5358 ], [ true, %invcont5348 ] ; <i1> [#uses=1] + %tmp5366 = invoke i32 @report__ident_int( i32 0 ) + to label %invcont5365 unwind label %unwind5266 ; <i32> [#uses=2] + +invcont5365: ; preds = %bb5359 + %tmp5370 = icmp slt i32 %tmp5366, 7 ; <i1> [#uses=1] + br i1 %tmp5370, label %bb5385, label %cond_next5374 + +cond_next5374: ; preds = %invcont5365 + %tmp5376 = invoke i32 @report__ident_int( i32 3 ) + to label %invcont5375 unwind label %unwind5266 ; <i32> [#uses=1] + +invcont5375: ; preds = %cond_next5374 + %tmp5380 = icmp sgt i32 %tmp5366, %tmp5376 ; <i1> [#uses=1] + br i1 %tmp5380, label %bb5385, label %bb5386 + +bb5385: ; preds = %invcont5375, %invcont5365 + br label %bb5386 + +bb5386: ; preds = %bb5385, %invcont5375 + %iftmp.182.0 = phi i1 [ false, %bb5385 ], [ true, %invcont5375 ] ; <i1> [#uses=1] + %tmp5301 = or i1 %tmp5296, %iftmp.179.0 ; <i1> [#uses=1] + %tmp5328 = or i1 %tmp5301, %not.bothcond5909 ; <i1> [#uses=1] + %tmp5336 = or i1 %tmp5328, %tmp5332 ; <i1> [#uses=1] + %tmp5363 = or i1 %tmp5336, %iftmp.181.0 ; <i1> [#uses=1] + %tmp5390 = or i1 %tmp5363, %iftmp.182.0 ; <i1> [#uses=1] + br i1 %tmp5390, label %cond_true5393, label %cond_next5401 + +cond_true5393: ; preds = %bb5386 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([27 x i8]* @.str36 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.178.2066 to i32) to i64), i64 32)) ) + to label %cond_next5401 unwind label %unwind5266 + +cond_next5401: ; preds = %cond_true5393, %bb5386 + %tmp5430 = invoke i32 @report__ident_int( i32 0 ) + to label %invcont5429 unwind label %unwind5266 ; <i32> [#uses=2] + +invcont5429: ; preds = %cond_next5401 + %tmp5432 = invoke i32 @report__ident_int( i32 4 ) + to label %invcont5431 unwind label %unwind5266 ; <i32> [#uses=1] + +invcont5431: ; preds = %invcont5429 + %tmp5436 = icmp slt i32 %tmp5430, %tmp5432 ; <i1> [#uses=1] + %tmp5444 = icmp sgt i32 %tmp5430, -4 ; <i1> [#uses=1] + %bothcond5911 = or i1 %tmp5436, %tmp5444 ; <i1> [#uses=1] + %tmp5457 = and i1 %bothcond5911, %bothcond5907 ; <i1> [#uses=1] + br i1 %tmp5457, label %finally5471, label %cond_true5462 + +cond_true5462: ; preds = %invcont5431 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([29 x i8]* @.str37 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.36.923 to i32) to i64), i64 32)) ) + to label %finally5471 unwind label %unwind5266 + +eh_then5476: ; preds = %unwind5266 + invoke void @__gnat_begin_handler( i8* %eh_ptr5267 ) + to label %invcont5482 unwind label %unwind5480 + +unwind5480: ; preds = %invcont5484, %invcont5482, %eh_then5476 + %eh_ptr5481 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @__gnat_end_handler( i8* %eh_ptr5267 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_ptr5481 ) ; <i32>:26 [#uses=0] + unreachable + +invcont5482: ; preds = %eh_then5476 + %tmp5483 = load void ()** @system__soft_links__abort_undefer ; <void ()*> [#uses=1] + invoke void %tmp5483( ) + to label %invcont5484 unwind label %unwind5480 + +invcont5484: ; preds = %invcont5482 + invoke void @report__failed( i64 or (i64 zext (i32 ptrtoint ([19 x i8]* @.str38 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.170.1990 to i32) to i64), i64 32)) ) + to label %cleanup5493 unwind label %unwind5480 + +cleanup5493: ; preds = %invcont5484 + call void @__gnat_end_handler( i8* %eh_ptr5267 ) + call void @report__result( ) + ret void + +finally5471: ; preds = %cond_true5462, %invcont5431 + call void @report__result( ) + ret void + +Unwind: ; preds = %unwind5266, %unwind5032, %unwind4919, %unwind4770, %unwind3880, %unwind3618, %unwind3393, %eh_else3366, %eh_else3016, %eh_else2666, %eh_else1330, %eh_else932, %eh_else823 + %eh_exception.2 = phi i8* [ %eh_exception.05914.1, %eh_else823 ], [ %eh_ptr872, %eh_else932 ], [ %eh_ptr975, %eh_else1330 ], [ %eh_exception.296030.1, %eh_else2666 ], [ %eh_exception.336046.1, %eh_else3016 ], [ %eh_exception.396074.1, %eh_else3366 ], [ %eh_ptr3394, %unwind3393 ], [ %eh_ptr3619, %unwind3618 ], [ %eh_ptr3881, %unwind3880 ], [ %eh_ptr4771, %unwind4770 ], [ %eh_ptr4920, %unwind4919 ], [ %eh_ptr5033, %unwind5032 ], [ %eh_ptr5267, %unwind5266 ] ; <i8*> [#uses=1] + call i32 (...)* @_Unwind_Resume( i8* %eh_exception.2 ) ; <i32>:27 [#uses=0] + unreachable + +UnifiedUnreachableBlock34: ; preds = %cond_true5031, %cond_true4918, %cond_true4609, %cond_true4504, %cond_true4481, %cond_true4187, %cond_true4117, %cond_true4027, %cond_true3935, %cond_true3907, %cond_true3729, %cond_true3675, %cond_true3617, %cond_true3543, %cond_true3448, %cond_true3420, %bb3227, %bb3193, %bb3171, %cond_true3061, %bb2877, %bb2843, %bb2821, %cond_true2711, %bb2558, %bb2524, %bb2506, %cond_true2410, %bb2203, %cond_true2171, %cond_true1946, %bb1605, %cond_true1573, %cond_true1546, %cond_true1418, %cond_true973, %cond_true870, %cond_true663, %cond_true637, %cond_true611, %cond_true585, %cond_true559, %cond_true533, %cond_true507, %cond_true465 + unreachable + +UnifiedReturnBlock35: ; preds = %cleanup4742, %invcont4719, %finally913, %cleanup928 + ret void +} + +declare i32 @report__ident_int(i32) + +declare void @__gnat_rcheck_10(i8*, i32) + +declare void @__gnat_rcheck_12(i8*, i32) + +declare void @report__test(i64, i64) + +declare i8* @llvm.eh.exception() + +declare i32 @llvm.eh.selector(i8*, i8*, ...) + +declare i32 @llvm.eh.typeid.for(i8*) + +declare i32 @__gnat_eh_personality(...) + +declare i32 @_Unwind_Resume(...) + +declare void @system__secondary_stack__ss_mark(%struct.system__secondary_stack__mark_id* sret ) + +declare void @system__img_int__image_integer(%struct.string___XUP* sret , i32) + +declare void @system__string_ops__str_concat(%struct.string___XUP* sret , i64, i64) + +declare void @report__failed(i64) + +declare void @system__secondary_stack__ss_release(i64) + +declare void @__gnat_begin_handler(i8*) + +declare void @__gnat_end_handler(i8*) + +declare i8 @report__equal(i32, i32) + +declare i8* @llvm.stacksave() + +declare void @__gnat_rcheck_07(i8*, i32) + +declare i8* @__gnat_malloc(i32) + +declare void @llvm.stackrestore(i8*) + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +declare void @__gnat_rcheck_05(i8*, i32) + +declare void @__gnat_rcheck_06(i8*, i32) + +declare void @system__img_enum__image_enumeration_8(%struct.string___XUP* sret , i32, i64, i8*) + +declare i32 @memcmp(i8*, i8*, i32, ...) + +declare void @report__result() diff --git a/test/CodeGen/Generic/2007-07-06-FilterOffset.ll b/test/CodeGen/Generic/2007-07-06-FilterOffset.ll new file mode 100644 index 0000000..252ba1c --- /dev/null +++ b/test/CodeGen/Generic/2007-07-06-FilterOffset.ll @@ -0,0 +1,1621 @@ +; RUN: llvm-as < %s | llc -enable-eh -asm-verbose -o - | \ +; RUN: grep {\\-4.*TypeInfo index} + +target triple = "i686-pc-linux-gnu" + %struct.__class_type_info_pseudo = type { %struct.__type_info_pseudo } + %struct.__type_info_pseudo = type { i8*, i8* } +@_ZTI4a000 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a000, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a001 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a001, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a002 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a002, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a003 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a003, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a004 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a004, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a005 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a005, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a006 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a006, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a007 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a007, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a008 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a008, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a009 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a009, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a010 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a010, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a011 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a011, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a012 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a012, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a013 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a013, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a014 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a014, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a015 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a015, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a016 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a016, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a017 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a017, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a018 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a018, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a019 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a019, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a020 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a020, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a021 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a021, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a022 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a022, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a023 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a023, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a024 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a024, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a025 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a025, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a026 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a026, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a027 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a027, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a028 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a028, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a029 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a029, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a030 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a030, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a031 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a031, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a032 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a032, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a033 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a033, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a034 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a034, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a035 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a035, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a036 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a036, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a037 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a037, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a038 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a038, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a039 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a039, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a040 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a040, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a041 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a041, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a042 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a042, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a043 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a043, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a044 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a044, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a045 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a045, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a046 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a046, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a047 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a047, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a048 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a048, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a049 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a049, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a050 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a050, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a051 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a051, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a052 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a052, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a053 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a053, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a054 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a054, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a055 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a055, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a056 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a056, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a057 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a057, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a058 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a058, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a059 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a059, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a060 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a060, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a061 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a061, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a062 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a062, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a063 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a063, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a064 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a064, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a065 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a065, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a066 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a066, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a067 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a067, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a068 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a068, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a069 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a069, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a070 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a070, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a071 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a071, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a072 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a072, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a073 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a073, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a074 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a074, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a075 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a075, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a076 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a076, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a077 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a077, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a078 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a078, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a079 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a079, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a080 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a080, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a081 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a081, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a082 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a082, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a083 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a083, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a084 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a084, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a085 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a085, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a086 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a086, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a087 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a087, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a088 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a088, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a089 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a089, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a090 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a090, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a091 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a091, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a092 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a092, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a093 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a093, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a094 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a094, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a095 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a095, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a096 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a096, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a097 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a097, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a098 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a098, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a099 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a099, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a100 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a100, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a101 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a101, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a102 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a102, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a103 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a103, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a104 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a104, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a105 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a105, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a106 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a106, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a107 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a107, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a108 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a108, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a109 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a109, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a110 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a110, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a111 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a111, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a112 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a112, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a113 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a113, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a114 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a114, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a115 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a115, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a116 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a116, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a117 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a117, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a118 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a118, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a119 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a119, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a120 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a120, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a121 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a121, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a122 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a122, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a123 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a123, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a124 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a124, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a125 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a125, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a126 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a126, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a127 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a127, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTI4a128 = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([6 x i8]* @_ZTS4a128, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1] +@_ZTVN10__cxxabiv117__class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=1] +@_ZTS4a128 = weak constant [6 x i8] c"4a128\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a127 = weak constant [6 x i8] c"4a127\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a126 = weak constant [6 x i8] c"4a126\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a125 = weak constant [6 x i8] c"4a125\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a124 = weak constant [6 x i8] c"4a124\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a123 = weak constant [6 x i8] c"4a123\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a122 = weak constant [6 x i8] c"4a122\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a121 = weak constant [6 x i8] c"4a121\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a120 = weak constant [6 x i8] c"4a120\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a119 = weak constant [6 x i8] c"4a119\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a118 = weak constant [6 x i8] c"4a118\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a117 = weak constant [6 x i8] c"4a117\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a116 = weak constant [6 x i8] c"4a116\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a115 = weak constant [6 x i8] c"4a115\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a114 = weak constant [6 x i8] c"4a114\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a113 = weak constant [6 x i8] c"4a113\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a112 = weak constant [6 x i8] c"4a112\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a111 = weak constant [6 x i8] c"4a111\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a110 = weak constant [6 x i8] c"4a110\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a109 = weak constant [6 x i8] c"4a109\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a108 = weak constant [6 x i8] c"4a108\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a107 = weak constant [6 x i8] c"4a107\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a106 = weak constant [6 x i8] c"4a106\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a105 = weak constant [6 x i8] c"4a105\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a104 = weak constant [6 x i8] c"4a104\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a103 = weak constant [6 x i8] c"4a103\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a102 = weak constant [6 x i8] c"4a102\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a101 = weak constant [6 x i8] c"4a101\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a100 = weak constant [6 x i8] c"4a100\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a099 = weak constant [6 x i8] c"4a099\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a098 = weak constant [6 x i8] c"4a098\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a097 = weak constant [6 x i8] c"4a097\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a096 = weak constant [6 x i8] c"4a096\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a095 = weak constant [6 x i8] c"4a095\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a094 = weak constant [6 x i8] c"4a094\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a093 = weak constant [6 x i8] c"4a093\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a092 = weak constant [6 x i8] c"4a092\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a091 = weak constant [6 x i8] c"4a091\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a090 = weak constant [6 x i8] c"4a090\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a089 = weak constant [6 x i8] c"4a089\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a088 = weak constant [6 x i8] c"4a088\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a087 = weak constant [6 x i8] c"4a087\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a086 = weak constant [6 x i8] c"4a086\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a085 = weak constant [6 x i8] c"4a085\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a084 = weak constant [6 x i8] c"4a084\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a083 = weak constant [6 x i8] c"4a083\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a082 = weak constant [6 x i8] c"4a082\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a081 = weak constant [6 x i8] c"4a081\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a080 = weak constant [6 x i8] c"4a080\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a079 = weak constant [6 x i8] c"4a079\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a078 = weak constant [6 x i8] c"4a078\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a077 = weak constant [6 x i8] c"4a077\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a076 = weak constant [6 x i8] c"4a076\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a075 = weak constant [6 x i8] c"4a075\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a074 = weak constant [6 x i8] c"4a074\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a073 = weak constant [6 x i8] c"4a073\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a072 = weak constant [6 x i8] c"4a072\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a071 = weak constant [6 x i8] c"4a071\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a070 = weak constant [6 x i8] c"4a070\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a069 = weak constant [6 x i8] c"4a069\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a068 = weak constant [6 x i8] c"4a068\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a067 = weak constant [6 x i8] c"4a067\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a066 = weak constant [6 x i8] c"4a066\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a065 = weak constant [6 x i8] c"4a065\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a064 = weak constant [6 x i8] c"4a064\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a063 = weak constant [6 x i8] c"4a063\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a062 = weak constant [6 x i8] c"4a062\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a061 = weak constant [6 x i8] c"4a061\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a060 = weak constant [6 x i8] c"4a060\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a059 = weak constant [6 x i8] c"4a059\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a058 = weak constant [6 x i8] c"4a058\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a057 = weak constant [6 x i8] c"4a057\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a056 = weak constant [6 x i8] c"4a056\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a055 = weak constant [6 x i8] c"4a055\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a054 = weak constant [6 x i8] c"4a054\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a053 = weak constant [6 x i8] c"4a053\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a052 = weak constant [6 x i8] c"4a052\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a051 = weak constant [6 x i8] c"4a051\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a050 = weak constant [6 x i8] c"4a050\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a049 = weak constant [6 x i8] c"4a049\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a048 = weak constant [6 x i8] c"4a048\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a047 = weak constant [6 x i8] c"4a047\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a046 = weak constant [6 x i8] c"4a046\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a045 = weak constant [6 x i8] c"4a045\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a044 = weak constant [6 x i8] c"4a044\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a043 = weak constant [6 x i8] c"4a043\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a042 = weak constant [6 x i8] c"4a042\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a041 = weak constant [6 x i8] c"4a041\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a040 = weak constant [6 x i8] c"4a040\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a039 = weak constant [6 x i8] c"4a039\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a038 = weak constant [6 x i8] c"4a038\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a037 = weak constant [6 x i8] c"4a037\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a036 = weak constant [6 x i8] c"4a036\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a035 = weak constant [6 x i8] c"4a035\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a034 = weak constant [6 x i8] c"4a034\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a033 = weak constant [6 x i8] c"4a033\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a032 = weak constant [6 x i8] c"4a032\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a031 = weak constant [6 x i8] c"4a031\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a030 = weak constant [6 x i8] c"4a030\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a029 = weak constant [6 x i8] c"4a029\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a028 = weak constant [6 x i8] c"4a028\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a027 = weak constant [6 x i8] c"4a027\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a026 = weak constant [6 x i8] c"4a026\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a025 = weak constant [6 x i8] c"4a025\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a024 = weak constant [6 x i8] c"4a024\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a023 = weak constant [6 x i8] c"4a023\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a022 = weak constant [6 x i8] c"4a022\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a021 = weak constant [6 x i8] c"4a021\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a020 = weak constant [6 x i8] c"4a020\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a019 = weak constant [6 x i8] c"4a019\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a018 = weak constant [6 x i8] c"4a018\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a017 = weak constant [6 x i8] c"4a017\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a016 = weak constant [6 x i8] c"4a016\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a015 = weak constant [6 x i8] c"4a015\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a014 = weak constant [6 x i8] c"4a014\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a013 = weak constant [6 x i8] c"4a013\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a012 = weak constant [6 x i8] c"4a012\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a011 = weak constant [6 x i8] c"4a011\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a010 = weak constant [6 x i8] c"4a010\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a009 = weak constant [6 x i8] c"4a009\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a008 = weak constant [6 x i8] c"4a008\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a007 = weak constant [6 x i8] c"4a007\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a006 = weak constant [6 x i8] c"4a006\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a005 = weak constant [6 x i8] c"4a005\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a004 = weak constant [6 x i8] c"4a004\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a003 = weak constant [6 x i8] c"4a003\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a002 = weak constant [6 x i8] c"4a002\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a001 = weak constant [6 x i8] c"4a001\00" ; <[6 x i8]*> [#uses=1] +@_ZTS4a000 = weak constant [6 x i8] c"4a000\00" ; <[6 x i8]*> [#uses=1] + +declare void @_Z1Nv() + +declare i8* @llvm.eh.exception() + +declare i32 @llvm.eh.selector(i8*, i8*, ...) + +declare i32 @llvm.eh.typeid.for(i8*) + +declare i32 @__gxx_personality_v0(...) + +declare i32 @_Unwind_Resume(...) + +declare void @__cxa_call_unexpected(i8*) + +define void @_Z1Qv() { +entry: + invoke void @_Z1Nv( ) + to label %UnifiedReturnBlock2 unwind label %unwind + +unwind: ; preds = %entry + %eh_ptr = tail call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1, i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a000 to i8*), i32 1, i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a001 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a000 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a001 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a002 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a003 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a004 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a005 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a006 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a007 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a008 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a009 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a010 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a011 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a012 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a013 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a014 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a015 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a016 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a017 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a018 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a019 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a020 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a021 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a022 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a023 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a024 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a025 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a026 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a027 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a028 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a029 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a030 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a031 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a032 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a033 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a034 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a035 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a036 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a037 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a038 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a039 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a040 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a041 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a042 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a043 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a044 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a045 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a046 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a047 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a048 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a049 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a050 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a051 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a052 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a053 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a054 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a055 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a056 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a057 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a058 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a059 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a060 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a061 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a062 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a063 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a064 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a065 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a066 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a067 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a068 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a069 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a070 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a071 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a072 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a073 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a074 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a075 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a076 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a077 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a078 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a079 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a080 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a081 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a082 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a083 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a084 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a085 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a086 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a087 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a088 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a089 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a090 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a091 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a092 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a093 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a094 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a095 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a096 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a097 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a098 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a099 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a100 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a101 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a102 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a103 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a104 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a105 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a106 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a107 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a108 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a109 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a110 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a111 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a112 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a113 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a114 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a115 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a116 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a117 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a118 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a119 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a120 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a121 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a122 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a123 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a124 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a125 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a126 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a127 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a128 to i8*) ) ; <i32> [#uses=2] + %tmp260 = icmp slt i32 %eh_select, 0 ; <i1> [#uses=1] + br i1 %tmp260, label %filter, label %cleanup279 + +filter: ; preds = %unwind + invoke void @__cxa_call_unexpected( i8* %eh_ptr ) + to label %UnifiedUnreachableBlock1 unwind label %unwind261 + +unwind261: ; preds = %filter + %eh_ptr262 = tail call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select264 = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr262, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1, i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a001 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a000 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a001 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a002 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a003 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a004 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a005 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a006 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a007 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a008 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a009 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a010 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a011 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a012 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a013 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a014 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a015 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a016 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a017 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a018 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a019 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a020 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a021 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a022 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a023 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a024 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a025 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a026 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a027 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a028 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a029 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a030 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a031 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a032 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a033 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a034 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a035 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a036 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a037 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a038 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a039 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a040 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a041 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a042 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a043 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a044 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a045 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a046 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a047 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a048 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a049 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a050 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a051 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a052 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a053 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a054 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a055 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a056 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a057 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a058 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a059 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a060 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a061 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a062 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a063 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a064 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a065 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a066 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a067 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a068 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a069 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a070 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a071 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a072 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a073 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a074 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a075 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a076 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a077 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a078 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a079 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a080 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a081 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a082 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a083 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a084 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a085 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a086 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a087 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a088 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a089 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a090 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a091 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a092 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a093 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a094 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a095 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a096 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a097 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a098 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a099 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a100 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a101 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a102 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a103 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a104 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a105 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a106 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a107 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a108 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a109 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a110 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a111 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a112 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a113 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a114 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a115 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a116 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a117 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a118 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a119 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a120 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a121 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a122 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a123 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a124 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a125 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a126 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a127 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a128 to i8*) ) ; <i32> [#uses=2] + %tmp2692602 = icmp slt i32 %eh_select264, 0 ; <i1> [#uses=1] + br i1 %tmp2692602, label %filter270, label %cleanup279 + +filter270: ; preds = %unwind261 + invoke void @__cxa_call_unexpected( i8* %eh_ptr262 ) + to label %UnifiedUnreachableBlock1 unwind label %unwind272 + +unwind272: ; preds = %filter270 + %eh_ptr273 = tail call i8* @llvm.eh.exception( ) ; <i8*> [#uses=3] + %eh_select275 = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr273, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a000 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a001 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a002 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a003 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a004 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a005 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a006 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a007 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a008 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a009 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a010 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a011 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a012 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a013 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a014 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a015 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a016 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a017 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a018 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a019 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a020 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a021 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a022 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a023 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a024 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a025 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a026 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a027 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a028 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a029 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a030 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a031 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a032 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a033 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a034 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a035 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a036 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a037 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a038 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a039 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a040 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a041 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a042 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a043 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a044 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a045 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a046 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a047 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a048 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a049 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a050 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a051 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a052 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a053 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a054 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a055 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a056 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a057 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a058 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a059 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a060 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a061 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a062 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a063 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a064 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a065 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a066 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a067 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a068 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a069 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a070 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a071 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a072 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a073 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a074 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a075 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a076 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a077 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a078 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a079 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a080 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a081 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a082 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a083 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a084 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a085 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a086 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a087 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a088 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a089 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a090 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a091 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a092 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a093 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a094 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a095 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a096 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a097 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a098 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a099 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a100 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a101 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a102 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a103 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a104 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a105 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a106 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a107 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a108 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a109 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a110 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a111 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a112 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a113 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a114 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a115 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a116 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a117 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a118 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a119 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a120 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a121 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a122 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a123 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a124 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a125 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a126 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a127 to i8*), i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a128 to i8*) ) ; <i32> [#uses=2] + %eh_typeid2863 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a000 to i8*) ) ; <i32> [#uses=1] + %tmp2812865 = icmp eq i32 %eh_select275, %eh_typeid2863 ; <i1> [#uses=1] + br i1 %tmp2812865, label %eh_then, label %eh_else + +cleanup279: ; preds = %unwind261, %unwind + %eh_exception.1 = phi i8* [ %eh_ptr, %unwind ], [ %eh_ptr262, %unwind261 ] ; <i8*> [#uses=2] + %eh_selector.1 = phi i32 [ %eh_select, %unwind ], [ %eh_select264, %unwind261 ] ; <i32> [#uses=2] + %eh_typeid = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a000 to i8*) ) ; <i32> [#uses=1] + %tmp281 = icmp eq i32 %eh_selector.1, %eh_typeid ; <i1> [#uses=1] + br i1 %tmp281, label %eh_then, label %eh_else + +eh_then: ; preds = %cleanup279, %unwind272 + %eh_exception.12604.0 = phi i8* [ %eh_ptr273, %unwind272 ], [ %eh_exception.1, %cleanup279 ] ; <i8*> [#uses=1] + %tmp284 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.0 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else: ; preds = %cleanup279, %unwind272 + %eh_exception.12604.1 = phi i8* [ %eh_ptr273, %unwind272 ], [ %eh_exception.1, %cleanup279 ] ; <i8*> [#uses=129] + %eh_selector.12734.1 = phi i32 [ %eh_select275, %unwind272 ], [ %eh_selector.1, %cleanup279 ] ; <i32> [#uses=128] + %eh_typeid295 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a001 to i8*) ) ; <i32> [#uses=1] + %tmp297 = icmp eq i32 %eh_selector.12734.1, %eh_typeid295 ; <i1> [#uses=1] + br i1 %tmp297, label %eh_then298, label %eh_else312 + +eh_then298: ; preds = %eh_else + %tmp301 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else312: ; preds = %eh_else + %eh_typeid313 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a002 to i8*) ) ; <i32> [#uses=1] + %tmp315 = icmp eq i32 %eh_selector.12734.1, %eh_typeid313 ; <i1> [#uses=1] + br i1 %tmp315, label %eh_then316, label %eh_else330 + +eh_then316: ; preds = %eh_else312 + %tmp319 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else330: ; preds = %eh_else312 + %eh_typeid331 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a003 to i8*) ) ; <i32> [#uses=1] + %tmp333 = icmp eq i32 %eh_selector.12734.1, %eh_typeid331 ; <i1> [#uses=1] + br i1 %tmp333, label %eh_then334, label %eh_else348 + +eh_then334: ; preds = %eh_else330 + %tmp337 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else348: ; preds = %eh_else330 + %eh_typeid349 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a004 to i8*) ) ; <i32> [#uses=1] + %tmp351 = icmp eq i32 %eh_selector.12734.1, %eh_typeid349 ; <i1> [#uses=1] + br i1 %tmp351, label %eh_then352, label %eh_else366 + +eh_then352: ; preds = %eh_else348 + %tmp355 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else366: ; preds = %eh_else348 + %eh_typeid367 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a005 to i8*) ) ; <i32> [#uses=1] + %tmp369 = icmp eq i32 %eh_selector.12734.1, %eh_typeid367 ; <i1> [#uses=1] + br i1 %tmp369, label %eh_then370, label %eh_else384 + +eh_then370: ; preds = %eh_else366 + %tmp373 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else384: ; preds = %eh_else366 + %eh_typeid385 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a006 to i8*) ) ; <i32> [#uses=1] + %tmp387 = icmp eq i32 %eh_selector.12734.1, %eh_typeid385 ; <i1> [#uses=1] + br i1 %tmp387, label %eh_then388, label %eh_else402 + +eh_then388: ; preds = %eh_else384 + %tmp391 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else402: ; preds = %eh_else384 + %eh_typeid403 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a007 to i8*) ) ; <i32> [#uses=1] + %tmp405 = icmp eq i32 %eh_selector.12734.1, %eh_typeid403 ; <i1> [#uses=1] + br i1 %tmp405, label %eh_then406, label %eh_else420 + +eh_then406: ; preds = %eh_else402 + %tmp409 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else420: ; preds = %eh_else402 + %eh_typeid421 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a008 to i8*) ) ; <i32> [#uses=1] + %tmp423 = icmp eq i32 %eh_selector.12734.1, %eh_typeid421 ; <i1> [#uses=1] + br i1 %tmp423, label %eh_then424, label %eh_else438 + +eh_then424: ; preds = %eh_else420 + %tmp427 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else438: ; preds = %eh_else420 + %eh_typeid439 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a009 to i8*) ) ; <i32> [#uses=1] + %tmp441 = icmp eq i32 %eh_selector.12734.1, %eh_typeid439 ; <i1> [#uses=1] + br i1 %tmp441, label %eh_then442, label %eh_else456 + +eh_then442: ; preds = %eh_else438 + %tmp445 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else456: ; preds = %eh_else438 + %eh_typeid457 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a010 to i8*) ) ; <i32> [#uses=1] + %tmp459 = icmp eq i32 %eh_selector.12734.1, %eh_typeid457 ; <i1> [#uses=1] + br i1 %tmp459, label %eh_then460, label %eh_else474 + +eh_then460: ; preds = %eh_else456 + %tmp463 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else474: ; preds = %eh_else456 + %eh_typeid475 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a011 to i8*) ) ; <i32> [#uses=1] + %tmp477 = icmp eq i32 %eh_selector.12734.1, %eh_typeid475 ; <i1> [#uses=1] + br i1 %tmp477, label %eh_then478, label %eh_else492 + +eh_then478: ; preds = %eh_else474 + %tmp481 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else492: ; preds = %eh_else474 + %eh_typeid493 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a012 to i8*) ) ; <i32> [#uses=1] + %tmp495 = icmp eq i32 %eh_selector.12734.1, %eh_typeid493 ; <i1> [#uses=1] + br i1 %tmp495, label %eh_then496, label %eh_else510 + +eh_then496: ; preds = %eh_else492 + %tmp499 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else510: ; preds = %eh_else492 + %eh_typeid511 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a013 to i8*) ) ; <i32> [#uses=1] + %tmp513 = icmp eq i32 %eh_selector.12734.1, %eh_typeid511 ; <i1> [#uses=1] + br i1 %tmp513, label %eh_then514, label %eh_else528 + +eh_then514: ; preds = %eh_else510 + %tmp517 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else528: ; preds = %eh_else510 + %eh_typeid529 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a014 to i8*) ) ; <i32> [#uses=1] + %tmp531 = icmp eq i32 %eh_selector.12734.1, %eh_typeid529 ; <i1> [#uses=1] + br i1 %tmp531, label %eh_then532, label %eh_else546 + +eh_then532: ; preds = %eh_else528 + %tmp535 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else546: ; preds = %eh_else528 + %eh_typeid547 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a015 to i8*) ) ; <i32> [#uses=1] + %tmp549 = icmp eq i32 %eh_selector.12734.1, %eh_typeid547 ; <i1> [#uses=1] + br i1 %tmp549, label %eh_then550, label %eh_else564 + +eh_then550: ; preds = %eh_else546 + %tmp553 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else564: ; preds = %eh_else546 + %eh_typeid565 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a016 to i8*) ) ; <i32> [#uses=1] + %tmp567 = icmp eq i32 %eh_selector.12734.1, %eh_typeid565 ; <i1> [#uses=1] + br i1 %tmp567, label %eh_then568, label %eh_else582 + +eh_then568: ; preds = %eh_else564 + %tmp571 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else582: ; preds = %eh_else564 + %eh_typeid583 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a017 to i8*) ) ; <i32> [#uses=1] + %tmp585 = icmp eq i32 %eh_selector.12734.1, %eh_typeid583 ; <i1> [#uses=1] + br i1 %tmp585, label %eh_then586, label %eh_else600 + +eh_then586: ; preds = %eh_else582 + %tmp589 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else600: ; preds = %eh_else582 + %eh_typeid601 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a018 to i8*) ) ; <i32> [#uses=1] + %tmp603 = icmp eq i32 %eh_selector.12734.1, %eh_typeid601 ; <i1> [#uses=1] + br i1 %tmp603, label %eh_then604, label %eh_else618 + +eh_then604: ; preds = %eh_else600 + %tmp607 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else618: ; preds = %eh_else600 + %eh_typeid619 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a019 to i8*) ) ; <i32> [#uses=1] + %tmp621 = icmp eq i32 %eh_selector.12734.1, %eh_typeid619 ; <i1> [#uses=1] + br i1 %tmp621, label %eh_then622, label %eh_else636 + +eh_then622: ; preds = %eh_else618 + %tmp625 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else636: ; preds = %eh_else618 + %eh_typeid637 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a020 to i8*) ) ; <i32> [#uses=1] + %tmp639 = icmp eq i32 %eh_selector.12734.1, %eh_typeid637 ; <i1> [#uses=1] + br i1 %tmp639, label %eh_then640, label %eh_else654 + +eh_then640: ; preds = %eh_else636 + %tmp643 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else654: ; preds = %eh_else636 + %eh_typeid655 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a021 to i8*) ) ; <i32> [#uses=1] + %tmp657 = icmp eq i32 %eh_selector.12734.1, %eh_typeid655 ; <i1> [#uses=1] + br i1 %tmp657, label %eh_then658, label %eh_else672 + +eh_then658: ; preds = %eh_else654 + %tmp661 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else672: ; preds = %eh_else654 + %eh_typeid673 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a022 to i8*) ) ; <i32> [#uses=1] + %tmp675 = icmp eq i32 %eh_selector.12734.1, %eh_typeid673 ; <i1> [#uses=1] + br i1 %tmp675, label %eh_then676, label %eh_else690 + +eh_then676: ; preds = %eh_else672 + %tmp679 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else690: ; preds = %eh_else672 + %eh_typeid691 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a023 to i8*) ) ; <i32> [#uses=1] + %tmp693 = icmp eq i32 %eh_selector.12734.1, %eh_typeid691 ; <i1> [#uses=1] + br i1 %tmp693, label %eh_then694, label %eh_else708 + +eh_then694: ; preds = %eh_else690 + %tmp697 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else708: ; preds = %eh_else690 + %eh_typeid709 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a024 to i8*) ) ; <i32> [#uses=1] + %tmp711 = icmp eq i32 %eh_selector.12734.1, %eh_typeid709 ; <i1> [#uses=1] + br i1 %tmp711, label %eh_then712, label %eh_else726 + +eh_then712: ; preds = %eh_else708 + %tmp715 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else726: ; preds = %eh_else708 + %eh_typeid727 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a025 to i8*) ) ; <i32> [#uses=1] + %tmp729 = icmp eq i32 %eh_selector.12734.1, %eh_typeid727 ; <i1> [#uses=1] + br i1 %tmp729, label %eh_then730, label %eh_else744 + +eh_then730: ; preds = %eh_else726 + %tmp733 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else744: ; preds = %eh_else726 + %eh_typeid745 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a026 to i8*) ) ; <i32> [#uses=1] + %tmp747 = icmp eq i32 %eh_selector.12734.1, %eh_typeid745 ; <i1> [#uses=1] + br i1 %tmp747, label %eh_then748, label %eh_else762 + +eh_then748: ; preds = %eh_else744 + %tmp751 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else762: ; preds = %eh_else744 + %eh_typeid763 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a027 to i8*) ) ; <i32> [#uses=1] + %tmp765 = icmp eq i32 %eh_selector.12734.1, %eh_typeid763 ; <i1> [#uses=1] + br i1 %tmp765, label %eh_then766, label %eh_else780 + +eh_then766: ; preds = %eh_else762 + %tmp769 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else780: ; preds = %eh_else762 + %eh_typeid781 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a028 to i8*) ) ; <i32> [#uses=1] + %tmp783 = icmp eq i32 %eh_selector.12734.1, %eh_typeid781 ; <i1> [#uses=1] + br i1 %tmp783, label %eh_then784, label %eh_else798 + +eh_then784: ; preds = %eh_else780 + %tmp787 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else798: ; preds = %eh_else780 + %eh_typeid799 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a029 to i8*) ) ; <i32> [#uses=1] + %tmp801 = icmp eq i32 %eh_selector.12734.1, %eh_typeid799 ; <i1> [#uses=1] + br i1 %tmp801, label %eh_then802, label %eh_else816 + +eh_then802: ; preds = %eh_else798 + %tmp805 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else816: ; preds = %eh_else798 + %eh_typeid817 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a030 to i8*) ) ; <i32> [#uses=1] + %tmp819 = icmp eq i32 %eh_selector.12734.1, %eh_typeid817 ; <i1> [#uses=1] + br i1 %tmp819, label %eh_then820, label %eh_else834 + +eh_then820: ; preds = %eh_else816 + %tmp823 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else834: ; preds = %eh_else816 + %eh_typeid835 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a031 to i8*) ) ; <i32> [#uses=1] + %tmp837 = icmp eq i32 %eh_selector.12734.1, %eh_typeid835 ; <i1> [#uses=1] + br i1 %tmp837, label %eh_then838, label %eh_else852 + +eh_then838: ; preds = %eh_else834 + %tmp841 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else852: ; preds = %eh_else834 + %eh_typeid853 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a032 to i8*) ) ; <i32> [#uses=1] + %tmp855 = icmp eq i32 %eh_selector.12734.1, %eh_typeid853 ; <i1> [#uses=1] + br i1 %tmp855, label %eh_then856, label %eh_else870 + +eh_then856: ; preds = %eh_else852 + %tmp859 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else870: ; preds = %eh_else852 + %eh_typeid871 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a033 to i8*) ) ; <i32> [#uses=1] + %tmp873 = icmp eq i32 %eh_selector.12734.1, %eh_typeid871 ; <i1> [#uses=1] + br i1 %tmp873, label %eh_then874, label %eh_else888 + +eh_then874: ; preds = %eh_else870 + %tmp877 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else888: ; preds = %eh_else870 + %eh_typeid889 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a034 to i8*) ) ; <i32> [#uses=1] + %tmp891 = icmp eq i32 %eh_selector.12734.1, %eh_typeid889 ; <i1> [#uses=1] + br i1 %tmp891, label %eh_then892, label %eh_else906 + +eh_then892: ; preds = %eh_else888 + %tmp895 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else906: ; preds = %eh_else888 + %eh_typeid907 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a035 to i8*) ) ; <i32> [#uses=1] + %tmp909 = icmp eq i32 %eh_selector.12734.1, %eh_typeid907 ; <i1> [#uses=1] + br i1 %tmp909, label %eh_then910, label %eh_else924 + +eh_then910: ; preds = %eh_else906 + %tmp913 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else924: ; preds = %eh_else906 + %eh_typeid925 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a036 to i8*) ) ; <i32> [#uses=1] + %tmp927 = icmp eq i32 %eh_selector.12734.1, %eh_typeid925 ; <i1> [#uses=1] + br i1 %tmp927, label %eh_then928, label %eh_else942 + +eh_then928: ; preds = %eh_else924 + %tmp931 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else942: ; preds = %eh_else924 + %eh_typeid943 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a037 to i8*) ) ; <i32> [#uses=1] + %tmp945 = icmp eq i32 %eh_selector.12734.1, %eh_typeid943 ; <i1> [#uses=1] + br i1 %tmp945, label %eh_then946, label %eh_else960 + +eh_then946: ; preds = %eh_else942 + %tmp949 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else960: ; preds = %eh_else942 + %eh_typeid961 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a038 to i8*) ) ; <i32> [#uses=1] + %tmp963 = icmp eq i32 %eh_selector.12734.1, %eh_typeid961 ; <i1> [#uses=1] + br i1 %tmp963, label %eh_then964, label %eh_else978 + +eh_then964: ; preds = %eh_else960 + %tmp967 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else978: ; preds = %eh_else960 + %eh_typeid979 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a039 to i8*) ) ; <i32> [#uses=1] + %tmp981 = icmp eq i32 %eh_selector.12734.1, %eh_typeid979 ; <i1> [#uses=1] + br i1 %tmp981, label %eh_then982, label %eh_else996 + +eh_then982: ; preds = %eh_else978 + %tmp985 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else996: ; preds = %eh_else978 + %eh_typeid997 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a040 to i8*) ) ; <i32> [#uses=1] + %tmp999 = icmp eq i32 %eh_selector.12734.1, %eh_typeid997 ; <i1> [#uses=1] + br i1 %tmp999, label %eh_then1000, label %eh_else1014 + +eh_then1000: ; preds = %eh_else996 + %tmp1003 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1014: ; preds = %eh_else996 + %eh_typeid1015 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a041 to i8*) ) ; <i32> [#uses=1] + %tmp1017 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1015 ; <i1> [#uses=1] + br i1 %tmp1017, label %eh_then1018, label %eh_else1032 + +eh_then1018: ; preds = %eh_else1014 + %tmp1021 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1032: ; preds = %eh_else1014 + %eh_typeid1033 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a042 to i8*) ) ; <i32> [#uses=1] + %tmp1035 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1033 ; <i1> [#uses=1] + br i1 %tmp1035, label %eh_then1036, label %eh_else1050 + +eh_then1036: ; preds = %eh_else1032 + %tmp1039 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1050: ; preds = %eh_else1032 + %eh_typeid1051 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a043 to i8*) ) ; <i32> [#uses=1] + %tmp1053 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1051 ; <i1> [#uses=1] + br i1 %tmp1053, label %eh_then1054, label %eh_else1068 + +eh_then1054: ; preds = %eh_else1050 + %tmp1057 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1068: ; preds = %eh_else1050 + %eh_typeid1069 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a044 to i8*) ) ; <i32> [#uses=1] + %tmp1071 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1069 ; <i1> [#uses=1] + br i1 %tmp1071, label %eh_then1072, label %eh_else1086 + +eh_then1072: ; preds = %eh_else1068 + %tmp1075 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1086: ; preds = %eh_else1068 + %eh_typeid1087 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a045 to i8*) ) ; <i32> [#uses=1] + %tmp1089 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1087 ; <i1> [#uses=1] + br i1 %tmp1089, label %eh_then1090, label %eh_else1104 + +eh_then1090: ; preds = %eh_else1086 + %tmp1093 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1104: ; preds = %eh_else1086 + %eh_typeid1105 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a046 to i8*) ) ; <i32> [#uses=1] + %tmp1107 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1105 ; <i1> [#uses=1] + br i1 %tmp1107, label %eh_then1108, label %eh_else1122 + +eh_then1108: ; preds = %eh_else1104 + %tmp1111 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1122: ; preds = %eh_else1104 + %eh_typeid1123 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a047 to i8*) ) ; <i32> [#uses=1] + %tmp1125 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1123 ; <i1> [#uses=1] + br i1 %tmp1125, label %eh_then1126, label %eh_else1140 + +eh_then1126: ; preds = %eh_else1122 + %tmp1129 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1140: ; preds = %eh_else1122 + %eh_typeid1141 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a048 to i8*) ) ; <i32> [#uses=1] + %tmp1143 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1141 ; <i1> [#uses=1] + br i1 %tmp1143, label %eh_then1144, label %eh_else1158 + +eh_then1144: ; preds = %eh_else1140 + %tmp1147 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1158: ; preds = %eh_else1140 + %eh_typeid1159 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a049 to i8*) ) ; <i32> [#uses=1] + %tmp1161 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1159 ; <i1> [#uses=1] + br i1 %tmp1161, label %eh_then1162, label %eh_else1176 + +eh_then1162: ; preds = %eh_else1158 + %tmp1165 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1176: ; preds = %eh_else1158 + %eh_typeid1177 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a050 to i8*) ) ; <i32> [#uses=1] + %tmp1179 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1177 ; <i1> [#uses=1] + br i1 %tmp1179, label %eh_then1180, label %eh_else1194 + +eh_then1180: ; preds = %eh_else1176 + %tmp1183 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1194: ; preds = %eh_else1176 + %eh_typeid1195 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a051 to i8*) ) ; <i32> [#uses=1] + %tmp1197 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1195 ; <i1> [#uses=1] + br i1 %tmp1197, label %eh_then1198, label %eh_else1212 + +eh_then1198: ; preds = %eh_else1194 + %tmp1201 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1212: ; preds = %eh_else1194 + %eh_typeid1213 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a052 to i8*) ) ; <i32> [#uses=1] + %tmp1215 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1213 ; <i1> [#uses=1] + br i1 %tmp1215, label %eh_then1216, label %eh_else1230 + +eh_then1216: ; preds = %eh_else1212 + %tmp1219 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1230: ; preds = %eh_else1212 + %eh_typeid1231 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a053 to i8*) ) ; <i32> [#uses=1] + %tmp1233 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1231 ; <i1> [#uses=1] + br i1 %tmp1233, label %eh_then1234, label %eh_else1248 + +eh_then1234: ; preds = %eh_else1230 + %tmp1237 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1248: ; preds = %eh_else1230 + %eh_typeid1249 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a054 to i8*) ) ; <i32> [#uses=1] + %tmp1251 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1249 ; <i1> [#uses=1] + br i1 %tmp1251, label %eh_then1252, label %eh_else1266 + +eh_then1252: ; preds = %eh_else1248 + %tmp1255 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1266: ; preds = %eh_else1248 + %eh_typeid1267 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a055 to i8*) ) ; <i32> [#uses=1] + %tmp1269 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1267 ; <i1> [#uses=1] + br i1 %tmp1269, label %eh_then1270, label %eh_else1284 + +eh_then1270: ; preds = %eh_else1266 + %tmp1273 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1284: ; preds = %eh_else1266 + %eh_typeid1285 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a056 to i8*) ) ; <i32> [#uses=1] + %tmp1287 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1285 ; <i1> [#uses=1] + br i1 %tmp1287, label %eh_then1288, label %eh_else1302 + +eh_then1288: ; preds = %eh_else1284 + %tmp1291 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1302: ; preds = %eh_else1284 + %eh_typeid1303 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a057 to i8*) ) ; <i32> [#uses=1] + %tmp1305 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1303 ; <i1> [#uses=1] + br i1 %tmp1305, label %eh_then1306, label %eh_else1320 + +eh_then1306: ; preds = %eh_else1302 + %tmp1309 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1320: ; preds = %eh_else1302 + %eh_typeid1321 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a058 to i8*) ) ; <i32> [#uses=1] + %tmp1323 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1321 ; <i1> [#uses=1] + br i1 %tmp1323, label %eh_then1324, label %eh_else1338 + +eh_then1324: ; preds = %eh_else1320 + %tmp1327 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1338: ; preds = %eh_else1320 + %eh_typeid1339 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a059 to i8*) ) ; <i32> [#uses=1] + %tmp1341 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1339 ; <i1> [#uses=1] + br i1 %tmp1341, label %eh_then1342, label %eh_else1356 + +eh_then1342: ; preds = %eh_else1338 + %tmp1345 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1356: ; preds = %eh_else1338 + %eh_typeid1357 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a060 to i8*) ) ; <i32> [#uses=1] + %tmp1359 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1357 ; <i1> [#uses=1] + br i1 %tmp1359, label %eh_then1360, label %eh_else1374 + +eh_then1360: ; preds = %eh_else1356 + %tmp1363 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1374: ; preds = %eh_else1356 + %eh_typeid1375 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a061 to i8*) ) ; <i32> [#uses=1] + %tmp1377 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1375 ; <i1> [#uses=1] + br i1 %tmp1377, label %eh_then1378, label %eh_else1392 + +eh_then1378: ; preds = %eh_else1374 + %tmp1381 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1392: ; preds = %eh_else1374 + %eh_typeid1393 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a062 to i8*) ) ; <i32> [#uses=1] + %tmp1395 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1393 ; <i1> [#uses=1] + br i1 %tmp1395, label %eh_then1396, label %eh_else1410 + +eh_then1396: ; preds = %eh_else1392 + %tmp1399 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1410: ; preds = %eh_else1392 + %eh_typeid1411 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a063 to i8*) ) ; <i32> [#uses=1] + %tmp1413 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1411 ; <i1> [#uses=1] + br i1 %tmp1413, label %eh_then1414, label %eh_else1428 + +eh_then1414: ; preds = %eh_else1410 + %tmp1417 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1428: ; preds = %eh_else1410 + %eh_typeid1429 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a064 to i8*) ) ; <i32> [#uses=1] + %tmp1431 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1429 ; <i1> [#uses=1] + br i1 %tmp1431, label %eh_then1432, label %eh_else1446 + +eh_then1432: ; preds = %eh_else1428 + %tmp1435 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1446: ; preds = %eh_else1428 + %eh_typeid1447 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a065 to i8*) ) ; <i32> [#uses=1] + %tmp1449 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1447 ; <i1> [#uses=1] + br i1 %tmp1449, label %eh_then1450, label %eh_else1464 + +eh_then1450: ; preds = %eh_else1446 + %tmp1453 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1464: ; preds = %eh_else1446 + %eh_typeid1465 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a066 to i8*) ) ; <i32> [#uses=1] + %tmp1467 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1465 ; <i1> [#uses=1] + br i1 %tmp1467, label %eh_then1468, label %eh_else1482 + +eh_then1468: ; preds = %eh_else1464 + %tmp1471 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1482: ; preds = %eh_else1464 + %eh_typeid1483 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a067 to i8*) ) ; <i32> [#uses=1] + %tmp1485 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1483 ; <i1> [#uses=1] + br i1 %tmp1485, label %eh_then1486, label %eh_else1500 + +eh_then1486: ; preds = %eh_else1482 + %tmp1489 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1500: ; preds = %eh_else1482 + %eh_typeid1501 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a068 to i8*) ) ; <i32> [#uses=1] + %tmp1503 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1501 ; <i1> [#uses=1] + br i1 %tmp1503, label %eh_then1504, label %eh_else1518 + +eh_then1504: ; preds = %eh_else1500 + %tmp1507 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1518: ; preds = %eh_else1500 + %eh_typeid1519 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a069 to i8*) ) ; <i32> [#uses=1] + %tmp1521 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1519 ; <i1> [#uses=1] + br i1 %tmp1521, label %eh_then1522, label %eh_else1536 + +eh_then1522: ; preds = %eh_else1518 + %tmp1525 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1536: ; preds = %eh_else1518 + %eh_typeid1537 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a070 to i8*) ) ; <i32> [#uses=1] + %tmp1539 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1537 ; <i1> [#uses=1] + br i1 %tmp1539, label %eh_then1540, label %eh_else1554 + +eh_then1540: ; preds = %eh_else1536 + %tmp1543 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1554: ; preds = %eh_else1536 + %eh_typeid1555 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a071 to i8*) ) ; <i32> [#uses=1] + %tmp1557 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1555 ; <i1> [#uses=1] + br i1 %tmp1557, label %eh_then1558, label %eh_else1572 + +eh_then1558: ; preds = %eh_else1554 + %tmp1561 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1572: ; preds = %eh_else1554 + %eh_typeid1573 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a072 to i8*) ) ; <i32> [#uses=1] + %tmp1575 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1573 ; <i1> [#uses=1] + br i1 %tmp1575, label %eh_then1576, label %eh_else1590 + +eh_then1576: ; preds = %eh_else1572 + %tmp1579 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1590: ; preds = %eh_else1572 + %eh_typeid1591 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a073 to i8*) ) ; <i32> [#uses=1] + %tmp1593 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1591 ; <i1> [#uses=1] + br i1 %tmp1593, label %eh_then1594, label %eh_else1608 + +eh_then1594: ; preds = %eh_else1590 + %tmp1597 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1608: ; preds = %eh_else1590 + %eh_typeid1609 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a074 to i8*) ) ; <i32> [#uses=1] + %tmp1611 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1609 ; <i1> [#uses=1] + br i1 %tmp1611, label %eh_then1612, label %eh_else1626 + +eh_then1612: ; preds = %eh_else1608 + %tmp1615 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1626: ; preds = %eh_else1608 + %eh_typeid1627 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a075 to i8*) ) ; <i32> [#uses=1] + %tmp1629 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1627 ; <i1> [#uses=1] + br i1 %tmp1629, label %eh_then1630, label %eh_else1644 + +eh_then1630: ; preds = %eh_else1626 + %tmp1633 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1644: ; preds = %eh_else1626 + %eh_typeid1645 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a076 to i8*) ) ; <i32> [#uses=1] + %tmp1647 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1645 ; <i1> [#uses=1] + br i1 %tmp1647, label %eh_then1648, label %eh_else1662 + +eh_then1648: ; preds = %eh_else1644 + %tmp1651 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1662: ; preds = %eh_else1644 + %eh_typeid1663 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a077 to i8*) ) ; <i32> [#uses=1] + %tmp1665 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1663 ; <i1> [#uses=1] + br i1 %tmp1665, label %eh_then1666, label %eh_else1680 + +eh_then1666: ; preds = %eh_else1662 + %tmp1669 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1680: ; preds = %eh_else1662 + %eh_typeid1681 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a078 to i8*) ) ; <i32> [#uses=1] + %tmp1683 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1681 ; <i1> [#uses=1] + br i1 %tmp1683, label %eh_then1684, label %eh_else1698 + +eh_then1684: ; preds = %eh_else1680 + %tmp1687 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1698: ; preds = %eh_else1680 + %eh_typeid1699 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a079 to i8*) ) ; <i32> [#uses=1] + %tmp1701 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1699 ; <i1> [#uses=1] + br i1 %tmp1701, label %eh_then1702, label %eh_else1716 + +eh_then1702: ; preds = %eh_else1698 + %tmp1705 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1716: ; preds = %eh_else1698 + %eh_typeid1717 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a080 to i8*) ) ; <i32> [#uses=1] + %tmp1719 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1717 ; <i1> [#uses=1] + br i1 %tmp1719, label %eh_then1720, label %eh_else1734 + +eh_then1720: ; preds = %eh_else1716 + %tmp1723 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1734: ; preds = %eh_else1716 + %eh_typeid1735 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a081 to i8*) ) ; <i32> [#uses=1] + %tmp1737 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1735 ; <i1> [#uses=1] + br i1 %tmp1737, label %eh_then1738, label %eh_else1752 + +eh_then1738: ; preds = %eh_else1734 + %tmp1741 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1752: ; preds = %eh_else1734 + %eh_typeid1753 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a082 to i8*) ) ; <i32> [#uses=1] + %tmp1755 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1753 ; <i1> [#uses=1] + br i1 %tmp1755, label %eh_then1756, label %eh_else1770 + +eh_then1756: ; preds = %eh_else1752 + %tmp1759 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1770: ; preds = %eh_else1752 + %eh_typeid1771 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a083 to i8*) ) ; <i32> [#uses=1] + %tmp1773 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1771 ; <i1> [#uses=1] + br i1 %tmp1773, label %eh_then1774, label %eh_else1788 + +eh_then1774: ; preds = %eh_else1770 + %tmp1777 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1788: ; preds = %eh_else1770 + %eh_typeid1789 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a084 to i8*) ) ; <i32> [#uses=1] + %tmp1791 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1789 ; <i1> [#uses=1] + br i1 %tmp1791, label %eh_then1792, label %eh_else1806 + +eh_then1792: ; preds = %eh_else1788 + %tmp1795 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1806: ; preds = %eh_else1788 + %eh_typeid1807 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a085 to i8*) ) ; <i32> [#uses=1] + %tmp1809 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1807 ; <i1> [#uses=1] + br i1 %tmp1809, label %eh_then1810, label %eh_else1824 + +eh_then1810: ; preds = %eh_else1806 + %tmp1813 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1824: ; preds = %eh_else1806 + %eh_typeid1825 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a086 to i8*) ) ; <i32> [#uses=1] + %tmp1827 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1825 ; <i1> [#uses=1] + br i1 %tmp1827, label %eh_then1828, label %eh_else1842 + +eh_then1828: ; preds = %eh_else1824 + %tmp1831 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1842: ; preds = %eh_else1824 + %eh_typeid1843 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a087 to i8*) ) ; <i32> [#uses=1] + %tmp1845 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1843 ; <i1> [#uses=1] + br i1 %tmp1845, label %eh_then1846, label %eh_else1860 + +eh_then1846: ; preds = %eh_else1842 + %tmp1849 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1860: ; preds = %eh_else1842 + %eh_typeid1861 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a088 to i8*) ) ; <i32> [#uses=1] + %tmp1863 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1861 ; <i1> [#uses=1] + br i1 %tmp1863, label %eh_then1864, label %eh_else1878 + +eh_then1864: ; preds = %eh_else1860 + %tmp1867 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1878: ; preds = %eh_else1860 + %eh_typeid1879 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a089 to i8*) ) ; <i32> [#uses=1] + %tmp1881 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1879 ; <i1> [#uses=1] + br i1 %tmp1881, label %eh_then1882, label %eh_else1896 + +eh_then1882: ; preds = %eh_else1878 + %tmp1885 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1896: ; preds = %eh_else1878 + %eh_typeid1897 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a090 to i8*) ) ; <i32> [#uses=1] + %tmp1899 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1897 ; <i1> [#uses=1] + br i1 %tmp1899, label %eh_then1900, label %eh_else1914 + +eh_then1900: ; preds = %eh_else1896 + %tmp1903 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1914: ; preds = %eh_else1896 + %eh_typeid1915 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a091 to i8*) ) ; <i32> [#uses=1] + %tmp1917 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1915 ; <i1> [#uses=1] + br i1 %tmp1917, label %eh_then1918, label %eh_else1932 + +eh_then1918: ; preds = %eh_else1914 + %tmp1921 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1932: ; preds = %eh_else1914 + %eh_typeid1933 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a092 to i8*) ) ; <i32> [#uses=1] + %tmp1935 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1933 ; <i1> [#uses=1] + br i1 %tmp1935, label %eh_then1936, label %eh_else1950 + +eh_then1936: ; preds = %eh_else1932 + %tmp1939 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1950: ; preds = %eh_else1932 + %eh_typeid1951 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a093 to i8*) ) ; <i32> [#uses=1] + %tmp1953 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1951 ; <i1> [#uses=1] + br i1 %tmp1953, label %eh_then1954, label %eh_else1968 + +eh_then1954: ; preds = %eh_else1950 + %tmp1957 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1968: ; preds = %eh_else1950 + %eh_typeid1969 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a094 to i8*) ) ; <i32> [#uses=1] + %tmp1971 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1969 ; <i1> [#uses=1] + br i1 %tmp1971, label %eh_then1972, label %eh_else1986 + +eh_then1972: ; preds = %eh_else1968 + %tmp1975 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else1986: ; preds = %eh_else1968 + %eh_typeid1987 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a095 to i8*) ) ; <i32> [#uses=1] + %tmp1989 = icmp eq i32 %eh_selector.12734.1, %eh_typeid1987 ; <i1> [#uses=1] + br i1 %tmp1989, label %eh_then1990, label %eh_else2004 + +eh_then1990: ; preds = %eh_else1986 + %tmp1993 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2004: ; preds = %eh_else1986 + %eh_typeid2005 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a096 to i8*) ) ; <i32> [#uses=1] + %tmp2007 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2005 ; <i1> [#uses=1] + br i1 %tmp2007, label %eh_then2008, label %eh_else2022 + +eh_then2008: ; preds = %eh_else2004 + %tmp2011 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2022: ; preds = %eh_else2004 + %eh_typeid2023 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a097 to i8*) ) ; <i32> [#uses=1] + %tmp2025 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2023 ; <i1> [#uses=1] + br i1 %tmp2025, label %eh_then2026, label %eh_else2040 + +eh_then2026: ; preds = %eh_else2022 + %tmp2029 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2040: ; preds = %eh_else2022 + %eh_typeid2041 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a098 to i8*) ) ; <i32> [#uses=1] + %tmp2043 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2041 ; <i1> [#uses=1] + br i1 %tmp2043, label %eh_then2044, label %eh_else2058 + +eh_then2044: ; preds = %eh_else2040 + %tmp2047 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2058: ; preds = %eh_else2040 + %eh_typeid2059 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a099 to i8*) ) ; <i32> [#uses=1] + %tmp2061 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2059 ; <i1> [#uses=1] + br i1 %tmp2061, label %eh_then2062, label %eh_else2076 + +eh_then2062: ; preds = %eh_else2058 + %tmp2065 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2076: ; preds = %eh_else2058 + %eh_typeid2077 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a100 to i8*) ) ; <i32> [#uses=1] + %tmp2079 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2077 ; <i1> [#uses=1] + br i1 %tmp2079, label %eh_then2080, label %eh_else2094 + +eh_then2080: ; preds = %eh_else2076 + %tmp2083 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2094: ; preds = %eh_else2076 + %eh_typeid2095 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a101 to i8*) ) ; <i32> [#uses=1] + %tmp2097 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2095 ; <i1> [#uses=1] + br i1 %tmp2097, label %eh_then2098, label %eh_else2112 + +eh_then2098: ; preds = %eh_else2094 + %tmp2101 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2112: ; preds = %eh_else2094 + %eh_typeid2113 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a102 to i8*) ) ; <i32> [#uses=1] + %tmp2115 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2113 ; <i1> [#uses=1] + br i1 %tmp2115, label %eh_then2116, label %eh_else2130 + +eh_then2116: ; preds = %eh_else2112 + %tmp2119 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2130: ; preds = %eh_else2112 + %eh_typeid2131 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a103 to i8*) ) ; <i32> [#uses=1] + %tmp2133 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2131 ; <i1> [#uses=1] + br i1 %tmp2133, label %eh_then2134, label %eh_else2148 + +eh_then2134: ; preds = %eh_else2130 + %tmp2137 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2148: ; preds = %eh_else2130 + %eh_typeid2149 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a104 to i8*) ) ; <i32> [#uses=1] + %tmp2151 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2149 ; <i1> [#uses=1] + br i1 %tmp2151, label %eh_then2152, label %eh_else2166 + +eh_then2152: ; preds = %eh_else2148 + %tmp2155 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2166: ; preds = %eh_else2148 + %eh_typeid2167 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a105 to i8*) ) ; <i32> [#uses=1] + %tmp2169 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2167 ; <i1> [#uses=1] + br i1 %tmp2169, label %eh_then2170, label %eh_else2184 + +eh_then2170: ; preds = %eh_else2166 + %tmp2173 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2184: ; preds = %eh_else2166 + %eh_typeid2185 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a106 to i8*) ) ; <i32> [#uses=1] + %tmp2187 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2185 ; <i1> [#uses=1] + br i1 %tmp2187, label %eh_then2188, label %eh_else2202 + +eh_then2188: ; preds = %eh_else2184 + %tmp2191 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2202: ; preds = %eh_else2184 + %eh_typeid2203 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a107 to i8*) ) ; <i32> [#uses=1] + %tmp2205 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2203 ; <i1> [#uses=1] + br i1 %tmp2205, label %eh_then2206, label %eh_else2220 + +eh_then2206: ; preds = %eh_else2202 + %tmp2209 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2220: ; preds = %eh_else2202 + %eh_typeid2221 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a108 to i8*) ) ; <i32> [#uses=1] + %tmp2223 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2221 ; <i1> [#uses=1] + br i1 %tmp2223, label %eh_then2224, label %eh_else2238 + +eh_then2224: ; preds = %eh_else2220 + %tmp2227 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2238: ; preds = %eh_else2220 + %eh_typeid2239 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a109 to i8*) ) ; <i32> [#uses=1] + %tmp2241 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2239 ; <i1> [#uses=1] + br i1 %tmp2241, label %eh_then2242, label %eh_else2256 + +eh_then2242: ; preds = %eh_else2238 + %tmp2245 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2256: ; preds = %eh_else2238 + %eh_typeid2257 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a110 to i8*) ) ; <i32> [#uses=1] + %tmp2259 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2257 ; <i1> [#uses=1] + br i1 %tmp2259, label %eh_then2260, label %eh_else2274 + +eh_then2260: ; preds = %eh_else2256 + %tmp2263 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2274: ; preds = %eh_else2256 + %eh_typeid2275 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a111 to i8*) ) ; <i32> [#uses=1] + %tmp2277 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2275 ; <i1> [#uses=1] + br i1 %tmp2277, label %eh_then2278, label %eh_else2292 + +eh_then2278: ; preds = %eh_else2274 + %tmp2281 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2292: ; preds = %eh_else2274 + %eh_typeid2293 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a112 to i8*) ) ; <i32> [#uses=1] + %tmp2295 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2293 ; <i1> [#uses=1] + br i1 %tmp2295, label %eh_then2296, label %eh_else2310 + +eh_then2296: ; preds = %eh_else2292 + %tmp2299 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2310: ; preds = %eh_else2292 + %eh_typeid2311 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a113 to i8*) ) ; <i32> [#uses=1] + %tmp2313 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2311 ; <i1> [#uses=1] + br i1 %tmp2313, label %eh_then2314, label %eh_else2328 + +eh_then2314: ; preds = %eh_else2310 + %tmp2317 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2328: ; preds = %eh_else2310 + %eh_typeid2329 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a114 to i8*) ) ; <i32> [#uses=1] + %tmp2331 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2329 ; <i1> [#uses=1] + br i1 %tmp2331, label %eh_then2332, label %eh_else2346 + +eh_then2332: ; preds = %eh_else2328 + %tmp2335 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2346: ; preds = %eh_else2328 + %eh_typeid2347 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a115 to i8*) ) ; <i32> [#uses=1] + %tmp2349 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2347 ; <i1> [#uses=1] + br i1 %tmp2349, label %eh_then2350, label %eh_else2364 + +eh_then2350: ; preds = %eh_else2346 + %tmp2353 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2364: ; preds = %eh_else2346 + %eh_typeid2365 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a116 to i8*) ) ; <i32> [#uses=1] + %tmp2367 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2365 ; <i1> [#uses=1] + br i1 %tmp2367, label %eh_then2368, label %eh_else2382 + +eh_then2368: ; preds = %eh_else2364 + %tmp2371 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2382: ; preds = %eh_else2364 + %eh_typeid2383 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a117 to i8*) ) ; <i32> [#uses=1] + %tmp2385 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2383 ; <i1> [#uses=1] + br i1 %tmp2385, label %eh_then2386, label %eh_else2400 + +eh_then2386: ; preds = %eh_else2382 + %tmp2389 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2400: ; preds = %eh_else2382 + %eh_typeid2401 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a118 to i8*) ) ; <i32> [#uses=1] + %tmp2403 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2401 ; <i1> [#uses=1] + br i1 %tmp2403, label %eh_then2404, label %eh_else2418 + +eh_then2404: ; preds = %eh_else2400 + %tmp2407 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2418: ; preds = %eh_else2400 + %eh_typeid2419 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a119 to i8*) ) ; <i32> [#uses=1] + %tmp2421 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2419 ; <i1> [#uses=1] + br i1 %tmp2421, label %eh_then2422, label %eh_else2436 + +eh_then2422: ; preds = %eh_else2418 + %tmp2425 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2436: ; preds = %eh_else2418 + %eh_typeid2437 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a120 to i8*) ) ; <i32> [#uses=1] + %tmp2439 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2437 ; <i1> [#uses=1] + br i1 %tmp2439, label %eh_then2440, label %eh_else2454 + +eh_then2440: ; preds = %eh_else2436 + %tmp2443 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2454: ; preds = %eh_else2436 + %eh_typeid2455 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a121 to i8*) ) ; <i32> [#uses=1] + %tmp2457 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2455 ; <i1> [#uses=1] + br i1 %tmp2457, label %eh_then2458, label %eh_else2472 + +eh_then2458: ; preds = %eh_else2454 + %tmp2461 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2472: ; preds = %eh_else2454 + %eh_typeid2473 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a122 to i8*) ) ; <i32> [#uses=1] + %tmp2475 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2473 ; <i1> [#uses=1] + br i1 %tmp2475, label %eh_then2476, label %eh_else2490 + +eh_then2476: ; preds = %eh_else2472 + %tmp2479 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2490: ; preds = %eh_else2472 + %eh_typeid2491 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a123 to i8*) ) ; <i32> [#uses=1] + %tmp2493 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2491 ; <i1> [#uses=1] + br i1 %tmp2493, label %eh_then2494, label %eh_else2508 + +eh_then2494: ; preds = %eh_else2490 + %tmp2497 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2508: ; preds = %eh_else2490 + %eh_typeid2509 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a124 to i8*) ) ; <i32> [#uses=1] + %tmp2511 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2509 ; <i1> [#uses=1] + br i1 %tmp2511, label %eh_then2512, label %eh_else2526 + +eh_then2512: ; preds = %eh_else2508 + %tmp2515 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2526: ; preds = %eh_else2508 + %eh_typeid2527 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a125 to i8*) ) ; <i32> [#uses=1] + %tmp2529 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2527 ; <i1> [#uses=1] + br i1 %tmp2529, label %eh_then2530, label %eh_else2544 + +eh_then2530: ; preds = %eh_else2526 + %tmp2533 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2544: ; preds = %eh_else2526 + %eh_typeid2545 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a126 to i8*) ) ; <i32> [#uses=1] + %tmp2547 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2545 ; <i1> [#uses=1] + br i1 %tmp2547, label %eh_then2548, label %eh_else2562 + +eh_then2548: ; preds = %eh_else2544 + %tmp2551 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2562: ; preds = %eh_else2544 + %eh_typeid2563 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a127 to i8*) ) ; <i32> [#uses=1] + %tmp2565 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2563 ; <i1> [#uses=1] + br i1 %tmp2565, label %eh_then2566, label %eh_else2580 + +eh_then2566: ; preds = %eh_else2562 + %tmp2569 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +eh_else2580: ; preds = %eh_else2562 + %eh_typeid2581 = tail call i32 @llvm.eh.typeid.for( i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI4a128 to i8*) ) ; <i32> [#uses=1] + %tmp2583 = icmp eq i32 %eh_selector.12734.1, %eh_typeid2581 ; <i1> [#uses=1] + br i1 %tmp2583, label %eh_then2584, label %Unwind + +eh_then2584: ; preds = %eh_else2580 + %tmp2587 = tail call i8* @__cxa_begin_catch( i8* %eh_exception.12604.1 ) ; <i8*> [#uses=0] + tail call void @__cxa_end_catch( ) + ret void + +Unwind: ; preds = %eh_else2580 + tail call i32 (...)* @_Unwind_Resume( i8* %eh_exception.12604.1 ) ; <i32>:0 [#uses=0] + unreachable + +UnifiedUnreachableBlock1: ; preds = %filter270, %filter + unreachable + +UnifiedReturnBlock2: ; preds = %entry + ret void +} + +declare i8* @__cxa_begin_catch(i8*) + +declare void @__cxa_end_catch() diff --git a/test/CodeGen/Generic/BasicInstrs.llx b/test/CodeGen/Generic/BasicInstrs.llx new file mode 100644 index 0000000..8260609 --- /dev/null +++ b/test/CodeGen/Generic/BasicInstrs.llx @@ -0,0 +1,54 @@ +; New testcase, this contains a bunch of simple instructions that should be +; handled by a code generator. + +; RUN: llvm-upgrade < %s | llvm-as | llc + +int %add(int %A, int %B) { + %R = add int %A, %B + ret int %R +} + +int %sub(int %A, int %B) { + %R = sub int %A, %B + ret int %R +} + +int %mul(int %A, int %B) { + %R = mul int %A, %B + ret int %R +} + +int %sdiv(int %A, int %B) { + %R = div int %A, %B + ret int %R +} + +uint %udiv(uint %A, uint %B) { + %R = div uint %A, %B + ret uint %R +} + +int %srem(int %A, int %B) { + %R = rem int %A, %B + ret int %R +} + +uint %urem(uint %A, uint %B) { + %R = rem uint %A, %B + ret uint %R +} + +int %and(int %A, int %B) { + %R = and int %A, %B + ret int %R +} + +int %or(int %A, int %B) { + %R = or int %A, %B + ret int %R +} + +int %xor(int %A, int %B) { + %R = xor int %A, %B + ret int %R +} diff --git a/test/CodeGen/Generic/BurgBadRegAlloc.ll b/test/CodeGen/Generic/BurgBadRegAlloc.ll new file mode 100644 index 0000000..af74a81 --- /dev/null +++ b/test/CodeGen/Generic/BurgBadRegAlloc.ll @@ -0,0 +1,831 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +;; Register allocation is doing a very poor job on this routine from yyparse +;; in Burg: +;; -- at least two long-lived values are being allocated to %o? registers +;; -- even worse, those registers are being saved and restored repeatedly +;; at function calls, even though there are no intervening uses. +;; -- outgoing args of some function calls have to be swapped, causing +;; another write/read from stack to do the exchange (use -dregalloc=y). +;; + %Arity = type %struct.arity* + %Binding = type %struct.binding* + %DeltaCost = type [4 x short] + %Dimension = type %struct.dimension* + %Index_Map = type { int, %Item_Set* } + %IntList = type %struct.intlist* + %Item = type { %DeltaCost, %Rule } + %ItemArray = type %Item* + %Item_Set = type %struct.item_set* + %List = type %struct.list* + %Mapping = type %struct.mapping* + %NonTerminal = type %struct.nonterminal* + %Operator = type %struct.operator* + %Pattern = type %struct.pattern* + %PatternAST = type %struct.patternAST* + %Plank = type %struct.plank* + %PlankMap = type %struct.plankMap* + %ReadFn = type int ()* + %Rule = type %struct.rule* + %RuleAST = type %struct.ruleAST* + %StateMap = type %struct.stateMap* + %StrTableElement = type %struct.strTableElement* + %Symbol = type %struct.symbol* + %Table = type %struct.table* + %YYSTYPE = type { %IntList } + %struct.arity = type { int, %List } + %struct.binding = type { sbyte*, int } + %struct.dimension = type { short*, %Index_Map, %Mapping, int, %PlankMap } + %struct.index_map = type { int, %Item_Set* } + %struct.intlist = type { int, %IntList } + %struct.item = type { %DeltaCost, %Rule } + %struct.item_set = type { int, int, %Operator, [2 x %Item_Set], %Item_Set, short*, %ItemArray, %ItemArray } + %struct.list = type { sbyte*, %List } + %struct.mapping = type { %List*, int, int, int, %Item_Set* } + %struct.nonterminal = type { sbyte*, int, int, int, %PlankMap, %Rule } + %struct.operator = type { sbyte*, uint, int, int, int, int, %Table } + %struct.pattern = type { %NonTerminal, %Operator, [2 x %NonTerminal] } + %struct.patternAST = type { %Symbol, sbyte*, %List } + %struct.plank = type { sbyte*, %List, int } + %struct.plankMap = type { %List, int, %StateMap } + %struct.rule = type { %DeltaCost, int, int, int, %NonTerminal, %Pattern, uint } + %struct.ruleAST = type { sbyte*, %PatternAST, int, %IntList, %Rule, %StrTableElement, %StrTableElement } + %struct.stateMap = type { sbyte*, %Plank, int, short* } + %struct.strTableElement = type { sbyte*, %IntList, sbyte* } + %struct.symbol = type { sbyte*, int, { %Operator } } + %struct.table = type { %Operator, %List, short*, [2 x %Dimension], %Item_Set* } +%yylval = external global %YYSTYPE ; <%YYSTYPE*> [#uses=1] +%yylhs = external global [25 x short] ; <[25 x short]*> [#uses=1] +%yylen = external global [25 x short] ; <[25 x short]*> [#uses=1] +%yydefred = external global [43 x short] ; <[43 x short]*> [#uses=1] +%yydgoto = external global [12 x short] ; <[12 x short]*> [#uses=1] +%yysindex = external global [43 x short] ; <[43 x short]*> [#uses=2] +%yyrindex = external global [43 x short] ; <[43 x short]*> [#uses=1] +%yygindex = external global [12 x short] ; <[12 x short]*> [#uses=1] +%yytable = external global [263 x short] ; <[263 x short]*> [#uses=4] +%yycheck = external global [263 x short] ; <[263 x short]*> [#uses=4] +%yynerrs = external global int ; <int*> [#uses=3] +%yyerrflag = external global int ; <int*> [#uses=6] +%yychar = external global int ; <int*> [#uses=15] +%yyssp = external global short* ; <short**> [#uses=15] +%yyvsp = external global %YYSTYPE* ; <%YYSTYPE**> [#uses=30] +%yyval = external global %YYSTYPE ; <%YYSTYPE*> [#uses=1] +%yyss = external global short* ; <short**> [#uses=3] +%yysslim = external global short* ; <short**> [#uses=3] +%yyvs = external global %YYSTYPE* ; <%YYSTYPE**> [#uses=1] +%.LC01 = external global [13 x sbyte] ; <[13 x sbyte]*> [#uses=1] +%.LC1 = external global [20 x sbyte] ; <[20 x sbyte]*> [#uses=1] + +implementation ; Functions: + +int %yyparse() { +bb0: ; No predecessors! + store int 0, int* %yynerrs + store int 0, int* %yyerrflag + store int -1, int* %yychar + %reg113 = load short** %yyss ; <short*> [#uses=1] + %cond581 = setne short* %reg113, null ; <bool> [#uses=1] + br bool %cond581, label %bb3, label %bb2 + +bb2: ; preds = %bb0 + %reg584 = call int %yygrowstack( ) ; <int> [#uses=1] + %cond584 = setne int %reg584, 0 ; <bool> [#uses=1] + br bool %cond584, label %bb113, label %bb3 + +bb3: ; preds = %bb2, %bb0 + %reg115 = load short** %yyss ; <short*> [#uses=1] + store short* %reg115, short** %yyssp + %reg116 = load %YYSTYPE** %yyvs ; <%YYSTYPE*> [#uses=1] + store %YYSTYPE* %reg116, %YYSTYPE** %yyvsp + %reg117 = load short** %yyssp ; <short*> [#uses=1] + store short 0, short* %reg117 + br label %bb4 + +bb4: ; preds = %bb14, %bb15, %bb31, %bb35, %bb102, %bb112, %bb3 + %reg458 = phi uint [ %reg476, %bb112 ], [ 1, %bb102 ], [ %reg458, %bb35 ], [ %cast768, %bb31 ], [ %cast658, %bb15 ], [ %cast658, %bb14 ], [ 0, %bb3 ] ; <uint> [#uses=2] + %reg458-idxcast = cast uint %reg458 to long ; <long> [#uses=3] + %reg594 = getelementptr [43 x short]* %yydefred, long 0, long %reg458-idxcast ; <short*> [#uses=1] + %reg125 = load short* %reg594 ; <short> [#uses=1] + %cast599 = cast short %reg125 to int ; <int> [#uses=2] + %cond600 = setne int %cast599, 0 ; <bool> [#uses=1] + br bool %cond600, label %bb36, label %bb5 + +bb5: ; preds = %bb4 + %reg127 = load int* %yychar ; <int> [#uses=1] + %cond603 = setge int %reg127, 0 ; <bool> [#uses=1] + br bool %cond603, label %bb8, label %bb6 + +bb6: ; preds = %bb5 + %reg607 = call int %yylex( ) ; <int> [#uses=1] + store int %reg607, int* %yychar + %reg129 = load int* %yychar ; <int> [#uses=1] + %cond609 = setge int %reg129, 0 ; <bool> [#uses=1] + br bool %cond609, label %bb8, label %bb7 + +bb7: ; preds = %bb6 + store int 0, int* %yychar + br label %bb8 + +bb8: ; preds = %bb7, %bb6, %bb5 + %reg615 = getelementptr [43 x short]* %yysindex, long 0, long %reg458-idxcast ; <short*> [#uses=1] + %reg137 = load short* %reg615 ; <short> [#uses=1] + %cast620 = cast short %reg137 to int ; <int> [#uses=2] + %cond621 = seteq int %cast620, 0 ; <bool> [#uses=1] + br bool %cond621, label %bb16, label %bb9 + +bb9: ; preds = %bb8 + %reg139 = load int* %yychar ; <int> [#uses=2] + %reg460 = add int %cast620, %reg139 ; <int> [#uses=3] + %cond624 = setlt int %reg460, 0 ; <bool> [#uses=1] + br bool %cond624, label %bb16, label %bb10 + +bb10: ; preds = %bb9 + %cond627 = setgt int %reg460, 262 ; <bool> [#uses=1] + br bool %cond627, label %bb16, label %bb11 + +bb11: ; preds = %bb10 + %reg460-idxcast = cast int %reg460 to long ; <long> [#uses=2] + %reg632 = getelementptr [263 x short]* %yycheck, long 0, long %reg460-idxcast ; <short*> [#uses=1] + %reg148 = load short* %reg632 ; <short> [#uses=1] + %cast637 = cast short %reg148 to int ; <int> [#uses=1] + %cond639 = setne int %cast637, %reg139 ; <bool> [#uses=1] + br bool %cond639, label %bb16, label %bb12 + +bb12: ; preds = %bb11 + %reg150 = load short** %yyssp ; <short*> [#uses=1] + %cast640 = cast short* %reg150 to sbyte* ; <sbyte*> [#uses=1] + %reg151 = load short** %yysslim ; <short*> [#uses=1] + %cast641 = cast short* %reg151 to sbyte* ; <sbyte*> [#uses=1] + %cond642 = setlt sbyte* %cast640, %cast641 ; <bool> [#uses=1] + br bool %cond642, label %bb14, label %bb13 + +bb13: ; preds = %bb12 + %reg644 = call int %yygrowstack( ) ; <int> [#uses=1] + %cond644 = setne int %reg644, 0 ; <bool> [#uses=1] + br bool %cond644, label %bb113, label %bb14 + +bb14: ; preds = %bb13, %bb12 + %reg153 = load short** %yyssp ; <short*> [#uses=1] + %reg647 = getelementptr short* %reg153, long 1 ; <short*> [#uses=2] + store short* %reg647, short** %yyssp + %reg653 = getelementptr [263 x short]* %yytable, long 0, long %reg460-idxcast ; <short*> [#uses=1] + %reg162 = load short* %reg653 ; <short> [#uses=2] + %cast658 = cast short %reg162 to uint ; <uint> [#uses=2] + store short %reg162, short* %reg647 + %reg164 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %reg661 = getelementptr %YYSTYPE* %reg164, long 1 ; <%YYSTYPE*> [#uses=1] + store %YYSTYPE* %reg661, %YYSTYPE** %yyvsp + %reg167 = load %IntList* getelementptr (%YYSTYPE* %yylval, long 0, uint 0) ; <%IntList> [#uses=1] + %reg661.idx1 = getelementptr %YYSTYPE* %reg164, long 1, uint 0 ; <%IntList*> [#uses=1] + store %IntList %reg167, %IntList* %reg661.idx1 + store int -1, int* %yychar + %reg169 = load int* %yyerrflag ; <int> [#uses=2] + %cond669 = setle int %reg169, 0 ; <bool> [#uses=1] + br bool %cond669, label %bb4, label %bb15 + +bb15: ; preds = %bb14 + %reg171 = add int %reg169, -1 ; <int> [#uses=1] + store int %reg171, int* %yyerrflag + br label %bb4 + +bb16: ; preds = %bb11, %bb10, %bb9, %bb8 + %reg677 = getelementptr [43 x short]* %yyrindex, long 0, long %reg458-idxcast ; <short*> [#uses=1] + %reg178 = load short* %reg677 ; <short> [#uses=1] + %cast682 = cast short %reg178 to int ; <int> [#uses=2] + %cond683 = seteq int %cast682, 0 ; <bool> [#uses=1] + br bool %cond683, label %bb21, label %bb17 + +bb17: ; preds = %bb16 + %reg180 = load int* %yychar ; <int> [#uses=2] + %reg463 = add int %cast682, %reg180 ; <int> [#uses=3] + %cond686 = setlt int %reg463, 0 ; <bool> [#uses=1] + br bool %cond686, label %bb21, label %bb18 + +bb18: ; preds = %bb17 + %cond689 = setgt int %reg463, 262 ; <bool> [#uses=1] + br bool %cond689, label %bb21, label %bb19 + +bb19: ; preds = %bb18 + %reg463-idxcast = cast int %reg463 to long ; <long> [#uses=2] + %reg694 = getelementptr [263 x short]* %yycheck, long 0, long %reg463-idxcast ; <short*> [#uses=1] + %reg189 = load short* %reg694 ; <short> [#uses=1] + %cast699 = cast short %reg189 to int ; <int> [#uses=1] + %cond701 = setne int %cast699, %reg180 ; <bool> [#uses=1] + br bool %cond701, label %bb21, label %bb20 + +bb20: ; preds = %bb19 + %reg704 = getelementptr [263 x short]* %yytable, long 0, long %reg463-idxcast ; <short*> [#uses=1] + %reg197 = load short* %reg704 ; <short> [#uses=1] + %cast709 = cast short %reg197 to int ; <int> [#uses=1] + br label %bb36 + +bb21: ; preds = %bb19, %bb18, %bb17, %bb16 + %reg198 = load int* %yyerrflag ; <int> [#uses=1] + %cond711 = setne int %reg198, 0 ; <bool> [#uses=1] + br bool %cond711, label %bb23, label %bb22 + +bb22: ; preds = %bb21 + call void %yyerror( sbyte* getelementptr ([13 x sbyte]* %.LC01, long 0, long 0) ) + %reg200 = load int* %yynerrs ; <int> [#uses=1] + %reg201 = add int %reg200, 1 ; <int> [#uses=1] + store int %reg201, int* %yynerrs + br label %bb23 + +bb23: ; preds = %bb22, %bb21 + %reg202 = load int* %yyerrflag ; <int> [#uses=1] + %cond719 = setgt int %reg202, 2 ; <bool> [#uses=1] + br bool %cond719, label %bb34, label %bb24 + +bb24: ; preds = %bb23 + store int 3, int* %yyerrflag + %reg241 = load short** %yyss ; <short*> [#uses=1] + %cast778 = cast short* %reg241 to sbyte* ; <sbyte*> [#uses=1] + br label %bb25 + +bb25: ; preds = %bb33, %bb24 + %reg204 = load short** %yyssp ; <short*> [#uses=4] + %reg206 = load short* %reg204 ; <short> [#uses=1] + %reg206-idxcast = cast short %reg206 to long ; <long> [#uses=1] + %reg727 = getelementptr [43 x short]* %yysindex, long 0, long %reg206-idxcast ; <short*> [#uses=1] + %reg212 = load short* %reg727 ; <short> [#uses=2] + %cast732 = cast short %reg212 to int ; <int> [#uses=2] + %cond733 = seteq int %cast732, 0 ; <bool> [#uses=1] + br bool %cond733, label %bb32, label %bb26 + +bb26: ; preds = %bb25 + %reg466 = add int %cast732, 256 ; <int> [#uses=2] + %cond736 = setlt int %reg466, 0 ; <bool> [#uses=1] + br bool %cond736, label %bb32, label %bb27 + +bb27: ; preds = %bb26 + %cond739 = setgt int %reg466, 262 ; <bool> [#uses=1] + br bool %cond739, label %bb32, label %bb28 + +bb28: ; preds = %bb27 + %reg212-idxcast = cast short %reg212 to long ; <long> [#uses=1] + %reg212-idxcast-offset = add long %reg212-idxcast, 256 ; <long> [#uses=2] + %reg744 = getelementptr [263 x short]* %yycheck, long 0, long %reg212-idxcast-offset ; <short*> [#uses=1] + %reg221 = load short* %reg744 ; <short> [#uses=1] + %cond748 = setne short %reg221, 256 ; <bool> [#uses=1] + br bool %cond748, label %bb32, label %bb29 + +bb29: ; preds = %bb28 + %cast750 = cast short* %reg204 to sbyte* ; <sbyte*> [#uses=1] + %reg223 = load short** %yysslim ; <short*> [#uses=1] + %cast751 = cast short* %reg223 to sbyte* ; <sbyte*> [#uses=1] + %cond752 = setlt sbyte* %cast750, %cast751 ; <bool> [#uses=1] + br bool %cond752, label %bb31, label %bb30 + +bb30: ; preds = %bb29 + %reg754 = call int %yygrowstack( ) ; <int> [#uses=1] + %cond754 = setne int %reg754, 0 ; <bool> [#uses=1] + br bool %cond754, label %bb113, label %bb31 + +bb31: ; preds = %bb30, %bb29 + %reg225 = load short** %yyssp ; <short*> [#uses=1] + %reg757 = getelementptr short* %reg225, long 1 ; <short*> [#uses=2] + store short* %reg757, short** %yyssp + %reg763 = getelementptr [263 x short]* %yytable, long 0, long %reg212-idxcast-offset ; <short*> [#uses=1] + %reg234 = load short* %reg763 ; <short> [#uses=2] + %cast768 = cast short %reg234 to uint ; <uint> [#uses=1] + store short %reg234, short* %reg757 + %reg236 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %reg771 = getelementptr %YYSTYPE* %reg236, long 1 ; <%YYSTYPE*> [#uses=1] + store %YYSTYPE* %reg771, %YYSTYPE** %yyvsp + %reg239 = load %IntList* getelementptr (%YYSTYPE* %yylval, long 0, uint 0) ; <%IntList> [#uses=1] + %reg771.idx1 = getelementptr %YYSTYPE* %reg236, long 1, uint 0 ; <%IntList*> [#uses=1] + store %IntList %reg239, %IntList* %reg771.idx1 + br label %bb4 + +bb32: ; preds = %bb28, %bb27, %bb26, %bb25 + %cast777 = cast short* %reg204 to sbyte* ; <sbyte*> [#uses=1] + %cond779 = setle sbyte* %cast777, %cast778 ; <bool> [#uses=1] + br bool %cond779, label %UnifiedExitNode, label %bb33 + +bb33: ; preds = %bb32 + %reg781 = getelementptr short* %reg204, long -1 ; <short*> [#uses=1] + store short* %reg781, short** %yyssp + %reg244 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=1] + %reg786 = getelementptr %YYSTYPE* %reg244, long -1 ; <%YYSTYPE*> [#uses=1] + store %YYSTYPE* %reg786, %YYSTYPE** %yyvsp + br label %bb25 + +bb34: ; preds = %bb23 + %reg246 = load int* %yychar ; <int> [#uses=1] + %cond791 = seteq int %reg246, 0 ; <bool> [#uses=1] + br bool %cond791, label %UnifiedExitNode, label %bb35 + +bb35: ; preds = %bb34 + store int -1, int* %yychar + br label %bb4 + +bb36: ; preds = %bb20, %bb4 + %reg468 = phi int [ %cast709, %bb20 ], [ %cast599, %bb4 ] ; <int> [#uses=31] + %reg468-idxcast = cast int %reg468 to long ; <long> [#uses=2] + %reg796 = getelementptr [25 x short]* %yylen, long 0, long %reg468-idxcast ; <short*> [#uses=1] + %reg254 = load short* %reg796 ; <short> [#uses=2] + %reg259 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=1] + %reg254-idxcast = cast short %reg254 to long ; <long> [#uses=1] + %reg254-idxcast-scale = mul long %reg254-idxcast, -1 ; <long> [#uses=1] + %reg254-idxcast-scale-offset = add long %reg254-idxcast-scale, 1 ; <long> [#uses=1] + %reg261.idx1 = getelementptr %YYSTYPE* %reg259, long %reg254-idxcast-scale-offset, uint 0 ; <%IntList*> [#uses=1] + %reg261 = load %IntList* %reg261.idx1 ; <%IntList> [#uses=1] + store %IntList %reg261, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + %cond812 = seteq int %reg468, 13 ; <bool> [#uses=1] + br bool %cond812, label %bb85, label %bb37 + +bb37: ; preds = %bb36 + %cond814 = setgt int %reg468, 13 ; <bool> [#uses=1] + br bool %cond814, label %bb56, label %bb38 + +bb38: ; preds = %bb37 + %cond817 = seteq int %reg468, 7 ; <bool> [#uses=1] + br bool %cond817, label %bb79, label %bb39 + +bb39: ; preds = %bb38 + %cond819 = setgt int %reg468, 7 ; <bool> [#uses=1] + br bool %cond819, label %bb48, label %bb40 + +bb40: ; preds = %bb39 + %cond822 = seteq int %reg468, 4 ; <bool> [#uses=1] + br bool %cond822, label %bb76, label %bb41 + +bb41: ; preds = %bb40 + %cond824 = setgt int %reg468, 4 ; <bool> [#uses=1] + br bool %cond824, label %bb45, label %bb42 + +bb42: ; preds = %bb41 + %cond827 = seteq int %reg468, 2 ; <bool> [#uses=1] + br bool %cond827, label %bb74, label %bb43 + +bb43: ; preds = %bb42 + %cond829 = seteq int %reg468, 3 ; <bool> [#uses=1] + br bool %cond829, label %bb75, label %bb97 + +bb45: ; preds = %bb41 + %cond831 = seteq int %reg468, 5 ; <bool> [#uses=1] + br bool %cond831, label %bb77, label %bb46 + +bb46: ; preds = %bb45 + %cond833 = seteq int %reg468, 6 ; <bool> [#uses=1] + br bool %cond833, label %bb78, label %bb97 + +bb48: ; preds = %bb39 + %cond835 = seteq int %reg468, 10 ; <bool> [#uses=1] + br bool %cond835, label %bb82, label %bb49 + +bb49: ; preds = %bb48 + %cond837 = setgt int %reg468, 10 ; <bool> [#uses=1] + br bool %cond837, label %bb53, label %bb50 + +bb50: ; preds = %bb49 + %cond840 = seteq int %reg468, 8 ; <bool> [#uses=1] + br bool %cond840, label %bb80, label %bb51 + +bb51: ; preds = %bb50 + %cond842 = seteq int %reg468, 9 ; <bool> [#uses=1] + br bool %cond842, label %bb81, label %bb97 + +bb53: ; preds = %bb49 + %cond844 = seteq int %reg468, 11 ; <bool> [#uses=1] + br bool %cond844, label %bb83, label %bb54 + +bb54: ; preds = %bb53 + %cond846 = seteq int %reg468, 12 ; <bool> [#uses=1] + br bool %cond846, label %bb84, label %bb97 + +bb56: ; preds = %bb37 + %cond848 = seteq int %reg468, 19 ; <bool> [#uses=1] + br bool %cond848, label %bb91, label %bb57 + +bb57: ; preds = %bb56 + %cond850 = setgt int %reg468, 19 ; <bool> [#uses=1] + br bool %cond850, label %bb66, label %bb58 + +bb58: ; preds = %bb57 + %cond853 = seteq int %reg468, 16 ; <bool> [#uses=1] + br bool %cond853, label %bb88, label %bb59 + +bb59: ; preds = %bb58 + %cond855 = setgt int %reg468, 16 ; <bool> [#uses=1] + br bool %cond855, label %bb63, label %bb60 + +bb60: ; preds = %bb59 + %cond858 = seteq int %reg468, 14 ; <bool> [#uses=1] + br bool %cond858, label %bb86, label %bb61 + +bb61: ; preds = %bb60 + %cond860 = seteq int %reg468, 15 ; <bool> [#uses=1] + br bool %cond860, label %bb87, label %bb97 + +bb63: ; preds = %bb59 + %cond862 = seteq int %reg468, 17 ; <bool> [#uses=1] + br bool %cond862, label %bb89, label %bb64 + +bb64: ; preds = %bb63 + %cond864 = seteq int %reg468, 18 ; <bool> [#uses=1] + br bool %cond864, label %bb90, label %bb97 + +bb66: ; preds = %bb57 + %cond866 = seteq int %reg468, 22 ; <bool> [#uses=1] + br bool %cond866, label %bb94, label %bb67 + +bb67: ; preds = %bb66 + %cond868 = setgt int %reg468, 22 ; <bool> [#uses=1] + br bool %cond868, label %bb71, label %bb68 + +bb68: ; preds = %bb67 + %cond871 = seteq int %reg468, 20 ; <bool> [#uses=1] + br bool %cond871, label %bb92, label %bb69 + +bb69: ; preds = %bb68 + %cond873 = seteq int %reg468, 21 ; <bool> [#uses=1] + br bool %cond873, label %bb93, label %bb97 + +bb71: ; preds = %bb67 + %cond875 = seteq int %reg468, 23 ; <bool> [#uses=1] + br bool %cond875, label %bb95, label %bb72 + +bb72: ; preds = %bb71 + %cond877 = seteq int %reg468, 24 ; <bool> [#uses=1] + br bool %cond877, label %bb96, label %bb97 + +bb74: ; preds = %bb42 + call void %yyfinished( ) + br label %bb97 + +bb75: ; preds = %bb43 + %reg262 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %reg264.idx1 = getelementptr %YYSTYPE* %reg262, long -2, uint 0 ; <%IntList*> [#uses=1] + %reg264 = load %IntList* %reg264.idx1 ; <%IntList> [#uses=1] + %reg265.idx = getelementptr %YYSTYPE* %reg262, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg265 = load %IntList* %reg265.idx ; <%IntList> [#uses=1] + %cast889 = cast %IntList %reg265 to %List ; <%List> [#uses=1] + %cast890 = cast %IntList %reg264 to %List ; <%List> [#uses=1] + call void %doSpec( %List %cast890, %List %cast889 ) + br label %bb97 + +bb76: ; preds = %bb40 + store %IntList null, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb77: ; preds = %bb45 + %reg269 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %cast894 = getelementptr %YYSTYPE* %reg269, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg271 = load %IntList* %cast894 ; <%IntList> [#uses=1] + %reg271 = cast %IntList %reg271 to sbyte* ; <sbyte*> [#uses=1] + %reg272.idx1 = getelementptr %YYSTYPE* %reg269, long -1, uint 0 ; <%IntList*> [#uses=1] + %reg272 = load %IntList* %reg272.idx1 ; <%IntList> [#uses=1] + %cast901 = cast %IntList %reg272 to %List ; <%List> [#uses=1] + %reg901 = call %List %newList( sbyte* %reg271, %List %cast901 ) ; <%List> [#uses=1] + cast %List %reg901 to %IntList ; <%IntList>:0 [#uses=1] + store %IntList %0, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb78: ; preds = %bb46 + %reg275 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=1] + %reg277.idx = getelementptr %YYSTYPE* %reg275, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg277 = load %IntList* %reg277.idx ; <%IntList> [#uses=1] + %cast907 = cast %IntList %reg277 to %List ; <%List> [#uses=1] + %reg907 = call %Arity %newArity( int -1, %List %cast907 ) ; <%Arity> [#uses=1] + cast %Arity %reg907 to %IntList ; <%IntList>:1 [#uses=1] + store %IntList %1, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb79: ; preds = %bb38 + store %IntList null, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + %reg281 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=1] + %cast912 = getelementptr %YYSTYPE* %reg281, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg282 = load %IntList* %cast912 ; <%IntList> [#uses=1] + %reg282 = cast %IntList %reg282 to %List ; <%List> [#uses=1] + call void %doGram( %List %reg282 ) + br label %bb97 + +bb80: ; preds = %bb50 + store %IntList null, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + %reg285 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=1] + %cast917 = getelementptr %YYSTYPE* %reg285, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg286 = load %IntList* %cast917 ; <%IntList> [#uses=1] + %reg286 = cast %IntList %reg286 to sbyte* ; <sbyte*> [#uses=1] + call void %doStart( sbyte* %reg286 ) + br label %bb97 + +bb81: ; preds = %bb51 + store %IntList null, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb82: ; preds = %bb48 + %reg290 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %cast923 = getelementptr %YYSTYPE* %reg290, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg292 = load %IntList* %cast923 ; <%IntList> [#uses=1] + %reg292 = cast %IntList %reg292 to sbyte* ; <sbyte*> [#uses=1] + %reg293.idx1 = getelementptr %YYSTYPE* %reg290, long -1, uint 0 ; <%IntList*> [#uses=1] + %reg293 = load %IntList* %reg293.idx1 ; <%IntList> [#uses=1] + %cast930 = cast %IntList %reg293 to %List ; <%List> [#uses=1] + %reg930 = call %List %newList( sbyte* %reg292, %List %cast930 ) ; <%List> [#uses=1] + cast %List %reg930 to %IntList ; <%IntList>:2 [#uses=1] + store %IntList %2, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb83: ; preds = %bb53 + store %IntList null, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb84: ; preds = %bb54 + %reg298 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %cast936 = getelementptr %YYSTYPE* %reg298, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg300 = load %IntList* %cast936 ; <%IntList> [#uses=1] + %reg300 = cast %IntList %reg300 to sbyte* ; <sbyte*> [#uses=1] + %reg301.idx1 = getelementptr %YYSTYPE* %reg298, long -1, uint 0 ; <%IntList*> [#uses=1] + %reg301 = load %IntList* %reg301.idx1 ; <%IntList> [#uses=1] + %cast943 = cast %IntList %reg301 to %List ; <%List> [#uses=1] + %reg943 = call %List %newList( sbyte* %reg300, %List %cast943 ) ; <%List> [#uses=1] + cast %List %reg943 to %IntList ; <%IntList>:3 [#uses=1] + store %IntList %3, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb85: ; preds = %bb36 + %reg304 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %cast9521 = getelementptr %YYSTYPE* %reg304, long -2, uint 0 ; <%IntList*> [#uses=1] + %reg306 = load %IntList* %cast9521 ; <%IntList> [#uses=1] + %reg306 = cast %IntList %reg306 to sbyte* ; <sbyte*> [#uses=1] + %cast953 = cast %YYSTYPE* %reg304 to int* ; <int*> [#uses=1] + %reg307 = load int* %cast953 ; <int> [#uses=1] + %reg955 = call %Binding %newBinding( sbyte* %reg306, int %reg307 ) ; <%Binding> [#uses=1] + cast %Binding %reg955 to %IntList ; <%IntList>:4 [#uses=1] + store %IntList %4, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb86: ; preds = %bb60 + store %IntList null, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb87: ; preds = %bb61 + %reg312 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %cast961 = getelementptr %YYSTYPE* %reg312, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg314 = load %IntList* %cast961 ; <%IntList> [#uses=1] + %reg314 = cast %IntList %reg314 to sbyte* ; <sbyte*> [#uses=1] + %reg315.idx1 = getelementptr %YYSTYPE* %reg312, long -1, uint 0 ; <%IntList*> [#uses=1] + %reg315 = load %IntList* %reg315.idx1 ; <%IntList> [#uses=1] + %cast968 = cast %IntList %reg315 to %List ; <%List> [#uses=1] + %reg968 = call %List %newList( sbyte* %reg314, %List %cast968 ) ; <%List> [#uses=1] + cast %List %reg968 to %IntList ; <%IntList>:5 [#uses=1] + store %IntList %5, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb88: ; preds = %bb58 + %reg318 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=4] + %cast9791 = getelementptr %YYSTYPE* %reg318, long -6, uint 0 ; <%IntList*> [#uses=1] + %reg322 = load %IntList* %cast9791 ; <%IntList> [#uses=1] + %reg322 = cast %IntList %reg322 to sbyte* ; <sbyte*> [#uses=1] + %reg323.idx1 = getelementptr %YYSTYPE* %reg318, long -4, uint 0 ; <%IntList*> [#uses=1] + %reg323 = load %IntList* %reg323.idx1 ; <%IntList> [#uses=1] + %reg987 = getelementptr %YYSTYPE* %reg318, long -2 ; <%YYSTYPE*> [#uses=1] + %cast989 = cast %YYSTYPE* %reg987 to int* ; <int*> [#uses=1] + %reg324 = load int* %cast989 ; <int> [#uses=1] + %reg325.idx1 = getelementptr %YYSTYPE* %reg318, long -1, uint 0 ; <%IntList*> [#uses=1] + %reg325 = load %IntList* %reg325.idx1 ; <%IntList> [#uses=1] + %cast998 = cast %IntList %reg323 to %PatternAST ; <%PatternAST> [#uses=1] + %reg996 = call %RuleAST %newRuleAST( sbyte* %reg322, %PatternAST %cast998, int %reg324, %IntList %reg325 ) ; <%RuleAST> [#uses=1] + cast %RuleAST %reg996 to %IntList ; <%IntList>:6 [#uses=1] + store %IntList %6, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb89: ; preds = %bb63 + %reg328 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=1] + %cast1002 = getelementptr %YYSTYPE* %reg328, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg329 = load %IntList* %cast1002 ; <%IntList> [#uses=1] + %reg329 = cast %IntList %reg329 to sbyte* ; <sbyte*> [#uses=1] + %reg1004 = call %PatternAST %newPatternAST( sbyte* %reg329, %List null ) ; <%PatternAST> [#uses=1] + cast %PatternAST %reg1004 to %IntList ; <%IntList>:7 [#uses=1] + store %IntList %7, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb90: ; preds = %bb64 + %reg333 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %cast10131 = getelementptr %YYSTYPE* %reg333, long -1, uint 0 ; <%IntList*> [#uses=1] + %reg335 = load %IntList* %cast10131 ; <%IntList> [#uses=1] + %reg335 = cast %IntList %reg335 to sbyte* ; <sbyte*> [#uses=1] + %reg1015 = call %List %newList( sbyte* %reg335, %List null ) ; <%List> [#uses=1] + %cast10211 = getelementptr %YYSTYPE* %reg333, long -3, uint 0 ; <%IntList*> [#uses=1] + %reg338 = load %IntList* %cast10211 ; <%IntList> [#uses=1] + %reg338 = cast %IntList %reg338 to sbyte* ; <sbyte*> [#uses=1] + %reg1023 = call %PatternAST %newPatternAST( sbyte* %reg338, %List %reg1015 ) ; <%PatternAST> [#uses=1] + cast %PatternAST %reg1023 to %IntList ; <%IntList>:8 [#uses=1] + store %IntList %8, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb91: ; preds = %bb56 + %reg341 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=3] + %cast10331 = getelementptr %YYSTYPE* %reg341, long -1, uint 0 ; <%IntList*> [#uses=1] + %reg344 = load %IntList* %cast10331 ; <%IntList> [#uses=1] + %reg344 = cast %IntList %reg344 to sbyte* ; <sbyte*> [#uses=1] + %reg1035 = call %List %newList( sbyte* %reg344, %List null ) ; <%List> [#uses=1] + %cast10411 = getelementptr %YYSTYPE* %reg341, long -3, uint 0 ; <%IntList*> [#uses=1] + %reg347 = load %IntList* %cast10411 ; <%IntList> [#uses=1] + %reg347 = cast %IntList %reg347 to sbyte* ; <sbyte*> [#uses=1] + %reg1043 = call %List %newList( sbyte* %reg347, %List %reg1035 ) ; <%List> [#uses=1] + %cast10491 = getelementptr %YYSTYPE* %reg341, long -5, uint 0 ; <%IntList*> [#uses=1] + %reg349 = load %IntList* %cast10491 ; <%IntList> [#uses=1] + %reg349 = cast %IntList %reg349 to sbyte* ; <sbyte*> [#uses=1] + %reg1051 = call %PatternAST %newPatternAST( sbyte* %reg349, %List %reg1043 ) ; <%PatternAST> [#uses=1] + cast %PatternAST %reg1051 to %IntList ; <%IntList>:9 [#uses=1] + store %IntList %9, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb92: ; preds = %bb68 + store %IntList null, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb93: ; preds = %bb69 + %reg354 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %reg1059 = getelementptr %YYSTYPE* %reg354, long -2 ; <%YYSTYPE*> [#uses=1] + %cast1061 = cast %YYSTYPE* %reg1059 to int* ; <int*> [#uses=1] + %reg356 = load int* %cast1061 ; <int> [#uses=1] + %reg357.idx1 = getelementptr %YYSTYPE* %reg354, long -1, uint 0 ; <%IntList*> [#uses=1] + %reg357 = load %IntList* %reg357.idx1 ; <%IntList> [#uses=1] + %reg1068 = call %IntList %newIntList( int %reg356, %IntList %reg357 ) ; <%IntList> [#uses=1] + store %IntList %reg1068, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb94: ; preds = %bb66 + store %IntList null, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb95: ; preds = %bb71 + %reg362 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %reg1076 = getelementptr %YYSTYPE* %reg362, long -1 ; <%YYSTYPE*> [#uses=1] + %cast1078 = cast %YYSTYPE* %reg1076 to int* ; <int*> [#uses=1] + %reg364 = load int* %cast1078 ; <int> [#uses=1] + %reg365.idx = getelementptr %YYSTYPE* %reg362, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg365 = load %IntList* %reg365.idx ; <%IntList> [#uses=1] + %reg1081 = call %IntList %newIntList( int %reg364, %IntList %reg365 ) ; <%IntList> [#uses=1] + store %IntList %reg1081, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb96: ; preds = %bb72 + %reg368 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %reg1088 = getelementptr %YYSTYPE* %reg368, long -1 ; <%YYSTYPE*> [#uses=1] + %cast1090 = cast %YYSTYPE* %reg1088 to int* ; <int*> [#uses=1] + %reg370 = load int* %cast1090 ; <int> [#uses=1] + %reg371.idx = getelementptr %YYSTYPE* %reg368, long 0, uint 0 ; <%IntList*> [#uses=1] + %reg371 = load %IntList* %reg371.idx ; <%IntList> [#uses=1] + %reg1093 = call %IntList %newIntList( int %reg370, %IntList %reg371 ) ; <%IntList> [#uses=1] + store %IntList %reg1093, %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) + br label %bb97 + +bb97: ; preds = %bb96, %bb95, %bb94, %bb93, %bb92, %bb91, %bb90, %bb89, %bb88, %bb87, %bb86, %bb85, %bb84, %bb83, %bb82, %bb81, %bb80, %bb79, %bb78, %bb77, %bb76, %bb75, %bb74, %bb72, %bb69, %bb64, %bb61, %bb54, %bb51, %bb46, %bb43 + %cast1097 = cast short %reg254 to ulong ; <ulong> [#uses=3] + %reg375 = add ulong %cast1097, %cast1097 ; <ulong> [#uses=1] + %reg377 = load short** %yyssp ; <short*> [#uses=1] + %cast379 = cast short* %reg377 to ulong ; <ulong> [#uses=1] + %reg381 = sub ulong %cast379, %reg375 ; <ulong> [#uses=1] + %cast1099 = cast ulong %reg381 to short* ; <short*> [#uses=1] + store short* %cast1099, short** %yyssp + %reg382 = load short** %yyssp ; <short*> [#uses=3] + %reg383 = load short* %reg382 ; <short> [#uses=1] + %cast1103 = cast short %reg383 to int ; <int> [#uses=3] + %reg385 = mul ulong %cast1097, 8 ; <ulong> [#uses=1] + %reg387 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=1] + %cast389 = cast %YYSTYPE* %reg387 to ulong ; <ulong> [#uses=1] + %reg391 = sub ulong %cast389, %reg385 ; <ulong> [#uses=1] + %cast1108 = cast ulong %reg391 to %YYSTYPE* ; <%YYSTYPE*> [#uses=1] + store %YYSTYPE* %cast1108, %YYSTYPE** %yyvsp + %reg1111 = getelementptr [25 x short]* %yylhs, long 0, long %reg468-idxcast ; <short*> [#uses=1] + %reg398 = load short* %reg1111 ; <short> [#uses=2] + %cast1116 = cast short %reg398 to int ; <int> [#uses=1] + %cond1117 = setne int %cast1103, 0 ; <bool> [#uses=1] + br bool %cond1117, label %bb104, label %bb98 + +bb98: ; preds = %bb97 + %cond1119 = setne int %cast1116, 0 ; <bool> [#uses=1] + br bool %cond1119, label %bb104, label %bb99 + +bb99: ; preds = %bb98 + %reg1122 = getelementptr short* %reg382, long 1 ; <short*> [#uses=2] + store short* %reg1122, short** %yyssp + store short 1, short* %reg1122 + %reg403 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %reg1128 = getelementptr %YYSTYPE* %reg403, long 1 ; <%YYSTYPE*> [#uses=1] + store %YYSTYPE* %reg1128, %YYSTYPE** %yyvsp + %reg406 = load %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) ; <%IntList> [#uses=1] + %reg1128.idx1 = getelementptr %YYSTYPE* %reg403, long 1, uint 0 ; <%IntList*> [#uses=1] + store %IntList %reg406, %IntList* %reg1128.idx1 + %reg407 = load int* %yychar ; <int> [#uses=1] + %cond1135 = setge int %reg407, 0 ; <bool> [#uses=1] + br bool %cond1135, label %bb102, label %bb100 + +bb100: ; preds = %bb99 + %reg1139 = call int %yylex( ) ; <int> [#uses=1] + store int %reg1139, int* %yychar + %reg409 = load int* %yychar ; <int> [#uses=1] + %cond1141 = setge int %reg409, 0 ; <bool> [#uses=1] + br bool %cond1141, label %bb102, label %bb101 + +bb101: ; preds = %bb100 + store int 0, int* %yychar + br label %bb102 + +bb102: ; preds = %bb101, %bb100, %bb99 + %reg411 = load int* %yychar ; <int> [#uses=1] + %cond1146 = setne int %reg411, 0 ; <bool> [#uses=1] + br bool %cond1146, label %bb4, label %UnifiedExitNode + +bb104: ; preds = %bb98, %bb97 + %reg398-idxcast = cast short %reg398 to long ; <long> [#uses=2] + %reg1150 = getelementptr [12 x short]* %yygindex, long 0, long %reg398-idxcast ; <short*> [#uses=1] + %reg418 = load short* %reg1150 ; <short> [#uses=1] + %cast1155 = cast short %reg418 to int ; <int> [#uses=2] + %cond1156 = seteq int %cast1155, 0 ; <bool> [#uses=1] + br bool %cond1156, label %bb109, label %bb105 + +bb105: ; preds = %bb104 + %reg473 = add int %cast1155, %cast1103 ; <int> [#uses=3] + %cond1158 = setlt int %reg473, 0 ; <bool> [#uses=1] + br bool %cond1158, label %bb109, label %bb106 + +bb106: ; preds = %bb105 + %cond1161 = setgt int %reg473, 262 ; <bool> [#uses=1] + br bool %cond1161, label %bb109, label %bb107 + +bb107: ; preds = %bb106 + %reg473-idxcast = cast int %reg473 to long ; <long> [#uses=2] + %reg1166 = getelementptr [263 x short]* %yycheck, long 0, long %reg473-idxcast ; <short*> [#uses=1] + %reg428 = load short* %reg1166 ; <short> [#uses=1] + %cast1171 = cast short %reg428 to int ; <int> [#uses=1] + %cond1172 = setne int %cast1171, %cast1103 ; <bool> [#uses=1] + br bool %cond1172, label %bb109, label %bb108 + +bb108: ; preds = %bb107 + %reg1175 = getelementptr [263 x short]* %yytable, long 0, long %reg473-idxcast ; <short*> [#uses=1] + %reg435 = load short* %reg1175 ; <short> [#uses=1] + %cast1180 = cast short %reg435 to uint ; <uint> [#uses=1] + br label %bb110 + +bb109: ; preds = %bb107, %bb106, %bb105, %bb104 + %reg1183 = getelementptr [12 x short]* %yydgoto, long 0, long %reg398-idxcast ; <short*> [#uses=1] + %reg442 = load short* %reg1183 ; <short> [#uses=1] + %cast1188 = cast short %reg442 to uint ; <uint> [#uses=1] + br label %bb110 + +bb110: ; preds = %bb109, %bb108 + %reg476 = phi uint [ %cast1188, %bb109 ], [ %cast1180, %bb108 ] ; <uint> [#uses=2] + %cast1189 = cast short* %reg382 to sbyte* ; <sbyte*> [#uses=1] + %reg444 = load short** %yysslim ; <short*> [#uses=1] + %cast1190 = cast short* %reg444 to sbyte* ; <sbyte*> [#uses=1] + %cond1191 = setlt sbyte* %cast1189, %cast1190 ; <bool> [#uses=1] + br bool %cond1191, label %bb112, label %bb111 + +bb111: ; preds = %bb110 + %reg1193 = call int %yygrowstack( ) ; <int> [#uses=1] + %cond1193 = setne int %reg1193, 0 ; <bool> [#uses=1] + br bool %cond1193, label %bb113, label %bb112 + +bb112: ; preds = %bb111, %bb110 + %reg446 = load short** %yyssp ; <short*> [#uses=1] + %reg1196 = getelementptr short* %reg446, long 1 ; <short*> [#uses=2] + store short* %reg1196, short** %yyssp + %cast1357 = cast uint %reg476 to short ; <short> [#uses=1] + store short %cast1357, short* %reg1196 + %reg449 = load %YYSTYPE** %yyvsp ; <%YYSTYPE*> [#uses=2] + %reg1202 = getelementptr %YYSTYPE* %reg449, long 1 ; <%YYSTYPE*> [#uses=1] + store %YYSTYPE* %reg1202, %YYSTYPE** %yyvsp + %reg452 = load %IntList* getelementptr (%YYSTYPE* %yyval, long 0, uint 0) ; <%IntList> [#uses=1] + %reg1202.idx1 = getelementptr %YYSTYPE* %reg449, long 1, uint 0 ; <%IntList*> [#uses=1] + store %IntList %reg452, %IntList* %reg1202.idx1 + br label %bb4 + +bb113: ; preds = %bb111, %bb30, %bb13, %bb2 + call void %yyerror( sbyte* getelementptr ([20 x sbyte]* %.LC1, long 0, long 0) ) + br label %UnifiedExitNode + +UnifiedExitNode: ; preds = %bb113, %bb102, %bb34, %bb32 + %UnifiedRetVal = phi int [ 1, %bb113 ], [ 1, %bb34 ], [ 1, %bb32 ], [ 0, %bb102 ] ; <int> [#uses=1] + ret int %UnifiedRetVal +} + +declare %List %newList(sbyte*, %List) + +declare %IntList %newIntList(int, %IntList) + +declare void %doStart(sbyte*) + +declare void %yyerror(sbyte*) + +declare void %doSpec(%List, %List) + +declare %Arity %newArity(int, %List) + +declare %Binding %newBinding(sbyte*, int) + +declare %PatternAST %newPatternAST(sbyte*, %List) + +declare %RuleAST %newRuleAST(sbyte*, %PatternAST, int, %IntList) + +declare void %yyfinished() + +declare int %yylex() + +declare void %doGram(%List) + +declare int %yygrowstack() diff --git a/test/CodeGen/Generic/ConstantExprLowering.llx b/test/CodeGen/Generic/ConstantExprLowering.llx new file mode 100644 index 0000000..afb6530 --- /dev/null +++ b/test/CodeGen/Generic/ConstantExprLowering.llx @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%.str_1 = internal constant [16 x sbyte] c"%d %d %d %d %d\0A\00" + +%XA = external global int +%XB = external global int + +implementation ; Functions: + +declare int %printf(sbyte*, ...) + +void %test(int %A, int %B, int %C, int %D) { +entry: + %t1 = setlt int %A, 0 + br bool %t1, label %less, label %not_less +less: + br label %not_less +not_less: + %t2 = phi int [ sub ( int cast (int* %XA to int), + int cast (int* %XB to int) ), %less], + [ sub ( int cast (int* %XA to int), + int cast (int* %XB to int) ), %entry] + %tmp.39 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([16 x sbyte]* %.str_1, long 0, long 0), int %t2 ) + ret void +} + diff --git a/test/CodeGen/Generic/GC/alloc_loop.ll b/test/CodeGen/Generic/GC/alloc_loop.ll new file mode 100644 index 0000000..11294e1 --- /dev/null +++ b/test/CodeGen/Generic/GC/alloc_loop.ll @@ -0,0 +1,54 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +implementation + +declare sbyte* %llvm_gc_allocate(uint) +declare void %llvm_gc_initialize(uint) + +declare void %llvm.gcroot(sbyte**, sbyte*) +declare void %llvm.gcwrite(sbyte*, sbyte*, sbyte**) + +int %main() { +entry: + %A = alloca sbyte* + %B = alloca sbyte** + + call void %llvm_gc_initialize(uint 1048576) ; Start with 1MB heap + + ;; void *A; + call void %llvm.gcroot(sbyte** %A, sbyte* null) + + ;; A = gcalloc(10); + %Aptr = call sbyte* %llvm_gc_allocate(uint 10) + store sbyte* %Aptr, sbyte** %A + + ;; void **B; + %tmp.1 = cast sbyte*** %B to sbyte ** + call void %llvm.gcroot(sbyte** %tmp.1, sbyte* null) + + ;; B = gcalloc(4); + %B = call sbyte* %llvm_gc_allocate(uint 8) + %tmp.2 = cast sbyte* %B to sbyte** + store sbyte** %tmp.2, sbyte*** %B + + ;; *B = A; + %B.1 = load sbyte*** %B + %A.1 = load sbyte** %A + call void %llvm.gcwrite(sbyte* %A.1, sbyte* %B, sbyte** %B.1) + + br label %AllocLoop + +AllocLoop: + %i = phi uint [ 0, %entry ], [ %indvar.next, %AllocLoop ] + ;; Allocated mem: allocated memory is immediately dead. + call sbyte* %llvm_gc_allocate(uint 100) + + %indvar.next = add uint %i, 1 + %exitcond = seteq uint %indvar.next, 10000000 + br bool %exitcond, label %Exit, label %AllocLoop + +Exit: + ret int 0 +} + +declare void %__main() diff --git a/test/CodeGen/Generic/GC/dg.exp b/test/CodeGen/Generic/GC/dg.exp new file mode 100644 index 0000000..879685c --- /dev/null +++ b/test/CodeGen/Generic/GC/dg.exp @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] diff --git a/test/CodeGen/Generic/Makefile b/test/CodeGen/Generic/Makefile new file mode 100644 index 0000000..d228f69 --- /dev/null +++ b/test/CodeGen/Generic/Makefile @@ -0,0 +1,23 @@ +# Makefile for running ad-hoc custom LLVM tests +# +%.bc: %.ll + llvm-as -f $< + +%.llc.s: %.bc + llc -f $< -o $@ + +%.gcc.s: %.c + gcc -O0 -S $< -o $@ + +%.nat: %.s + gcc -O0 -lm $< -o $@ + +%.cbe.out: %.cbe.nat + ./$< > $@ + +%.out: %.nat + ./$< > $@ + +%.clean: + rm -f $(patsubst %.clean,%.bc,$@) $(patsubst %.clean,%.*.s,$@) \ + $(patsubst %.clean,%.*.nat,$@) $(patsubst %.clean,%.*.out,$@) diff --git a/test/CodeGen/Generic/SwitchLowering.ll b/test/CodeGen/Generic/SwitchLowering.ll new file mode 100644 index 0000000..37bfffa --- /dev/null +++ b/test/CodeGen/Generic/SwitchLowering.ll @@ -0,0 +1,27 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep cmp | wc -l | grep 1 +; PR964 + +sbyte* %FindChar(sbyte* %CurPtr) { +entry: + br label %bb + +bb: ; preds = %bb, %entry + %indvar = phi uint [ 0, %entry ], [ %indvar.next, %bb ] ; <uint> [#uses=3] + %CurPtr_addr.0.rec = cast uint %indvar to int ; <int> [#uses=1] + %CurPtr_addr.0 = getelementptr sbyte* %CurPtr, uint %indvar ; <sbyte*> [#uses=1] + %tmp = load sbyte* %CurPtr_addr.0 ; <sbyte> [#uses=2] + %tmp2.rec = add int %CurPtr_addr.0.rec, 1 ; <int> [#uses=1] + %tmp2 = getelementptr sbyte* %CurPtr, int %tmp2.rec ; <sbyte*> [#uses=1] + %indvar.next = add uint %indvar, 1 ; <uint> [#uses=1] + switch sbyte %tmp, label %bb [ + sbyte 0, label %bb7 + sbyte 120, label %bb7 + ] + +bb7: ; preds = %bb, %bb + %tmp = cast sbyte %tmp to ubyte ; <ubyte> [#uses=1] + tail call void %foo( ubyte %tmp ) + ret sbyte* %tmp2 +} + +declare void %foo(ubyte) diff --git a/test/CodeGen/Generic/addc-fold2.ll b/test/CodeGen/Generic/addc-fold2.ll new file mode 100644 index 0000000..8f3cdd07 --- /dev/null +++ b/test/CodeGen/Generic/addc-fold2.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep add +; RUN: llvm-as < %s | llc -march=x86 | not grep adc + +define i64 @test(i64 %A, i32 %B) { + %tmp12 = zext i32 %B to i64 ; <i64> [#uses=1] + %tmp3 = shl i64 %tmp12, 32 ; <i64> [#uses=1] + %tmp5 = add i64 %tmp3, %A ; <i64> [#uses=1] + ret i64 %tmp5 +} + diff --git a/test/CodeGen/Generic/badCallArgLRLLVM.ll b/test/CodeGen/Generic/badCallArgLRLLVM.ll new file mode 100644 index 0000000..734d2b2 --- /dev/null +++ b/test/CodeGen/Generic/badCallArgLRLLVM.ll @@ -0,0 +1,32 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +; This caused a problem because the argument of a call was defined by +; the return value of another call that appears later in the code. +; When processing the first call, the second call has not yet been processed +; so no LiveRange has been created for its return value. +; +; llc dies in UltraSparcRegInfo::suggestRegs4CallArgs() with: +; ERROR: In call instr, no LR for arg: 0x1009e0740 +; +implementation ; Functions: + +declare int %getInt(int) + +int %main(int %argc, sbyte** %argv) { +bb0: ;[#uses=0] + br label %bb2 + +bb1: + %reg222 = call int (int)* %getInt(int %reg218) ;; ARG #1 HAS NO LR + %reg110 = add int %reg222, 1 + %b = setle int %reg110, 0 + br bool %b, label %bb2, label %bb3 + +bb2: + %reg218 = call int (int)* %getInt(int %argc) ;; THIS CALL NOT YET SEEN + br label %bb1 + +bb3: + ret int %reg110 +} + diff --git a/test/CodeGen/Generic/badFoldGEP.ll b/test/CodeGen/Generic/badFoldGEP.ll new file mode 100644 index 0000000..63acd46 --- /dev/null +++ b/test/CodeGen/Generic/badFoldGEP.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +;; GetMemInstArgs() folded the two getElementPtr instructions together, +;; producing an illegal getElementPtr. That's because the type generated +;; by the last index for the first one is a structure field, not an array +;; element, and the second one indexes off that structure field. +;; The code is legal but not type-safe and the two GEPs should not be folded. +;; +;; This code fragment is from Spec/CINT2000/197.parser/197.parser.bc, +;; file post_process.c, function build_domain(). +;; (Modified to replace store with load and return load value.) +;; + +%Domain = type { sbyte*, int, int*, int, int, int*, %Domain* } +%domain_array = uninitialized global [497 x %Domain] + +implementation; Functions: + +declare void %opaque([497 x %Domain]*) + +int %main(int %argc, sbyte** %argv) { +bb0: ;[#uses=0] + call void %opaque([497 x %Domain]* %domain_array) + %cann-indvar-idxcast = cast int %argc to long + %reg841 = getelementptr [497 x %Domain]* %domain_array, long 0, long %cann-indvar-idxcast, uint 3 + %reg846 = getelementptr int* %reg841, long 1 + %reg820 = load int* %reg846 + ret int %reg820 +} diff --git a/test/CodeGen/Generic/badarg6.ll b/test/CodeGen/Generic/badarg6.ll new file mode 100644 index 0000000..542e6b3 --- /dev/null +++ b/test/CodeGen/Generic/badarg6.ll @@ -0,0 +1,38 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +; On this code, llc did not pass the sixth argument (%reg321) to printf. +; It passed the first five in %o0 - %o4, but never initialized %o5. + +%.LC12 = internal global [44 x sbyte] c"\09\09M = %g, I = %g, V = %g\0A\09\09O = %g, E = %g\0A\0A\00" ; <[44 x sbyte]*> + +implementation; + +declare int %printf(sbyte*, ...) + +declare double %opaque(double) + +int %main(int %argc, sbyte** %argv) { + +bb25: + %b = setle int %argc, 2 + br bool %b, label %bb42, label %bb43 + +bb42: + %reg315 = call double (double)* %opaque(double 3.0) + %reg316 = call double (double)* %opaque(double 3.1) + %reg317 = call double (double)* %opaque(double 3.2) + %reg318 = call double (double)* %opaque(double 3.3) + %reg319 = call double (double)* %opaque(double 3.4) + br label %bb43 + +bb43: + %reg321 = phi double [ 2.000000e-01, %bb25 ], [ %reg315, %bb42 ] + %reg322 = phi double [ 6.000000e+00, %bb25 ], [ %reg316, %bb42 ] + %reg323 = phi double [ 0xBFF0000000000000, %bb25 ], [ %reg317, %bb42 ] + %reg324 = phi double [ 0xBFF0000000000000, %bb25 ], [ %reg318, %bb42 ] + %reg325 = phi double [ 1.000000e+00, %bb25 ], [ %reg319, %bb42 ] + + %reg609 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([44 x sbyte]* %.LC12, long 0, long 0), double %reg325, double %reg324, double %reg323, double %reg322, double %reg321 ) + + ret int 0 +} diff --git a/test/CodeGen/Generic/badlive.ll b/test/CodeGen/Generic/badlive.ll new file mode 100644 index 0000000..8c08153 --- /dev/null +++ b/test/CodeGen/Generic/badlive.ll @@ -0,0 +1,30 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +implementation + +int "main"() +begin +bb0: + %reg109 = malloc int, uint 100 + br label %bb2 + +bb2: + %cann-indvar1 = phi int [ 0, %bb0 ], [ %add1-indvar1, %bb2 ] + %reg127 = mul int %cann-indvar1, 2 + %add1-indvar1 = add int %cann-indvar1, 1 + store int 999, int * %reg109 + %cond1015 = setle int 1, 99 + %reg128 = add int %reg127, 2 + br bool %cond1015, label %bb2, label %bb4 + +bb4: ;[#uses=3] + %cann-indvar = phi uint [ %add1-indvar, %bb4 ], [ 0, %bb2 ] + %add1-indvar = add uint %cann-indvar, 1 ; <uint> [#uses=1] + store int 333, int * %reg109 + %reg131 = add uint %add1-indvar, 3 ; <int> [#uses=1] + %cond1017 = setle uint %reg131, 99 ; <bool> [#uses=1] + br bool %cond1017, label %bb4, label %bb5 + +bb5: + ret int 0 +end diff --git a/test/CodeGen/Generic/bit-intrinsics.ll b/test/CodeGen/Generic/bit-intrinsics.ll new file mode 100644 index 0000000..427387f --- /dev/null +++ b/test/CodeGen/Generic/bit-intrinsics.ll @@ -0,0 +1,32 @@ +; Make sure this testcase is supported by all code generators. Either the +; intrinsic is supported natively or IntrinsicLowering provides it. +; RUN: llvm-as < %s > %t.bc +; RUN: lli --force-interpreter=true %t.bc + +declare i32 @llvm.part.set.i32.i32.i32(i32 %x, i32 %rep, i32 %hi, i32 %lo) +declare i16 @llvm.part.set.i16.i16.i16(i16 %x, i16 %rep, i32 %hi, i32 %lo) +define i32 @test_part_set(i32 %A, i16 %B) { + %a = call i32 @llvm.part.set.i32.i32.i32(i32 %A, i32 27, i32 8, i32 0) + %b = call i16 @llvm.part.set.i16.i16.i16(i16 %B, i16 27, i32 8, i32 0) + %c = zext i16 %b to i32 + %d = add i32 %a, %c + ret i32 %d +} + +declare i32 @llvm.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo) +declare i16 @llvm.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo) +define i32 @test_part_select(i32 %A, i16 %B) { + %a = call i32 @llvm.part.select.i32.i32(i32 %A, i32 8, i32 0) + %b = call i16 @llvm.part.select.i16.i16(i16 %B, i32 8, i32 0) + %c = zext i16 %b to i32 + %d = add i32 %a, %c + ret i32 %d +} + +define i32 @main(i32 %argc, i8** %argv) { + %a = call i32 @test_part_set(i32 23, i16 57) + %b = call i32 @test_part_select(i32 23, i16 57) + %c = add i32 %a, %b + %d = urem i32 %c, 1 + ret i32 %d +} diff --git a/test/CodeGen/Generic/bool-to-double.ll b/test/CodeGen/Generic/bool-to-double.ll new file mode 100644 index 0000000..ad9bc8e --- /dev/null +++ b/test/CodeGen/Generic/bool-to-double.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +double %test(bool %X) { + %Y = cast bool %X to double + ret double %Y +} diff --git a/test/CodeGen/Generic/call-ret0.ll b/test/CodeGen/Generic/call-ret0.ll new file mode 100644 index 0000000..44c30d3 --- /dev/null +++ b/test/CodeGen/Generic/call-ret0.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +int %foo(int %x) { + ret int %x +} + +int %main() { + %r = call int %foo(int 0) + ret int %r +} diff --git a/test/CodeGen/Generic/call-ret42.ll b/test/CodeGen/Generic/call-ret42.ll new file mode 100644 index 0000000..b0a480f --- /dev/null +++ b/test/CodeGen/Generic/call-ret42.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +int %foo(int %x) { + ret int 42 +} + +int %main() { + %r = call int %foo(int 15) + ret int %r +} diff --git a/test/CodeGen/Generic/call-void.ll b/test/CodeGen/Generic/call-void.ll new file mode 100644 index 0000000..64e6336 --- /dev/null +++ b/test/CodeGen/Generic/call-void.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %foo() { + ret void +} + +int %main() { + call void ()* %foo() + ret int 0 +} diff --git a/test/CodeGen/Generic/call2-ret0.ll b/test/CodeGen/Generic/call2-ret0.ll new file mode 100644 index 0000000..55be5c6 --- /dev/null +++ b/test/CodeGen/Generic/call2-ret0.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +int %bar(int %x) { + ret int 0 +} + +int %foo(int %x) { + %q = call int %bar(int 1) + ret int %q +} + +int %main() { + %r = call int %foo(int 2) + ret int %r +} diff --git a/test/CodeGen/Generic/cast-fp.ll b/test/CodeGen/Generic/cast-fp.ll new file mode 100644 index 0000000..8359329 --- /dev/null +++ b/test/CodeGen/Generic/cast-fp.ll @@ -0,0 +1,49 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%a_fstr = internal constant [8 x sbyte] c"a = %f\0A\00" +%a_lstr = internal constant [10 x sbyte] c"a = %lld\0A\00" +%a_dstr = internal constant [8 x sbyte] c"a = %d\0A\00" + +%b_dstr = internal constant [8 x sbyte] c"b = %d\0A\00" +%b_fstr = internal constant [8 x sbyte] c"b = %f\0A\00" + +declare int %printf(sbyte*, ...) +%A = global double 2.0 +%B = global int 2 + +int %main() { + ;; A + %a = load double* %A + %a_fs = getelementptr [8 x sbyte]* %a_fstr, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %a_fs, double %a) + + ;; cast double to long + %a_d2l = cast double %a to long + %a_ls = getelementptr [10 x sbyte]* %a_lstr, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %a_ls, long %a_d2l) + + ;; cast double to int + %a_d2i = cast double %a to int + %a_ds = getelementptr [8 x sbyte]* %a_dstr, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %a_ds, int %a_d2i) + + ;; cast double to sbyte + %a_d2sb = cast double %a to sbyte + call int (sbyte*, ...)* %printf(sbyte* %a_ds, sbyte %a_d2sb) + + ;; cast int to sbyte + %a_d2i2sb = cast int %a_d2i to sbyte + call int (sbyte*, ...)* %printf(sbyte* %a_ds, sbyte %a_d2i2sb) + + ;; B + %b = load int* %B + %b_ds = getelementptr [8 x sbyte]* %b_dstr, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %b_ds, int %b) + + ;; cast int to double + %b_i2d = cast int %b to double + %b_fs = getelementptr [8 x sbyte]* %b_fstr, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %b_fs, double %b_i2d) + + ret int 0 +} diff --git a/test/CodeGen/Generic/constindices.ll b/test/CodeGen/Generic/constindices.ll new file mode 100644 index 0000000..b176144 --- /dev/null +++ b/test/CodeGen/Generic/constindices.ll @@ -0,0 +1,56 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +; Test that a sequence of constant indices are folded correctly +; into the equivalent offset at compile-time. + +%MixedA = type { float, [15 x int], sbyte, float } + +%MixedB = type { float, %MixedA, float } + +%fmtArg = internal global [44 x sbyte] c"sqrt(2) = %g\0Aexp(1) = %g\0Api = %g\0Afive = %g\0A\00"; <[44 x sbyte]*> [#uses=1] + +implementation + +declare int "printf"(sbyte*, ...) + +int "main"() +begin + %ScalarA = alloca %MixedA + %ScalarB = alloca %MixedB + %ArrayA = alloca %MixedA, uint 4 + %ArrayB = alloca %MixedB, uint 3 + + %I1 = getelementptr %MixedA* %ScalarA, long 0, uint 0 + store float 1.4142, float *%I1 + %I2 = getelementptr %MixedB* %ScalarB, long 0, uint 1, uint 0 + store float 2.7183, float *%I2 + + %fptrA = getelementptr %MixedA* %ArrayA, long 1, uint 0 + %fptrB = getelementptr %MixedB* %ArrayB, long 2, uint 1, uint 0 + + store float 3.1415, float* %fptrA + store float 5.0, float* %fptrB + + ;; Test that a sequence of GEPs with constant indices are folded right + %fptrA1 = getelementptr %MixedA* %ArrayA, long 3 ; &ArrayA[3] + %fptrA2 = getelementptr %MixedA* %fptrA1, long 0, uint 1 ; &(*fptrA1).1 + %fptrA3 = getelementptr [15 x int]* %fptrA2, long 0, long 8 ; &(*fptrA2)[8] + store int 5, int* %fptrA3 ; ArrayA[3].1[8] = 5 + + %sqrtTwo = load float *%I1 + %exp = load float *%I2 + %I3 = getelementptr %MixedA* %ArrayA, long 1, uint 0 + %pi = load float* %I3 + %I4 = getelementptr %MixedB* %ArrayB, long 2, uint 1, uint 0 + %five = load float* %I4 + + %dsqrtTwo = cast float %sqrtTwo to double + %dexp = cast float %exp to double + %dpi = cast float %pi to double + %dfive = cast float %five to double + + %castFmt = getelementptr [44 x sbyte]* %fmtArg, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %castFmt, double %dsqrtTwo, double %dexp, double %dpi, double %dfive) + + ret int 0 +end diff --git a/test/CodeGen/Generic/debug-info.ll b/test/CodeGen/Generic/debug-info.ll new file mode 100644 index 0000000..49f693a --- /dev/null +++ b/test/CodeGen/Generic/debug-info.ll @@ -0,0 +1,19 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +%lldb.compile_unit = type { uint, ushort, ushort, sbyte*, sbyte*, sbyte*, { }* } +%d.compile_unit7 = external global %lldb.compile_unit ; <%lldb.compile_unit*> [#uses=1] + +implementation ; Functions: + +declare void %llvm.dbg.stoppoint(uint, uint, %lldb.compile_unit*) + +void %rb_raise(int, ...) { +entry: + br bool false, label %strlen.exit, label %no_exit.i + +no_exit.i: ; preds = %entry + ret void + +strlen.exit: ; preds = %entry + call void %llvm.dbg.stoppoint(uint 4358, uint 0, %lldb.compile_unit* %d.compile_unit7 ) ; <{ }*> [#uses=0] + unreachable +} diff --git a/test/CodeGen/Generic/dg.exp b/test/CodeGen/Generic/dg.exp new file mode 100644 index 0000000..879685c --- /dev/null +++ b/test/CodeGen/Generic/dg.exp @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] diff --git a/test/CodeGen/Generic/div-neg-power-2.ll b/test/CodeGen/Generic/div-neg-power-2.ll new file mode 100644 index 0000000..7452c7e --- /dev/null +++ b/test/CodeGen/Generic/div-neg-power-2.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +int %test(int %X) { + %Y = div int %X, -2 + ret int %Y +} diff --git a/test/CodeGen/Generic/fneg-fabs.ll b/test/CodeGen/Generic/fneg-fabs.ll new file mode 100644 index 0000000..3dc4588 --- /dev/null +++ b/test/CodeGen/Generic/fneg-fabs.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +double %fneg(double %X) { + %Y = sub double -0.0, %X + ret double %Y +} + +float %fnegf(float %X) { + %Y = sub float -0.0, %X + ret float %Y +} + +declare double %fabs(double) +declare float %fabsf(float) + + +double %fabstest(double %X) { + %Y = call double %fabs(double %X) + ret double %Y +} + +float %fabsftest(float %X) { + %Y = call float %fabsf(float %X) + ret float %Y +} + diff --git a/test/CodeGen/Generic/fp_to_int.ll b/test/CodeGen/Generic/fp_to_int.ll new file mode 100644 index 0000000..a99c5b5 --- /dev/null +++ b/test/CodeGen/Generic/fp_to_int.ll @@ -0,0 +1,67 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +sbyte %test1(double %X) { + %tmp.1 = cast double %X to sbyte + ret sbyte %tmp.1 +} +short %test2(double %X) { + %tmp.1 = cast double %X to short + ret short %tmp.1 +} +int %test3(double %X) { + %tmp.1 = cast double %X to int + ret int %tmp.1 +} +long %test4(double %X) { + %tmp.1 = cast double %X to long + ret long %tmp.1 +} +ubyte %test1u(double %X) { + %tmp.1 = cast double %X to ubyte + ret ubyte %tmp.1 +} +ushort %test2u(double %X) { + %tmp.1 = cast double %X to ushort + ret ushort %tmp.1 +} +uint %test3u(double %X) { + %tmp.1 = cast double %X to uint + ret uint %tmp.1 +} +ulong %test4u(double %X) { + %tmp.1 = cast double %X to ulong + ret ulong %tmp.1 +} + +sbyte %test1f(float %X) { + %tmp.1 = cast float %X to sbyte + ret sbyte %tmp.1 +} +short %test2f(float %X) { + %tmp.1 = cast float %X to short + ret short %tmp.1 +} +int %test3f(float %X) { + %tmp.1 = cast float %X to int + ret int %tmp.1 +} +long %test4f(float %X) { + %tmp.1 = cast float %X to long + ret long %tmp.1 +} +ubyte %test1uf(float %X) { + %tmp.1 = cast float %X to ubyte + ret ubyte %tmp.1 +} +ushort %test2uf(float %X) { + %tmp.1 = cast float %X to ushort + ret ushort %tmp.1 +} +uint %test3uf(float %X) { + %tmp.1 = cast float %X to uint + ret uint %tmp.1 +} +ulong %test4uf(float %X) { + %tmp.1 = cast float %X to ulong + ret ulong %tmp.1 +} diff --git a/test/CodeGen/Generic/fpowi-promote.ll b/test/CodeGen/Generic/fpowi-promote.ll new file mode 100644 index 0000000..55c2d2a --- /dev/null +++ b/test/CodeGen/Generic/fpowi-promote.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc +; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 + +; PR1239 + +define float @test(float %tmp23302331, i32 %tmp23282329 ) { + +%tmp2339 = call float @llvm.powi.f32( float %tmp23302331, i32 %tmp23282329 ) + ret float %tmp2339 +} + +declare float @llvm.powi.f32(float,i32) diff --git a/test/CodeGen/Generic/fwdtwice.ll b/test/CodeGen/Generic/fwdtwice.ll new file mode 100644 index 0000000..ec085ec --- /dev/null +++ b/test/CodeGen/Generic/fwdtwice.ll @@ -0,0 +1,28 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +;; +;; Test the sequence: +;; cast -> setle 0, %cast -> br %cond +;; This sequence should cause the cast value to be forwarded twice, +;; i.e., cast is forwarded to the setle and teh setle is forwarded +;; to the branch. +;; register argument of the "branch-on-register" instruction, i.e., +;; +;; This produces the bogus output instruction: +;; brlez <NULL VALUE>, .L_SumArray_bb3. +;; This came from %bb1 of sumarrray.ll generated from sumarray.c. + + +int %SumArray(int %Num) { + %Num = alloca int + br label %Top +Top: + store int %Num, int * %Num + %reg108 = load int * %Num + %cast1006 = cast int %reg108 to uint + %cond1001 = setle uint %cast1006, 0 + br bool %cond1001, label %bb6, label %Top + +bb6: + ret int 42 +} diff --git a/test/CodeGen/Generic/global-ret0.ll b/test/CodeGen/Generic/global-ret0.ll new file mode 100644 index 0000000..dfe6aef --- /dev/null +++ b/test/CodeGen/Generic/global-ret0.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%g = global int 0 + +int %main() { + %h = load int* %g + ret int %h +} diff --git a/test/CodeGen/Generic/hello.ll b/test/CodeGen/Generic/hello.ll new file mode 100644 index 0000000..d9e9d58 --- /dev/null +++ b/test/CodeGen/Generic/hello.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%.str_1 = internal constant [7 x sbyte] c"hello\0A\00" + +declare int %printf(sbyte*, ...) + +int %main() { + %s = getelementptr [7 x sbyte]* %.str_1, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %s) + ret int 0 +} diff --git a/test/CodeGen/Generic/i128-addsub.ll b/test/CodeGen/Generic/i128-addsub.ll new file mode 100644 index 0000000..10f0acc --- /dev/null +++ b/test/CodeGen/Generic/i128-addsub.ll @@ -0,0 +1,39 @@ +; RUN: llvm-as < %s | llc + +define void @test_add(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { +entry: + %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1] + %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1] + %tmp4 = shl i128 %tmp23, 64 ; <i128> [#uses=1] + %tmp5 = or i128 %tmp4, %tmp1 ; <i128> [#uses=1] + %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1] + %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1] + %tmp11 = shl i128 %tmp89, 64 ; <i128> [#uses=1] + %tmp12 = or i128 %tmp11, %tmp67 ; <i128> [#uses=1] + %tmp15 = add i128 %tmp12, %tmp5 ; <i128> [#uses=2] + %tmp1617 = trunc i128 %tmp15 to i64 ; <i64> [#uses=1] + store i64 %tmp1617, i64* %RL + %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1] + %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1] + store i64 %tmp2122, i64* %RH + ret void +} + +define void @test_sub(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { +entry: + %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1] + %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1] + %tmp4 = shl i128 %tmp23, 64 ; <i128> [#uses=1] + %tmp5 = or i128 %tmp4, %tmp1 ; <i128> [#uses=1] + %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1] + %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1] + %tmp11 = shl i128 %tmp89, 64 ; <i128> [#uses=1] + %tmp12 = or i128 %tmp11, %tmp67 ; <i128> [#uses=1] + %tmp15 = sub i128 %tmp5, %tmp12 ; <i128> [#uses=2] + %tmp1617 = trunc i128 %tmp15 to i64 ; <i64> [#uses=1] + store i64 %tmp1617, i64* %RL + %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1] + %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1] + store i64 %tmp2122, i64* %RH + ret void +} diff --git a/test/CodeGen/Generic/i128-arith.ll b/test/CodeGen/Generic/i128-arith.ll new file mode 100644 index 0000000..9a67084 --- /dev/null +++ b/test/CodeGen/Generic/i128-arith.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc + +define i64 @foo(i64 %x, i64 %y, i32 %amt) { + %tmp0 = zext i64 %x to i128 + %tmp1 = sext i64 %y to i128 + %tmp2 = or i128 %tmp0, %tmp1 + %tmp7 = zext i32 13 to i128 + %tmp3 = lshr i128 %tmp2, %tmp7 + %tmp4 = trunc i128 %tmp3 to i64 + ret i64 %tmp4 +} diff --git a/test/CodeGen/Generic/intrinsics.ll b/test/CodeGen/Generic/intrinsics.ll new file mode 100644 index 0000000..eb3148a --- /dev/null +++ b/test/CodeGen/Generic/intrinsics.ll @@ -0,0 +1,31 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +;; SQRT +declare float %llvm.sqrt.f32(float) +declare double %llvm.sqrt.f64(double) +double %test_sqrt(float %F) { + %G = call float %llvm.sqrt.f32(float %F) + %H = cast float %G to double + %I = call double %llvm.sqrt.f64(double %H) + ret double %I +} + +; SIN +declare float %sinf(float) +declare double %sin(double) +double %test_sin(float %F) { + %G = call float %sinf(float %F) + %H = cast float %G to double + %I = call double %sin(double %H) + ret double %I +} + +; COS +declare float %cosf(float) +declare double %cos(double) +double %test_cos(float %F) { + %G = call float %cosf(float %F) + %H = cast float %G to double + %I = call double %cos(double %H) + ret double %I +} diff --git a/test/CodeGen/Generic/isunord.ll b/test/CodeGen/Generic/isunord.ll new file mode 100644 index 0000000..1495bd0 --- /dev/null +++ b/test/CodeGen/Generic/isunord.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; XFAIL: ia64 + + +declare bool %llvm.isunordered.f64(double, double) + +bool %test(double %X, double %Y) { + %tmp27 = call bool %llvm.isunordered.f64( double %X, double %Y) + ret bool %tmp27 +} diff --git a/test/CodeGen/Generic/llvm-ct-intrinsics.ll b/test/CodeGen/Generic/llvm-ct-intrinsics.ll new file mode 100644 index 0000000..014d261 --- /dev/null +++ b/test/CodeGen/Generic/llvm-ct-intrinsics.ll @@ -0,0 +1,59 @@ +; Make sure this testcase is supported by all code generators +; RUN: llvm-upgrade < %s | llvm-as | llc + +declare ulong %llvm.ctpop.i64(ulong) +declare uint %llvm.ctpop.i32(uint) +declare ushort %llvm.ctpop.i16(ushort) +declare ubyte %llvm.ctpop.i8(ubyte) + +void %ctpoptest(ubyte %A, ushort %B, uint %C, ulong %D, + ubyte *%AP, ushort* %BP, uint* %CP, ulong* %DP) { + %a = call ubyte %llvm.ctpop.i8(ubyte %A) + %b = call ushort %llvm.ctpop.i16(ushort %B) + %c = call uint %llvm.ctpop.i32(uint %C) + %d = call ulong %llvm.ctpop.i64(ulong %D) + + store ubyte %a, ubyte* %AP + store ushort %b, ushort* %BP + store uint %c, uint* %CP + store ulong %d, ulong* %DP + ret void +} + +declare ulong %llvm.ctlz.i64(ulong) +declare uint %llvm.ctlz.i32(uint) +declare ushort %llvm.ctlz.i16(ushort) +declare ubyte %llvm.ctlz.i8(ubyte) + +void %ctlztest(ubyte %A, ushort %B, uint %C, ulong %D, + ubyte *%AP, ushort* %BP, uint* %CP, ulong* %DP) { + %a = call ubyte %llvm.ctlz.i8(ubyte %A) + %b = call ushort %llvm.ctlz.i16(ushort %B) + %c = call uint %llvm.ctlz.i32(uint %C) + %d = call ulong %llvm.ctlz.i64(ulong %D) + + store ubyte %a, ubyte* %AP + store ushort %b, ushort* %BP + store uint %c, uint* %CP + store ulong %d, ulong* %DP + ret void +} + +declare ulong %llvm.cttz.i64(ulong) +declare uint %llvm.cttz.i32(uint) +declare ushort %llvm.cttz.i16(ushort) +declare ubyte %llvm.cttz.i8(ubyte) + +void %cttztest(ubyte %A, ushort %B, uint %C, ulong %D, + ubyte *%AP, ushort* %BP, uint* %CP, ulong* %DP) { + %a = call ubyte %llvm.cttz.i8(ubyte %A) + %b = call ushort %llvm.cttz.i16(ushort %B) + %c = call uint %llvm.cttz.i32(uint %C) + %d = call ulong %llvm.cttz.i64(ulong %D) + + store ubyte %a, ubyte* %AP + store ushort %b, ushort* %BP + store uint %c, uint* %CP + store ulong %d, ulong* %DP + ret void +} diff --git a/test/CodeGen/Generic/negintconst.ll b/test/CodeGen/Generic/negintconst.ll new file mode 100644 index 0000000..020b6bb --- /dev/null +++ b/test/CodeGen/Generic/negintconst.ll @@ -0,0 +1,51 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +; Test that a negative constant smaller than 64 bits (e.g., int) +; is correctly implemented with sign-extension. +; In particular, the current code generated is: +; +; main: +; .L_main_LL_0: +; save %o6, -224, %o6 +; setx .G_fmtArg_1, %o1, %o0 +; setuw 1, %o1 ! i = 1 +; setuw 4294967295, %o3 ! THE BUG: 0x00000000ffffffff +; setsw 0, %i0 +; add %i6, 1999, %o2 ! fval +; add %o1, %g0, %o1 +; add %o0, 0, %o0 +; mulx %o1, %o3, %o1 ! ERROR: 0xffffffff; should be -1 +; add %o1, 3, %o1 ! ERROR: 0x100000002; should be 0x2 +; mulx %o1, 12, %o3 ! +; add %o2, %o3, %o3 ! produces bad address! +; call printf +; nop +; jmpl %i7+8, %g0 +; restore %g0, 0, %g0 +; +; llc produces: +; ioff = 2 fval = 0xffffffff7fffec90 &fval[2] = 0xb7fffeca8 +; instead of: +; ioff = 2 fval = 0xffffffff7fffec90 &fval[2] = 0xffffffff7fffeca8 +; + +%Results = type { float, float, float } + +%fmtArg = internal global [39 x sbyte] c"ioff = %u\09fval = 0x%p\09&fval[2] = 0x%p\0A\00"; <[39 x sbyte]*> [#uses=1] + +implementation + +declare int "printf"(sbyte*, ...) + +int "main"() +begin + %fval = alloca %Results, uint 4 + %i = add uint 1, 0 ; i = 1 + %iscale = mul uint %i, 4294967295 ; i*-1 = -1 + %ioff = add uint %iscale, 3 ; 3+(-i) = 2 + %ioff = cast uint %ioff to long + %fptr = getelementptr %Results* %fval, long %ioff ; &fval[2] + %castFmt = getelementptr [39 x sbyte]* %fmtArg, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %castFmt, uint %ioff, %Results* %fval, %Results* %fptr) + ret int 0 +end diff --git a/test/CodeGen/Generic/nested-select.ll b/test/CodeGen/Generic/nested-select.ll new file mode 100644 index 0000000..192d29f --- /dev/null +++ b/test/CodeGen/Generic/nested-select.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -o /dev/null -f + +; Test that select of a select works + +%typedef.tree = type opaque + +implementation + +int %ic_test(double %p.0.2.0.val, double %p.0.2.1.val, double %p.0.2.2.val, %typedef.tree* %t) { + %result.1.0 = cast bool false to int ; <int> [#uses=1] + %tmp.55 = setge double 0.000000e+00, 1.000000e+00 ; <bool> [#uses=1] + %tmp.66 = div double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1] + br label %N +N: + %result.1.1 = select bool %tmp.55, int 0, int %result.1.0 ; <int> [#uses=1] + %tmp.75 = setge double %tmp.66, 1.000000e+00 ; <bool> [#uses=1] + %retval1 = select bool %tmp.75, int 0, int %result.1.1 ; <int> [#uses=1] + ret int %retval1 +} + diff --git a/test/CodeGen/Generic/phi-immediate-factoring.ll b/test/CodeGen/Generic/phi-immediate-factoring.ll new file mode 100644 index 0000000..cec1b43 --- /dev/null +++ b/test/CodeGen/Generic/phi-immediate-factoring.ll @@ -0,0 +1,54 @@ +; PR1296 +; RUN: llvm-as < %s | llc -march=x86 | grep {movl \$1} | wc -l | grep 1 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define i32 @foo(i32 %A, i32 %B, i32 %C) { +entry: + switch i32 %A, label %out [ + i32 1, label %bb + i32 0, label %bb13 + i32 2, label %bb35 + ] + +bb: ; preds = %cond_next, %entry + %i.144.1 = phi i32 [ 0, %entry ], [ %tmp7, %cond_next ] ; <i32> [#uses=2] + %tmp4 = and i32 %i.144.1, %B ; <i32> [#uses=1] + icmp eq i32 %tmp4, 0 ; <i1>:0 [#uses=1] + br i1 %0, label %cond_next, label %out + +cond_next: ; preds = %bb + %tmp7 = add i32 %i.144.1, 1 ; <i32> [#uses=2] + icmp slt i32 %tmp7, 1000 ; <i1>:1 [#uses=1] + br i1 %1, label %bb, label %out + +bb13: ; preds = %cond_next18, %entry + %i.248.1 = phi i32 [ 0, %entry ], [ %tmp20, %cond_next18 ] ; <i32> [#uses=2] + %tmp16 = and i32 %i.248.1, %C ; <i32> [#uses=1] + icmp eq i32 %tmp16, 0 ; <i1>:2 [#uses=1] + br i1 %2, label %cond_next18, label %out + +cond_next18: ; preds = %bb13 + %tmp20 = add i32 %i.248.1, 1 ; <i32> [#uses=2] + icmp slt i32 %tmp20, 1000 ; <i1>:3 [#uses=1] + br i1 %3, label %bb13, label %out + +bb27: ; preds = %bb35 + %tmp30 = and i32 %i.3, %C ; <i32> [#uses=1] + icmp eq i32 %tmp30, 0 ; <i1>:4 [#uses=1] + br i1 %4, label %cond_next32, label %out + +cond_next32: ; preds = %bb27 + %indvar.next = add i32 %i.3, 1 ; <i32> [#uses=1] + br label %bb35 + +bb35: ; preds = %entry, %cond_next32 + %i.3 = phi i32 [ %indvar.next, %cond_next32 ], [ 0, %entry ] ; <i32> [#uses=3] + icmp slt i32 %i.3, 1000 ; <i1>:5 [#uses=1] + br i1 %5, label %bb27, label %out + +out: ; preds = %bb27, %bb35, %bb13, %cond_next18, %bb, %cond_next, %entry + %result.0 = phi i32 [ 0, %entry ], [ 1, %bb ], [ 0, %cond_next ], [ 1, %bb13 ], [ 0, %cond_next18 ], [ 1, %bb27 ], [ 0, %bb35 ] ; <i32> [#uses=1] + ret i32 %result.0 +} diff --git a/test/CodeGen/Generic/print-add.ll b/test/CodeGen/Generic/print-add.ll new file mode 100644 index 0000000..ef224a1 --- /dev/null +++ b/test/CodeGen/Generic/print-add.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%.str_1 = internal constant [4 x sbyte] c"%d\0A\00" + +declare int %printf(sbyte*, ...) + +int %main() { + %f = getelementptr [4 x sbyte]* %.str_1, long 0, long 0 + %d = add int 1, 0 + call int (sbyte*, ...)* %printf(sbyte* %f, int %d) + %e = add int 38, 2 + call int (sbyte*, ...)* %printf(sbyte* %f, int %e) + %g = add int %d, %d + %h = add int %e, %g + call int (sbyte*, ...)* %printf(sbyte* %f, int %h) + ret int 0 +} + diff --git a/test/CodeGen/Generic/print-arith-fp.ll b/test/CodeGen/Generic/print-arith-fp.ll new file mode 100644 index 0000000..cfa7583 --- /dev/null +++ b/test/CodeGen/Generic/print-arith-fp.ll @@ -0,0 +1,76 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%a_str = internal constant [8 x sbyte] c"a = %f\0A\00" +%b_str = internal constant [8 x sbyte] c"b = %f\0A\00" +;; binary ops: arith +%add_str = internal constant [12 x sbyte] c"a + b = %f\0A\00" +%sub_str = internal constant [12 x sbyte] c"a - b = %f\0A\00" +%mul_str = internal constant [12 x sbyte] c"a * b = %f\0A\00" +%div_str = internal constant [12 x sbyte] c"b / a = %f\0A\00" +%rem_str = internal constant [13 x sbyte] c"b %% a = %f\0A\00" +;; binary ops: setcc +%lt_str = internal constant [12 x sbyte] c"a < b = %d\0A\00" +%le_str = internal constant [13 x sbyte] c"a <= b = %d\0A\00" +%gt_str = internal constant [12 x sbyte] c"a > b = %d\0A\00" +%ge_str = internal constant [13 x sbyte] c"a >= b = %d\0A\00" +%eq_str = internal constant [13 x sbyte] c"a == b = %d\0A\00" +%ne_str = internal constant [13 x sbyte] c"a != b = %d\0A\00" + +declare int %printf(sbyte*, ...) +%A = global double 2.0 +%B = global double 5.0 + +int %main() { + ;; main vars + %a = load double* %A + %b = load double* %B + + %a_s = getelementptr [8 x sbyte]* %a_str, long 0, long 0 + %b_s = getelementptr [8 x sbyte]* %b_str, long 0, long 0 + + call int (sbyte*, ...)* %printf(sbyte* %a_s, double %a) + call int (sbyte*, ...)* %printf(sbyte* %b_s, double %b) + + ;; arithmetic + %add_r = add double %a, %b + %sub_r = sub double %a, %b + %mul_r = mul double %a, %b + %div_r = div double %b, %a + %rem_r = rem double %b, %a + + %add_s = getelementptr [12 x sbyte]* %add_str, long 0, long 0 + %sub_s = getelementptr [12 x sbyte]* %sub_str, long 0, long 0 + %mul_s = getelementptr [12 x sbyte]* %mul_str, long 0, long 0 + %div_s = getelementptr [12 x sbyte]* %div_str, long 0, long 0 + %rem_s = getelementptr [13 x sbyte]* %rem_str, long 0, long 0 + + call int (sbyte*, ...)* %printf(sbyte* %add_s, double %add_r) + call int (sbyte*, ...)* %printf(sbyte* %sub_s, double %sub_r) + call int (sbyte*, ...)* %printf(sbyte* %mul_s, double %mul_r) + call int (sbyte*, ...)* %printf(sbyte* %div_s, double %div_r) + call int (sbyte*, ...)* %printf(sbyte* %rem_s, double %rem_r) + + ;; setcc + %lt_r = setlt double %a, %b + %le_r = setle double %a, %b + %gt_r = setgt double %a, %b + %ge_r = setge double %a, %b + %eq_r = seteq double %a, %b + %ne_r = setne double %a, %b + + %lt_s = getelementptr [12 x sbyte]* %lt_str, long 0, long 0 + %le_s = getelementptr [13 x sbyte]* %le_str, long 0, long 0 + %gt_s = getelementptr [12 x sbyte]* %gt_str, long 0, long 0 + %ge_s = getelementptr [13 x sbyte]* %ge_str, long 0, long 0 + %eq_s = getelementptr [13 x sbyte]* %eq_str, long 0, long 0 + %ne_s = getelementptr [13 x sbyte]* %ne_str, long 0, long 0 + + call int (sbyte*, ...)* %printf(sbyte* %lt_s, bool %lt_r) + call int (sbyte*, ...)* %printf(sbyte* %le_s, bool %le_r) + call int (sbyte*, ...)* %printf(sbyte* %gt_s, bool %gt_r) + call int (sbyte*, ...)* %printf(sbyte* %ge_s, bool %ge_r) + call int (sbyte*, ...)* %printf(sbyte* %eq_s, bool %eq_r) + call int (sbyte*, ...)* %printf(sbyte* %ne_s, bool %ne_r) + + ret int 0 +} diff --git a/test/CodeGen/Generic/print-arith-int.ll b/test/CodeGen/Generic/print-arith-int.ll new file mode 100644 index 0000000..708abec --- /dev/null +++ b/test/CodeGen/Generic/print-arith-int.ll @@ -0,0 +1,102 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%a_str = internal constant [8 x sbyte] c"a = %d\0A\00" +%b_str = internal constant [8 x sbyte] c"b = %d\0A\00" +;; binary ops: arith +%add_str = internal constant [12 x sbyte] c"a + b = %d\0A\00" +%sub_str = internal constant [12 x sbyte] c"a - b = %d\0A\00" +%mul_str = internal constant [12 x sbyte] c"a * b = %d\0A\00" +%div_str = internal constant [12 x sbyte] c"b / a = %d\0A\00" +%rem_str = internal constant [13 x sbyte] c"b \% a = %d\0A\00" +;; binary ops: setcc +%lt_str = internal constant [12 x sbyte] c"a < b = %d\0A\00" +%le_str = internal constant [13 x sbyte] c"a <= b = %d\0A\00" +%gt_str = internal constant [12 x sbyte] c"a > b = %d\0A\00" +%ge_str = internal constant [13 x sbyte] c"a >= b = %d\0A\00" +%eq_str = internal constant [13 x sbyte] c"a == b = %d\0A\00" +%ne_str = internal constant [13 x sbyte] c"a != b = %d\0A\00" +;; logical +%and_str = internal constant [12 x sbyte] c"a & b = %d\0A\00" +%or_str = internal constant [12 x sbyte] c"a | b = %d\0A\00" +%xor_str = internal constant [12 x sbyte] c"a ^ b = %d\0A\00" +%shl_str = internal constant [13 x sbyte] c"b << a = %d\0A\00" +%shr_str = internal constant [13 x sbyte] c"b >> a = %d\0A\00" + +declare int %printf(sbyte*, ...) +%A = global int 2 +%B = global int 5 + +int %main() { + ;; main vars + %a = load int* %A + %b = load int* %B + + %a_s = getelementptr [8 x sbyte]* %a_str, long 0, long 0 + %b_s = getelementptr [8 x sbyte]* %b_str, long 0, long 0 + + call int (sbyte*, ...)* %printf(sbyte* %a_s, int %a) + call int (sbyte*, ...)* %printf(sbyte* %b_s, int %b) + + ;; arithmetic + %add_r = add int %a, %b + %sub_r = sub int %a, %b + %mul_r = mul int %a, %b + %div_r = div int %b, %a + %rem_r = rem int %b, %a + + %add_s = getelementptr [12 x sbyte]* %add_str, long 0, long 0 + %sub_s = getelementptr [12 x sbyte]* %sub_str, long 0, long 0 + %mul_s = getelementptr [12 x sbyte]* %mul_str, long 0, long 0 + %div_s = getelementptr [12 x sbyte]* %div_str, long 0, long 0 + %rem_s = getelementptr [13 x sbyte]* %rem_str, long 0, long 0 + + call int (sbyte*, ...)* %printf(sbyte* %add_s, int %add_r) + call int (sbyte*, ...)* %printf(sbyte* %sub_s, int %sub_r) + call int (sbyte*, ...)* %printf(sbyte* %mul_s, int %mul_r) + call int (sbyte*, ...)* %printf(sbyte* %div_s, int %div_r) + call int (sbyte*, ...)* %printf(sbyte* %rem_s, int %rem_r) + + ;; setcc + %lt_r = setlt int %a, %b + %le_r = setle int %a, %b + %gt_r = setgt int %a, %b + %ge_r = setge int %a, %b + %eq_r = seteq int %a, %b + %ne_r = setne int %a, %b + + %lt_s = getelementptr [12 x sbyte]* %lt_str, long 0, long 0 + %le_s = getelementptr [13 x sbyte]* %le_str, long 0, long 0 + %gt_s = getelementptr [12 x sbyte]* %gt_str, long 0, long 0 + %ge_s = getelementptr [13 x sbyte]* %ge_str, long 0, long 0 + %eq_s = getelementptr [13 x sbyte]* %eq_str, long 0, long 0 + %ne_s = getelementptr [13 x sbyte]* %ne_str, long 0, long 0 + + call int (sbyte*, ...)* %printf(sbyte* %lt_s, bool %lt_r) + call int (sbyte*, ...)* %printf(sbyte* %le_s, bool %le_r) + call int (sbyte*, ...)* %printf(sbyte* %gt_s, bool %gt_r) + call int (sbyte*, ...)* %printf(sbyte* %ge_s, bool %ge_r) + call int (sbyte*, ...)* %printf(sbyte* %eq_s, bool %eq_r) + call int (sbyte*, ...)* %printf(sbyte* %ne_s, bool %ne_r) + + ;; logical + %and_r = and int %a, %b + %or_r = or int %a, %b + %xor_r = xor int %a, %b + %u = cast int %a to ubyte + %shl_r = shl int %b, ubyte %u + %shr_r = shr int %b, ubyte %u + + %and_s = getelementptr [12 x sbyte]* %and_str, long 0, long 0 + %or_s = getelementptr [12 x sbyte]* %or_str, long 0, long 0 + %xor_s = getelementptr [12 x sbyte]* %xor_str, long 0, long 0 + %shl_s = getelementptr [13 x sbyte]* %shl_str, long 0, long 0 + %shr_s = getelementptr [13 x sbyte]* %shr_str, long 0, long 0 + + call int (sbyte*, ...)* %printf(sbyte* %and_s, int %and_r) + call int (sbyte*, ...)* %printf(sbyte* %or_s, int %or_r) + call int (sbyte*, ...)* %printf(sbyte* %xor_s, int %xor_r) + call int (sbyte*, ...)* %printf(sbyte* %shl_s, int %shl_r) + call int (sbyte*, ...)* %printf(sbyte* %shr_s, int %shr_r) + + ret int 0 +} diff --git a/test/CodeGen/Generic/print-int.ll b/test/CodeGen/Generic/print-int.ll new file mode 100644 index 0000000..27cf637 --- /dev/null +++ b/test/CodeGen/Generic/print-int.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%.str_1 = internal constant [4 x sbyte] c"%d\0A\00" + +declare int %printf(sbyte*, ...) + +int %main() { + %f = getelementptr [4 x sbyte]* %.str_1, long 0, long 0 + %d = add int 0, 0 + %tmp.0 = call int (sbyte*, ...)* %printf(sbyte* %f, int %d) + ret int 0 +} + diff --git a/test/CodeGen/Generic/print-mul-exp.ll b/test/CodeGen/Generic/print-mul-exp.ll new file mode 100644 index 0000000..d5f5f93 --- /dev/null +++ b/test/CodeGen/Generic/print-mul-exp.ll @@ -0,0 +1,57 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%a_str = internal constant [8 x sbyte] c"a = %d\0A\00" +%a_mul_str = internal constant [13 x sbyte] c"a * %d = %d\0A\00" +%A = global int 2 +declare int %printf(sbyte*, ...) + +int %main() { + %a = load int* %A + %a_s = getelementptr [8 x sbyte]* %a_str, long 0, long 0 + %a_mul_s = getelementptr [13 x sbyte]* %a_mul_str, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %a_s, int %a) + + %r_0 = mul int %a, 0 + %r_1 = mul int %a, 1 + %r_2 = mul int %a, 2 + %r_3 = mul int %a, 3 + %r_4 = mul int %a, 4 + %r_5 = mul int %a, 5 + %r_6 = mul int %a, 6 + %r_7 = mul int %a, 7 + %r_8 = mul int %a, 8 + %r_9 = mul int %a, 9 + %r_10 = mul int %a, 10 + %r_11 = mul int %a, 11 + %r_12 = mul int %a, 12 + %r_13 = mul int %a, 13 + %r_14 = mul int %a, 14 + %r_15 = mul int %a, 15 + %r_16 = mul int %a, 16 + %r_17 = mul int %a, 17 + %r_18 = mul int %a, 18 + %r_19 = mul int %a, 19 + + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 0, int %r_0) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 1, int %r_1) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 2, int %r_2) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 3, int %r_3) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 4, int %r_4) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 5, int %r_5) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 6, int %r_6) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 7, int %r_7) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 8, int %r_8) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 9, int %r_9) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 10, int %r_10) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 11, int %r_11) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 12, int %r_12) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 13, int %r_13) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 14, int %r_14) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 15, int %r_15) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 16, int %r_16) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 17, int %r_17) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 18, int %r_18) + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int 19, int %r_19) + + ret int 0 +} diff --git a/test/CodeGen/Generic/print-mul.ll b/test/CodeGen/Generic/print-mul.ll new file mode 100644 index 0000000..911c73e --- /dev/null +++ b/test/CodeGen/Generic/print-mul.ll @@ -0,0 +1,35 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%a_str = internal constant [8 x sbyte] c"a = %d\0A\00" +%b_str = internal constant [8 x sbyte] c"b = %d\0A\00" + +;; mul +%a_mul_str = internal constant [13 x sbyte] c"a * %d = %d\0A\00" + +declare int %printf(sbyte*, ...) +%A = global int 2 +%B = global int 5 + +int %main() { +entry: + %a = load int* %A + %b = load int* %B + %a_s = getelementptr [8 x sbyte]* %a_str, long 0, long 0 + %b_s = getelementptr [8 x sbyte]* %b_str, long 0, long 0 + %a_mul_s = getelementptr [13 x sbyte]* %a_mul_str, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %a_s, int %a) + call int (sbyte*, ...)* %printf(sbyte* %b_s, int %b) + br label %shl_test + +shl_test: + ;; test mul by 0-255 + %s = phi int [ 0, %entry ], [ %s_inc, %shl_test ] + %result = mul int %a, %s + call int (sbyte*, ...)* %printf(sbyte* %a_mul_s, int %s, int %result) + %s_inc = add int %s, 1 + %done = seteq int %s, 256 + br bool %done, label %fini, label %shl_test + +fini: + ret int 0 +} diff --git a/test/CodeGen/Generic/print-shift.ll b/test/CodeGen/Generic/print-shift.ll new file mode 100644 index 0000000..4f699d5 --- /dev/null +++ b/test/CodeGen/Generic/print-shift.ll @@ -0,0 +1,35 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +%a_str = internal constant [8 x sbyte] c"a = %d\0A\00" +%b_str = internal constant [8 x sbyte] c"b = %d\0A\00" + +;; shl +%a_shl_str = internal constant [14 x sbyte] c"a << %d = %d\0A\00" + +declare int %printf(sbyte*, ...) +%A = global int 2 +%B = global int 5 + +int %main() { +entry: + %a = load int* %A + %b = load int* %B + %a_s = getelementptr [8 x sbyte]* %a_str, long 0, long 0 + %b_s = getelementptr [8 x sbyte]* %b_str, long 0, long 0 + %a_shl_s = getelementptr [14 x sbyte]* %a_shl_str, long 0, long 0 + call int (sbyte*, ...)* %printf(sbyte* %a_s, int %a) + call int (sbyte*, ...)* %printf(sbyte* %b_s, int %b) + br label %shl_test + +shl_test: + ;; test left shifts 0-31 + %s = phi ubyte [ 0, %entry ], [ %s_inc, %shl_test ] + %result = shl int %a, ubyte %s + call int (sbyte*, ...)* %printf(sbyte* %a_shl_s, ubyte %s, int %result) + %s_inc = add ubyte %s, 1 + %done = seteq ubyte %s, 32 + br bool %done, label %fini, label %shl_test + +fini: + ret int 0 +} diff --git a/test/CodeGen/Generic/ret0.ll b/test/CodeGen/Generic/ret0.ll new file mode 100644 index 0000000..4d0d10b --- /dev/null +++ b/test/CodeGen/Generic/ret0.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +int %main() { + ret int 0 +} diff --git a/test/CodeGen/Generic/ret42.ll b/test/CodeGen/Generic/ret42.ll new file mode 100644 index 0000000..88d3c98 --- /dev/null +++ b/test/CodeGen/Generic/ret42.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +int %main() { + ret int 42 +} diff --git a/test/CodeGen/Generic/sched.ll b/test/CodeGen/Generic/sched.ll new file mode 100644 index 0000000..ed2f44e --- /dev/null +++ b/test/CodeGen/Generic/sched.ll @@ -0,0 +1,33 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +implementation +declare int "printf"(sbyte*, int, float) + + +int "testissue"(int %i, float %x, float %y) +begin + br label %bb1 +bb1: + %x1 = mul float %x, %y ;; x1 + %y1 = mul float %y, 0.75 ;; y1 + %z1 = add float %x1, %y1 ;; z1 = x1 + y1 + + %x2 = mul float %x, 0.5 ;; x2 + %y2 = mul float %y, 0.9 ;; y2 + %z2 = add float %x2, %y2 ;; z2 = x2 + y2 + + %z3 = add float %z1, %z2 ;; z3 = z1 + z2 + + %i1 = shl int %i, ubyte 3 ;; i1 + %j1 = add int %i, 7 ;; j1 + %m1 = add int %i1, %j1 ;; k1 = i1 + j1 +;; %m1 = div int %k1, 99 ;; m1 = k1 / 99 + + %b = setle int %m1, 6 ;; (m1 <= 6)? + br bool %b, label %bb1, label %bb2 + +bb2: + %Msg = cast ulong 0 to sbyte * + call int %printf(sbyte* %Msg, int %m1, float %z3) + ret int 0 +end diff --git a/test/CodeGen/Generic/select.ll b/test/CodeGen/Generic/select.ll new file mode 100644 index 0000000..edf3641 --- /dev/null +++ b/test/CodeGen/Generic/select.ll @@ -0,0 +1,209 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +%AConst = constant int 123 + +%Domain = type { sbyte*, int, int*, int, int, int*, %Domain* } + +implementation + +; Test setting values of different constants in registers. +; +void "testConsts"(int %N, float %X) +begin +; <label>:0 + %a = add int %N, 1 ; 1 should be put in immed field + %i = add int %N, 12345678 ; constant has to be loaded + %b = add short 4, 3 ; one of the operands shd be immed + %c = add float %X, 0.0 ; will this be optimzzed? + %d = add float %X, 3.1415 ; constant has to be loaded + %f = add uint 4294967295, 10 ; result shd be 9 (not in immed fld) + %g = add ushort 20, 65535 ; result shd be 19 (65536 in immed fld) + %j = add ushort 65535, 30 ; result shd be 29 (not in immed fld) + %h = add ubyte 40, 255 ; result shd be 39 (255 in immed fld) + %k = add ubyte 255, 50 ; result shd be 49 (not in immed fld) + + ret void +end + +; A SetCC whose result is used should produce instructions to +; compute the boolean value in a register. One whose result +; is unused will only generate the condition code but not +; the boolean result. +; +void "unusedBool"(int * %x, int * %y) +begin +; <label>:0 ; [#uses=0] + seteq int * %x, %y ; <bool>:0 [#uses=1] + xor bool %0, true ; <bool>:1 [#uses=0] + setne int * %x, %y ; <bool>:2 [#uses=0] + ret void +end + +; A constant argument to a Phi produces a Cast instruction in the +; corresponding predecessor basic block. This checks a few things: +; -- phi arguments coming from the bottom of the same basic block +; (they should not be forward substituted in the machine code!) +; -- code generation for casts of various types +; -- use of immediate fields for integral constants of different sizes +; -- branch on a constant condition +; +void "mergeConstants"(int * %x, int * %y) +begin +; <label>:0 + br label %Top +Top: + phi int [ 0, %0 ], [ 1, %Top ], [ 524288, %Next ] + phi float [ 0.0, %0 ], [ 1.0, %Top ], [ 2.0, %Next ] + phi double [ 0.5, %0 ], [ 1.5, %Top ], [ 2.5, %Next ] + phi bool [ true, %0 ], [ false,%Top ], [ true, %Next ] + br bool true, label %Top, label %Next +Next: + br label %Top +end + + + +; A constant argument to a cast used only once should be forward substituted +; and loaded where needed, which happens is: +; -- User of cast has no immediate field +; -- User of cast has immediate field but constant is too large to fit +; or constant is not resolved until later (e.g., global address) +; -- User of cast uses it as a call arg. or return value so it is an implicit +; use but has to be loaded into a virtual register so that the reg. +; allocator can allocate the appropriate phys. reg. for it +; +int* "castconst"(float) +begin +; <label>:0 + %castbig = cast ulong 99999999 to int + %castsmall = cast ulong 1 to int + %usebig = add int %castbig, %castsmall + + %castglob = cast int* %AConst to long* + %dummyl = load long* %castglob + + %castnull = cast ulong 0 to int* + ret int* %castnull +end + + + +; Test branch-on-comparison-with-zero, in two ways: +; 1. can be folded +; 2. cannot be folded because result of comparison is used twice +; +void "testbool"(int %A, int %B) { + br label %Top +Top: + %D = add int %A, %B + %E = sub int %D, -4 + %C = setle int %E, 0 + br bool %C, label %retlbl, label %loop + +loop: + %F = add int %A, %B + %G = sub int %D, -4 + %D = setle int %G, 0 + %E = xor bool %D, true + br bool %E, label %loop, label %Top + +retlbl: + ret void +end + + +;; Test use of a boolean result in cast operations. +;; Requires converting a condition code result into a 0/1 value in a reg. +;; +implementation + +int %castbool(int %A, int %B) { +bb0: ; [#uses=0] + %cond213 = setlt int %A, %B ; <bool> [#uses=1] + %cast110 = cast bool %cond213 to ubyte ; <ubyte> [#uses=1] + %cast109 = cast ubyte %cast110 to int ; <int> [#uses=1] + ret int %cast109 +} + + +;; Test use of a boolean result in arithmetic and logical operations. +;; Requires converting a condition code result into a 0/1 value in a reg. +;; +bool %boolexpr(bool %b, int %N) { + %b2 = setge int %N, 0 + %b3 = and bool %b, %b2 + ret bool %b3 +} + + +; Test branch on floating point comparison +; +void "testfloatbool"(float %x, float %y) ; Def %0, %1 - float +begin +; <label>:0 + br label %Top +Top: + %p = add float %x, %y ; Def 2 - float + %z = sub float %x, %y ; Def 3 - float + %b = setle float %p, %z ; Def 0 - bool + %c = xor bool %b, true ; Def 1 - bool + br bool %b, label %Top, label %goon +goon: + ret void +end + + +; Test cases where an LLVM instruction requires no machine +; instructions (e.g., cast int* to long). But there are 2 cases: +; 1. If the result register has only a single use and the use is in the +; same basic block, the operand will be copy-propagated during +; instruction selection. +; 2. If the result register has multiple uses or is in a different +; basic block, it cannot (or will not) be copy propagated during +; instruction selection. It will generate a +; copy instruction (add-with-0), but this copy should get coalesced +; away by the register allocator. +; +int "checkForward"(int %N, int* %A) +begin + +bb2: ;;<label> + %reg114 = shl int %N, ubyte 2 ;; + %cast115 = cast int %reg114 to long ;; reg114 will be propagated + %cast116 = cast int* %A to long ;; %A will be propagated + %reg116 = add long %cast116, %cast115 ;; + %castPtr = cast long %reg116 to int* ;; %A will be propagated + %reg118 = load int* %castPtr ;; + %cast117 = cast int %reg118 to long ;; reg118 will be copied 'cos + %reg159 = add long 1234567, %cast117 ;; cast117 has 2 uses, here + %reg160 = add long 7654321, %cast117 ;; and here. + ret int 0 +end + + +; Test case for unary NOT operation constructed from XOR. +; +void "checkNot"(bool %b, int %i) +begin + %notB = xor bool %b, true + %notI = xor int %i, -1 + %F = setge int %notI, 100 + %J = add int %i, %i + %andNotB = and bool %F, %notB ;; should get folded with notB + %andNotI = and int %J, %notI ;; should get folded with notI + + %notB2 = xor bool true, %b ;; should become XNOR + %notI2 = xor int -1, %i ;; should become XNOR + + ret void +end + + +; Test case for folding getelementptr into a load/store +; +int "checkFoldGEP"(%Domain* %D, long %idx) +begin + %reg841 = getelementptr %Domain* %D, long 0, uint 1 + %reg820 = load int* %reg841 + ret int %reg820 +end diff --git a/test/CodeGen/Generic/shift-int64.ll b/test/CodeGen/Generic/shift-int64.ll new file mode 100644 index 0000000..a5ab37d --- /dev/null +++ b/test/CodeGen/Generic/shift-int64.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +long %test_imm(long %X) { + %Y = shr long %X, ubyte 17 + ret long %Y +} + +long %test_variable(long %X, ubyte %Amt) { + %Y = shr long %X, ubyte %Amt + ret long %Y +} diff --git a/test/CodeGen/Generic/spillccr.ll b/test/CodeGen/Generic/spillccr.ll new file mode 100644 index 0000000..6ae7506 --- /dev/null +++ b/test/CodeGen/Generic/spillccr.ll @@ -0,0 +1,50 @@ +; RUN: llvm-upgrade %s | llvm-as | llc + +; July 6, 2002 -- LLC Regression test +; This test case checks if the integer CC register %xcc (or %ccr) +; is correctly spilled. The code fragment came from function +; MakeGraph in Olden-mst. +; The original code made all comparisons with 0, so that the %xcc +; register is not needed for the branch in the first basic block. +; Replace 0 with 1 in the first comparson so that the +; branch-on-register instruction cannot be used directly, i.e., +; the %xcc register is needed for the first branch. +; + %Graph = type %struct.graph_st* + %Hash = type %struct.hash* + %HashEntry = type %struct.hash_entry* + %Vertex = type %struct.vert_st* + %struct.graph_st = type { [1 x %Vertex] } + %struct.hash = type { %HashEntry*, int (uint)*, int } + %struct.hash_entry = type { uint, sbyte*, %HashEntry } + %struct.vert_st = type { int, %Vertex, %Hash } +%HashRange = uninitialized global int ; <int*> [#uses=1] +%.LC0 = internal global [13 x sbyte] c"Make phase 2\00" ; <[13 x sbyte]*> [#uses=1] +%.LC1 = internal global [13 x sbyte] c"Make phase 3\00" ; <[13 x sbyte]*> [#uses=1] +%.LC2 = internal global [13 x sbyte] c"Make phase 4\00" ; <[13 x sbyte]*> [#uses=1] +%.LC3 = internal global [15 x sbyte] c"Make returning\00" ; <[15 x sbyte]*> [#uses=1] + +implementation ; Functions: + +%Graph %MakeGraph(int %numvert, int %numproc) { +bb1: ;[#uses=1] + %reg111 = add int %numproc, -1 ; <int> [#uses=3] + %cond275 = setlt int %reg111, 1 ; <bool> [#uses=2] + %cond276 = setle int %reg111, 0 ; <bool> [#uses=1] + %cond277 = setge int %numvert, 0 ; <bool> [#uses=2] + %reg162 = add int %numvert, 3 ; <int> [#uses=2] + br bool %cond275, label %bb7, label %bb4 + +bb4: + br bool %cond276, label %bb7, label %bb5 + +bb5: + br bool %cond277, label %bb7, label %bb6 + +bb6: ;[#uses=2] + ret %Graph null + +bb7: ;[#uses=2] + ret %Graph null +} + diff --git a/test/CodeGen/Generic/stacksave-restore.ll b/test/CodeGen/Generic/stacksave-restore.ll new file mode 100644 index 0000000..65cf6c1 --- /dev/null +++ b/test/CodeGen/Generic/stacksave-restore.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +declare sbyte* %llvm.stacksave() +declare void %llvm.stackrestore(sbyte*) + +int *%test(uint %N) { + %tmp = call sbyte* %llvm.stacksave() + %P = alloca int, uint %N + call void %llvm.stackrestore(sbyte* %tmp) + %Q = alloca int, uint %N + ret int* %P +} diff --git a/test/CodeGen/Generic/switch-crit-edge-constant.ll b/test/CodeGen/Generic/switch-crit-edge-constant.ll new file mode 100644 index 0000000..ef986e0 --- /dev/null +++ b/test/CodeGen/Generic/switch-crit-edge-constant.ll @@ -0,0 +1,55 @@ +; PR925 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep mov.*str1 | wc -l | grep 1 + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8.7.2" +%str1 = internal constant [5 x sbyte] c"bonk\00" ; <[5 x sbyte]*> [#uses=1] +%str2 = internal constant [5 x sbyte] c"bork\00" ; <[5 x sbyte]*> [#uses=1] +%str = internal constant [8 x sbyte] c"perfwap\00" ; <[8 x sbyte]*> [#uses=1] + +implementation ; Functions: + +void %foo(int %C) { +entry: + switch int %C, label %bb2 [ + int 1, label %blahaha + int 2, label %blahaha + int 3, label %blahaha + int 4, label %blahaha + int 5, label %blahaha + int 6, label %blahaha + int 7, label %blahaha + int 8, label %blahaha + int 9, label %blahaha + int 10, label %blahaha + ] + +bb2: ; preds = %entry + %tmp5 = and int %C, 123 ; <int> [#uses=1] + %tmp = seteq int %tmp5, 0 ; <bool> [#uses=1] + br bool %tmp, label %blahaha, label %cond_true + +cond_true: ; preds = %bb2 + br label %blahaha + +blahaha: ; preds = %cond_true, %bb2, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry + %s.0 = phi sbyte* [ getelementptr ([8 x sbyte]* %str, int 0, uint 0), %cond_true ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str1, int 0, uint 0), %entry ], [ getelementptr ([5 x sbyte]* %str2, int 0, uint 0), %bb2 ] ; <sbyte*> [#uses=13] + %tmp8 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp10 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp12 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp14 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp16 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp18 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp20 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp22 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp24 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp26 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp28 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp30 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + %tmp32 = tail call int (sbyte*, ...)* %printf( sbyte* %s.0 ) ; <int> [#uses=0] + ret void +} + +declare int %printf(sbyte*, ...) diff --git a/test/CodeGen/Generic/switch-lower-feature-2.ll b/test/CodeGen/Generic/switch-lower-feature-2.ll new file mode 100644 index 0000000..6552cb1 --- /dev/null +++ b/test/CodeGen/Generic/switch-lower-feature-2.ll @@ -0,0 +1,50 @@ +; RUN: llvm-as < %s | llc -march=x86 -o %t -f +; RUN: grep jb %t | wc -l | grep 1 +; RUN: grep \\\$6 %t | wc -l | grep 2 +; RUN: grep 1024 %t | wc -l | grep 1 +; RUN: grep 1023 %t | wc -l | grep 1 +; RUN: grep 119 %t | wc -l | grep 1 +; RUN: grep JTI %t | wc -l | grep 2 +; RUN: grep jg %t | wc -l | grep 1 +; RUN: grep ja %t | wc -l | grep 1 +; RUN: grep js %t | wc -l | grep 1 + +target triple = "i686-pc-linux-gnu" + +define i32 @main(i32 %tmp158) { +entry: + switch i32 %tmp158, label %bb336 [ + i32 -2147483648, label %bb338 + i32 -2147483647, label %bb338 + i32 -2147483646, label %bb338 + i32 120, label %bb338 + i32 121, label %bb339 + i32 122, label %bb340 + i32 123, label %bb341 + i32 124, label %bb342 + i32 125, label %bb343 + i32 126, label %bb336 + i32 1024, label %bb338 + i32 0, label %bb338 + i32 1, label %bb338 + i32 2, label %bb338 + i32 3, label %bb338 + i32 4, label %bb338 + i32 5, label %bb338 + ] +bb336: + ret i32 10 +bb338: + ret i32 11 +bb339: + ret i32 12 +bb340: + ret i32 13 +bb341: + ret i32 14 +bb342: + ret i32 15 +bb343: + ret i32 18 + +} diff --git a/test/CodeGen/Generic/switch-lower-feature.ll b/test/CodeGen/Generic/switch-lower-feature.ll new file mode 100644 index 0000000..71dbc26 --- /dev/null +++ b/test/CodeGen/Generic/switch-lower-feature.ll @@ -0,0 +1,29 @@ +; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$7 | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$6 | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -o - | grep 1024 | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -o - | grep jb | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86 -o - | grep je | wc -l | grep 1 + +define i32 @main(i32 %tmp158) { +entry: + switch i32 %tmp158, label %bb336 [ + i32 120, label %bb338 + i32 121, label %bb338 + i32 122, label %bb338 + i32 123, label %bb338 + i32 124, label %bb338 + i32 125, label %bb338 + i32 126, label %bb338 + i32 1024, label %bb338 + i32 0, label %bb338 + i32 1, label %bb338 + i32 2, label %bb338 + i32 3, label %bb338 + i32 4, label %bb338 + i32 5, label %bb338 + ] +bb336: + ret i32 10 +bb338: + ret i32 11 +} diff --git a/test/CodeGen/Generic/switch-lower.ll b/test/CodeGen/Generic/switch-lower.ll new file mode 100644 index 0000000..b1aad3f --- /dev/null +++ b/test/CodeGen/Generic/switch-lower.ll @@ -0,0 +1,334 @@ +; RUN: llvm-as < %s | llc +; PR1197 + + +define void @exp_attr__expand_n_attribute_reference() { +entry: + br i1 false, label %cond_next954, label %cond_true924 + +cond_true924: ; preds = %entry + ret void + +cond_next954: ; preds = %entry + switch i8 0, label %cleanup7419 [ + i8 1, label %bb956 + i8 2, label %bb1069 + i8 4, label %bb7328 + i8 5, label %bb1267 + i8 8, label %bb1348 + i8 9, label %bb7328 + i8 11, label %bb1439 + i8 12, label %bb1484 + i8 13, label %bb1706 + i8 14, label %bb1783 + i8 17, label %bb1925 + i8 18, label %bb1929 + i8 19, label %bb2240 + i8 25, label %bb2447 + i8 27, label %bb2480 + i8 29, label %bb2590 + i8 30, label %bb2594 + i8 31, label %bb2621 + i8 32, label %bb2664 + i8 33, label %bb2697 + i8 34, label %bb2735 + i8 37, label %bb2786 + i8 38, label %bb2849 + i8 39, label %bb3269 + i8 41, label %bb3303 + i8 42, label %bb3346 + i8 43, label %bb3391 + i8 44, label %bb3395 + i8 50, label %bb3673 + i8 52, label %bb3677 + i8 53, label %bb3693 + i8 54, label %bb7328 + i8 56, label %bb3758 + i8 57, label %bb3787 + i8 64, label %bb5019 + i8 68, label %cond_true4235 + i8 69, label %bb4325 + i8 70, label %bb4526 + i8 72, label %bb4618 + i8 73, label %bb4991 + i8 80, label %bb5012 + i8 82, label %bb5019 + i8 84, label %bb5518 + i8 86, label %bb5752 + i8 87, label %bb5953 + i8 89, label %bb6040 + i8 90, label %bb6132 + i8 92, label %bb6186 + i8 93, label %bb6151 + i8 94, label %bb6155 + i8 97, label %bb6355 + i8 98, label %bb5019 + i8 99, label %bb6401 + i8 101, label %bb5019 + i8 102, label %bb1484 + i8 104, label %bb7064 + i8 105, label %bb7068 + i8 106, label %bb7072 + i8 108, label %bb1065 + i8 109, label %bb1702 + i8 110, label %bb2200 + i8 111, label %bb2731 + i8 112, label %bb2782 + i8 113, label %bb2845 + i8 114, label %bb2875 + i8 115, label %bb3669 + i8 116, label %bb7316 + i8 117, label %bb7316 + i8 118, label %bb3875 + i8 119, label %bb4359 + i8 120, label %bb4987 + i8 121, label %bb5008 + i8 122, label %bb5786 + i8 123, label %bb6147 + i8 124, label %bb6916 + i8 125, label %bb6920 + i8 126, label %bb6955 + i8 127, label %bb6990 + i8 -128, label %bb7027 + i8 -127, label %bb3879 + i8 -126, label %bb4700 + i8 -125, label %bb7076 + i8 -124, label %bb2366 + i8 -123, label %bb2366 + i8 -122, label %bb5490 + ] + +bb956: ; preds = %cond_next954 + ret void + +bb1065: ; preds = %cond_next954 + ret void + +bb1069: ; preds = %cond_next954 + ret void + +bb1267: ; preds = %cond_next954 + ret void + +bb1348: ; preds = %cond_next954 + ret void + +bb1439: ; preds = %cond_next954 + ret void + +bb1484: ; preds = %cond_next954, %cond_next954 + ret void + +bb1702: ; preds = %cond_next954 + ret void + +bb1706: ; preds = %cond_next954 + ret void + +bb1783: ; preds = %cond_next954 + ret void + +bb1925: ; preds = %cond_next954 + ret void + +bb1929: ; preds = %cond_next954 + ret void + +bb2200: ; preds = %cond_next954 + ret void + +bb2240: ; preds = %cond_next954 + ret void + +bb2366: ; preds = %cond_next954, %cond_next954 + ret void + +bb2447: ; preds = %cond_next954 + ret void + +bb2480: ; preds = %cond_next954 + ret void + +bb2590: ; preds = %cond_next954 + ret void + +bb2594: ; preds = %cond_next954 + ret void + +bb2621: ; preds = %cond_next954 + ret void + +bb2664: ; preds = %cond_next954 + ret void + +bb2697: ; preds = %cond_next954 + ret void + +bb2731: ; preds = %cond_next954 + ret void + +bb2735: ; preds = %cond_next954 + ret void + +bb2782: ; preds = %cond_next954 + ret void + +bb2786: ; preds = %cond_next954 + ret void + +bb2845: ; preds = %cond_next954 + ret void + +bb2849: ; preds = %cond_next954 + ret void + +bb2875: ; preds = %cond_next954 + ret void + +bb3269: ; preds = %cond_next954 + ret void + +bb3303: ; preds = %cond_next954 + ret void + +bb3346: ; preds = %cond_next954 + ret void + +bb3391: ; preds = %cond_next954 + ret void + +bb3395: ; preds = %cond_next954 + ret void + +bb3669: ; preds = %cond_next954 + ret void + +bb3673: ; preds = %cond_next954 + ret void + +bb3677: ; preds = %cond_next954 + ret void + +bb3693: ; preds = %cond_next954 + ret void + +bb3758: ; preds = %cond_next954 + ret void + +bb3787: ; preds = %cond_next954 + ret void + +bb3875: ; preds = %cond_next954 + ret void + +bb3879: ; preds = %cond_next954 + ret void + +cond_true4235: ; preds = %cond_next954 + ret void + +bb4325: ; preds = %cond_next954 + ret void + +bb4359: ; preds = %cond_next954 + ret void + +bb4526: ; preds = %cond_next954 + ret void + +bb4618: ; preds = %cond_next954 + ret void + +bb4700: ; preds = %cond_next954 + ret void + +bb4987: ; preds = %cond_next954 + ret void + +bb4991: ; preds = %cond_next954 + ret void + +bb5008: ; preds = %cond_next954 + ret void + +bb5012: ; preds = %cond_next954 + ret void + +bb5019: ; preds = %cond_next954, %cond_next954, %cond_next954, %cond_next954 + ret void + +bb5490: ; preds = %cond_next954 + ret void + +bb5518: ; preds = %cond_next954 + ret void + +bb5752: ; preds = %cond_next954 + ret void + +bb5786: ; preds = %cond_next954 + ret void + +bb5953: ; preds = %cond_next954 + ret void + +bb6040: ; preds = %cond_next954 + ret void + +bb6132: ; preds = %cond_next954 + ret void + +bb6147: ; preds = %cond_next954 + ret void + +bb6151: ; preds = %cond_next954 + ret void + +bb6155: ; preds = %cond_next954 + ret void + +bb6186: ; preds = %cond_next954 + ret void + +bb6355: ; preds = %cond_next954 + ret void + +bb6401: ; preds = %cond_next954 + ret void + +bb6916: ; preds = %cond_next954 + ret void + +bb6920: ; preds = %cond_next954 + ret void + +bb6955: ; preds = %cond_next954 + ret void + +bb6990: ; preds = %cond_next954 + ret void + +bb7027: ; preds = %cond_next954 + ret void + +bb7064: ; preds = %cond_next954 + ret void + +bb7068: ; preds = %cond_next954 + ret void + +bb7072: ; preds = %cond_next954 + ret void + +bb7076: ; preds = %cond_next954 + ret void + +bb7316: ; preds = %cond_next954, %cond_next954 + ret void + +bb7328: ; preds = %cond_next954, %cond_next954, %cond_next954 + ret void + +cleanup7419: ; preds = %cond_next954 + ret void +} diff --git a/test/CodeGen/Generic/vector-constantexpr.ll b/test/CodeGen/Generic/vector-constantexpr.ll new file mode 100644 index 0000000..31b60a4 --- /dev/null +++ b/test/CodeGen/Generic/vector-constantexpr.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void ""(float* %inregs, float* %outregs) { + %a_addr.i = alloca <4 x float> ; <<4 x float>*> [#uses=1] + store <4 x float> < float extractelement (<4 x float> undef, uint 3), float extractelement (<4 x float> undef, uint 0), float extractelement (<4 x float> undef, uint 1), float extractelement (<4 x float> undef, uint 2) >, <4 x float>* %a_addr.i + ret void +} + + + diff --git a/test/CodeGen/Generic/vector-identity-shuffle.ll b/test/CodeGen/Generic/vector-identity-shuffle.ll new file mode 100644 index 0000000..0f7e03b --- /dev/null +++ b/test/CodeGen/Generic/vector-identity-shuffle.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %test(<4 x float> *%tmp2.i) { + %tmp2.i = load <4x float>* %tmp2.i + %xFloat0.48 = extractelement <4 x float> %tmp2.i, uint 0 ; <float> [#uses=1] + %inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, uint 0 ; <<4 x float>> [#uses=1] + %xFloat1.50 = extractelement <4 x float> %tmp2.i, uint 1 ; <float> [#uses=1] + %inFloat1.52 = insertelement <4 x float> %inFloat0.49, float %xFloat1.50, uint 1 ; <<4 x float>> [#uses=1] + %xFloat2.53 = extractelement <4 x float> %tmp2.i, uint 2 ; <float> [#uses=1] + %inFloat2.55 = insertelement <4 x float> %inFloat1.52, float %xFloat2.53, uint 2 ; <<4 x float>> [#uses=1] + %xFloat3.56 = extractelement <4 x float> %tmp2.i, uint 3 ; <float> [#uses=1] + %inFloat3.58 = insertelement <4 x float> %inFloat2.55, float %xFloat3.56, uint 3 ; <<4 x float>> [#uses=4] + store <4 x float> %inFloat3.58, <4x float>* %tmp2.i + ret void +} diff --git a/test/CodeGen/Generic/vector.ll b/test/CodeGen/Generic/vector.ll new file mode 100644 index 0000000..59f554b --- /dev/null +++ b/test/CodeGen/Generic/vector.ll @@ -0,0 +1,156 @@ +; Test that vectors are scalarized/lowered correctly. +; RUN: llvm-upgrade < %s | llvm-as | llc + +%f1 = type <1 x float> +%f2 = type <2 x float> +%f4 = type <4 x float> +%i4 = type <4 x int> +%f8 = type <8 x float> +%d8 = type <8 x double> + +implementation + +;;; TEST HANDLING OF VARIOUS VECTOR SIZES + +void %test_f1(%f1 *%P, %f1* %Q, %f1 *%S) { + %p = load %f1 *%P + %q = load %f1* %Q + %R = add %f1 %p, %q + store %f1 %R, %f1 *%S + ret void +} + +void %test_f2(%f2 *%P, %f2* %Q, %f2 *%S) { + %p = load %f2* %P + %q = load %f2* %Q + %R = add %f2 %p, %q + store %f2 %R, %f2 *%S + ret void +} + +void %test_f4(%f4 *%P, %f4* %Q, %f4 *%S) { + %p = load %f4* %P + %q = load %f4* %Q + %R = add %f4 %p, %q + store %f4 %R, %f4 *%S + ret void +} + +void %test_f8(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = add %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +void %test_fmul(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = mul %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +void %test_div(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = div %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +;;; TEST VECTOR CONSTRUCTS + +void %test_cst(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, <float 0.1, float 1.0, float 2.0, float 4.5> + store %f4 %R, %f4 *%S + ret void +} + +void %test_zero(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, zeroinitializer + store %f4 %R, %f4 *%S + ret void +} + +void %test_undef(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, undef + store %f4 %R, %f4 *%S + ret void +} + +void %test_constant_insert(%f4 *%S) { + %R = insertelement %f4 zeroinitializer, float 10.0, uint 0 + store %f4 %R, %f4 *%S + ret void +} + +void %test_variable_buildvector(float %F, %f4 *%S) { + %R = insertelement %f4 zeroinitializer, float %F, uint 0 + store %f4 %R, %f4 *%S + ret void +} + +void %test_scalar_to_vector(float %F, %f4 *%S) { + %R = insertelement %f4 undef, float %F, uint 0 ;; R = scalar_to_vector F + store %f4 %R, %f4 *%S + ret void +} + +float %test_extract_elt(%f8 *%P) { + %p = load %f8* %P + %R = extractelement %f8 %p, uint 3 + ret float %R +} + +double %test_extract_elt2(%d8 *%P) { + %p = load %d8* %P + %R = extractelement %d8 %p, uint 3 + ret double %R +} + +void %test_cast_1(<4 x float>* %b, <4 x int>* %a) { + %tmp = load <4 x float>* %b + %tmp2 = add <4 x float> %tmp, <float 1.0, float 2.0, float 3.0, float 4.0> + %tmp3 = cast <4 x float> %tmp2 to <4 x int> + %tmp4 = add <4 x int> %tmp3, <int 1, int 2, int 3, int 4> + store <4 x int> %tmp4, <4 x int>* %a + ret void +} + +void %test_cast_2(<8 x float>* %a, <8 x int>* %b) { + %T = load <8 x float>* %a + %T2 = cast <8 x float> %T to <8 x int> + store <8 x int> %T2, <8 x int>* %b + ret void +} + + +;;; TEST IMPORTANT IDIOMS + +void %splat(%f4* %P, %f4* %Q, float %X) { + %tmp = insertelement %f4 undef, float %X, uint 0 + %tmp2 = insertelement %f4 %tmp, float %X, uint 1 + %tmp4 = insertelement %f4 %tmp2, float %X, uint 2 + %tmp6 = insertelement %f4 %tmp4, float %X, uint 3 + %q = load %f4* %Q + %R = add %f4 %q, %tmp6 + store %f4 %R, %f4* %P + ret void +} + +void %splat_i4(%i4* %P, %i4* %Q, int %X) { + %tmp = insertelement %i4 undef, int %X, uint 0 + %tmp2 = insertelement %i4 %tmp, int %X, uint 1 + %tmp4 = insertelement %i4 %tmp2, int %X, uint 2 + %tmp6 = insertelement %i4 %tmp4, int %X, uint 3 + %q = load %i4* %Q + %R = add %i4 %q, %tmp6 + store %i4 %R, %i4* %P + ret void +} + diff --git a/test/CodeGen/IA64/2005-08-22-LegalizerCrash.ll b/test/CodeGen/IA64/2005-08-22-LegalizerCrash.ll new file mode 100644 index 0000000..c160e7f --- /dev/null +++ b/test/CodeGen/IA64/2005-08-22-LegalizerCrash.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ia64 + +%_ZN9__gnu_cxx16__stl_prime_listE = external global [28 x uint] ; <[28 x uint]*> [#uses=3] + +implementation ; Functions: + +fastcc uint* %_ZSt11lower_boundIPKmmET_S2_S2_RKT0_(uint %__val.val) { +entry: + %retval = select bool setgt (int shr (int sub (int cast (uint* getelementptr ([28 x uint]* %_ZN9__gnu_cxx16__stl_prime_listE, int 0, int 28) to int), int cast ([28 x uint]* %_ZN9__gnu_cxx16__stl_prime_listE to int)), ubyte 2), int 0), uint* null, uint* getelementptr ([28 x uint]* %_ZN9__gnu_cxx16__stl_prime_listE, int 0, int 0) ; <uint*> [#uses=1] + ret uint* %retval +} diff --git a/test/CodeGen/IA64/2005-10-29-shladd.ll b/test/CodeGen/IA64/2005-10-29-shladd.ll new file mode 100644 index 0000000..186e5e8 --- /dev/null +++ b/test/CodeGen/IA64/2005-10-29-shladd.ll @@ -0,0 +1,11 @@ +; this should turn into shladd +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ia64 | grep shladd + +implementation ; Functions: + +long %bogglesmoggle(long %X, long %Y) { + %A = shl long %X, ubyte 3 + %B = add long %A, %Y + ret long %B +} + diff --git a/test/CodeGen/IA64/dg.exp b/test/CodeGen/IA64/dg.exp new file mode 100644 index 0000000..32e44b4 --- /dev/null +++ b/test/CodeGen/IA64/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target IA64] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] +} diff --git a/test/CodeGen/IA64/ret-0.ll b/test/CodeGen/IA64/ret-0.ll new file mode 100644 index 0000000..0f5cf89 --- /dev/null +++ b/test/CodeGen/IA64/ret-0.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ia64 + +double %test() { + ret double 0.0 +} diff --git a/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll b/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll new file mode 100644 index 0000000..e2a00d1 --- /dev/null +++ b/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +void %main() { + %tr1 = shr uint 1, ubyte 0 + ret void +} diff --git a/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll b/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll new file mode 100644 index 0000000..4603bdb --- /dev/null +++ b/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +void %main() { + %tr4 = shl ulong 1, ubyte 0 ; <ulong> [#uses=0] + ret void +} diff --git a/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll b/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll new file mode 100644 index 0000000..8f54c78 --- /dev/null +++ b/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +void %main() { + %shamt = add ubyte 0, 1 ; <ubyte> [#uses=1] + %tr2 = shr long 1, ubyte %shamt ; <long> [#uses=0] + ret void +} diff --git a/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll b/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll new file mode 100644 index 0000000..87f6005 --- /dev/null +++ b/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll @@ -0,0 +1,3 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep .comm.*X,0 + +%X = linkonce global {} {} diff --git a/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll b/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll new file mode 100644 index 0000000..5dc4b28 --- /dev/null +++ b/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +int %main() { + %setle = setle long 1, 0 + %select = select bool true, bool %setle, bool true + ret int 0 +} + diff --git a/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll b/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll new file mode 100644 index 0000000..a4121c5 --- /dev/null +++ b/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll @@ -0,0 +1,3 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +long %test() { ret long undef } diff --git a/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll b/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll new file mode 100644 index 0000000..ef0137f --- /dev/null +++ b/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll @@ -0,0 +1,12 @@ +; this should not crash the ppc backend + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +uint %test( int %j.0.0.i) { + %tmp.85.i = and int %j.0.0.i, 7 + %tmp.161278.i = cast int %tmp.85.i to uint + %tmp.5.i77.i = shr uint %tmp.161278.i, ubyte 3 + ret uint %tmp.5.i77.i +} + + diff --git a/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll b/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll new file mode 100644 index 0000000..7bb1317 --- /dev/null +++ b/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll @@ -0,0 +1,10 @@ +; This function should have exactly one call to fixdfdi, no more! + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mattr=-64bit | \ +; RUN: grep {bl .*fixdfdi} | wc -l | grep 1 + +double %test2(double %tmp.7705) { + %mem_tmp.2.0.in = cast double %tmp.7705 to long ; <long> [#uses=1] + %mem_tmp.2.0 = cast long %mem_tmp.2.0.in to double + ret double %mem_tmp.2.0 +} diff --git a/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll b/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll new file mode 100644 index 0000000..edbdc4a --- /dev/null +++ b/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll @@ -0,0 +1,9 @@ +; This was erroneously being turned into an rlwinm instruction. +; The sign bit does matter in this case. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep srawi +int %test(int %X) { + %Y = and int %X, -2 + %Z = shr int %Y, ubyte 11 + ret int %Z +} diff --git a/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll new file mode 100644 index 0000000..4264e9e --- /dev/null +++ b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.2.0" +implementation ; Functions: + +void %bar(int %G, int %E, int %F, int %A, int %B, int %C, int %D, sbyte* %fmt, ...) { + %ap = alloca sbyte* ; <sbyte**> [#uses=2] + call void %llvm.va_start( sbyte** %ap ) + %tmp.1 = load sbyte** %ap ; <sbyte*> [#uses=1] + %tmp.0 = call double %foo( sbyte* %tmp.1 ) ; <double> [#uses=0] + ret void +} + +declare void %llvm.va_start(sbyte**) + +declare double %foo(sbyte*) diff --git a/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll new file mode 100644 index 0000000..c90ef0a --- /dev/null +++ b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc | not grep {, f1} + +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.2.0" + +; Dead argument should reserve an FP register. +double %bar(double %DEAD, double %X, double %Y) { + %tmp.2 = add double %X, %Y + ret double %tmp.2 +} + diff --git a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll new file mode 100644 index 0000000..7700459 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %iterative_hash_host_wide_int() { + %zero = alloca int ; <int*> [#uses=2] + %b = alloca uint ; <uint*> [#uses=1] + store int 0, int* %zero + %tmp = load int* %zero ; <int> [#uses=1] + %tmp5 = cast int %tmp to uint ; <uint> [#uses=1] + %tmp6.u = add uint %tmp5, 32 ; <uint> [#uses=1] + %tmp6 = cast uint %tmp6.u to int ; <int> [#uses=1] + %tmp7 = load long* null ; <long> [#uses=1] + %tmp6 = cast int %tmp6 to ubyte ; <ubyte> [#uses=1] + %tmp8 = shr long %tmp7, ubyte %tmp6 ; <long> [#uses=1] + %tmp8 = cast long %tmp8 to uint ; <uint> [#uses=1] + store uint %tmp8, uint* %b + unreachable +} diff --git a/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll b/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll new file mode 100644 index 0000000..dcf599b --- /dev/null +++ b/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +double %CalcSpeed(float %tmp127) { + %tmp145 = cast float %tmp127 to double ; <double> [#uses=1] + %tmp150 = call double asm "frsqrte $0,$1", "=f,f"( double %tmp145 ) ; <double> [#uses=0] + ret double %tmp150 +} diff --git a/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll new file mode 100644 index 0000000..b4facea --- /dev/null +++ b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ +; RUN: grep {vspltish v.*, 10} + +void %test(<8 x short>* %P) { + %tmp = load <8 x short>* %P ; <<8 x short>> [#uses=1] + %tmp1 = add <8 x short> %tmp, < short 10, short 10, short 10, short 10, short 10, short 10, short 10, short 10 > ; <<8 x short>> [#uses=1] + store <8 x short> %tmp1, <8 x short>* %P + ret void +} diff --git a/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll new file mode 100644 index 0000000..59f7ed4 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll @@ -0,0 +1,72 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 + +void %test(sbyte* %stack) { +entry: + %tmp9 = seteq int 0, 0 ; <bool> [#uses=1] + %tmp30 = seteq uint 0, 0 ; <bool> [#uses=1] + br bool %tmp30, label %cond_next54, label %cond_true31 + +cond_true860: ; preds = %bb855 + %tmp879 = tail call <4 x float> %llvm.ppc.altivec.vmaddfp( <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1] + %tmp880 = cast <4 x float> %tmp879 to <4 x int> ; <<4 x int>> [#uses=2] + %tmp883 = shufflevector <4 x int> %tmp880, <4 x int> undef, <4 x uint> < uint 1, uint 1, uint 1, uint 1 > ; <<4 x int>> [#uses=1] + %tmp883 = cast <4 x int> %tmp883 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp885 = shufflevector <4 x int> %tmp880, <4 x int> undef, <4 x uint> < uint 2, uint 2, uint 2, uint 2 > ; <<4 x int>> [#uses=1] + %tmp885 = cast <4 x int> %tmp885 to <4 x float> ; <<4 x float>> [#uses=1] + br label %cond_next905 + +cond_true31: ; preds = %entry + ret void + +cond_next54: ; preds = %entry + br bool %tmp9, label %cond_false385, label %bb279 + +bb279: ; preds = %cond_next54 + ret void + +cond_false385: ; preds = %cond_next54 + %tmp388 = seteq uint 0, 0 ; <bool> [#uses=1] + br bool %tmp388, label %cond_next463, label %cond_true389 + +cond_true389: ; preds = %cond_false385 + ret void + +cond_next463: ; preds = %cond_false385 + %tmp1208107 = setgt sbyte* null, %stack ; <bool> [#uses=1] + br bool %tmp1208107, label %cond_true1209.preheader, label %bb1212 + +cond_true498: ; preds = %cond_true1209.preheader + ret void + +cond_true519: ; preds = %cond_true1209.preheader + %bothcond = or bool false, false ; <bool> [#uses=1] + br bool %bothcond, label %bb855, label %bb980 + +cond_false548: ; preds = %cond_true1209.preheader + ret void + +bb855: ; preds = %cond_true519 + %tmp859 = seteq int 0, 0 ; <bool> [#uses=1] + br bool %tmp859, label %cond_true860, label %cond_next905 + +cond_next905: ; preds = %bb855, %cond_true860 + %vfpw2.4 = phi <4 x float> [ %tmp885, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0] + %vfpw1.4 = phi <4 x float> [ %tmp883, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0] + %tmp930 = cast <4 x float> zeroinitializer to <4 x int> ; <<4 x int>> [#uses=0] + ret void + +bb980: ; preds = %cond_true519 + ret void + +cond_true1209.preheader: ; preds = %cond_next463 + %tmp496 = and uint 0, 12288 ; <uint> [#uses=1] + switch uint %tmp496, label %cond_false548 [ + uint 0, label %cond_true498 + uint 4096, label %cond_true519 + ] + +bb1212: ; preds = %cond_next463 + ret void +} + +declare <4 x float> %llvm.ppc.altivec.vmaddfp(<4 x float>, <4 x float>, <4 x float>) diff --git a/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll new file mode 100644 index 0000000..6c34cd7 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll @@ -0,0 +1,60 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + + %struct.attr_desc = type { sbyte*, %struct.attr_desc*, %struct.attr_value*, %struct.attr_value*, uint } + %struct.attr_value = type { %struct.rtx_def*, %struct.attr_value*, %struct.insn_ent*, int, int } + %struct.insn_def = type { %struct.insn_def*, %struct.rtx_def*, int, int, int, int, int } + %struct.insn_ent = type { %struct.insn_ent*, %struct.insn_def* } + %struct.rtx_def = type { ushort, ubyte, ubyte, %struct.u } + %struct.u = type { [1 x long] } + +implementation ; Functions: + +void %find_attr() { +entry: + %tmp26 = seteq %struct.attr_desc* null, null ; <bool> [#uses=1] + br bool %tmp26, label %bb30, label %cond_true27 + +cond_true27: ; preds = %entry + ret void + +bb30: ; preds = %entry + %tmp67 = seteq %struct.attr_desc* null, null ; <bool> [#uses=1] + br bool %tmp67, label %cond_next92, label %cond_true68 + +cond_true68: ; preds = %bb30 + ret void + +cond_next92: ; preds = %bb30 + %tmp173 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; <uint*> [#uses=2] + %tmp174 = load uint* %tmp173 ; <uint> [#uses=1] + %tmp177 = and uint %tmp174, 4294967287 ; <uint> [#uses=1] + store uint %tmp177, uint* %tmp173 + %tmp180 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; <uint*> [#uses=1] + %tmp181 = load uint* %tmp180 ; <uint> [#uses=1] + %tmp185 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; <uint*> [#uses=2] + %tmp186 = load uint* %tmp185 ; <uint> [#uses=1] + %tmp183187 = shl uint %tmp181, ubyte 1 ; <uint> [#uses=1] + %tmp188 = and uint %tmp183187, 16 ; <uint> [#uses=1] + %tmp190 = and uint %tmp186, 4294967279 ; <uint> [#uses=1] + %tmp191 = or uint %tmp190, %tmp188 ; <uint> [#uses=1] + store uint %tmp191, uint* %tmp185 + %tmp193 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; <uint*> [#uses=1] + %tmp194 = load uint* %tmp193 ; <uint> [#uses=1] + %tmp198 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; <uint*> [#uses=2] + %tmp199 = load uint* %tmp198 ; <uint> [#uses=1] + %tmp196200 = shl uint %tmp194, ubyte 2 ; <uint> [#uses=1] + %tmp201 = and uint %tmp196200, 64 ; <uint> [#uses=1] + %tmp203 = and uint %tmp199, 4294967231 ; <uint> [#uses=1] + %tmp204 = or uint %tmp203, %tmp201 ; <uint> [#uses=1] + store uint %tmp204, uint* %tmp198 + %tmp206 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; <uint*> [#uses=1] + %tmp207 = load uint* %tmp206 ; <uint> [#uses=1] + %tmp211 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; <uint*> [#uses=2] + %tmp212 = load uint* %tmp211 ; <uint> [#uses=1] + %tmp209213 = shl uint %tmp207, ubyte 1 ; <uint> [#uses=1] + %tmp214 = and uint %tmp209213, 128 ; <uint> [#uses=1] + %tmp216 = and uint %tmp212, 4294967167 ; <uint> [#uses=1] + %tmp217 = or uint %tmp216, %tmp214 ; <uint> [#uses=1] + store uint %tmp217, uint* %tmp211 + ret void +} diff --git a/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll new file mode 100644 index 0000000..1026072 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=powerpc64-apple-darwin | grep extsw | wc -l | grep 2 + +%lens = external global ubyte* +%vals = external global int* + +int %test(int %i) { + %tmp = load ubyte** %lens + %tmp1 = getelementptr ubyte* %tmp, int %i + %tmp = load ubyte* %tmp1 + %tmp2 = cast ubyte %tmp to int + %tmp3 = load int** %vals + %tmp5 = sub int 1, %tmp2 + %tmp6 = getelementptr int* %tmp3, int %tmp5 + %tmp7 = load int* %tmp6 + ret int %tmp7 +} diff --git a/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll new file mode 100644 index 0000000..d71ba5a --- /dev/null +++ b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +void %img2buf(int %symbol_size_in_bytes, ushort* %ui16) { + %tmp93 = load ushort* null ; <ushort> [#uses=1] + %tmp99 = call ushort %llvm.bswap.i16( ushort %tmp93 ) ; <ushort> [#uses=1] + store ushort %tmp99, ushort* %ui16 + ret void +} + +declare ushort %llvm.bswap.i16(ushort) diff --git a/test/CodeGen/PowerPC/2006-08-11-RetVector.ll b/test/CodeGen/PowerPC/2006-08-11-RetVector.ll new file mode 100644 index 0000000..cf0cd2c --- /dev/null +++ b/test/CodeGen/PowerPC/2006-08-11-RetVector.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep vsldoi +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vor + +<4 x float> %func(<4 x float> %fp0, <4 x float> %fp1) { + %tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x uint> < uint 0, uint 1, uint 2, uint 7 > ; <<4 x float>> [#uses=1] + ret <4 x float> %tmp76 +} + diff --git a/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll new file mode 100644 index 0000000..287a79d --- /dev/null +++ b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll @@ -0,0 +1,38 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + + %struct..0anon = type { int } + %struct.rtx_def = type { ushort, ubyte, ubyte, [1 x %struct..0anon] } + +implementation ; Functions: + +fastcc void %immed_double_const(int %i0, int %i1) { +entry: + %tmp1 = load uint* null ; <uint> [#uses=1] + switch uint %tmp1, label %bb103 [ + uint 1, label %bb + uint 3, label %bb + ] + +bb: ; preds = %entry, %entry + %tmp14 = setgt int 0, 31 ; <bool> [#uses=1] + br bool %tmp14, label %cond_next77, label %cond_next17 + +cond_next17: ; preds = %bb + ret void + +cond_next77: ; preds = %bb + %tmp79.not = setne int %i1, 0 ; <bool> [#uses=1] + %tmp84 = setlt int %i0, 0 ; <bool> [#uses=2] + %bothcond1 = or bool %tmp79.not, %tmp84 ; <bool> [#uses=1] + br bool %bothcond1, label %bb88, label %bb99 + +bb88: ; preds = %cond_next77 + %bothcond2 = and bool false, %tmp84 ; <bool> [#uses=0] + ret void + +bb99: ; preds = %cond_next77 + ret void + +bb103: ; preds = %entry + ret void +} diff --git a/test/CodeGen/PowerPC/2006-09-28-shift_64.ll b/test/CodeGen/PowerPC/2006-09-28-shift_64.ll new file mode 100644 index 0000000..58d1f26 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-09-28-shift_64.ll @@ -0,0 +1,27 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 +target endian = big +target pointersize = 64 +target triple = "powerpc64-apple-darwin8" + +implementation ; Functions: + +void %glArrayElement_CompExec() { +entry: + %tmp3 = and ulong 0, 18446744073701163007 ; <ulong> [#uses=1] + br label %cond_true24 + +cond_false: ; preds = %cond_true24 + ret void + +cond_true24: ; preds = %cond_true24, %entry + %indvar.ph = phi uint [ 0, %entry ], [ %indvar.next, %cond_true24 ] ; <uint> [#uses=1] + %indvar = add uint 0, %indvar.ph ; <uint> [#uses=2] + %code.0 = cast uint %indvar to ubyte ; <ubyte> [#uses=1] + %tmp5 = add ubyte %code.0, 16 ; <ubyte> [#uses=1] + %tmp7 = shr ulong %tmp3, ubyte %tmp5 ; <ulong> [#uses=1] + %tmp7 = cast ulong %tmp7 to int ; <int> [#uses=1] + %tmp8 = and int %tmp7, 1 ; <int> [#uses=1] + %tmp8 = seteq int %tmp8, 0 ; <bool> [#uses=1] + %indvar.next = add uint %indvar, 1 ; <uint> [#uses=1] + br bool %tmp8, label %cond_false, label %cond_true24 +} diff --git a/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll new file mode 100644 index 0000000..992e52a --- /dev/null +++ b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -combiner-alias-analysis | grep f5 + +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.2.0" + %struct.Point = type { double, double, double } + +implementation ; Functions: + +void %offset(%struct.Point* %pt, double %x, double %y, double %z) { +entry: + %tmp = getelementptr %struct.Point* %pt, int 0, uint 0 ; <double*> [#uses=2] + %tmp = load double* %tmp ; <double> [#uses=1] + %tmp2 = add double %tmp, %x ; <double> [#uses=1] + store double %tmp2, double* %tmp + %tmp6 = getelementptr %struct.Point* %pt, int 0, uint 1 ; <double*> [#uses=2] + %tmp7 = load double* %tmp6 ; <double> [#uses=1] + %tmp9 = add double %tmp7, %y ; <double> [#uses=1] + store double %tmp9, double* %tmp6 + %tmp13 = getelementptr %struct.Point* %pt, int 0, uint 2 ; <double*> [#uses=2] + %tmp14 = load double* %tmp13 ; <double> [#uses=1] + %tmp16 = add double %tmp14, %z ; <double> [#uses=1] + store double %tmp16, double* %tmp13 + ret void +} diff --git a/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll b/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll new file mode 100644 index 0000000..95b5312 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep IMPLICIT_DEF + +void %foo(long %X) { +entry: + %tmp1 = and long %X, 3 ; <long> [#uses=1] + %tmp = setgt long %tmp1, 2 ; <bool> [#uses=1] + br bool %tmp, label %UnifiedReturnBlock, label %cond_true + +cond_true: ; preds = %entry + %tmp = tail call int (...)* %bar( ) ; <int> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare int %bar(...) + diff --git a/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll b/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll new file mode 100644 index 0000000..397ada7 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep xor + +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.7.0" + +implementation ; Functions: + +void %foo(int %X) { +entry: + %tmp1 = and int %X, 3 ; <int> [#uses=1] + %tmp2 = xor int %tmp1, 1 + %tmp = seteq int %tmp2, 0 ; <bool> [#uses=1] + br bool %tmp, label %UnifiedReturnBlock, label %cond_true + +cond_true: ; preds = %entry + tail call int (...)* %bar( ) ; <int> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare int %bar(...) diff --git a/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll b/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll new file mode 100644 index 0000000..c981c26 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 + +int * %foo(uint %n) { + %A = alloca int, uint %n + ret int* %A +} diff --git a/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll new file mode 100644 index 0000000..a5476eb --- /dev/null +++ b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi + +void %test(short %div.0.i.i.i.i, int %L_num.0.i.i.i.i, int %tmp1.i.i206.i.i, short* %P) { + %X = shl short %div.0.i.i.i.i, ubyte 1 ; <short> [#uses=1] + %tmp28.i.i.i.i = shl int %L_num.0.i.i.i.i, ubyte 1 ; <int> [#uses=2] + %tmp31.i.i.i.i = setlt int %tmp28.i.i.i.i, %tmp1.i.i206.i.i ; <bool> [#uses=2] + + %tmp31.i.i.i.i = cast bool %tmp31.i.i.i.i to short ; <short> [#uses=1] + %tmp371.i.i.i.i1 = or short %tmp31.i.i.i.i, %X ; <short> [#uses=1] + %div.0.be.i.i.i.i = xor short %tmp371.i.i.i.i1, 1 ; <short> [#uses=1] + store short %div.0.be.i.i.i.i, short* %P + ret void +} + diff --git a/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll new file mode 100644 index 0000000..0411eb5 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 + +void %glgRunProcessor15() { + %tmp26355.i = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000 >, <4 x uint> < uint 0, uint 1, uint 2, uint 7 > ; <<4 x float>> [#uses=1] + %tmp3030030304.i = cast <4 x float> %tmp26355.i to <8 x short> ; <<8 x short>> [#uses=1] + %tmp30305.i = shufflevector <8 x short> zeroinitializer, <8 x short> %tmp3030030304.i, <8 x uint> < uint 1, uint 3, uint 5, uint 7, uint 9, uint 11, uint 13, uint 15 > ; <<8 x short>> [#uses=1] + %tmp30305.i = cast <8 x short> %tmp30305.i to <4 x int> ; <<4 x int>> [#uses=1] + store <4 x int> %tmp30305.i, <4 x int>* null + ret void +} diff --git a/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll new file mode 100644 index 0000000..f6103e5 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %bitap() { +entry: + %RMask.i = alloca [256 x uint], align 16 ; <[256 x uint]*> [#uses=1] + %buffer = alloca [147456 x sbyte], align 16 ; <[147456 x sbyte]*> [#uses=0] + br bool false, label %bb19, label %bb.preheader + +bb.preheader: ; preds = %entry + ret void + +bb19: ; preds = %entry + br bool false, label %bb12.i, label %cond_next39 + +bb12.i: ; preds = %bb12.i, %bb19 + %i.0.i = phi uint [ %tmp11.i, %bb12.i ], [ 0, %bb19 ] ; <uint> [#uses=2] + %tmp9.i = getelementptr [256 x uint]* %RMask.i, int 0, uint %i.0.i ; <uint*> [#uses=1] + store uint 0, uint* %tmp9.i + %tmp11.i = add uint %i.0.i, 1 ; <uint> [#uses=1] + br label %bb12.i + +cond_next39: ; preds = %bb19 + ret void +} diff --git a/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll new file mode 100644 index 0000000..6fa410e --- /dev/null +++ b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll @@ -0,0 +1,27 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 +; RUN: llvm-upgrade < %s | llvm-as | llc + +%qsz.b = external global bool ; <bool*> [#uses=1] + +implementation ; Functions: + +fastcc void %qst() { +entry: + br bool true, label %cond_next71, label %cond_true + +cond_true: ; preds = %entry + ret void + +cond_next71: ; preds = %entry + %tmp73.b = load bool* %qsz.b ; <bool> [#uses=1] + %ii.4.ph = select bool %tmp73.b, ulong 4, ulong 0 ; <ulong> [#uses=1] + br label %bb139 + +bb82: ; preds = %bb139 + ret void + +bb139: ; preds = %bb139, %cond_next71 + %exitcond89 = seteq ulong 0, %ii.4.ph ; <bool> [#uses=1] + br bool %exitcond89, label %bb82, label %bb139 +} diff --git a/test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll b/test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll new file mode 100644 index 0000000..19fedf9 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | grep extsb +; RUN: llvm-as < %s | llc -march=ppc32 | grep extsh + +define i32 @p1(i8 %c, i16 %s) { +entry: + %tmp = sext i8 %c to i32 ; <i32> [#uses=1] + %tmp1 = sext i16 %s to i32 ; <i32> [#uses=1] + %tmp2 = add i32 %tmp1, %tmp ; <i32> [#uses=1] + ret i32 %tmp2 +} diff --git a/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll new file mode 100644 index 0000000..d9374ed --- /dev/null +++ b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep cntlzw + +define i32 @foo() { +entry: + %retval = alloca i32, align 4 ; <i32*> [#uses=2] + %temp = alloca i32, align 4 ; <i32*> [#uses=2] + %ctz_x = alloca i32, align 4 ; <i32*> [#uses=3] + %ctz_c = alloca i32, align 4 ; <i32*> [#uses=2] + "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 61440, i32* %ctz_x + %tmp = load i32* %ctz_x ; <i32> [#uses=1] + %tmp1 = sub i32 0, %tmp ; <i32> [#uses=1] + %tmp2 = load i32* %ctz_x ; <i32> [#uses=1] + %tmp3 = and i32 %tmp1, %tmp2 ; <i32> [#uses=1] + %tmp4 = call i32 asm "$(cntlz$|cntlzw$) $0,$1", "=r,r,~{dirflag},~{fpsr},~{flags}"( i32 %tmp3 ) ; <i32> [#uses=1] + store i32 %tmp4, i32* %ctz_c + %tmp5 = load i32* %ctz_c ; <i32> [#uses=1] + store i32 %tmp5, i32* %temp + %tmp6 = load i32* %temp ; <i32> [#uses=1] + store i32 %tmp6, i32* %retval + br label %return + +return: ; preds = %entry + %retval2 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval2 +} diff --git a/test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll b/test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll new file mode 100644 index 0000000..f2c951e --- /dev/null +++ b/test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=ppc32 +; RUN: llvm-as < %s | llc -march=ppc64 + +define i16 @test(i8* %d1, i16* %d2) { + %tmp237 = call i16 asm "lhbrx $0, $2, $1", "=r,r,bO,m"( i8* %d1, i32 0, i16* %d2 ) ; <i16> [#uses=1] + ret i16 %tmp237 +} diff --git a/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll b/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll new file mode 100644 index 0000000..d476462 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=ppc32 +; RUN: llvm-as < %s | llc -march=ppc64 + +; Test two things: 1) that a frameidx can be rewritten in an inline asm +; 2) that inline asms can handle reg+imm addr modes. + + %struct.A = type { i32, i32 } + + +define void @test1() { +entry: + %Out = alloca %struct.A, align 4 ; <%struct.A*> [#uses=1] + %tmp2 = getelementptr %struct.A* %Out, i32 0, i32 1 + %tmp5 = call i32 asm "lwbrx $0, $1", "=r,m"(i32* %tmp2 ) + ret void +} + +define void @test2() { +entry: + %Out = alloca %struct.A, align 4 ; <%struct.A*> [#uses=1] + %tmp2 = getelementptr %struct.A* %Out, i32 0, i32 0 ; <i32*> [#uses=1] + %tmp5 = call i32 asm "lwbrx $0, $2, $1", "=r,r,bO,m"( i8* null, i32 0, i32* %tmp2 ) ; <i32> [#uses=0] + ret void +} diff --git a/test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll b/test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll new file mode 100644 index 0000000..97f6a01 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll @@ -0,0 +1,4 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | \ +; RUN: grep align.*3 + +@X = global <{i32, i32}> <{ i32 1, i32 123 }> diff --git a/test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll b/test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll new file mode 100644 index 0000000..5a3d3b5 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc + +target datalayout = "E-p:32:32" +target triple = "powerpc-apple-darwin8.8.0" + + +define void @blargh() { +entry: + %tmp4 = call i32 asm "rlwimi $0,$2,$3,$4,$5", "=r,0,r,n,n,n"( i32 0, i32 0, i32 0, i32 24, i32 31 ) ; <i32> [#uses=0] + unreachable +} diff --git a/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll b/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll new file mode 100644 index 0000000..3a7d393 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc | grep mflr | wc -l | grep 1 + +target datalayout = "e-p:32:32" +target triple = "powerpc-apple-darwin8" +@str = internal constant [18 x i8] c"hello world!, %d\0A\00" ; <[18 x i8]*> [#uses=1] + + +define i32 @main() { +entry: + %tmp = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([18 x i8]* @str, i32 0, i32 0) ) ; <i32> [#uses=0] + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll new file mode 100644 index 0000000..1ea6174 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=ppc64 -mcpu=g5 | grep cntlzd + +define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) { + %tmp19 = load i64* %t + %tmp23 = tail call i32 @llvm.ctlz.i64( i64 %tmp19 ) ; <i64> [#uses=1] + %tmp89 = add i32 %tmp23, -64 ; <i32> [#uses=1] + %tmp90 = add i32 %tmp89, 0 ; <i32> [#uses=1] + ret i32 %tmp90 +} + +declare i32 @llvm.ctlz.i64(i64) diff --git a/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll new file mode 100644 index 0000000..04ca3bb --- /dev/null +++ b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll @@ -0,0 +1,1801 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 + +define void @test(<4 x float>*, { { i16, i16, i32 } }*) { +xOperationInitMasks.exit: + %.sub7896 = getelementptr [4 x <4 x i32>]* null, i32 0, i32 0 ; <<4 x i32>*> [#uses=24] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 175, i32 3 ; <<4 x float>*>:2 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 2 ; <<4 x float>*>:3 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 3 ; <<4 x float>*>:4 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 1 ; <<4 x float>*>:5 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 2 ; <<4 x float>*>:6 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 3 ; <<4 x float>*>:7 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 1 ; <<4 x float>*>:8 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 2 ; <<4 x float>*>:9 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 3 ; <<4 x float>*>:10 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 171, i32 1 ; <<4 x float>*>:11 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 171, i32 2 ; <<4 x float>*>:12 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 171, i32 3 ; <<4 x float>*>:13 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 170, i32 1 ; <<4 x float>*>:14 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 170, i32 2 ; <<4 x float>*>:15 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 170, i32 3 ; <<4 x float>*>:16 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 169, i32 1 ; <<4 x float>*>:17 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 169, i32 2 ; <<4 x float>*>:18 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 169, i32 3 ; <<4 x float>*>:19 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 168, i32 1 ; <<4 x float>*>:20 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 168, i32 2 ; <<4 x float>*>:21 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 168, i32 3 ; <<4 x float>*>:22 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 167, i32 1 ; <<4 x float>*>:23 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 167, i32 2 ; <<4 x float>*>:24 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 167, i32 3 ; <<4 x float>*>:25 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 166, i32 1 ; <<4 x float>*>:26 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 166, i32 2 ; <<4 x float>*>:27 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 166, i32 3 ; <<4 x float>*>:28 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 165, i32 1 ; <<4 x float>*>:29 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 165, i32 2 ; <<4 x float>*>:30 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 165, i32 3 ; <<4 x float>*>:31 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 164, i32 1 ; <<4 x float>*>:32 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 164, i32 2 ; <<4 x float>*>:33 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 164, i32 3 ; <<4 x float>*>:34 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 163, i32 1 ; <<4 x float>*>:35 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 163, i32 2 ; <<4 x float>*>:36 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 163, i32 3 ; <<4 x float>*>:37 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 162, i32 1 ; <<4 x float>*>:38 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 162, i32 2 ; <<4 x float>*>:39 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 162, i32 3 ; <<4 x float>*>:40 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 161, i32 1 ; <<4 x float>*>:41 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 161, i32 2 ; <<4 x float>*>:42 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 161, i32 3 ; <<4 x float>*>:43 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 160, i32 1 ; <<4 x float>*>:44 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 160, i32 2 ; <<4 x float>*>:45 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 160, i32 3 ; <<4 x float>*>:46 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 159, i32 1 ; <<4 x float>*>:47 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 159, i32 2 ; <<4 x float>*>:48 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 159, i32 3 ; <<4 x float>*>:49 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 158, i32 1 ; <<4 x float>*>:50 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 158, i32 2 ; <<4 x float>*>:51 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 158, i32 3 ; <<4 x float>*>:52 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 157, i32 1 ; <<4 x float>*>:53 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 157, i32 2 ; <<4 x float>*>:54 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 157, i32 3 ; <<4 x float>*>:55 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 156, i32 1 ; <<4 x float>*>:56 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 156, i32 2 ; <<4 x float>*>:57 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 156, i32 3 ; <<4 x float>*>:58 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 155, i32 1 ; <<4 x float>*>:59 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 155, i32 2 ; <<4 x float>*>:60 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 155, i32 3 ; <<4 x float>*>:61 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 154, i32 1 ; <<4 x float>*>:62 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 154, i32 2 ; <<4 x float>*>:63 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 154, i32 3 ; <<4 x float>*>:64 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 153, i32 1 ; <<4 x float>*>:65 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 153, i32 2 ; <<4 x float>*>:66 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 153, i32 3 ; <<4 x float>*>:67 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 152, i32 1 ; <<4 x float>*>:68 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 152, i32 2 ; <<4 x float>*>:69 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 152, i32 3 ; <<4 x float>*>:70 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 151, i32 1 ; <<4 x float>*>:71 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 151, i32 2 ; <<4 x float>*>:72 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 151, i32 3 ; <<4 x float>*>:73 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 150, i32 1 ; <<4 x float>*>:74 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 150, i32 2 ; <<4 x float>*>:75 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 150, i32 3 ; <<4 x float>*>:76 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 149, i32 1 ; <<4 x float>*>:77 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 149, i32 2 ; <<4 x float>*>:78 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 149, i32 3 ; <<4 x float>*>:79 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 148, i32 1 ; <<4 x float>*>:80 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 148, i32 2 ; <<4 x float>*>:81 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 148, i32 3 ; <<4 x float>*>:82 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 147, i32 1 ; <<4 x float>*>:83 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 147, i32 2 ; <<4 x float>*>:84 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 147, i32 3 ; <<4 x float>*>:85 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 146, i32 1 ; <<4 x float>*>:86 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 146, i32 2 ; <<4 x float>*>:87 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 146, i32 3 ; <<4 x float>*>:88 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 145, i32 1 ; <<4 x float>*>:89 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 145, i32 2 ; <<4 x float>*>:90 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 145, i32 3 ; <<4 x float>*>:91 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 144, i32 1 ; <<4 x float>*>:92 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 144, i32 2 ; <<4 x float>*>:93 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 144, i32 3 ; <<4 x float>*>:94 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 143, i32 1 ; <<4 x float>*>:95 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 143, i32 2 ; <<4 x float>*>:96 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 143, i32 3 ; <<4 x float>*>:97 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 142, i32 1 ; <<4 x float>*>:98 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 142, i32 2 ; <<4 x float>*>:99 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 142, i32 3 ; <<4 x float>*>:100 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 141, i32 1 ; <<4 x float>*>:101 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 141, i32 2 ; <<4 x float>*>:102 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 141, i32 3 ; <<4 x float>*>:103 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 140, i32 1 ; <<4 x float>*>:104 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 140, i32 2 ; <<4 x float>*>:105 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 140, i32 3 ; <<4 x float>*>:106 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 139, i32 1 ; <<4 x float>*>:107 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 139, i32 2 ; <<4 x float>*>:108 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 139, i32 3 ; <<4 x float>*>:109 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 138, i32 1 ; <<4 x float>*>:110 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 138, i32 2 ; <<4 x float>*>:111 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 138, i32 3 ; <<4 x float>*>:112 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 137, i32 1 ; <<4 x float>*>:113 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 137, i32 2 ; <<4 x float>*>:114 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 137, i32 3 ; <<4 x float>*>:115 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 136, i32 1 ; <<4 x float>*>:116 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 136, i32 2 ; <<4 x float>*>:117 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 136, i32 3 ; <<4 x float>*>:118 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 135, i32 1 ; <<4 x float>*>:119 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 135, i32 2 ; <<4 x float>*>:120 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 135, i32 3 ; <<4 x float>*>:121 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 134, i32 1 ; <<4 x float>*>:122 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 134, i32 2 ; <<4 x float>*>:123 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 134, i32 3 ; <<4 x float>*>:124 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 133, i32 1 ; <<4 x float>*>:125 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 133, i32 2 ; <<4 x float>*>:126 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 133, i32 3 ; <<4 x float>*>:127 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 132, i32 1 ; <<4 x float>*>:128 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 132, i32 2 ; <<4 x float>*>:129 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 132, i32 3 ; <<4 x float>*>:130 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 131, i32 1 ; <<4 x float>*>:131 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 131, i32 2 ; <<4 x float>*>:132 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 131, i32 3 ; <<4 x float>*>:133 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 130, i32 1 ; <<4 x float>*>:134 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 130, i32 2 ; <<4 x float>*>:135 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 130, i32 3 ; <<4 x float>*>:136 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 129, i32 1 ; <<4 x float>*>:137 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 129, i32 2 ; <<4 x float>*>:138 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 129, i32 3 ; <<4 x float>*>:139 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 128, i32 1 ; <<4 x float>*>:140 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 128, i32 2 ; <<4 x float>*>:141 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 128, i32 3 ; <<4 x float>*>:142 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 127, i32 1 ; <<4 x float>*>:143 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 127, i32 2 ; <<4 x float>*>:144 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 127, i32 3 ; <<4 x float>*>:145 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 126, i32 1 ; <<4 x float>*>:146 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 126, i32 2 ; <<4 x float>*>:147 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 126, i32 3 ; <<4 x float>*>:148 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 125, i32 1 ; <<4 x float>*>:149 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 125, i32 2 ; <<4 x float>*>:150 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 125, i32 3 ; <<4 x float>*>:151 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 124, i32 1 ; <<4 x float>*>:152 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 124, i32 2 ; <<4 x float>*>:153 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 124, i32 3 ; <<4 x float>*>:154 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 123, i32 1 ; <<4 x float>*>:155 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 123, i32 2 ; <<4 x float>*>:156 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 123, i32 3 ; <<4 x float>*>:157 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 122, i32 1 ; <<4 x float>*>:158 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 122, i32 2 ; <<4 x float>*>:159 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 122, i32 3 ; <<4 x float>*>:160 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 121, i32 1 ; <<4 x float>*>:161 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 121, i32 2 ; <<4 x float>*>:162 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 121, i32 3 ; <<4 x float>*>:163 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 120, i32 1 ; <<4 x float>*>:164 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 120, i32 2 ; <<4 x float>*>:165 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 120, i32 3 ; <<4 x float>*>:166 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 119, i32 1 ; <<4 x float>*>:167 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 119, i32 2 ; <<4 x float>*>:168 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 119, i32 3 ; <<4 x float>*>:169 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 118, i32 1 ; <<4 x float>*>:170 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 118, i32 2 ; <<4 x float>*>:171 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 118, i32 3 ; <<4 x float>*>:172 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 117, i32 1 ; <<4 x float>*>:173 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 117, i32 2 ; <<4 x float>*>:174 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 117, i32 3 ; <<4 x float>*>:175 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 116, i32 1 ; <<4 x float>*>:176 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 116, i32 2 ; <<4 x float>*>:177 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 116, i32 3 ; <<4 x float>*>:178 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 115, i32 1 ; <<4 x float>*>:179 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 115, i32 2 ; <<4 x float>*>:180 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 115, i32 3 ; <<4 x float>*>:181 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 114, i32 1 ; <<4 x float>*>:182 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 114, i32 2 ; <<4 x float>*>:183 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 114, i32 3 ; <<4 x float>*>:184 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 113, i32 1 ; <<4 x float>*>:185 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 113, i32 2 ; <<4 x float>*>:186 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 113, i32 3 ; <<4 x float>*>:187 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 112, i32 1 ; <<4 x float>*>:188 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 112, i32 2 ; <<4 x float>*>:189 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 112, i32 3 ; <<4 x float>*>:190 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 111, i32 1 ; <<4 x float>*>:191 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 111, i32 2 ; <<4 x float>*>:192 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 111, i32 3 ; <<4 x float>*>:193 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 110, i32 1 ; <<4 x float>*>:194 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 110, i32 2 ; <<4 x float>*>:195 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 110, i32 3 ; <<4 x float>*>:196 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 109, i32 1 ; <<4 x float>*>:197 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 109, i32 2 ; <<4 x float>*>:198 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 109, i32 3 ; <<4 x float>*>:199 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 108, i32 1 ; <<4 x float>*>:200 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 108, i32 2 ; <<4 x float>*>:201 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 108, i32 3 ; <<4 x float>*>:202 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 107, i32 1 ; <<4 x float>*>:203 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 107, i32 2 ; <<4 x float>*>:204 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 107, i32 3 ; <<4 x float>*>:205 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 106, i32 1 ; <<4 x float>*>:206 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 106, i32 2 ; <<4 x float>*>:207 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 106, i32 3 ; <<4 x float>*>:208 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 105, i32 1 ; <<4 x float>*>:209 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 105, i32 2 ; <<4 x float>*>:210 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 105, i32 3 ; <<4 x float>*>:211 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 104, i32 1 ; <<4 x float>*>:212 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 104, i32 2 ; <<4 x float>*>:213 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 104, i32 3 ; <<4 x float>*>:214 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 103, i32 1 ; <<4 x float>*>:215 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 103, i32 2 ; <<4 x float>*>:216 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 103, i32 3 ; <<4 x float>*>:217 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 102, i32 1 ; <<4 x float>*>:218 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 102, i32 2 ; <<4 x float>*>:219 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 102, i32 3 ; <<4 x float>*>:220 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 101, i32 1 ; <<4 x float>*>:221 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 101, i32 2 ; <<4 x float>*>:222 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 101, i32 3 ; <<4 x float>*>:223 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 100, i32 1 ; <<4 x float>*>:224 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 100, i32 2 ; <<4 x float>*>:225 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 100, i32 3 ; <<4 x float>*>:226 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 99, i32 1 ; <<4 x float>*>:227 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 99, i32 2 ; <<4 x float>*>:228 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 99, i32 3 ; <<4 x float>*>:229 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 98, i32 1 ; <<4 x float>*>:230 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 98, i32 2 ; <<4 x float>*>:231 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 98, i32 3 ; <<4 x float>*>:232 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 97, i32 1 ; <<4 x float>*>:233 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 97, i32 2 ; <<4 x float>*>:234 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 97, i32 3 ; <<4 x float>*>:235 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 96, i32 1 ; <<4 x float>*>:236 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 96, i32 2 ; <<4 x float>*>:237 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 96, i32 3 ; <<4 x float>*>:238 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 95, i32 1 ; <<4 x float>*>:239 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 95, i32 2 ; <<4 x float>*>:240 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 95, i32 3 ; <<4 x float>*>:241 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 94, i32 1 ; <<4 x float>*>:242 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 94, i32 2 ; <<4 x float>*>:243 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 94, i32 3 ; <<4 x float>*>:244 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 93, i32 1 ; <<4 x float>*>:245 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 93, i32 2 ; <<4 x float>*>:246 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 93, i32 3 ; <<4 x float>*>:247 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 92, i32 1 ; <<4 x float>*>:248 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 92, i32 2 ; <<4 x float>*>:249 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 92, i32 3 ; <<4 x float>*>:250 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 91, i32 1 ; <<4 x float>*>:251 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 91, i32 2 ; <<4 x float>*>:252 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 91, i32 3 ; <<4 x float>*>:253 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 90, i32 1 ; <<4 x float>*>:254 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 90, i32 2 ; <<4 x float>*>:255 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 90, i32 3 ; <<4 x float>*>:256 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 89, i32 1 ; <<4 x float>*>:257 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 89, i32 2 ; <<4 x float>*>:258 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 89, i32 3 ; <<4 x float>*>:259 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 88, i32 1 ; <<4 x float>*>:260 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 88, i32 2 ; <<4 x float>*>:261 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 88, i32 3 ; <<4 x float>*>:262 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 87, i32 1 ; <<4 x float>*>:263 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 87, i32 2 ; <<4 x float>*>:264 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 87, i32 3 ; <<4 x float>*>:265 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 86, i32 1 ; <<4 x float>*>:266 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 86, i32 2 ; <<4 x float>*>:267 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 86, i32 3 ; <<4 x float>*>:268 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 85, i32 1 ; <<4 x float>*>:269 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 85, i32 2 ; <<4 x float>*>:270 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 85, i32 3 ; <<4 x float>*>:271 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 84, i32 1 ; <<4 x float>*>:272 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 84, i32 2 ; <<4 x float>*>:273 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 84, i32 3 ; <<4 x float>*>:274 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 83, i32 1 ; <<4 x float>*>:275 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 83, i32 2 ; <<4 x float>*>:276 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 83, i32 3 ; <<4 x float>*>:277 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 82, i32 1 ; <<4 x float>*>:278 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 82, i32 2 ; <<4 x float>*>:279 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 82, i32 3 ; <<4 x float>*>:280 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 81, i32 1 ; <<4 x float>*>:281 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 81, i32 2 ; <<4 x float>*>:282 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 81, i32 3 ; <<4 x float>*>:283 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 80, i32 1 ; <<4 x float>*>:284 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 80, i32 2 ; <<4 x float>*>:285 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 80, i32 3 ; <<4 x float>*>:286 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 79, i32 1 ; <<4 x float>*>:287 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 79, i32 2 ; <<4 x float>*>:288 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 79, i32 3 ; <<4 x float>*>:289 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 78, i32 1 ; <<4 x float>*>:290 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 78, i32 2 ; <<4 x float>*>:291 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 78, i32 3 ; <<4 x float>*>:292 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 77, i32 1 ; <<4 x float>*>:293 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 77, i32 2 ; <<4 x float>*>:294 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 77, i32 3 ; <<4 x float>*>:295 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 76, i32 1 ; <<4 x float>*>:296 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 76, i32 2 ; <<4 x float>*>:297 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 76, i32 3 ; <<4 x float>*>:298 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 75, i32 1 ; <<4 x float>*>:299 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 75, i32 2 ; <<4 x float>*>:300 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 75, i32 3 ; <<4 x float>*>:301 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 74, i32 1 ; <<4 x float>*>:302 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 74, i32 2 ; <<4 x float>*>:303 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 74, i32 3 ; <<4 x float>*>:304 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 73, i32 1 ; <<4 x float>*>:305 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 73, i32 2 ; <<4 x float>*>:306 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 73, i32 3 ; <<4 x float>*>:307 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 72, i32 1 ; <<4 x float>*>:308 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 72, i32 2 ; <<4 x float>*>:309 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 72, i32 3 ; <<4 x float>*>:310 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 71, i32 1 ; <<4 x float>*>:311 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 71, i32 2 ; <<4 x float>*>:312 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 71, i32 3 ; <<4 x float>*>:313 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 70, i32 1 ; <<4 x float>*>:314 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 70, i32 2 ; <<4 x float>*>:315 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 70, i32 3 ; <<4 x float>*>:316 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 69, i32 1 ; <<4 x float>*>:317 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 69, i32 2 ; <<4 x float>*>:318 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 69, i32 3 ; <<4 x float>*>:319 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 68, i32 1 ; <<4 x float>*>:320 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 68, i32 2 ; <<4 x float>*>:321 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 68, i32 3 ; <<4 x float>*>:322 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 67, i32 1 ; <<4 x float>*>:323 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 67, i32 2 ; <<4 x float>*>:324 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 67, i32 3 ; <<4 x float>*>:325 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 66, i32 1 ; <<4 x float>*>:326 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 66, i32 2 ; <<4 x float>*>:327 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 66, i32 3 ; <<4 x float>*>:328 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 65, i32 1 ; <<4 x float>*>:329 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 65, i32 2 ; <<4 x float>*>:330 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 65, i32 3 ; <<4 x float>*>:331 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 64, i32 1 ; <<4 x float>*>:332 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 64, i32 2 ; <<4 x float>*>:333 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 64, i32 3 ; <<4 x float>*>:334 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 63, i32 1 ; <<4 x float>*>:335 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 63, i32 2 ; <<4 x float>*>:336 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 63, i32 3 ; <<4 x float>*>:337 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 62, i32 1 ; <<4 x float>*>:338 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 62, i32 2 ; <<4 x float>*>:339 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 62, i32 3 ; <<4 x float>*>:340 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 61, i32 1 ; <<4 x float>*>:341 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 61, i32 2 ; <<4 x float>*>:342 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 61, i32 3 ; <<4 x float>*>:343 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 60, i32 1 ; <<4 x float>*>:344 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 60, i32 2 ; <<4 x float>*>:345 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 60, i32 3 ; <<4 x float>*>:346 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 59, i32 1 ; <<4 x float>*>:347 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 59, i32 2 ; <<4 x float>*>:348 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 59, i32 3 ; <<4 x float>*>:349 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 58, i32 1 ; <<4 x float>*>:350 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 58, i32 2 ; <<4 x float>*>:351 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 58, i32 3 ; <<4 x float>*>:352 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 57, i32 1 ; <<4 x float>*>:353 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 57, i32 2 ; <<4 x float>*>:354 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 57, i32 3 ; <<4 x float>*>:355 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 56, i32 1 ; <<4 x float>*>:356 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 56, i32 2 ; <<4 x float>*>:357 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 56, i32 3 ; <<4 x float>*>:358 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 55, i32 1 ; <<4 x float>*>:359 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 55, i32 2 ; <<4 x float>*>:360 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 55, i32 3 ; <<4 x float>*>:361 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 54, i32 1 ; <<4 x float>*>:362 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 54, i32 2 ; <<4 x float>*>:363 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 54, i32 3 ; <<4 x float>*>:364 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 53, i32 1 ; <<4 x float>*>:365 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 53, i32 2 ; <<4 x float>*>:366 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 53, i32 3 ; <<4 x float>*>:367 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 52, i32 1 ; <<4 x float>*>:368 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 52, i32 2 ; <<4 x float>*>:369 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 52, i32 3 ; <<4 x float>*>:370 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 51, i32 1 ; <<4 x float>*>:371 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 51, i32 2 ; <<4 x float>*>:372 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 51, i32 3 ; <<4 x float>*>:373 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 50, i32 1 ; <<4 x float>*>:374 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 50, i32 2 ; <<4 x float>*>:375 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 50, i32 3 ; <<4 x float>*>:376 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 49, i32 1 ; <<4 x float>*>:377 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 49, i32 2 ; <<4 x float>*>:378 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 49, i32 3 ; <<4 x float>*>:379 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 48, i32 1 ; <<4 x float>*>:380 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 48, i32 2 ; <<4 x float>*>:381 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 48, i32 3 ; <<4 x float>*>:382 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 47, i32 1 ; <<4 x float>*>:383 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 47, i32 2 ; <<4 x float>*>:384 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 47, i32 3 ; <<4 x float>*>:385 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 46, i32 1 ; <<4 x float>*>:386 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 46, i32 2 ; <<4 x float>*>:387 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 46, i32 3 ; <<4 x float>*>:388 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 45, i32 1 ; <<4 x float>*>:389 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 45, i32 2 ; <<4 x float>*>:390 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 45, i32 3 ; <<4 x float>*>:391 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 44, i32 1 ; <<4 x float>*>:392 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 44, i32 2 ; <<4 x float>*>:393 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 44, i32 3 ; <<4 x float>*>:394 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 43, i32 1 ; <<4 x float>*>:395 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 43, i32 2 ; <<4 x float>*>:396 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 43, i32 3 ; <<4 x float>*>:397 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 42, i32 1 ; <<4 x float>*>:398 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 42, i32 2 ; <<4 x float>*>:399 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 42, i32 3 ; <<4 x float>*>:400 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 41, i32 1 ; <<4 x float>*>:401 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 41, i32 2 ; <<4 x float>*>:402 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 41, i32 3 ; <<4 x float>*>:403 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 40, i32 1 ; <<4 x float>*>:404 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 40, i32 2 ; <<4 x float>*>:405 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 40, i32 3 ; <<4 x float>*>:406 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 39, i32 1 ; <<4 x float>*>:407 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 39, i32 2 ; <<4 x float>*>:408 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 39, i32 3 ; <<4 x float>*>:409 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 38, i32 1 ; <<4 x float>*>:410 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 38, i32 2 ; <<4 x float>*>:411 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 38, i32 3 ; <<4 x float>*>:412 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 37, i32 1 ; <<4 x float>*>:413 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 37, i32 2 ; <<4 x float>*>:414 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 37, i32 3 ; <<4 x float>*>:415 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 36, i32 1 ; <<4 x float>*>:416 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 36, i32 2 ; <<4 x float>*>:417 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 36, i32 3 ; <<4 x float>*>:418 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 35, i32 1 ; <<4 x float>*>:419 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 35, i32 2 ; <<4 x float>*>:420 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 35, i32 3 ; <<4 x float>*>:421 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 34, i32 1 ; <<4 x float>*>:422 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 34, i32 2 ; <<4 x float>*>:423 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 34, i32 3 ; <<4 x float>*>:424 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 33, i32 1 ; <<4 x float>*>:425 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 33, i32 2 ; <<4 x float>*>:426 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 33, i32 3 ; <<4 x float>*>:427 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 32, i32 1 ; <<4 x float>*>:428 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 32, i32 2 ; <<4 x float>*>:429 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 32, i32 3 ; <<4 x float>*>:430 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 31, i32 1 ; <<4 x float>*>:431 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 31, i32 2 ; <<4 x float>*>:432 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 31, i32 3 ; <<4 x float>*>:433 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 30, i32 1 ; <<4 x float>*>:434 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 30, i32 2 ; <<4 x float>*>:435 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 30, i32 3 ; <<4 x float>*>:436 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 29, i32 1 ; <<4 x float>*>:437 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 29, i32 2 ; <<4 x float>*>:438 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 29, i32 3 ; <<4 x float>*>:439 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 28, i32 1 ; <<4 x float>*>:440 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 28, i32 2 ; <<4 x float>*>:441 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 28, i32 3 ; <<4 x float>*>:442 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 27, i32 1 ; <<4 x float>*>:443 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 27, i32 2 ; <<4 x float>*>:444 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 27, i32 3 ; <<4 x float>*>:445 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 26, i32 1 ; <<4 x float>*>:446 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 26, i32 2 ; <<4 x float>*>:447 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 26, i32 3 ; <<4 x float>*>:448 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 25, i32 1 ; <<4 x float>*>:449 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 25, i32 2 ; <<4 x float>*>:450 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 25, i32 3 ; <<4 x float>*>:451 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 24, i32 1 ; <<4 x float>*>:452 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 24, i32 2 ; <<4 x float>*>:453 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 24, i32 3 ; <<4 x float>*>:454 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 23, i32 1 ; <<4 x float>*>:455 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 23, i32 2 ; <<4 x float>*>:456 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 23, i32 3 ; <<4 x float>*>:457 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 22, i32 1 ; <<4 x float>*>:458 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 22, i32 2 ; <<4 x float>*>:459 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 22, i32 3 ; <<4 x float>*>:460 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 21, i32 1 ; <<4 x float>*>:461 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 21, i32 2 ; <<4 x float>*>:462 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 21, i32 3 ; <<4 x float>*>:463 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 20, i32 1 ; <<4 x float>*>:464 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 20, i32 2 ; <<4 x float>*>:465 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 20, i32 3 ; <<4 x float>*>:466 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 19, i32 1 ; <<4 x float>*>:467 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 19, i32 2 ; <<4 x float>*>:468 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 19, i32 3 ; <<4 x float>*>:469 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 18, i32 1 ; <<4 x float>*>:470 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 18, i32 2 ; <<4 x float>*>:471 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 18, i32 3 ; <<4 x float>*>:472 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 17, i32 1 ; <<4 x float>*>:473 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 17, i32 2 ; <<4 x float>*>:474 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 17, i32 3 ; <<4 x float>*>:475 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 16, i32 1 ; <<4 x float>*>:476 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 16, i32 2 ; <<4 x float>*>:477 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 16, i32 3 ; <<4 x float>*>:478 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 15, i32 1 ; <<4 x float>*>:479 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 15, i32 2 ; <<4 x float>*>:480 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 15, i32 3 ; <<4 x float>*>:481 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 14, i32 1 ; <<4 x float>*>:482 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 14, i32 2 ; <<4 x float>*>:483 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 14, i32 3 ; <<4 x float>*>:484 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:485 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:486 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:487 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 1 ; <<4 x float>*>:488 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 2 ; <<4 x float>*>:489 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 3 ; <<4 x float>*>:490 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 180, i32 1 ; <<4 x float>*>:491 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 180, i32 2 ; <<4 x float>*>:492 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 180, i32 3 ; <<4 x float>*>:493 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 181, i32 1 ; <<4 x float>*>:494 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 181, i32 2 ; <<4 x float>*>:495 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 181, i32 3 ; <<4 x float>*>:496 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 182, i32 1 ; <<4 x float>*>:497 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 182, i32 2 ; <<4 x float>*>:498 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 182, i32 3 ; <<4 x float>*>:499 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 183, i32 1 ; <<4 x float>*>:500 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 183, i32 2 ; <<4 x float>*>:501 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 183, i32 3 ; <<4 x float>*>:502 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 184, i32 1 ; <<4 x float>*>:503 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 184, i32 2 ; <<4 x float>*>:504 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 184, i32 3 ; <<4 x float>*>:505 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 185, i32 1 ; <<4 x float>*>:506 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 185, i32 2 ; <<4 x float>*>:507 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 185, i32 3 ; <<4 x float>*>:508 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 190, i32 1 ; <<4 x float>*>:509 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 190, i32 2 ; <<4 x float>*>:510 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 190, i32 3 ; <<4 x float>*>:511 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 9, i32 1 ; <<4 x float>*>:512 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 9, i32 2 ; <<4 x float>*>:513 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 9, i32 3 ; <<4 x float>*>:514 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 10, i32 1 ; <<4 x float>*>:515 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 10, i32 2 ; <<4 x float>*>:516 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 10, i32 3 ; <<4 x float>*>:517 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 11, i32 1 ; <<4 x float>*>:518 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 11, i32 2 ; <<4 x float>*>:519 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 11, i32 3 ; <<4 x float>*>:520 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 12, i32 1 ; <<4 x float>*>:521 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 12, i32 2 ; <<4 x float>*>:522 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 12, i32 3 ; <<4 x float>*>:523 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 13, i32 1 ; <<4 x float>*>:524 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 13, i32 2 ; <<4 x float>*>:525 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 13, i32 3 ; <<4 x float>*>:526 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 1 ; <<4 x float>*>:527 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:528 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:529 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:530 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:531 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:532 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 1 ; <<4 x float>*>:533 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 2 ; <<4 x float>*>:534 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 3 ; <<4 x float>*>:535 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 6, i32 1 ; <<4 x float>*>:536 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 6, i32 2 ; <<4 x float>*>:537 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 6, i32 3 ; <<4 x float>*>:538 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 7, i32 1 ; <<4 x float>*>:539 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 7, i32 2 ; <<4 x float>*>:540 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 7, i32 3 ; <<4 x float>*>:541 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 1 ; <<4 x float>*>:542 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:543 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:544 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 187, i32 1 ; <<4 x float>*>:545 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 187, i32 2 ; <<4 x float>*>:546 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 187, i32 3 ; <<4 x float>*>:547 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 1 ; <<4 x float>*>:548 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 2 ; <<4 x float>*>:549 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 3 ; <<4 x float>*>:550 [#uses=0] + load <4 x float>* null ; <<4 x float>>:551 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 1 ; <<4 x float>*>:552 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 2 ; <<4 x float>*>:553 [#uses=1] + load <4 x float>* %553 ; <<4 x float>>:554 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 3 ; <<4 x float>*>:555 [#uses=0] + shufflevector <4 x float> %554, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:556 [#uses=1] + call <4 x i32> @llvm.ppc.altivec.vcmpgtfp( <4 x float> zeroinitializer, <4 x float> %556 ) ; <<4 x i32>>:557 [#uses=0] + bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:558 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:559 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 2 ; <<4 x float>*>:560 [#uses=1] + store <4 x float> zeroinitializer, <4 x float>* %560 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:561 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:562 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 2 ; <<4 x float>*>:563 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:564 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:565 [#uses=1] + store <4 x float> %565, <4 x float>* null + icmp eq i32 0, 0 ; <i1>:566 [#uses=1] + br i1 %566, label %.critedge, label %xPIF.exit + +.critedge: ; preds = %xOperationInitMasks.exit + getelementptr [4 x <4 x i32>]* null, i32 0, i32 3 ; <<4 x i32>*>:567 [#uses=0] + and <4 x i32> zeroinitializer, zeroinitializer ; <<4 x i32>>:568 [#uses=0] + or <4 x i32> zeroinitializer, zeroinitializer ; <<4 x i32>>:569 [#uses=0] + icmp eq i32 0, 0 ; <i1>:570 [#uses=1] + br i1 %570, label %.critedge7898, label %xPBRK.exit + +.critedge7898: ; preds = %.critedge + br label %xPIF.exit + +xPIF.exit: ; preds = %.critedge7898, %xOperationInitMasks.exit + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 1 ; <<4 x float>*>:571 [#uses=0] + load <4 x float>* null ; <<4 x float>>:572 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:573 [#uses=0] + icmp eq i32 0, 0 ; <i1>:574 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 1 ; <<4 x float>*>:575 [#uses=0] + load <4 x float>* %0 ; <<4 x float>>:576 [#uses=0] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:577 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 0 ; <<4 x float>*>:578 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 1 ; <<4 x float>*>:579 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 2 ; <<4 x float>*>:580 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 3 ; <<4 x float>*>:581 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:582 [#uses=0] + load <4 x float>* null ; <<4 x float>>:583 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:584 [#uses=1] + load <4 x float>* %584 ; <<4 x float>>:585 [#uses=1] + load <4 x float>* null ; <<4 x float>>:586 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:587 [#uses=1] + load <4 x float>* %587 ; <<4 x float>>:588 [#uses=1] + shufflevector <4 x float> %583, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:589 [#uses=1] + shufflevector <4 x float> %585, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:590 [#uses=1] + shufflevector <4 x float> %588, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:591 [#uses=1] + mul <4 x float> zeroinitializer, %589 ; <<4 x float>>:592 [#uses=0] + mul <4 x float> zeroinitializer, %590 ; <<4 x float>>:593 [#uses=0] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:594 [#uses=1] + mul <4 x float> zeroinitializer, %591 ; <<4 x float>>:595 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:596 [#uses=2] + load <4 x float>* %596 ; <<4 x float>>:597 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %596 + load <4 x float>* null ; <<4 x float>>:598 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:599 [#uses=0] + shufflevector <4 x float> %594, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:600 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:601 [#uses=2] + load <4 x float>* %601 ; <<4 x float>>:602 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %601 + load <4 x float>* null ; <<4 x float>>:603 [#uses=0] + load <4 x float>* null ; <<4 x float>>:604 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:605 [#uses=1] + load <4 x float>* %605 ; <<4 x float>>:606 [#uses=1] + sub <4 x float> zeroinitializer, %604 ; <<4 x float>>:607 [#uses=2] + sub <4 x float> zeroinitializer, %606 ; <<4 x float>>:608 [#uses=2] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:609 [#uses=0] + br i1 false, label %617, label %610 + +; <label>:610 ; preds = %xPIF.exit + load <4 x float>* null ; <<4 x float>>:611 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:612 [#uses=2] + load <4 x float>* %612 ; <<4 x float>>:613 [#uses=1] + shufflevector <4 x float> %607, <4 x float> %613, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:614 [#uses=1] + store <4 x float> %614, <4 x float>* %612 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:615 [#uses=2] + load <4 x float>* %615 ; <<4 x float>>:616 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %615 + br label %xST.exit400 + +; <label>:617 ; preds = %xPIF.exit + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:618 [#uses=0] + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:619 [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %619, <4 x i32> zeroinitializer ) ; <i32>:620 [#uses=1] + icmp eq i32 %620, 0 ; <i1>:621 [#uses=1] + br i1 %621, label %625, label %622 + +; <label>:622 ; preds = %617 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:623 [#uses=0] + shufflevector <4 x float> %607, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:624 [#uses=0] + br label %625 + +; <label>:625 ; preds = %622, %617 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:626 [#uses=0] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:627 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:628 [#uses=1] + load <4 x float>* %628 ; <<4 x float>>:629 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:630 [#uses=0] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:631 [#uses=1] + icmp eq i32 %631, 0 ; <i1>:632 [#uses=1] + br i1 %632, label %xST.exit400, label %633 + +; <label>:633 ; preds = %625 + load <4 x float>* null ; <<4 x float>>:634 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %634, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:635 [#uses=1] + store <4 x float> %635, <4 x float>* null + br label %xST.exit400 + +xST.exit400: ; preds = %633, %625, %610 + %.17218 = phi <4 x float> [ zeroinitializer, %610 ], [ %608, %633 ], [ %608, %625 ] ; <<4 x float>> [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 0 ; <<4 x float>*>:636 [#uses=1] + load <4 x float>* %636 ; <<4 x float>>:637 [#uses=0] + load <4 x float>* null ; <<4 x float>>:638 [#uses=2] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:639 [#uses=0] + load <4 x float>* null ; <<4 x float>>:640 [#uses=2] + mul <4 x float> %638, %638 ; <<4 x float>>:641 [#uses=1] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:642 [#uses=0] + mul <4 x float> %640, %640 ; <<4 x float>>:643 [#uses=2] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>>:644 [#uses=0] + shufflevector <4 x float> %643, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>>:645 [#uses=1] + add <4 x float> %645, %643 ; <<4 x float>>:646 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:647 [#uses=1] + shufflevector <4 x float> %641, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:648 [#uses=1] + add <4 x float> zeroinitializer, %647 ; <<4 x float>>:649 [#uses=2] + add <4 x float> zeroinitializer, %648 ; <<4 x float>>:650 [#uses=0] + add <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:651 [#uses=2] + call <4 x float> @llvm.ppc.altivec.vrsqrtefp( <4 x float> %649 ) ; <<4 x float>>:652 [#uses=1] + mul <4 x float> %652, %649 ; <<4 x float>>:653 [#uses=1] + call <4 x float> @llvm.ppc.altivec.vrsqrtefp( <4 x float> %651 ) ; <<4 x float>>:654 [#uses=1] + mul <4 x float> %654, %651 ; <<4 x float>>:655 [#uses=0] + icmp eq i32 0, 0 ; <i1>:656 [#uses=1] + br i1 %656, label %665, label %657 + +; <label>:657 ; preds = %xST.exit400 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:658 [#uses=0] + shufflevector <4 x float> %653, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:659 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:660 [#uses=1] + load <4 x float>* %660 ; <<4 x float>>:661 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:662 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:663 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:664 [#uses=0] + br label %xST.exit402 + +; <label>:665 ; preds = %xST.exit400 + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:666 [#uses=0] + br i1 false, label %669, label %667 + +; <label>:667 ; preds = %665 + load <4 x float>* null ; <<4 x float>>:668 [#uses=0] + br label %669 + +; <label>:669 ; preds = %667, %665 + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:670 [#uses=0] + br label %xST.exit402 + +xST.exit402: ; preds = %669, %657 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:671 [#uses=0] + load <4 x float>* null ; <<4 x float>>:672 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:673 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:674 [#uses=1] + load <4 x float>* %674 ; <<4 x float>>:675 [#uses=1] + load <4 x float>* null ; <<4 x float>>:676 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:677 [#uses=1] + shufflevector <4 x float> %675, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:678 [#uses=1] + mul <4 x float> zeroinitializer, %677 ; <<4 x float>>:679 [#uses=0] + mul <4 x float> zeroinitializer, %678 ; <<4 x float>>:680 [#uses=0] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:681 [#uses=1] + icmp eq i32 0, 0 ; <i1>:682 [#uses=1] + br i1 %682, label %689, label %683 + +; <label>:683 ; preds = %xST.exit402 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 1 ; <<4 x float>*>:684 [#uses=1] + load <4 x float>* %684 ; <<4 x float>>:685 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:686 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:687 [#uses=0] + shufflevector <4 x float> %681, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:688 [#uses=0] + br label %xST.exit405 + +; <label>:689 ; preds = %xST.exit402 + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:690 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:691 [#uses=1] + shufflevector <4 x i32> %691, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:692 [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %692, <4 x i32> zeroinitializer ) ; <i32>:693 [#uses=1] + icmp eq i32 %693, 0 ; <i1>:694 [#uses=0] + br label %xST.exit405 + +xST.exit405: ; preds = %689, %683 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:695 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:696 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:697 [#uses=0] + load <4 x float>* null ; <<4 x float>>:698 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:699 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:700 [#uses=1] + add <4 x float> zeroinitializer, %700 ; <<4 x float>>:701 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:702 [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %702, <4 x i32> zeroinitializer ) ; <i32>:703 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:704 [#uses=2] + load <4 x float>* %704 ; <<4 x float>>:705 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %704 + load <4 x float>* null ; <<4 x float>>:706 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* null + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:707 [#uses=2] + load <4 x float>* %707 ; <<4 x float>>:708 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %707 + load <4 x float>* null ; <<4 x float>>:709 [#uses=0] + load <4 x float>* null ; <<4 x float>>:710 [#uses=0] + load <4 x float>* null ; <<4 x float>>:711 [#uses=1] + shufflevector <4 x float> %711, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:712 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:713 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:714 [#uses=1] + load <4 x float>* %714 ; <<4 x float>>:715 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:716 [#uses=0] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:717 [#uses=1] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:718 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 0 ; <<4 x float>*>:719 [#uses=1] + store <4 x float> zeroinitializer, <4 x float>* %719 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 1 ; <<4 x float>*>:720 [#uses=1] + shufflevector <4 x float> %717, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:721 [#uses=1] + store <4 x float> %721, <4 x float>* %720 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:722 [#uses=1] + load <4 x float>* %722 ; <<4 x float>>:723 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %723, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:724 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:725 [#uses=1] + store <4 x float> zeroinitializer, <4 x float>* %725 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:726 [#uses=1] + load <4 x float>* %726 ; <<4 x float>>:727 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:728 [#uses=1] + load <4 x float>* %728 ; <<4 x float>>:729 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:730 [#uses=1] + load <4 x float>* %730 ; <<4 x float>>:731 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:732 [#uses=1] + load <4 x float>* %732 ; <<4 x float>>:733 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:734 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:735 [#uses=1] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:736 [#uses=1] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:737 [#uses=1] + mul <4 x float> zeroinitializer, %735 ; <<4 x float>>:738 [#uses=1] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:739 [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:740 [#uses=1] + icmp eq i32 %740, 0 ; <i1>:741 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:742 [#uses=2] + load <4 x float>* %742 ; <<4 x float>>:743 [#uses=1] + shufflevector <4 x float> %736, <4 x float> %743, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:744 [#uses=1] + store <4 x float> %744, <4 x float>* %742 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:745 [#uses=1] + load <4 x float>* %745 ; <<4 x float>>:746 [#uses=1] + shufflevector <4 x float> %737, <4 x float> %746, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:747 [#uses=0] + shufflevector <4 x float> %738, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:748 [#uses=1] + store <4 x float> %748, <4 x float>* null + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:749 [#uses=1] + load <4 x float>* %749 ; <<4 x float>>:750 [#uses=1] + shufflevector <4 x float> %739, <4 x float> %750, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:751 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:752 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:753 [#uses=1] + load <4 x float>* %753 ; <<4 x float>>:754 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:755 [#uses=0] + load <4 x float>* null ; <<4 x float>>:756 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:757 [#uses=1] + shufflevector <4 x float> %756, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:758 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:759 [#uses=1] + load <4 x float>* %759 ; <<4 x float>>:760 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:761 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:762 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:763 [#uses=1] + add <4 x float> %757, zeroinitializer ; <<4 x float>>:764 [#uses=0] + add <4 x float> %758, %763 ; <<4 x float>>:765 [#uses=0] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:766 [#uses=1] + br i1 false, label %773, label %767 + +; <label>:767 ; preds = %xST.exit405 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:768 [#uses=0] + load <4 x float>* null ; <<4 x float>>:769 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %769, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:770 [#uses=1] + store <4 x float> %770, <4 x float>* null + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:771 [#uses=1] + load <4 x float>* %771 ; <<4 x float>>:772 [#uses=0] + br label %xST.exit422 + +; <label>:773 ; preds = %xST.exit405 + br label %xST.exit422 + +xST.exit422: ; preds = %773, %767 + %.07267 = phi <4 x float> [ %766, %767 ], [ undef, %773 ] ; <<4 x float>> [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:774 [#uses=0] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:775 [#uses=0] + icmp eq i32 0, 0 ; <i1>:776 [#uses=1] + br i1 %776, label %780, label %777 + +; <label>:777 ; preds = %xST.exit422 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:778 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:779 [#uses=0] + br label %xST.exit431 + +; <label>:780 ; preds = %xST.exit422 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:781 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:782 [#uses=2] + load <4 x float>* %782 ; <<4 x float>>:783 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %782 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:784 [#uses=1] + shufflevector <4 x i32> %784, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:785 [#uses=0] + icmp eq i32 0, 0 ; <i1>:786 [#uses=0] + br label %xST.exit431 + +xST.exit431: ; preds = %780, %777 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:787 [#uses=0] + load <4 x float>* null ; <<4 x float>>:788 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:789 [#uses=2] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %789, <4 x i32> zeroinitializer ) ; <i32>:790 [#uses=1] + icmp eq i32 %790, 0 ; <i1>:791 [#uses=0] + shufflevector <4 x i32> %789, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:792 [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %792, <4 x i32> zeroinitializer ) ; <i32>:793 [#uses=1] + icmp eq i32 %793, 0 ; <i1>:794 [#uses=1] + br i1 %794, label %797, label %795 + +; <label>:795 ; preds = %xST.exit431 + load <4 x float>* null ; <<4 x float>>:796 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* null + br label %797 + +; <label>:797 ; preds = %795, %xST.exit431 + %.07332 = phi <4 x float> [ zeroinitializer, %795 ], [ undef, %xST.exit431 ] ; <<4 x float>> [#uses=0] + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:798 [#uses=0] + br i1 false, label %xST.exit434, label %799 + +; <label>:799 ; preds = %797 + load <4 x float>* null ; <<4 x float>>:800 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* null + br label %xST.exit434 + +xST.exit434: ; preds = %799, %797 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:801 [#uses=1] + shufflevector <4 x i32> %801, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:802 [#uses=0] + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:803 [#uses=0] + icmp eq i32 0, 0 ; <i1>:804 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 0 ; <<4 x float>*>:805 [#uses=1] + load <4 x float>* %805 ; <<4 x float>>:806 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:807 [#uses=1] + load <4 x float>* %807 ; <<4 x float>>:808 [#uses=0] + load <4 x float>* null ; <<4 x float>>:809 [#uses=0] + load <4 x float>* null ; <<4 x float>>:810 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:811 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:812 [#uses=1] + load <4 x float>* %812 ; <<4 x float>>:813 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:814 [#uses=1] + load <4 x float>* %814 ; <<4 x float>>:815 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:816 [#uses=0] + unreachable + +xPBRK.exit: ; preds = %.critedge + store <4 x i32> < i32 -1, i32 -1, i32 -1, i32 -1 >, <4 x i32>* %.sub7896 + store <4 x i32> zeroinitializer, <4 x i32>* null + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 1 ; <<4 x float>*>:817 [#uses=1] + load <4 x float>* %817 ; <<4 x float>>:818 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:819 [#uses=1] + load <4 x float>* %819 ; <<4 x float>>:820 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:821 [#uses=1] + load <4 x float>* %821 ; <<4 x float>>:822 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:823 [#uses=1] + shufflevector <4 x float> %818, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:824 [#uses=1] + shufflevector <4 x float> %820, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:825 [#uses=1] + shufflevector <4 x float> %822, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:826 [#uses=1] + shufflevector <4 x float> %823, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:827 [#uses=0] + shufflevector <4 x float> %824, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:828 [#uses=1] + store <4 x float> %828, <4 x float>* null + load <4 x float>* null ; <<4 x float>>:829 [#uses=1] + shufflevector <4 x float> %825, <4 x float> %829, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:830 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:831 [#uses=2] + load <4 x float>* %831 ; <<4 x float>>:832 [#uses=1] + shufflevector <4 x float> %826, <4 x float> %832, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:833 [#uses=1] + store <4 x float> %833, <4 x float>* %831 + br label %xLS.exit449 + +xLS.exit449: ; preds = %1215, %xPBRK.exit + %.27464 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.17463, %1215 ] ; <<4 x float>> [#uses=2] + %.27469 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.17468, %1215 ] ; <<4 x float>> [#uses=2] + %.27474 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=1] + %.17482 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0] + %.17486 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0] + %.17490 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07489, %1215 ] ; <<4 x float>> [#uses=2] + %.17494 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0] + %.27504 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0] + %.17513 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0] + %.17517 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0] + %.17552 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07551, %1215 ] ; <<4 x float>> [#uses=2] + %.17556 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07555, %1215 ] ; <<4 x float>> [#uses=2] + %.17560 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0] + %.17583 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07582, %1215 ] ; <<4 x float>> [#uses=2] + %.17591 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07590, %1215 ] ; <<4 x float>> [#uses=2] + %.17599 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0] + %.17618 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07617, %1215 ] ; <<4 x float>> [#uses=2] + %.17622 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07621, %1215 ] ; <<4 x float>> [#uses=2] + %.17626 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0] + %.17653 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07652, %1215 ] ; <<4 x float>> [#uses=2] + %.17657 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07656, %1215 ] ; <<4 x float>> [#uses=2] + %.17661 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07660, %1215 ] ; <<4 x float>> [#uses=2] + %.17665 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07664, %1215 ] ; <<4 x float>> [#uses=2] + %.17723 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07722, %1215 ] ; <<4 x float>> [#uses=2] + %.17727 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07726, %1215 ] ; <<4 x float>> [#uses=2] + %.17731 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07730, %1215 ] ; <<4 x float>> [#uses=2] + %.17735 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07734, %1215 ] ; <<4 x float>> [#uses=2] + %.17770 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07769, %1215 ] ; <<4 x float>> [#uses=2] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 0 ; <<4 x float>*>:834 [#uses=0] + load <4 x float>* null ; <<4 x float>>:835 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:836 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:837 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:838 [#uses=0] + shufflevector <4 x float> %835, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:839 [#uses=1] + getelementptr <4 x float>* null, i32 878 ; <<4 x float>*>:840 [#uses=1] + load <4 x float>* %840 ; <<4 x float>>:841 [#uses=0] + call <4 x float> @llvm.ppc.altivec.vcfsx( <4 x i32> zeroinitializer, i32 0 ) ; <<4 x float>>:842 [#uses=1] + shufflevector <4 x float> %842, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:843 [#uses=2] + call <4 x i32> @llvm.ppc.altivec.vcmpgtfp( <4 x float> %843, <4 x float> %839 ) ; <<4 x i32>>:844 [#uses=1] + bitcast <4 x i32> %844 to <4 x float> ; <<4 x float>>:845 [#uses=1] + call <4 x i32> @llvm.ppc.altivec.vcmpgtfp( <4 x float> %843, <4 x float> zeroinitializer ) ; <<4 x i32>>:846 [#uses=0] + bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:847 [#uses=1] + icmp eq i32 0, 0 ; <i1>:848 [#uses=1] + br i1 %848, label %854, label %849 + +; <label>:849 ; preds = %xLS.exit449 + shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:850 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:851 [#uses=1] + store <4 x float> zeroinitializer, <4 x float>* %851 + shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:852 [#uses=1] + store <4 x float> %852, <4 x float>* null + shufflevector <4 x float> %847, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:853 [#uses=0] + br label %xST.exit451 + +; <label>:854 ; preds = %xLS.exit449 + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:855 [#uses=0] + br i1 false, label %859, label %856 + +; <label>:856 ; preds = %854 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:857 [#uses=2] + load <4 x float>* %857 ; <<4 x float>>:858 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %857 + br label %859 + +; <label>:859 ; preds = %856, %854 + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:860 [#uses=0] + br i1 false, label %864, label %861 + +; <label>:861 ; preds = %859 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:862 [#uses=1] + shufflevector <4 x float> %845, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:863 [#uses=1] + store <4 x float> %863, <4 x float>* %862 + br label %864 + +; <label>:864 ; preds = %861, %859 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:865 [#uses=1] + shufflevector <4 x i32> %865, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:866 [#uses=0] + br i1 false, label %868, label %867 + +; <label>:867 ; preds = %864 + store <4 x float> zeroinitializer, <4 x float>* null + br label %868 + +; <label>:868 ; preds = %867, %864 + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:869 [#uses=0] + br label %xST.exit451 + +xST.exit451: ; preds = %868, %849 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:870 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:871 [#uses=0] + load <4 x float>* null ; <<4 x float>>:872 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:873 [#uses=1] + bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:874 [#uses=1] + xor <4 x i32> %874, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>>:875 [#uses=0] + bitcast <4 x float> %873 to <4 x i32> ; <<4 x i32>>:876 [#uses=1] + xor <4 x i32> %876, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>>:877 [#uses=0] + bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:878 [#uses=1] + xor <4 x i32> %878, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>>:879 [#uses=1] + bitcast <4 x i32> %879 to <4 x float> ; <<4 x float>>:880 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:881 [#uses=1] + icmp eq i32 0, 0 ; <i1>:882 [#uses=1] + br i1 %882, label %888, label %883 + +; <label>:883 ; preds = %xST.exit451 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:884 [#uses=1] + store <4 x float> zeroinitializer, <4 x float>* %884 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:885 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:886 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:887 [#uses=0] + br label %xST.exit453 + +; <label>:888 ; preds = %xST.exit451 + shufflevector <4 x i32> %881, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:889 [#uses=0] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:890 [#uses=0] + br i1 false, label %894, label %891 + +; <label>:891 ; preds = %888 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:892 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:893 [#uses=1] + store <4 x float> %893, <4 x float>* %892 + br label %894 + +; <label>:894 ; preds = %891, %888 + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:895 [#uses=1] + icmp eq i32 %895, 0 ; <i1>:896 [#uses=1] + br i1 %896, label %898, label %897 + +; <label>:897 ; preds = %894 + br label %898 + +; <label>:898 ; preds = %897, %894 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:899 [#uses=0] + br i1 false, label %xST.exit453, label %900 + +; <label>:900 ; preds = %898 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:901 [#uses=1] + load <4 x float>* %901 ; <<4 x float>>:902 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %902, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:903 [#uses=0] + br label %xST.exit453 + +xST.exit453: ; preds = %900, %898, %883 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:904 [#uses=0] + load <4 x float>* null ; <<4 x float>>:905 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:906 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:907 [#uses=1] + shufflevector <4 x float> %905, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:908 [#uses=1] + bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:909 [#uses=0] + bitcast <4 x float> %908 to <4 x i32> ; <<4 x i32>>:910 [#uses=0] + bitcast <4 x float> %907 to <4 x i32> ; <<4 x i32>>:911 [#uses=0] + bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:912 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:913 [#uses=0] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 2, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:914 [#uses=0] + br i1 false, label %915, label %xPIF.exit455 + +; <label>:915 ; preds = %xST.exit453 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:916 [#uses=0] + getelementptr [4 x <4 x i32>]* null, i32 0, i32 3 ; <<4 x i32>*>:917 [#uses=1] + store <4 x i32> zeroinitializer, <4 x i32>* %917 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:918 [#uses=1] + and <4 x i32> %918, zeroinitializer ; <<4 x i32>>:919 [#uses=0] + br label %.critedge7899 + +.critedge7899: ; preds = %.critedge7899, %915 + or <4 x i32> zeroinitializer, zeroinitializer ; <<4 x i32>>:920 [#uses=1] + br i1 false, label %.critedge7899, label %xPBRK.exit456 + +xPBRK.exit456: ; preds = %.critedge7899 + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 2, <4 x i32> %920, <4 x i32> zeroinitializer ) ; <i32>:921 [#uses=0] + unreachable + +xPIF.exit455: ; preds = %xST.exit453 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 0 ; <<4 x float>*>:922 [#uses=1] + load <4 x float>* %922 ; <<4 x float>>:923 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 1 ; <<4 x float>*>:924 [#uses=1] + load <4 x float>* %924 ; <<4 x float>>:925 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:926 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:927 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:928 [#uses=0] + bitcast { { i16, i16, i32 } }* %1 to <4 x float>* ; <<4 x float>*>:929 [#uses=0] + bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:930 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:931 [#uses=0] + icmp eq i32 0, 0 ; <i1>:932 [#uses=1] + br i1 %932, label %934, label %933 + +; <label>:933 ; preds = %xPIF.exit455 + store <4 x float> zeroinitializer, <4 x float>* null + br label %934 + +; <label>:934 ; preds = %933, %xPIF.exit455 + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:935 [#uses=0] + icmp eq i32 0, 0 ; <i1>:936 [#uses=1] + br i1 %936, label %xST.exit459, label %937 + +; <label>:937 ; preds = %934 + br label %xST.exit459 + +xST.exit459: ; preds = %937, %934 + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:938 [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %938, <4 x i32> zeroinitializer ) ; <i32>:939 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 2 ; <<4 x float>*>:940 [#uses=1] + store <4 x float> zeroinitializer, <4 x float>* %940 + load <4 x float>* null ; <<4 x float>>:941 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %941, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:942 [#uses=1] + store <4 x float> %942, <4 x float>* null + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:943 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:944 [#uses=0] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:945 [#uses=0] + br i1 false, label %947, label %946 + +; <label>:946 ; preds = %xST.exit459 + br label %947 + +; <label>:947 ; preds = %946, %xST.exit459 + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:948 [#uses=0] + icmp eq i32 0, 0 ; <i1>:949 [#uses=1] + br i1 %949, label %952, label %950 + +; <label>:950 ; preds = %947 + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:951 [#uses=1] + call void @llvm.ppc.altivec.stvewx( <4 x i32> %951, i8* null ) + br label %952 + +; <label>:952 ; preds = %950, %947 + br i1 false, label %955, label %953 + +; <label>:953 ; preds = %952 + getelementptr [4 x <4 x i32>]* null, i32 0, i32 2 ; <<4 x i32>*>:954 [#uses=0] + br label %955 + +; <label>:955 ; preds = %953, %952 + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:956 [#uses=0] + icmp eq i32 0, 0 ; <i1>:957 [#uses=1] + br i1 %957, label %xStoreDestAddressWithMask.exit461, label %958 + +; <label>:958 ; preds = %955 + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:959 [#uses=1] + call void @llvm.ppc.altivec.stvewx( <4 x i32> %959, i8* null ) + br label %xStoreDestAddressWithMask.exit461 + +xStoreDestAddressWithMask.exit461: ; preds = %958, %955 + load <4 x float>* %0 ; <<4 x float>>:960 [#uses=0] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:961 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 0 ; <<4 x float>*>:962 [#uses=0] + br i1 false, label %968, label %xST.exit463 + +xST.exit463: ; preds = %xStoreDestAddressWithMask.exit461 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 1 ; <<4 x float>*>:963 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 2 ; <<4 x float>*>:964 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 3 ; <<4 x float>*>:965 [#uses=0] + load <4 x float>* %0 ; <<4 x float>>:966 [#uses=3] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:967 [#uses=0] + br i1 false, label %972, label %969 + +; <label>:968 ; preds = %xStoreDestAddressWithMask.exit461 + unreachable + +; <label>:969 ; preds = %xST.exit463 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 1 ; <<4 x float>*>:970 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 2 ; <<4 x float>*>:971 [#uses=1] + store <4 x float> %966, <4 x float>* %971 + store <4 x float> %966, <4 x float>* null + br label %xST.exit465 + +; <label>:972 ; preds = %xST.exit463 + call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>>:973 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* null + store <4 x float> zeroinitializer, <4 x float>* null + load <4 x float>* null ; <<4 x float>>:974 [#uses=0] + bitcast <4 x float> %966 to <4 x i32> ; <<4 x i32>>:975 [#uses=1] + call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> zeroinitializer, <4 x i32> %975, <4 x i32> zeroinitializer ) ; <<4 x i32>>:976 [#uses=1] + bitcast <4 x i32> %976 to <4 x float> ; <<4 x float>>:977 [#uses=1] + store <4 x float> %977, <4 x float>* null + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 3 ; <<4 x float>*>:978 [#uses=0] + bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:979 [#uses=1] + call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> %979, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>>:980 [#uses=1] + bitcast <4 x i32> %980 to <4 x float> ; <<4 x float>>:981 [#uses=0] + br label %xST.exit465 + +xST.exit465: ; preds = %972, %969 + load <4 x float>* %0 ; <<4 x float>>:982 [#uses=3] + icmp eq i32 0, 0 ; <i1>:983 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:984 [#uses=1] + br i1 %983, label %989, label %985 + +; <label>:985 ; preds = %xST.exit465 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:986 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:987 [#uses=1] + store <4 x float> %982, <4 x float>* %987 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:988 [#uses=0] + br label %xST.exit467 + +; <label>:989 ; preds = %xST.exit465 + bitcast <4 x float> %982 to <4 x i32> ; <<4 x i32>>:990 [#uses=0] + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:991 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %984 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:992 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:993 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:994 [#uses=0] + bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:995 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:996 [#uses=0] + bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:997 [#uses=1] + bitcast <4 x float> %982 to <4 x i32> ; <<4 x i32>>:998 [#uses=1] + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:999 [#uses=1] + call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> %997, <4 x i32> %998, <4 x i32> %999 ) ; <<4 x i32>>:1000 [#uses=1] + bitcast <4 x i32> %1000 to <4 x float> ; <<4 x float>>:1001 [#uses=0] + br label %xST.exit467 + +xST.exit467: ; preds = %989, %985 + load <4 x float>* %0 ; <<4 x float>>:1002 [#uses=5] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:1003 [#uses=2] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1003, <4 x i32> zeroinitializer ) ; <i32>:1004 [#uses=0] + br i1 false, label %1011, label %1005 + +; <label>:1005 ; preds = %xST.exit467 + load <4 x float>* null ; <<4 x float>>:1006 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:1007 [#uses=1] + load <4 x float>* %1007 ; <<4 x float>>:1008 [#uses=0] + load <4 x float>* null ; <<4 x float>>:1009 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1010 [#uses=0] + br label %xST.exit469 + +; <label>:1011 ; preds = %xST.exit467 + shufflevector <4 x i32> %1003, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:1012 [#uses=0] + icmp eq i32 0, 0 ; <i1>:1013 [#uses=1] + br i1 %1013, label %1015, label %1014 + +; <label>:1014 ; preds = %1011 + br label %1015 + +; <label>:1015 ; preds = %1014, %1011 + %.07472 = phi <4 x float> [ %1002, %1014 ], [ %.27474, %1011 ] ; <<4 x float>> [#uses=0] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:1016 [#uses=1] + icmp eq i32 %1016, 0 ; <i1>:1017 [#uses=1] + br i1 %1017, label %1021, label %1018 + +; <label>:1018 ; preds = %1015 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:1019 [#uses=0] + shufflevector <4 x float> %1002, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:1020 [#uses=0] + br label %1021 + +; <label>:1021 ; preds = %1018, %1015 + %.07467 = phi <4 x float> [ %1002, %1018 ], [ %.27469, %1015 ] ; <<4 x float>> [#uses=2] + icmp eq i32 0, 0 ; <i1>:1022 [#uses=1] + br i1 %1022, label %1025, label %1023 + +; <label>:1023 ; preds = %1021 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:1024 [#uses=1] + store <4 x float> zeroinitializer, <4 x float>* %1024 + br label %1025 + +; <label>:1025 ; preds = %1023, %1021 + %.07462 = phi <4 x float> [ %1002, %1023 ], [ %.27464, %1021 ] ; <<4 x float>> [#uses=2] + icmp eq i32 0, 0 ; <i1>:1026 [#uses=1] + br i1 %1026, label %xST.exit469, label %1027 + +; <label>:1027 ; preds = %1025 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1028 [#uses=0] + br label %xST.exit469 + +xST.exit469: ; preds = %1027, %1025, %1005 + %.17463 = phi <4 x float> [ %.27464, %1005 ], [ %.07462, %1027 ], [ %.07462, %1025 ] ; <<4 x float>> [#uses=1] + %.17468 = phi <4 x float> [ %.27469, %1005 ], [ %.07467, %1027 ], [ %.07467, %1025 ] ; <<4 x float>> [#uses=1] + %.07489 = phi <4 x float> [ %1002, %1005 ], [ %.17490, %1027 ], [ %.17490, %1025 ] ; <<4 x float>> [#uses=1] + load <4 x float>* null ; <<4 x float>>:1029 [#uses=0] + load <4 x float>* null ; <<4 x float>>:1030 [#uses=0] + sub <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1031 [#uses=1] + br i1 false, label %1037, label %1032 + +; <label>:1032 ; preds = %xST.exit469 + load <4 x float>* null ; <<4 x float>>:1033 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:1034 [#uses=1] + load <4 x float>* %1034 ; <<4 x float>>:1035 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:1036 [#uses=0] + br label %xST.exit472 + +; <label>:1037 ; preds = %xST.exit469 + icmp eq i32 0, 0 ; <i1>:1038 [#uses=1] + br i1 %1038, label %1040, label %1039 + +; <label>:1039 ; preds = %1037 + br label %1040 + +; <label>:1040 ; preds = %1039, %1037 + %.07507 = phi <4 x float> [ zeroinitializer, %1039 ], [ zeroinitializer, %1037 ] ; <<4 x float>> [#uses=0] + icmp eq i32 0, 0 ; <i1>:1041 [#uses=1] + br i1 %1041, label %1045, label %1042 + +; <label>:1042 ; preds = %1040 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:1043 [#uses=1] + load <4 x float>* %1043 ; <<4 x float>>:1044 [#uses=0] + br label %1045 + +; <label>:1045 ; preds = %1042, %1040 + br i1 false, label %1048, label %1046 + +; <label>:1046 ; preds = %1045 + shufflevector <4 x float> %1031, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:1047 [#uses=0] + br label %1048 + +; <label>:1048 ; preds = %1046, %1045 + icmp eq i32 0, 0 ; <i1>:1049 [#uses=1] + br i1 %1049, label %xST.exit472, label %1050 + +; <label>:1050 ; preds = %1048 + br label %xST.exit472 + +xST.exit472: ; preds = %1050, %1048, %1032 + br i1 false, label %1052, label %1051 + +; <label>:1051 ; preds = %xST.exit472 + br label %xST.exit474 + +; <label>:1052 ; preds = %xST.exit472 + br i1 false, label %1054, label %1053 + +; <label>:1053 ; preds = %1052 + br label %1054 + +; <label>:1054 ; preds = %1053, %1052 + br i1 false, label %1056, label %1055 + +; <label>:1055 ; preds = %1054 + br label %1056 + +; <label>:1056 ; preds = %1055, %1054 + br i1 false, label %1058, label %1057 + +; <label>:1057 ; preds = %1056 + br label %1058 + +; <label>:1058 ; preds = %1057, %1056 + br i1 false, label %xST.exit474, label %1059 + +; <label>:1059 ; preds = %1058 + br label %xST.exit474 + +xST.exit474: ; preds = %1059, %1058, %1051 + load <4 x float>* null ; <<4 x float>>:1060 [#uses=1] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1061 [#uses=1] + mul <4 x float> %1060, zeroinitializer ; <<4 x float>>:1062 [#uses=2] + br i1 false, label %1065, label %1063 + +; <label>:1063 ; preds = %xST.exit474 + shufflevector <4 x float> %1062, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:1064 [#uses=1] + store <4 x float> %1064, <4 x float>* null + br label %xST.exit476 + +; <label>:1065 ; preds = %xST.exit474 + br i1 false, label %1067, label %1066 + +; <label>:1066 ; preds = %1065 + br label %1067 + +; <label>:1067 ; preds = %1066, %1065 + shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:1068 [#uses=0] + br i1 false, label %1070, label %1069 + +; <label>:1069 ; preds = %1067 + br label %1070 + +; <label>:1070 ; preds = %1069, %1067 + br i1 false, label %1072, label %1071 + +; <label>:1071 ; preds = %1070 + br label %1072 + +; <label>:1072 ; preds = %1071, %1070 + br i1 false, label %xST.exit476, label %1073 + +; <label>:1073 ; preds = %1072 + br label %xST.exit476 + +xST.exit476: ; preds = %1073, %1072, %1063 + %.07551 = phi <4 x float> [ %1062, %1063 ], [ %.17552, %1073 ], [ %.17552, %1072 ] ; <<4 x float>> [#uses=1] + %.07555 = phi <4 x float> [ %1061, %1063 ], [ %.17556, %1073 ], [ %.17556, %1072 ] ; <<4 x float>> [#uses=1] + br i1 false, label %1075, label %1074 + +; <label>:1074 ; preds = %xST.exit476 + br label %xST.exit479 + +; <label>:1075 ; preds = %xST.exit476 + br i1 false, label %1077, label %1076 + +; <label>:1076 ; preds = %1075 + br label %1077 + +; <label>:1077 ; preds = %1076, %1075 + br i1 false, label %1079, label %1078 + +; <label>:1078 ; preds = %1077 + br label %1079 + +; <label>:1079 ; preds = %1078, %1077 + br i1 false, label %1081, label %1080 + +; <label>:1080 ; preds = %1079 + br label %1081 + +; <label>:1081 ; preds = %1080, %1079 + br i1 false, label %xST.exit479, label %1082 + +; <label>:1082 ; preds = %1081 + br label %xST.exit479 + +xST.exit479: ; preds = %1082, %1081, %1074 + br i1 false, label %1084, label %1083 + +; <label>:1083 ; preds = %xST.exit479 + br label %xST.exit482 + +; <label>:1084 ; preds = %xST.exit479 + br i1 false, label %1086, label %1085 + +; <label>:1085 ; preds = %1084 + br label %1086 + +; <label>:1086 ; preds = %1085, %1084 + br i1 false, label %1088, label %1087 + +; <label>:1087 ; preds = %1086 + br label %1088 + +; <label>:1088 ; preds = %1087, %1086 + br i1 false, label %1090, label %1089 + +; <label>:1089 ; preds = %1088 + br label %1090 + +; <label>:1090 ; preds = %1089, %1088 + br i1 false, label %xST.exit482, label %1091 + +; <label>:1091 ; preds = %1090 + br label %xST.exit482 + +xST.exit482: ; preds = %1091, %1090, %1083 + br i1 false, label %1093, label %1092 + +; <label>:1092 ; preds = %xST.exit482 + br label %xST.exit486 + +; <label>:1093 ; preds = %xST.exit482 + br i1 false, label %1095, label %1094 + +; <label>:1094 ; preds = %1093 + br label %1095 + +; <label>:1095 ; preds = %1094, %1093 + br i1 false, label %1097, label %1096 + +; <label>:1096 ; preds = %1095 + br label %1097 + +; <label>:1097 ; preds = %1096, %1095 + br i1 false, label %1099, label %1098 + +; <label>:1098 ; preds = %1097 + br label %1099 + +; <label>:1099 ; preds = %1098, %1097 + br i1 false, label %xST.exit486, label %1100 + +; <label>:1100 ; preds = %1099 + br label %xST.exit486 + +xST.exit486: ; preds = %1100, %1099, %1092 + br i1 false, label %1102, label %1101 + +; <label>:1101 ; preds = %xST.exit486 + br label %xST.exit489 + +; <label>:1102 ; preds = %xST.exit486 + br i1 false, label %1104, label %1103 + +; <label>:1103 ; preds = %1102 + br label %1104 + +; <label>:1104 ; preds = %1103, %1102 + br i1 false, label %1106, label %1105 + +; <label>:1105 ; preds = %1104 + br label %1106 + +; <label>:1106 ; preds = %1105, %1104 + br i1 false, label %1108, label %1107 + +; <label>:1107 ; preds = %1106 + br label %1108 + +; <label>:1108 ; preds = %1107, %1106 + br i1 false, label %xST.exit489, label %1109 + +; <label>:1109 ; preds = %1108 + br label %xST.exit489 + +xST.exit489: ; preds = %1109, %1108, %1101 + br i1 false, label %1111, label %1110 + +; <label>:1110 ; preds = %xST.exit489 + br label %xST.exit492 + +; <label>:1111 ; preds = %xST.exit489 + br i1 false, label %1113, label %1112 + +; <label>:1112 ; preds = %1111 + br label %1113 + +; <label>:1113 ; preds = %1112, %1111 + br i1 false, label %1115, label %1114 + +; <label>:1114 ; preds = %1113 + br label %1115 + +; <label>:1115 ; preds = %1114, %1113 + br i1 false, label %1117, label %1116 + +; <label>:1116 ; preds = %1115 + br label %1117 + +; <label>:1117 ; preds = %1116, %1115 + br i1 false, label %xST.exit492, label %1118 + +; <label>:1118 ; preds = %1117 + br label %xST.exit492 + +xST.exit492: ; preds = %1118, %1117, %1110 + load <4 x float>* null ; <<4 x float>>:1119 [#uses=1] + mul <4 x float> %1119, zeroinitializer ; <<4 x float>>:1120 [#uses=1] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1121 [#uses=1] + br i1 false, label %1123, label %1122 + +; <label>:1122 ; preds = %xST.exit492 + br label %xST.exit495 + +; <label>:1123 ; preds = %xST.exit492 + br i1 false, label %1125, label %1124 + +; <label>:1124 ; preds = %1123 + br label %1125 + +; <label>:1125 ; preds = %1124, %1123 + br i1 false, label %1127, label %1126 + +; <label>:1126 ; preds = %1125 + br label %1127 + +; <label>:1127 ; preds = %1126, %1125 + br i1 false, label %1129, label %1128 + +; <label>:1128 ; preds = %1127 + br label %1129 + +; <label>:1129 ; preds = %1128, %1127 + br i1 false, label %xST.exit495, label %1130 + +; <label>:1130 ; preds = %1129 + br label %xST.exit495 + +xST.exit495: ; preds = %1130, %1129, %1122 + %.07582 = phi <4 x float> [ %1121, %1122 ], [ %.17583, %1130 ], [ %.17583, %1129 ] ; <<4 x float>> [#uses=1] + %.07590 = phi <4 x float> [ %1120, %1122 ], [ %.17591, %1130 ], [ %.17591, %1129 ] ; <<4 x float>> [#uses=1] + load <4 x float>* null ; <<4 x float>>:1131 [#uses=1] + add <4 x float> %1131, zeroinitializer ; <<4 x float>>:1132 [#uses=1] + add <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1133 [#uses=1] + br i1 false, label %1135, label %1134 + +; <label>:1134 ; preds = %xST.exit495 + br label %xST.exit498 + +; <label>:1135 ; preds = %xST.exit495 + br i1 false, label %1137, label %1136 + +; <label>:1136 ; preds = %1135 + br label %1137 + +; <label>:1137 ; preds = %1136, %1135 + br i1 false, label %1139, label %1138 + +; <label>:1138 ; preds = %1137 + br label %1139 + +; <label>:1139 ; preds = %1138, %1137 + br i1 false, label %1141, label %1140 + +; <label>:1140 ; preds = %1139 + br label %1141 + +; <label>:1141 ; preds = %1140, %1139 + br i1 false, label %xST.exit498, label %1142 + +; <label>:1142 ; preds = %1141 + br label %xST.exit498 + +xST.exit498: ; preds = %1142, %1141, %1134 + %.07617 = phi <4 x float> [ %1133, %1134 ], [ %.17618, %1142 ], [ %.17618, %1141 ] ; <<4 x float>> [#uses=1] + %.07621 = phi <4 x float> [ %1132, %1134 ], [ %.17622, %1142 ], [ %.17622, %1141 ] ; <<4 x float>> [#uses=1] + load <4 x float>* null ; <<4 x float>>:1143 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:1144 [#uses=1] + load <4 x float>* %1144 ; <<4 x float>>:1145 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1146 [#uses=1] + load <4 x float>* %1146 ; <<4 x float>>:1147 [#uses=1] + shufflevector <4 x float> %1143, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:1148 [#uses=1] + shufflevector <4 x float> %1145, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:1149 [#uses=1] + shufflevector <4 x float> %1147, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:1150 [#uses=1] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1151 [#uses=1] + mul <4 x float> zeroinitializer, %1148 ; <<4 x float>>:1152 [#uses=1] + mul <4 x float> zeroinitializer, %1149 ; <<4 x float>>:1153 [#uses=1] + mul <4 x float> zeroinitializer, %1150 ; <<4 x float>>:1154 [#uses=1] + br i1 false, label %1156, label %1155 + +; <label>:1155 ; preds = %xST.exit498 + br label %xST.exit501 + +; <label>:1156 ; preds = %xST.exit498 + br i1 false, label %1158, label %1157 + +; <label>:1157 ; preds = %1156 + br label %1158 + +; <label>:1158 ; preds = %1157, %1156 + br i1 false, label %1160, label %1159 + +; <label>:1159 ; preds = %1158 + br label %1160 + +; <label>:1160 ; preds = %1159, %1158 + br i1 false, label %1162, label %1161 + +; <label>:1161 ; preds = %1160 + br label %1162 + +; <label>:1162 ; preds = %1161, %1160 + br i1 false, label %xST.exit501, label %1163 + +; <label>:1163 ; preds = %1162 + br label %xST.exit501 + +xST.exit501: ; preds = %1163, %1162, %1155 + %.07652 = phi <4 x float> [ %1154, %1155 ], [ %.17653, %1163 ], [ %.17653, %1162 ] ; <<4 x float>> [#uses=1] + %.07656 = phi <4 x float> [ %1153, %1155 ], [ %.17657, %1163 ], [ %.17657, %1162 ] ; <<4 x float>> [#uses=1] + %.07660 = phi <4 x float> [ %1152, %1155 ], [ %.17661, %1163 ], [ %.17661, %1162 ] ; <<4 x float>> [#uses=1] + %.07664 = phi <4 x float> [ %1151, %1155 ], [ %.17665, %1163 ], [ %.17665, %1162 ] ; <<4 x float>> [#uses=1] + load <4 x float>* null ; <<4 x float>>:1164 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:1165 [#uses=1] + load <4 x float>* %1165 ; <<4 x float>>:1166 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1167 [#uses=1] + load <4 x float>* %1167 ; <<4 x float>>:1168 [#uses=1] + add <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1169 [#uses=1] + add <4 x float> zeroinitializer, %1164 ; <<4 x float>>:1170 [#uses=1] + add <4 x float> zeroinitializer, %1166 ; <<4 x float>>:1171 [#uses=1] + add <4 x float> zeroinitializer, %1168 ; <<4 x float>>:1172 [#uses=1] + br i1 false, label %1174, label %1173 + +; <label>:1173 ; preds = %xST.exit501 + br label %xST.exit504 + +; <label>:1174 ; preds = %xST.exit501 + br i1 false, label %1176, label %1175 + +; <label>:1175 ; preds = %1174 + br label %1176 + +; <label>:1176 ; preds = %1175, %1174 + br i1 false, label %1178, label %1177 + +; <label>:1177 ; preds = %1176 + br label %1178 + +; <label>:1178 ; preds = %1177, %1176 + br i1 false, label %1180, label %1179 + +; <label>:1179 ; preds = %1178 + br label %1180 + +; <label>:1180 ; preds = %1179, %1178 + br i1 false, label %xST.exit504, label %1181 + +; <label>:1181 ; preds = %1180 + br label %xST.exit504 + +xST.exit504: ; preds = %1181, %1180, %1173 + %.07722 = phi <4 x float> [ %1172, %1173 ], [ %.17723, %1181 ], [ %.17723, %1180 ] ; <<4 x float>> [#uses=1] + %.07726 = phi <4 x float> [ %1171, %1173 ], [ %.17727, %1181 ], [ %.17727, %1180 ] ; <<4 x float>> [#uses=1] + %.07730 = phi <4 x float> [ %1170, %1173 ], [ %.17731, %1181 ], [ %.17731, %1180 ] ; <<4 x float>> [#uses=1] + %.07734 = phi <4 x float> [ %1169, %1173 ], [ %.17735, %1181 ], [ %.17735, %1180 ] ; <<4 x float>> [#uses=1] + add <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1182 [#uses=1] + br i1 false, label %1184, label %1183 + +; <label>:1183 ; preds = %xST.exit504 + br label %xST.exit507 + +; <label>:1184 ; preds = %xST.exit504 + br i1 false, label %1186, label %1185 + +; <label>:1185 ; preds = %1184 + br label %1186 + +; <label>:1186 ; preds = %1185, %1184 + br i1 false, label %1188, label %1187 + +; <label>:1187 ; preds = %1186 + store <4 x float> zeroinitializer, <4 x float>* null + br label %1188 + +; <label>:1188 ; preds = %1187, %1186 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:1189 [#uses=1] + shufflevector <4 x i32> %1189, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:1190 [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1190, <4 x i32> zeroinitializer ) ; <i32>:1191 [#uses=1] + icmp eq i32 %1191, 0 ; <i1>:1192 [#uses=1] + br i1 %1192, label %1196, label %1193 + +; <label>:1193 ; preds = %1188 + load <4 x float>* null ; <<4 x float>>:1194 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %1194, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:1195 [#uses=1] + store <4 x float> %1195, <4 x float>* null + br label %1196 + +; <label>:1196 ; preds = %1193, %1188 + %.07742 = phi <4 x float> [ zeroinitializer, %1193 ], [ zeroinitializer, %1188 ] ; <<4 x float>> [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:1197 [#uses=1] + shufflevector <4 x i32> %1197, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:1198 [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1198, <4 x i32> zeroinitializer ) ; <i32>:1199 [#uses=1] + icmp eq i32 %1199, 0 ; <i1>:1200 [#uses=1] + br i1 %1200, label %xST.exit507, label %1201 + +; <label>:1201 ; preds = %1196 + store <4 x float> zeroinitializer, <4 x float>* null + br label %xST.exit507 + +xST.exit507: ; preds = %1201, %1196, %1183 + %.07769 = phi <4 x float> [ %1182, %1183 ], [ %.17770, %1201 ], [ %.17770, %1196 ] ; <<4 x float>> [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:1202 [#uses=1] + icmp eq i32 %1202, 0 ; <i1>:1203 [#uses=1] + br i1 %1203, label %1207, label %1204 + +; <label>:1204 ; preds = %xST.exit507 + load <4 x float>* null ; <<4 x float>>:1205 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %1205, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:1206 [#uses=1] + store <4 x float> %1206, <4 x float>* null + br label %1207 + +; <label>:1207 ; preds = %1204, %xST.exit507 + load <4 x i32>* %.sub7896 ; <<4 x i32>>:1208 [#uses=1] + shufflevector <4 x i32> %1208, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:1209 [#uses=1] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1209, <4 x i32> zeroinitializer ) ; <i32>:1210 [#uses=1] + icmp eq i32 %1210, 0 ; <i1>:1211 [#uses=1] + br i1 %1211, label %1215, label %1212 + +; <label>:1212 ; preds = %1207 + load <4 x float>* null ; <<4 x float>>:1213 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %1213, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:1214 [#uses=1] + store <4 x float> %1214, <4 x float>* null + br label %1215 + +; <label>:1215 ; preds = %1212, %1207 + store <4 x float> zeroinitializer, <4 x float>* null + br label %xLS.exit449 +} + +declare <4 x i32> @llvm.ppc.altivec.vsel(<4 x i32>, <4 x i32>, <4 x i32>) + +declare void @llvm.ppc.altivec.stvewx(<4 x i32>, i8*) + +declare <4 x float> @llvm.ppc.altivec.vrsqrtefp(<4 x float>) + +declare <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32>, i32) + +declare i32 @llvm.ppc.altivec.vcmpequw.p(i32, <4 x i32>, <4 x i32>) + +declare <4 x i32> @llvm.ppc.altivec.vcmpgtfp(<4 x float>, <4 x float>) diff --git a/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll b/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll new file mode 100644 index 0000000..8405703 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep {foo r3, r4} +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep {bar r3, r} + +; PR1351 + +define i32 @test1(i32 %Y, i32 %X) { + %tmp1 = tail call i32 asm "foo${1:I} $0, $1", "=r,rI"( i32 %X ) + ret i32 %tmp1 +} + +;; TODO: We'd actually prefer this to be 'bari r3, 47', but 'bar r3, rN' is also ok. +define i32 @test2(i32 %Y, i32 %X) { + %tmp1 = tail call i32 asm "bar${1:I} $0, $1", "=r,rI"( i32 47 ) + ret i32 %tmp1 +} diff --git a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll new file mode 100644 index 0000000..f43b87c --- /dev/null +++ b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc | grep {subfc r2,r5,r4} +; RUN: llvm-as < %s | llc | grep {subfze r4,r3} + +; PR1357 + +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "powerpc-apple-darwin8.8.0" + +;long long test(int A, int B, int C) { +; unsigned X, Y; +; __asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2" +; : "=r" (X), "=&r" (Y) +; : "r" (A), "rI" (B), "r" (C)); +; return ((long long)Y << 32) | X; +;} + +define i64 @test(i32 %A, i32 %B, i32 %C) { +entry: + %Y = alloca i32, align 4 ; <i32*> [#uses=2] + %tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( i32* %Y, i32 %A, i32 %B, i32 %C ) ; <i32> [#uses=1] + %tmp5 = load i32* %Y ; <i32> [#uses=1] + %tmp56 = zext i32 %tmp5 to i64 ; <i64> [#uses=1] + %tmp7 = shl i64 %tmp56, 32 ; <i64> [#uses=1] + %tmp89 = zext i32 %tmp4 to i64 ; <i64> [#uses=1] + %tmp10 = or i64 %tmp7, %tmp89 ; <i64> [#uses=1] + ret i64 %tmp10 +} diff --git a/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll b/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll new file mode 100644 index 0000000..989a751 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc +; PR1382 + +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "powerpc-apple-darwin8.8.0" +@x = global [2 x i32] [ i32 1, i32 2 ] ; <[2 x i32]*> [#uses=1] + +define void @foo() { +entry: + tail call void asm sideeffect "$0 $1", "s,i"( i8* bitcast (i32* getelementptr ([2 x i32]* @x, i32 0, i32 1) to i8*), i8* bitcast (i32* getelementptr ([2 x i32]* @x, i32 0, i32 1) to i8*) ) + ret void +} diff --git a/test/CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll b/test/CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll new file mode 100644 index 0000000..b64de68 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -march=ppc32 +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "powerpc-apple-darwin8.8.0" + %struct..0anon = type { i32 } + %struct.A = type { %struct.anon } + %struct.anon = type <{ }> + +define void @bork(%struct.A* %In0P) { +entry: + %tmp56 = bitcast %struct.A* %In0P to float* ; <float*> [#uses=1] + br label %bb + +bb: ; preds = %bb, %entry + %i.035.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2] + %tmp8 = getelementptr float* %tmp56, i32 %i.035.0 ; <float*> [#uses=2] + %tmp101112 = bitcast float* %tmp8 to i8* ; <i8*> [#uses=1] + %tmp1617 = bitcast float* %tmp8 to i32* ; <i32*> [#uses=1] + %tmp21 = tail call i32 asm "lwbrx $0, $2, $1", "=r,r,bO,*m"( i8* %tmp101112, i32 0, i32* %tmp1617 ) ; <i32> [#uses=0] + %indvar.next = add i32 %i.035.0, 1 ; <i32> [#uses=2] + %exitcond = icmp eq i32 %indvar.next, 4 ; <i1> [#uses=1] + br i1 %exitcond, label %return, label %bb + +return: ; preds = %bb + ret void +} diff --git a/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll new file mode 100644 index 0000000..0aebeb9 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll @@ -0,0 +1,68 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | grep bl.*baz | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=ppc32 | grep bl.*quux | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=ppc32 -enable-tail-merge | grep bl.*baz | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=ppc32 -enable-tail-merge=1 | grep bl.*quux | wc -l | grep 1 +; Check that tail merging is not the default on ppc, and that -enable-tail-merge works. + +; ModuleID = 'tail.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define i32 @f(i32 %i, i32 %q) { +entry: + %i_addr = alloca i32 ; <i32*> [#uses=2] + %q_addr = alloca i32 ; <i32*> [#uses=2] + %retval = alloca i32, align 4 ; <i32*> [#uses=1] + "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 %i, i32* %i_addr + store i32 %q, i32* %q_addr + %tmp = load i32* %i_addr ; <i32> [#uses=1] + %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1] + %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1] + %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1] + br i1 %toBool, label %cond_true, label %cond_false + +cond_true: ; preds = %entry + %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] + %tmp7 = load i32* %q_addr ; <i32> [#uses=1] + %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1] + %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1] + %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1] + br i1 %toBool10, label %cond_true11, label %cond_false15 + +cond_false: ; preds = %entry + %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0] + %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] + %tmp27 = load i32* %q_addr ; <i32> [#uses=1] + %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1] + %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1] + %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1] + br i1 %toBool210, label %cond_true11, label %cond_false15 + +cond_true11: ; preds = %cond_next + %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0] + %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0] + br label %cond_next18 + +cond_false15: ; preds = %cond_next + %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0] + br label %cond_next18 + +cond_next18: ; preds = %cond_false15, %cond_true11 + %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0] + br label %return + +return: ; preds = %cond_next18 + %retval20 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval20 +} + +declare i32 @bar(...) + +declare i32 @baz(...) + +declare i32 @foo(...) + +declare i32 @quux(...) diff --git a/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll b/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll new file mode 100644 index 0000000..0ea76c7 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll @@ -0,0 +1,14 @@ +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "powerpc-apple-darwin8.8.0" + +; RUN: llvm-as < %s | llc -march=ppc32 | grep {rlwinm r3, r3, 23, 30, 30} +; PR1473 + +define i8 @foo(i16 zext %a) zext { + %tmp2 = lshr i16 %a, 10 ; <i16> [#uses=1] + %tmp23 = trunc i16 %tmp2 to i8 ; <i8> [#uses=1] + %tmp4 = shl i8 %tmp23, 1 ; <i8> [#uses=1] + %tmp5 = and i8 %tmp4, 2 ; <i8> [#uses=1] + ret i8 %tmp5 +} + diff --git a/test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll b/test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll new file mode 100644 index 0000000..58260ec --- /dev/null +++ b/test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll @@ -0,0 +1,85 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mattr=+altivec + + %struct.XATest = type { float, i16, i8, i8 } + %struct.XArrayRange = type { i8, i8, i8, i8 } + %struct.XBlendMode = type { i16, i16, i16, i16, %struct.GIC4, i16, i16, i8, i8, i8, i8 } + %struct.XClearC = type { double, %struct.GIC4, %struct.GIC4, float, i32 } + %struct.XClipPlane = type { i32, [6 x %struct.GIC4] } + %struct.XCBuffer = type { i16, i16, [8 x i16] } + %struct.XCMatrix = type { [16 x float]*, %struct.XICSS } + %struct.XConvolution = type { %struct.GIC4, %struct.XICSS, i16, i16, float*, i32, i32 } + %struct.XDepthTest = type { i16, i16, i8, i8, i8, i8, double, double } + %struct.XFixedFunctionProgram = type { %struct.PPSToken* } + %struct.XFogMode = type { %struct.GIC4, float, float, float, float, float, i16, i16, i16, i8, i8 } + %struct.XFramebufferAttachment = type { i32, i32, i32, i32 } + %struct.XHintMode = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 } + %struct.XHistogram = type { %struct.XFramebufferAttachment*, i32, i16, i8, i8 } + %struct.XICSS = type { %struct.GTCoord2, %struct.GTCoord2, %struct.GTCoord2, %struct.GTCoord2 } + %struct.XISubset = type { %struct.XConvolution, %struct.XConvolution, %struct.XConvolution, %struct.XCMatrix, %struct.XMinmax, %struct.XHistogram, %struct.XICSS, %struct.XICSS, %struct.XICSS, %struct.XICSS, i32 } + %struct.XLight = type { %struct.GIC4, %struct.GIC4, %struct.GIC4, %struct.GIC4, %struct.XPointLineLimits, float, float, float, float, float, %struct.XPointLineLimits, float, float, float, float, float } + %struct.XLightModel = type { %struct.GIC4, [8 x %struct.XLight], [2 x %struct.XMaterial], i32, i16, i16, i16, i8, i8, i8, i8, i8, i8 } + %struct.XLightProduct = type { %struct.GIC4, %struct.GIC4, %struct.GIC4 } + %struct.XLineMode = type { float, i32, i16, i16, i8, i8, i8, i8 } + %struct.XLogicOp = type { i16, i8, i8 } + %struct.XMaskMode = type { i32, [3 x i32], i8, i8, i8, i8, i8, i8, i8, i8 } + %struct.XMaterial = type { %struct.GIC4, %struct.GIC4, %struct.GIC4, %struct.GIC4, float, float, float, float, [8 x %struct.XLightProduct], %struct.GIC4, [6 x i32], [2 x i32] } + %struct.XMinmax = type { %struct.XMinmaxTable*, i16, i8, i8 } + %struct.XMinmaxTable = type { %struct.GIC4, %struct.GIC4 } + %struct.XMipmaplevel = type { [4 x i32], [4 x i32], [4 x float], [4 x i32], i32, i32, float*, i8*, i16, i16, i16, i16, [2 x float] } + %struct.XMultisample = type { float, i8, i8, i8, i8, i8, i8, i8, i8 } + %struct.XPipelineProgramState = type { i8, i8, i8, i8, %struct.GIC4* } + %struct.XPMap = type { i32*, float*, float*, float*, float*, float*, float*, float*, float*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } + %struct.XPMode = type { float, float, %struct.XPStore, %struct.XPTransfer, %struct.XPMap, %struct.XISubset, i32, i32 } + %struct.XPPack = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8 } + %struct.XPStore = type { %struct.XPPack, %struct.XPPack } + %struct.XPTransfer = type { float, float, float, float, float, float, float, float, float, float, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float } + %struct.XPointLineLimits = type { float, float, float } + %struct.XPointMode = type { float, float, float, float, %struct.XPointLineLimits, float, i8, i8, i8, i8, i16, i16, i32, i16, i16 } + %struct.XPGMode = type { [128 x i8], float, float, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8 } + %struct.XRegisterCCs = type { i8, i8, i8, i8, i32, [2 x %struct.GIC4], [8 x %struct.XRegisterCCsPerStageState], %struct.XRegisterCCsFinalStageState } + %struct.XRegisterCCsFinalStageState = type { i8, i8, i8, i8, [7 x %struct.XRegisterCCsPerVariableState] } + %struct.XRegisterCCsPerPortionState = type { [4 x %struct.XRegisterCCsPerVariableState], i8, i8, i8, i8, i16, i16, i16, i16, i16, i16 } + %struct.XRegisterCCsPerStageState = type { [2 x %struct.XRegisterCCsPerPortionState], [2 x %struct.GIC4] } + %struct.XRegisterCCsPerVariableState = type { i16, i16, i16, i16 } + %struct.XScissorTest = type { %struct.XFramebufferAttachment, i8, i8, i8, i8 } + %struct.XState = type { i16, i16, i16, i16, i32, i32, [256 x %struct.GIC4], [128 x %struct.GIC4], %struct.XViewport, %struct.XXF, %struct.XLightModel, %struct.XATest, %struct.XBlendMode, %struct.XClearC, %struct.XCBuffer, %struct.XDepthTest, %struct.XArrayRange, %struct.XFogMode, %struct.XHintMode, %struct.XLineMode, %struct.XLogicOp, %struct.XMaskMode, %struct.XPMode, %struct.XPointMode, %struct.XPGMode, %struct.XScissorTest, i32, %struct.XStencilTest, [16 x %struct.XTMode], %struct.XArrayRange, [8 x %struct.XTCoordGen], %struct.XClipPlane, %struct.XMultisample, %struct.XRegisterCCs, %struct.XArrayRange, %struct.XArrayRange, [3 x %struct.XPipelineProgramState], %struct.XXFFeedback, i32*, %struct.XFixedFunctionProgram, [3 x i32] } + %struct.XStencilTest = type { [3 x { i32, i32, i16, i16, i16, i16 }], i32, [4 x i8] } + %struct.XTCoordGen = type { { i16, i16, %struct.GIC4, %struct.GIC4 }, { i16, i16, %struct.GIC4, %struct.GIC4 }, { i16, i16, %struct.GIC4, %struct.GIC4 }, { i16, i16, %struct.GIC4, %struct.GIC4 }, i8, i8, i8, i8 } + %struct.XTGeomState = type { i16, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, [6 x i16], [6 x i16] } + %struct.XTLevel = type { i32, i32, i16, i16, i16, i8, i8, i16, i16, i16, i16, i8* } + %struct.XTMode = type { %struct.GIC4, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, float, float, float, i16, i16, i16, i16, i16, i16, [4 x i16], i8, i8, i8, i8, [3 x float], [4 x float], float, float } + %struct.XTParamState = type { i16, i16, i16, i16, i16, i16, %struct.GIC4, float, float, float, float, i16, i16, i16, i16, float, i16, i8, i8, i32, i8* } + %struct.XTRec = type { %struct.XTState*, float, float, float, float, %struct.XMipmaplevel*, %struct.XMipmaplevel*, i32, i32, i32, i32, i32, i32, i32, [2 x %struct.PPSToken] } + %struct.XTState = type { i16, i8, i8, i16, i16, float, i32, %struct.GISWRSurface*, %struct.XTParamState, %struct.XTGeomState, %struct.XTLevel, [6 x [15 x %struct.XTLevel]] } + %struct.XXF = type { [24 x [16 x float]], [24 x [16 x float]], [16 x float], float, float, float, float, float, i8, i8, i8, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i32 } + %struct.XXFFeedback = type { i8, i8, i8, i8, [16 x i32], [16 x i32] } + %struct.XViewport = type { float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, double, double, i32, i32, i32, i32, float, float, float, float } + %struct.GIC4 = type { float, float, float, float } + %struct.GISWRSurface = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, [4 x i8*], i32 } + %struct.GTCoord2 = type { float, float } + %struct.GVMFPContext = type { float, i32, i32, i32, float, [3 x float] } + %struct.GVMFPStack = type { [8 x i8*], i8*, i8*, i32, i32, { <4 x float> }, { <4 x float> }, <4 x i32> } + %struct.GVMFGAttrib = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, [8 x <4 x float>] } + %struct.GVMTs = type { [16 x %struct.XTRec*] } + %struct.PPSToken = type { { i16, i16, i32 } } + %struct._GVMConstants = type { <4 x i32>, <4 x i32>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, float, float, float, float, float, float, float, float, float, float, float, float, [256 x float], [528 x i8] } + +declare <4 x i32> @llvm.ppc.altivec.lvewx(i8*) + +declare i32 @llvm.ppc.altivec.vcmpequw.p(i32, <4 x i32>, <4 x i32>) + +define void @test(%struct.XState* %gldst, <4 x float>* %prgrm, <4 x float>** %buffs, %struct._GVMConstants* %cnstn, %struct.PPSToken* %pstrm, %struct.GVMFPContext* %vmctx, %struct.GVMTs* %txtrs, %struct.GVMFPStack* %fpstk, %struct.GVMFGAttrib* %start, %struct.GVMFGAttrib* %deriv, i32 %fragx, i32 %fragy) { +bb58.i: + %tmp3405.i = getelementptr %struct.XTRec* null, i32 0, i32 1 ; <float*> [#uses=1] + %tmp34053406.i = bitcast float* %tmp3405.i to i8* ; <i8*> [#uses=1] + %tmp3407.i = call <4 x i32> @llvm.ppc.altivec.lvewx( i8* %tmp34053406.i ) ; <<4 x i32>> [#uses=0] + %tmp4146.i = call i32 @llvm.ppc.altivec.vcmpequw.p( i32 3, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32> [#uses=1] + %tmp4147.i = icmp eq i32 %tmp4146.i, 0 ; <i1> [#uses=1] + br i1 %tmp4147.i, label %bb8799.i, label %bb4150.i + +bb4150.i: ; preds = %bb58.i + br label %bb8799.i + +bb8799.i: ; preds = %bb4150.i, %bb58.i + ret void +} diff --git a/test/CodeGen/PowerPC/Frames-align.ll b/test/CodeGen/PowerPC/Frames-align.ll new file mode 100644 index 0000000..a7c02cc --- /dev/null +++ b/test/CodeGen/PowerPC/Frames-align.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {rlwinm r0, r1, 0, 22, 31} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {subfic r0, r0, -16448} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {rldicl r0, r1, 0, 54} + +implementation + +int* %f1() { + %tmp = alloca int, uint 4095, align 1024 + ret int* %tmp +} diff --git a/test/CodeGen/PowerPC/Frames-alloca.ll b/test/CodeGen/PowerPC/Frames-alloca.ll new file mode 100644 index 0000000..205cf9a --- /dev/null +++ b/test/CodeGen/PowerPC/Frames-alloca.ll @@ -0,0 +1,55 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {stw r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {stwu r1, -64(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep {lwz r1, 0(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {lwz r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {stw r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {stwu r1, -64(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {lwz r1, 0(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {lwz r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {std r31, 40(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {stdu r1, -112(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {ld r1, 0(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {ld r31, 40(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {std r31, 40(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {stdu r1, -112(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {ld r1, 0(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {ld r31, 40(r1)} + + +implementation + +int* %f1(uint %n) { + %tmp = alloca int, uint %n + ret int* %tmp +} diff --git a/test/CodeGen/PowerPC/Frames-large.ll b/test/CodeGen/PowerPC/Frames-large.ll new file mode 100644 index 0000000..1f58fe0 --- /dev/null +++ b/test/CodeGen/PowerPC/Frames-large.ll @@ -0,0 +1,79 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: not grep {stw r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep {lis r0, -1} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {ori r0, r0, 32704} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {stwux r1, r1, r0} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {lwz r1, 0(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: not grep {lwz r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {stw r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {lis r0, -1} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {ori r0, r0, 32704} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {stwux r1, r1, r0} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {lwz r1, 0(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {lwz r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: not grep {std r31, 40(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {lis r0, -1} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {ori r0, r0, 32656} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {stdux r1, r1, r0} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {ld r1, 0(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: not grep {ld r31, 40(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {std r31, 40(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {lis r0, -1} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {ori r0, r0, 32656} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {stdux r1, r1, r0} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {ld r1, 0(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: grep {ld r31, 40(r1)} + + +implementation + +int* %f1() { + %tmp = alloca int, uint 8191 + ret int* %tmp +} diff --git a/test/CodeGen/PowerPC/Frames-leaf.ll b/test/CodeGen/PowerPC/Frames-leaf.ll new file mode 100644 index 0000000..9de1bde --- /dev/null +++ b/test/CodeGen/PowerPC/Frames-leaf.ll @@ -0,0 +1,40 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: not grep {stw r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: not grep {stwu r1, -.*(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: not grep {addi r1, r1, } +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: not grep {lwz r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -disable-fp-elim | \ +; RUN: not grep {stw r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -disable-fp-elim | \ +; RUN: not grep {stwu r1, -.*(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -disable-fp-elim | \ +; RUN: not grep {addi r1, r1, } +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -disable-fp-elim | \ +; RUN: not grep {lwz r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \ +; RUN: not grep {std r31, 40(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \ +; RUN: not grep {stdu r1, -.*(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \ +; RUN: not grep {addi r1, r1, } +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \ +; RUN: not grep {ld r31, 40(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -disable-fp-elim | \ +; RUN: not grep {stw r31, 40(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -disable-fp-elim | \ +; RUN: not grep {stdu r1, -.*(r1)} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -disable-fp-elim | \ +; RUN: not grep {addi r1, r1, } +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -disable-fp-elim | \ +; RUN: not grep {ld r31, 40(r1)} + + +implementation + +int* %f1() { + %tmp = alloca int, uint 2 + ret int* %tmp +} diff --git a/test/CodeGen/PowerPC/Frames-small.ll b/test/CodeGen/PowerPC/Frames-small.ll new file mode 100644 index 0000000..549083a --- /dev/null +++ b/test/CodeGen/PowerPC/Frames-small.ll @@ -0,0 +1,34 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1 -f +; RUN not grep {stw r31, 20(r1)} %t1 +; RUN: grep {stwu r1, -16448(r1)} %t1 +; RUN: grep {addi r1, r1, 16448} %t1 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: not grep {lwz r31, 20(r1)} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ +; RUN: -o %t2 -f +; RUN: grep {stw r31, 20(r1)} %t2 +; RUN: grep {stwu r1, -16448(r1)} %t2 +; RUN: grep {addi r1, r1, 16448} %t2 +; RUN: grep {lwz r31, 20(r1)} %t2 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3 -f +; RUN: not grep {std r31, 40(r1)} %t3 +; RUN: grep {stdu r1, -16496(r1)} %t3 +; RUN: grep {addi r1, r1, 16496} %t3 +; RUN: not grep {ld r31, 40(r1)} %t3 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ +; RUN: -o %t4 -f +; RUN: grep {std r31, 40(r1)} %t4 +; RUN: grep {stdu r1, -16496(r1)} %t4 +; RUN: grep {addi r1, r1, 16496} %t4 +; RUN: grep {ld r31, 40(r1)} %t4 + +implementation + +int* %f1() { + %tmp = alloca int, uint 4095 + ret int* %tmp +} diff --git a/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll b/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll new file mode 100644 index 0000000..1705379 --- /dev/null +++ b/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin | \ +; RUN: grep {stw r3, 32751} +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin | \ +; RUN: grep {stw r3, 32751} +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin | \ +; RUN: grep {std r2, 9024} + +define void @test() { + store i32 0, i32* inttoptr (i64 48725999 to i32*) + ret void +} + +define void @test2() { + store i64 0, i64* inttoptr (i64 74560 to i64*) + ret void +} + diff --git a/test/CodeGen/PowerPC/addc.ll b/test/CodeGen/PowerPC/addc.ll new file mode 100644 index 0000000..b268389 --- /dev/null +++ b/test/CodeGen/PowerPC/addc.ll @@ -0,0 +1,27 @@ +; All of these should be codegen'd without loading immediates +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f +; RUN: grep addc %t | wc -l | grep 1 +; RUN: grep adde %t | wc -l | grep 1 +; RUN: grep addze %t | wc -l | grep 1 +; RUN: grep addme %t | wc -l | grep 1 +; RUN: grep addic %t | wc -l | grep 2 + +implementation ; Functions: + +long %add_ll(long %a, long %b) { +entry: + %tmp.2 = add long %b, %a ; <long> [#uses=1] + ret long %tmp.2 +} + +long %add_l_5(long %a) { +entry: + %tmp.1 = add long %a, 5 ; <long> [#uses=1] + ret long %tmp.1 +} + +long %add_l_m5(long %a) { +entry: + %tmp.1 = add long %a, -5 ; <long> [#uses=1] + ret long %tmp.1 +} diff --git a/test/CodeGen/PowerPC/addi-reassoc.ll b/test/CodeGen/PowerPC/addi-reassoc.ll new file mode 100644 index 0000000..753f628 --- /dev/null +++ b/test/CodeGen/PowerPC/addi-reassoc.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep addi + + %struct.X = type { [5 x sbyte] } +implementation ; Functions: + +int %test1([4 x int]* %P, int %i) { + %tmp.2 = add int %i, 2 ; <int> [#uses=1] + %tmp.4 = getelementptr [4 x int]* %P, int %tmp.2, int 1 + %tmp.5 = load int* %tmp.4 + ret int %tmp.5 +} + +int %test2(%struct.X* %P, int %i) { + %tmp.2 = add int %i, 2 + %tmp.5 = getelementptr %struct.X* %P, int %tmp.2, uint 0, int 1 + %tmp.6 = load sbyte* %tmp.5 + %tmp.7 = cast sbyte %tmp.6 to int + ret int %tmp.7 +} + diff --git a/test/CodeGen/PowerPC/align.ll b/test/CodeGen/PowerPC/align.ll new file mode 100644 index 0000000..caf4a5d --- /dev/null +++ b/test/CodeGen/PowerPC/align.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep align.4 | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep align.2 | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep align.3 | wc -l | grep 1 + + +%A = global <4 x uint> < uint 10, uint 20, uint 30, uint 40 > +%B = global float 1.000000e+02 +%C = global double 2.000000e+03 + diff --git a/test/CodeGen/PowerPC/and-branch.ll b/test/CodeGen/PowerPC/and-branch.ll new file mode 100644 index 0000000..4b0e7fa --- /dev/null +++ b/test/CodeGen/PowerPC/and-branch.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep mfcr + +void %foo(int %X, int %Y, int %Z) { +entry: + %tmp = seteq int %X, 0 ; <bool> [#uses=1] + %tmp3 = setlt int %Y, 5 ; <bool> [#uses=1] + %tmp4 = and bool %tmp3, %tmp ; <bool> [#uses=1] + br bool %tmp4, label %cond_true, label %UnifiedReturnBlock + +cond_true: ; preds = %entry + %tmp5 = tail call int (...)* %bar( ) ; <int> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare int %bar(...) diff --git a/test/CodeGen/PowerPC/and-elim.ll b/test/CodeGen/PowerPC/and-elim.ll new file mode 100644 index 0000000..f85b3d8 --- /dev/null +++ b/test/CodeGen/PowerPC/and-elim.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | not grep rlwin + +define void @test(i8* %P) { + %W = load i8* %P + %X = shl i8 %W, 1 + %Y = add i8 %X, 2 + %Z = and i8 %Y, 254 ; dead and + store i8 %Z, i8* %P + ret void +} + +define i16 @test2(i16 zext %crc) zext { + ; No and's should be needed for the i16s here. + %tmp.1 = lshr i16 %crc, 1 + %tmp.7 = xor i16 %tmp.1, 40961 + ret i16 %tmp.7 +} + diff --git a/test/CodeGen/PowerPC/and-imm.ll b/test/CodeGen/PowerPC/and-imm.ll new file mode 100644 index 0000000..b1d9fcb --- /dev/null +++ b/test/CodeGen/PowerPC/and-imm.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep {ori\\|lis} + +int %test(int %X) { + %Y = and int %X, 32769 ; andi. r3, r3, 32769 + ret int %Y +} + +int %test2(int %X) { + %Y = and int %X, -2147418112 ; andis. r3, r3, 32769 + ret int %Y +} + diff --git a/test/CodeGen/PowerPC/and_add.ll b/test/CodeGen/PowerPC/and_add.ll new file mode 100644 index 0000000..1f6428a --- /dev/null +++ b/test/CodeGen/PowerPC/and_add.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f +; RUN: grep slwi %t +; RUN: not grep addi %t +; RUN: not grep rlwinm %t + +int %test(int %A) { + %B = mul int %A, 8 ;; shift + %C = add int %B, 7 ;; dead, no demanded bits. + %D = and int %C, -8 ;; dead once add is gone. + ret int %D +} + diff --git a/test/CodeGen/PowerPC/and_sext.ll b/test/CodeGen/PowerPC/and_sext.ll new file mode 100644 index 0000000..ac27798 --- /dev/null +++ b/test/CodeGen/PowerPC/and_sext.ll @@ -0,0 +1,28 @@ +; These tests should not contain a sign extend. +; RUN: llvm-as < %s | llc -march=ppc32 | not grep extsh +; RUN: llvm-as < %s | llc -march=ppc32 | not grep extsb + +define i32 @test1(i32 %mode.0.i.0) { + %tmp.79 = trunc i32 %mode.0.i.0 to i16 + %tmp.80 = sext i16 %tmp.79 to i32 + %tmp.81 = and i32 %tmp.80, 24 + ret i32 %tmp.81 +} + +define i16 @test2(i16 sext %X, i16 sext %x) sext { + %tmp = sext i16 %X to i32 + %tmp1 = sext i16 %x to i32 + %tmp2 = add i32 %tmp, %tmp1 + %tmp4 = ashr i32 %tmp2, 1 + %tmp5 = trunc i32 %tmp4 to i16 + %tmp45 = sext i16 %tmp5 to i32 + %retval = trunc i32 %tmp45 to i16 + ret i16 %retval +} + +define i16 @test3(i32 zext %X) sext { + %tmp1 = lshr i32 %X, 16 + %tmp2 = trunc i32 %tmp1 to i16 + ret i16 %tmp2 +} + diff --git a/test/CodeGen/PowerPC/and_sra.ll b/test/CodeGen/PowerPC/and_sra.ll new file mode 100644 index 0000000..abfa9f1 --- /dev/null +++ b/test/CodeGen/PowerPC/and_sra.ll @@ -0,0 +1,26 @@ +; Neither of these functions should contain algebraic right shifts +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep srawi + +int %test1(uint %mode.0.i.0) { + %tmp.79 = cast uint %mode.0.i.0 to int ; <sbyte> [#uses=1] + %tmp.80 = shr int %tmp.79, ubyte 15 ; <int> [#uses=1] + %tmp.81 = and int %tmp.80, 24 ; <int> [#uses=1] + ret int %tmp.81 +} + +int %test2(uint %mode.0.i.0) { + %tmp.79 = cast uint %mode.0.i.0 to int ; <sbyte> [#uses=1] + %tmp.80 = shr int %tmp.79, ubyte 15 ; <int> [#uses=1] + %tmp.81 = shr uint %mode.0.i.0, ubyte 16 + %tmp.82 = cast uint %tmp.81 to int + %tmp.83 = and int %tmp.80, %tmp.82 ; <int> [#uses=1] + ret int %tmp.83 +} + +uint %test3(int %specbits.6.1) { + %tmp.2540 = shr int %specbits.6.1, ubyte 11 ; <int> [#uses=1] + %tmp.2541 = cast int %tmp.2540 to uint ; <uint> [#uses=1] + %tmp.2542 = shl uint %tmp.2541, ubyte 13 ; <uint> [#uses=1] + %tmp.2543 = and uint %tmp.2542, 8192 ; <uint> [#uses=1] + ret uint %tmp.2543 +} diff --git a/test/CodeGen/PowerPC/big-endian-actual-args.ll b/test/CodeGen/PowerPC/big-endian-actual-args.ll new file mode 100644 index 0000000..d239357 --- /dev/null +++ b/test/CodeGen/PowerPC/big-endian-actual-args.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ +; RUN: grep {addc 4, 4, 6} +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ +; RUN: grep {adde 3, 3, 5} + +define i64 @foo(i64 %x, i64 %y) { + %z = add i64 %x, %y + ret i64 %z +} diff --git a/test/CodeGen/PowerPC/big-endian-call-result.ll b/test/CodeGen/PowerPC/big-endian-call-result.ll new file mode 100644 index 0000000..ab136f6 --- /dev/null +++ b/test/CodeGen/PowerPC/big-endian-call-result.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ +; RUN: grep {addic 4, 4, 1} +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ +; RUN: grep {addze 3, 3} + +declare i64 @foo() + +define i64 @bar() +{ + %t = call i64 @foo() + %s = add i64 %t, 1 + ret i64 %s +} diff --git a/test/CodeGen/PowerPC/big-endian-formal-args.ll b/test/CodeGen/PowerPC/big-endian-formal-args.ll new file mode 100644 index 0000000..08589f4 --- /dev/null +++ b/test/CodeGen/PowerPC/big-endian-formal-args.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ +; RUN: grep {li 6, 3} +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ +; RUN: grep {li 4, 2} +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ +; RUN: grep {li 3, 0} +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ +; RUN: grep {mr 5, 3} + +declare void @bar(i64 %x, i64 %y) + +define void @foo() { + call void @bar(i64 2, i64 3) + ret void +} diff --git a/test/CodeGen/PowerPC/branch-opt.ll b/test/CodeGen/PowerPC/branch-opt.ll new file mode 100644 index 0000000..ab550a3 --- /dev/null +++ b/test/CodeGen/PowerPC/branch-opt.ll @@ -0,0 +1,93 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep {b LBB.*} | wc -l | grep 4 + +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.7.0" + +implementation ; Functions: + +void %foo(int %W, int %X, int %Y, int %Z) { +entry: + %X = cast int %X to uint ; <uint> [#uses=1] + %Y = cast int %Y to uint ; <uint> [#uses=1] + %Z = cast int %Z to uint ; <uint> [#uses=1] + %W = cast int %W to uint ; <uint> [#uses=1] + %tmp1 = and int %W, 1 ; <int> [#uses=1] + %tmp1 = seteq int %tmp1, 0 ; <bool> [#uses=1] + br bool %tmp1, label %cond_false, label %bb5 + +bb: ; preds = %bb5, %bb + %indvar77 = phi uint [ %indvar.next78, %bb ], [ 0, %bb5 ] ; <uint> [#uses=1] + %tmp2 = tail call int (...)* %bar( ) ; <int> [#uses=0] + %indvar.next78 = add uint %indvar77, 1 ; <uint> [#uses=2] + %exitcond79 = seteq uint %indvar.next78, %X ; <bool> [#uses=1] + br bool %exitcond79, label %cond_next48, label %bb + +bb5: ; preds = %entry + %tmp = seteq int %X, 0 ; <bool> [#uses=1] + br bool %tmp, label %cond_next48, label %bb + +cond_false: ; preds = %entry + %tmp10 = and int %W, 2 ; <int> [#uses=1] + %tmp10 = seteq int %tmp10, 0 ; <bool> [#uses=1] + br bool %tmp10, label %cond_false20, label %bb16 + +bb12: ; preds = %bb16, %bb12 + %indvar72 = phi uint [ %indvar.next73, %bb12 ], [ 0, %bb16 ] ; <uint> [#uses=1] + %tmp13 = tail call int (...)* %bar( ) ; <int> [#uses=0] + %indvar.next73 = add uint %indvar72, 1 ; <uint> [#uses=2] + %exitcond74 = seteq uint %indvar.next73, %Y ; <bool> [#uses=1] + br bool %exitcond74, label %cond_next48, label %bb12 + +bb16: ; preds = %cond_false + %tmp18 = seteq int %Y, 0 ; <bool> [#uses=1] + br bool %tmp18, label %cond_next48, label %bb12 + +cond_false20: ; preds = %cond_false + %tmp23 = and int %W, 4 ; <int> [#uses=1] + %tmp23 = seteq int %tmp23, 0 ; <bool> [#uses=1] + br bool %tmp23, label %cond_false33, label %bb29 + +bb25: ; preds = %bb29, %bb25 + %indvar67 = phi uint [ %indvar.next68, %bb25 ], [ 0, %bb29 ] ; <uint> [#uses=1] + %tmp26 = tail call int (...)* %bar( ) ; <int> [#uses=0] + %indvar.next68 = add uint %indvar67, 1 ; <uint> [#uses=2] + %exitcond69 = seteq uint %indvar.next68, %Z ; <bool> [#uses=1] + br bool %exitcond69, label %cond_next48, label %bb25 + +bb29: ; preds = %cond_false20 + %tmp31 = seteq int %Z, 0 ; <bool> [#uses=1] + br bool %tmp31, label %cond_next48, label %bb25 + +cond_false33: ; preds = %cond_false20 + %tmp36 = and int %W, 8 ; <int> [#uses=1] + %tmp36 = seteq int %tmp36, 0 ; <bool> [#uses=1] + br bool %tmp36, label %cond_next48, label %bb42 + +bb38: ; preds = %bb42 + %tmp39 = tail call int (...)* %bar( ) ; <int> [#uses=0] + %indvar.next = add uint %indvar, 1 ; <uint> [#uses=1] + br label %bb42 + +bb42: ; preds = %cond_false33, %bb38 + %indvar = phi uint [ %indvar.next, %bb38 ], [ 0, %cond_false33 ] ; <uint> [#uses=3] + %indvar = cast uint %indvar to int ; <int> [#uses=1] + %W_addr.0 = sub int %W, %indvar ; <int> [#uses=1] + %exitcond = seteq uint %indvar, %W ; <bool> [#uses=1] + br bool %exitcond, label %cond_next48, label %bb38 + +cond_next48: ; preds = %bb, %bb12, %bb25, %bb42, %cond_false33, %bb29, %bb16, %bb5 + %W_addr.1 = phi int [ %W, %bb5 ], [ %W, %bb16 ], [ %W, %bb29 ], [ %W, %cond_false33 ], [ %W_addr.0, %bb42 ], [ %W, %bb25 ], [ %W, %bb12 ], [ %W, %bb ] ; <int> [#uses=1] + %tmp50 = seteq int %W_addr.1, 0 ; <bool> [#uses=1] + br bool %tmp50, label %UnifiedReturnBlock, label %cond_true51 + +cond_true51: ; preds = %cond_next48 + %tmp52 = tail call int (...)* %bar( ) ; <int> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %cond_next48 + ret void +} + +declare int %bar(...) diff --git a/test/CodeGen/PowerPC/bswap-load-store.ll b/test/CodeGen/PowerPC/bswap-load-store.ll new file mode 100644 index 0000000..0c4a117 --- /dev/null +++ b/test/CodeGen/PowerPC/bswap-load-store.ll @@ -0,0 +1,44 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | wc -l | grep 4 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep rlwinm +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep rlwimi +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \ +; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | wc -l | grep 4 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | not grep rlwinm +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | not grep rlwimi + +void %STWBRX(uint %i, sbyte* %ptr, int %off) { + %tmp1 = getelementptr sbyte* %ptr, int %off + %tmp1 = cast sbyte* %tmp1 to uint* + %tmp13 = tail call uint %llvm.bswap.i32(uint %i) + store uint %tmp13, uint* %tmp1 + ret void +} + +uint %LWBRX(sbyte* %ptr, int %off) { + %tmp1 = getelementptr sbyte* %ptr, int %off + %tmp1 = cast sbyte* %tmp1 to uint* + %tmp = load uint* %tmp1 + %tmp14 = tail call uint %llvm.bswap.i32( uint %tmp ) + ret uint %tmp14 +} + +void %STHBRX(ushort %s, sbyte* %ptr, int %off) { + %tmp1 = getelementptr sbyte* %ptr, int %off + %tmp1 = cast sbyte* %tmp1 to ushort* + %tmp5 = call ushort %llvm.bswap.i16( ushort %s ) + store ushort %tmp5, ushort* %tmp1 + ret void +} + +ushort %LHBRX(sbyte* %ptr, int %off) { + %tmp1 = getelementptr sbyte* %ptr, int %off + %tmp1 = cast sbyte* %tmp1 to ushort* + %tmp = load ushort* %tmp1 + %tmp6 = call ushort %llvm.bswap.i16(ushort %tmp) + ret ushort %tmp6 +} + +declare uint %llvm.bswap.i32(uint) + +declare ushort %llvm.bswap.i16(ushort) diff --git a/test/CodeGen/PowerPC/buildvec_canonicalize.ll b/test/CodeGen/PowerPC/buildvec_canonicalize.ll new file mode 100644 index 0000000..54cbdae --- /dev/null +++ b/test/CodeGen/PowerPC/buildvec_canonicalize.ll @@ -0,0 +1,27 @@ +; There should be exactly one vxor here. +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \ +; RUN: grep vxor | wc -l | grep 1 + +; There should be exactly one vsplti here. +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \ +; RUN: grep vsplti | wc -l | grep 1 + + +void %VXOR(<4 x float>* %P1, <4 x int>* %P2, <4 x float>* %P3) { + %tmp = load <4 x float>* %P3 + %tmp3 = load <4 x float>* %P1 + %tmp4 = mul <4 x float> %tmp, %tmp3 + store <4 x float> %tmp4, <4 x float>* %P3 + store <4 x float> zeroinitializer, <4 x float>* %P1 + store <4 x int> zeroinitializer, <4 x int>* %P2 + ret void +} + +void %VSPLTI(<4 x int>* %P2, <8 x short>* %P3) { + store <4 x int> cast (<16 x sbyte> < sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1 > to <4 x int>), <4 x int>* %P2 + store <8 x short> < short -1, short -1, short -1, short -1, short -1, short -1, short -1, short -1 >, <8 x short>* %P3 + ret void +} + diff --git a/test/CodeGen/PowerPC/calls.ll b/test/CodeGen/PowerPC/calls.ll new file mode 100644 index 0000000..f2a6003 --- /dev/null +++ b/test/CodeGen/PowerPC/calls.ll @@ -0,0 +1,31 @@ +; Test various forms of calls. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep {bl } | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep {bctrl} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep {bla } | wc -l | grep 1 + +declare void %foo() + +void %test_direct() { + call void %foo() + ret void +} + +void %test_extsym(sbyte *%P) { + free sbyte* %P + ret void +} + +void %test_indirect(void()* %fp) { + call void %fp() + ret void +} + +void %test_abs() { + %fp = cast int 400 to void()* + call void %fp() + ret void +} diff --git a/test/CodeGen/PowerPC/cmp-cmp.ll b/test/CodeGen/PowerPC/cmp-cmp.ll new file mode 100644 index 0000000..6dbe484 --- /dev/null +++ b/test/CodeGen/PowerPC/cmp-cmp.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep mfcr + +void %test(long %X) { + %tmp1 = and long %X, 3 ; <long> [#uses=1] + %tmp = setgt long %tmp1, 2 ; <bool> [#uses=1] + br bool %tmp, label %UnifiedReturnBlock, label %cond_true + +cond_true: ; preds = %entry + tail call void %test(long 0) + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + diff --git a/test/CodeGen/PowerPC/compare-duplicate.ll b/test/CodeGen/PowerPC/compare-duplicate.ll new file mode 100644 index 0000000..df2dfdc --- /dev/null +++ b/test/CodeGen/PowerPC/compare-duplicate.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -mtriple=powerpc-apple-darwin8 | not grep slwi + +define i32 @test(i32 %A, i32 %B) { + %C = sub i32 %B, %A + %D = icmp eq i32 %C, %A + br i1 %D, label %T, label %F +T: + ret i32 19123 +F: + ret i32 %C +} diff --git a/test/CodeGen/PowerPC/compare-simm.ll b/test/CodeGen/PowerPC/compare-simm.ll new file mode 100644 index 0000000..b0ef2d3f --- /dev/null +++ b/test/CodeGen/PowerPC/compare-simm.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {cmpwi cr0, r3, -1} + +define i32 @test(i32 %x) { + %c = icmp eq i32 %x, -1 + br i1 %c, label %T, label %F +T: + %A = call i32 @test(i32 123) + %B = add i32 %A, 43 + ret i32 %B +F: + %G = add i32 %x, 1234 + ret i32 %G +} diff --git a/test/CodeGen/PowerPC/constants.ll b/test/CodeGen/PowerPC/constants.ll new file mode 100644 index 0000000..4689a62 --- /dev/null +++ b/test/CodeGen/PowerPC/constants.ll @@ -0,0 +1,54 @@ +; All of these routines should be perform optimal load of constants. +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep lis | wc -l | grep 5 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep ori | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep {li } | wc -l | grep 4 + +implementation ; Functions: + +int %f1() { +entry: + ret int 1 +} + +int %f2() { +entry: + ret int -1 +} + +int %f3() { +entry: + ret int 0 +} + +int %f4() { +entry: + ret int 32767 +} + +int %f5() { +entry: + ret int 65535 +} + +int %f6() { +entry: + ret int 65536 +} + +int %f7() { +entry: + ret int 131071 +} + +int %f8() { +entry: + ret int 2147483647 +} + +int %f9() { +entry: + ret int -2147483648 +} diff --git a/test/CodeGen/PowerPC/cttz.ll b/test/CodeGen/PowerPC/cttz.ll new file mode 100644 index 0000000..3751d66 --- /dev/null +++ b/test/CodeGen/PowerPC/cttz.ll @@ -0,0 +1,12 @@ +; Make sure this testcase does not use ctpop +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep -i cntlzw + +declare uint %llvm.cttz.i32(uint) + +implementation ; Functions: + +uint %bar(uint %x) { +entry: + %tmp.1 = call uint %llvm.cttz.i32( uint %x ) + ret uint %tmp.1 +} diff --git a/test/CodeGen/PowerPC/darwin-labels.ll b/test/CodeGen/PowerPC/darwin-labels.ll new file mode 100644 index 0000000..c8bf47c --- /dev/null +++ b/test/CodeGen/PowerPC/darwin-labels.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc | grep {foo bar":} + +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.2.0" + +"foo bar" = global int 4 + diff --git a/test/CodeGen/PowerPC/dg.exp b/test/CodeGen/PowerPC/dg.exp new file mode 100644 index 0000000..22b60bc --- /dev/null +++ b/test/CodeGen/PowerPC/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target PowerPC] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] +} diff --git a/test/CodeGen/PowerPC/div-2.ll b/test/CodeGen/PowerPC/div-2.ll new file mode 100644 index 0000000..a3cd73c --- /dev/null +++ b/test/CodeGen/PowerPC/div-2.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep srawi +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep blr + +int %test1(int %X) { + %Y = and int %X, 15 + %Z = div int %Y, 4 + ret int %Z +} + +int %test2(int %W) { + %X = and int %W, 15 + %Y = sub int 16, %X + %Z = div int %Y, 4 + ret int %Z +} + +int %test3(int %W) { + %X = and int %W, 15 + %Y = sub int 15, %X + %Z = div int %Y, 4 + ret int %Z +} + +int %test4(int %W) { + %X = and int %W, 2 + %Y = sub int 5, %X + %Z = div int %Y, 2 + ret int %Z +} diff --git a/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll b/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll new file mode 100644 index 0000000..359824c --- /dev/null +++ b/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll @@ -0,0 +1,94 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep eqv | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | \ +; RUN: grep andc | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep orc | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | \ +; RUN: grep nor | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep nand | wc -l | grep 1 + +int %EQV1(int %X, int %Y) { + %A = xor int %X, %Y + %B = xor int %A, -1 + ret int %B +} + +int %EQV2(int %X, int %Y) { + %A = xor int %X, -1 + %B = xor int %A, %Y + ret int %B +} + +int %EQV3(int %X, int %Y) { + %A = xor int %X, -1 + %B = xor int %Y, %A + ret int %B +} + +int %ANDC1(int %X, int %Y) { + %A = xor int %Y, -1 + %B = and int %X, %A + ret int %B +} + +int %ANDC2(int %X, int %Y) { + %A = xor int %X, -1 + %B = and int %A, %Y + ret int %B +} + +int %ORC1(int %X, int %Y) { + %A = xor int %Y, -1 + %B = or int %X, %A + ret int %B +} + +int %ORC2(int %X, int %Y) { + %A = xor int %X, -1 + %B = or int %A, %Y + ret int %B +} + +int %NOR1(int %X) { + %Y = xor int %X, -1 + ret int %Y +} + +int %NOR2(int %X, int %Y) { + %Z = or int %X, %Y + %R = xor int %Z, -1 + ret int %R +} + +int %NAND1(int %X, int %Y) { + %Z = and int %X, %Y + %W = xor int %Z, -1 + ret int %W +} + +void %VNOR(<4 x float>* %P, <4 x float>* %Q) { + %tmp = load <4 x float>* %P + %tmp = cast <4 x float> %tmp to <4 x int> + %tmp2 = load <4 x float>* %Q + %tmp2 = cast <4 x float> %tmp2 to <4 x int> + %tmp3 = or <4 x int> %tmp, %tmp2 + %tmp4 = xor <4 x int> %tmp3, < int -1, int -1, int -1, int -1 > + %tmp4 = cast <4 x int> %tmp4 to <4 x float> + store <4 x float> %tmp4, <4 x float>* %P + ret void +} + +void %VANDC(<4 x float>* %P, <4 x float>* %Q) { + %tmp = load <4 x float>* %P + %tmp = cast <4 x float> %tmp to <4 x int> + %tmp2 = load <4 x float>* %Q + %tmp2 = cast <4 x float> %tmp2 to <4 x int> + %tmp4 = xor <4 x int> %tmp2, < int -1, int -1, int -1, int -1 > + %tmp3 = and <4 x int> %tmp, %tmp4 + %tmp4 = cast <4 x int> %tmp3 to <4 x float> + store <4 x float> %tmp4, <4 x float>* %P + ret void +} + diff --git a/test/CodeGen/PowerPC/extsh.ll b/test/CodeGen/PowerPC/extsh.ll new file mode 100644 index 0000000..0f4f512 --- /dev/null +++ b/test/CodeGen/PowerPC/extsh.ll @@ -0,0 +1,7 @@ +; This should turn into a single extsh +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep extsh | wc -l | grep 1 +int %test(int %X) { + %tmp.81 = shl int %X, ubyte 16 ; <int> [#uses=1] + %tmp.82 = shr int %tmp.81, ubyte 16 ; <int> [#uses=1] + ret int %tmp.82 +} diff --git a/test/CodeGen/PowerPC/fma.ll b/test/CodeGen/PowerPC/fma.ll new file mode 100644 index 0000000..da2790b --- /dev/null +++ b/test/CodeGen/PowerPC/fma.ll @@ -0,0 +1,47 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: egrep {fn?madd|fn?msub} | wc -l | grep 8 + +double %test_FMADD1(double %A, double %B, double %C) { + %D = mul double %A, %B + %E = add double %D, %C + ret double %E +} +double %test_FMADD2(double %A, double %B, double %C) { + %D = mul double %A, %B + %E = add double %D, %C + ret double %E +} +double %test_FMSUB(double %A, double %B, double %C) { + %D = mul double %A, %B + %E = sub double %D, %C + ret double %E +} +double %test_FNMADD1(double %A, double %B, double %C) { + %D = mul double %A, %B + %E = add double %D, %C + %F = sub double -0.0, %E + ret double %F +} +double %test_FNMADD2(double %A, double %B, double %C) { + %D = mul double %A, %B + %E = add double %C, %D + %F = sub double -0.0, %E + ret double %F +} +double %test_FNMSUB1(double %A, double %B, double %C) { + %D = mul double %A, %B + %E = sub double %C, %D + ret double %E +} +double %test_FNMSUB2(double %A, double %B, double %C) { + %D = mul double %A, %B + %E = sub double %D, %C + %F = sub double -0.0, %E + ret double %F +} +float %test_FNMSUBS(float %A, float %B, float %C) { + %D = mul float %A, %B + %E = sub float %D, %C + %F = sub float -0.0, %E + ret float %F +} diff --git a/test/CodeGen/PowerPC/fnabs.ll b/test/CodeGen/PowerPC/fnabs.ll new file mode 100644 index 0000000..5d0ef5f --- /dev/null +++ b/test/CodeGen/PowerPC/fnabs.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fnabs + +declare double %fabs(double) + +implementation + +double %test(double %X) { + %Y = call double %fabs(double %X) + %Z = sub double -0.0, %Y + ret double %Z +} diff --git a/test/CodeGen/PowerPC/fneg.ll b/test/CodeGen/PowerPC/fneg.ll new file mode 100644 index 0000000..a4f49f7 --- /dev/null +++ b/test/CodeGen/PowerPC/fneg.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | not grep fneg + +define double @test1(double %a, double %b, double %c, double %d) { +entry: + %tmp2 = sub double -0.000000e+00, %c ; <double> [#uses=1] + %tmp4 = mul double %tmp2, %d ; <double> [#uses=1] + %tmp7 = mul double %a, %b ; <double> [#uses=1] + %tmp9 = sub double %tmp7, %tmp4 ; <double> [#uses=1] + ret double %tmp9 +} + + diff --git a/test/CodeGen/PowerPC/fnegsel.ll b/test/CodeGen/PowerPC/fnegsel.ll new file mode 100644 index 0000000..b1b0645 --- /dev/null +++ b/test/CodeGen/PowerPC/fnegsel.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep fneg + +double %test_FNEG_sel(double %A, double %B, double %C) { + %D = sub double -0.0, %A + %Cond = setgt double %D, -0.0 + %E = select bool %Cond, double %B, double %C + ret double %E +} diff --git a/test/CodeGen/PowerPC/fold-li.ll b/test/CodeGen/PowerPC/fold-li.ll new file mode 100644 index 0000000..66a900f --- /dev/null +++ b/test/CodeGen/PowerPC/fold-li.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ +; RUN: grep -v align | not grep li + +;; Test that immediates are folded into these instructions correctly. + +int %ADD(int %X) { + %Y = add int %X, 65537 + ret int %Y +} + +int %SUB(int %X) { + %Y = sub int %X, 65537 + ret int %Y +} diff --git a/test/CodeGen/PowerPC/fp-branch.ll b/test/CodeGen/PowerPC/fp-branch.ll new file mode 100644 index 0000000..1a371ed --- /dev/null +++ b/test/CodeGen/PowerPC/fp-branch.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fcmp | wc -l | grep 1 + +declare bool %llvm.isunordered.f64(double, double) + +bool %intcoord_cond_next55(double %tmp48.reload) { +newFuncRoot: + br label %cond_next55 + +bb72.exitStub: ; preds = %cond_next55 + ret bool true + +cond_next62.exitStub: ; preds = %cond_next55 + ret bool false + +cond_next55: ; preds = %newFuncRoot + %tmp57 = setge double %tmp48.reload, 1.000000e+00 ; <bool> [#uses=1] + %tmp58 = tail call bool %llvm.isunordered.f64( double %tmp48.reload, double 1.000000e+00 ) ; <bool> [#uses=1] + %tmp59 = or bool %tmp57, %tmp58 ; <bool> [#uses=1] + br bool %tmp59, label %bb72.exitStub, label %cond_next62.exitStub +} diff --git a/test/CodeGen/PowerPC/fp-int-fp.ll b/test/CodeGen/PowerPC/fp-int-fp.ll new file mode 100644 index 0000000..63ebc49 --- /dev/null +++ b/test/CodeGen/PowerPC/fp-int-fp.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep r1 + +double %test1(double %X) { + %Y = cast double %X to long + %Z = cast long %Y to double + ret double %Z +} + +float %test2(double %X) { + %Y = cast double %X to long + %Z = cast long %Y to float + ret float %Z +} + +double %test3(float %X) { + %Y = cast float %X to long + %Z = cast long %Y to double + ret double %Z +} + +float %test4(float %X) { + %Y = cast float %X to long + %Z = cast long %Y to float + ret float %Z +} + diff --git a/test/CodeGen/PowerPC/fp_to_uint.ll b/test/CodeGen/PowerPC/fp_to_uint.ll new file mode 100644 index 0000000..83468a4 --- /dev/null +++ b/test/CodeGen/PowerPC/fp_to_uint.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fctiwz | wc -l | grep 1 + +implementation + +ushort %foo(float %a) { +entry: + %tmp.1 = cast float %a to ushort + ret ushort %tmp.1 +} diff --git a/test/CodeGen/PowerPC/fpcopy.ll b/test/CodeGen/PowerPC/fpcopy.ll new file mode 100644 index 0000000..ce86da8 --- /dev/null +++ b/test/CodeGen/PowerPC/fpcopy.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep fmr + +double %test(float %F) { + %F = cast float %F to double + ret double %F +} diff --git a/test/CodeGen/PowerPC/fsqrt.ll b/test/CodeGen/PowerPC/fsqrt.ll new file mode 100644 index 0000000..809077b --- /dev/null +++ b/test/CodeGen/PowerPC/fsqrt.ll @@ -0,0 +1,21 @@ +; fsqrt should be generated when the fsqrt feature is enabled, but not +; otherwise. + +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=+fsqrt | \ +; RUN: grep {fsqrt f1, f1} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ +; RUN: grep {fsqrt f1, f1} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-fsqrt | \ +; RUN: not grep {fsqrt f1, f1} +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g4 | \ +; RUN: not grep {fsqrt f1, f1} + +declare double %llvm.sqrt.f64(double) +double %X(double %Y) { + %Z = call double %llvm.sqrt.f64(double %Y) + ret double %Z +} diff --git a/test/CodeGen/PowerPC/hello.ll b/test/CodeGen/PowerPC/hello.ll new file mode 100644 index 0000000..1d7275f --- /dev/null +++ b/test/CodeGen/PowerPC/hello.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=ppc32 +; RUN: llvm-as < %s | llc -march=ppc64 +; PR1399 + +@.str = internal constant [13 x i8] c"Hello World!\00" + +define i32 @main() { + %tmp2 = tail call i32 @puts( i8* getelementptr ([13 x i8]* @.str, i32 0, i64 0) ) + ret i32 0 +} + +declare i32 @puts(i8*) diff --git a/test/CodeGen/PowerPC/i64_fp.ll b/test/CodeGen/PowerPC/i64_fp.ll new file mode 100644 index 0000000..8720327 --- /dev/null +++ b/test/CodeGen/PowerPC/i64_fp.ll @@ -0,0 +1,25 @@ +; fcfid and fctid should be generated when the 64bit feature is enabled, but not +; otherwise. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mattr=+64bit | \ +; RUN: grep fcfid +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mattr=+64bit | \ +; RUN: grep fctidz +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | \ +; RUN: grep fcfid +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | \ +; RUN: grep fctidz +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mattr=-64bit | \ +; RUN: not grep fcfid +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mattr=-64bit | \ +; RUN: not grep fctidz +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g4 | \ +; RUN: not grep fcfid +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g4 | \ +; RUN: not grep fctidz + +double %X(double %Y) { + %A = cast double %Y to long + %B = cast long %A to double + ret double %B +} diff --git a/test/CodeGen/PowerPC/iabs.ll b/test/CodeGen/PowerPC/iabs.ll new file mode 100644 index 0000000..677b41b --- /dev/null +++ b/test/CodeGen/PowerPC/iabs.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -stats |& \ +; RUN: grep {4 .*Number of machine instrs printed} + +;; Integer absolute value, should produce something as good as: +;; srawi r2, r3, 31 +;; add r3, r3, r2 +;; xor r3, r3, r2 +;; blr +define i32 @test(i32 %a) { + %tmp1neg = sub i32 0, %a + %b = icmp sgt i32 %a, -1 + %abs = select i1 %b, i32 %a, i32 %tmp1neg + ret i32 %abs +} + diff --git a/test/CodeGen/PowerPC/inlineasm-copy.ll b/test/CodeGen/PowerPC/inlineasm-copy.ll new file mode 100644 index 0000000..34594d2 --- /dev/null +++ b/test/CodeGen/PowerPC/inlineasm-copy.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep mr + +int %test(int %Y, int %X) { +entry: + %tmp = tail call int asm "foo $0", "=r"( ) ; <int> [#uses=1] + ret int %tmp +} + +int %test2(int %Y, int %X) { +entry: + %tmp1 = tail call int asm "foo $0, $1", "=r,r"( int %X ) ; <int> [#uses=1] + ret int %tmp1 +} diff --git a/test/CodeGen/PowerPC/inverted-bool-compares.ll b/test/CodeGen/PowerPC/inverted-bool-compares.ll new file mode 100644 index 0000000..fbbf6a5 --- /dev/null +++ b/test/CodeGen/PowerPC/inverted-bool-compares.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep xori + +int %test(bool %B, int* %P) { + br bool %B, label %T, label %F +T: + store int 123, int* %P + ret int 0 +F: +ret int 17 +} diff --git a/test/CodeGen/PowerPC/ispositive.ll b/test/CodeGen/PowerPC/ispositive.ll new file mode 100644 index 0000000..192d738 --- /dev/null +++ b/test/CodeGen/PowerPC/ispositive.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {srwi r3, r3, 31} + +define i32 @test1(i32 %X) { +entry: + icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] + zext i1 %0 to i32 ; <i32>:1 [#uses=1] + ret i32 %1 +} + diff --git a/test/CodeGen/PowerPC/lha.ll b/test/CodeGen/PowerPC/lha.ll new file mode 100644 index 0000000..cc35e8a --- /dev/null +++ b/test/CodeGen/PowerPC/lha.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep lha + +uint %test(short* %a) { + %tmp.1 = load short* %a + %tmp.2 = cast short %tmp.1 to uint + ret uint %tmp.2 +} diff --git a/test/CodeGen/PowerPC/load-constant-addr.ll b/test/CodeGen/PowerPC/load-constant-addr.ll new file mode 100644 index 0000000..65ec782 --- /dev/null +++ b/test/CodeGen/PowerPC/load-constant-addr.ll @@ -0,0 +1,9 @@ +; Should fold the ori into the lfs. +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep lfs +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep ori + +float %test() { + %tmp.i = load float* cast (uint 186018016 to float*) + ret float %tmp.i +} + diff --git a/test/CodeGen/PowerPC/long-compare.ll b/test/CodeGen/PowerPC/long-compare.ll new file mode 100644 index 0000000..7b90725 --- /dev/null +++ b/test/CodeGen/PowerPC/long-compare.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | grep cntlzw +; RUN: llvm-as < %s | llc -march=ppc32 | not grep xori +; RUN: llvm-as < %s | llc -march=ppc32 | not grep {li } +; RUN: llvm-as < %s | llc -march=ppc32 | not grep {mr } + +define i1 @test(i64 %x) { + %tmp = icmp ult i64 %x, 4294967296 + ret i1 %tmp +} diff --git a/test/CodeGen/PowerPC/mem-rr-addr-mode.ll b/test/CodeGen/PowerPC/mem-rr-addr-mode.ll new file mode 100644 index 0000000..8aa7aa2 --- /dev/null +++ b/test/CodeGen/PowerPC/mem-rr-addr-mode.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep li.*16 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep addi + +; Codegen lvx (R+16) as t = li 16, lvx t,R +; This shares the 16 between the two loads. + +void %func(<4 x float>* %a, <4 x float>* %b) { + %tmp1 = getelementptr <4 x float>* %b, int 1 + %tmp = load <4 x float>* %tmp1 + %tmp3 = getelementptr <4 x float>* %a, int 1 + %tmp4 = load <4 x float>* %tmp3 + %tmp5 = mul <4 x float> %tmp, %tmp4 + %tmp8 = load <4 x float>* %b + %tmp9 = add <4 x float> %tmp5, %tmp8 + store <4 x float> %tmp9, <4 x float>* %a + ret void +} diff --git a/test/CodeGen/PowerPC/mem_update.ll b/test/CodeGen/PowerPC/mem_update.ll new file mode 100644 index 0000000..4d3ebe9 --- /dev/null +++ b/test/CodeGen/PowerPC/mem_update.ll @@ -0,0 +1,68 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -enable-ppc-preinc | \ +; RUN: not grep addi +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -enable-ppc-preinc | \ +; RUN: not grep addi +%Glob = global ulong 4 + +int *%test0(int *%X, int *%dest) { + %Y = getelementptr int* %X, int 4 + %A = load int* %Y + store int %A, int* %dest + ret int* %Y +} + +int *%test1(int *%X, int *%dest) { + %Y = getelementptr int* %X, int 4 + %A = load int* %Y + store int %A, int* %dest + ret int* %Y +} + +short *%test2(short *%X, int *%dest) { + %Y = getelementptr short* %X, int 4 + %A = load short* %Y + %B = cast short %A to int + store int %B, int* %dest + ret short* %Y +} + +ushort *%test3(ushort *%X, int *%dest) { + %Y = getelementptr ushort* %X, int 4 + %A = load ushort* %Y + %B = cast ushort %A to int + store int %B, int* %dest + ret ushort* %Y +} + +short *%test3a(short *%X, long *%dest) { + %Y = getelementptr short* %X, int 4 + %A = load short* %Y + %B = cast short %A to long + store long %B, long* %dest + ret short* %Y +} + +long *%test4(long *%X, long *%dest) { + %Y = getelementptr long* %X, int 4 + %A = load long* %Y + store long %A, long* %dest + ret long* %Y +} + +ushort *%test5(ushort *%X) { + %Y = getelementptr ushort* %X, int 4 + store ushort 7, ushort* %Y + ret ushort* %Y +} + +ulong *%test6(ulong *%X, ulong %A) { + %Y = getelementptr ulong* %X, int 4 + store ulong %A, ulong* %Y + ret ulong* %Y +} + +ulong *%test7(ulong *%X, ulong %A) { + store ulong %A, ulong* %Glob + ret ulong *%Glob +} + diff --git a/test/CodeGen/PowerPC/mul-neg-power-2.ll b/test/CodeGen/PowerPC/mul-neg-power-2.ll new file mode 100644 index 0000000..b9be1cc --- /dev/null +++ b/test/CodeGen/PowerPC/mul-neg-power-2.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep mul + +int %test1(int %a) { + %tmp.1 = mul int %a, -2 ; <int> [#uses=1] + %tmp.2 = add int %tmp.1, 63 ; <int> [#uses=1] + ret int %tmp.2 +} + diff --git a/test/CodeGen/PowerPC/mulhs.ll b/test/CodeGen/PowerPC/mulhs.ll new file mode 100644 index 0000000..967905d --- /dev/null +++ b/test/CodeGen/PowerPC/mulhs.ll @@ -0,0 +1,18 @@ +; All of these ands and shifts should be folded into rlwimi's +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f +; RUN: not grep mulhwu %t +; RUN: not grep srawi %t +; RUN: not grep add %t +; RUN: grep mulhw %t | wc -l | grep 1 + +implementation ; Functions: + +int %mulhs(int %a, int %b) { +entry: + %tmp.1 = cast int %a to ulong ; <ulong> [#uses=1] + %tmp.3 = cast int %b to ulong ; <ulong> [#uses=1] + %tmp.4 = mul ulong %tmp.3, %tmp.1 ; <ulong> [#uses=1] + %tmp.6 = shr ulong %tmp.4, ubyte 32 ; <ulong> [#uses=1] + %tmp.7 = cast ulong %tmp.6 to int ; <int> [#uses=1] + ret int %tmp.7 +} diff --git a/test/CodeGen/PowerPC/neg.ll b/test/CodeGen/PowerPC/neg.ll new file mode 100644 index 0000000..7119f6c --- /dev/null +++ b/test/CodeGen/PowerPC/neg.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep neg + +int %test(int %X) { + %Y = sub int 0, %X + ret int %Y +} diff --git a/test/CodeGen/PowerPC/or-addressing-mode.ll b/test/CodeGen/PowerPC/or-addressing-mode.ll new file mode 100644 index 0000000..e448140 --- /dev/null +++ b/test/CodeGen/PowerPC/or-addressing-mode.ll @@ -0,0 +1,22 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=powerpc-apple-darwin8 | not grep ori +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=powerpc-apple-darwin8 | not grep rlwimi + +int %test1(sbyte* %P) { ;; or -> lwzx + %tmp.2.i = cast sbyte* %P to uint + %tmp.4.i = and uint %tmp.2.i, 4294901760 + %tmp.10.i = shr uint %tmp.2.i, ubyte 5 + %tmp.11.i = and uint %tmp.10.i, 2040 + %tmp.13.i = or uint %tmp.11.i, %tmp.4.i + %tmp.14.i = cast uint %tmp.13.i to int* + %tmp.3 = load int* %tmp.14.i + ret int %tmp.3 +} + +int %test2(int %P) { ;; or -> lwz + %tmp.2 = shl int %P, ubyte 4 + %tmp.3 = or int %tmp.2, 2 + %tmp.4 = cast int %tmp.3 to int* + %tmp.5 = load int* %tmp.4 + ret int %tmp.5 +} + diff --git a/test/CodeGen/PowerPC/reg-coalesce-simple.ll b/test/CodeGen/PowerPC/reg-coalesce-simple.ll new file mode 100644 index 0000000..60e9458 --- /dev/null +++ b/test/CodeGen/PowerPC/reg-coalesce-simple.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep or + +%struct.foo = type { int, int, [0 x ubyte] } +int %test(%struct.foo* %X) { + %tmp1 = getelementptr %struct.foo* %X, int 0, uint 2, int 100 + %tmp = load ubyte* %tmp1 ; <ubyte> [#uses=1] + %tmp2 = cast ubyte %tmp to int ; <int> [#uses=1] + ret int %tmp2} + + + diff --git a/test/CodeGen/PowerPC/rlwimi-commute.ll b/test/CodeGen/PowerPC/rlwimi-commute.ll new file mode 100644 index 0000000..8e6b1d6 --- /dev/null +++ b/test/CodeGen/PowerPC/rlwimi-commute.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep {or } + +; Make sure there is no register-register copies here. + +void %test1(int *%A, int *%B, int *%D, int* %E) { + %A = load int* %A + %B = load int* %B + %X = and int %A, 15 + %Y = and int %B, -16 + %Z = or int %X, %Y + store int %Z, int* %D + store int %A, int* %E + ret void +} + +void %test2(int *%A, int *%B, int *%D, int* %E) { + %A = load int* %A + %B = load int* %B + %X = and int %A, 15 + %Y = and int %B, -16 + %Z = or int %X, %Y + store int %Z, int* %D + store int %B, int* %E + ret void +} diff --git a/test/CodeGen/PowerPC/rlwimi.ll b/test/CodeGen/PowerPC/rlwimi.ll new file mode 100644 index 0000000..92afcf9 --- /dev/null +++ b/test/CodeGen/PowerPC/rlwimi.ll @@ -0,0 +1,72 @@ +; All of these ands and shifts should be folded into rlwimi's +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep and +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi | wc -l | grep 8 + +implementation ; Functions: + +int %test1(int %x, int %y) { +entry: + %tmp.3 = shl int %x, ubyte 16 ; <int> [#uses=1] + %tmp.7 = and int %y, 65535 ; <int> [#uses=1] + %tmp.9 = or int %tmp.7, %tmp.3 ; <int> [#uses=1] + ret int %tmp.9 +} + +int %test2(int %x, int %y) { +entry: + %tmp.7 = and int %x, 65535 ; <int> [#uses=1] + %tmp.3 = shl int %y, ubyte 16 ; <int> [#uses=1] + %tmp.9 = or int %tmp.7, %tmp.3 ; <int> [#uses=1] + ret int %tmp.9 +} + +uint %test3(uint %x, uint %y) { +entry: + %tmp.3 = shr uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp.6 = and uint %y, 4294901760 ; <uint> [#uses=1] + %tmp.7 = or uint %tmp.6, %tmp.3 ; <uint> [#uses=1] + ret uint %tmp.7 +} + +uint %test4(uint %x, uint %y) { +entry: + %tmp.6 = and uint %x, 4294901760 ; <uint> [#uses=1] + %tmp.3 = shr uint %y, ubyte 16 ; <uint> [#uses=1] + %tmp.7 = or uint %tmp.6, %tmp.3 ; <uint> [#uses=1] + ret uint %tmp.7 +} + +int %test5(int %x, int %y) { +entry: + %tmp.3 = shl int %x, ubyte 1 ; <int> [#uses=1] + %tmp.4 = and int %tmp.3, -65536 ; <int> [#uses=1] + %tmp.7 = and int %y, 65535 ; <int> [#uses=1] + %tmp.9 = or int %tmp.4, %tmp.7 ; <int> [#uses=1] + ret int %tmp.9 +} + +int %test6(int %x, int %y) { +entry: + %tmp.7 = and int %x, 65535 ; <int> [#uses=1] + %tmp.3 = shl int %y, ubyte 1 ; <int> [#uses=1] + %tmp.4 = and int %tmp.3, -65536 ; <int> [#uses=1] + %tmp.9 = or int %tmp.4, %tmp.7 ; <int> [#uses=1] + ret int %tmp.9 +} + +int %test7(int %x, int %y) { +entry: + %tmp.2 = and int %x, -65536 ; <int> [#uses=1] + %tmp.5 = and int %y, 65535 ; <int> [#uses=1] + %tmp.7 = or int %tmp.5, %tmp.2 ; <int> [#uses=1] + ret int %tmp.7 +} + +uint %test8(uint %bar) { +entry: + %tmp.3 = shl uint %bar, ubyte 1 ; <uint> [#uses=1] + %tmp.4 = and uint %tmp.3, 2 ; <uint> [#uses=1] + %tmp.6 = and uint %bar, 4294967293 ; <uint> [#uses=1] + %tmp.7 = or uint %tmp.4, %tmp.6 ; <uint> [#uses=1] + ret uint %tmp.7 +} diff --git a/test/CodeGen/PowerPC/rlwimi2.ll b/test/CodeGen/PowerPC/rlwimi2.ll new file mode 100644 index 0000000..c264d2e --- /dev/null +++ b/test/CodeGen/PowerPC/rlwimi2.ll @@ -0,0 +1,31 @@ +; All of these ands and shifts should be folded into rlwimi's +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f +; RUN: grep rlwimi %t | wc -l | grep 3 +; RUN: grep srwi %t | wc -l | grep 1 +; RUN: not grep slwi %t + +implementation ; Functions: + +ushort %test1(uint %srcA, uint %srcB, uint %alpha) { +entry: + %tmp.1 = shl uint %srcA, ubyte 15 ; <uint> [#uses=1] + %tmp.4 = and uint %tmp.1, 32505856 ; <uint> [#uses=1] + %tmp.6 = and uint %srcA, 31775 ; <uint> [#uses=1] + %tmp.7 = or uint %tmp.4, %tmp.6 ; <uint> [#uses=1] + %tmp.9 = shl uint %srcB, ubyte 15 ; <uint> [#uses=1] + %tmp.12 = and uint %tmp.9, 32505856 ; <uint> [#uses=1] + %tmp.14 = and uint %srcB, 31775 ; <uint> [#uses=1] + %tmp.15 = or uint %tmp.12, %tmp.14 ; <uint> [#uses=1] + %tmp.18 = mul uint %tmp.7, %alpha ; <uint> [#uses=1] + %tmp.20 = sub uint 32, %alpha ; <uint> [#uses=1] + %tmp.22 = mul uint %tmp.15, %tmp.20 ; <uint> [#uses=1] + %tmp.23 = add uint %tmp.22, %tmp.18 ; <uint> [#uses=2] + %tmp.27 = shr uint %tmp.23, ubyte 5 ; <uint> [#uses=1] + %tmp.28 = cast uint %tmp.27 to ushort ; <ushort> [#uses=1] + %tmp.29 = and ushort %tmp.28, 31775 ; <ushort> [#uses=1] + %tmp.33 = shr uint %tmp.23, ubyte 20 ; <uint> [#uses=1] + %tmp.34 = cast uint %tmp.33 to ushort ; <ushort> [#uses=1] + %tmp.35 = and ushort %tmp.34, 992 ; <ushort> [#uses=1] + %tmp.36 = or ushort %tmp.29, %tmp.35 ; <ushort> [#uses=1] + ret ushort %tmp.36 +} diff --git a/test/CodeGen/PowerPC/rlwimi3.ll b/test/CodeGen/PowerPC/rlwimi3.ll new file mode 100644 index 0000000..b313ef9 --- /dev/null +++ b/test/CodeGen/PowerPC/rlwimi3.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -stats |& \ +; RUN: grep {Number of machine instrs printed} | grep 12 + +ushort %Trans16Bit(uint %srcA, uint %srcB, uint %alpha) { + %tmp1 = shl uint %srcA, ubyte 15 ; <uint> [#uses=1] + %tmp2 = and uint %tmp1, 32505856 ; <uint> [#uses=1] + %tmp4 = and uint %srcA, 31775 ; <uint> [#uses=1] + %tmp5 = or uint %tmp2, %tmp4 ; <uint> [#uses=1] + %tmp7 = shl uint %srcB, ubyte 15 ; <uint> [#uses=1] + %tmp8 = and uint %tmp7, 32505856 ; <uint> [#uses=1] + %tmp10 = and uint %srcB, 31775 ; <uint> [#uses=1] + %tmp11 = or uint %tmp8, %tmp10 ; <uint> [#uses=1] + %tmp14 = mul uint %tmp5, %alpha ; <uint> [#uses=1] + %tmp16 = sub uint 32, %alpha ; <uint> [#uses=1] + %tmp18 = mul uint %tmp11, %tmp16 ; <uint> [#uses=1] + %tmp19 = add uint %tmp18, %tmp14 ; <uint> [#uses=2] + %tmp21 = shr uint %tmp19, ubyte 5 ; <uint> [#uses=1] + %tmp21 = cast uint %tmp21 to ushort ; <ushort> [#uses=1] + %tmp = and ushort %tmp21, 31775 ; <ushort> [#uses=1] + %tmp23 = shr uint %tmp19, ubyte 20 ; <uint> [#uses=1] + %tmp23 = cast uint %tmp23 to ushort ; <ushort> [#uses=1] + %tmp24 = and ushort %tmp23, 992 ; <ushort> [#uses=1] + %tmp25 = or ushort %tmp, %tmp24 ; <ushort> [#uses=1] + ret ushort %tmp25 +} + diff --git a/test/CodeGen/PowerPC/rlwinm.ll b/test/CodeGen/PowerPC/rlwinm.ll new file mode 100644 index 0000000..32e8f26 --- /dev/null +++ b/test/CodeGen/PowerPC/rlwinm.ll @@ -0,0 +1,64 @@ +; All of these ands and shifts should be folded into rlwimi's +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f +; RUN: not grep and %t +; RUN: not grep srawi %t +; RUN: not grep srwi %t +; RUN: not grep slwi %t +; RUN: grep rlwinm %t | wc -l | grep 8 + +implementation ; Functions: + +int %test1(int %a) { +entry: + %tmp.1 = and int %a, 268431360 ; <int> [#uses=1] + ret int %tmp.1 +} + +int %test2(int %a) { +entry: + %tmp.1 = and int %a, -268435441 ; <int> [#uses=1] + ret int %tmp.1 +} + +int %test3(int %a) { +entry: + %tmp.2 = shr int %a, ubyte 8 ; <int> [#uses=1] + %tmp.3 = and int %tmp.2, 255 ; <int> [#uses=1] + ret int %tmp.3 +} + +uint %test4(uint %a) { +entry: + %tmp.3 = shr uint %a, ubyte 8 ; <uint> [#uses=1] + %tmp.4 = and uint %tmp.3, 255 ; <uint> [#uses=1] + ret uint %tmp.4 +} + +int %test5(int %a) { +entry: + %tmp.2 = shl int %a, ubyte 8 ; <int> [#uses=1] + %tmp.3 = and int %tmp.2, -8388608 ; <int> [#uses=1] + ret int %tmp.3 +} + +int %test6(int %a) { +entry: + %tmp.1 = and int %a, 65280 ; <int> [#uses=1] + %tmp.2 = shr int %tmp.1, ubyte 8 ; <uint> [#uses=1] + ret int %tmp.2 +} + +uint %test7(uint %a) { +entry: + %tmp.1 = and uint %a, 65280 ; <uint> [#uses=1] + %tmp.2 = shr uint %tmp.1, ubyte 8 ; <uint> [#uses=1] + ret uint %tmp.2 +} + +int %test8(int %a) { +entry: + %tmp.1 = and int %a, 16711680 ; <int> [#uses=1] + %tmp.2 = shl int %tmp.1, ubyte 8 ; <int> [#uses=1] + ret int %tmp.2 +} + diff --git a/test/CodeGen/PowerPC/rlwinm2.ll b/test/CodeGen/PowerPC/rlwinm2.ll new file mode 100644 index 0000000..78127f1 --- /dev/null +++ b/test/CodeGen/PowerPC/rlwinm2.ll @@ -0,0 +1,28 @@ +; All of these ands and shifts should be folded into rlw[i]nm instructions +; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f +; RUN: not grep and %t +; RUN: not grep srawi %t +; RUN: not grep srwi %t +; RUN: not grep slwi %t +; RUN: grep rlwnm %t | wc -l | grep 1 +; RUN: grep rlwinm %t | wc -l | grep 1 + +define i32 @test1(i32 %X, i32 %Y) { +entry: + %tmp = trunc i32 %Y to i8 ; <i8> [#uses=2] + %tmp1 = shl i32 %X, %Y ; <i32> [#uses=1] + %tmp2 = sub i32 32, %Y ; <i8> [#uses=1] + %tmp3 = lshr i32 %X, %tmp2 ; <i32> [#uses=1] + %tmp4 = or i32 %tmp1, %tmp3 ; <i32> [#uses=1] + %tmp6 = and i32 %tmp4, 127 ; <i32> [#uses=1] + ret i32 %tmp6 +} + +define i32 @test2(i32 %X) { +entry: + %tmp1 = lshr i32 %X, 27 ; <i32> [#uses=1] + %tmp2 = shl i32 %X, 5 ; <i32> [#uses=1] + %tmp2.masked = and i32 %tmp2, 96 ; <i32> [#uses=1] + %tmp5 = or i32 %tmp1, %tmp2.masked ; <i32> [#uses=1] + ret i32 %tmp5 +} diff --git a/test/CodeGen/PowerPC/rotl-2.ll b/test/CodeGen/PowerPC/rotl-2.ll new file mode 100644 index 0000000..523b5e4 --- /dev/null +++ b/test/CodeGen/PowerPC/rotl-2.ll @@ -0,0 +1,38 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | wc -l | grep 4 +; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=ppc32 | not grep or + +define i32 @rotl32(i32 %A, i8 %Amt) { + %shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1] + %B = shl i32 %A, %shift.upgrd.1 ; <i32> [#uses=1] + %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1] + %shift.upgrd.2 = zext i8 %Amt2 to i32 ; <i32> [#uses=1] + %C = lshr i32 %A, %shift.upgrd.2 ; <i32> [#uses=1] + %D = or i32 %B, %C ; <i32> [#uses=1] + ret i32 %D +} + +define i32 @rotr32(i32 %A, i8 %Amt) { + %shift.upgrd.3 = zext i8 %Amt to i32 ; <i32> [#uses=1] + %B = lshr i32 %A, %shift.upgrd.3 ; <i32> [#uses=1] + %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1] + %shift.upgrd.4 = zext i8 %Amt2 to i32 ; <i32> [#uses=1] + %C = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1] + %D = or i32 %B, %C ; <i32> [#uses=1] + ret i32 %D +} + +define i32 @rotli32(i32 %A) { + %B = shl i32 %A, 5 ; <i32> [#uses=1] + %C = lshr i32 %A, 27 ; <i32> [#uses=1] + %D = or i32 %B, %C ; <i32> [#uses=1] + ret i32 %D +} + +define i32 @rotri32(i32 %A) { + %B = lshr i32 %A, 5 ; <i32> [#uses=1] + %C = shl i32 %A, 27 ; <i32> [#uses=1] + %D = or i32 %B, %C ; <i32> [#uses=1] + ret i32 %D +} + diff --git a/test/CodeGen/PowerPC/rotl.ll b/test/CodeGen/PowerPC/rotl.ll new file mode 100644 index 0000000..aa033cf --- /dev/null +++ b/test/CodeGen/PowerPC/rotl.ll @@ -0,0 +1,37 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | wc -l | grep 2 + +define i32 @rotlw(i32 %x, i32 %sh) { +entry: + %tmp.7 = sub i32 32, %sh ; <i32> [#uses=1] + %tmp.10 = lshr i32 %x, %tmp.7 ; <i32> [#uses=2] + %tmp.4 = shl i32 %x, %sh ; <i32> [#uses=1] + %tmp.12 = or i32 %tmp.10, %tmp.4 ; <i32> [#uses=1] + ret i32 %tmp.12 +} + +define i32 @rotrw(i32 %x, i32 %sh) { +entry: + %tmp.3 = trunc i32 %sh to i8 ; <i8> [#uses=1] + %tmp.4 = lshr i32 %x, %sh ; <i32> [#uses=2] + %tmp.7 = sub i32 32, %sh ; <i32> [#uses=1] + %tmp.10 = shl i32 %x, %tmp.7 ; <i32> [#uses=1] + %tmp.12 = or i32 %tmp.4, %tmp.10 ; <i32> [#uses=1] + ret i32 %tmp.12 +} + +define i32 @rotlwi(i32 %x) { +entry: + %tmp.7 = lshr i32 %x, 27 ; <i32> [#uses=2] + %tmp.3 = shl i32 %x, 5 ; <i32> [#uses=1] + %tmp.9 = or i32 %tmp.3, %tmp.7 ; <i32> [#uses=1] + ret i32 %tmp.9 +} + +define i32 @rotrwi(i32 %x) { +entry: + %tmp.3 = lshr i32 %x, 5 ; <i32> [#uses=2] + %tmp.7 = shl i32 %x, 27 ; <i32> [#uses=1] + %tmp.9 = or i32 %tmp.3, %tmp.7 ; <i32> [#uses=1] + ret i32 %tmp.9 +} diff --git a/test/CodeGen/PowerPC/select_lt0.ll b/test/CodeGen/PowerPC/select_lt0.ll new file mode 100644 index 0000000..bb5213f --- /dev/null +++ b/test/CodeGen/PowerPC/select_lt0.ll @@ -0,0 +1,51 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep cmp + +int %seli32_1(int %a) { +entry: + %tmp.1 = setlt int %a, 0 + %retval = select bool %tmp.1, int 5, int 0 + ret int %retval +} + +int %seli32_2(int %a, int %b) { +entry: + %tmp.1 = setlt int %a, 0 + %retval = select bool %tmp.1, int %b, int 0 + ret int %retval +} + +int %seli32_3(int %a, short %b) { +entry: + %tmp.2 = cast short %b to int + %tmp.1 = setlt int %a, 0 + %retval = select bool %tmp.1, int %tmp.2, int 0 + ret int %retval +} + +int %seli32_4(int %a, ushort %b) { +entry: + %tmp.2 = cast ushort %b to int + %tmp.1 = setlt int %a, 0 + %retval = select bool %tmp.1, int %tmp.2, int 0 + ret int %retval +} + +short %seli16_1(short %a) { +entry: + %tmp.1 = setlt short %a, 0 + %retval = select bool %tmp.1, short 7, short 0 + ret short %retval +} + +short %seli16_2(int %a, short %b) { + %tmp.1 = setlt int %a, 0 + %retval = select bool %tmp.1, short %b, short 0 + ret short %retval +} + +int %seli32_a_a(int %a) { + %tmp = setlt int %a, 1 + %min = select bool %tmp, int %a, int 0 + ret int %min +} + diff --git a/test/CodeGen/PowerPC/setcc_no_zext.ll b/test/CodeGen/PowerPC/setcc_no_zext.ll new file mode 100644 index 0000000..00e9bf0 --- /dev/null +++ b/test/CodeGen/PowerPC/setcc_no_zext.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep rlwinm + +int %setcc_one_or_zero(int* %a) { +entry: + %tmp.1 = setne int* %a, null + %inc.1 = cast bool %tmp.1 to int + ret int %inc.1 +} diff --git a/test/CodeGen/PowerPC/seteq-0.ll b/test/CodeGen/PowerPC/seteq-0.ll new file mode 100644 index 0000000..a574100 --- /dev/null +++ b/test/CodeGen/PowerPC/seteq-0.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {srwi r., r., 5} + +int %eq0(int %a) { + %tmp.1 = seteq int %a, 0 ; <bool> [#uses=1] + %tmp.2 = cast bool %tmp.1 to int ; <int> [#uses=1] + ret int %tmp.2 +} diff --git a/test/CodeGen/PowerPC/shl_elim.ll b/test/CodeGen/PowerPC/shl_elim.ll new file mode 100644 index 0000000..3dc4772 --- /dev/null +++ b/test/CodeGen/PowerPC/shl_elim.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | not grep slwi + +define i32 @test1(i64 %a) { + %tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1] + %tmp23 = trunc i64 %tmp29 to i32 ; <i32> [#uses=1] + %tmp410 = lshr i32 %tmp23, 9 ; <i32> [#uses=1] + %tmp45 = trunc i32 %tmp410 to i16 ; <i16> [#uses=1] + %tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1] + ret i32 %tmp456 +} + diff --git a/test/CodeGen/PowerPC/shl_sext.ll b/test/CodeGen/PowerPC/shl_sext.ll new file mode 100644 index 0000000..af18338 --- /dev/null +++ b/test/CodeGen/PowerPC/shl_sext.ll @@ -0,0 +1,17 @@ +; This test should not contain a sign extend +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep extsb + +int %test(uint %mode.0.i.0) { + %tmp.79 = cast uint %mode.0.i.0 to sbyte ; <sbyte> [#uses=1] + %tmp.80 = cast sbyte %tmp.79 to int ; <int> [#uses=1] + %tmp.81 = shl int %tmp.80, ubyte 24 ; <int> [#uses=1] + ret int %tmp.81 +} + +int %test2(uint %mode.0.i.0) { + %tmp.79 = cast uint %mode.0.i.0 to sbyte ; <sbyte> [#uses=1] + %tmp.80 = cast sbyte %tmp.79 to int ; <int> [#uses=1] + %tmp.81 = shl int %tmp.80, ubyte 16 ; <int> [#uses=1] + %tmp.82 = and int %tmp.81, 16711680 + ret int %tmp.82 +} diff --git a/test/CodeGen/PowerPC/sign_ext_inreg1.ll b/test/CodeGen/PowerPC/sign_ext_inreg1.ll new file mode 100644 index 0000000..0e67f77 --- /dev/null +++ b/test/CodeGen/PowerPC/sign_ext_inreg1.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | grep srwi +; RUN: llvm-as < %s | llc -march=ppc32 | not grep rlwimi + +define i32 @baz(i64 %a) { + %tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1] + %tmp23 = trunc i64 %tmp29 to i32 ; <i32> [#uses=1] + %tmp410 = lshr i32 %tmp23, 9 ; <i32> [#uses=1] + %tmp45 = trunc i32 %tmp410 to i16 ; <i16> [#uses=1] + %tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1] + ret i32 %tmp456 +} + diff --git a/test/CodeGen/PowerPC/small-arguments.ll b/test/CodeGen/PowerPC/small-arguments.ll new file mode 100644 index 0000000..e512047 --- /dev/null +++ b/test/CodeGen/PowerPC/small-arguments.ll @@ -0,0 +1,52 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | not grep {extsh\\|rlwinm} + +declare i16 @foo() sext + +define i32 @test1(i16 sext %X) { + %Y = sext i16 %X to i32 ;; dead + ret i32 %Y +} + +define i32 @test2(i16 zext %X) { + %Y = sext i16 %X to i32 + %Z = and i32 %Y, 65535 ;; dead + ret i32 %Z +} + +define void @test3() { + %tmp.0 = call i16 @foo() sext ;; no extsh! + %tmp.1 = icmp slt i16 %tmp.0, 1234 + br i1 %tmp.1, label %then, label %UnifiedReturnBlock + +then: + call i32 @test1(i16 0 sext) + ret void +UnifiedReturnBlock: + ret void +} + +define i32 @test4(i16* %P) { + %tmp.1 = load i16* %P + %tmp.2 = zext i16 %tmp.1 to i32 + %tmp.3 = and i32 %tmp.2, 255 + ret i32 %tmp.3 +} + +define i32 @test5(i16* %P) { + %tmp.1 = load i16* %P + %tmp.2 = bitcast i16 %tmp.1 to i16 + %tmp.3 = zext i16 %tmp.2 to i32 + %tmp.4 = and i32 %tmp.3, 255 + ret i32 %tmp.4 +} + +define i32 @test6(i32* %P) { + %tmp.1 = load i32* %P + %tmp.2 = and i32 %tmp.1, 255 + ret i32 %tmp.2 +} + +define i16 @test7(float %a) zext { + %tmp.1 = fptoui float %a to i16 + ret i16 %tmp.1 +} diff --git a/test/CodeGen/PowerPC/stfiwx.ll b/test/CodeGen/PowerPC/stfiwx.ll new file mode 100644 index 0000000..2eebc07 --- /dev/null +++ b/test/CodeGen/PowerPC/stfiwx.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=stfiwx -o %t1 -f +; RUN: grep stfiwx %t1 +; RUN: not grep r1 %t1 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-stfiwx \ +; RUN: -o %t2 -f +; RUN: not grep stfiwx %t2 +; RUN: grep r1 %t2 + +void %test(float %a, int* %b) { + %tmp.2 = cast float %a to int + store int %tmp.2, int* %b + ret void +} + +void %test2(float %a, int* %b, int %i) { + %tmp.2 = getelementptr int* %b, int 1 + %tmp.5 = getelementptr int* %b, int %i + %tmp.7 = cast float %a to int + store int %tmp.7, int* %tmp.5 + store int %tmp.7, int* %tmp.2 + store int %tmp.7, int* %b + ret void +} + diff --git a/test/CodeGen/PowerPC/store-load-fwd.ll b/test/CodeGen/PowerPC/store-load-fwd.ll new file mode 100644 index 0000000..761fb5a --- /dev/null +++ b/test/CodeGen/PowerPC/store-load-fwd.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep lwz +int %test(int* %P) { + store int 1, int* %P + %V = load int* %P + ret int %V +} diff --git a/test/CodeGen/PowerPC/subc.ll b/test/CodeGen/PowerPC/subc.ll new file mode 100644 index 0000000..3624791 --- /dev/null +++ b/test/CodeGen/PowerPC/subc.ll @@ -0,0 +1,26 @@ +; All of these should be codegen'd without loading immediates +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f +; RUN: grep subfc %t | wc -l | grep 1 +; RUN: grep subfe %t | wc -l | grep 1 +; RUN: grep subfze %t | wc -l | grep 1 +; RUN: grep subfme %t | wc -l | grep 1 +; RUN: grep subfic %t | wc -l | grep 2 +implementation ; Functions: + +long %sub_ll(long %a, long %b) { +entry: + %tmp.2 = sub long %a, %b ; <long> [#uses=1] + ret long %tmp.2 +} + +long %sub_l_5(long %a) { +entry: + %tmp.1 = sub long 5, %a ; <long> [#uses=1] + ret long %tmp.1 +} + +long %sub_l_m5(long %a) { +entry: + %tmp.1 = sub long -5, %a ; <long> [#uses=1] + ret long %tmp.1 +} diff --git a/test/CodeGen/PowerPC/unsafe-math.ll b/test/CodeGen/PowerPC/unsafe-math.ll new file mode 100644 index 0000000..770dcb6 --- /dev/null +++ b/test/CodeGen/PowerPC/unsafe-math.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | grep fmul | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=ppc32 -enable-unsafe-fp-math | \ +; RUN: grep fmul | wc -l | grep 1 + +define double @foo(double %X) { + %tmp1 = mul double %X, 1.23 + %tmp2 = mul double %tmp1, 4.124 + ret double %tmp2 +} + diff --git a/test/CodeGen/PowerPC/vcmp-fold.ll b/test/CodeGen/PowerPC/vcmp-fold.ll new file mode 100644 index 0000000..6ae41a9 --- /dev/null +++ b/test/CodeGen/PowerPC/vcmp-fold.ll @@ -0,0 +1,21 @@ +; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single +; "vcmpbfp.". +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep vcmpbfp | wc -l | grep 1 + +void %test(<4 x float>* %x, <4 x float>* %y, int* %P) { +entry: + %tmp = load <4 x float>* %x ; <<4 x float>> [#uses=1] + %tmp2 = load <4 x float>* %y ; <<4 x float>> [#uses=1] + %tmp = call int %llvm.ppc.altivec.vcmpbfp.p( int 1, <4 x float> %tmp, <4 x float> %tmp2 ) ; <int> [#uses=1] + %tmp4 = load <4 x float>* %x ; <<4 x float>> [#uses=1] + %tmp6 = load <4 x float>* %y ; <<4 x float>> [#uses=1] + %tmp = call <4 x int> %llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ; <<4 x int>> [#uses=1] + %tmp7 = cast <4 x int> %tmp to <4 x float> ; <<4 x float>> [#uses=1] + store <4 x float> %tmp7, <4 x float>* %x + store int %tmp, int* %P + ret void +} + +declare int %llvm.ppc.altivec.vcmpbfp.p(int, <4 x float>, <4 x float>) + +declare <4 x int> %llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>) diff --git a/test/CodeGen/PowerPC/vec_br_cmp.ll b/test/CodeGen/PowerPC/vec_br_cmp.ll new file mode 100644 index 0000000..bc60bae --- /dev/null +++ b/test/CodeGen/PowerPC/vec_br_cmp.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 -o %t -f +; RUN: grep vcmpeqfp. %t +; RUN: not grep mfcr %t + +; A predicate compare used immediately by a branch should not generate an mfcr. + +void %test(<4 x float>* %A, <4 x float>* %B) { + %tmp = load <4 x float>* %A + %tmp3 = load <4 x float>* %B + %tmp = tail call int %llvm.ppc.altivec.vcmpeqfp.p( int 1, <4 x float> %tmp, <4 x float> %tmp3 ) + %tmp = seteq int %tmp, 0 + br bool %tmp, label %cond_true, label %UnifiedReturnBlock + +cond_true: + store <4 x float> zeroinitializer, <4 x float>* %B + ret void + +UnifiedReturnBlock: + ret void +} + +declare int %llvm.ppc.altivec.vcmpeqfp.p(int, <4 x float>, <4 x float>) + diff --git a/test/CodeGen/PowerPC/vec_call.ll b/test/CodeGen/PowerPC/vec_call.ll new file mode 100644 index 0000000..b2b91fe --- /dev/null +++ b/test/CodeGen/PowerPC/vec_call.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 + +<4 x int> %test_arg(<4 x int> %A, <4 x int> %B) { + %C = add <4 x int> %A, %B + ret <4 x int> %C +} + +<4 x int> %foo() { + %X = call <4 x int> %test_arg(<4 x int> zeroinitializer, <4 x int> zeroinitializer) + ret <4 x int> %X +} diff --git a/test/CodeGen/PowerPC/vec_constants.ll b/test/CodeGen/PowerPC/vec_constants.ll new file mode 100644 index 0000000..507d2d9 --- /dev/null +++ b/test/CodeGen/PowerPC/vec_constants.ll @@ -0,0 +1,47 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep CPI + + +; Tests spltw(0x80000000) and spltw(0x7FFFFFFF). +void %test1(<4 x int>* %P1, <4 x int>* %P2, <4 x float>* %P3) { + %tmp = load <4 x int>* %P1 + %tmp4 = and <4 x int> %tmp, < int -2147483648, int -2147483648, int -2147483648, int -2147483648 > + store <4 x int> %tmp4, <4 x int>* %P1 + %tmp7 = load <4 x int>* %P2 + %tmp9 = and <4 x int> %tmp7, < int 2147483647, int 2147483647, int 2147483647, int 2147483647 > + store <4 x int> %tmp9, <4 x int>* %P2 + %tmp = load <4 x float>* %P3 + %tmp11 = cast <4 x float> %tmp to <4 x int> + %tmp12 = and <4 x int> %tmp11, < int 2147483647, int 2147483647, int 2147483647, int 2147483647 > + %tmp13 = cast <4 x int> %tmp12 to <4 x float> + store <4 x float> %tmp13, <4 x float>* %P3 + ret void +} + +<4 x int> %test_30() { + ret <4 x int> <int 30, int 30, int 30, int 30> +} + +<4 x int> %test_29() { + ret <4 x int> <int 29, int 29, int 29, int 29> +} + +<8 x short> %test_n30() { + ret <8 x short> <short -30, short -30, short -30, short -30, + short -30, short -30, short -30, short -30> +} + +<16 x sbyte> %test_n104() { + ret <16 x sbyte> <sbyte -104, sbyte -104, sbyte -104, sbyte -104, + sbyte -104, sbyte -104, sbyte -104, sbyte -104, + sbyte -104, sbyte -104, sbyte -104, sbyte -104, + sbyte -104, sbyte -104, sbyte -104, sbyte -104> +} + +<4 x int> %test_vsldoi() { + ret <4 x int> <int 512, int 512, int 512, int 512> +} + +<4 x int> %test_rol() { + ret <4 x int> <int -11534337, int -11534337, int -11534337, int -11534337> +} + diff --git a/test/CodeGen/PowerPC/vec_mul.ll b/test/CodeGen/PowerPC/vec_mul.ll new file mode 100644 index 0000000..eea1def --- /dev/null +++ b/test/CodeGen/PowerPC/vec_mul.ll @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep mullw +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep vmsumuhm + +<4 x int> %test_v4i32(<4 x int>* %X, <4 x int>* %Y) { + %tmp = load <4 x int>* %X + %tmp2 = load <4 x int>* %Y + %tmp3 = mul <4 x int> %tmp, %tmp2 + ret <4 x int> %tmp3 +} + +<8 x short> %test_v8i16(<8 x short>* %X, <8 x short>* %Y) { + %tmp = load <8 x short>* %X + %tmp2 = load <8 x short>* %Y + %tmp3 = mul <8 x short> %tmp, %tmp2 + ret <8 x short> %tmp3 +} + +<16 x sbyte> %test_v16i8(<16 x sbyte>* %X, <16 x sbyte>* %Y) { + %tmp = load <16 x sbyte>* %X + %tmp2 = load <16 x sbyte>* %Y + %tmp3 = mul <16 x sbyte> %tmp, %tmp2 + ret <16 x sbyte> %tmp3 +} + diff --git a/test/CodeGen/PowerPC/vec_perf_shuffle.ll b/test/CodeGen/PowerPC/vec_perf_shuffle.ll new file mode 100644 index 0000000..6177b5f --- /dev/null +++ b/test/CodeGen/PowerPC/vec_perf_shuffle.ll @@ -0,0 +1,42 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm + +<4 x float> %test_uu72(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + ; vmrglw + vsldoi + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint undef, uint undef, uint 7, uint 2> + ret <4 x float> %V3 +} + +<4 x float> %test_30u5(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint 3, uint 0, uint undef, uint 5> + ret <4 x float> %V3 +} + +<4 x float> %test_3u73(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint 3, uint undef, uint 7, uint 3> + ret <4 x float> %V3 +} + +<4 x float> %test_3774(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint 3, uint 7, uint 7, uint 4> + ret <4 x float> %V3 +} + +<4 x float> %test_4450(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint 4, uint 4, uint 5, uint 0> + ret <4 x float> %V3 +} diff --git a/test/CodeGen/PowerPC/vec_shuffle.ll b/test/CodeGen/PowerPC/vec_shuffle.ll new file mode 100644 index 0000000..ba856ee --- /dev/null +++ b/test/CodeGen/PowerPC/vec_shuffle.ll @@ -0,0 +1,506 @@ +; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | \ +; RUN: llc -march=ppc32 -mcpu=g5 | not grep vperm +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 > %t +; RUN: grep vsldoi %t | wc -l | grep 2 +; RUN: grep vmrgh %t | wc -l | grep 7 +; RUN: grep vmrgl %t | wc -l | grep 6 +; RUN: grep vpkuhum %t | wc -l | grep 1 +; RUN: grep vpkuwum %t | wc -l | grep 1 + +void %VSLDOI_xy(<8 x short>* %A, <8 x short>* %B) { +entry: + %tmp = load <8 x short>* %A ; <<8 x short>> [#uses=1] + %tmp2 = load <8 x short>* %B ; <<8 x short>> [#uses=1] + %tmp = cast <8 x short> %tmp to <16 x sbyte> ; <<16 x sbyte>> [#uses=11] + %tmp2 = cast <8 x short> %tmp2 to <16 x sbyte> ; <<16 x sbyte>> [#uses=5] + %tmp = extractelement <16 x sbyte> %tmp, uint 5 ; <sbyte> [#uses=1] + %tmp3 = extractelement <16 x sbyte> %tmp, uint 6 ; <sbyte> [#uses=1] + %tmp4 = extractelement <16 x sbyte> %tmp, uint 7 ; <sbyte> [#uses=1] + %tmp5 = extractelement <16 x sbyte> %tmp, uint 8 ; <sbyte> [#uses=1] + %tmp6 = extractelement <16 x sbyte> %tmp, uint 9 ; <sbyte> [#uses=1] + %tmp7 = extractelement <16 x sbyte> %tmp, uint 10 ; <sbyte> [#uses=1] + %tmp8 = extractelement <16 x sbyte> %tmp, uint 11 ; <sbyte> [#uses=1] + %tmp9 = extractelement <16 x sbyte> %tmp, uint 12 ; <sbyte> [#uses=1] + %tmp10 = extractelement <16 x sbyte> %tmp, uint 13 ; <sbyte> [#uses=1] + %tmp11 = extractelement <16 x sbyte> %tmp, uint 14 ; <sbyte> [#uses=1] + %tmp12 = extractelement <16 x sbyte> %tmp, uint 15 ; <sbyte> [#uses=1] + %tmp13 = extractelement <16 x sbyte> %tmp2, uint 0 ; <sbyte> [#uses=1] + %tmp14 = extractelement <16 x sbyte> %tmp2, uint 1 ; <sbyte> [#uses=1] + %tmp15 = extractelement <16 x sbyte> %tmp2, uint 2 ; <sbyte> [#uses=1] + %tmp16 = extractelement <16 x sbyte> %tmp2, uint 3 ; <sbyte> [#uses=1] + %tmp17 = extractelement <16 x sbyte> %tmp2, uint 4 ; <sbyte> [#uses=1] + %tmp18 = insertelement <16 x sbyte> undef, sbyte %tmp, uint 0 ; <<16 x sbyte>> [#uses=1] + %tmp19 = insertelement <16 x sbyte> %tmp18, sbyte %tmp3, uint 1 ; <<16 x sbyte>> [#uses=1] + %tmp20 = insertelement <16 x sbyte> %tmp19, sbyte %tmp4, uint 2 ; <<16 x sbyte>> [#uses=1] + %tmp21 = insertelement <16 x sbyte> %tmp20, sbyte %tmp5, uint 3 ; <<16 x sbyte>> [#uses=1] + %tmp22 = insertelement <16 x sbyte> %tmp21, sbyte %tmp6, uint 4 ; <<16 x sbyte>> [#uses=1] + %tmp23 = insertelement <16 x sbyte> %tmp22, sbyte %tmp7, uint 5 ; <<16 x sbyte>> [#uses=1] + %tmp24 = insertelement <16 x sbyte> %tmp23, sbyte %tmp8, uint 6 ; <<16 x sbyte>> [#uses=1] + %tmp25 = insertelement <16 x sbyte> %tmp24, sbyte %tmp9, uint 7 ; <<16 x sbyte>> [#uses=1] + %tmp26 = insertelement <16 x sbyte> %tmp25, sbyte %tmp10, uint 8 ; <<16 x sbyte>> [#uses=1] + %tmp27 = insertelement <16 x sbyte> %tmp26, sbyte %tmp11, uint 9 ; <<16 x sbyte>> [#uses=1] + %tmp28 = insertelement <16 x sbyte> %tmp27, sbyte %tmp12, uint 10 ; <<16 x sbyte>> [#uses=1] + %tmp29 = insertelement <16 x sbyte> %tmp28, sbyte %tmp13, uint 11 ; <<16 x sbyte>> [#uses=1] + %tmp30 = insertelement <16 x sbyte> %tmp29, sbyte %tmp14, uint 12 ; <<16 x sbyte>> [#uses=1] + %tmp31 = insertelement <16 x sbyte> %tmp30, sbyte %tmp15, uint 13 ; <<16 x sbyte>> [#uses=1] + %tmp32 = insertelement <16 x sbyte> %tmp31, sbyte %tmp16, uint 14 ; <<16 x sbyte>> [#uses=1] + %tmp33 = insertelement <16 x sbyte> %tmp32, sbyte %tmp17, uint 15 ; <<16 x sbyte>> [#uses=1] + %tmp33 = cast <16 x sbyte> %tmp33 to <8 x short> ; <<8 x short>> [#uses=1] + store <8 x short> %tmp33, <8 x short>* %A + ret void +} + +void %VSLDOI_xx(<8 x short>* %A, <8 x short>* %B) { + %tmp = load <8 x short>* %A ; <<8 x short>> [#uses=1] + %tmp2 = load <8 x short>* %A ; <<8 x short>> [#uses=1] + %tmp = cast <8 x short> %tmp to <16 x sbyte> ; <<16 x sbyte>> [#uses=11] + %tmp2 = cast <8 x short> %tmp2 to <16 x sbyte> ; <<16 x sbyte>> [#uses=5] + %tmp = extractelement <16 x sbyte> %tmp, uint 5 ; <sbyte> [#uses=1] + %tmp3 = extractelement <16 x sbyte> %tmp, uint 6 ; <sbyte> [#uses=1] + %tmp4 = extractelement <16 x sbyte> %tmp, uint 7 ; <sbyte> [#uses=1] + %tmp5 = extractelement <16 x sbyte> %tmp, uint 8 ; <sbyte> [#uses=1] + %tmp6 = extractelement <16 x sbyte> %tmp, uint 9 ; <sbyte> [#uses=1] + %tmp7 = extractelement <16 x sbyte> %tmp, uint 10 ; <sbyte> [#uses=1] + %tmp8 = extractelement <16 x sbyte> %tmp, uint 11 ; <sbyte> [#uses=1] + %tmp9 = extractelement <16 x sbyte> %tmp, uint 12 ; <sbyte> [#uses=1] + %tmp10 = extractelement <16 x sbyte> %tmp, uint 13 ; <sbyte> [#uses=1] + %tmp11 = extractelement <16 x sbyte> %tmp, uint 14 ; <sbyte> [#uses=1] + %tmp12 = extractelement <16 x sbyte> %tmp, uint 15 ; <sbyte> [#uses=1] + %tmp13 = extractelement <16 x sbyte> %tmp2, uint 0 ; <sbyte> [#uses=1] + %tmp14 = extractelement <16 x sbyte> %tmp2, uint 1 ; <sbyte> [#uses=1] + %tmp15 = extractelement <16 x sbyte> %tmp2, uint 2 ; <sbyte> [#uses=1] + %tmp16 = extractelement <16 x sbyte> %tmp2, uint 3 ; <sbyte> [#uses=1] + %tmp17 = extractelement <16 x sbyte> %tmp2, uint 4 ; <sbyte> [#uses=1] + %tmp18 = insertelement <16 x sbyte> undef, sbyte %tmp, uint 0 ; <<16 x sbyte>> [#uses=1] + %tmp19 = insertelement <16 x sbyte> %tmp18, sbyte %tmp3, uint 1 ; <<16 x sbyte>> [#uses=1] + %tmp20 = insertelement <16 x sbyte> %tmp19, sbyte %tmp4, uint 2 ; <<16 x sbyte>> [#uses=1] + %tmp21 = insertelement <16 x sbyte> %tmp20, sbyte %tmp5, uint 3 ; <<16 x sbyte>> [#uses=1] + %tmp22 = insertelement <16 x sbyte> %tmp21, sbyte %tmp6, uint 4 ; <<16 x sbyte>> [#uses=1] + %tmp23 = insertelement <16 x sbyte> %tmp22, sbyte %tmp7, uint 5 ; <<16 x sbyte>> [#uses=1] + %tmp24 = insertelement <16 x sbyte> %tmp23, sbyte %tmp8, uint 6 ; <<16 x sbyte>> [#uses=1] + %tmp25 = insertelement <16 x sbyte> %tmp24, sbyte %tmp9, uint 7 ; <<16 x sbyte>> [#uses=1] + %tmp26 = insertelement <16 x sbyte> %tmp25, sbyte %tmp10, uint 8 ; <<16 x sbyte>> [#uses=1] + %tmp27 = insertelement <16 x sbyte> %tmp26, sbyte %tmp11, uint 9 ; <<16 x sbyte>> [#uses=1] + %tmp28 = insertelement <16 x sbyte> %tmp27, sbyte %tmp12, uint 10 ; <<16 x sbyte>> [#uses=1] + %tmp29 = insertelement <16 x sbyte> %tmp28, sbyte %tmp13, uint 11 ; <<16 x sbyte>> [#uses=1] + %tmp30 = insertelement <16 x sbyte> %tmp29, sbyte %tmp14, uint 12 ; <<16 x sbyte>> [#uses=1] + %tmp31 = insertelement <16 x sbyte> %tmp30, sbyte %tmp15, uint 13 ; <<16 x sbyte>> [#uses=1] + %tmp32 = insertelement <16 x sbyte> %tmp31, sbyte %tmp16, uint 14 ; <<16 x sbyte>> [#uses=1] + %tmp33 = insertelement <16 x sbyte> %tmp32, sbyte %tmp17, uint 15 ; <<16 x sbyte>> [#uses=1] + %tmp33 = cast <16 x sbyte> %tmp33 to <8 x short> ; <<8 x short>> [#uses=1] + store <8 x short> %tmp33, <8 x short>* %A + ret void +} + +void %VPERM_promote(<8 x short>* %A, <8 x short>* %B) { +entry: + %tmp = load <8 x short>* %A ; <<8 x short>> [#uses=1] + %tmp = cast <8 x short> %tmp to <4 x int> ; <<4 x int>> [#uses=1] + %tmp2 = load <8 x short>* %B ; <<8 x short>> [#uses=1] + %tmp2 = cast <8 x short> %tmp2 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp3 = call <4 x int> %llvm.ppc.altivec.vperm( <4 x int> %tmp, <4 x int> %tmp2, <16 x sbyte> < sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14, sbyte 14 > ) ; <<4 x int>> [#uses=1] + %tmp3 = cast <4 x int> %tmp3 to <8 x short> ; <<8 x short>> [#uses=1] + store <8 x short> %tmp3, <8 x short>* %A + ret void +} + +declare <4 x int> %llvm.ppc.altivec.vperm(<4 x int>, <4 x int>, <16 x sbyte>) + + +void %tb_l(<16 x sbyte>* %A, <16 x sbyte>* %B) { +entry: + %tmp = load <16 x sbyte>* %A ; <<16 x sbyte>> [#uses=8] + %tmp2 = load <16 x sbyte>* %B ; <<16 x sbyte>> [#uses=8] + %tmp = extractelement <16 x sbyte> %tmp, uint 8 ; <sbyte> [#uses=1] + %tmp3 = extractelement <16 x sbyte> %tmp2, uint 8 ; <sbyte> [#uses=1] + %tmp4 = extractelement <16 x sbyte> %tmp, uint 9 ; <sbyte> [#uses=1] + %tmp5 = extractelement <16 x sbyte> %tmp2, uint 9 ; <sbyte> [#uses=1] + %tmp6 = extractelement <16 x sbyte> %tmp, uint 10 ; <sbyte> [#uses=1] + %tmp7 = extractelement <16 x sbyte> %tmp2, uint 10 ; <sbyte> [#uses=1] + %tmp8 = extractelement <16 x sbyte> %tmp, uint 11 ; <sbyte> [#uses=1] + %tmp9 = extractelement <16 x sbyte> %tmp2, uint 11 ; <sbyte> [#uses=1] + %tmp10 = extractelement <16 x sbyte> %tmp, uint 12 ; <sbyte> [#uses=1] + %tmp11 = extractelement <16 x sbyte> %tmp2, uint 12 ; <sbyte> [#uses=1] + %tmp12 = extractelement <16 x sbyte> %tmp, uint 13 ; <sbyte> [#uses=1] + %tmp13 = extractelement <16 x sbyte> %tmp2, uint 13 ; <sbyte> [#uses=1] + %tmp14 = extractelement <16 x sbyte> %tmp, uint 14 ; <sbyte> [#uses=1] + %tmp15 = extractelement <16 x sbyte> %tmp2, uint 14 ; <sbyte> [#uses=1] + %tmp16 = extractelement <16 x sbyte> %tmp, uint 15 ; <sbyte> [#uses=1] + %tmp17 = extractelement <16 x sbyte> %tmp2, uint 15 ; <sbyte> [#uses=1] + %tmp18 = insertelement <16 x sbyte> undef, sbyte %tmp, uint 0 ; <<16 x sbyte>> [#uses=1] + %tmp19 = insertelement <16 x sbyte> %tmp18, sbyte %tmp3, uint 1 ; <<16 x sbyte>> [#uses=1] + %tmp20 = insertelement <16 x sbyte> %tmp19, sbyte %tmp4, uint 2 ; <<16 x sbyte>> [#uses=1] + %tmp21 = insertelement <16 x sbyte> %tmp20, sbyte %tmp5, uint 3 ; <<16 x sbyte>> [#uses=1] + %tmp22 = insertelement <16 x sbyte> %tmp21, sbyte %tmp6, uint 4 ; <<16 x sbyte>> [#uses=1] + %tmp23 = insertelement <16 x sbyte> %tmp22, sbyte %tmp7, uint 5 ; <<16 x sbyte>> [#uses=1] + %tmp24 = insertelement <16 x sbyte> %tmp23, sbyte %tmp8, uint 6 ; <<16 x sbyte>> [#uses=1] + %tmp25 = insertelement <16 x sbyte> %tmp24, sbyte %tmp9, uint 7 ; <<16 x sbyte>> [#uses=1] + %tmp26 = insertelement <16 x sbyte> %tmp25, sbyte %tmp10, uint 8 ; <<16 x sbyte>> [#uses=1] + %tmp27 = insertelement <16 x sbyte> %tmp26, sbyte %tmp11, uint 9 ; <<16 x sbyte>> [#uses=1] + %tmp28 = insertelement <16 x sbyte> %tmp27, sbyte %tmp12, uint 10 ; <<16 x sbyte>> [#uses=1] + %tmp29 = insertelement <16 x sbyte> %tmp28, sbyte %tmp13, uint 11 ; <<16 x sbyte>> [#uses=1] + %tmp30 = insertelement <16 x sbyte> %tmp29, sbyte %tmp14, uint 12 ; <<16 x sbyte>> [#uses=1] + %tmp31 = insertelement <16 x sbyte> %tmp30, sbyte %tmp15, uint 13 ; <<16 x sbyte>> [#uses=1] + %tmp32 = insertelement <16 x sbyte> %tmp31, sbyte %tmp16, uint 14 ; <<16 x sbyte>> [#uses=1] + %tmp33 = insertelement <16 x sbyte> %tmp32, sbyte %tmp17, uint 15 ; <<16 x sbyte>> [#uses=1] + store <16 x sbyte> %tmp33, <16 x sbyte>* %A + ret void +} + +void %th_l(<8 x short>* %A, <8 x short>* %B) { +entry: + %tmp = load <8 x short>* %A ; <<8 x short>> [#uses=4] + %tmp2 = load <8 x short>* %B ; <<8 x short>> [#uses=4] + %tmp = extractelement <8 x short> %tmp, uint 4 ; <short> [#uses=1] + %tmp3 = extractelement <8 x short> %tmp2, uint 4 ; <short> [#uses=1] + %tmp4 = extractelement <8 x short> %tmp, uint 5 ; <short> [#uses=1] + %tmp5 = extractelement <8 x short> %tmp2, uint 5 ; <short> [#uses=1] + %tmp6 = extractelement <8 x short> %tmp, uint 6 ; <short> [#uses=1] + %tmp7 = extractelement <8 x short> %tmp2, uint 6 ; <short> [#uses=1] + %tmp8 = extractelement <8 x short> %tmp, uint 7 ; <short> [#uses=1] + %tmp9 = extractelement <8 x short> %tmp2, uint 7 ; <short> [#uses=1] + %tmp10 = insertelement <8 x short> undef, short %tmp, uint 0 ; <<8 x short>> [#uses=1] + %tmp11 = insertelement <8 x short> %tmp10, short %tmp3, uint 1 ; <<8 x short>> [#uses=1] + %tmp12 = insertelement <8 x short> %tmp11, short %tmp4, uint 2 ; <<8 x short>> [#uses=1] + %tmp13 = insertelement <8 x short> %tmp12, short %tmp5, uint 3 ; <<8 x short>> [#uses=1] + %tmp14 = insertelement <8 x short> %tmp13, short %tmp6, uint 4 ; <<8 x short>> [#uses=1] + %tmp15 = insertelement <8 x short> %tmp14, short %tmp7, uint 5 ; <<8 x short>> [#uses=1] + %tmp16 = insertelement <8 x short> %tmp15, short %tmp8, uint 6 ; <<8 x short>> [#uses=1] + %tmp17 = insertelement <8 x short> %tmp16, short %tmp9, uint 7 ; <<8 x short>> [#uses=1] + store <8 x short> %tmp17, <8 x short>* %A + ret void +} + +void %tw_l(<4 x int>* %A, <4 x int>* %B) { +entry: + %tmp = load <4 x int>* %A ; <<4 x int>> [#uses=2] + %tmp2 = load <4 x int>* %B ; <<4 x int>> [#uses=2] + %tmp = extractelement <4 x int> %tmp, uint 2 ; <int> [#uses=1] + %tmp3 = extractelement <4 x int> %tmp2, uint 2 ; <int> [#uses=1] + %tmp4 = extractelement <4 x int> %tmp, uint 3 ; <int> [#uses=1] + %tmp5 = extractelement <4 x int> %tmp2, uint 3 ; <int> [#uses=1] + %tmp6 = insertelement <4 x int> undef, int %tmp, uint 0 ; <<4 x int>> [#uses=1] + %tmp7 = insertelement <4 x int> %tmp6, int %tmp3, uint 1 ; <<4 x int>> [#uses=1] + %tmp8 = insertelement <4 x int> %tmp7, int %tmp4, uint 2 ; <<4 x int>> [#uses=1] + %tmp9 = insertelement <4 x int> %tmp8, int %tmp5, uint 3 ; <<4 x int>> [#uses=1] + store <4 x int> %tmp9, <4 x int>* %A + ret void +} + +void %tb_h(<16 x sbyte>* %A, <16 x sbyte>* %B) { +entry: + %tmp = load <16 x sbyte>* %A ; <<16 x sbyte>> [#uses=8] + %tmp2 = load <16 x sbyte>* %B ; <<16 x sbyte>> [#uses=8] + %tmp = extractelement <16 x sbyte> %tmp, uint 0 ; <sbyte> [#uses=1] + %tmp3 = extractelement <16 x sbyte> %tmp2, uint 0 ; <sbyte> [#uses=1] + %tmp4 = extractelement <16 x sbyte> %tmp, uint 1 ; <sbyte> [#uses=1] + %tmp5 = extractelement <16 x sbyte> %tmp2, uint 1 ; <sbyte> [#uses=1] + %tmp6 = extractelement <16 x sbyte> %tmp, uint 2 ; <sbyte> [#uses=1] + %tmp7 = extractelement <16 x sbyte> %tmp2, uint 2 ; <sbyte> [#uses=1] + %tmp8 = extractelement <16 x sbyte> %tmp, uint 3 ; <sbyte> [#uses=1] + %tmp9 = extractelement <16 x sbyte> %tmp2, uint 3 ; <sbyte> [#uses=1] + %tmp10 = extractelement <16 x sbyte> %tmp, uint 4 ; <sbyte> [#uses=1] + %tmp11 = extractelement <16 x sbyte> %tmp2, uint 4 ; <sbyte> [#uses=1] + %tmp12 = extractelement <16 x sbyte> %tmp, uint 5 ; <sbyte> [#uses=1] + %tmp13 = extractelement <16 x sbyte> %tmp2, uint 5 ; <sbyte> [#uses=1] + %tmp14 = extractelement <16 x sbyte> %tmp, uint 6 ; <sbyte> [#uses=1] + %tmp15 = extractelement <16 x sbyte> %tmp2, uint 6 ; <sbyte> [#uses=1] + %tmp16 = extractelement <16 x sbyte> %tmp, uint 7 ; <sbyte> [#uses=1] + %tmp17 = extractelement <16 x sbyte> %tmp2, uint 7 ; <sbyte> [#uses=1] + %tmp18 = insertelement <16 x sbyte> undef, sbyte %tmp, uint 0 ; <<16 x sbyte>> [#uses=1] + %tmp19 = insertelement <16 x sbyte> %tmp18, sbyte %tmp3, uint 1 ; <<16 x sbyte>> [#uses=1] + %tmp20 = insertelement <16 x sbyte> %tmp19, sbyte %tmp4, uint 2 ; <<16 x sbyte>> [#uses=1] + %tmp21 = insertelement <16 x sbyte> %tmp20, sbyte %tmp5, uint 3 ; <<16 x sbyte>> [#uses=1] + %tmp22 = insertelement <16 x sbyte> %tmp21, sbyte %tmp6, uint 4 ; <<16 x sbyte>> [#uses=1] + %tmp23 = insertelement <16 x sbyte> %tmp22, sbyte %tmp7, uint 5 ; <<16 x sbyte>> [#uses=1] + %tmp24 = insertelement <16 x sbyte> %tmp23, sbyte %tmp8, uint 6 ; <<16 x sbyte>> [#uses=1] + %tmp25 = insertelement <16 x sbyte> %tmp24, sbyte %tmp9, uint 7 ; <<16 x sbyte>> [#uses=1] + %tmp26 = insertelement <16 x sbyte> %tmp25, sbyte %tmp10, uint 8 ; <<16 x sbyte>> [#uses=1] + %tmp27 = insertelement <16 x sbyte> %tmp26, sbyte %tmp11, uint 9 ; <<16 x sbyte>> [#uses=1] + %tmp28 = insertelement <16 x sbyte> %tmp27, sbyte %tmp12, uint 10 ; <<16 x sbyte>> [#uses=1] + %tmp29 = insertelement <16 x sbyte> %tmp28, sbyte %tmp13, uint 11 ; <<16 x sbyte>> [#uses=1] + %tmp30 = insertelement <16 x sbyte> %tmp29, sbyte %tmp14, uint 12 ; <<16 x sbyte>> [#uses=1] + %tmp31 = insertelement <16 x sbyte> %tmp30, sbyte %tmp15, uint 13 ; <<16 x sbyte>> [#uses=1] + %tmp32 = insertelement <16 x sbyte> %tmp31, sbyte %tmp16, uint 14 ; <<16 x sbyte>> [#uses=1] + %tmp33 = insertelement <16 x sbyte> %tmp32, sbyte %tmp17, uint 15 ; <<16 x sbyte>> [#uses=1] + store <16 x sbyte> %tmp33, <16 x sbyte>* %A + ret void +} + +void %th_h(<8 x short>* %A, <8 x short>* %B) { +entry: + %tmp = load <8 x short>* %A ; <<8 x short>> [#uses=4] + %tmp2 = load <8 x short>* %B ; <<8 x short>> [#uses=4] + %tmp = extractelement <8 x short> %tmp, uint 0 ; <short> [#uses=1] + %tmp3 = extractelement <8 x short> %tmp2, uint 0 ; <short> [#uses=1] + %tmp4 = extractelement <8 x short> %tmp, uint 1 ; <short> [#uses=1] + %tmp5 = extractelement <8 x short> %tmp2, uint 1 ; <short> [#uses=1] + %tmp6 = extractelement <8 x short> %tmp, uint 2 ; <short> [#uses=1] + %tmp7 = extractelement <8 x short> %tmp2, uint 2 ; <short> [#uses=1] + %tmp8 = extractelement <8 x short> %tmp, uint 3 ; <short> [#uses=1] + %tmp9 = extractelement <8 x short> %tmp2, uint 3 ; <short> [#uses=1] + %tmp10 = insertelement <8 x short> undef, short %tmp, uint 0 ; <<8 x short>> [#uses=1] + %tmp11 = insertelement <8 x short> %tmp10, short %tmp3, uint 1 ; <<8 x short>> [#uses=1] + %tmp12 = insertelement <8 x short> %tmp11, short %tmp4, uint 2 ; <<8 x short>> [#uses=1] + %tmp13 = insertelement <8 x short> %tmp12, short %tmp5, uint 3 ; <<8 x short>> [#uses=1] + %tmp14 = insertelement <8 x short> %tmp13, short %tmp6, uint 4 ; <<8 x short>> [#uses=1] + %tmp15 = insertelement <8 x short> %tmp14, short %tmp7, uint 5 ; <<8 x short>> [#uses=1] + %tmp16 = insertelement <8 x short> %tmp15, short %tmp8, uint 6 ; <<8 x short>> [#uses=1] + %tmp17 = insertelement <8 x short> %tmp16, short %tmp9, uint 7 ; <<8 x short>> [#uses=1] + store <8 x short> %tmp17, <8 x short>* %A + ret void +} + +void %tw_h(<4 x int>* %A, <4 x int>* %B) { +entry: + %tmp = load <4 x int>* %A ; <<4 x int>> [#uses=2] + %tmp2 = load <4 x int>* %B ; <<4 x int>> [#uses=2] + %tmp = extractelement <4 x int> %tmp2, uint 0 ; <int> [#uses=1] + %tmp3 = extractelement <4 x int> %tmp, uint 0 ; <int> [#uses=1] + %tmp4 = extractelement <4 x int> %tmp2, uint 1 ; <int> [#uses=1] + %tmp5 = extractelement <4 x int> %tmp, uint 1 ; <int> [#uses=1] + %tmp6 = insertelement <4 x int> undef, int %tmp, uint 0 ; <<4 x int>> [#uses=1] + %tmp7 = insertelement <4 x int> %tmp6, int %tmp3, uint 1 ; <<4 x int>> [#uses=1] + %tmp8 = insertelement <4 x int> %tmp7, int %tmp4, uint 2 ; <<4 x int>> [#uses=1] + %tmp9 = insertelement <4 x int> %tmp8, int %tmp5, uint 3 ; <<4 x int>> [#uses=1] + store <4 x int> %tmp9, <4 x int>* %A + ret void +} + +void %tw_h_flop(<4 x int>* %A, <4 x int>* %B) { + %tmp = load <4 x int>* %A ; <<4 x int>> [#uses=2] + %tmp2 = load <4 x int>* %B ; <<4 x int>> [#uses=2] + %tmp = extractelement <4 x int> %tmp, uint 0 ; <int> [#uses=1] + %tmp3 = extractelement <4 x int> %tmp2, uint 0 ; <int> [#uses=1] + %tmp4 = extractelement <4 x int> %tmp, uint 1 ; <int> [#uses=1] + %tmp5 = extractelement <4 x int> %tmp2, uint 1 ; <int> [#uses=1] + %tmp6 = insertelement <4 x int> undef, int %tmp, uint 0 ; <<4 x int>> [#uses=1] + %tmp7 = insertelement <4 x int> %tmp6, int %tmp3, uint 1 ; <<4 x int>> [#uses=1] + %tmp8 = insertelement <4 x int> %tmp7, int %tmp4, uint 2 ; <<4 x int>> [#uses=1] + %tmp9 = insertelement <4 x int> %tmp8, int %tmp5, uint 3 ; <<4 x int>> [#uses=1] + store <4 x int> %tmp9, <4 x int>* %A + ret void +} + + +void %VMRG_UNARY_tb_l(<16 x sbyte>* %A, <16 x sbyte>* %B) { +entry: + %tmp = load <16 x sbyte>* %A ; <<16 x sbyte>> [#uses=16] + %tmp = extractelement <16 x sbyte> %tmp, uint 8 ; <sbyte> [#uses=1] + %tmp3 = extractelement <16 x sbyte> %tmp, uint 8 ; <sbyte> [#uses=1] + %tmp4 = extractelement <16 x sbyte> %tmp, uint 9 ; <sbyte> [#uses=1] + %tmp5 = extractelement <16 x sbyte> %tmp, uint 9 ; <sbyte> [#uses=1] + %tmp6 = extractelement <16 x sbyte> %tmp, uint 10 ; <sbyte> [#uses=1] + %tmp7 = extractelement <16 x sbyte> %tmp, uint 10 ; <sbyte> [#uses=1] + %tmp8 = extractelement <16 x sbyte> %tmp, uint 11 ; <sbyte> [#uses=1] + %tmp9 = extractelement <16 x sbyte> %tmp, uint 11 ; <sbyte> [#uses=1] + %tmp10 = extractelement <16 x sbyte> %tmp, uint 12 ; <sbyte> [#uses=1] + %tmp11 = extractelement <16 x sbyte> %tmp, uint 12 ; <sbyte> [#uses=1] + %tmp12 = extractelement <16 x sbyte> %tmp, uint 13 ; <sbyte> [#uses=1] + %tmp13 = extractelement <16 x sbyte> %tmp, uint 13 ; <sbyte> [#uses=1] + %tmp14 = extractelement <16 x sbyte> %tmp, uint 14 ; <sbyte> [#uses=1] + %tmp15 = extractelement <16 x sbyte> %tmp, uint 14 ; <sbyte> [#uses=1] + %tmp16 = extractelement <16 x sbyte> %tmp, uint 15 ; <sbyte> [#uses=1] + %tmp17 = extractelement <16 x sbyte> %tmp, uint 15 ; <sbyte> [#uses=1] + %tmp18 = insertelement <16 x sbyte> undef, sbyte %tmp, uint 0 ; <<16 x sbyte>> [#uses=1] + %tmp19 = insertelement <16 x sbyte> %tmp18, sbyte %tmp3, uint 1 ; <<16 x sbyte>> [#uses=1] + %tmp20 = insertelement <16 x sbyte> %tmp19, sbyte %tmp4, uint 2 ; <<16 x sbyte>> [#uses=1] + %tmp21 = insertelement <16 x sbyte> %tmp20, sbyte %tmp5, uint 3 ; <<16 x sbyte>> [#uses=1] + %tmp22 = insertelement <16 x sbyte> %tmp21, sbyte %tmp6, uint 4 ; <<16 x sbyte>> [#uses=1] + %tmp23 = insertelement <16 x sbyte> %tmp22, sbyte %tmp7, uint 5 ; <<16 x sbyte>> [#uses=1] + %tmp24 = insertelement <16 x sbyte> %tmp23, sbyte %tmp8, uint 6 ; <<16 x sbyte>> [#uses=1] + %tmp25 = insertelement <16 x sbyte> %tmp24, sbyte %tmp9, uint 7 ; <<16 x sbyte>> [#uses=1] + %tmp26 = insertelement <16 x sbyte> %tmp25, sbyte %tmp10, uint 8 ; <<16 x sbyte>> [#uses=1] + %tmp27 = insertelement <16 x sbyte> %tmp26, sbyte %tmp11, uint 9 ; <<16 x sbyte>> [#uses=1] + %tmp28 = insertelement <16 x sbyte> %tmp27, sbyte %tmp12, uint 10 ; <<16 x sbyte>> [#uses=1] + %tmp29 = insertelement <16 x sbyte> %tmp28, sbyte %tmp13, uint 11 ; <<16 x sbyte>> [#uses=1] + %tmp30 = insertelement <16 x sbyte> %tmp29, sbyte %tmp14, uint 12 ; <<16 x sbyte>> [#uses=1] + %tmp31 = insertelement <16 x sbyte> %tmp30, sbyte %tmp15, uint 13 ; <<16 x sbyte>> [#uses=1] + %tmp32 = insertelement <16 x sbyte> %tmp31, sbyte %tmp16, uint 14 ; <<16 x sbyte>> [#uses=1] + %tmp33 = insertelement <16 x sbyte> %tmp32, sbyte %tmp17, uint 15 ; <<16 x sbyte>> [#uses=1] + store <16 x sbyte> %tmp33, <16 x sbyte>* %A + ret void +} + +void %VMRG_UNARY_th_l(<8 x short>* %A, <8 x short>* %B) { +entry: + %tmp = load <8 x short>* %A ; <<8 x short>> [#uses=8] + %tmp = extractelement <8 x short> %tmp, uint 4 ; <short> [#uses=1] + %tmp3 = extractelement <8 x short> %tmp, uint 4 ; <short> [#uses=1] + %tmp4 = extractelement <8 x short> %tmp, uint 5 ; <short> [#uses=1] + %tmp5 = extractelement <8 x short> %tmp, uint 5 ; <short> [#uses=1] + %tmp6 = extractelement <8 x short> %tmp, uint 6 ; <short> [#uses=1] + %tmp7 = extractelement <8 x short> %tmp, uint 6 ; <short> [#uses=1] + %tmp8 = extractelement <8 x short> %tmp, uint 7 ; <short> [#uses=1] + %tmp9 = extractelement <8 x short> %tmp, uint 7 ; <short> [#uses=1] + %tmp10 = insertelement <8 x short> undef, short %tmp, uint 0 ; <<8 x short>> [#uses=1] + %tmp11 = insertelement <8 x short> %tmp10, short %tmp3, uint 1 ; <<8 x short>> [#uses=1] + %tmp12 = insertelement <8 x short> %tmp11, short %tmp4, uint 2 ; <<8 x short>> [#uses=1] + %tmp13 = insertelement <8 x short> %tmp12, short %tmp5, uint 3 ; <<8 x short>> [#uses=1] + %tmp14 = insertelement <8 x short> %tmp13, short %tmp6, uint 4 ; <<8 x short>> [#uses=1] + %tmp15 = insertelement <8 x short> %tmp14, short %tmp7, uint 5 ; <<8 x short>> [#uses=1] + %tmp16 = insertelement <8 x short> %tmp15, short %tmp8, uint 6 ; <<8 x short>> [#uses=1] + %tmp17 = insertelement <8 x short> %tmp16, short %tmp9, uint 7 ; <<8 x short>> [#uses=1] + store <8 x short> %tmp17, <8 x short>* %A + ret void +} + +void %VMRG_UNARY_tw_l(<4 x int>* %A, <4 x int>* %B) { +entry: + %tmp = load <4 x int>* %A ; <<4 x int>> [#uses=4] + %tmp = extractelement <4 x int> %tmp, uint 2 ; <int> [#uses=1] + %tmp3 = extractelement <4 x int> %tmp, uint 2 ; <int> [#uses=1] + %tmp4 = extractelement <4 x int> %tmp, uint 3 ; <int> [#uses=1] + %tmp5 = extractelement <4 x int> %tmp, uint 3 ; <int> [#uses=1] + %tmp6 = insertelement <4 x int> undef, int %tmp, uint 0 ; <<4 x int>> [#uses=1] + %tmp7 = insertelement <4 x int> %tmp6, int %tmp3, uint 1 ; <<4 x int>> [#uses=1] + %tmp8 = insertelement <4 x int> %tmp7, int %tmp4, uint 2 ; <<4 x int>> [#uses=1] + %tmp9 = insertelement <4 x int> %tmp8, int %tmp5, uint 3 ; <<4 x int>> [#uses=1] + store <4 x int> %tmp9, <4 x int>* %A + ret void +} + +void %VMRG_UNARY_tb_h(<16 x sbyte>* %A, <16 x sbyte>* %B) { +entry: + %tmp = load <16 x sbyte>* %A ; <<16 x sbyte>> [#uses=16] + %tmp = extractelement <16 x sbyte> %tmp, uint 0 ; <sbyte> [#uses=1] + %tmp3 = extractelement <16 x sbyte> %tmp, uint 0 ; <sbyte> [#uses=1] + %tmp4 = extractelement <16 x sbyte> %tmp, uint 1 ; <sbyte> [#uses=1] + %tmp5 = extractelement <16 x sbyte> %tmp, uint 1 ; <sbyte> [#uses=1] + %tmp6 = extractelement <16 x sbyte> %tmp, uint 2 ; <sbyte> [#uses=1] + %tmp7 = extractelement <16 x sbyte> %tmp, uint 2 ; <sbyte> [#uses=1] + %tmp8 = extractelement <16 x sbyte> %tmp, uint 3 ; <sbyte> [#uses=1] + %tmp9 = extractelement <16 x sbyte> %tmp, uint 3 ; <sbyte> [#uses=1] + %tmp10 = extractelement <16 x sbyte> %tmp, uint 4 ; <sbyte> [#uses=1] + %tmp11 = extractelement <16 x sbyte> %tmp, uint 4 ; <sbyte> [#uses=1] + %tmp12 = extractelement <16 x sbyte> %tmp, uint 5 ; <sbyte> [#uses=1] + %tmp13 = extractelement <16 x sbyte> %tmp, uint 5 ; <sbyte> [#uses=1] + %tmp14 = extractelement <16 x sbyte> %tmp, uint 6 ; <sbyte> [#uses=1] + %tmp15 = extractelement <16 x sbyte> %tmp, uint 6 ; <sbyte> [#uses=1] + %tmp16 = extractelement <16 x sbyte> %tmp, uint 7 ; <sbyte> [#uses=1] + %tmp17 = extractelement <16 x sbyte> %tmp, uint 7 ; <sbyte> [#uses=1] + %tmp18 = insertelement <16 x sbyte> undef, sbyte %tmp, uint 0 ; <<16 x sbyte>> [#uses=1] + %tmp19 = insertelement <16 x sbyte> %tmp18, sbyte %tmp3, uint 1 ; <<16 x sbyte>> [#uses=1] + %tmp20 = insertelement <16 x sbyte> %tmp19, sbyte %tmp4, uint 2 ; <<16 x sbyte>> [#uses=1] + %tmp21 = insertelement <16 x sbyte> %tmp20, sbyte %tmp5, uint 3 ; <<16 x sbyte>> [#uses=1] + %tmp22 = insertelement <16 x sbyte> %tmp21, sbyte %tmp6, uint 4 ; <<16 x sbyte>> [#uses=1] + %tmp23 = insertelement <16 x sbyte> %tmp22, sbyte %tmp7, uint 5 ; <<16 x sbyte>> [#uses=1] + %tmp24 = insertelement <16 x sbyte> %tmp23, sbyte %tmp8, uint 6 ; <<16 x sbyte>> [#uses=1] + %tmp25 = insertelement <16 x sbyte> %tmp24, sbyte %tmp9, uint 7 ; <<16 x sbyte>> [#uses=1] + %tmp26 = insertelement <16 x sbyte> %tmp25, sbyte %tmp10, uint 8 ; <<16 x sbyte>> [#uses=1] + %tmp27 = insertelement <16 x sbyte> %tmp26, sbyte %tmp11, uint 9 ; <<16 x sbyte>> [#uses=1] + %tmp28 = insertelement <16 x sbyte> %tmp27, sbyte %tmp12, uint 10 ; <<16 x sbyte>> [#uses=1] + %tmp29 = insertelement <16 x sbyte> %tmp28, sbyte %tmp13, uint 11 ; <<16 x sbyte>> [#uses=1] + %tmp30 = insertelement <16 x sbyte> %tmp29, sbyte %tmp14, uint 12 ; <<16 x sbyte>> [#uses=1] + %tmp31 = insertelement <16 x sbyte> %tmp30, sbyte %tmp15, uint 13 ; <<16 x sbyte>> [#uses=1] + %tmp32 = insertelement <16 x sbyte> %tmp31, sbyte %tmp16, uint 14 ; <<16 x sbyte>> [#uses=1] + %tmp33 = insertelement <16 x sbyte> %tmp32, sbyte %tmp17, uint 15 ; <<16 x sbyte>> [#uses=1] + store <16 x sbyte> %tmp33, <16 x sbyte>* %A + ret void +} + +void %VMRG_UNARY_th_h(<8 x short>* %A, <8 x short>* %B) { +entry: + %tmp = load <8 x short>* %A ; <<8 x short>> [#uses=8] + %tmp = extractelement <8 x short> %tmp, uint 0 ; <short> [#uses=1] + %tmp3 = extractelement <8 x short> %tmp, uint 0 ; <short> [#uses=1] + %tmp4 = extractelement <8 x short> %tmp, uint 1 ; <short> [#uses=1] + %tmp5 = extractelement <8 x short> %tmp, uint 1 ; <short> [#uses=1] + %tmp6 = extractelement <8 x short> %tmp, uint 2 ; <short> [#uses=1] + %tmp7 = extractelement <8 x short> %tmp, uint 2 ; <short> [#uses=1] + %tmp8 = extractelement <8 x short> %tmp, uint 3 ; <short> [#uses=1] + %tmp9 = extractelement <8 x short> %tmp, uint 3 ; <short> [#uses=1] + %tmp10 = insertelement <8 x short> undef, short %tmp, uint 0 ; <<8 x short>> [#uses=1] + %tmp11 = insertelement <8 x short> %tmp10, short %tmp3, uint 1 ; <<8 x short>> [#uses=1] + %tmp12 = insertelement <8 x short> %tmp11, short %tmp4, uint 2 ; <<8 x short>> [#uses=1] + %tmp13 = insertelement <8 x short> %tmp12, short %tmp5, uint 3 ; <<8 x short>> [#uses=1] + %tmp14 = insertelement <8 x short> %tmp13, short %tmp6, uint 4 ; <<8 x short>> [#uses=1] + %tmp15 = insertelement <8 x short> %tmp14, short %tmp7, uint 5 ; <<8 x short>> [#uses=1] + %tmp16 = insertelement <8 x short> %tmp15, short %tmp8, uint 6 ; <<8 x short>> [#uses=1] + %tmp17 = insertelement <8 x short> %tmp16, short %tmp9, uint 7 ; <<8 x short>> [#uses=1] + store <8 x short> %tmp17, <8 x short>* %A + ret void +} + +void %VMRG_UNARY_tw_h(<4 x int>* %A, <4 x int>* %B) { +entry: + %tmp = load <4 x int>* %A ; <<4 x int>> [#uses=4] + %tmp = extractelement <4 x int> %tmp, uint 0 ; <int> [#uses=1] + %tmp3 = extractelement <4 x int> %tmp, uint 0 ; <int> [#uses=1] + %tmp4 = extractelement <4 x int> %tmp, uint 1 ; <int> [#uses=1] + %tmp5 = extractelement <4 x int> %tmp, uint 1 ; <int> [#uses=1] + %tmp6 = insertelement <4 x int> undef, int %tmp, uint 0 ; <<4 x int>> [#uses=1] + %tmp7 = insertelement <4 x int> %tmp6, int %tmp3, uint 1 ; <<4 x int>> [#uses=1] + %tmp8 = insertelement <4 x int> %tmp7, int %tmp4, uint 2 ; <<4 x int>> [#uses=1] + %tmp9 = insertelement <4 x int> %tmp8, int %tmp5, uint 3 ; <<4 x int>> [#uses=1] + store <4 x int> %tmp9, <4 x int>* %A + ret void +} + +void %VPCKUHUM_unary(<8 x short>* %A, <8 x short>* %B) { +entry: + %tmp = load <8 x short>* %A ; <<8 x short>> [#uses=2] + %tmp = cast <8 x short> %tmp to <16 x sbyte> ; <<16 x sbyte>> [#uses=8] + %tmp3 = cast <8 x short> %tmp to <16 x sbyte> ; <<16 x sbyte>> [#uses=8] + %tmp = extractelement <16 x sbyte> %tmp, uint 1 ; <sbyte> [#uses=1] + %tmp4 = extractelement <16 x sbyte> %tmp, uint 3 ; <sbyte> [#uses=1] + %tmp5 = extractelement <16 x sbyte> %tmp, uint 5 ; <sbyte> [#uses=1] + %tmp6 = extractelement <16 x sbyte> %tmp, uint 7 ; <sbyte> [#uses=1] + %tmp7 = extractelement <16 x sbyte> %tmp, uint 9 ; <sbyte> [#uses=1] + %tmp8 = extractelement <16 x sbyte> %tmp, uint 11 ; <sbyte> [#uses=1] + %tmp9 = extractelement <16 x sbyte> %tmp, uint 13 ; <sbyte> [#uses=1] + %tmp10 = extractelement <16 x sbyte> %tmp, uint 15 ; <sbyte> [#uses=1] + %tmp11 = extractelement <16 x sbyte> %tmp3, uint 1 ; <sbyte> [#uses=1] + %tmp12 = extractelement <16 x sbyte> %tmp3, uint 3 ; <sbyte> [#uses=1] + %tmp13 = extractelement <16 x sbyte> %tmp3, uint 5 ; <sbyte> [#uses=1] + %tmp14 = extractelement <16 x sbyte> %tmp3, uint 7 ; <sbyte> [#uses=1] + %tmp15 = extractelement <16 x sbyte> %tmp3, uint 9 ; <sbyte> [#uses=1] + %tmp16 = extractelement <16 x sbyte> %tmp3, uint 11 ; <sbyte> [#uses=1] + %tmp17 = extractelement <16 x sbyte> %tmp3, uint 13 ; <sbyte> [#uses=1] + %tmp18 = extractelement <16 x sbyte> %tmp3, uint 15 ; <sbyte> [#uses=1] + %tmp19 = insertelement <16 x sbyte> undef, sbyte %tmp, uint 0 ; <<16 x sbyte>> [#uses=1] + %tmp20 = insertelement <16 x sbyte> %tmp19, sbyte %tmp4, uint 1 ; <<16 x sbyte>> [#uses=1] + %tmp21 = insertelement <16 x sbyte> %tmp20, sbyte %tmp5, uint 2 ; <<16 x sbyte>> [#uses=1] + %tmp22 = insertelement <16 x sbyte> %tmp21, sbyte %tmp6, uint 3 ; <<16 x sbyte>> [#uses=1] + %tmp23 = insertelement <16 x sbyte> %tmp22, sbyte %tmp7, uint 4 ; <<16 x sbyte>> [#uses=1] + %tmp24 = insertelement <16 x sbyte> %tmp23, sbyte %tmp8, uint 5 ; <<16 x sbyte>> [#uses=1] + %tmp25 = insertelement <16 x sbyte> %tmp24, sbyte %tmp9, uint 6 ; <<16 x sbyte>> [#uses=1] + %tmp26 = insertelement <16 x sbyte> %tmp25, sbyte %tmp10, uint 7 ; <<16 x sbyte>> [#uses=1] + %tmp27 = insertelement <16 x sbyte> %tmp26, sbyte %tmp11, uint 8 ; <<16 x sbyte>> [#uses=1] + %tmp28 = insertelement <16 x sbyte> %tmp27, sbyte %tmp12, uint 9 ; <<16 x sbyte>> [#uses=1] + %tmp29 = insertelement <16 x sbyte> %tmp28, sbyte %tmp13, uint 10 ; <<16 x sbyte>> [#uses=1] + %tmp30 = insertelement <16 x sbyte> %tmp29, sbyte %tmp14, uint 11 ; <<16 x sbyte>> [#uses=1] + %tmp31 = insertelement <16 x sbyte> %tmp30, sbyte %tmp15, uint 12 ; <<16 x sbyte>> [#uses=1] + %tmp32 = insertelement <16 x sbyte> %tmp31, sbyte %tmp16, uint 13 ; <<16 x sbyte>> [#uses=1] + %tmp33 = insertelement <16 x sbyte> %tmp32, sbyte %tmp17, uint 14 ; <<16 x sbyte>> [#uses=1] + %tmp34 = insertelement <16 x sbyte> %tmp33, sbyte %tmp18, uint 15 ; <<16 x sbyte>> [#uses=1] + %tmp34 = cast <16 x sbyte> %tmp34 to <8 x short> ; <<8 x short>> [#uses=1] + store <8 x short> %tmp34, <8 x short>* %A + ret void +} + +void %VPCKUWUM_unary(<4 x int>* %A, <4 x int>* %B) { +entry: + %tmp = load <4 x int>* %A ; <<4 x int>> [#uses=2] + %tmp = cast <4 x int> %tmp to <8 x short> ; <<8 x short>> [#uses=4] + %tmp3 = cast <4 x int> %tmp to <8 x short> ; <<8 x short>> [#uses=4] + %tmp = extractelement <8 x short> %tmp, uint 1 ; <short> [#uses=1] + %tmp4 = extractelement <8 x short> %tmp, uint 3 ; <short> [#uses=1] + %tmp5 = extractelement <8 x short> %tmp, uint 5 ; <short> [#uses=1] + %tmp6 = extractelement <8 x short> %tmp, uint 7 ; <short> [#uses=1] + %tmp7 = extractelement <8 x short> %tmp3, uint 1 ; <short> [#uses=1] + %tmp8 = extractelement <8 x short> %tmp3, uint 3 ; <short> [#uses=1] + %tmp9 = extractelement <8 x short> %tmp3, uint 5 ; <short> [#uses=1] + %tmp10 = extractelement <8 x short> %tmp3, uint 7 ; <short> [#uses=1] + %tmp11 = insertelement <8 x short> undef, short %tmp, uint 0 ; <<8 x short>> [#uses=1] + %tmp12 = insertelement <8 x short> %tmp11, short %tmp4, uint 1 ; <<8 x short>> [#uses=1] + %tmp13 = insertelement <8 x short> %tmp12, short %tmp5, uint 2 ; <<8 x short>> [#uses=1] + %tmp14 = insertelement <8 x short> %tmp13, short %tmp6, uint 3 ; <<8 x short>> [#uses=1] + %tmp15 = insertelement <8 x short> %tmp14, short %tmp7, uint 4 ; <<8 x short>> [#uses=1] + %tmp16 = insertelement <8 x short> %tmp15, short %tmp8, uint 5 ; <<8 x short>> [#uses=1] + %tmp17 = insertelement <8 x short> %tmp16, short %tmp9, uint 6 ; <<8 x short>> [#uses=1] + %tmp18 = insertelement <8 x short> %tmp17, short %tmp10, uint 7 ; <<8 x short>> [#uses=1] + %tmp18 = cast <8 x short> %tmp18 to <4 x int> ; <<4 x int>> [#uses=1] + store <4 x int> %tmp18, <4 x int>* %A + ret void +} diff --git a/test/CodeGen/PowerPC/vec_spat.ll b/test/CodeGen/PowerPC/vec_spat.ll new file mode 100644 index 0000000..15e2950 --- /dev/null +++ b/test/CodeGen/PowerPC/vec_spat.ll @@ -0,0 +1,73 @@ +; Test that vectors are scalarized/lowered correctly. +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g3 | \ +; RUN: grep stfs | wc -l | grep 4 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 -o %t -f +; RUN: grep vspltw %t | wc -l | grep 2 +; RUN: grep vsplti %t | wc -l | grep 3 +; RUN: grep vsplth %t | wc -l | grep 1 + +%f4 = type <4 x float> +%i4 = type <4 x int> + +implementation + +void %splat(%f4* %P, %f4* %Q, float %X) { + %tmp = insertelement %f4 undef, float %X, uint 0 + %tmp2 = insertelement %f4 %tmp, float %X, uint 1 + %tmp4 = insertelement %f4 %tmp2, float %X, uint 2 + %tmp6 = insertelement %f4 %tmp4, float %X, uint 3 + %q = load %f4* %Q + %R = add %f4 %q, %tmp6 + store %f4 %R, %f4* %P + ret void +} + +void %splat_i4(%i4* %P, %i4* %Q, int %X) { + %tmp = insertelement %i4 undef, int %X, uint 0 + %tmp2 = insertelement %i4 %tmp, int %X, uint 1 + %tmp4 = insertelement %i4 %tmp2, int %X, uint 2 + %tmp6 = insertelement %i4 %tmp4, int %X, uint 3 + %q = load %i4* %Q + %R = add %i4 %q, %tmp6 + store %i4 %R, %i4* %P + ret void +} + +void %splat_imm_i32(%i4* %P, %i4* %Q, int %X) { + %q = load %i4* %Q + %R = add %i4 %q, <int -1, int -1, int -1, int -1> + store %i4 %R, %i4* %P + ret void +} + +void %splat_imm_i16(%i4* %P, %i4* %Q, int %X) { + %q = load %i4* %Q + %R = add %i4 %q, <int 65537, int 65537, int 65537, int 65537> + store %i4 %R, %i4* %P + ret void +} + +void %splat_h(short %tmp, <16 x ubyte>* %dst) { + %tmp = insertelement <8 x short> undef, short %tmp, uint 0 + %tmp72 = insertelement <8 x short> %tmp, short %tmp, uint 1 + %tmp73 = insertelement <8 x short> %tmp72, short %tmp, uint 2 + %tmp74 = insertelement <8 x short> %tmp73, short %tmp, uint 3 + %tmp75 = insertelement <8 x short> %tmp74, short %tmp, uint 4 + %tmp76 = insertelement <8 x short> %tmp75, short %tmp, uint 5 + %tmp77 = insertelement <8 x short> %tmp76, short %tmp, uint 6 + %tmp78 = insertelement <8 x short> %tmp77, short %tmp, uint 7 + %tmp78 = cast <8 x short> %tmp78 to <16 x ubyte> + store <16 x ubyte> %tmp78, <16 x ubyte>* %dst + ret void +} + +void %spltish(<16 x ubyte>* %A, <16 x ubyte>* %B) { + ; Gets converted to 16 x ubyte + %tmp = load <16 x ubyte>* %B + %tmp.s = cast <16 x ubyte> %tmp to <16 x sbyte> + %tmp4 = sub <16 x sbyte> %tmp.s, cast (<8 x short> < short 15, short 15, short 15, short 15, short 15, short 15, short 15, short 15 > to <16 x sbyte>) + %tmp4.u = cast <16 x sbyte> %tmp4 to <16 x ubyte> + store <16 x ubyte> %tmp4.u, <16 x ubyte>* %A + ret void +} + diff --git a/test/CodeGen/PowerPC/vec_vrsave.ll b/test/CodeGen/PowerPC/vec_vrsave.ll new file mode 100644 index 0000000..63e3eba --- /dev/null +++ b/test/CodeGen/PowerPC/vec_vrsave.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 -o %t -f +; RUN: grep vrlw %t +; RUN: not grep spr %t +; RUN: not grep vrsave %t + +<4 x int> %test_rol() { + ret <4 x int> < int -11534337, int -11534337, int -11534337, int -11534337 > +} + +<4 x int> %test_arg(<4 x int> %A, <4 x int> %B) { + %C = add <4 x int> %A, %B + ret <4 x int> %C +} + diff --git a/test/CodeGen/PowerPC/vec_zero.ll b/test/CodeGen/PowerPC/vec_zero.ll new file mode 100644 index 0000000..c845c0e --- /dev/null +++ b/test/CodeGen/PowerPC/vec_zero.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep vxor + +void %foo(<4 x float> *%P) { + %T = load <4 x float> * %P + %S = add <4 x float> zeroinitializer, %T + store <4 x float> %S, <4 x float>* %P + ret void +} diff --git a/test/CodeGen/PowerPC/vector-identity-shuffle.ll b/test/CodeGen/PowerPC/vector-identity-shuffle.ll new file mode 100644 index 0000000..af5cc02 --- /dev/null +++ b/test/CodeGen/PowerPC/vector-identity-shuffle.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test: +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm + +void %test(<4 x float> *%tmp2.i) { + %tmp2.i = load <4x float>* %tmp2.i + %xFloat0.48 = extractelement <4 x float> %tmp2.i, uint 0 ; <float> [#uses=1] + %inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, uint 0 ; <<4 x float>> [#uses=1] + %xFloat1.50 = extractelement <4 x float> %tmp2.i, uint 1 ; <float> [#uses=1] + %inFloat1.52 = insertelement <4 x float> %inFloat0.49, float %xFloat1.50, uint 1 ; <<4 x float>> [#uses=1] + %xFloat2.53 = extractelement <4 x float> %tmp2.i, uint 2 ; <float> [#uses=1] + %inFloat2.55 = insertelement <4 x float> %inFloat1.52, float %xFloat2.53, uint 2 ; <<4 x float>> [#uses=1] + %xFloat3.56 = extractelement <4 x float> %tmp2.i, uint 3 ; <float> [#uses=1] + %inFloat3.58 = insertelement <4 x float> %inFloat2.55, float %xFloat3.56, uint 3 ; <<4 x float>> [#uses=4] + store <4 x float> %inFloat3.58, <4x float>* %tmp2.i + ret void +} diff --git a/test/CodeGen/PowerPC/vector.ll b/test/CodeGen/PowerPC/vector.ll new file mode 100644 index 0000000..f8dbbb0 --- /dev/null +++ b/test/CodeGen/PowerPC/vector.ll @@ -0,0 +1,157 @@ +; Test that vectors are scalarized/lowered correctly. +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g3 + +%f1 = type <1 x float> +%f2 = type <2 x float> +%f4 = type <4 x float> +%i4 = type <4 x int> +%f8 = type <8 x float> +%d8 = type <8 x double> + +implementation + +;;; TEST HANDLING OF VARIOUS VECTOR SIZES + +void %test_f1(%f1 *%P, %f1* %Q, %f1 *%S) { + %p = load %f1 *%P + %q = load %f1* %Q + %R = add %f1 %p, %q + store %f1 %R, %f1 *%S + ret void +} + +void %test_f2(%f2 *%P, %f2* %Q, %f2 *%S) { + %p = load %f2* %P + %q = load %f2* %Q + %R = add %f2 %p, %q + store %f2 %R, %f2 *%S + ret void +} + +void %test_f4(%f4 *%P, %f4* %Q, %f4 *%S) { + %p = load %f4* %P + %q = load %f4* %Q + %R = add %f4 %p, %q + store %f4 %R, %f4 *%S + ret void +} + +void %test_f8(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = add %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +void %test_fmul(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = mul %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +void %test_div(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = div %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +;;; TEST VECTOR CONSTRUCTS + +void %test_cst(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, <float 0.1, float 1.0, float 2.0, float 4.5> + store %f4 %R, %f4 *%S + ret void +} + +void %test_zero(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, zeroinitializer + store %f4 %R, %f4 *%S + ret void +} + +void %test_undef(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, undef + store %f4 %R, %f4 *%S + ret void +} + +void %test_constant_insert(%f4 *%S) { + %R = insertelement %f4 zeroinitializer, float 10.0, uint 0 + store %f4 %R, %f4 *%S + ret void +} + +void %test_variable_buildvector(float %F, %f4 *%S) { + %R = insertelement %f4 zeroinitializer, float %F, uint 0 + store %f4 %R, %f4 *%S + ret void +} + +void %test_scalar_to_vector(float %F, %f4 *%S) { + %R = insertelement %f4 undef, float %F, uint 0 ;; R = scalar_to_vector F + store %f4 %R, %f4 *%S + ret void +} + +float %test_extract_elt(%f8 *%P) { + %p = load %f8* %P + %R = extractelement %f8 %p, uint 3 + ret float %R +} + +double %test_extract_elt2(%d8 *%P) { + %p = load %d8* %P + %R = extractelement %d8 %p, uint 3 + ret double %R +} + +void %test_cast_1(<4 x float>* %b, <4 x int>* %a) { + %tmp = load <4 x float>* %b + %tmp2 = add <4 x float> %tmp, <float 1.0, float 2.0, float 3.0, float 4.0> + %tmp3 = cast <4 x float> %tmp2 to <4 x int> + %tmp4 = add <4 x int> %tmp3, <int 1, int 2, int 3, int 4> + store <4 x int> %tmp4, <4 x int>* %a + ret void +} + +void %test_cast_2(<8 x float>* %a, <8 x int>* %b) { + %T = load <8 x float>* %a + %T2 = cast <8 x float> %T to <8 x int> + store <8 x int> %T2, <8 x int>* %b + ret void +} + + +;;; TEST IMPORTANT IDIOMS + +void %splat(%f4* %P, %f4* %Q, float %X) { + %tmp = insertelement %f4 undef, float %X, uint 0 + %tmp2 = insertelement %f4 %tmp, float %X, uint 1 + %tmp4 = insertelement %f4 %tmp2, float %X, uint 2 + %tmp6 = insertelement %f4 %tmp4, float %X, uint 3 + %q = load %f4* %Q + %R = add %f4 %q, %tmp6 + store %f4 %R, %f4* %P + ret void +} + +void %splat_i4(%i4* %P, %i4* %Q, int %X) { + %tmp = insertelement %i4 undef, int %X, uint 0 + %tmp2 = insertelement %i4 %tmp, int %X, uint 1 + %tmp4 = insertelement %i4 %tmp2, int %X, uint 2 + %tmp6 = insertelement %i4 %tmp4, int %X, uint 3 + %q = load %i4* %Q + %R = add %i4 %q, %tmp6 + store %i4 %R, %i4* %P + ret void +} + diff --git a/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll b/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll new file mode 100644 index 0000000..d93c839 --- /dev/null +++ b/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=sparc + +void %execute_list() { + %tmp.33.i = div float 0.000000e+00, 0.000000e+00 ; <float> [#uses=1] + %tmp.37.i = mul float 0.000000e+00, %tmp.33.i ; <float> [#uses=1] + %tmp.42.i = add float %tmp.37.i, 0.000000e+00 ; <float> [#uses=1] + call void %gl_EvalCoord1f( float %tmp.42.i ) + ret void +} + +declare void %gl_EvalCoord1f( float) + diff --git a/test/CodeGen/SPARC/2007-05-09-JumpTables.ll b/test/CodeGen/SPARC/2007-05-09-JumpTables.ll new file mode 100644 index 0000000..a014ace --- /dev/null +++ b/test/CodeGen/SPARC/2007-05-09-JumpTables.ll @@ -0,0 +1,30 @@ +; RUN: llvm-as < %s | llc -march=sparc + +; We cannot emit jump tables on Sparc, but we should correctly handle this case. + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" + +define i32 @foo(i32 %f) { +entry: + switch i32 %f, label %bb14 [ + i32 0, label %UnifiedReturnBlock + i32 1, label %bb4 + i32 2, label %bb7 + i32 3, label %bb10 + ] + +bb4: ; preds = %entry + ret i32 2 + +bb7: ; preds = %entry + ret i32 5 + +bb10: ; preds = %entry + ret i32 9 + +bb14: ; preds = %entry + ret i32 0 + +UnifiedReturnBlock: ; preds = %entry + ret i32 1 +} diff --git a/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll b/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll new file mode 100644 index 0000000..d1ca44d --- /dev/null +++ b/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=sparc +; PR1540 + +declare float @sinf(float) +declare double @sin(double) +define double @test_sin(float %F) { + %G = call float @sinf( float %F ) ; <float> [#uses=1] + %H = fpext float %G to double ; <double> [#uses=1] + %I = call double @sin( double %H ) ; <double> [#uses=1] + ret double %I +} diff --git a/test/CodeGen/SPARC/basictest.ll b/test/CodeGen/SPARC/basictest.ll new file mode 100644 index 0000000..5c3e075 --- /dev/null +++ b/test/CodeGen/SPARC/basictest.ll @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=sparc + +define i32 @test(i32 %X) { + %tmp.1 = add i32 %X, 1 + ret i32 %tmp.1 +} diff --git a/test/CodeGen/SPARC/ctpop.ll b/test/CodeGen/SPARC/ctpop.ll new file mode 100644 index 0000000..55fa8c5 --- /dev/null +++ b/test/CodeGen/SPARC/ctpop.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=sparc -mattr=v9 -enable-sparc-v9-insts +; RUN: llvm-upgrade < %s | llvm-as | llc -march=sparc -mattr=-v9 | \ +; RUN: not grep popc +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=sparc -mattr=v9 -enable-sparc-v9-insts | grep popc + +declare uint %llvm.ctpop.i32(uint) +uint %test(uint %X) { + %Y = call uint %llvm.ctpop.i32(uint %X) + ret uint %Y +} + diff --git a/test/CodeGen/SPARC/dg.exp b/test/CodeGen/SPARC/dg.exp new file mode 100644 index 0000000..a1ce6a1 --- /dev/null +++ b/test/CodeGen/SPARC/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target Sparc] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] +} diff --git a/test/CodeGen/SPARC/xnor.ll b/test/CodeGen/SPARC/xnor.ll new file mode 100644 index 0000000..2365176 --- /dev/null +++ b/test/CodeGen/SPARC/xnor.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=sparc | \ +; RUN: grep xnor | wc -l | grep 2 + +int %test1(int %X, int %Y) { + %A = xor int %X, %Y + %B = xor int %A, -1 + ret int %B +} + +int %test2(int %X, int %Y) { + %A = xor int %X, -1 + %B = xor int %A, %Y + ret int %B +} diff --git a/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx b/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx new file mode 100644 index 0000000..f79781c --- /dev/null +++ b/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -regalloc=simple + +int %main() { + %A = add int 0, 0 ; %A = 0 + %B = add int 0, 1 ; %B = 1 + br label %bb1 +bb1: + %X = mul int %A, %B ; %X = 0*1 = 0 + %R = sub int %B, 1 ; %r = 0 + ret int %R +} diff --git a/test/CodeGen/X86/2002-12-23-SubProblem.llx b/test/CodeGen/X86/2002-12-23-SubProblem.llx new file mode 100644 index 0000000..3d89378 --- /dev/null +++ b/test/CodeGen/X86/2002-12-23-SubProblem.llx @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -regalloc=simple + +int %main(int %B) { + ;%B = add int 0, 1 + %R = sub int %B, 1 ; %r = 0 + ret int %R +} diff --git a/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.llx b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.llx new file mode 100644 index 0000000..9a4541b --- /dev/null +++ b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.llx @@ -0,0 +1,15 @@ +; The old instruction selector used to load all arguments to a call up in +; registers, then start pushing them all onto the stack. This is bad news as +; it makes a ton of annoying overlapping live ranges. This code should not +; cause spills! +; +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& not grep spilled + +target endian = little +target pointersize = 32 + +int %test(int, int, int, int, int, int, int, int, int, int) { ret int 0 } +int %main() { + %X = call int %test(int 1, int 2, int 3, int 4, int 5, int 6, int 7, int 8, int 9, int 10) + ret int %X +} diff --git a/test/CodeGen/X86/2003-08-23-DeadBlockTest.llx b/test/CodeGen/X86/2003-08-23-DeadBlockTest.llx new file mode 100644 index 0000000..48623b9 --- /dev/null +++ b/test/CodeGen/X86/2003-08-23-DeadBlockTest.llx @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +implementation + +int %test() { +entry: ret int 7 +Test: ; dead block! + %A = call int %test() + %B = call int %test() + %C = add int %A, %B + ret int %C +} + diff --git a/test/CodeGen/X86/2003-11-03-GlobalBool.llx b/test/CodeGen/X86/2003-11-03-GlobalBool.llx new file mode 100644 index 0000000..150d6a9 --- /dev/null +++ b/test/CodeGen/X86/2003-11-03-GlobalBool.llx @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: not grep {.byte\[\[:space:\]\]*true} + +%X = global bool true + diff --git a/test/CodeGen/X86/2004-02-12-Memcpy.llx b/test/CodeGen/X86/2004-02-12-Memcpy.llx new file mode 100644 index 0000000..8cd9a50 --- /dev/null +++ b/test/CodeGen/X86/2004-02-12-Memcpy.llx @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep movs +declare void %llvm.memcpy.i32(sbyte* %A, sbyte* %B, uint %amt, uint %align) + +%A = global [1000 x int] zeroinitializer +%B = global [1000 x int] zeroinitializer + + +void %main() { + ; dword copy + call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr ([1000 x int]* %A, long 0, long 0) to sbyte*), + sbyte* cast (int* getelementptr ([1000 x int]* %B, long 0, long 0) to sbyte*), + uint 4000, uint 4) + + ; word copy + call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr ([1000 x int]* %A, long 0, long 0) to sbyte*), + sbyte* cast (int* getelementptr ([1000 x int]* %B, long 0, long 0) to sbyte*), + uint 4000, uint 2) + + ; byte copy + call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr ([1000 x int]* %A, long 0, long 0) to sbyte*), + sbyte* cast (int* getelementptr ([1000 x int]* %B, long 0, long 0) to sbyte*), + uint 4000, uint 1) + ret void +} diff --git a/test/CodeGen/X86/2004-02-13-FrameReturnAddress.llx b/test/CodeGen/X86/2004-02-13-FrameReturnAddress.llx new file mode 100644 index 0000000..366865a --- /dev/null +++ b/test/CodeGen/X86/2004-02-13-FrameReturnAddress.llx @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep {(%esp} + +declare sbyte* %llvm.returnaddress(uint) +declare sbyte* %llvm.frameaddress(uint) + +sbyte *%test1() { + %X = call sbyte* %llvm.returnaddress(uint 0) + ret sbyte* %X +} + +sbyte *%test2() { + %X = call sbyte* %llvm.frameaddress(uint 0) + ret sbyte* %X +} diff --git a/test/CodeGen/X86/2004-02-14-InefficientStackPointer.llx b/test/CodeGen/X86/2004-02-14-InefficientStackPointer.llx new file mode 100644 index 0000000..a0196aa --- /dev/null +++ b/test/CodeGen/X86/2004-02-14-InefficientStackPointer.llx @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep -i ESP | not grep sub + +int %test(int %X) { + ret int %X +} diff --git a/test/CodeGen/X86/2004-02-22-Casts.llx b/test/CodeGen/X86/2004-02-22-Casts.llx new file mode 100644 index 0000000..8f5f5f8 --- /dev/null +++ b/test/CodeGen/X86/2004-02-22-Casts.llx @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +bool %test1(double %X) { + %V = cast double %X to bool + ret bool %V +} + +double %test2(ulong %X) { + %V = cast ulong %X to double + ret double %V +} diff --git a/test/CodeGen/X86/2004-03-30-Select-Max.llx b/test/CodeGen/X86/2004-03-30-Select-Max.llx new file mode 100644 index 0000000..bd7ab47 --- /dev/null +++ b/test/CodeGen/X86/2004-03-30-Select-Max.llx @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep {j\[lgbe\]} + +int %max(int %A, int %B) { + %gt = setgt int %A, %B + %R = select bool %gt, int %A, int %B + ret int %R +} diff --git a/test/CodeGen/X86/2004-04-09-SameValueCoalescing.llx b/test/CodeGen/X86/2004-04-09-SameValueCoalescing.llx new file mode 100644 index 0000000..52c5da4 --- /dev/null +++ b/test/CodeGen/X86/2004-04-09-SameValueCoalescing.llx @@ -0,0 +1,12 @@ +; Linear scan does not currently coalesce any two variables that have +; overlapping live intervals. When two overlapping intervals have the same +; value, they can be joined though. +; +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -regalloc=linearscan | \ +; RUN: not grep {mov %\[A-Z\]\\\{2,3\\\}, %\[A-Z\]\\\{2,3\\\}} + +long %test(long %x) { +entry: + %tmp.1 = mul long %x, 4294967297 ; <long> [#uses=1] + ret long %tmp.1 +} diff --git a/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.llx b/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.llx new file mode 100644 index 0000000..5896c14 --- /dev/null +++ b/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.llx @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +implementation ; Functions: + +double %test(double %d) { + %X = select bool false, double %d, double %d ; <double> [#uses=0] + ret double %X +} diff --git a/test/CodeGen/X86/2004-06-10-StackifierCrash.llx b/test/CodeGen/X86/2004-06-10-StackifierCrash.llx new file mode 100644 index 0000000..3df962b --- /dev/null +++ b/test/CodeGen/X86/2004-06-10-StackifierCrash.llx @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +bool %T(double %X) { + %V = seteq double %X, %X + ret bool %V +} diff --git a/test/CodeGen/X86/2004-10-08-SelectSetCCFold.llx b/test/CodeGen/X86/2004-10-08-SelectSetCCFold.llx new file mode 100644 index 0000000..6757be2 --- /dev/null +++ b/test/CodeGen/X86/2004-10-08-SelectSetCCFold.llx @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +bool %test(bool %C, bool %D, int %X, int %Y) { + %E = setlt int %X, %Y + %F = select bool %C, bool %D, bool %E + ret bool %F +} + diff --git a/test/CodeGen/X86/2005-01-17-CycleInDAG.ll b/test/CodeGen/X86/2005-01-17-CycleInDAG.ll new file mode 100644 index 0000000..74233eb --- /dev/null +++ b/test/CodeGen/X86/2005-01-17-CycleInDAG.ll @@ -0,0 +1,16 @@ +; This testcase was distilled from 132.ijpeg. Bsaically we cannot fold the +; load into the sub instruction here as it induces a cycle in the dag, which +; is invalid code (there is no correct way to order the instruction). Check +; that we do not fold the load into the sub. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep sub.*GLOBAL + +%GLOBAL = external global int + +int %test(int* %P1, int* %P2, int* %P3) { + %L = load int* %GLOBAL + store int 12, int* %P2 + %Y = load int* %P3 + %Z = sub int %Y, %L + ret int %Z +} diff --git a/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll b/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll new file mode 100644 index 0000000..4547bff --- /dev/null +++ b/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep 18446744073709551612 + +%A = external global int + +%Y = global int* getelementptr (int* %A, int -1) diff --git a/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll new file mode 100644 index 0000000..5a304db --- /dev/null +++ b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll @@ -0,0 +1,49 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=generic +; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes. + +void %radfg_() { +entry: + br bool false, label %no_exit.16.preheader, label %loopentry.0 + +loopentry.0: ; preds = %entry + ret void + +no_exit.16.preheader: ; preds = %entry + br label %no_exit.16 + +no_exit.16: ; preds = %no_exit.16, %no_exit.16.preheader + br bool false, label %loopexit.16.loopexit, label %no_exit.16 + +loopexit.16.loopexit: ; preds = %no_exit.16 + br label %no_exit.18 + +no_exit.18: ; preds = %loopexit.20, %loopexit.16.loopexit + %tmp.882 = add float 0.000000e+00, 0.000000e+00 ; <float> [#uses=2] + br bool false, label %loopexit.19, label %no_exit.19.preheader + +no_exit.19.preheader: ; preds = %no_exit.18 + ret void + +loopexit.19: ; preds = %no_exit.18 + br bool false, label %loopexit.20, label %no_exit.20 + +no_exit.20: ; preds = %loopexit.21, %loopexit.19 + %ai2.1122.tmp.3 = phi float [ %tmp.958, %loopexit.21 ], [ %tmp.882, %loopexit.19 ] ; <float> [#uses=1] + %tmp.950 = mul float %tmp.882, %ai2.1122.tmp.3 ; <float> [#uses=1] + %tmp.951 = sub float 0.000000e+00, %tmp.950 ; <float> [#uses=1] + %tmp.958 = add float 0.000000e+00, 0.000000e+00 ; <float> [#uses=1] + br bool false, label %loopexit.21, label %no_exit.21.preheader + +no_exit.21.preheader: ; preds = %no_exit.20 + ret void + +loopexit.21: ; preds = %no_exit.20 + br bool false, label %loopexit.20, label %no_exit.20 + +loopexit.20: ; preds = %loopexit.21, %loopexit.19 + %ar2.1124.tmp.2 = phi float [ 0.000000e+00, %loopexit.19 ], [ %tmp.951, %loopexit.21 ] ; <float> [#uses=0] + br bool false, label %loopexit.18.loopexit, label %no_exit.18 + +loopexit.18.loopexit: ; preds = %loopexit.20 + ret void +} diff --git a/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll b/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll new file mode 100644 index 0000000..02180cb --- /dev/null +++ b/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep shld | wc -l | grep 1 +; +; Check that the isel does not fold the shld, which already folds a load +; and has two uses, into a store. +%A = external global uint + +uint %test5(uint %B, ubyte %C) { + %tmp.1 = load uint *%A; + %tmp.2 = shl uint %tmp.1, ubyte %C + %tmp.3 = sub ubyte 32, %C + %tmp.4 = shr uint %B, ubyte %tmp.3 + %tmp.5 = or uint %tmp.4, %tmp.2 + store uint %tmp.5, uint* %A + ret uint %tmp.5 +} diff --git a/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll new file mode 100644 index 0000000..b7f08cf --- /dev/null +++ b/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep {subl.*%esp} + +int %f(int %a, int %b) { + %tmp.2 = mul int %a, %a + %tmp.5 = shl int %a, ubyte 1 + %tmp.6 = mul int %tmp.5, %b + %tmp.10 = mul int %b, %b + %tmp.7 = add int %tmp.10, %tmp.2 + %tmp.11 = add int %tmp.7, %tmp.6 + ret int %tmp.11 +} diff --git a/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll new file mode 100644 index 0000000..da063df --- /dev/null +++ b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& \ +; RUN: grep asm-printer | grep 7 + +int %g(int %a, int %b) { + %tmp.1 = shl int %b, ubyte 1 + %tmp.3 = add int %tmp.1, %a + %tmp.5 = mul int %tmp.3, %a + %tmp.8 = mul int %b, %b + %tmp.9 = add int %tmp.5, %tmp.8 + ret int %tmp.9 +} diff --git a/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll b/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll new file mode 100644 index 0000000..5d380b5 --- /dev/null +++ b/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll @@ -0,0 +1,55 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8.6.1" + %struct.GLTColor4 = type { float, float, float, float } + %struct.GLTCoord3 = type { float, float, float } + %struct.__GLIContextRec = type { { %struct.anon, { [24 x [16 x float]], [24 x [16 x float]] }, %struct.GLTColor4, { float, float, float, float, %struct.GLTCoord3, float } }, { float, float, float, float, float, float, float, float, [4 x uint], [4 x uint], [4 x uint] } } + %struct.__GLvertex = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, %struct.GLTColor4, float, float, float, ubyte, ubyte, ubyte, ubyte, [4 x float], [2 x sbyte*], uint, uint, [16 x %struct.GLTColor4] } + %struct.anon = type { float, float, float, float, float, float, float, float } + +implementation ; Functions: + +declare <4 x float> %llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, sbyte) + +declare <4 x int> %llvm.x86.sse2.packssdw.128(<4 x int>, <4 x int>) + +declare int %llvm.x86.sse2.pmovmskb.128(<16 x sbyte>) + +void %gleLLVMVecInterpolateClip() { +entry: + br bool false, label %cond_false, label %cond_false183 + +cond_false: ; preds = %entry + br bool false, label %cond_false183, label %cond_true69 + +cond_true69: ; preds = %cond_false + ret void + +cond_false183: ; preds = %cond_false, %entry + %vuizmsk.0.1 = phi <4 x int> [ < int -1, int -1, int -1, int 0 >, %entry ], [ < int -1, int 0, int 0, int 0 >, %cond_false ] ; <<4 x int>> [#uses=2] + %tmp192 = extractelement <4 x int> %vuizmsk.0.1, uint 2 ; <int> [#uses=1] + %tmp193 = extractelement <4 x int> %vuizmsk.0.1, uint 3 ; <int> [#uses=2] + %tmp195 = insertelement <4 x int> zeroinitializer, int %tmp192, uint 1 ; <<4 x int>> [#uses=1] + %tmp196 = insertelement <4 x int> %tmp195, int %tmp193, uint 2 ; <<4 x int>> [#uses=1] + %tmp197 = insertelement <4 x int> %tmp196, int %tmp193, uint 3 ; <<4 x int>> [#uses=1] + %tmp336 = and <4 x int> zeroinitializer, %tmp197 ; <<4 x int>> [#uses=1] + %tmp337 = cast <4 x int> %tmp336 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp378 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp337, <4 x float> zeroinitializer, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp379 = cast <4 x float> %tmp378 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp388 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> zeroinitializer, <4 x int> %tmp379 ) ; <<4 x int>> [#uses=1] + %tmp392 = cast <4 x int> %tmp388 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp399 = extractelement <8 x short> %tmp392, uint 7 ; <short> [#uses=1] + %tmp423 = insertelement <8 x short> zeroinitializer, short %tmp399, uint 7 ; <<8 x short>> [#uses=1] + %tmp427 = cast <8 x short> %tmp423 to <16 x sbyte> ; <<16 x sbyte>> [#uses=1] + %tmp428 = tail call int %llvm.x86.sse2.pmovmskb.128( <16 x sbyte> %tmp427 ) ; <int> [#uses=1] + %tmp432 = cast int %tmp428 to sbyte ; <sbyte> [#uses=1] + %tmp = and sbyte %tmp432, 42 ; <sbyte> [#uses=1] + %tmp436 = cast sbyte %tmp to ubyte ; <ubyte> [#uses=1] + %tmp446 = cast ubyte %tmp436 to uint ; <uint> [#uses=1] + %tmp447 = shl uint %tmp446, ubyte 24 ; <uint> [#uses=1] + %tmp449 = or uint 0, %tmp447 ; <uint> [#uses=1] + store uint %tmp449, uint* null + ret void +} diff --git a/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll b/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll new file mode 100644 index 0000000..db82d65 --- /dev/null +++ b/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll @@ -0,0 +1,36 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static | \ +; RUN: grep {movl _last} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static | \ +; RUN: grep {cmpl.*_last} | wc -l | grep 1 + +%block = external global ubyte* ; <ubyte**> [#uses=1] +%last = external global int ; <int*> [#uses=3] + +implementation ; Functions: + +bool %loadAndRLEsource_no_exit_2E_1_label_2E_0(int %tmp.21.reload, int %tmp.8) { +newFuncRoot: + br label %label.0 + +label.0.no_exit.1_crit_edge.exitStub: ; preds = %label.0 + ret bool true + +codeRepl5.exitStub: ; preds = %label.0 + ret bool false + +label.0: ; preds = %newFuncRoot + %tmp.35 = load int* %last ; <int> [#uses=1] + %inc.1 = add int %tmp.35, 1 ; <int> [#uses=2] + store int %inc.1, int* %last + %tmp.36 = load ubyte** %block ; <ubyte*> [#uses=1] + %tmp.38 = getelementptr ubyte* %tmp.36, int %inc.1 ; <ubyte*> [#uses=1] + %tmp.40 = cast int %tmp.21.reload to ubyte ; <ubyte> [#uses=1] + store ubyte %tmp.40, ubyte* %tmp.38 + %tmp.910 = load int* %last ; <int> [#uses=1] + %tmp.1111 = setlt int %tmp.910, %tmp.8 ; <bool> [#uses=1] + %tmp.1412 = setne int %tmp.21.reload, 257 ; <bool> [#uses=1] + %tmp.1613 = and bool %tmp.1111, %tmp.1412 ; <bool> [#uses=1] + br bool %tmp.1613, label %label.0.no_exit.1_crit_edge.exitStub, label %codeRepl5.exitStub +} diff --git a/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll new file mode 100644 index 0000000..f89cfe0 --- /dev/null +++ b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll @@ -0,0 +1,74 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah -stats |& \ +; RUN: not grep {Number of register spills} + +int %foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) { + %tmp44 = load <4 x float>* %a ; <<4 x float>> [#uses=9] + %tmp46 = load <4 x float>* %b ; <<4 x float>> [#uses=1] + %tmp48 = load <4 x float>* %c ; <<4 x float>> [#uses=1] + %tmp50 = load <4 x float>* %d ; <<4 x float>> [#uses=1] + %tmp51 = cast <4 x float> %tmp44 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp = shufflevector <4 x int> %tmp51, <4 x int> undef, <4 x uint> < uint 3, uint 3, uint 3, uint 3 > ; <<4 x int>> [#uses=2] + %tmp52 = cast <4 x int> %tmp to <4 x float> ; <<4 x float>> [#uses=1] + %tmp60 = xor <4 x int> %tmp, < int -2147483648, int -2147483648, int -2147483648, int -2147483648 > ; <<4 x int>> [#uses=1] + %tmp61 = cast <4 x int> %tmp60 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp74 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp75 = cast <4 x float> %tmp74 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp88 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp61, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp89 = cast <4 x float> %tmp88 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp98 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> %tmp75, <4 x int> %tmp89 ) ; <<4 x int>> [#uses=1] + %tmp102 = cast <4 x int> %tmp98 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp = shufflevector <8 x short> %tmp102, <8 x short> undef, <8 x uint> < uint 0, uint 1, uint 2, uint 3, uint 6, uint 5, uint 4, uint 7 > ; <<8 x short>> [#uses=1] + %tmp105 = shufflevector <8 x short> %tmp, <8 x short> undef, <8 x uint> < uint 2, uint 1, uint 0, uint 3, uint 4, uint 5, uint 6, uint 7 > ; <<8 x short>> [#uses=1] + %tmp105 = cast <8 x short> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1] + store <4 x float> %tmp105, <4 x float>* %a + %tmp108 = cast <4 x float> %tmp46 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp109 = shufflevector <4 x int> %tmp108, <4 x int> undef, <4 x uint> < uint 3, uint 3, uint 3, uint 3 > ; <<4 x int>> [#uses=2] + %tmp109 = cast <4 x int> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp119 = xor <4 x int> %tmp109, < int -2147483648, int -2147483648, int -2147483648, int -2147483648 > ; <<4 x int>> [#uses=1] + %tmp120 = cast <4 x int> %tmp119 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp133 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp109, <4 x float> %tmp44, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp134 = cast <4 x float> %tmp133 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp147 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp120, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp148 = cast <4 x float> %tmp147 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp159 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> %tmp134, <4 x int> %tmp148 ) ; <<4 x int>> [#uses=1] + %tmp163 = cast <4 x int> %tmp159 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp164 = shufflevector <8 x short> %tmp163, <8 x short> undef, <8 x uint> < uint 0, uint 1, uint 2, uint 3, uint 6, uint 5, uint 4, uint 7 > ; <<8 x short>> [#uses=1] + %tmp166 = shufflevector <8 x short> %tmp164, <8 x short> undef, <8 x uint> < uint 2, uint 1, uint 0, uint 3, uint 4, uint 5, uint 6, uint 7 > ; <<8 x short>> [#uses=1] + %tmp166 = cast <8 x short> %tmp166 to <4 x float> ; <<4 x float>> [#uses=1] + store <4 x float> %tmp166, <4 x float>* %b + %tmp169 = cast <4 x float> %tmp48 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp170 = shufflevector <4 x int> %tmp169, <4 x int> undef, <4 x uint> < uint 3, uint 3, uint 3, uint 3 > ; <<4 x int>> [#uses=2] + %tmp170 = cast <4 x int> %tmp170 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp180 = xor <4 x int> %tmp170, < int -2147483648, int -2147483648, int -2147483648, int -2147483648 > ; <<4 x int>> [#uses=1] + %tmp181 = cast <4 x int> %tmp180 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp194 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp170, <4 x float> %tmp44, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp195 = cast <4 x float> %tmp194 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp208 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp181, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp209 = cast <4 x float> %tmp208 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp220 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> %tmp195, <4 x int> %tmp209 ) ; <<4 x int>> [#uses=1] + %tmp224 = cast <4 x int> %tmp220 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp225 = shufflevector <8 x short> %tmp224, <8 x short> undef, <8 x uint> < uint 0, uint 1, uint 2, uint 3, uint 6, uint 5, uint 4, uint 7 > ; <<8 x short>> [#uses=1] + %tmp227 = shufflevector <8 x short> %tmp225, <8 x short> undef, <8 x uint> < uint 2, uint 1, uint 0, uint 3, uint 4, uint 5, uint 6, uint 7 > ; <<8 x short>> [#uses=1] + %tmp227 = cast <8 x short> %tmp227 to <4 x float> ; <<4 x float>> [#uses=1] + store <4 x float> %tmp227, <4 x float>* %c + %tmp230 = cast <4 x float> %tmp50 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp231 = shufflevector <4 x int> %tmp230, <4 x int> undef, <4 x uint> < uint 3, uint 3, uint 3, uint 3 > ; <<4 x int>> [#uses=2] + %tmp231 = cast <4 x int> %tmp231 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp241 = xor <4 x int> %tmp231, < int -2147483648, int -2147483648, int -2147483648, int -2147483648 > ; <<4 x int>> [#uses=1] + %tmp242 = cast <4 x int> %tmp241 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp255 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp231, <4 x float> %tmp44, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp256 = cast <4 x float> %tmp255 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp269 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp242, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp270 = cast <4 x float> %tmp269 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp281 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> %tmp256, <4 x int> %tmp270 ) ; <<4 x int>> [#uses=1] + %tmp285 = cast <4 x int> %tmp281 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp286 = shufflevector <8 x short> %tmp285, <8 x short> undef, <8 x uint> < uint 0, uint 1, uint 2, uint 3, uint 6, uint 5, uint 4, uint 7 > ; <<8 x short>> [#uses=1] + %tmp288 = shufflevector <8 x short> %tmp286, <8 x short> undef, <8 x uint> < uint 2, uint 1, uint 0, uint 3, uint 4, uint 5, uint 6, uint 7 > ; <<8 x short>> [#uses=1] + %tmp288 = cast <8 x short> %tmp288 to <4 x float> ; <<4 x float>> [#uses=1] + store <4 x float> %tmp288, <4 x float>* %d + ret int 0 +} + +declare <4 x float> %llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, sbyte) + +declare <4 x int> %llvm.x86.sse2.packssdw.128(<4 x int>, <4 x int>) diff --git a/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/test/CodeGen/X86/2006-05-02-InstrSched1.ll new file mode 100644 index 0000000..59a15f4 --- /dev/null +++ b/test/CodeGen/X86/2006-05-02-InstrSched1.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -relocation-model=static -stats |& \ +; RUN: grep asm-printer | grep 14 +; +%size20 = external global uint ; <uint*> [#uses=1] +%in5 = external global ubyte* ; <ubyte**> [#uses=1] + +int %compare(sbyte* %a, sbyte* %b) { + %tmp = cast sbyte* %a to uint* ; <uint*> [#uses=1] + %tmp1 = cast sbyte* %b to uint* ; <uint*> [#uses=1] + %tmp = load uint* %size20 ; <uint> [#uses=1] + %tmp = load ubyte** %in5 ; <ubyte*> [#uses=2] + %tmp3 = load uint* %tmp1 ; <uint> [#uses=1] + %tmp4 = getelementptr ubyte* %tmp, uint %tmp3 ; <ubyte*> [#uses=1] + %tmp7 = load uint* %tmp ; <uint> [#uses=1] + %tmp8 = getelementptr ubyte* %tmp, uint %tmp7 ; <ubyte*> [#uses=1] + %tmp8 = cast ubyte* %tmp8 to sbyte* ; <sbyte*> [#uses=1] + %tmp4 = cast ubyte* %tmp4 to sbyte* ; <sbyte*> [#uses=1] + %tmp = tail call int %memcmp( sbyte* %tmp8, sbyte* %tmp4, uint %tmp ) ; <int> [#uses=1] + ret int %tmp +} + +declare int %memcmp(sbyte*, sbyte*, uint) diff --git a/test/CodeGen/X86/2006-05-02-InstrSched2.ll b/test/CodeGen/X86/2006-05-02-InstrSched2.ll new file mode 100644 index 0000000..ac37fb1 --- /dev/null +++ b/test/CodeGen/X86/2006-05-02-InstrSched2.ll @@ -0,0 +1,25 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& \ +; RUN: grep asm-printer | grep 16 + +void %_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(sbyte* %tmp435.i, uint* %tmp449.i.out) { +newFuncRoot: + br label %cond_true456.i + +bb459.i.exitStub: ; preds = %cond_true456.i + store uint %tmp449.i, uint* %tmp449.i.out + ret void + +cond_true456.i: ; preds = %cond_true456.i, %newFuncRoot + %__s441.2.4.i = phi sbyte* [ %tmp451.i, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; <sbyte*> [#uses=2] + %__h.2.4.i = phi uint [ %tmp449.i, %cond_true456.i ], [ 0, %newFuncRoot ] ; <uint> [#uses=1] + %tmp446.i = mul uint %__h.2.4.i, 5 ; <uint> [#uses=1] + %tmp.i = load sbyte* %__s441.2.4.i ; <sbyte> [#uses=1] + %tmp448.i = cast sbyte %tmp.i to uint ; <uint> [#uses=1] + %tmp449.i = add uint %tmp448.i, %tmp446.i ; <uint> [#uses=2] + %tmp450.i = cast sbyte* %__s441.2.4.i to uint ; <uint> [#uses=1] + %tmp451.i = add uint %tmp450.i, 1 ; <uint> [#uses=1] + %tmp451.i = cast uint %tmp451.i to sbyte* ; <sbyte*> [#uses=2] + %tmp45435.i = load sbyte* %tmp451.i ; <sbyte> [#uses=1] + %tmp45536.i = seteq sbyte %tmp45435.i, 0 ; <bool> [#uses=1] + br bool %tmp45536.i, label %bb459.i.exitStub, label %cond_true456.i +} diff --git a/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll b/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll new file mode 100644 index 0000000..2669159 --- /dev/null +++ b/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll @@ -0,0 +1,23 @@ +; Coalescing from R32 to a subset R32_. Once another register coalescer bug is +; fixed, the movb should go away as well. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -relocation-model=static | \ +; RUN: grep movl | wc -l + +%B = external global uint +%C = external global ushort* + +void %test(uint %A) { + %A = cast uint %A to ubyte + %tmp2 = load uint* %B + %tmp3 = and ubyte %A, 16 + %tmp4 = shl uint %tmp2, ubyte %tmp3 + store uint %tmp4, uint* %B + %tmp6 = shr uint %A, ubyte 3 + %tmp = load ushort** %C + %tmp8 = cast ushort* %tmp to uint + %tmp9 = add uint %tmp8, %tmp6 + %tmp9 = cast uint %tmp9 to ushort* + store ushort* %tmp9, ushort** %C + ret void +} diff --git a/test/CodeGen/X86/2006-05-08-InstrSched.ll b/test/CodeGen/X86/2006-05-08-InstrSched.ll new file mode 100644 index 0000000..fd35f9f --- /dev/null +++ b/test/CodeGen/X86/2006-05-08-InstrSched.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -relocation-model=static | not grep {subl.*%esp} + +%A = external global ushort* +%B = external global uint +%C = external global uint + +void %test() { + %tmp = load ushort** %A + %tmp1 = getelementptr ushort* %tmp, int 1 + %tmp = load ushort* %tmp1 + %tmp3 = cast ushort %tmp to uint + %tmp = load uint* %B + %tmp4 = and uint %tmp, 16 + %tmp5 = load uint* %C + %tmp6 = cast uint %tmp4 to ubyte + %tmp7 = shl uint %tmp5, ubyte %tmp6 + %tmp9 = xor ubyte %tmp6, 16 + %tmp11 = shr uint %tmp3, ubyte %tmp9 + %tmp12 = or uint %tmp11, %tmp7 + store uint %tmp12, uint* %C + ret void +} diff --git a/test/CodeGen/X86/2006-05-11-InstrSched.ll b/test/CodeGen/X86/2006-05-11-InstrSched.ll new file mode 100644 index 0000000..b0bde7d --- /dev/null +++ b/test/CodeGen/X86/2006-05-11-InstrSched.ll @@ -0,0 +1,55 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |&\ +; RUN: grep {asm-printer} | grep 33 + +target datalayout = "e-p:32:32" +define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) { +entry: + %tmp9 = icmp slt i32 %M, 5 ; <i1> [#uses=1] + br i1 %tmp9, label %return, label %cond_true + +cond_true: ; preds = %cond_true, %entry + %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2] + %tmp. = shl i32 %indvar, 2 ; <i32> [#uses=1] + %tmp.10 = add i32 %tmp., 1 ; <i32> [#uses=2] + %k.0.0 = bitcast i32 %tmp.10 to i32 ; <i32> [#uses=2] + %tmp31 = add i32 %k.0.0, -1 ; <i32> [#uses=4] + %tmp32 = getelementptr i32* %mpp, i32 %tmp31 ; <i32*> [#uses=1] + %tmp34 = bitcast i32* %tmp32 to i8* ; <i8*> [#uses=1] + %tmp = tail call <16 x i8> @llvm.x86.sse2.loadu.dq( i8* %tmp34 ) ; <<16 x i8>> [#uses=1] + %tmp42 = getelementptr i32* %tpmm, i32 %tmp31 ; <i32*> [#uses=1] + %tmp42.upgrd.1 = bitcast i32* %tmp42 to <4 x i32>* ; <<4 x i32>*> [#uses=1] + %tmp46 = load <4 x i32>* %tmp42.upgrd.1 ; <<4 x i32>> [#uses=1] + %tmp54 = bitcast <16 x i8> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp55 = add <4 x i32> %tmp54, %tmp46 ; <<4 x i32>> [#uses=2] + %tmp55.upgrd.2 = bitcast <4 x i32> %tmp55 to <2 x i64> ; <<2 x i64>> [#uses=1] + %tmp62 = getelementptr i32* %ip, i32 %tmp31 ; <i32*> [#uses=1] + %tmp65 = bitcast i32* %tmp62 to i8* ; <i8*> [#uses=1] + %tmp66 = tail call <16 x i8> @llvm.x86.sse2.loadu.dq( i8* %tmp65 ) ; <<16 x i8>> [#uses=1] + %tmp73 = getelementptr i32* %tpim, i32 %tmp31 ; <i32*> [#uses=1] + %tmp73.upgrd.3 = bitcast i32* %tmp73 to <4 x i32>* ; <<4 x i32>*> [#uses=1] + %tmp77 = load <4 x i32>* %tmp73.upgrd.3 ; <<4 x i32>> [#uses=1] + %tmp87 = bitcast <16 x i8> %tmp66 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp88 = add <4 x i32> %tmp87, %tmp77 ; <<4 x i32>> [#uses=2] + %tmp88.upgrd.4 = bitcast <4 x i32> %tmp88 to <2 x i64> ; <<2 x i64>> [#uses=1] + %tmp99 = tail call <4 x i32> @llvm.x86.sse2.pcmpgt.d( <4 x i32> %tmp88, <4 x i32> %tmp55 ) ; <<4 x i32>> [#uses=1] + %tmp99.upgrd.5 = bitcast <4 x i32> %tmp99 to <2 x i64> ; <<2 x i64>> [#uses=2] + %tmp110 = xor <2 x i64> %tmp99.upgrd.5, < i64 -1, i64 -1 > ; <<2 x i64>> [#uses=1] + %tmp111 = and <2 x i64> %tmp110, %tmp55.upgrd.2 ; <<2 x i64>> [#uses=1] + %tmp121 = and <2 x i64> %tmp99.upgrd.5, %tmp88.upgrd.4 ; <<2 x i64>> [#uses=1] + %tmp131 = or <2 x i64> %tmp121, %tmp111 ; <<2 x i64>> [#uses=1] + %gep.upgrd.6 = zext i32 %tmp.10 to i64 ; <i64> [#uses=1] + %tmp137 = getelementptr i32* %mc, i64 %gep.upgrd.6 ; <i32*> [#uses=1] + %tmp137.upgrd.7 = bitcast i32* %tmp137 to <2 x i64>* ; <<2 x i64>*> [#uses=1] + store <2 x i64> %tmp131, <2 x i64>* %tmp137.upgrd.7 + %tmp147 = add i32 %k.0.0, 8 ; <i32> [#uses=1] + %tmp.upgrd.8 = icmp sgt i32 %tmp147, %M ; <i1> [#uses=1] + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] + br i1 %tmp.upgrd.8, label %return, label %cond_true + +return: ; preds = %cond_true, %entry + ret void +} + +declare <16 x i8> @llvm.x86.sse2.loadu.dq(i8*) + +declare <4 x i32> @llvm.x86.sse2.pcmpgt.d(<4 x i32>, <4 x i32>) diff --git a/test/CodeGen/X86/2006-05-17-VectorArg.ll b/test/CodeGen/X86/2006-05-17-VectorArg.ll new file mode 100644 index 0000000..1f2af14 --- /dev/null +++ b/test/CodeGen/X86/2006-05-17-VectorArg.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 + +<4 x float> %opRSQ(<4 x float> %a) { +entry: + %tmp2 = extractelement <4 x float> %a, uint 3 + %abscond = setge float %tmp2, -0.000000e+00 + %abs = select bool %abscond, float %tmp2, float 0.000000e+00 + %tmp3 = tail call float %llvm.sqrt.f32( float %abs ) + %tmp4 = div float 1.000000e+00, %tmp3 + %tmp11 = insertelement <4 x float> zeroinitializer, float %tmp4, uint 3 + ret <4 x float> %tmp11 +} + +declare float %llvm.sqrt.f32(float) diff --git a/test/CodeGen/X86/2006-05-22-FPSetEQ.ll b/test/CodeGen/X86/2006-05-22-FPSetEQ.ll new file mode 100644 index 0000000..32281db --- /dev/null +++ b/test/CodeGen/X86/2006-05-22-FPSetEQ.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep setnp +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -enable-unsafe-fp-math | \ +; RUN: not grep setnp + +uint %test(float %f) { + %tmp = seteq float %f, 0.000000e+00 + %tmp = cast bool %tmp to uint + ret uint %tmp +} diff --git a/test/CodeGen/X86/2006-05-25-CycleInDAG.ll b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll new file mode 100644 index 0000000..8258f0b --- /dev/null +++ b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll @@ -0,0 +1,21 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +int %test() { + br bool false, label %cond_next33, label %cond_true12 + +cond_true12: + ret int 0 + +cond_next33: + %tmp44.i = call double %foo( double 0.000000e+00, int 32 ) + %tmp61.i = load ubyte* null + %tmp61.i = cast ubyte %tmp61.i to int + %tmp58.i = or int 0, %tmp61.i + %tmp62.i = or int %tmp58.i, 0 + %tmp62.i = cast int %tmp62.i to double + %tmp64.i = add double %tmp62.i, %tmp44.i + %tmp68.i = call double %foo( double %tmp64.i, int 0 ) + ret int 0 +} + +declare double %foo(double, int) diff --git a/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll b/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll new file mode 100644 index 0000000..d044fd7 --- /dev/null +++ b/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; PR825 + +long %test() { + %tmp.i5 = call long asm sideeffect "rdtsc", "=A,~{dirflag},~{fpsr},~{flags}"( ) ; <long> [#uses=0] + ret long %tmp.i5 +} diff --git a/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll b/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll new file mode 100644 index 0000000..1bacc16 --- /dev/null +++ b/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; PR828 + +target endian = little +target pointersize = 32 +target triple = "i686-pc-linux-gnu" + +implementation ; Functions: + +void %_ZN5() { + +cond_true9: ; preds = %entry + %tmp3.i.i = call int asm sideeffect "lock; cmpxchg $1,$2", +"={ax},q,m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( int 0, int* null, int 0 ) + ; <int> [#uses=0] + ret void +} + diff --git a/test/CodeGen/X86/2006-07-19-ATTAsm.ll b/test/CodeGen/X86/2006-07-19-ATTAsm.ll new file mode 100644 index 0000000..adfe88c --- /dev/null +++ b/test/CodeGen/X86/2006-07-19-ATTAsm.ll @@ -0,0 +1,51 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att +; PR834 + +target endian = little +target pointersize = 32 +target triple = "i386-unknown-freebsd6.1" + + %llvm.dbg.anchor.type = type { uint, uint } + %llvm.dbg.basictype.type = type { uint, { }*, sbyte*, { }*, uint, ulong, ulong, ulong, uint, uint } + %llvm.dbg.compile_unit.type = type { uint, { }*, uint, sbyte*, sbyte*, sbyte* } + %llvm.dbg.global_variable.type = type { uint, { }*, { }*, sbyte*, sbyte*, { }*, uint, { }*, bool, bool, { }* } +%x = global int 0 ; <int*> [#uses=1] +%llvm.dbg.global_variable = internal constant %llvm.dbg.global_variable.type { + uint 327732, + { }* cast (%llvm.dbg.anchor.type* %llvm.dbg.global_variables to { }*), + { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), + sbyte* getelementptr ([2 x sbyte]* %str, int 0, int 0), + sbyte* null, + { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), + uint 1, + { }* cast (%llvm.dbg.basictype.type* %llvm.dbg.basictype to { }*), + bool false, + bool true, + { }* cast (int* %x to { }*) }, section "llvm.metadata" ; <%llvm.dbg.global_variable.type*> [#uses=0] +%llvm.dbg.global_variables = linkonce constant %llvm.dbg.anchor.type { uint 327680, uint 52 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] +%llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { + uint 327697, + { }* cast (%llvm.dbg.anchor.type* %llvm.dbg.compile_units to { }*), + uint 4, + sbyte* getelementptr ([10 x sbyte]* %str, int 0, int 0), + sbyte* getelementptr ([32 x sbyte]* %str, int 0, int 0), + sbyte* getelementptr ([45 x sbyte]* %str, int 0, int 0) }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] +%llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { uint 327680, uint 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] +%str = internal constant [10 x sbyte] c"testb.cpp\00", section "llvm.metadata" ; <[10 x sbyte]*> [#uses=1] +%str = internal constant [32 x sbyte] c"/Sources/Projects/DwarfTesting/\00", section "llvm.metadata" ; <[32 x sbyte]*> [#uses=1] +%str = internal constant [45 x sbyte] c"4.0.1 LLVM (Apple Computer, Inc. build 5400)\00", section "llvm.metadata" ; <[45 x sbyte]*> [#uses=1] +%str = internal constant [2 x sbyte] c"x\00", section "llvm.metadata" ; <[2 x sbyte]*> [#uses=1] +%llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { + uint 327716, + { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), + sbyte* getelementptr ([4 x sbyte]* %str, int 0, int 0), + { }* null, + uint 0, + ulong 32, + ulong 32, + ulong 0, + uint 0, + uint 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1] +%str = internal constant [4 x sbyte] c"int\00", section "llvm.metadata" ; <[4 x sbyte]*> [#uses=1] + +implementation ; Functions: diff --git a/test/CodeGen/X86/2006-07-20-InlineAsm.ll b/test/CodeGen/X86/2006-07-20-InlineAsm.ll new file mode 100644 index 0000000..16ad579 --- /dev/null +++ b/test/CodeGen/X86/2006-07-20-InlineAsm.ll @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; PR833 + +%G = weak global int 0 ; <int*> [#uses=3] + +implementation ; Functions: + +int %foo(int %X) { +entry: + %X_addr = alloca int ; <int*> [#uses=3] + store int %X, int* %X_addr + call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,m,1,~{dirflag},~{fpsr},~{flags}"( int* %G, int* %X_addr, int* %G, int %X ) + %tmp1 = load int* %X_addr ; <int> [#uses=1] + ret int %tmp1 +} + +int %foo2(int %X) { +entry: + %X_addr = alloca int ; <int*> [#uses=3] + store int %X, int* %X_addr + call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,1,~{dirflag},~{fpsr},~{flags}"( int* %G, int* %X_addr, int %X ) + %tmp1 = load int* %X_addr ; <int> [#uses=1] + ret int %tmp1 +} diff --git a/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll b/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll new file mode 100644 index 0000000..26c71a3 --- /dev/null +++ b/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep -- 4294967240 +; PR853 + +%X = global int* cast (ulong 18446744073709551560 to int*) + diff --git a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll new file mode 100644 index 0000000..aa02bf7 --- /dev/null +++ b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll @@ -0,0 +1,11 @@ +; PR850 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att | \ +; RUN: grep {movl 4(%eax),%ebp} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att | \ +; RUN: grep {movl 0(%eax), %ebx} + +int %foo(int %__s.i.i, int %tmp5.i.i, int %tmp6.i.i, int %tmp7.i.i, int %tmp8.i.i ) { + +%tmp9.i.i = call int asm sideeffect "push %ebp\0Apush %ebx\0Amovl 4($2),%ebp\0Amovl 0($2), %ebx\0Amovl $1,%eax\0Aint $$0x80\0Apop %ebx\0Apop %ebp", "={ax},i,0,{cx},{dx},{si},{di}"(int 192, int %__s.i.i, int %tmp5.i.i, int %tmp6.i.i, int %tmp7.i.i, int %tmp8.i.i ) + ret int %tmp9.i.i +} diff --git a/test/CodeGen/X86/2006-08-07-CycleInDAG.ll b/test/CodeGen/X86/2006-08-07-CycleInDAG.ll new file mode 100644 index 0000000..c66d553 --- /dev/null +++ b/test/CodeGen/X86/2006-08-07-CycleInDAG.ll @@ -0,0 +1,34 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 + +%struct.foo = type opaque + +implementation + +fastcc int %test(%struct.foo* %v, %struct.foo* %vi) { + br bool false, label %ilog2.exit, label %cond_true.i + +cond_true.i: ; preds = %entry + ret int 0 + +ilog2.exit: ; preds = %entry + %tmp24.i = load int* null ; <int> [#uses=1] + %tmp13.i12.i = tail call double %ldexp( double 0.000000e+00, int 0 ) ; <double> [#uses=1] + %tmp13.i13.i = cast double %tmp13.i12.i to float ; <float> [#uses=1] + %tmp11.s = load int* null ; <int> [#uses=1] + %tmp11.i = cast int %tmp11.s to uint ; <uint> [#uses=1] + %n.i = cast int %tmp24.i to uint ; <uint> [#uses=1] + %tmp13.i7 = mul uint %tmp11.i, %n.i ; <uint> [#uses=1] + %tmp.i8 = tail call sbyte* %calloc( uint %tmp13.i7, uint 4 ) ; <sbyte*> [#uses=0] + br bool false, label %bb224.preheader.i, label %bb.i + +bb.i: ; preds = %ilog2.exit + ret int 0 + +bb224.preheader.i: ; preds = %ilog2.exit + %tmp165.i = cast float %tmp13.i13.i to double ; <double> [#uses=0] + ret int 0 +} + +declare sbyte* %calloc(uint, uint) + +declare double %ldexp(double, int) diff --git a/test/CodeGen/X86/2006-08-16-CycleInDAG.ll b/test/CodeGen/X86/2006-08-16-CycleInDAG.ll new file mode 100644 index 0000000..c0668a9 --- /dev/null +++ b/test/CodeGen/X86/2006-08-16-CycleInDAG.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + + %struct.expr = type { %struct.rtx_def*, int, %struct.expr*, %struct.occr*, %struct.occr*, %struct.rtx_def* } + %struct.hash_table = type { %struct.expr**, uint, uint, int } + %struct.occr = type { %struct.occr*, %struct.rtx_def*, sbyte, sbyte } + %struct.rtx_def = type { ushort, ubyte, ubyte, %struct.u } + %struct.u = type { [1 x long] } + +void %test() { + %tmp = load uint* null ; <uint> [#uses=1] + %tmp8 = call uint %hash_rtx( ) ; <uint> [#uses=1] + %tmp11 = rem uint %tmp8, %tmp ; <uint> [#uses=1] + br bool false, label %cond_next, label %return + +cond_next: ; preds = %entry + %tmp17 = getelementptr %struct.expr** null, uint %tmp11 ; <%struct.expr**> [#uses=0] + ret void + +return: ; preds = %entry + ret void +} + +declare uint %hash_rtx() diff --git a/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll b/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll new file mode 100644 index 0000000..af30ea4 --- /dev/null +++ b/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386 | \ +; RUN: not grep {movl %eax, %edx} + +int %foo(int %t, int %C) { +entry: + br label %cond_true + +cond_true: ; preds = %cond_true, %entry + %t_addr.0.0 = phi int [ %t, %entry ], [ %tmp7, %cond_true ] ; <int> [#uses=2] + %tmp7 = add int %t_addr.0.0, 1 ; <int> [#uses=1] + %tmp = setgt int %C, 39 ; <bool> [#uses=1] + br bool %tmp, label %bb12, label %cond_true + +bb12: ; preds = %cond_true + ret int %t_addr.0.0 +} diff --git a/test/CodeGen/X86/2006-09-01-CycleInDAG.ll b/test/CodeGen/X86/2006-09-01-CycleInDAG.ll new file mode 100644 index 0000000..2e0a69a --- /dev/null +++ b/test/CodeGen/X86/2006-09-01-CycleInDAG.ll @@ -0,0 +1,135 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8" + %struct.CUMULATIVE_ARGS = type { int, int, int, int, int, int, int, int, int, int, int, int } + %struct.FILE = type { ubyte*, int, int, short, short, %struct.__sbuf, int, sbyte*, int (sbyte*)*, int (sbyte*, sbyte*, int)*, long (sbyte*, long, int)*, int (sbyte*, sbyte*, int)*, %struct.__sbuf, %struct.__sFILEX*, int, [3 x ubyte], [1 x ubyte], %struct.__sbuf, int, long } + %struct.VEC_edge = type { uint, uint, [1 x %struct.edge_def*] } + %struct.VEC_tree = type { uint, uint, [1 x %struct.tree_node*] } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { ubyte*, int } + %struct._obstack_chunk = type { sbyte*, %struct._obstack_chunk*, [4 x sbyte] } + %struct._var_map = type { %struct.partition_def*, int*, int*, %struct.tree_node**, uint, uint, int* } + %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, sbyte*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, long, int, int, int, int } + %struct.bb_ann_d = type { %struct.tree_node*, ubyte, %struct.edge_prediction* } + %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, uint, [4 x uint] } + %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, uint, %struct.bitmap_obstack* } + %struct.bitmap_iterator = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, uint, uint } + %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } + %struct.block_stmt_iterator = type { %struct.tree_stmt_iterator, %struct.basic_block_def* } + %struct.coalesce_list_d = type { %struct._var_map*, %struct.partition_pair_d**, bool } + %struct.conflict_graph_def = type opaque + %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] } + %struct.def_operand_ptr = type { %struct.tree_node** } + %struct.def_optype_d = type { uint, [1 x %struct.def_operand_ptr] } + %struct.die_struct = type opaque + %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, sbyte*, %struct.location_t*, int, int, long, uint } + %struct.edge_def_insns = type { %struct.rtx_def* } + %struct.edge_iterator = type { uint, %struct.VEC_edge** } + %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, uint, int } + %struct.eh_status = type opaque + %struct.elt_list = type opaque + %struct.emit_status = type { int, int, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, int, %struct.location_t, int, ubyte*, %struct.rtx_def** } + %struct.et_node = type opaque + %struct.expr_status = type { int, int, int, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } + %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, int, int, int, int, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, ubyte, int, long, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, int, %struct.var_refs_queue*, int, int, %struct.rtvec_def*, %struct.tree_node*, int, int, int, %struct.machine_function*, uint, uint, bool, bool, %struct.language_function*, %struct.rtx_def*, uint, int, int, int, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, ubyte, ubyte, ubyte } + %struct.ht_identifier = type { ubyte*, uint, uint } + %struct.initial_value_struct = type opaque + %struct.lang_decl = type opaque + %struct.lang_type = type opaque + %struct.language_function = type opaque + %struct.location_t = type { sbyte*, int } + %struct.loop = type opaque + %struct.machine_function = type { int, uint, sbyte*, int, int } + %struct.obstack = type { int, %struct._obstack_chunk*, sbyte*, sbyte*, sbyte*, int, int, %struct._obstack_chunk* (sbyte*, int)*, void (sbyte*, %struct._obstack_chunk*)*, sbyte*, ubyte } + %struct.partition_def = type { int, [1 x %struct.partition_elem] } + %struct.partition_elem = type { int, %struct.partition_elem*, uint } + %struct.partition_pair_d = type { int, int, int, %struct.partition_pair_d* } + %struct.phi_arg_d = type { %struct.tree_node*, bool } + %struct.pointer_set_t = type opaque + %struct.ptr_info_def = type { ubyte, %struct.bitmap_head_def*, %struct.tree_node* } + %struct.real_value = type opaque + %struct.reg_info_def = type opaque + %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, int, int, int } + %struct.rtvec_def = type opaque + %struct.rtx_def = type opaque + %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } + %struct.simple_bitmap_def = type { uint, uint, uint, [1 x ulong] } + %struct.ssa_op_iter = type { int, int, int, int, int, int, int, int, int, int, int, int, int, int, %struct.stmt_operands_d*, bool } + %struct.stmt_ann_d = type { %struct.tree_ann_common_d, ubyte, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, uint } + %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* } + %struct.temp_slot = type opaque + %struct.tree_ann_common_d = type { uint, sbyte*, %struct.tree_node* } + %struct.tree_ann_d = type { %struct.stmt_ann_d } + %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree } + %struct.tree_block = type { %struct.tree_common, ubyte, [3 x ubyte], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, ubyte, ubyte, ubyte, ubyte, ubyte } + %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, uint, %struct.tree_node*, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, uint, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, int, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, long, %struct.lang_decl* } + %struct.tree_decl_u1 = type { long } + %struct.tree_decl_u1_a = type { uint } + %struct.tree_decl_u2 = type { %struct.function* } + %struct.tree_exp = type { %struct.tree_common, %struct.location_t*, int, %struct.tree_node*, [1 x %struct.tree_node*] } + %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier } + %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi } + %struct.tree_int_cst_lowhi = type { ulong, long } + %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } + %struct.tree_live_info_d = type { %struct._var_map*, %struct.bitmap_head_def*, %struct.bitmap_head_def**, int, %struct.bitmap_head_def** } + %struct.tree_node = type { %struct.tree_decl } + %struct.tree_partition_associator_d = type { %struct.varray_head_tag*, %struct.varray_head_tag*, int*, int*, int, int, %struct._var_map* } + %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, int, int, int, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] } + %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* } + %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, uint, %struct.ptr_info_def*, %struct.tree_node*, sbyte* } + %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* } + %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* } + %struct.tree_stmt_iterator = type { %struct.tree_statement_list_node*, %struct.tree_node* } + %struct.tree_string = type { %struct.tree_common, int, [1 x sbyte] } + %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, uint, ushort, ubyte, ubyte, uint, %struct.tree_node*, %struct.tree_node*, %struct.tree_type_symtab, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, long, %struct.lang_type* } + %struct.tree_type_symtab = type { int } + %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, uint } + %struct.tree_vec = type { %struct.tree_common, int, [1 x %struct.tree_node*] } + %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* } + %struct.use_operand_ptr = type { %struct.tree_node** } + %struct.use_optype_d = type { uint, [1 x %struct.def_operand_ptr] } + %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* } + %struct.v_may_def_optype_d = type { uint, [1 x %struct.v_def_use_operand_type_t] } + %struct.v_must_def_optype_d = type { uint, [1 x %struct.v_def_use_operand_type_t] } + %struct.value_set = type opaque + %struct.var_ann_d = type { %struct.tree_ann_common_d, ubyte, ubyte, %struct.tree_node*, %struct.varray_head_tag*, uint, uint, uint, %struct.tree_node*, %struct.tree_node* } + %struct.var_refs_queue = type { %struct.rtx_def*, uint, int, %struct.var_refs_queue* } + %struct.varasm_status = type opaque + %struct.varray_data = type { [1 x long] } + %struct.varray_head_tag = type { uint, uint, uint, sbyte*, %struct.varray_data } + %struct.vuse_optype_d = type { uint, [1 x %struct.tree_node*] } +%basic_block_info = external global %struct.varray_head_tag* ; <%struct.varray_head_tag**> [#uses=1] + +implementation ; Functions: + + +void %calculate_live_on_entry_cond_true3632(%struct.varray_head_tag* %stack3023.6, uint* %tmp3629, %struct.VEC_edge*** %tmp3397.out) { +newFuncRoot: + br label %cond_true3632 + +bb3502.exitStub: ; preds = %cond_true3632 + store %struct.VEC_edge** %tmp3397, %struct.VEC_edge*** %tmp3397.out + ret void + +cond_true3632: ; preds = %newFuncRoot + %tmp3378 = load uint* %tmp3629 ; <uint> [#uses=1] + %tmp3379 = add uint %tmp3378, 4294967295 ; <uint> [#uses=1] + %tmp3381 = getelementptr %struct.varray_head_tag* %stack3023.6, int 0, uint 4 ; <%struct.varray_data*> [#uses=1] + %tmp3382 = cast %struct.varray_data* %tmp3381 to [1 x int]* ; <[1 x int]*> [#uses=1] + %tmp3383 = getelementptr [1 x int]* %tmp3382, int 0, uint %tmp3379 ; <int*> [#uses=1] + %tmp3384 = load int* %tmp3383 ; <int> [#uses=1] + %tmp3387 = load uint* %tmp3629 ; <uint> [#uses=1] + %tmp3388 = add uint %tmp3387, 4294967295 ; <uint> [#uses=1] + store uint %tmp3388, uint* %tmp3629 + %tmp3391 = load %struct.varray_head_tag** %basic_block_info ; <%struct.varray_head_tag*> [#uses=1] + %tmp3393 = getelementptr %struct.varray_head_tag* %tmp3391, int 0, uint 4 ; <%struct.varray_data*> [#uses=1] + %tmp3394 = cast %struct.varray_data* %tmp3393 to [1 x %struct.basic_block_def*]* ; <[1 x %struct.basic_block_def*]*> [#uses=1] + %tmp3395 = getelementptr [1 x %struct.basic_block_def*]* %tmp3394, int 0, int %tmp3384 ; <%struct.basic_block_def**> [#uses=1] + %tmp3396 = load %struct.basic_block_def** %tmp3395 ; <%struct.basic_block_def*> [#uses=1] + %tmp3397 = getelementptr %struct.basic_block_def* %tmp3396, int 0, uint 3 ; <%struct.VEC_edge**> [#uses=1] + br label %bb3502.exitStub +} diff --git a/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll b/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll new file mode 100644 index 0000000..eb4d291 --- /dev/null +++ b/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; PR933 + +fastcc bool %test() { + ret bool true +} diff --git a/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll new file mode 100644 index 0000000..d8b2def --- /dev/null +++ b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=sse | grep movaps +; Test that the load is NOT folded into the intrinsic, which would zero the top +; elts of the loaded vector. + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8.7.2" + +implementation ; Functions: + +<4 x float> %test(<4 x float> %A, <4 x float>* %B) { + %BV = load <4 x float>* %B + %tmp28 = tail call <4 x float> %llvm.x86.sse.sub.ss( <4 x float> %A, <4 x float> %BV) + ret <4 x float> %tmp28 +} + +declare <4 x float> %llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) diff --git a/test/CodeGen/X86/2006-10-09-CycleInDAG.ll b/test/CodeGen/X86/2006-10-09-CycleInDAG.ll new file mode 100644 index 0000000..fbcc5cd --- /dev/null +++ b/test/CodeGen/X86/2006-10-09-CycleInDAG.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +void %_ZN13QFSFileEngine4readEPcx() { + %tmp201 = load int* null + %tmp201 = cast int %tmp201 to long + %tmp202 = load long* null + %tmp203 = add long %tmp201, %tmp202 + store long %tmp203, long* null + ret void +} diff --git a/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll b/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll new file mode 100644 index 0000000..8baba81 --- /dev/null +++ b/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll @@ -0,0 +1,31 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep shrl +; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31 +; is then optimized away. + +%tree_code_type = external global [0 x uint] + +void %copy_if_shared_r() { + %tmp = load uint* null + %tmp56 = and uint %tmp, 255 + %tmp8 = getelementptr [0 x uint]* %tree_code_type, int 0, uint %tmp56 + %tmp9 = load uint* %tmp8 + %tmp10 = add uint %tmp9, 4294967295 + %tmp = setgt uint %tmp10, 2 + %tmp14 = load uint* null + %tmp15 = shr uint %tmp14, ubyte 31 + %tmp15 = cast uint %tmp15 to ubyte + %tmp16 = setne ubyte %tmp15, 0 + br bool %tmp, label %cond_false25, label %cond_true + +cond_true: + br bool %tmp16, label %cond_true17, label %cond_false + +cond_true17: + ret void + +cond_false: + ret void + +cond_false25: + ret void +} diff --git a/test/CodeGen/X86/2006-10-12-CycleInDAG.ll b/test/CodeGen/X86/2006-10-12-CycleInDAG.ll new file mode 100644 index 0000000..b96ec98 --- /dev/null +++ b/test/CodeGen/X86/2006-10-12-CycleInDAG.ll @@ -0,0 +1,41 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + %struct.function = type opaque + %struct.lang_decl = type opaque + %struct.location_t = type { sbyte*, int } + %struct.rtx_def = type opaque + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, ubyte, ubyte, ubyte, ubyte, ubyte } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, uint, %struct.tree_node*, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, uint, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, int, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, long, %struct.lang_decl* } + %struct.tree_decl_u1 = type { long } + %struct.tree_decl_u2 = type { %struct.function* } + %struct.tree_node = type { %struct.tree_decl } + %union.tree_ann_d = type opaque + +void %check_format_arg() { + br bool false, label %cond_next196, label %bb12.preheader + +bb12.preheader: + ret void + +cond_next196: + br bool false, label %cond_next330, label %cond_true304 + +cond_true304: + ret void + +cond_next330: + br bool false, label %cond_next472, label %bb441 + +bb441: + ret void + +cond_next472: + %tmp490 = load %struct.tree_node** null + %tmp492 = getelementptr %struct.tree_node* %tmp490, int 0, uint 0, uint 0, uint 3 + %tmp492 = cast ubyte* %tmp492 to uint* + %tmp493 = load uint* %tmp492 + %tmp495 = cast uint %tmp493 to ubyte + %tmp496 = seteq ubyte %tmp495, 11 + %tmp496 = cast bool %tmp496 to sbyte + store sbyte %tmp496, sbyte* null + ret void +} diff --git a/test/CodeGen/X86/2006-10-13-CycleInDAG.ll b/test/CodeGen/X86/2006-10-13-CycleInDAG.ll new file mode 100644 index 0000000..c2b43fb --- /dev/null +++ b/test/CodeGen/X86/2006-10-13-CycleInDAG.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +%str = external global [18 x sbyte] + +void %test() { +bb.i: + %tmp.i660 = load <4 x float>* null + call void (int, ...)* %printf( int 0, sbyte* getelementptr ([18 x sbyte]* %str, int 0, uint 0), double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) + %tmp152.i = load <4 x uint>* null + %tmp156.i = cast <4 x uint> %tmp152.i to <4 x int> + %tmp175.i = cast <4 x float> %tmp.i660 to <4 x int> + %tmp176.i = xor <4 x int> %tmp156.i, < int -1, int -1, int -1, int -1 > + %tmp177.i = and <4 x int> %tmp176.i, %tmp175.i + %tmp190.i = or <4 x int> %tmp177.i, zeroinitializer + %tmp191.i = cast <4 x int> %tmp190.i to <4 x float> + store <4 x float> %tmp191.i, <4 x float>* null + ret void +} + +declare void %printf(int, ...) diff --git a/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll new file mode 100644 index 0000000..f0be2bb --- /dev/null +++ b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll @@ -0,0 +1,28 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | %prcontext je 1 | \ +; RUN: grep BB1_1: + +%str = internal constant [14 x sbyte] c"Hello world!\0A\00" ; <[14 x sbyte]*> [#uses=1] +%str = internal constant [13 x sbyte] c"Blah world!\0A\00" ; <[13 x sbyte]*> [#uses=1] + +implementation ; Functions: + +int %main(int %argc, sbyte** %argv) { +entry: + switch int %argc, label %UnifiedReturnBlock [ + int 1, label %bb + int 2, label %bb2 + ] + +bb: ; preds = %entry + %tmp1 = tail call int (sbyte*, ...)* %printf( sbyte* getelementptr ([14 x sbyte]* %str, int 0, uint 0) ) ; <int> [#uses=0] + ret int 0 + +bb2: ; preds = %entry + %tmp4 = tail call int (sbyte*, ...)* %printf( sbyte* getelementptr ([13 x sbyte]* %str, int 0, uint 0) ) ; <int> [#uses=0] + ret int 0 + +UnifiedReturnBlock: ; preds = %entry + ret int 0 +} + +declare int %printf(sbyte*, ...) diff --git a/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/test/CodeGen/X86/2006-11-12-CSRetCC.ll new file mode 100644 index 0000000..d65dc18 --- /dev/null +++ b/test/CodeGen/X86/2006-11-12-CSRetCC.ll @@ -0,0 +1,62 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep {subl \$4, %esp} + +target triple = "i686-pc-linux-gnu" + +%str = internal constant [9 x sbyte] c"%f+%f*i\0A\00" ; <[9 x sbyte]*> [#uses=1] + +implementation ; Functions: + +int %main() { +entry: + %retval = alloca int, align 4 ; <int*> [#uses=1] + %tmp = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4] + %tmp1 = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4] + %tmp2 = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=3] + %pi = alloca double, align 8 ; <double*> [#uses=2] + %z = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4] + "alloca point" = cast int 0 to int ; <int> [#uses=0] + store double 0x400921FB54442D18, double* %pi + %tmp = load double* %pi ; <double> [#uses=1] + %real = getelementptr { double, double }* %tmp1, uint 0, uint 0 ; <double*> [#uses=1] + store double 0.000000e+00, double* %real + %real3 = getelementptr { double, double }* %tmp1, uint 0, uint 1 ; <double*> [#uses=1] + store double %tmp, double* %real3 + %tmp = getelementptr { double, double }* %tmp, uint 0, uint 0 ; <double*> [#uses=1] + %tmp4 = getelementptr { double, double }* %tmp1, uint 0, uint 0 ; <double*> [#uses=1] + %tmp5 = load double* %tmp4 ; <double> [#uses=1] + store double %tmp5, double* %tmp + %tmp6 = getelementptr { double, double }* %tmp, uint 0, uint 1 ; <double*> [#uses=1] + %tmp7 = getelementptr { double, double }* %tmp1, uint 0, uint 1 ; <double*> [#uses=1] + %tmp8 = load double* %tmp7 ; <double> [#uses=1] + store double %tmp8, double* %tmp6 + %tmp = cast { double, double }* %tmp to { long, long }* ; <{ long, long }*> [#uses=1] + %tmp = getelementptr { long, long }* %tmp, uint 0, uint 0 ; <long*> [#uses=1] + %tmp = load long* %tmp ; <long> [#uses=1] + %tmp9 = cast { double, double }* %tmp to { long, long }* ; <{ long, long }*> [#uses=1] + %tmp10 = getelementptr { long, long }* %tmp9, uint 0, uint 1 ; <long*> [#uses=1] + %tmp11 = load long* %tmp10 ; <long> [#uses=1] + call csretcc void %cexp( { double, double }* %tmp2, long %tmp, long %tmp11 ) + %tmp12 = getelementptr { double, double }* %z, uint 0, uint 0 ; <double*> [#uses=1] + %tmp13 = getelementptr { double, double }* %tmp2, uint 0, uint 0 ; <double*> [#uses=1] + %tmp14 = load double* %tmp13 ; <double> [#uses=1] + store double %tmp14, double* %tmp12 + %tmp15 = getelementptr { double, double }* %z, uint 0, uint 1 ; <double*> [#uses=1] + %tmp16 = getelementptr { double, double }* %tmp2, uint 0, uint 1 ; <double*> [#uses=1] + %tmp17 = load double* %tmp16 ; <double> [#uses=1] + store double %tmp17, double* %tmp15 + %tmp18 = getelementptr { double, double }* %z, uint 0, uint 1 ; <double*> [#uses=1] + %tmp19 = load double* %tmp18 ; <double> [#uses=1] + %tmp20 = getelementptr { double, double }* %z, uint 0, uint 0 ; <double*> [#uses=1] + %tmp21 = load double* %tmp20 ; <double> [#uses=1] + %tmp = getelementptr [9 x sbyte]* %str, int 0, uint 0 ; <sbyte*> [#uses=1] + %tmp = call int (sbyte*, ...)* %printf( sbyte* %tmp, double %tmp21, double %tmp19 ) ; <int> [#uses=0] + br label %return + +return: ; preds = %entry + %retval = load int* %retval ; <int> [#uses=1] + ret int %retval +} + +declare csretcc void %cexp({ double, double }*, long, long) + +declare int %printf(sbyte*, ...) diff --git a/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/test/CodeGen/X86/2006-11-17-IllegalMove.ll new file mode 100644 index 0000000..141d32c --- /dev/null +++ b/test/CodeGen/X86/2006-11-17-IllegalMove.ll @@ -0,0 +1,42 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 | \ +; RUN: not grep {movb %sil, %ah} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 | \ +; RUN: grep {movzbw %al, %ax} + +void %handle_vector_size_attribute() { +entry: + %tmp69 = load uint* null ; <uint> [#uses=1] + switch uint %tmp69, label %bb84 [ + uint 2, label %bb77 + uint 1, label %bb77 + ] + +bb77: ; preds = %entry, %entry + %tmp99 = udiv ulong 0, 0 ; <ulong> [#uses=1] + %tmp = load ubyte* null ; <ubyte> [#uses=1] + %tmp114 = seteq ulong 0, 0 ; <bool> [#uses=1] + br bool %tmp114, label %cond_true115, label %cond_next136 + +bb84: ; preds = %entry + ret void + +cond_true115: ; preds = %bb77 + %tmp118 = load ubyte* null ; <ubyte> [#uses=1] + br bool false, label %cond_next129, label %cond_true120 + +cond_true120: ; preds = %cond_true115 + %tmp127 = udiv ubyte %tmp, %tmp118 ; <ubyte> [#uses=1] + %tmp127 = cast ubyte %tmp127 to ulong ; <ulong> [#uses=1] + br label %cond_next129 + +cond_next129: ; preds = %cond_true120, %cond_true115 + %iftmp.30.0 = phi ulong [ %tmp127, %cond_true120 ], [ 0, %cond_true115 ] ; <ulong> [#uses=1] + %tmp132 = seteq ulong %iftmp.30.0, %tmp99 ; <bool> [#uses=1] + br bool %tmp132, label %cond_false148, label %cond_next136 + +cond_next136: ; preds = %cond_next129, %bb77 + ret void + +cond_false148: ; preds = %cond_next129 + ret void +} diff --git a/test/CodeGen/X86/2006-11-27-SelectLegalize.ll b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll new file mode 100644 index 0000000..5cebff5 --- /dev/null +++ b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep test.*1 +; PR1016 + +int %test(int %A, int %B, int %C) { + %a = trunc int %A to bool + %D = select bool %a, int %B, int %C + ret int %D +} diff --git a/test/CodeGen/X86/2006-11-28-Memcpy.ll b/test/CodeGen/X86/2006-11-28-Memcpy.ll new file mode 100644 index 0000000..f5a2a8f --- /dev/null +++ b/test/CodeGen/X86/2006-11-28-Memcpy.ll @@ -0,0 +1,35 @@ +; PR1022, PR1023 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep 3721182122 | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep -E {movl _?bytes2} | wc -l | grep 1 + +%fmt = constant [4 x sbyte] c"%x\0A\00" +%bytes = constant [4 x sbyte] c"\AA\BB\CC\DD" +%bytes2 = global [4 x sbyte] c"\AA\BB\CC\DD" + + +int %test1() { + %y = alloca uint + %c = cast uint* %y to sbyte* + %z = getelementptr [4 x sbyte]* %bytes, int 0, int 0 + call void %llvm.memcpy.i32( sbyte* %c, sbyte* %z, uint 4, uint 1 ) + %r = load uint* %y + %t = cast [4 x sbyte]* %fmt to sbyte* + %tmp = call int (sbyte*, ...)* %printf( sbyte* %t, uint %r ) + ret int 0 +} + +void %test2() { + %y = alloca uint + %c = cast uint* %y to sbyte* + %z = getelementptr [4 x sbyte]* %bytes2, int 0, int 0 + call void %llvm.memcpy.i32( sbyte* %c, sbyte* %z, uint 4, uint 1 ) + %r = load uint* %y + %t = cast [4 x sbyte]* %fmt to sbyte* + %tmp = call int (sbyte*, ...)* %printf( sbyte* %t, uint %r ) + ret void +} + +declare void %llvm.memcpy.i32(sbyte*, sbyte*, uint, uint) +declare int %printf(sbyte*, ...) diff --git a/test/CodeGen/X86/2006-12-19-IntelSyntax.ll b/test/CodeGen/X86/2006-12-19-IntelSyntax.ll new file mode 100644 index 0000000..6985bd0 --- /dev/null +++ b/test/CodeGen/X86/2006-12-19-IntelSyntax.ll @@ -0,0 +1,91 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel +; PR1061 + +target datalayout = "e-p:32:32" +target endian = little +target pointersize = 32 +target triple = "i686-pc-linux-gnu" + +implementation ; Functions: + +void %bar(uint %n) { +entry: + switch uint %n, label %bb12 [ + uint 1, label %bb + uint 2, label %bb6 + uint 4, label %bb7 + uint 5, label %bb8 + uint 6, label %bb10 + uint 7, label %bb1 + uint 8, label %bb3 + uint 9, label %bb4 + uint 10, label %bb9 + uint 11, label %bb2 + uint 12, label %bb5 + uint 13, label %bb11 + ] + +bb: ; preds = %entry + call void (...)* %foo1( ) + ret void + +bb1: ; preds = %entry + call void (...)* %foo2( ) + ret void + +bb2: ; preds = %entry + call void (...)* %foo6( ) + ret void + +bb3: ; preds = %entry + call void (...)* %foo3( ) + ret void + +bb4: ; preds = %entry + call void (...)* %foo4( ) + ret void + +bb5: ; preds = %entry + call void (...)* %foo5( ) + ret void + +bb6: ; preds = %entry + call void (...)* %foo1( ) + ret void + +bb7: ; preds = %entry + call void (...)* %foo2( ) + ret void + +bb8: ; preds = %entry + call void (...)* %foo6( ) + ret void + +bb9: ; preds = %entry + call void (...)* %foo3( ) + ret void + +bb10: ; preds = %entry + call void (...)* %foo4( ) + ret void + +bb11: ; preds = %entry + call void (...)* %foo5( ) + ret void + +bb12: ; preds = %entry + call void (...)* %foo6( ) + ret void +} + +declare void %foo1(...) + +declare void %foo2(...) + +declare void %foo6(...) + +declare void %foo3(...) + +declare void %foo4(...) + +declare void %foo5(...) diff --git a/test/CodeGen/X86/2007-01-08-InstrSched.ll b/test/CodeGen/X86/2007-01-08-InstrSched.ll new file mode 100644 index 0000000..a0edd95 --- /dev/null +++ b/test/CodeGen/X86/2007-01-08-InstrSched.ll @@ -0,0 +1,14 @@ +; PR1075 +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | \ +; RUN: %prcontext {mulss LCPI1_3} 1 | grep mulss | wc -l | grep 1 + +define float @foo(float %x) { + %tmp1 = mul float %x, 3.000000e+00 + %tmp3 = mul float %x, 5.000000e+00 + %tmp5 = mul float %x, 7.000000e+00 + %tmp7 = mul float %x, 1.100000e+01 + %tmp10 = add float %tmp1, %tmp3 + %tmp12 = add float %tmp10, %tmp5 + %tmp14 = add float %tmp12, %tmp7 + ret float %tmp14 +} diff --git a/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll new file mode 100644 index 0000000..7e77cce --- /dev/null +++ b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll @@ -0,0 +1,461 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -pre-RA-sched=none | grep leaq +; RUN: llvm-as < %s | llc -march=x86-64 -pre-RA-sched=none | not grep {,%rsp)} +; PR1103 + +target datalayout = "e-p:64:64" +@i6000 = global [128 x i64] zeroinitializer, align 16 + + +define void @foo(i32* %a0, i32* %a1, i32* %a2, i32* %a3, i32* %a4, i32* %a5) { +b: + %r = load i32* %a0 + %r2 = load i32* %a1 + %r4 = load i32* %a2 + %r6 = load i32* %a3 + %r8 = load i32* %a4 + %r14 = load i32* %a5 + %rx = sext i32 %r2 to i64 + %r9 = sext i32 %r to i64 + %r11 = add i64 %rx, 0 + %ras = icmp slt i64 %r11, 0 + %r12 = select i1 %ras, i64 0, i64 %r11 + %r16 = sext i32 %r14 to i64 + %r17 = sext i32 %r8 to i64 + %r18 = sub i64 %r16, 0 + %r19 = add i64 %r18, 0 + %r20 = icmp slt i64 %r19, 0 + %r19h = add i64 %r18, 0 + %r22 = select i1 %r20, i64 1, i64 %r19h + %r23 = mul i64 %r22, 0 + %r23a = trunc i64 %r23 to i32 + %r24 = shl i32 %r23a, 0 + %r25 = add i32 %r24, 0 + %ras2 = alloca i8, i32 %r25, align 16 + %r28 = getelementptr i8* %ras2, i32 0 + %r38 = shl i64 %r12, 0 + %s2013 = add i64 %r38, 0 + %c22012 = getelementptr i8* %ras2, i64 %s2013 + %r42 = shl i64 %r12, 0 + %s2011 = add i64 %r42, 16 + %c22010 = getelementptr i8* %ras2, i64 %s2011 + %r50 = add i64 %r16, 0 + %r51 = icmp slt i64 %r50, 0 + %r50sh = shl i64 %r50, 0 + %r50j = add i64 %r50sh, 0 + %r54 = select i1 %r51, i64 0, i64 %r50j + %r56 = mul i64 %r54, %r12 + %r28s = add i64 %r56, 16 + %c2 = getelementptr i8* %ras2, i64 %r28s + %r60 = sub i32 %r2, %r + %r61 = icmp slt i32 %r60, 0 + br i1 %r61, label %a29b, label %b63 +a29b: + %r155 = sub i32 %r6, %r4 + %r156 = icmp slt i32 %r155, 0 + br i1 %r156, label %a109b, label %b158 +b63: + %r66 = sext i32 %r60 to i64 + %r67 = add i64 %r66, 0 + %r76 = mul i64 %r17, 0 + %r82 = add i64 %r76, 0 + %r84 = icmp slt i64 %r67, 0 + br i1 %r84, label %b85, label %a25b +b85: + %e641 = phi i64 [ 0, %b63 ], [ %r129, %a25b ] + %r137 = icmp slt i64 %e641, 0 + br i1 %r137, label %a25b140q, label %a29b +a25b140q: + br label %a25b140 +a25b: + %w1989 = phi i64 [ 0, %b63 ], [ %v1990, %a25b ] + %e642 = shl i64 %w1989, 0 + %r129 = add i64 %e642, 0 + %r132 = add i64 %e642, 0 + %r134 = icmp slt i64 %r132, 0 + %v1990 = add i64 %w1989, 0 + br i1 %r134, label %b85, label %a25b +a25b140: + %w1982 = phi i64 [ 0, %a25b140q ], [ %v1983, %a25b140 ] + %r145 = add i64 %r82, 0 + %v1983 = add i64 %w1982, 0 + %u1987 = icmp slt i64 %v1983, 0 + br i1 %u1987, label %a29b, label %a25b140 +b158: + %r161 = sext i32 %r to i64 + %r163 = sext i32 %r4 to i64 + br label %a29b173 +a29b173: + %w1964 = phi i64 [ 0, %b158 ], [ %v1973, %b1606 ] + %b1974 = mul i64 %r163, 0 + %b1975 = add i64 %r161, 0 + %b1976 = mul i64 %w1964, 0 + %b1977 = add i64 %b1976, 0 + %s761 = bitcast i64 %b1977 to i64 + %b1980 = mul i64 %w1964, 0 + %s661 = add i64 %b1980, 0 + br i1 %r61, label %a33b, label %b179 +a33b: + %r328 = icmp slt i32 %r14, 0 + %r335 = or i1 %r328, %r61 + br i1 %r335, label %a50b, label %b341 +b179: + %r182 = sext i32 %r60 to i64 + %r183 = add i64 %r182, 0 + %r187 = icmp slt i64 %r183, 0 + br i1 %r187, label %b188, label %a30b +b188: + %e653 = phi i64 [ 0, %b179 ], [ %r283, %a30b ] + %r291 = icmp slt i64 %e653, 0 + br i1 %r291, label %a30b294q, label %a33b +a30b294q: + br label %a30b294 +a30b: + %w = phi i64 [ 0, %b179 ], [ %v, %a30b ] + %b2 = shl i64 %w, 0 + %r283 = add i64 %b2, 0 + %r286 = add i64 %b2, 0 + %r288 = icmp slt i64 %r286, 0 + %v = add i64 %w, 0 + br i1 %r288, label %b188, label %a30b +a30b294: + %w1847 = phi i64 [ 0, %a30b294q ], [ %v1848, %a30b294 ] + %v1848 = add i64 %w1847, 0 + %u = icmp slt i64 %v1848, 0 + br i1 %u, label %a33b, label %a30b294 +a50b: + %r814 = add i32 %r14, 0 + %r815 = icmp slt i32 %r814, 0 + %r817 = or i1 %r61, %r815 + br i1 %r817, label %a57b, label %b820 +b341: + %w1874 = phi i64 [ 0, %a33b ], [ %v1880, %b463 ] + %d753 = bitcast i64 %w1874 to i64 + %r343 = add i64 %s661, 0 + %r346 = add i64 %r343, 0 + %r347 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r346 + %r348 = load float* %r347 + %r352 = add i64 %r343, 0 + %r353 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r352 + %r354 = load float* %r353 + %r362 = load float* bitcast ([128 x i64]* @i6000 to float*) + %r363 = add float 0.000000e+00, %r362 + %r370 = load float* bitcast ([128 x i64]* @i6000 to float*) + %r376 = icmp slt i64 %r16, 0 + br i1 %r376, label %b377, label %a35b +b377: + %d753p = phi i64 [ %d753, %b341 ], [ %r411, %a35b ] + %s761p = phi i64 [ %s761, %b341 ], [ 322, %a35b ] + %e784 = phi i64 [ 0, %b341 ], [ %r454, %a35b ] + %s794 = add i64 %d753p, 0 + %r462 = icmp slt i64 %e784, 0 + br i1 %r462, label %a35b465, label %b463 +a35b: + %w1865 = phi i64 [ 0, %b341 ], [ %v1866, %a35b ] + %e785 = shl i64 %w1865, 0 + %b1877 = mul i64 %w1865, 0 + %s795 = add i64 %b1877, 0 + %r399 = add float %r354, 0.000000e+00 + %r402 = add float %r370, 0.000000e+00 + %r403 = add float %r348, 0.000000e+00 + %r411 = add i64 %s795, 0 + %r431 = add float %r362, 0.000000e+00 + %r454 = add i64 %e785, 0 + %r457 = add i64 %e785, 0 + %r459 = icmp slt i64 %r457, 0 + %v1866 = add i64 %w1865, 0 + br i1 %r459, label %b377, label %a35b +b463: + %r506 = add i64 %d753, 0 + %r511 = sext i32 %r60 to i64 + %r512 = add i64 %r511, 0 + %r513 = icmp slt i64 %r506, 0 + %v1880 = add i64 %w1874, 0 + br i1 %r513, label %b341, label %b514 +a35b465: + %r469 = add i64 %s794, 0 + br label %b463 +b514: + %r525 = mul i64 %r17, 0 + %r533 = add i64 %r525, 0 + br label %b535 +b535: + %w1855 = phi i64 [ 0, %b514 ], [ %v1856, %b712 ] + %s923 = phi i64 [ 0, %b514 ], [ %r799, %b712 ] + %s933 = phi i64 [ %r533, %b514 ], [ %r795, %b712 ] + %r538 = add i64 %w1855, 0 + %r539 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r538 + %r540 = load float* %r539 + %r551 = load float* bitcast ([128 x i64]* @i6000 to float*) + %r562 = sub i64 %s933, 0 + %r564 = icmp slt i64 %r512, 0 + br i1 %r564, label %b565, label %a45b +b565: + %e944 = phi i64 [ 0, %b535 ], [ %r703, %a45b ] + %r711 = icmp slt i64 %e944, 0 + br i1 %r711, label %a45b714, label %b712 +a45b: + %w1852 = phi i64 [ 0, %b535 ], [ %v1853, %a45b ] + %e945 = shl i64 %w1852, 0 + %r609 = add i64 %r562, 0 + %r703 = add i64 %e945, 0 + %r706 = add i64 %e945, 0 + %r708 = icmp slt i64 %r706, 0 + %v1853 = add i64 %w1852, 0 + br i1 %r708, label %b565, label %a45b +b712: + %r795 = add i64 %rx, 0 + %r799 = add i64 %s923, 0 + %r802 = add i64 %w1855, 0 + %r807 = icmp slt i64 %r802, 0 + %v1856 = add i64 %w1855, 0 + br i1 %r807, label %b535, label %a50b +a45b714: + %r717 = add i64 %e944, 0 + %r720 = add i64 %r717, 0 + %r721 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r720 + %r722 = load float* %r721 + %r726 = add i64 %r717, 0 + %r727 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r726 + %r728 = load float* %r727 + %r732 = add i64 %r717, 0 + %r733 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r732 + %r734 = load float* %r733 + %r738 = add i64 %r717, 0 + %r739 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r738 + %r740 = load float* %r739 + %r744 = add i64 %r717, 0 + %r745 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r744 + %r746 = load float* %r745 + %r750 = add i64 %r717, 0 + %r751 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r750 + %r752 = load float* %r751 + %r753 = add float %r752, %r746 + %r754 = add float %r728, %r722 + %r755 = add float %r734, %r754 + %r756 = add float %r755, %r740 + %r757 = add float %r753, %r756 + %r759 = add float %r757, %r540 + %r770 = add i64 %r717, 0 + %r771 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r770 + %r772 = load float* %r771 + %r776 = add i64 %r717, 0 + %r777 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r776 + %r778 = load float* %r777 + %r781 = add float %r363, %r772 + %r782 = add float %r781, %r778 + %r783 = add float %r551, %r782 + br label %b712 +a57b: + br i1 %r335, label %a66b, label %b1086 +b820: + %r823 = sext i32 %r2 to i64 + %r834 = sext i32 %r8 to i64 + %r844 = add i64 %r16, 0 + %r846 = sext i32 %r60 to i64 + %r847 = add i64 %r846, 0 + %r851 = load float* bitcast ([128 x i64]* @i6000 to float*) + %r856 = sub i64 %rx, 0 + br label %b858 +b858: + %w1891 = phi i64 [ 0, %b820 ], [ %v1892, %b1016 ] + %s1193 = phi i64 [ 0, %b820 ], [ %r1068, %b1016 ] + %b1894 = mul i64 %r834, 0 + %b1896 = shl i64 %r823, 0 + %b1902 = mul i64 %w1891, 0 + %s1173 = add i64 %b1902, 0 + %r859 = add i64 %r856, 0 + %r862 = add i64 %w1891, 0 + %r863 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r862 + %r864 = load float* %r863 + %r868 = add i64 %w1891, 0 + %r869 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r868 + %r870 = load float* %r869 + %r873 = sub i64 %r859, 0 + %r876 = sub i64 %s1173, 0 + %r878 = icmp slt i64 %r847, 0 + br i1 %r878, label %b879, label %a53b +b879: + %e1204 = phi i64 [ 0, %b858 ], [ %r1007, %a53b ] + %r1015 = icmp slt i64 %e1204, 0 + br i1 %r1015, label %a53b1019q, label %b1016 +a53b1019q: + %b1888 = sub i64 %r846, 0 + %b1889 = add i64 %b1888, 0 + br label %a53b1019 +a53b: + %w1881 = phi i64 [ 0, %b858 ], [ %v1882, %a53b ] + %e1205 = shl i64 %w1881, 0 + %r1007 = add i64 %e1205, 0 + %r1010 = add i64 %e1205, 0 + %r1012 = icmp slt i64 %r1010, 0 + %v1882 = add i64 %w1881, 0 + br i1 %r1012, label %b879, label %a53b +b1016: + %r1068 = add i64 %s1193, 0 + %r1071 = add i64 %w1891, 0 + %r1073 = icmp slt i64 %r1071, %r844 + %v1892 = add i64 %w1891, 0 + br i1 %r1073, label %b858, label %a57b +a53b1019: + %w1885 = phi i64 [ 0, %a53b1019q ], [ %v1886, %a53b1019 ] + %r1022 = add i64 %r876, 0 + %r1024 = bitcast i8* %c2 to float* + %r1025 = add i64 %r1022, 0 + %r1026 = getelementptr float* %r1024, i64 %r1025 + %r1027 = load float* %r1026 + %r1032 = add i64 %r873, 0 + %r1033 = add i64 %r1032, 0 + %r1034 = getelementptr float* %r1024, i64 %r1033 + %r1035 = load float* %r1034 + %r1037 = bitcast i8* %c22010 to float* + %r1040 = getelementptr float* %r1037, i64 %r1025 + %r1044 = add float %r864, %r1035 + %r1046 = add float %r870, %r1027 + %r1047 = add float %r1044, %r1046 + %r1048 = add float %r851, %r1047 + %v1886 = add i64 %w1885, 0 + %u1890 = icmp slt i64 %v1886, %b1889 + br i1 %u1890, label %b1016, label %a53b1019 +a66b: + br i1 %r817, label %a93b, label %b1321 +b1086: + %r1089 = sext i32 %r2 to i64 + %r1090 = add i64 %rx, 0 + %r1096 = mul i64 %r9, 0 + %r1101 = sext i32 %r8 to i64 + %r1104 = add i64 %r1096, 0 + %r1108 = sub i64 %r1104, 0 + %r1110 = sext i32 %r60 to i64 + %r1111 = add i64 %r1110, 0 + %r1113 = sext i32 %r14 to i64 + %r1114 = add i64 %r16, 0 + br label %b1117 +b1117: + %w1915 = phi i64 [ 0, %b1086 ], [ %v1957, %b1263 ] + %d1353 = bitcast i64 %w1915 to i64 + %r1120 = add i64 %s661, 0 + %r1121 = add i64 %r1120, 0 + %r1122 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1121 + %r1123 = load float* %r1122 + %r1132 = bitcast i8* %c22012 to float* + %r1134 = getelementptr float* %r1132, i64 %w1915 + %r1135 = load float* %r1134 + %r1136 = add float %r1123, %r1135 + %r1138 = icmp slt i64 %r1114, 0 + br i1 %r1138, label %b1139, label %a63b +b1139: + %e1364 = phi i64 [ 0, %b1117 ], [ %r1254, %a63b ] + %p1998 = phi i64 [ %s761, %b1117 ], [ %r1216, %a63b ] + %r1108p = phi i64 [ %r1108, %b1117 ], [ %r1219, %a63b ] + %p2004 = phi i64 [ %d1353, %b1117 ], [ %r1090, %a63b ] + %s1374 = phi i64 [ 0, %b1117 ], [ %r1251, %a63b ] + %s1384 = add i64 %r1108p, 0 + %s1394 = add i64 %p1998, 0 + %r1262 = icmp slt i64 %e1364, %r1114 + br i1 %r1262, label %a63b1266q, label %b1263 +a63b1266q: + %b1947 = sub i64 %r1113, 0 + %b1948 = add i64 %b1947, 0 + br label %a63b1266 +a63b: + %w1904 = phi i64 [ 0, %b1117 ], [ %v1905, %a63b ] + %s1375 = phi i64 [ 0, %b1117 ], [ %r1251, %a63b ] + %b1906 = add i64 %r1089, 0 + %b1907 = mul i64 %r1101, 0 + %b1929 = mul i64 %w1904, 0 + %s1395 = add i64 %b1929, 0 + %e1365 = shl i64 %w1904, 0 + %r1163 = add i64 %r1090, 0 + %r1167 = add i64 %s1375, 0 + %r1191 = add i64 %r1163, 0 + %r1195 = add i64 %r1167, 0 + %r1216 = add i64 %s1395, 0 + %r1219 = add i64 %r1191, 0 + %r1223 = add i64 %r1195, 0 + %r1251 = add i64 %r1223, 0 + %r1254 = add i64 %e1365, 0 + %r1257 = add i64 %e1365, 0 + %r1259 = icmp slt i64 %r1257, %r1114 + %v1905 = add i64 %w1904, 0 + br i1 %r1259, label %b1139, label %a63b +b1263: + %r1306 = add i64 %d1353, 0 + %r1308 = icmp slt i64 %r1306, %r1111 + %v1957 = add i64 %w1915, 0 + br i1 %r1308, label %b1117, label %a66b +a63b1266: + %w1944 = phi i64 [ 0, %a63b1266q ], [ %v1945, %a63b1266 ] + %s1377 = phi i64 [ %s1374, %a63b1266q ], [ %r1297, %a63b1266 ] + %r1282 = add float %r1136, 0.000000e+00 + %r1297 = add i64 %s1377, 0 + %v1945 = add i64 %w1944, 0 + %u1949 = icmp slt i64 %v1945, %b1948 + br i1 %u1949, label %b1263, label %a63b1266 +a93b: + br i1 %r61, label %b1606, label %a97b +b1321: + %r1331 = mul i64 %r17, 0 + %r1339 = add i64 %r1331, 0 + br label %b1342 +b1342: + %w1960 = phi i64 [ 0, %b1321 ], [ %v1961, %b1582 ] + %s1523 = phi i64 [ %r1339, %b1321 ], [ %r1587, %b1582 ] + %s1563 = phi i64 [ 0, %b1321 ], [ %r1591, %b1582 ] + %d1533 = bitcast i64 %w1960 to i64 + %b1968 = mul i64 %w1960, 0 + %s1543 = add i64 %b1968, 0 + %r1345 = add i64 %s1523, 0 + %r1348 = sub i64 %r1345, 0 + %r1352 = add i64 %s1523, 0 + %r1355 = sub i64 %r1352, 0 + %r1370 = add i64 %d1533, 0 + %r1371 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1370 + %r1372 = load float* %r1371 + br label %a74b +a74b: + %w1958 = phi i64 [ 0, %b1342 ], [ %v1959, %a74b ] + %r1379 = add i64 %s1543, 0 + %r1403 = add i64 %r1355, 0 + %r1422 = add i64 %r1348, 0 + %r1526 = add float %r1372, 0.000000e+00 + %r1573 = add i64 %w1958, 0 + %r1581 = icmp slt i64 %r1573, 0 + %v1959 = add i64 %w1958, 0 + br i1 %r1581, label %a74b, label %b1582 +b1582: + %r1587 = add i64 %rx, 0 + %r1591 = add i64 %s1563, 0 + %r1596 = add i64 %d1533, 0 + %r1601 = icmp slt i64 %r1596, 0 + %v1961 = add i64 %w1960, 0 + br i1 %r1601, label %b1342, label %a93b +b1606: + %r1833 = add i64 %w1964, 0 + %r1840 = icmp slt i64 %r1833, 0 + %v1973 = add i64 %w1964, 0 + br i1 %r1840, label %a29b173, label %a109b +a97b: + %w1970 = phi i64 [ 0, %a93b ], [ %v1971, %a97b ] + %r1613 = add i64 %w1964, 0 + %r1614 = mul i64 %r1613, 0 + %r1622 = add i64 %r1614, 0 + %r1754 = bitcast i8* %r28 to float* + %r1756 = getelementptr float* %r1754, i64 %w1970 + %r1757 = load float* %r1756 + %r1761 = add i64 %r1622, 0 + %r1762 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1761 + %r1763 = load float* %r1762 + %r1767 = add i64 %r1622, 0 + %r1768 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1767 + %r1772 = add float %r1763, 0.000000e+00 + %r1773 = add float %r1772, 0.000000e+00 + %r1809 = add float %r1757, 0.000000e+00 + %r1810 = add float %r1773, %r1809 + store float %r1810, float* %r1768 + %r1818 = add i64 %w1970, 0 + %r1826 = icmp slt i64 %r1818, 0 + %v1971 = add i64 %w1970, 0 + br i1 %r1826, label %a97b, label %b1606 +a109b: + ret void +} diff --git a/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll b/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll new file mode 100644 index 0000000..b1c86f4 --- /dev/null +++ b/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 +; Test 'ri' constraint. + +define void @run_init_process() { + %tmp = call i32 asm sideeffect "push %ebx ; movl $2,%ebx ; int $$0x80 ; pop %ebx", "={ax},0,ri,{cx},{dx},~{dirflag},~{fpsr},~{flags},~{memory}"( i32 11, i32 0, i32 0, i32 0 ) + unreachable + } diff --git a/test/CodeGen/X86/2007-02-04-OrAddrMode.ll b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll new file mode 100644 index 0000000..cadba5b --- /dev/null +++ b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {orl \$1, %eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {leal 3(,%eax,8)} + +;; This example can't fold the or into an LEA. +define i32 @test(float ** %tmp2, i32 %tmp12) { + %tmp3 = load float** %tmp2 + %tmp132 = shl i32 %tmp12, 2 ; <i32> [#uses=1] + %tmp4 = bitcast float* %tmp3 to i8* ; <i8*> [#uses=1] + %ctg2 = getelementptr i8* %tmp4, i32 %tmp132 ; <i8*> [#uses=1] + %tmp6 = ptrtoint i8* %ctg2 to i32 ; <i32> [#uses=1] + %tmp14 = or i32 %tmp6, 1 ; <i32> [#uses=1] + ret i32 %tmp14 +} + + +;; This can! +define i32 @test2(i32 %a, i32 %b) { + %c = shl i32 %a, 3 + %d = or i32 %c, 3 + ret i32 %d +} diff --git a/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll new file mode 100644 index 0000000..365768a --- /dev/null +++ b/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu -relocation-model=pic +; PR1027 + + %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } + %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 } +@stderr = external global %struct._IO_FILE* + +define void @__eprintf(i8* %string, i8* %expression, i32 %line, i8* %filename) { + %tmp = load %struct._IO_FILE** @stderr + %tmp5 = tail call i32 (%struct._IO_FILE*, i8*, ...)* @fprintf( %struct._IO_FILE* %tmp, i8* %string, i8* %expression, i32 %line, i8* %filename ) + %tmp6 = load %struct._IO_FILE** @stderr + %tmp7 = tail call i32 @fflush( %struct._IO_FILE* %tmp6 ) + tail call void @abort( ) + unreachable +} + +declare i32 @fprintf(%struct._IO_FILE*, i8*, ...) + +declare i32 @fflush(%struct._IO_FILE*) + +declare void @abort() diff --git a/test/CodeGen/X86/2007-02-25-FastCCStack.ll b/test/CodeGen/X86/2007-02-25-FastCCStack.ll new file mode 100644 index 0000000..3b1eb1f --- /dev/null +++ b/test/CodeGen/X86/2007-02-25-FastCCStack.ll @@ -0,0 +1,5 @@ +; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium3 + +define internal fastcc double @ggc_rlimit_bound(double %limit) { + ret double %limit +} diff --git a/test/CodeGen/X86/2007-03-01-SpillerCrash.ll b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll new file mode 100644 index 0000000..2d11bfb1 --- /dev/null +++ b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll @@ -0,0 +1,85 @@ +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin8 -mattr=+sse2 + +define void @test() { +test.exit: + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:0 [#uses=4] + load <4 x float>* null ; <<4 x float>>:1 [#uses=1] + shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:2 [#uses=1] + mul <4 x float> %0, %2 ; <<4 x float>>:3 [#uses=1] + sub <4 x float> zeroinitializer, %3 ; <<4 x float>>:4 [#uses=1] + mul <4 x float> %4, zeroinitializer ; <<4 x float>>:5 [#uses=2] + bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:6 [#uses=1] + and <4 x i32> %6, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>>:7 [#uses=1] + bitcast <4 x i32> %7 to <4 x float> ; <<4 x float>>:8 [#uses=2] + extractelement <4 x float> %8, i32 0 ; <float>:9 [#uses=1] + extractelement <4 x float> %8, i32 1 ; <float>:10 [#uses=2] + br i1 false, label %11, label %19 + +; <label>:11 ; preds = %test.exit + br i1 false, label %17, label %12 + +; <label>:12 ; preds = %11 + br i1 false, label %19, label %13 + +; <label>:13 ; preds = %12 + sub float -0.000000e+00, 0.000000e+00 ; <float>:14 [#uses=1] + %tmp207 = extractelement <4 x float> zeroinitializer, i32 0 ; <float> [#uses=1] + %tmp208 = extractelement <4 x float> zeroinitializer, i32 2 ; <float> [#uses=1] + sub float -0.000000e+00, %tmp208 ; <float>:15 [#uses=1] + %tmp155 = extractelement <4 x float> zeroinitializer, i32 0 ; <float> [#uses=1] + %tmp156 = extractelement <4 x float> zeroinitializer, i32 2 ; <float> [#uses=1] + sub float -0.000000e+00, %tmp156 ; <float>:16 [#uses=1] + br label %19 + +; <label>:17 ; preds = %11 + br i1 false, label %19, label %18 + +; <label>:18 ; preds = %17 + br label %19 + +; <label>:19 ; preds = %18, %17, %13, %12, %test.exit + phi i32 [ 5, %18 ], [ 3, %13 ], [ 1, %test.exit ], [ 2, %12 ], [ 4, %17 ] ; <i32>:20 [#uses=0] + phi float [ 0.000000e+00, %18 ], [ %16, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:21 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ %tmp155, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:22 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ %15, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:23 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ %tmp207, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:24 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ %10, %13 ], [ %9, %test.exit ], [ %10, %12 ], [ 0.000000e+00, %17 ] ; <float>:25 [#uses=2] + phi float [ 0.000000e+00, %18 ], [ %14, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:26 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ 0.000000e+00, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:27 [#uses=1] + insertelement <4 x float> undef, float %27, i32 0 ; <<4 x float>>:28 [#uses=1] + insertelement <4 x float> %28, float %26, i32 1 ; <<4 x float>>:29 [#uses=0] + insertelement <4 x float> undef, float %24, i32 0 ; <<4 x float>>:30 [#uses=1] + insertelement <4 x float> %30, float %23, i32 1 ; <<4 x float>>:31 [#uses=1] + insertelement <4 x float> %31, float %25, i32 2 ; <<4 x float>>:32 [#uses=1] + insertelement <4 x float> %32, float %25, i32 3 ; <<4 x float>>:33 [#uses=1] + fdiv <4 x float> %33, zeroinitializer ; <<4 x float>>:34 [#uses=1] + mul <4 x float> %34, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 > ; <<4 x float>>:35 [#uses=1] + insertelement <4 x float> undef, float %22, i32 0 ; <<4 x float>>:36 [#uses=1] + insertelement <4 x float> %36, float %21, i32 1 ; <<4 x float>>:37 [#uses=0] + br i1 false, label %foo.exit, label %38 + +; <label>:38 ; preds = %19 + extractelement <4 x float> %0, i32 0 ; <float>:39 [#uses=1] + fcmp ogt float %39, 0.000000e+00 ; <i1>:40 [#uses=1] + extractelement <4 x float> %0, i32 2 ; <float>:41 [#uses=1] + extractelement <4 x float> %0, i32 1 ; <float>:42 [#uses=1] + sub float -0.000000e+00, %42 ; <float>:43 [#uses=2] + %tmp189 = extractelement <4 x float> %5, i32 2 ; <float> [#uses=1] + br i1 %40, label %44, label %46 + +; <label>:44 ; preds = %38 + sub float -0.000000e+00, %tmp189 ; <float>:45 [#uses=0] + br label %foo.exit + +; <label>:46 ; preds = %38 + %tmp192 = extractelement <4 x float> %5, i32 1 ; <float> [#uses=1] + sub float -0.000000e+00, %tmp192 ; <float>:47 [#uses=1] + br label %foo.exit + +foo.exit: ; preds = %46, %44, %19 + phi float [ 0.000000e+00, %44 ], [ %47, %46 ], [ 0.000000e+00, %19 ] ; <float>:48 [#uses=0] + phi float [ %43, %44 ], [ %43, %46 ], [ 0.000000e+00, %19 ] ; <float>:49 [#uses=0] + phi float [ 0.000000e+00, %44 ], [ %41, %46 ], [ 0.000000e+00, %19 ] ; <float>:50 [#uses=0] + shufflevector <4 x float> %35, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>>:51 [#uses=0] + unreachable +} diff --git a/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll b/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll new file mode 100644 index 0000000..4083a24 --- /dev/null +++ b/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll @@ -0,0 +1,73 @@ +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-darwin | \ +; RUN: grep push | wc -l | grep 3 + +define void @foo(i8** %buf, i32 %size, i32 %col, i8* %p) { +entry: + icmp sgt i32 %size, 0 ; <i1>:0 [#uses=1] + br i1 %0, label %bb.preheader, label %return + +bb.preheader: ; preds = %entry + %tmp5.sum72 = add i32 %col, 7 ; <i32> [#uses=1] + %tmp5.sum71 = add i32 %col, 5 ; <i32> [#uses=1] + %tmp5.sum70 = add i32 %col, 3 ; <i32> [#uses=1] + %tmp5.sum69 = add i32 %col, 2 ; <i32> [#uses=1] + %tmp5.sum68 = add i32 %col, 1 ; <i32> [#uses=1] + %tmp5.sum66 = add i32 %col, 4 ; <i32> [#uses=1] + %tmp5.sum = add i32 %col, 6 ; <i32> [#uses=1] + br label %bb + +bb: ; preds = %bb, %bb.preheader + %i.073.0 = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb ] ; <i32> [#uses=3] + %p_addr.076.0.rec = mul i32 %i.073.0, 9 ; <i32> [#uses=9] + %p_addr.076.0 = getelementptr i8* %p, i32 %p_addr.076.0.rec ; <i8*> [#uses=1] + %tmp2 = getelementptr i8** %buf, i32 %i.073.0 ; <i8**> [#uses=1] + %tmp3 = load i8** %tmp2 ; <i8*> [#uses=8] + %tmp5 = getelementptr i8* %tmp3, i32 %col ; <i8*> [#uses=1] + %tmp7 = load i8* %p_addr.076.0 ; <i8> [#uses=1] + store i8 %tmp7, i8* %tmp5 + %p_addr.076.0.sum93 = add i32 %p_addr.076.0.rec, 1 ; <i32> [#uses=1] + %tmp11 = getelementptr i8* %p, i32 %p_addr.076.0.sum93 ; <i8*> [#uses=1] + %tmp13 = load i8* %tmp11 ; <i8> [#uses=1] + %tmp15 = getelementptr i8* %tmp3, i32 %tmp5.sum72 ; <i8*> [#uses=1] + store i8 %tmp13, i8* %tmp15 + %p_addr.076.0.sum92 = add i32 %p_addr.076.0.rec, 2 ; <i32> [#uses=1] + %tmp17 = getelementptr i8* %p, i32 %p_addr.076.0.sum92 ; <i8*> [#uses=1] + %tmp19 = load i8* %tmp17 ; <i8> [#uses=1] + %tmp21 = getelementptr i8* %tmp3, i32 %tmp5.sum71 ; <i8*> [#uses=1] + store i8 %tmp19, i8* %tmp21 + %p_addr.076.0.sum91 = add i32 %p_addr.076.0.rec, 3 ; <i32> [#uses=1] + %tmp23 = getelementptr i8* %p, i32 %p_addr.076.0.sum91 ; <i8*> [#uses=1] + %tmp25 = load i8* %tmp23 ; <i8> [#uses=1] + %tmp27 = getelementptr i8* %tmp3, i32 %tmp5.sum70 ; <i8*> [#uses=1] + store i8 %tmp25, i8* %tmp27 + %p_addr.076.0.sum90 = add i32 %p_addr.076.0.rec, 4 ; <i32> [#uses=1] + %tmp29 = getelementptr i8* %p, i32 %p_addr.076.0.sum90 ; <i8*> [#uses=1] + %tmp31 = load i8* %tmp29 ; <i8> [#uses=1] + %tmp33 = getelementptr i8* %tmp3, i32 %tmp5.sum69 ; <i8*> [#uses=2] + store i8 %tmp31, i8* %tmp33 + %p_addr.076.0.sum89 = add i32 %p_addr.076.0.rec, 5 ; <i32> [#uses=1] + %tmp35 = getelementptr i8* %p, i32 %p_addr.076.0.sum89 ; <i8*> [#uses=1] + %tmp37 = load i8* %tmp35 ; <i8> [#uses=1] + %tmp39 = getelementptr i8* %tmp3, i32 %tmp5.sum68 ; <i8*> [#uses=1] + store i8 %tmp37, i8* %tmp39 + %p_addr.076.0.sum88 = add i32 %p_addr.076.0.rec, 6 ; <i32> [#uses=1] + %tmp41 = getelementptr i8* %p, i32 %p_addr.076.0.sum88 ; <i8*> [#uses=1] + %tmp43 = load i8* %tmp41 ; <i8> [#uses=1] + store i8 %tmp43, i8* %tmp33 + %p_addr.076.0.sum87 = add i32 %p_addr.076.0.rec, 7 ; <i32> [#uses=1] + %tmp47 = getelementptr i8* %p, i32 %p_addr.076.0.sum87 ; <i8*> [#uses=1] + %tmp49 = load i8* %tmp47 ; <i8> [#uses=1] + %tmp51 = getelementptr i8* %tmp3, i32 %tmp5.sum66 ; <i8*> [#uses=1] + store i8 %tmp49, i8* %tmp51 + %p_addr.076.0.sum = add i32 %p_addr.076.0.rec, 8 ; <i32> [#uses=1] + %tmp53 = getelementptr i8* %p, i32 %p_addr.076.0.sum ; <i8*> [#uses=1] + %tmp55 = load i8* %tmp53 ; <i8> [#uses=1] + %tmp57 = getelementptr i8* %tmp3, i32 %tmp5.sum ; <i8*> [#uses=1] + store i8 %tmp55, i8* %tmp57 + %indvar.next = add i32 %i.073.0, 1 ; <i32> [#uses=2] + icmp eq i32 %indvar.next, %size ; <i1>:1 [#uses=1] + br i1 %1, label %return, label %bb + +return: ; preds = %bb, %entry + ret void +} diff --git a/test/CodeGen/X86/2007-03-16-InlineAsm.ll b/test/CodeGen/X86/2007-03-16-InlineAsm.ll new file mode 100644 index 0000000..c98c89a --- /dev/null +++ b/test/CodeGen/X86/2007-03-16-InlineAsm.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -march=x86 + +; ModuleID = 'a.bc' + +define i32 @foo(i32 %A, i32 %B) { +entry: + %A_addr = alloca i32 ; <i32*> [#uses=2] + %B_addr = alloca i32 ; <i32*> [#uses=1] + %retval = alloca i32, align 4 ; <i32*> [#uses=2] + %tmp = alloca i32, align 4 ; <i32*> [#uses=2] + %ret = alloca i32, align 4 ; <i32*> [#uses=2] + "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 %A, i32* %A_addr + store i32 %B, i32* %B_addr + %tmp1 = load i32* %A_addr ; <i32> [#uses=1] + %tmp2 = call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 7, i32 %tmp1 ) ; <i32> [#uses=1] + store i32 %tmp2, i32* %ret + %tmp3 = load i32* %ret ; <i32> [#uses=1] + store i32 %tmp3, i32* %tmp + %tmp4 = load i32* %tmp ; <i32> [#uses=1] + store i32 %tmp4, i32* %retval + br label %return + +return: ; preds = %entry + %retval5 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval5 +} diff --git a/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll new file mode 100644 index 0000000..6965849 --- /dev/null +++ b/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 +; PR1259 + +define void @test() { + %tmp2 = call i32 asm "...", "=r,~{dirflag},~{fpsr},~{flags},~{dx},~{cx},~{ax}"( ) + unreachable +} diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll b/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll new file mode 100644 index 0000000..babcf6a --- /dev/null +++ b/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=x86 + +define i32 @test(i16 %tmp40414244) { + %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 %tmp40414244 ) + ret i32 %tmp48 +} + +define i32 @test2(i16 %tmp40414244) { + %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 14 ) + ret i32 %tmp48 +} diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll new file mode 100644 index 0000000..9bdb249 --- /dev/null +++ b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {mov %gs:72, %eax} +target datalayout = "e-p:32:32" +target triple = "i686-apple-darwin9" + +define void @test() { + %tmp1 = tail call i32* asm sideeffect "mov %gs:${1:P}, $0", "=r,i,~{dirflag},~{fpsr},~{flags}"( i32 72 ) ; <%struct._pthread*> [#uses=1] + ret void +} + + diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll new file mode 100644 index 0000000..6e1adf8 --- /dev/null +++ b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -mcpu=yonah -march=x86 | \ +; RUN: grep {cmpltsd %xmm0, %xmm0} +target datalayout = "e-p:32:32" +target triple = "i686-apple-darwin9" + + +define void @acoshf() { + %tmp19 = tail call <2 x double> asm sideeffect "pcmpeqd $0, $0 \0A\09 cmpltsd $0, $0", "=x,0,~{dirflag},~{fpsr},~{flags}"( <2 x double> zeroinitializer ) ; <<2 x double>> [#uses=0] + ret void +} + diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll new file mode 100644 index 0000000..e440cdb --- /dev/null +++ b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {psrlw \$8, %xmm0} +target datalayout = "e-p:32:32" +target triple = "i686-apple-darwin9" + +define void @test() { + tail call void asm sideeffect "psrlw $0, %xmm0", "X,~{dirflag},~{fpsr},~{flags}"( i32 8 ) + ret void +} + diff --git a/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll b/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll new file mode 100644 index 0000000..840fc7d --- /dev/null +++ b/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc +; PR1314 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "x86_64-unknown-linux-gnu" + %struct.CycleCount = type { i64, i64 } + %struct.bc_struct = type { i32, i32, i32, i32, %struct.bc_struct*, i8*, i8* } +@_programStartTime = external global %struct.CycleCount ; <%struct.CycleCount*> [#uses=1] + +define fastcc i32 @bc_divide(%struct.bc_struct* %n1, %struct.bc_struct* %n2, %struct.bc_struct** %quot, i32 %scale) { +entry: + %tmp7.i46 = tail call i64 asm sideeffect ".byte 0x0f,0x31", "={dx},=*{ax},~{dirflag},~{fpsr},~{flags}"( i64* getelementptr (%struct.CycleCount* @_programStartTime, i32 0, i32 1) ) ; <i64> [#uses=0] + %tmp221 = sdiv i32 10, 0 ; <i32> [#uses=1] + tail call fastcc void @_one_mult( i8* null, i32 0, i32 %tmp221, i8* null ) + ret i32 0 +} + +declare fastcc void @_one_mult(i8*, i32, i32, i8*) diff --git a/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll new file mode 100644 index 0000000..ed5a194 --- /dev/null +++ b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define void @test(<4 x float> %tmp42i) { + %tmp42 = call <4 x float> asm "movss $1, $0", "=x,m,~{dirflag},~{fpsr},~{flags}"( float* null ) ; <<4 x float>> [#uses=1] + %tmp49 = shufflevector <4 x float> %tmp42, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] + br label %bb + +bb: ; preds = %bb, %cond_true10 + %tmp52 = bitcast <4 x float> %tmp49 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp53 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp52, <4 x i32> < i32 8, i32 undef, i32 undef, i32 undef > ) ; <<4 x i32>> [#uses=1] + %tmp105 = bitcast <4 x i32> %tmp53 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp108 = sub <4 x float> zeroinitializer, %tmp105 ; <<4 x float>> [#uses=0] + br label %bb + +return: ; preds = %entry + ret void +} + +declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) diff --git a/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll new file mode 100644 index 0000000..f9671a4 --- /dev/null +++ b/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll @@ -0,0 +1,42 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -relocation-model=pic --disable-fp-elim + + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { i8*, i32 } + %struct.partition_def = type { i32, [1 x %struct.partition_elem] } + %struct.partition_elem = type { i32, %struct.partition_elem*, i32 } + +define void @partition_print(%struct.partition_def* %part) { +entry: + br i1 false, label %bb.preheader, label %bb99 + +bb.preheader: ; preds = %entry + br i1 false, label %cond_true, label %cond_next90 + +cond_true: ; preds = %bb.preheader + br i1 false, label %bb32, label %bb87.critedge + +bb32: ; preds = %bb32, %cond_true + %i.2115.0 = phi i32 [ 0, %cond_true ], [ %indvar.next127, %bb32 ] ; <i32> [#uses=1] + %c.2112.0 = phi i32 [ 0, %cond_true ], [ %tmp49, %bb32 ] ; <i32> [#uses=1] + %tmp43 = getelementptr %struct.partition_def* %part, i32 0, i32 1, i32 %c.2112.0, i32 1 ; <%struct.partition_elem**> [#uses=1] + %tmp44 = load %struct.partition_elem** %tmp43 ; <%struct.partition_elem*> [#uses=1] + %tmp4445 = ptrtoint %struct.partition_elem* %tmp44 to i32 ; <i32> [#uses=1] + %tmp48 = sub i32 %tmp4445, 0 ; <i32> [#uses=1] + %tmp49 = sdiv i32 %tmp48, 12 ; <i32> [#uses=1] + %indvar.next127 = add i32 %i.2115.0, 1 ; <i32> [#uses=2] + %exitcond128 = icmp eq i32 %indvar.next127, 0 ; <i1> [#uses=1] + br i1 %exitcond128, label %bb58, label %bb32 + +bb58: ; preds = %bb32 + ret void + +bb87.critedge: ; preds = %cond_true + ret void + +cond_next90: ; preds = %bb.preheader + ret void + +bb99: ; preds = %entry + ret void +} diff --git a/test/CodeGen/X86/2007-04-24-Huge-Stack.ll b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll new file mode 100644 index 0000000..74e6e72 --- /dev/null +++ b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | not grep 4294967112 +; PR1348 + + %struct.md5_ctx = type { i32, i32, i32, i32, [2 x i32], i32, [128 x i8], [4294967288 x i8] } + +define i8* @md5_buffer(i8* %buffer, i64 %len, i8* %resblock) { +entry: + %ctx = alloca %struct.md5_ctx, align 16 ; <%struct.md5_ctx*> [#uses=3] + call void @md5_init_ctx( %struct.md5_ctx* %ctx ) + call void @md5_process_bytes( i8* %buffer, i64 %len, %struct.md5_ctx* %ctx ) + %tmp4 = call i8* @md5_finish_ctx( %struct.md5_ctx* %ctx, i8* %resblock ) ; <i8*> [#uses=1] + ret i8* %tmp4 +} + +declare void @md5_init_ctx(%struct.md5_ctx*) + +declare i8* @md5_finish_ctx(%struct.md5_ctx*, i8*) + +declare void @md5_process_bytes(i8*, i64, %struct.md5_ctx*) diff --git a/test/CodeGen/X86/2007-04-24-VectorCrash.ll b/test/CodeGen/X86/2007-04-24-VectorCrash.ll new file mode 100644 index 0000000..ce23da0 --- /dev/null +++ b/test/CodeGen/X86/2007-04-24-VectorCrash.ll @@ -0,0 +1,63 @@ +; RUN: llvm-as < %s | llc -mcpu=yonah +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) + +define void @test(float* %P) { +entry: + or <4 x i32> zeroinitializer, and (<4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer) to <4 x i32>), <4 x i32> < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 >) ; <<4 x i32>>:0 [#uses=1] + bitcast <4 x i32> %0 to <4 x float> ; <<4 x float>>:1 [#uses=1] + sub <4 x float> %1, zeroinitializer ; <<4 x float>>:2 [#uses=1] + sub <4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer), %2 ; <<4 x float>>:3 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %3, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:4 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %4, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:5 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %5, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:6 [#uses=1] + shufflevector <4 x float> %6, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:7 [#uses=1] + shufflevector <4 x float> %7, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:8 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %8, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:9 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %9, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:10 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %10, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:11 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %11, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:12 [#uses=1] + shufflevector <4 x float> %12, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:13 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %13, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:14 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %14, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:15 [#uses=1] + shufflevector <4 x float> %15, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:16 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %16, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:17 [#uses=1] + shufflevector <4 x float> %17, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:18 [#uses=1] + shufflevector <4 x float> %18, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:19 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %19, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:20 [#uses=1] + shufflevector <4 x float> %20, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:21 [#uses=1] + shufflevector <4 x float> %21, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:22 [#uses=1] + mul <4 x float> %22, zeroinitializer ; <<4 x float>>:23 [#uses=1] + shufflevector <4 x float> %23, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:24 [#uses=1] + call <4 x float> @llvm.x86.sse.add.ss( <4 x float> zeroinitializer, <4 x float> %24 ) ; <<4 x float>>:25 [#uses=1] + shufflevector <4 x float> %25, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:26 [#uses=1] + shufflevector <4 x float> %26, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:27 [#uses=1] + shufflevector <4 x float> %27, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:28 [#uses=1] + mul <4 x float> zeroinitializer, %28 ; <<4 x float>>:29 [#uses=1] + add <4 x float> %29, zeroinitializer ; <<4 x float>>:30 [#uses=1] + mul <4 x float> zeroinitializer, %30 ; <<4 x float>>:31 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %31, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:32 [#uses=1] + mul <4 x float> zeroinitializer, %32 ; <<4 x float>>:33 [#uses=1] + shufflevector <4 x float> %33, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:34 [#uses=1] + mul <4 x float> zeroinitializer, %34 ; <<4 x float>>:35 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %35, <4 x i32> < i32 0, i32 1, i32 6, i32 7 > ; <<4 x float>>:36 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %36, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:37 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %37, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:38 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %38, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:39 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %39, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:40 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %40, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:41 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %41, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:42 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %42, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:43 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %43, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:44 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %44, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:45 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %45, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:46 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %46, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:47 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %47, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:48 [#uses=1] + shufflevector <4 x float> %48, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>>:49 [#uses=1] + add <4 x float> %49, zeroinitializer ; <<4 x float>>:50 [#uses=1] + %tmp5845 = extractelement <4 x float> %50, i32 2 ; <float> [#uses=1] + store float %tmp5845, float* %P + ret void +} diff --git a/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll new file mode 100644 index 0000000..0d20824 --- /dev/null +++ b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep paddq | wc -l | grep 2 +; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep movq | wc -l | grep 3 + +define <1 x i64> @unsigned_add3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) { +entry: + %tmp2942 = icmp eq i32 %count, 0 ; <i1> [#uses=1] + br i1 %tmp2942, label %bb31, label %bb26 + +bb26: ; preds = %bb26, %entry + %i.037.0 = phi i32 [ 0, %entry ], [ %tmp25, %bb26 ] ; <i32> [#uses=3] + %sum.035.0 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1] + %tmp13 = getelementptr <1 x i64>* %b, i32 %i.037.0 ; <<1 x i64>*> [#uses=1] + %tmp14 = load <1 x i64>* %tmp13 ; <<1 x i64>> [#uses=1] + %tmp18 = getelementptr <1 x i64>* %a, i32 %i.037.0 ; <<1 x i64>*> [#uses=1] + %tmp19 = load <1 x i64>* %tmp18 ; <<1 x i64>> [#uses=1] + %tmp21 = add <1 x i64> %tmp19, %tmp14 ; <<1 x i64>> [#uses=1] + %tmp22 = add <1 x i64> %tmp21, %sum.035.0 ; <<1 x i64>> [#uses=2] + %tmp25 = add i32 %i.037.0, 1 ; <i32> [#uses=2] + %tmp29 = icmp ult i32 %tmp25, %count ; <i1> [#uses=1] + br i1 %tmp29, label %bb26, label %bb31 + +bb31: ; preds = %bb26, %entry + %sum.035.1 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1] + ret <1 x i64> %sum.035.1 +} diff --git a/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll b/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll new file mode 100644 index 0000000..cbd6a73 --- /dev/null +++ b/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc | not grep {bsrl.*10} +; PR1356 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define i32 @main() { +entry: + %tmp4 = tail call i32 asm "bsrl $1, $0", "=r,ro,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 10 ) ; <i32> [#uses=1] + ret i32 %tmp4 +} + diff --git a/test/CodeGen/X86/2007-05-05-VecCastExpand.ll b/test/CodeGen/X86/2007-05-05-VecCastExpand.ll new file mode 100644 index 0000000..6173d44 --- /dev/null +++ b/test/CodeGen/X86/2007-05-05-VecCastExpand.ll @@ -0,0 +1,21 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386 -mattr=+sse +; PR1371 + +%str = external global [18 x sbyte] + +void %test() { +bb.i: + %tmp.i660 = load <4 x float>* null + call void (int, ...)* %printf( int 0, sbyte* getelementptr ([18 x sbyte]* %str, int 0, uint 0), double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) + %tmp152.i = load <4 x uint>* null + %tmp156.i = cast <4 x uint> %tmp152.i to <4 x int> + %tmp175.i = cast <4 x float> %tmp.i660 to <4 x int> + %tmp176.i = xor <4 x int> %tmp156.i, < int -1, int -1, int -1, int -1 > + %tmp177.i = and <4 x int> %tmp176.i, %tmp175.i + %tmp190.i = or <4 x int> %tmp177.i, zeroinitializer + %tmp191.i = cast <4 x int> %tmp190.i to <4 x float> + store <4 x float> %tmp191.i, <4 x float>* null + ret void +} + +declare void %printf(int, ...) diff --git a/test/CodeGen/X86/2007-05-07-InvokeSRet.ll b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll new file mode 100644 index 0000000..b1b015d --- /dev/null +++ b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -enable-eh -disable-fp-elim | not grep {addl .8, %esp} +; PR1398 + + %struct.S = type { i32, i32 } + +declare void @invokee(%struct.S* sret ) + +define void @invoker(%struct.S* %name.0.0) { +entry: + invoke void @invokee( %struct.S* %name.0.0 sret ) + to label %return unwind label %return + +return: ; preds = %entry, %entry + ret void +} diff --git a/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll new file mode 100644 index 0000000..f89ef71 --- /dev/null +++ b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -march=x86-64 + + %struct.XDesc = type <{ i32, %struct.OpaqueXDataStorageType** }> + %struct.OpaqueXDataStorageType = type opaque + +declare i16 @GetParamDesc(%struct.XDesc*, i32, i32, %struct.XDesc*) sext + +declare void @r_raise(i64, i8*, ...) + +define i64 @app_send_event(i64 %self, i64 %event_class, i64 %event_id, i64 %params, i64 %need_retval) { +entry: + br i1 false, label %cond_true109, label %bb83.preheader + +bb83.preheader: ; preds = %entry + ret i64 0 + +cond_true109: ; preds = %entry + br i1 false, label %cond_next164, label %cond_true239 + +cond_next164: ; preds = %cond_true109 + %tmp176 = call i16 @GetParamDesc( %struct.XDesc* null, i32 1701999219, i32 1413830740, %struct.XDesc* null ) sext ; <i16> [#uses=0] + call void (i64, i8*, ...)* @r_raise( i64 0, i8* null ) + unreachable + +cond_true239: ; preds = %cond_true109 + ret i64 0 +} diff --git a/test/CodeGen/X86/2007-05-15-maskmovq.ll b/test/CodeGen/X86/2007-05-15-maskmovq.ll new file mode 100644 index 0000000..d9836e4 --- /dev/null +++ b/test/CodeGen/X86/2007-05-15-maskmovq.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -mcpu=yonah + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define void @test(<1 x i64> %c64, <1 x i64> %mask1, i8* %P) { +entry: + %tmp4 = bitcast <1 x i64> %mask1 to <8 x i8> ; <<8 x i8>> [#uses=1] + %tmp6 = bitcast <1 x i64> %c64 to <8 x i8> ; <<8 x i8>> [#uses=1] + tail call void @llvm.x86.mmx.maskmovq( <8 x i8> %tmp6, <8 x i8> %tmp4, i8* %P ) + ret void +} + +declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*) diff --git a/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll new file mode 100644 index 0000000..33ff755 --- /dev/null +++ b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpckhwd + +declare <8 x i16> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) + +declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <4 x i32>) + +define fastcc void @test(i32* %src, i32 %sbpr, i32* %dst, i32 %dbpr, i32 %w, i32 %h, i32 %dstalpha, i32 %mask) { + %tmp633 = shufflevector <8 x i16> zeroinitializer, <8 x i16> undef, <8 x i32> < i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7 > + %tmp715 = mul <8 x i16> zeroinitializer, %tmp633 + %tmp776 = bitcast <8 x i16> %tmp715 to <4 x i32> + %tmp777 = add <4 x i32> %tmp776, shufflevector (<4 x i32> < i32 65537, i32 0, i32 0, i32 0 >, <4 x i32> < i32 65537, i32 0, i32 0, i32 0 >, <4 x i32> zeroinitializer) + %tmp805 = add <4 x i32> %tmp777, zeroinitializer + %tmp832 = bitcast <4 x i32> %tmp805 to <8 x i16> + %tmp838 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp832, <4 x i32> < i32 8, i32 undef, i32 undef, i32 undef > ) + %tmp1020 = tail call <8 x i16> @llvm.x86.sse2.packuswb.128( <8 x i16> zeroinitializer, <8 x i16> %tmp838 ) + %tmp1030 = bitcast <8 x i16> %tmp1020 to <4 x i32> + %tmp1033 = add <4 x i32> zeroinitializer, %tmp1030 + %tmp1048 = bitcast <4 x i32> %tmp1033 to <2 x i64> + %tmp1049 = or <2 x i64> %tmp1048, zeroinitializer + store <2 x i64> %tmp1049, <2 x i64>* null + ret void +} diff --git a/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll b/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll new file mode 100644 index 0000000..5d09075 --- /dev/null +++ b/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll @@ -0,0 +1,28 @@ +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep GOTPCREL +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep ".align.*3" + + %struct.A = type { [1024 x i8] } +@_ZN1A1aE = global %struct.A zeroinitializer, align 32 ; <%struct.A*> [#uses=1] +@llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN1A1aE } ] ; <[1 x { i32, void ()* }]*> [#uses=0] + +define internal void @_GLOBAL__I__ZN1A1aE() section "__TEXT,__StaticInit,regular,pure_instructions" { +entry: + br label %bb.i + +bb.i: ; preds = %bb.i, %entry + %i.1.i1.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb.i ] ; <i32> [#uses=2] + %tmp1012.i = sext i32 %i.1.i1.0 to i64 ; <i64> [#uses=1] + %tmp13.i = getelementptr %struct.A* @_ZN1A1aE, i32 0, i32 0, i64 %tmp1012.i ; <i8*> [#uses=1] + store i8 0, i8* %tmp13.i + %indvar.next = add i32 %i.1.i1.0, 1 ; <i32> [#uses=2] + %exitcond = icmp eq i32 %indvar.next, 1024 ; <i1> [#uses=1] + br i1 %exitcond, label %_Z41__static_initialization_and_destruction_0ii.exit, label %bb.i + +_Z41__static_initialization_and_destruction_0ii.exit: ; preds = %bb.i + ret void +} + +define i32 @main(i32 %argc, i8** %argv) { +entry: + ret i32 0 +} diff --git a/test/CodeGen/X86/2007-06-04-tailmerge4.ll b/test/CodeGen/X86/2007-06-04-tailmerge4.ll new file mode 100644 index 0000000..a052ad8 --- /dev/null +++ b/test/CodeGen/X86/2007-06-04-tailmerge4.ll @@ -0,0 +1,454 @@ +; RUN: llvm-as < %s | llc -enable-eh | grep invcont131 +; PR 1496: tail merge was incorrectly removing this block + +; ModuleID = 'report.1.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-pc-linux-gnu" + %struct.ALLOC = type { %struct.string___XUB, [2 x i8] } + %struct.RETURN = type { i32, i32, i32, i64 } + %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* } + %struct.ada__tags__dispatch_table = type { [1 x i8*] } + %struct.ada__text_io__text_afcb = type { %struct.system__file_control_block__afcb, i32, i32, i32, i32, i32, %struct.ada__text_io__text_afcb*, i8, i8 } + %struct.string___XUB = type { i32, i32 } + %struct.string___XUP = type { i8*, %struct.string___XUB* } + %struct.system__file_control_block__afcb = type { %struct.ada__streams__root_stream_type, i32, %struct.string___XUP, i32, %struct.string___XUP, i8, i8, i8, i8, i8, i8, i8, %struct.system__file_control_block__afcb*, %struct.system__file_control_block__afcb* } + %struct.system__secondary_stack__mark_id = type { i8*, i32 } + %struct.wide_string___XUP = type { i16*, %struct.string___XUB* } +@report_E = global i8 0 ; <i8*> [#uses=0] +@report__test_status = internal global i8 1 ; <i8*> [#uses=8] +@report__test_name = internal global [15 x i8] zeroinitializer ; <[15 x i8]*> [#uses=10] +@report__test_name_len = internal global i32 0 ; <i32*> [#uses=15] +@.str = internal constant [12 x i8] c"report.adb\00\00" ; <[12 x i8]*> [#uses=1] +@C.26.599 = internal constant %struct.string___XUB { i32 1, i32 1 } ; <%struct.string___XUB*> [#uses=1] +@.str1 = internal constant [1 x i8] c":" ; <[1 x i8]*> [#uses=1] +@.str2 = internal constant [1 x i8] c" " ; <[1 x i8]*> [#uses=1] +@.str3 = internal constant [1 x i8] c"-" ; <[1 x i8]*> [#uses=1] +@.str5 = internal constant [10 x i8] c"0123456789" ; <[10 x i8]*> [#uses=12] +@C.59.855 = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1] +@C.69.876 = internal constant %struct.string___XUB { i32 1, i32 3 } ; <%struct.string___XUB*> [#uses=1] +@C.70.879 = internal constant %struct.string___XUB { i32 1, i32 6 } ; <%struct.string___XUB*> [#uses=1] +@C.81.900 = internal constant %struct.string___XUB { i32 1, i32 5 } ; <%struct.string___XUB*> [#uses=1] +@.str6 = internal constant [0 x i8] zeroinitializer ; <[0 x i8]*> [#uses=1] +@.str7 = internal constant [3 x i8] c"2.5" ; <[3 x i8]*> [#uses=1] +@.str8 = internal constant [6 x i8] c"ACATS " ; <[6 x i8]*> [#uses=1] +@.str9 = internal constant [5 x i8] c",.,. " ; <[5 x i8]*> [#uses=1] +@.str10 = internal constant [1 x i8] c"." ; <[1 x i8]*> [#uses=1] +@.str11 = internal constant [5 x i8] c"---- " ; <[5 x i8]*> [#uses=1] +@.str12 = internal constant [5 x i8] c" - " ; <[5 x i8]*> [#uses=1] +@.str13 = internal constant [5 x i8] c" * " ; <[5 x i8]*> [#uses=1] +@.str14 = internal constant [5 x i8] c" + " ; <[5 x i8]*> [#uses=1] +@.str15 = internal constant [5 x i8] c" ! " ; <[5 x i8]*> [#uses=1] +@C.209.1380 = internal constant %struct.string___XUB { i32 1, i32 37 } ; <%struct.string___XUB*> [#uses=1] +@.str16 = internal constant [37 x i8] c" PASSED ============================." ; <[37 x i8]*> [#uses=1] +@.str17 = internal constant [5 x i8] c"==== " ; <[5 x i8]*> [#uses=1] +@.str18 = internal constant [37 x i8] c" NOT-APPLICABLE ++++++++++++++++++++." ; <[37 x i8]*> [#uses=1] +@.str19 = internal constant [5 x i8] c"++++ " ; <[5 x i8]*> [#uses=1] +@.str20 = internal constant [37 x i8] c" TENTATIVELY PASSED !!!!!!!!!!!!!!!!." ; <[37 x i8]*> [#uses=1] +@.str21 = internal constant [5 x i8] c"!!!! " ; <[5 x i8]*> [#uses=1] +@.str22 = internal constant [37 x i8] c" SEE '!' COMMENTS FOR SPECIAL NOTES!!" ; <[37 x i8]*> [#uses=1] +@.str23 = internal constant [37 x i8] c" FAILED ****************************." ; <[37 x i8]*> [#uses=1] +@.str24 = internal constant [5 x i8] c"**** " ; <[5 x i8]*> [#uses=1] +@__gnat_others_value = external constant i32 ; <i32*> [#uses=2] +@system__soft_links__abort_undefer = external global void ()* ; <void ()**> [#uses=1] +@C.320.1854 = internal constant %struct.string___XUB { i32 2, i32 6 } ; <%struct.string___XUB*> [#uses=1] + +declare void @report__put_msg(i64 %msg.0.0) + +declare void @__gnat_rcheck_05(i8*, i32) + +declare void @__gnat_rcheck_12(i8*, i32) + +declare %struct.ada__text_io__text_afcb* @ada__text_io__standard_output() + +declare void @ada__text_io__set_col(%struct.ada__text_io__text_afcb*, i32) + +declare void @ada__text_io__put_line(%struct.ada__text_io__text_afcb*, i64) + +declare void @report__time_stamp(%struct.string___XUP* sret %agg.result) + +declare i64 @ada__calendar__clock() + +declare void @ada__calendar__split(%struct.RETURN* sret , i64) + +declare void @system__string_ops_concat_5__str_concat_5(%struct.string___XUP* sret , i64, i64, i64, i64, i64) + +declare void @system__string_ops_concat_3__str_concat_3(%struct.string___XUP* sret , i64, i64, i64) + +declare i8* @system__secondary_stack__ss_allocate(i32) + +declare void @report__test(i64 %name.0.0, i64 %descr.0.0) + +declare void @system__secondary_stack__ss_mark(%struct.system__secondary_stack__mark_id* sret ) + +declare i8* @llvm.eh.exception() + +declare i32 @llvm.eh.selector(i8*, i8*, ...) + +declare i32 @llvm.eh.typeid.for(i8*) + +declare i32 @__gnat_eh_personality(...) + +declare i32 @_Unwind_Resume(...) + +declare void @__gnat_rcheck_07(i8*, i32) + +declare void @system__secondary_stack__ss_release(i64) + +declare void @report__comment(i64 %descr.0.0) + +declare void @report__failed(i64 %descr.0.0) + +declare void @report__not_applicable(i64 %descr.0.0) + +declare void @report__special_action(i64 %descr.0.0) + +define void @report__result() { +entry: + %tmp = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3] + %A.210 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp5 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %A.229 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp10 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %A.248 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp15 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %A.270 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp20 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %A.284 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp25 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + call void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp sret ) + %tmp28 = getelementptr %struct.system__secondary_stack__mark_id* %tmp, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp29 = load i8** %tmp28 ; <i8*> [#uses=2] + %tmp31 = getelementptr %struct.system__secondary_stack__mark_id* %tmp, i32 0, i32 1 ; <i32*> [#uses=1] + %tmp32 = load i32* %tmp31 ; <i32> [#uses=2] + %tmp33 = load i8* @report__test_status ; <i8> [#uses=1] + switch i8 %tmp33, label %bb483 [ + i8 0, label %bb + i8 2, label %bb143 + i8 3, label %bb261 + ] + +bb: ; preds = %entry + %tmp34 = load i32* @report__test_name_len ; <i32> [#uses=4] + %tmp35 = icmp sgt i32 %tmp34, 0 ; <i1> [#uses=2] + %tmp40 = icmp sgt i32 %tmp34, 15 ; <i1> [#uses=1] + %bothcond139 = and i1 %tmp35, %tmp40 ; <i1> [#uses=1] + br i1 %bothcond139, label %cond_true43, label %cond_next44 + +cond_true43: ; preds = %bb + invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 212 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +unwind: ; preds = %invcont589, %cond_next567, %bb555, %cond_true497, %invcont249, %cond_next227, %bb215, %cond_true157, %invcont131, %cond_next109, %bb97, %cond_true43 + %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + br label %cleanup717 + +cond_next44: ; preds = %bb + %tmp72 = getelementptr %struct.string___XUB* %A.210, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp72 + %tmp73 = getelementptr %struct.string___XUB* %A.210, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp34, i32* %tmp73 + br i1 %tmp35, label %cond_true80, label %cond_next109 + +cond_true80: ; preds = %cond_next44 + %tmp45.off = add i32 %tmp34, -1 ; <i32> [#uses=1] + %bothcond = icmp ugt i32 %tmp45.off, 14 ; <i1> [#uses=1] + br i1 %bothcond, label %bb97, label %cond_next109 + +bb97: ; preds = %cond_true80 + invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 212 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next109: ; preds = %cond_true80, %cond_next44 + %A.210128 = ptrtoint %struct.string___XUB* %A.210 to i32 ; <i32> [#uses=1] + %A.210128129 = zext i32 %A.210128 to i64 ; <i64> [#uses=1] + %A.210128129130 = shl i64 %A.210128129, 32 ; <i64> [#uses=1] + %A.210128129130.ins = or i64 %A.210128129130, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp5 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str17 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.210128129130.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str16 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont131 unwind label %unwind + +invcont131: ; preds = %cond_next109 + %tmp133 = getelementptr %struct.string___XUP* %tmp5, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp134 = load i8** %tmp133 ; <i8*> [#uses=1] + %tmp134120 = ptrtoint i8* %tmp134 to i32 ; <i32> [#uses=1] + %tmp134120121 = zext i32 %tmp134120 to i64 ; <i64> [#uses=1] + %tmp136 = getelementptr %struct.string___XUP* %tmp5, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp137 = load %struct.string___XUB** %tmp136 ; <%struct.string___XUB*> [#uses=1] + %tmp137116 = ptrtoint %struct.string___XUB* %tmp137 to i32 ; <i32> [#uses=1] + %tmp137116117 = zext i32 %tmp137116 to i64 ; <i64> [#uses=1] + %tmp137116117118 = shl i64 %tmp137116117, 32 ; <i64> [#uses=1] + %tmp137116117118.ins = or i64 %tmp137116117118, %tmp134120121 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp137116117118.ins ) + to label %cond_next618 unwind label %unwind + +bb143: ; preds = %entry + %tmp144 = load i32* @report__test_name_len ; <i32> [#uses=4] + %tmp147 = icmp sgt i32 %tmp144, 0 ; <i1> [#uses=2] + %tmp154 = icmp sgt i32 %tmp144, 15 ; <i1> [#uses=1] + %bothcond140 = and i1 %tmp147, %tmp154 ; <i1> [#uses=1] + br i1 %bothcond140, label %cond_true157, label %cond_next160 + +cond_true157: ; preds = %bb143 + invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 215 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next160: ; preds = %bb143 + %tmp189 = getelementptr %struct.string___XUB* %A.229, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp189 + %tmp190 = getelementptr %struct.string___XUB* %A.229, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp144, i32* %tmp190 + br i1 %tmp147, label %cond_true197, label %cond_next227 + +cond_true197: ; preds = %cond_next160 + %tmp161.off = add i32 %tmp144, -1 ; <i32> [#uses=1] + %bothcond1 = icmp ugt i32 %tmp161.off, 14 ; <i1> [#uses=1] + br i1 %bothcond1, label %bb215, label %cond_next227 + +bb215: ; preds = %cond_true197 + invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 215 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next227: ; preds = %cond_true197, %cond_next160 + %A.229105 = ptrtoint %struct.string___XUB* %A.229 to i32 ; <i32> [#uses=1] + %A.229105106 = zext i32 %A.229105 to i64 ; <i64> [#uses=1] + %A.229105106107 = shl i64 %A.229105106, 32 ; <i64> [#uses=1] + %A.229105106107.ins = or i64 %A.229105106107, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp10 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str19 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.229105106107.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str18 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont249 unwind label %unwind + +invcont249: ; preds = %cond_next227 + %tmp251 = getelementptr %struct.string___XUP* %tmp10, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp252 = load i8** %tmp251 ; <i8*> [#uses=1] + %tmp25297 = ptrtoint i8* %tmp252 to i32 ; <i32> [#uses=1] + %tmp2529798 = zext i32 %tmp25297 to i64 ; <i64> [#uses=1] + %tmp254 = getelementptr %struct.string___XUP* %tmp10, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp255 = load %struct.string___XUB** %tmp254 ; <%struct.string___XUB*> [#uses=1] + %tmp25593 = ptrtoint %struct.string___XUB* %tmp255 to i32 ; <i32> [#uses=1] + %tmp2559394 = zext i32 %tmp25593 to i64 ; <i64> [#uses=1] + %tmp255939495 = shl i64 %tmp2559394, 32 ; <i64> [#uses=1] + %tmp255939495.ins = or i64 %tmp255939495, %tmp2529798 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp255939495.ins ) + to label %cond_next618 unwind label %unwind + +bb261: ; preds = %entry + %tmp262 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=2] + %tmp263 = load i32* @report__test_name_len ; <i32> [#uses=4] + %tmp266 = icmp sgt i32 %tmp263, 0 ; <i1> [#uses=2] + %tmp273 = icmp sgt i32 %tmp263, 15 ; <i1> [#uses=1] + %bothcond141 = and i1 %tmp266, %tmp273 ; <i1> [#uses=1] + br i1 %bothcond141, label %cond_true276, label %cond_next281 + +cond_true276: ; preds = %bb261 + invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 218 ) + to label %UnifiedUnreachableBlock unwind label %unwind277 + +unwind277: ; preds = %invcont467, %cond_next442, %invcont370, %cond_next348, %bb336, %cond_true276 + %eh_ptr278 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp262 ) + br label %cleanup717 + +cond_next281: ; preds = %bb261 + %tmp310 = getelementptr %struct.string___XUB* %A.248, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp310 + %tmp311 = getelementptr %struct.string___XUB* %A.248, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp263, i32* %tmp311 + br i1 %tmp266, label %cond_true318, label %cond_next348 + +cond_true318: ; preds = %cond_next281 + %tmp282.off = add i32 %tmp263, -1 ; <i32> [#uses=1] + %bothcond2 = icmp ugt i32 %tmp282.off, 14 ; <i1> [#uses=1] + br i1 %bothcond2, label %bb336, label %cond_next348 + +bb336: ; preds = %cond_true318 + invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 218 ) + to label %UnifiedUnreachableBlock unwind label %unwind277 + +cond_next348: ; preds = %cond_true318, %cond_next281 + %A.24882 = ptrtoint %struct.string___XUB* %A.248 to i32 ; <i32> [#uses=1] + %A.2488283 = zext i32 %A.24882 to i64 ; <i64> [#uses=1] + %A.248828384 = shl i64 %A.2488283, 32 ; <i64> [#uses=1] + %A.248828384.ins = or i64 %A.248828384, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp15 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str21 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.248828384.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str20 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont370 unwind label %unwind277 + +invcont370: ; preds = %cond_next348 + %tmp372 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp373 = load i8** %tmp372 ; <i8*> [#uses=1] + %tmp37374 = ptrtoint i8* %tmp373 to i32 ; <i32> [#uses=1] + %tmp3737475 = zext i32 %tmp37374 to i64 ; <i64> [#uses=1] + %tmp375 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp376 = load %struct.string___XUB** %tmp375 ; <%struct.string___XUB*> [#uses=1] + %tmp37670 = ptrtoint %struct.string___XUB* %tmp376 to i32 ; <i32> [#uses=1] + %tmp3767071 = zext i32 %tmp37670 to i64 ; <i64> [#uses=1] + %tmp376707172 = shl i64 %tmp3767071, 32 ; <i64> [#uses=1] + %tmp376707172.ins = or i64 %tmp376707172, %tmp3737475 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp376707172.ins ) + to label %invcont381 unwind label %unwind277 + +invcont381: ; preds = %invcont370 + %tmp382 = load i32* @report__test_name_len ; <i32> [#uses=6] + %tmp415 = icmp sgt i32 %tmp382, -1 ; <i1> [#uses=1] + %max416 = select i1 %tmp415, i32 %tmp382, i32 0 ; <i32> [#uses=1] + %tmp417 = alloca i8, i32 %max416 ; <i8*> [#uses=3] + %tmp423 = icmp sgt i32 %tmp382, 0 ; <i1> [#uses=1] + br i1 %tmp423, label %bb427, label %cond_next442 + +bb427: ; preds = %invcont381 + store i8 32, i8* %tmp417 + %tmp434 = icmp eq i32 %tmp382, 1 ; <i1> [#uses=1] + br i1 %tmp434, label %cond_next442, label %cond_next438.preheader + +cond_next438.preheader: ; preds = %bb427 + %tmp. = add i32 %tmp382, -1 ; <i32> [#uses=1] + br label %cond_next438 + +cond_next438: ; preds = %cond_next438, %cond_next438.preheader + %indvar = phi i32 [ 0, %cond_next438.preheader ], [ %J130b.513.5, %cond_next438 ] ; <i32> [#uses=1] + %J130b.513.5 = add i32 %indvar, 1 ; <i32> [#uses=3] + %tmp43118 = getelementptr i8* %tmp417, i32 %J130b.513.5 ; <i8*> [#uses=1] + store i8 32, i8* %tmp43118 + %exitcond = icmp eq i32 %J130b.513.5, %tmp. ; <i1> [#uses=1] + br i1 %exitcond, label %cond_next442, label %cond_next438 + +cond_next442: ; preds = %cond_next438, %bb427, %invcont381 + %tmp448 = getelementptr %struct.string___XUB* %A.270, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp448 + %tmp449 = getelementptr %struct.string___XUB* %A.270, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp382, i32* %tmp449 + %tmp41762 = ptrtoint i8* %tmp417 to i32 ; <i32> [#uses=1] + %tmp4176263 = zext i32 %tmp41762 to i64 ; <i64> [#uses=1] + %A.27058 = ptrtoint %struct.string___XUB* %A.270 to i32 ; <i32> [#uses=1] + %A.2705859 = zext i32 %A.27058 to i64 ; <i64> [#uses=1] + %A.270585960 = shl i64 %A.2705859, 32 ; <i64> [#uses=1] + %A.270585960.ins = or i64 %tmp4176263, %A.270585960 ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp20 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str21 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.270585960.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str22 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont467 unwind label %unwind277 + +invcont467: ; preds = %cond_next442 + %tmp469 = getelementptr %struct.string___XUP* %tmp20, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp470 = load i8** %tmp469 ; <i8*> [#uses=1] + %tmp47050 = ptrtoint i8* %tmp470 to i32 ; <i32> [#uses=1] + %tmp4705051 = zext i32 %tmp47050 to i64 ; <i64> [#uses=1] + %tmp472 = getelementptr %struct.string___XUP* %tmp20, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp473 = load %struct.string___XUB** %tmp472 ; <%struct.string___XUB*> [#uses=1] + %tmp47346 = ptrtoint %struct.string___XUB* %tmp473 to i32 ; <i32> [#uses=1] + %tmp4734647 = zext i32 %tmp47346 to i64 ; <i64> [#uses=1] + %tmp473464748 = shl i64 %tmp4734647, 32 ; <i64> [#uses=1] + %tmp473464748.ins = or i64 %tmp473464748, %tmp4705051 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp473464748.ins ) + to label %cleanup unwind label %unwind277 + +cleanup: ; preds = %invcont467 + call void @llvm.stackrestore( i8* %tmp262 ) + br label %cond_next618 + +bb483: ; preds = %entry + %tmp484 = load i32* @report__test_name_len ; <i32> [#uses=4] + %tmp487 = icmp sgt i32 %tmp484, 0 ; <i1> [#uses=2] + %tmp494 = icmp sgt i32 %tmp484, 15 ; <i1> [#uses=1] + %bothcond142 = and i1 %tmp487, %tmp494 ; <i1> [#uses=1] + br i1 %bothcond142, label %cond_true497, label %cond_next500 + +cond_true497: ; preds = %bb483 + invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 223 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next500: ; preds = %bb483 + %tmp529 = getelementptr %struct.string___XUB* %A.284, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp529 + %tmp530 = getelementptr %struct.string___XUB* %A.284, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp484, i32* %tmp530 + br i1 %tmp487, label %cond_true537, label %cond_next567 + +cond_true537: ; preds = %cond_next500 + %tmp501.off = add i32 %tmp484, -1 ; <i32> [#uses=1] + %bothcond3 = icmp ugt i32 %tmp501.off, 14 ; <i1> [#uses=1] + br i1 %bothcond3, label %bb555, label %cond_next567 + +bb555: ; preds = %cond_true537 + invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 223 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next567: ; preds = %cond_true537, %cond_next500 + %A.28435 = ptrtoint %struct.string___XUB* %A.284 to i32 ; <i32> [#uses=1] + %A.2843536 = zext i32 %A.28435 to i64 ; <i64> [#uses=1] + %A.284353637 = shl i64 %A.2843536, 32 ; <i64> [#uses=1] + %A.284353637.ins = or i64 %A.284353637, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp25 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str24 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.284353637.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str23 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont589 unwind label %unwind + +invcont589: ; preds = %cond_next567 + %tmp591 = getelementptr %struct.string___XUP* %tmp25, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp592 = load i8** %tmp591 ; <i8*> [#uses=1] + %tmp59228 = ptrtoint i8* %tmp592 to i32 ; <i32> [#uses=1] + %tmp5922829 = zext i32 %tmp59228 to i64 ; <i64> [#uses=1] + %tmp594 = getelementptr %struct.string___XUP* %tmp25, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp595 = load %struct.string___XUB** %tmp594 ; <%struct.string___XUB*> [#uses=1] + %tmp59524 = ptrtoint %struct.string___XUB* %tmp595 to i32 ; <i32> [#uses=1] + %tmp5952425 = zext i32 %tmp59524 to i64 ; <i64> [#uses=1] + %tmp595242526 = shl i64 %tmp5952425, 32 ; <i64> [#uses=1] + %tmp595242526.ins = or i64 %tmp595242526, %tmp5922829 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp595242526.ins ) + to label %cond_next618 unwind label %unwind + +cond_next618: ; preds = %invcont589, %cleanup, %invcont249, %invcont131 + store i8 1, i8* @report__test_status + store i32 7, i32* @report__test_name_len + store i8 78, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 0) + store i8 79, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 1) + store i8 95, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 2) + store i8 78, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 3) + store i8 65, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 4) + store i8 77, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 5) + store i8 69, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 6) + %CHAIN.310.0.0.0.val5.i = ptrtoint i8* %tmp29 to i32 ; <i32> [#uses=1] + %CHAIN.310.0.0.0.val56.i = zext i32 %CHAIN.310.0.0.0.val5.i to i64 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val2.i = zext i32 %tmp32 to i64 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val23.i = shl i64 %CHAIN.310.0.0.1.val2.i, 32 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val23.ins.i = or i64 %CHAIN.310.0.0.1.val23.i, %CHAIN.310.0.0.0.val56.i ; <i64> [#uses=1] + call void @system__secondary_stack__ss_release( i64 %CHAIN.310.0.0.1.val23.ins.i ) + ret void + +cleanup717: ; preds = %unwind277, %unwind + %eh_exception.0 = phi i8* [ %eh_ptr278, %unwind277 ], [ %eh_ptr, %unwind ] ; <i8*> [#uses=1] + %CHAIN.310.0.0.0.val5.i8 = ptrtoint i8* %tmp29 to i32 ; <i32> [#uses=1] + %CHAIN.310.0.0.0.val56.i9 = zext i32 %CHAIN.310.0.0.0.val5.i8 to i64 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val2.i10 = zext i32 %tmp32 to i64 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val23.i11 = shl i64 %CHAIN.310.0.0.1.val2.i10, 32 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val23.ins.i12 = or i64 %CHAIN.310.0.0.1.val23.i11, %CHAIN.310.0.0.0.val56.i9 ; <i64> [#uses=1] + call void @system__secondary_stack__ss_release( i64 %CHAIN.310.0.0.1.val23.ins.i12 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_exception.0 ) ; <i32>:0 [#uses=0] + unreachable + +UnifiedUnreachableBlock: ; preds = %bb555, %cond_true497, %bb336, %cond_true276, %bb215, %cond_true157, %bb97, %cond_true43 + unreachable +} + +declare i8* @llvm.stacksave() + +declare void @llvm.stackrestore(i8*) + +declare i32 @report__ident_int(i32 %x) + +declare i8 @report__equal(i32 %x, i32 %y) + +declare i8 @report__ident_char(i8 zext %x) + +declare i16 @report__ident_wide_char(i16 zext %x) + +declare i8 @report__ident_bool(i8 %x) + +declare void @report__ident_str(%struct.string___XUP* sret %agg.result, i64 %x.0.0) + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +declare void @report__ident_wide_str(%struct.wide_string___XUP* sret %agg.result, i64 %x.0.0) + +declare void @__gnat_begin_handler(i8*) + +declare void @__gnat_end_handler(i8*) + +declare void @report__legal_file_name(%struct.string___XUP* sret %agg.result, i32 %x, i64 %nam.0.0) + +declare void @__gnat_rcheck_06(i8*, i32) + +declare void @system__string_ops__str_concat_cs(%struct.string___XUP* sret , i8 zext , i64) diff --git a/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll b/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll new file mode 100644 index 0000000..3e7776a --- /dev/null +++ b/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll @@ -0,0 +1,129 @@ +; PR1495 +; RUN: llvm-as < %s | llc -march=x86 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-pc-linux-gnu" + %struct.AVRational = type { i32, i32 } + %struct.FFTComplex = type { float, float } + %struct.FFTContext = type { i32, i32, i16*, %struct.FFTComplex*, %struct.FFTComplex*, void (%struct.FFTContext*, %struct.FFTComplex*)*, void (%struct.MDCTContext*, float*, float*, float*)* } + %struct.MDCTContext = type { i32, i32, float*, float*, %struct.FFTContext } + %struct.Minima = type { i32, i32, i32, i32 } + %struct.codebook_t = type { i32, i8*, i32*, i32, float, float, i32, i32, i32*, float*, float* } + %struct.floor_class_t = type { i32, i32, i32, i32* } + %struct.floor_t = type { i32, i32*, i32, %struct.floor_class_t*, i32, i32, i32, %struct.Minima* } + %struct.mapping_t = type { i32, i32*, i32*, i32*, i32, i32*, i32* } + %struct.residue_t = type { i32, i32, i32, i32, i32, i32, [8 x i8]*, [2 x float]* } + %struct.venc_context_t = type { i32, i32, [2 x i32], [2 x %struct.MDCTContext], [2 x float*], i32, float*, float*, float*, float*, float, i32, %struct.codebook_t*, i32, %struct.floor_t*, i32, %struct.residue_t*, i32, %struct.mapping_t*, i32, %struct.AVRational* } + +define fastcc i32 @put_main_header(%struct.venc_context_t* %venc, i8** %out) { +entry: + br i1 false, label %bb1820, label %bb288.bb148_crit_edge + +bb288.bb148_crit_edge: ; preds = %entry + ret i32 0 + +cond_next1712: ; preds = %bb1820.bb1680_crit_edge + ret i32 0 + +bb1817: ; preds = %bb1820.bb1680_crit_edge + br label %bb1820 + +bb1820: ; preds = %bb1817, %entry + %pb.1.50 = phi i32 [ %tmp1693, %bb1817 ], [ 8, %entry ] ; <i32> [#uses=3] + br i1 false, label %bb2093, label %bb1820.bb1680_crit_edge + +bb1820.bb1680_crit_edge: ; preds = %bb1820 + %tmp1693 = add i32 %pb.1.50, 8 ; <i32> [#uses=2] + %tmp1702 = icmp slt i32 %tmp1693, 0 ; <i1> [#uses=1] + br i1 %tmp1702, label %cond_next1712, label %bb1817 + +bb2093: ; preds = %bb1820 + %tmp2102 = add i32 %pb.1.50, 65 ; <i32> [#uses=0] + %tmp2236 = add i32 %pb.1.50, 72 ; <i32> [#uses=1] + %tmp2237 = sdiv i32 %tmp2236, 8 ; <i32> [#uses=2] + br i1 false, label %bb2543, label %bb2536.bb2396_crit_edge + +bb2536.bb2396_crit_edge: ; preds = %bb2093 + ret i32 0 + +bb2543: ; preds = %bb2093 + br i1 false, label %cond_next2576, label %bb2690 + +cond_next2576: ; preds = %bb2543 + ret i32 0 + +bb2682: ; preds = %bb2690 + ret i32 0 + +bb2690: ; preds = %bb2543 + br i1 false, label %bb2682, label %bb2698 + +bb2698: ; preds = %bb2690 + br i1 false, label %cond_next2726, label %bb2831 + +cond_next2726: ; preds = %bb2698 + ret i32 0 + +bb2831: ; preds = %bb2698 + br i1 false, label %cond_next2859, label %bb2964 + +cond_next2859: ; preds = %bb2831 + br i1 false, label %bb2943, label %cond_true2866 + +cond_true2866: ; preds = %cond_next2859 + br i1 false, label %cond_true2874, label %cond_false2897 + +cond_true2874: ; preds = %cond_true2866 + ret i32 0 + +cond_false2897: ; preds = %cond_true2866 + ret i32 0 + +bb2943: ; preds = %cond_next2859 + ret i32 0 + +bb2964: ; preds = %bb2831 + br i1 false, label %cond_next2997, label %bb4589 + +cond_next2997: ; preds = %bb2964 + ret i32 0 + +bb3103: ; preds = %bb4589 + ret i32 0 + +bb4589: ; preds = %bb2964 + br i1 false, label %bb3103, label %bb4597 + +bb4597: ; preds = %bb4589 + br i1 false, label %cond_next4630, label %bb4744 + +cond_next4630: ; preds = %bb4597 + br i1 false, label %bb4744, label %cond_true4724 + +cond_true4724: ; preds = %cond_next4630 + br i1 false, label %bb4736, label %bb7531 + +bb4736: ; preds = %cond_true4724 + ret i32 0 + +bb4744: ; preds = %cond_next4630, %bb4597 + ret i32 0 + +bb7531: ; preds = %cond_true4724 + %v_addr.023.0.i6 = add i32 %tmp2237, -255 ; <i32> [#uses=1] + br label %bb.i14 + +bb.i14: ; preds = %bb.i14, %bb7531 + %n.021.0.i8 = phi i32 [ 0, %bb7531 ], [ %indvar.next, %bb.i14 ] ; <i32> [#uses=2] + %tmp..i9 = mul i32 %n.021.0.i8, -255 ; <i32> [#uses=1] + %tmp5.i11 = add i32 %v_addr.023.0.i6, %tmp..i9 ; <i32> [#uses=1] + %tmp10.i12 = icmp ugt i32 %tmp5.i11, 254 ; <i1> [#uses=1] + %indvar.next = add i32 %n.021.0.i8, 1 ; <i32> [#uses=1] + br i1 %tmp10.i12, label %bb.i14, label %bb12.loopexit.i18 + +bb12.loopexit.i18: ; preds = %bb.i14 + call void @llvm.memcpy.i32( i8* null, i8* null, i32 %tmp2237, i32 1 ) + ret i32 0 +} + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) diff --git a/test/CodeGen/X86/2007-06-14-branchfold.ll b/test/CodeGen/X86/2007-06-14-branchfold.ll new file mode 100644 index 0000000..a7194a0 --- /dev/null +++ b/test/CodeGen/X86/2007-06-14-branchfold.ll @@ -0,0 +1,137 @@ +; RUN: llvm-as < %s | llc -mcpu=i686 | grep jmp | wc -l | grep 1 +; check that branch folding understands FP_REG_KILL is not a branch +; the remaining jmp can be removed if we take advantage of knowing +; abort does not return + +; ModuleID = 'g.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-pc-linux-gnu" + %struct.FRAME.c34003a = type { float, float } +@report_E = global i8 0 ; <i8*> [#uses=0] + +define void @main() { +entry: + %FRAME.31 = alloca %struct.FRAME.c34003a, align 8 ; <%struct.FRAME.c34003a*> [#uses=4] + %tmp20 = call i32 @report__ident_int( i32 -50 ) ; <i32> [#uses=1] + %tmp2021 = sitofp i32 %tmp20 to float ; <float> [#uses=5] + %tmp23 = fcmp ult float %tmp2021, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %tmp26 = fcmp ugt float %tmp2021, 0x47EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond = or i1 %tmp23, %tmp26 ; <i1> [#uses=1] + br i1 %bothcond, label %bb, label %bb30 + +bb: ; preds = %entry + unwind + +bb30: ; preds = %entry + %tmp35 = call i32 @report__ident_int( i32 50 ) ; <i32> [#uses=1] + %tmp3536 = sitofp i32 %tmp35 to float ; <float> [#uses=4] + %tmp38 = fcmp ult float %tmp3536, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %tmp44 = fcmp ugt float %tmp3536, 0x47EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond226 = or i1 %tmp38, %tmp44 ; <i1> [#uses=1] + br i1 %bothcond226, label %bb47, label %bb49 + +bb47: ; preds = %bb30 + unwind + +bb49: ; preds = %bb30 + %tmp60 = fcmp ult float %tmp3536, %tmp2021 ; <i1> [#uses=1] + %tmp60.not = xor i1 %tmp60, true ; <i1> [#uses=1] + %tmp65 = fcmp olt float %tmp2021, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond227 = and i1 %tmp65, %tmp60.not ; <i1> [#uses=1] + br i1 %bothcond227, label %cond_true68, label %cond_next70 + +cond_true68: ; preds = %bb49 + unwind + +cond_next70: ; preds = %bb49 + %tmp71 = call i32 @report__ident_int( i32 -30 ) ; <i32> [#uses=1] + %tmp7172 = sitofp i32 %tmp71 to float ; <float> [#uses=3] + %tmp74 = fcmp ult float %tmp7172, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %tmp80 = fcmp ugt float %tmp7172, 0x47EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond228 = or i1 %tmp74, %tmp80 ; <i1> [#uses=1] + br i1 %bothcond228, label %bb83, label %bb85 + +bb83: ; preds = %cond_next70 + unwind + +bb85: ; preds = %cond_next70 + %tmp90 = getelementptr %struct.FRAME.c34003a* %FRAME.31, i32 0, i32 1 ; <float*> [#uses=3] + store float %tmp7172, float* %tmp90 + %tmp92 = call i32 @report__ident_int( i32 30 ) ; <i32> [#uses=1] + %tmp9293 = sitofp i32 %tmp92 to float ; <float> [#uses=7] + %tmp95 = fcmp ult float %tmp9293, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %tmp101 = fcmp ugt float %tmp9293, 0x47EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond229 = or i1 %tmp95, %tmp101 ; <i1> [#uses=1] + br i1 %bothcond229, label %bb104, label %bb106 + +bb104: ; preds = %bb85 + unwind + +bb106: ; preds = %bb85 + %tmp111 = getelementptr %struct.FRAME.c34003a* %FRAME.31, i32 0, i32 0 ; <float*> [#uses=2] + store float %tmp9293, float* %tmp111 + %tmp123 = load float* %tmp90 ; <float> [#uses=4] + %tmp125 = fcmp ult float %tmp9293, %tmp123 ; <i1> [#uses=1] + br i1 %tmp125, label %cond_next147, label %cond_true128 + +cond_true128: ; preds = %bb106 + %tmp133 = fcmp olt float %tmp123, %tmp2021 ; <i1> [#uses=1] + %tmp142 = fcmp ogt float %tmp9293, %tmp3536 ; <i1> [#uses=1] + %bothcond230 = or i1 %tmp133, %tmp142 ; <i1> [#uses=1] + br i1 %bothcond230, label %bb145, label %cond_next147 + +bb145: ; preds = %cond_true128 + unwind + +cond_next147: ; preds = %cond_true128, %bb106 + %tmp157 = fcmp ugt float %tmp123, -3.000000e+01 ; <i1> [#uses=1] + %tmp165 = fcmp ult float %tmp9293, -3.000000e+01 ; <i1> [#uses=1] + %bothcond231 = or i1 %tmp157, %tmp165 ; <i1> [#uses=1] + br i1 %bothcond231, label %bb168, label %bb169 + +bb168: ; preds = %cond_next147 + unwind + +bb169: ; preds = %cond_next147 + %tmp176 = fcmp ugt float %tmp123, 3.000000e+01 ; <i1> [#uses=1] + %tmp184 = fcmp ult float %tmp9293, 3.000000e+01 ; <i1> [#uses=1] + %bothcond232 = or i1 %tmp176, %tmp184 ; <i1> [#uses=1] + br i1 %bothcond232, label %bb187, label %bb188 + +bb187: ; preds = %bb169 + unwind + +bb188: ; preds = %bb169 + %tmp192 = call fastcc float @c34003a__ident.154( %struct.FRAME.c34003a* %FRAME.31, float 3.000000e+01 ) ; <float> [#uses=2] + %tmp194 = load float* %tmp90 ; <float> [#uses=1] + %tmp196 = fcmp ugt float %tmp194, 0.000000e+00 ; <i1> [#uses=1] + br i1 %tmp196, label %bb207, label %cond_next200 + +cond_next200: ; preds = %bb188 + %tmp202 = load float* %tmp111 ; <float> [#uses=1] + %tmp204 = fcmp ult float %tmp202, 0.000000e+00 ; <i1> [#uses=1] + br i1 %tmp204, label %bb207, label %bb208 + +bb207: ; preds = %cond_next200, %bb188 + unwind + +bb208: ; preds = %cond_next200 + %tmp212 = call fastcc float @c34003a__ident.154( %struct.FRAME.c34003a* %FRAME.31, float 0.000000e+00 ) ; <float> [#uses=1] + %tmp214 = fcmp oge float %tmp212, %tmp192 ; <i1> [#uses=1] + %tmp217 = fcmp oge float %tmp192, 1.000000e+02 ; <i1> [#uses=1] + %tmp221 = or i1 %tmp214, %tmp217 ; <i1> [#uses=1] + br i1 %tmp221, label %cond_true224, label %UnifiedReturnBlock + +cond_true224: ; preds = %bb208 + call void @abort( ) noreturn + ret void + +UnifiedReturnBlock: ; preds = %bb208 + ret void +} + +declare fastcc float @c34003a__ident.154(%struct.FRAME.c34003a* %CHAIN.32, float %x) + +declare i32 @report__ident_int(i32 %x) + +declare void @abort() noreturn diff --git a/test/CodeGen/X86/2007-06-15-IntToMMX.ll b/test/CodeGen/X86/2007-06-15-IntToMMX.ll new file mode 100644 index 0000000..e608ac3 --- /dev/null +++ b/test/CodeGen/X86/2007-06-15-IntToMMX.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep paddusw +@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] + +define void @foo(<1 x i64> %A, <1 x i64> %B) { +entry: + %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1] + %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1] + store <1 x i64> %tmp8, <1 x i64>* @R + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/2007-06-28-X86-64-isel.ll b/test/CodeGen/X86/2007-06-28-X86-64-isel.ll new file mode 100644 index 0000000..5c22f14 --- /dev/null +++ b/test/CodeGen/X86/2007-06-28-X86-64-isel.ll @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | | llc -march=x86-64 -mattr=+sse2 + +define void @test() { + %tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) ) + %tmp2 = bitcast <8 x i16> %tmp1 to <4 x i32> + br i1 false, label %bb1, label %bb2 + +bb2: + %tmp38007.i = extractelement <4 x i32> %tmp2, i32 3 + ret void + +bb1: + ret void +} + +declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>) diff --git a/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll b/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll new file mode 100644 index 0000000..eaedb52 --- /dev/null +++ b/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll @@ -0,0 +1,50 @@ +; RUN: llvm-as < %s | | llc -march=x86 -mattr=+sse2 + +define void @test() { +entry: + br i1 false, label %bb13944.preheader, label %cond_true418 + +cond_true418: ; preds = %entry + ret void + +bb13944.preheader: ; preds = %entry + br i1 false, label %bb3517, label %bb13968.preheader + +bb3517: ; preds = %bb13944.preheader + br i1 false, label %cond_false7408, label %cond_next11422 + +cond_false7408: ; preds = %bb3517 + switch i32 0, label %cond_false10578 [ + i32 7, label %cond_next11422 + i32 6, label %cond_true7828 + i32 1, label %cond_true10095 + i32 3, label %cond_true10095 + i32 5, label %cond_true10176 + i32 24, label %cond_true10176 + ] + +cond_true7828: ; preds = %cond_false7408 + br i1 false, label %cond_next8191, label %cond_true8045 + +cond_true8045: ; preds = %cond_true7828 + ret void + +cond_next8191: ; preds = %cond_true7828 + %tmp8234 = sub <4 x i32> < i32 939524096, i32 939524096, i32 939524096, i32 939524096 >, zeroinitializer ; <<4 x i32>> [#uses=0] + ret void + +cond_true10095: ; preds = %cond_false7408, %cond_false7408 + ret void + +cond_true10176: ; preds = %cond_false7408, %cond_false7408 + ret void + +cond_false10578: ; preds = %cond_false7408 + ret void + +cond_next11422: ; preds = %cond_false7408, %bb3517 + ret void + +bb13968.preheader: ; preds = %bb13944.preheader + ret void +} diff --git a/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll new file mode 100644 index 0000000..73ecf69 --- /dev/null +++ b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | | llc -march=x86 -mattr=+sse2 + +define void @test(<4 x float>* %arg) { + %tmp89 = getelementptr <4 x float>* %arg, i64 3 + %tmp1144 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, zeroinitializer + store <4 x float> %tmp1144, <4 x float>* null + %tmp1149 = load <4 x float>* %tmp89 + %tmp1150 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp1149 + store <4 x float> %tmp1150, <4 x float>* %tmp89 + ret void +} diff --git a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll new file mode 100644 index 0000000..b2b1a94 --- /dev/null +++ b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rsi, %mm0} && +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rdi, %mm1} && +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {paddusw %mm0, %mm1} + +@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] + +define void @foo(<1 x i64> %A, <1 x i64> %B) { +entry: + %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1] + %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1] + store <1 x i64> %tmp8, <1 x i64>* @R + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/2007-07-10-StackerAssert.ll b/test/CodeGen/X86/2007-07-10-StackerAssert.ll new file mode 100644 index 0000000..120284f --- /dev/null +++ b/test/CodeGen/X86/2007-07-10-StackerAssert.ll @@ -0,0 +1,41 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic +; PR1545 + +@.str97 = external constant [56 x i8] ; <[56 x i8]*> [#uses=1] + +declare void @PR_LogPrint(i8*, ...) + +define i32 @_ZN13nsPrintEngine19SetupToPrintContentEP16nsIDeviceContextP12nsIDOMWindow() { +entry: + br i1 false, label %cond_true122, label %cond_next453 + +cond_true122: ; preds = %entry + br i1 false, label %bb164, label %cond_true136 + +cond_true136: ; preds = %cond_true122 + ret i32 0 + +bb164: ; preds = %cond_true122 + br i1 false, label %bb383, label %cond_true354 + +cond_true354: ; preds = %bb164 + ret i32 0 + +bb383: ; preds = %bb164 + %tmp408 = load float* null ; <float> [#uses=2] + br i1 false, label %cond_true425, label %cond_next443 + +cond_true425: ; preds = %bb383 + %tmp430 = load float* null ; <float> [#uses=1] + %tmp432 = sub float %tmp430, %tmp408 ; <float> [#uses=1] + %tmp432433 = fpext float %tmp432 to double ; <double> [#uses=1] + %tmp434435 = fpext float %tmp408 to double ; <double> [#uses=1] + call void (i8*, ...)* @PR_LogPrint( i8* getelementptr ([56 x i8]* @.str97, i32 0, i32 0), double 0.000000e+00, double %tmp434435, double %tmp432433 ) + ret i32 0 + +cond_next443: ; preds = %bb383 + ret i32 0 + +cond_next453: ; preds = %entry + ret i32 0 +} diff --git a/test/CodeGen/X86/aliases.ll b/test/CodeGen/X86/aliases.ll new file mode 100644 index 0000000..9bd6140 --- /dev/null +++ b/test/CodeGen/X86/aliases.ll @@ -0,0 +1,32 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=i686-pc-linux-gnu -o %t -f +; RUN: grep -c set %t | grep 5 +; RUN: grep -c globl %t | grep 4 +; RUN: grep -c weak %t | grep 1 + +@bar = external global i32 +@foo1 = alias i32* @bar +@foo2 = alias i32* @bar + +%FunTy = type i32() + +declare i32 @foo_f() +@bar_f = alias weak %FunTy* @foo_f + +@bar_i = alias internal i32* @bar + +@A = alias bitcast (i32* @bar to i64*) + +define i32 @test() { +entry: + %tmp = load i32* @foo1 + %tmp1 = load i32* @foo2 + %tmp0 = load i32* @bar_i + %tmp2 = call i32 @foo_f() + %tmp3 = add i32 %tmp, %tmp2 + %tmp4 = call %FunTy* @bar_f() + %tmp5 = add i32 %tmp3, %tmp4 + %tmp6 = add i32 %tmp1, %tmp5 + %tmp7 = add i32 %tmp6, %tmp0 + ret i32 %tmp7 +} diff --git a/test/CodeGen/X86/alloca-align-rounding.ll b/test/CodeGen/X86/alloca-align-rounding.ll new file mode 100644 index 0000000..899dbff --- /dev/null +++ b/test/CodeGen/X86/alloca-align-rounding.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | not grep and + +declare void @bar(<2 x i64>* %n) + +define void @foo(i32 %h) { + %p = alloca <2 x i64>, i32 %h + call void @bar(<2 x i64>* %p) + ret void +} diff --git a/test/CodeGen/X86/and-or-fold.ll b/test/CodeGen/X86/and-or-fold.ll new file mode 100644 index 0000000..3240bdf --- /dev/null +++ b/test/CodeGen/X86/and-or-fold.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep and | wc -l | grep 1 + +; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1 +; in this case. +uint %test6(uint %x, ushort %y) { + %tmp1 = cast ushort %y to uint + %tmp2 = and uint %tmp1, 127 ; <uint> [#uses=1] + %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1] + %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1] + ret uint %tmp6 +} + diff --git a/test/CodeGen/X86/asm-global-imm.ll b/test/CodeGen/X86/asm-global-imm.ll new file mode 100644 index 0000000..4ca4c58 --- /dev/null +++ b/test/CodeGen/X86/asm-global-imm.ll @@ -0,0 +1,31 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -relocation-model=static | \ +; RUN: grep {test1 \$_GV} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -relocation-model=static | \ +; RUN: grep {test2 _GV} +; PR882 + +target datalayout = "e-p:32:32" +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin9.0.0d2" +%GV = weak global int 0 ; <int*> [#uses=2] +%str = external global [12 x sbyte] ; <[12 x sbyte]*> [#uses=1] + +implementation ; Functions: + +void %foo() { +entry: + tail call void asm sideeffect "test1 $0", "i,~{dirflag},~{fpsr},~{flags}"( int* %GV ) + tail call void asm sideeffect "test2 ${0:c}", "i,~{dirflag},~{fpsr},~{flags}"( int* %GV ) + ret void +} + + +void %unknown_bootoption() { +entry: + call void asm sideeffect "ud2\0A\09.word ${0:c}\0A\09.long ${1:c}\0A", +"i,i,~{dirflag},~{fpsr},~{flags}"( int 235, sbyte* getelementptr ([12 x sbyte]* +%str, int 0, uint 0) ) + ret void +} + diff --git a/test/CodeGen/X86/bitcast.ll b/test/CodeGen/X86/bitcast.ll new file mode 100644 index 0000000..d8bc069 --- /dev/null +++ b/test/CodeGen/X86/bitcast.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 +; PR1033 + +long %test1(double %t) { + %u = bitcast double %t to long + ret long %u +} + +double %test2(long %t) { + %u = bitcast long %t to double + ret double %u +} + +int %test3(float %t) { + %u = bitcast float %t to int + ret int %u +} + +float %test4(int %t) { + %u = bitcast int %t to float + ret float %u +} diff --git a/test/CodeGen/X86/bitcast2.ll b/test/CodeGen/X86/bitcast2.ll new file mode 100644 index 0000000..edf8523 --- /dev/null +++ b/test/CodeGen/X86/bitcast2.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | not grep rsp + +define i64 @test1(double %A) { + %B = bitcast double %A to i64 + ret i64 %B +} + +define double @test2(i64 %A) { + %B = bitcast i64 %A to double + ret double %B +} + diff --git a/test/CodeGen/X86/bswap.ll b/test/CodeGen/X86/bswap.ll new file mode 100644 index 0000000..4749ea8 --- /dev/null +++ b/test/CodeGen/X86/bswap.ll @@ -0,0 +1,24 @@ +; bswap should be constant folded when it is passed a constant argument + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep bswapl | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep rolw | wc -l | grep 1 + +declare ushort %llvm.bswap.i16(ushort) +declare uint %llvm.bswap.i32(uint) +declare ulong %llvm.bswap.i64(ulong) + +ushort %W(ushort %A) { + %Z = call ushort %llvm.bswap.i16(ushort %A) + ret ushort %Z +} + +uint %X(uint %A) { + %Z = call uint %llvm.bswap.i32(uint %A) + ret uint %Z +} + +ulong %Y(ulong %A) { + %Z = call ulong %llvm.bswap.i64(ulong %A) + ret ulong %Z +} diff --git a/test/CodeGen/X86/cmp-test.ll b/test/CodeGen/X86/cmp-test.ll new file mode 100644 index 0000000..78d8d8f --- /dev/null +++ b/test/CodeGen/X86/cmp-test.ll @@ -0,0 +1,27 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep cmp | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep test | wc -l | grep 1 + +int %f1(int %X, int* %y) { + %tmp = load int* %y + %tmp = seteq int %tmp, 0 + br bool %tmp, label %ReturnBlock, label %cond_true + +cond_true: + ret int 1 + +ReturnBlock: + ret int 0 +} + +int %f2(int %X, int* %y) { + %tmp = load int* %y + %tmp1 = shl int %tmp, ubyte 3 + %tmp1 = seteq int %tmp1, 0 + br bool %tmp1, label %ReturnBlock, label %cond_true + +cond_true: + ret int 1 + +ReturnBlock: + ret int 0 +} diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll new file mode 100644 index 0000000..462b31e --- /dev/null +++ b/test/CodeGen/X86/commute-two-addr.ll @@ -0,0 +1,25 @@ +; The register allocator can commute two-address instructions to avoid +; insertion of register-register copies. + +; Make sure there are only 3 mov's for each testcase +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {mov } | wc -l | grep 6 + + +target triple = "i686-pc-linux-gnu" + +%G = external global int + +declare void %ext(int) + +int %add_test(int %X, int %Y) { + %Z = add int %X, %Y ;; Last use of Y, but not of X. + store int %Z, int* %G + ret int %X +} + +int %xor_test(int %X, int %Y) { + %Z = xor int %X, %Y ;; Last use of Y, but not of X. + store int %Z, int* %G + ret int %X +} diff --git a/test/CodeGen/X86/compare-add.ll b/test/CodeGen/X86/compare-add.ll new file mode 100644 index 0000000..d3d7668 --- /dev/null +++ b/test/CodeGen/X86/compare-add.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep add +bool %X(int %X) { + %Y = add int %X, 14 + %Z = setne int %Y, 12345 + ret bool %Z +} + diff --git a/test/CodeGen/X86/compare_folding.llx b/test/CodeGen/X86/compare_folding.llx new file mode 100644 index 0000000..631bc92 --- /dev/null +++ b/test/CodeGen/X86/compare_folding.llx @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah | \ +; RUN: grep movsd | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah | \ +; RUN: grep ucomisd +declare bool %llvm.isunordered.f64(double,double) + +bool %test1(double %X, double %Y) { ;; Returns isunordered(X,Y) + %COM = call bool %llvm.isunordered.f64(double %X, double %Y) + ret bool %COM +} diff --git a/test/CodeGen/X86/darwin-no-dead-strip.ll b/test/CodeGen/X86/darwin-no-dead-strip.ll new file mode 100644 index 0000000..8e671ff --- /dev/null +++ b/test/CodeGen/X86/darwin-no-dead-strip.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc | grep no_dead_strip + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8.7.2" +%x = weak global int 0 ; <int*> [#uses=1] +%llvm.used = appending global [1 x sbyte*] [ sbyte* cast (int* %x to sbyte*) ] diff --git a/test/CodeGen/X86/dg.exp b/test/CodeGen/X86/dg.exp new file mode 100644 index 0000000..161fccc --- /dev/null +++ b/test/CodeGen/X86/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target X86] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] +} diff --git a/test/CodeGen/X86/div_const.ll b/test/CodeGen/X86/div_const.ll new file mode 100644 index 0000000..326fd77 --- /dev/null +++ b/test/CodeGen/X86/div_const.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep 365384439 + +uint %f9188_mul365384439_shift27(uint %A) { + %tmp1 = div uint %A, 1577682821 ; <uint> [#uses=1] + ret uint %tmp1 +} + diff --git a/test/CodeGen/X86/dollar-name.ll b/test/CodeGen/X86/dollar-name.ll new file mode 100644 index 0000000..87c7315 --- /dev/null +++ b/test/CodeGen/X86/dollar-name.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$bar) | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$qux) | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$hen) | wc -l | grep 1 +; PR1339 + +@"$bar" = global i32 zeroinitializer +@"$qux" = external global i32 + +define i32 @"$foo"() { + %m = load i32* @"$bar" + %n = load i32* @"$qux" + %t = add i32 %m, %n + %u = call i32 @"$hen"(i32 %t) + ret i32 %u +} + +declare i32 @"$hen"(i32 %a) diff --git a/test/CodeGen/X86/extend.ll b/test/CodeGen/X86/extend.ll new file mode 100644 index 0000000..fdad790 --- /dev/null +++ b/test/CodeGen/X86/extend.ll @@ -0,0 +1,19 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | grep movzx | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | grep movsx | wc -l | grep 1 + +%G1 = internal global ubyte 0 ; <ubyte*> [#uses=1] +%G2 = internal global sbyte 0 ; <sbyte*> [#uses=1] + +implementation ; Functions: + +short %test1() { ;; one zext + %tmp.0 = load ubyte* %G1 ; <ubyte> [#uses=1] + %tmp.3 = cast ubyte %tmp.0 to short ; <short> [#uses=1] + ret short %tmp.3 +} + +short %test2() { ;; one sext + %tmp.0 = load sbyte* %G2 ; <sbyte> [#uses=1] + %tmp.3 = cast sbyte %tmp.0 to short ; <short> [#uses=1] + ret short %tmp.3 +} diff --git a/test/CodeGen/X86/extern_weak.ll b/test/CodeGen/X86/extern_weak.ll new file mode 100644 index 0000000..853a713 --- /dev/null +++ b/test/CodeGen/X86/extern_weak.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=i686-apple-darwin | grep weak_reference | wc -l | grep 2 + +%Y = global int (sbyte*)* %X +declare extern_weak int %X(sbyte*) + +void %bar() { + tail call void (...)* %foo( ) + ret void +} + +declare extern_weak void %foo(...) diff --git a/test/CodeGen/X86/fabs.ll b/test/CodeGen/X86/fabs.ll new file mode 100644 index 0000000..dd94613 --- /dev/null +++ b/test/CodeGen/X86/fabs.ll @@ -0,0 +1,24 @@ +; Make sure this testcase codegens to the fabs instruction, not a call to fabsf +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=-sse2,-sse3 | \ +; RUN: grep fabs\$ | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mattr=-sse2,-sse3 -enable-unsafe-fp-math | \ +; RUN: grep fabs\$ | wc -l | grep 2 + +target endian = little +target pointersize = 32 + +declare float %fabsf(float) + +float %test1(float %X) { + %Y = call float %fabsf(float %X) + ret float %Y +} + +double %test2(double %X) { + %Y = setge double %X, -0.0 + %Z = sub double -0.0, %X + %Q = select bool %Y, double %X, double %Z + ret double %Q +} + diff --git a/test/CodeGen/X86/fast-cc-callee-pops.ll b/test/CodeGen/X86/fast-cc-callee-pops.ll new file mode 100644 index 0000000..ed15dd2 --- /dev/null +++ b/test/CodeGen/X86/fast-cc-callee-pops.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -x86-asm-syntax=intel -mcpu=yonah | grep {ret 20} + +; Check that a fastcc function pops its stack variables before returning. + +x86_fastcallcc void %func(long %X, long %Y, float %G, double %Z) { + ret void +} diff --git a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll new file mode 100644 index 0000000..252981f --- /dev/null +++ b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {add ESP, 8} + +target triple = "i686-pc-linux-gnu" + +declare x86_fastcallcc void %func(int *%X, long %Y) + +x86_fastcallcc void %caller(int, long) { + %X = alloca int + call x86_fastcallcc void %func(int* %X, long 0) ;; not a tail call + ret void +} diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll new file mode 100644 index 0000000..dc88015 --- /dev/null +++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {mov EDX, 1} +; check that fastcc is passing stuff in regs. + +declare x86_fastcallcc i64 @callee(i64) + +define i64 @caller() { + %X = callx86_fastcallcc i64 @callee( i64 4294967299 ) ; <i64> [#uses=1] + ret i64 %X +} + +define x86_fastcallcc i64 @caller2(i64 %X) { + ret i64 %X +} + diff --git a/test/CodeGen/X86/fastcall-correct-mangling.ll b/test/CodeGen/X86/fastcall-correct-mangling.ll new file mode 100644 index 0000000..c513666 --- /dev/null +++ b/test/CodeGen/X86/fastcall-correct-mangling.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mtriple=mingw32 | \ +; RUN: grep {@12} + +; Check that a fastcall function gets correct mangling + +x86_fastcallcc void %func(long %X, ubyte %Y, ubyte %G, ushort %Z) { + ret void +} diff --git a/test/CodeGen/X86/fildll.ll b/test/CodeGen/X86/fildll.ll new file mode 100644 index 0000000..711eede --- /dev/null +++ b/test/CodeGen/X86/fildll.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | wc -l | grep 2 + +fastcc double %sint64_to_fp(long %X) { + %R = cast long %X to double + ret double %R +} + +fastcc double %uint64_to_fp(ulong %X) { + %R = cast ulong %X to double + ret double %R +} diff --git a/test/CodeGen/X86/fp-immediate-shorten.ll b/test/CodeGen/X86/fp-immediate-shorten.ll new file mode 100644 index 0000000..73c184b --- /dev/null +++ b/test/CodeGen/X86/fp-immediate-shorten.ll @@ -0,0 +1,6 @@ +;; Test that this FP immediate is stored in the constant pool as a float. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=-sse2,-sse3 | \ +; RUN: grep {.long.1123418112} + +double %D() { ret double 123.0 } diff --git a/test/CodeGen/X86/fp-stack-compare.ll b/test/CodeGen/X86/fp-stack-compare.ll new file mode 100644 index 0000000..2592052 --- /dev/null +++ b/test/CodeGen/X86/fp-stack-compare.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386 | \ +; RUN: grep {fucomi.*st.\[12\]} +; PR1012 + +float %foo(float *%col.2.0) { + %tmp = load float* %col.2.0 ; <float> [#uses=3] + %tmp16 = setlt float %tmp, 0.000000e+00 ; <bool> [#uses=1] + %tmp20 = sub float -0.000000e+00, %tmp ; <float> [#uses=1] + %iftmp.2.0 = select bool %tmp16, float %tmp20, float %tmp + ret float %iftmp.2.0 +} + diff --git a/test/CodeGen/X86/fp-stack-ret.ll b/test/CodeGen/X86/fp-stack-ret.ll new file mode 100644 index 0000000..69c5fc5 --- /dev/null +++ b/test/CodeGen/X86/fp-stack-ret.ll @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 > %t +; RUN: grep fldl %t | wc -l | grep 1 +; RUN: not grep xmm %t +; RUN: grep {sub.*esp} %t | wc -l | grep 1 + +; These testcases shouldn't require loading into an XMM register then storing +; to memory, then reloading into an FPStack reg. + +define double @test1(double *%P) { + %A = load double* %P + ret double %A +} + +; fastcc should return a value +define fastcc double @test2(<2 x double> %A) { + %B = extractelement <2 x double> %A, i32 0 + ret double %B +} + +define fastcc double @test3(<4 x float> %A) { + %B = bitcast <4 x float> %A to <2 x double> + %C = call fastcc double @test2(<2 x double> %B) + ret double %C +} + diff --git a/test/CodeGen/X86/fp_constant_op.llx b/test/CodeGen/X86/fp_constant_op.llx new file mode 100644 index 0000000..30e06c0 --- /dev/null +++ b/test/CodeGen/X86/fp_constant_op.llx @@ -0,0 +1,35 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \ +; RUN: grep -i ST | not grep {fadd\\|fsub\\|fdiv\\|fmul} + +; Test that the load of the constant is folded into the operation. + +double %test_add(double %P) { + %tmp.1 = add double %P, 0x405EC00000000000 + ret double %tmp.1 +} + +double %test_mul(double %P) { + %tmp.1 = mul double %P, 0x405EC00000000000 + ret double %tmp.1 +} + +double %test_sub(double %P) { + %tmp.1 = sub double %P, 0x405EC00000000000 + ret double %tmp.1 +} + +double %test_subr(double %P) { + %tmp.1 = sub double 0x405EC00000000000, %P + ret double %tmp.1 +} + +double %test_div(double %P) { + %tmp.1 = div double %P, 0x405EC00000000000 + ret double %tmp.1 +} + +double %test_divr(double %P) { + %tmp.1 = div double 0x405EC00000000000, %P + ret double %tmp.1 +} + diff --git a/test/CodeGen/X86/fp_load_cast_fold.llx b/test/CodeGen/X86/fp_load_cast_fold.llx new file mode 100644 index 0000000..b134695 --- /dev/null +++ b/test/CodeGen/X86/fp_load_cast_fold.llx @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep fild | not grep ESP +double %short(short* %P) { + %V = load short* %P + %V2 = cast short %V to double + ret double %V2 +} +double %int(int* %P) { + %V = load int* %P + %V2 = cast int %V to double + ret double %V2 +} +double %long(long* %P) { + %V = load long* %P + %V2 = cast long %V to double + ret double %V2 +} + diff --git a/test/CodeGen/X86/fp_load_fold.llx b/test/CodeGen/X86/fp_load_fold.llx new file mode 100644 index 0000000..91f41f6 --- /dev/null +++ b/test/CodeGen/X86/fp_load_fold.llx @@ -0,0 +1,41 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep -i ST | not grep {fadd\\|fsub\\|fdiv\\|fmul} + +; Test that the load of the memory location is folded into the operation. + + +double %test_add(double %X, double *%P) { + %Y = load double* %P + %R = add double %X, %Y + ret double %R +} + +double %test_mul(double %X, double *%P) { + %Y = load double* %P + %R = mul double %X, %Y + ret double %R +} + +double %test_sub(double %X, double *%P) { + %Y = load double* %P + %R = sub double %X, %Y + ret double %R +} + +double %test_subr(double %X, double *%P) { + %Y = load double* %P + %R = sub double %Y, %X + ret double %R +} + +double %test_div(double %X, double *%P) { + %Y = load double* %P + %R = div double %X, %Y + ret double %R +} + +double %test_divr(double %X, double *%P) { + %Y = load double* %P + %R = div double %Y, %X + ret double %R +} diff --git a/test/CodeGen/X86/i128-mul.ll b/test/CodeGen/X86/i128-mul.ll new file mode 100644 index 0000000..f8c732e --- /dev/null +++ b/test/CodeGen/X86/i128-mul.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=x86-64 +; PR1198 + +define i64 @foo(i64 %x, i64 %y) { + %tmp0 = zext i64 %x to i128 + %tmp1 = zext i64 %y to i128 + %tmp2 = mul i128 %tmp0, %tmp1 + %tmp7 = zext i32 64 to i128 + %tmp3 = lshr i128 %tmp2, %tmp7 + %tmp4 = trunc i128 %tmp3 to i64 + ret i64 %tmp4 +} diff --git a/test/CodeGen/X86/i128-ret.ll b/test/CodeGen/X86/i128-ret.ll new file mode 100644 index 0000000..d9bddc9 --- /dev/null +++ b/test/CodeGen/X86/i128-ret.ll @@ -0,0 +1,8 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq 8(%rdi), %rdx} +; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq (%rdi), %rax} + +define i128 @test(i128 *%P) { + %A = load i128* %P + ret i128 %A +} + diff --git a/test/CodeGen/X86/iabs.ll b/test/CodeGen/X86/iabs.ll new file mode 100644 index 0000000..7c23645 --- /dev/null +++ b/test/CodeGen/X86/iabs.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -stats |& \ +; RUN: grep {6 .*Number of machine instrs printed} + +;; Integer absolute value, should produce something at least as good as: +;; movl %edi, %eax +;; sarl $31, %eax +;; addl %eax, %edi +;; xorl %eax, %edi +;; movl %edi, %eax +;; ret +define i32 @test(i32 %a) { + %tmp1neg = sub i32 0, %a + %b = icmp sgt i32 %a, -1 + %abs = select i1 %b, i32 %a, i32 %tmp1neg + ret i32 %abs +} + diff --git a/test/CodeGen/X86/illegal-vector-args-return.ll b/test/CodeGen/X86/illegal-vector-args-return.ll new file mode 100644 index 0000000..d15c2cb --- /dev/null +++ b/test/CodeGen/X86/illegal-vector-args-return.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0} + +define <4 x double> @foo(<4 x double> %x, <4 x double> %z) { + %y = mul <4 x double> %x, %z + ret <4 x double> %y +} + +define <8 x float> @bar(<8 x float> %x, <8 x float> %z) { + %y = add <8 x float> %x, %z + ret <8 x float> %y +} diff --git a/test/CodeGen/X86/imul-lea.ll b/test/CodeGen/X86/imul-lea.ll new file mode 100644 index 0000000..9d6fd98 --- /dev/null +++ b/test/CodeGen/X86/imul-lea.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep lea + +declare int %foo() +int %test() { + %tmp.0 = tail call int %foo( ) ; <int> [#uses=1] + %tmp.1 = mul int %tmp.0, 9 ; <int> [#uses=1] + ret int %tmp.1 +} diff --git a/test/CodeGen/X86/inline-asm-x-scalar.ll b/test/CodeGen/X86/inline-asm-x-scalar.ll new file mode 100644 index 0000000..d1bac0c --- /dev/null +++ b/test/CodeGen/X86/inline-asm-x-scalar.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah + +define void @test1() { + tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000) + ret void +} + +define void @test2() { + %tmp53 = tail call i32 asm "ucomiss $1, $3\0Acmovae $2, $0 ", "=r,mx,mr,x,0,~{dirflag},~{fpsr},~{flags},~{cc}"( float 0x41E0000000000000, i32 2147483647, float 0.000000e+00, i32 0 ) ; <i32> [#uses + unreachable +} + +define void @test3() { + tail call void asm sideeffect "ucomiss $0, $1", "mx,x,~{dirflag},~{fpsr},~{flags},~{cc}"( float 0x41E0000000000000, i32 65536 ) + ret void +} + +define void @test4() { + %tmp1 = tail call float asm "", "=x,0,~{dirflag},~{fpsr},~{flags}"( float 0x47EFFFFFE0000000 ); <float> [#uses=1] + %tmp4 = sub float %tmp1, 0x3810000000000000 ; <float> [#uses=1] + tail call void asm sideeffect "", "x,~{dirflag},~{fpsr},~{flags}"( float %tmp4 ) + ret void +} + diff --git a/test/CodeGen/X86/inline-asm.ll b/test/CodeGen/X86/inline-asm.ll new file mode 100644 index 0000000..54dfe76 --- /dev/null +++ b/test/CodeGen/X86/inline-asm.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=x86 + +define i32 @test1() { + ; Dest is AX, dest type = i32. + %tmp4 = call i32 asm sideeffect "FROB $0", "={ax}"() + ret i32 %tmp4 +} + +define void @test2(i32 %V) { + ; input is AX, in type = i32. + call void asm sideeffect "FROB $0", "{ax}"(i32 %V) + ret void +} + +define void @test3() { + ; FP constant as a memory operand. + tail call void asm sideeffect "frob $0", "m"( float 0x41E0000000000000) + ret void +} + + diff --git a/test/CodeGen/X86/isel-sink.ll b/test/CodeGen/X86/isel-sink.ll new file mode 100644 index 0000000..7a480b2 --- /dev/null +++ b/test/CodeGen/X86/isel-sink.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=x86 | not grep lea +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin8 | \ +; RUN: grep {movl \$4, (.*,.*,4)} + +define i32 @test(i32* %X, i32 %B) { + ; This gep should be sunk out of this block into the load/store users. + %P = getelementptr i32* %X, i32 %B + %G = icmp ult i32 %B, 1234 + br i1 %G, label %T, label %F +T: + store i32 4, i32* %P + ret i32 141 +F: + %V = load i32* %P + ret i32 %V +} + + diff --git a/test/CodeGen/X86/isnan.llx b/test/CodeGen/X86/isnan.llx new file mode 100644 index 0000000..0665e55 --- /dev/null +++ b/test/CodeGen/X86/isnan.llx @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep call +declare bool %llvm.isunordered.f64(double) + +bool %test_isnan(double %X) { + %R = call bool %llvm.isunordered.f64(double %X, double %X) + ret bool %R +} diff --git a/test/CodeGen/X86/ispositive.ll b/test/CodeGen/X86/ispositive.ll new file mode 100644 index 0000000..3799b9c --- /dev/null +++ b/test/CodeGen/X86/ispositive.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31} + +define i32 @test1(i32 %X) { +entry: + icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] + zext i1 %0 to i32 ; <i32>:1 [#uses=1] + ret i32 %1 +} + diff --git a/test/CodeGen/X86/jump_sign.ll b/test/CodeGen/X86/jump_sign.ll new file mode 100644 index 0000000..16bd7bc --- /dev/null +++ b/test/CodeGen/X86/jump_sign.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep jns +int %f(int %X) { +entry: + %tmp1 = add int %X, 1 ; <int> [#uses=1] + %tmp = setlt int %tmp1, 0 ; <bool> [#uses=1] + br bool %tmp, label %cond_true, label %cond_next + +cond_true: ; preds = %entry + %tmp2 = tail call int (...)* %bar( ) ; <int> [#uses=0] + br label %cond_next + +cond_next: ; preds = %entry, %cond_true + %tmp3 = tail call int (...)* %baz( ) ; <int> [#uses=0] + ret int undef +} + +declare int %bar(...) + +declare int %baz(...) + diff --git a/test/CodeGen/X86/lea-2.ll b/test/CodeGen/X86/lea-2.ll new file mode 100644 index 0000000..823bdb5 --- /dev/null +++ b/test/CodeGen/X86/lea-2.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {lea EAX, DWORD PTR \\\[... + 4\\*... - 5\\\]} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: not grep add + +int %test1(int %A, int %B) { + %tmp1 = shl int %A, ubyte 2 ; <int> [#uses=1] + %tmp3 = add int %B, -5 ; <int> [#uses=1] + %tmp4 = add int %tmp3, %tmp1 ; <int> [#uses=1] + ret int %tmp4 +} + diff --git a/test/CodeGen/X86/lea-3.ll b/test/CodeGen/X86/lea-3.ll new file mode 100644 index 0000000..89991fd --- /dev/null +++ b/test/CodeGen/X86/lea-3.ll @@ -0,0 +1,20 @@ + +; RUN: llvm-as < %s | llc -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax} +define i32 @test(i32 %a) { + %tmp2 = mul i32 %a, 3 ; <i32> [#uses=1] + ret i32 %tmp2 +} + +; RUN: llvm-as < %s | llc -march=x86-64 | grep {leaq (,%rdi,4), %rax} +define i64 @test2(i64 %a) { + %tmp2 = shl i64 %a, 2 + %tmp3 = or i64 %tmp2, %a + ret i64 %tmp3 +} + +;; TODO! LEA instead of shift + copy. +define i64 @test3(i64 %a) { + %tmp2 = shl i64 %a, 3 + ret i64 %tmp2 +} + diff --git a/test/CodeGen/X86/lea.ll b/test/CodeGen/X86/lea.ll new file mode 100644 index 0000000..675376b --- /dev/null +++ b/test/CodeGen/X86/lea.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep orl +int %test(int %x) { + %tmp1 = shl int %x, ubyte 3 + %tmp2 = add int %tmp1, 7 + ret int %tmp2 +} diff --git a/test/CodeGen/X86/long-setcc.ll b/test/CodeGen/X86/long-setcc.ll new file mode 100644 index 0000000..6097d96 --- /dev/null +++ b/test/CodeGen/X86/long-setcc.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep cmp | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 | grep shr | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 | grep xor | wc -l | grep 1 + +define i1 @t1(i64 %x) { + %B = icmp slt i64 %x, 0 + ret i1 %B +} + +define i1 @t2(i64 %x) { + %tmp = icmp ult i64 %x, 4294967296 + ret i1 %tmp +} + +define i1 @t3(i32 %x) { + %tmp = icmp ugt i32 %x, -1 + ret i1 %tmp +} diff --git a/test/CodeGen/X86/loop-hoist.ll b/test/CodeGen/X86/loop-hoist.ll new file mode 100644 index 0000000..2c37b4d --- /dev/null +++ b/test/CodeGen/X86/loop-hoist.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 |\ +; RUN: grep L_Arr.non_lazy_ptr +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 |\ +; RUN: %prcontext L_Arr.non_lazy_ptr 1 | grep {4(%esp)} + +%Arr = external global [0 x int] ; <[0 x int]*> [#uses=2] + +implementation ; Functions: + +void %foo(int %N.in) { +entry: + %N = cast int %N.in to uint ; <uint> [#uses=1] + br label %cond_true + +cond_true: ; preds = %cond_true, %entry + %indvar = phi uint [ 0, %entry ], [ %indvar.next, %cond_true ] ; <uint> [#uses=3] + %i.0.0 = cast uint %indvar to int ; <int> [#uses=1] + %tmp = getelementptr [0 x int]* %Arr, int 0, int %i.0.0 + store int %i.0.0, int* %tmp + %indvar.next = add uint %indvar, 1 ; <uint> [#uses=2] + %exitcond = seteq uint %indvar.next, %N ; <bool> [#uses=1] + br bool %exitcond, label %return, label %cond_true + +return: ; preds = %cond_true, %entry + ret void +} + diff --git a/test/CodeGen/X86/loop-strength-reduce.ll b/test/CodeGen/X86/loop-strength-reduce.ll new file mode 100644 index 0000000..eb1eee8 --- /dev/null +++ b/test/CodeGen/X86/loop-strength-reduce.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep {A(} | wc -l | grep 1 +; +; Make sure the common loop invariant _A(reg) is hoisted up to preheader. + +%A = internal global [16 x [16 x int]] zeroinitializer, align 32 + +void %test(int %row, int %N.in) { +entry: + %N = cast int %N.in to uint + %tmp5 = setgt int %N.in, 0 + br bool %tmp5, label %cond_true, label %return + +cond_true: + %indvar = phi uint [ 0, %entry ], [ %indvar.next, %cond_true ] + %i.0.0 = cast uint %indvar to int + %tmp2 = add int %i.0.0, 1 + %tmp = getelementptr [16 x [16 x int]]* %A, int 0, int %row, int %tmp2 + store int 4, int* %tmp + %tmp5 = add int %i.0.0, 2 + %tmp7 = getelementptr [16 x [16 x int]]* %A, int 0, int %row, int %tmp5 + store int 5, int* %tmp7 + %indvar.next = add uint %indvar, 1 + %exitcond = seteq uint %indvar.next, %N + br bool %exitcond, label %return, label %cond_true + +return: + ret void +} diff --git a/test/CodeGen/X86/loop-strength-reduce2.ll b/test/CodeGen/X86/loop-strength-reduce2.ll new file mode 100644 index 0000000..7ed3944 --- /dev/null +++ b/test/CodeGen/X86/loop-strength-reduce2.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=i686-apple-darwin -relocation-model=pic | not grep lea +; +; Make sure the PIC label flags2-"L1$pb" is not moved up to the preheader. + +%flags2 = internal global [8193 x sbyte] zeroinitializer, align 32 + +void %test(int %k, int %i) { +entry: + %i = bitcast int %i to uint + %k_addr.012 = shl int %i, ubyte 1 + %tmp14 = setgt int %k_addr.012, 8192 + br bool %tmp14, label %return, label %bb + +bb: + %indvar = phi uint [ 0, %entry ], [ %indvar.next, %bb ] + %tmp. = shl uint %i, ubyte 1 + %tmp.15 = mul uint %indvar, %i + %tmp.16 = add uint %tmp.15, %tmp. + %k_addr.0.0 = bitcast uint %tmp.16 to int + %tmp = getelementptr [8193 x sbyte]* %flags2, int 0, uint %tmp.16 + store sbyte 0, sbyte* %tmp + %k_addr.0 = add int %k_addr.0.0, %i + %tmp = setgt int %k_addr.0, 8192 + %indvar.next = add uint %indvar, 1 + br bool %tmp, label %return, label %bb + +return: + ret void +} diff --git a/test/CodeGen/X86/lsr-negative-stride.ll b/test/CodeGen/X86/lsr-negative-stride.ll new file mode 100644 index 0000000..7e906fc --- /dev/null +++ b/test/CodeGen/X86/lsr-negative-stride.ll @@ -0,0 +1,49 @@ +; RUN: llvm-as < %s | llc -march=x86 | not grep neg +; RUN: llvm-as < %s | llc -march=x86 | not grep sub.*esp +; RUN: llvm-as < %s | llc -march=x86 | not grep esi + +; This corresponds to: +;int t(int a, int b) { +; while (a != b) { +; if (a > b) +; a -= b; +; else +; b -= a; +; } +; return a; +;} + + +define i32 @t(i32 %a, i32 %b) { +entry: + %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1] + br i1 %tmp1434, label %bb17, label %bb.outer + +bb.outer: ; preds = %cond_false, %entry + %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5] + %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1] + br label %bb + +bb: ; preds = %cond_true, %bb.outer + %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2] + %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1] + %tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1] + %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6] + %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1] + br i1 %tmp3, label %cond_true, label %cond_false + +cond_true: ; preds = %bb + %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2] + %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1] + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] + br i1 %tmp1437, label %bb17, label %bb + +cond_false: ; preds = %bb + %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2] + %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1] + br i1 %tmp14, label %bb17, label %bb.outer + +bb17: ; preds = %cond_false, %cond_true, %entry + %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1] + ret i32 %a_addr.026.1 +} diff --git a/test/CodeGen/X86/mingw-alloca.ll b/test/CodeGen/X86/mingw-alloca.ll new file mode 100644 index 0000000..dd45883 --- /dev/null +++ b/test/CodeGen/X86/mingw-alloca.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -o %t -f +; RUN: grep __alloca %t | wc -l | grep 2 +; RUN: grep 8028 %t +; RUN: grep {pushl %eax} %t +; RUN: grep 8024 %t | wc -l | grep 2 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i386-mingw32" + +define void @foo1(i32 %N) { +entry: + %tmp14 = alloca i32, i32 %N ; <i32*> [#uses=1] + call void @bar1( i32* %tmp14 ) + ret void +} + +declare void @bar1(i32*) + +define void @foo2(i32 inreg %N) { +entry: + %A2 = alloca [2000 x i32], align 16 ; <[2000 x i32]*> [#uses=1] + %A2.sub = getelementptr [2000 x i32]* %A2, i32 0, i32 0 ; <i32*> [#uses=1] + call void @bar2( i32* %A2.sub, i32 %N ) + ret void +} + +declare void @bar2(i32*, i32) diff --git a/test/CodeGen/X86/mmx-arith.ll b/test/CodeGen/X86/mmx-arith.ll new file mode 100644 index 0000000..501786e --- /dev/null +++ b/test/CodeGen/X86/mmx-arith.ll @@ -0,0 +1,131 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx + +;; A basic sanity check to make sure that MMX arithmetic actually compiles. + +define void @foo(<8 x i8>* %A, <8 x i8>* %B) { +entry: + %tmp1 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1] + %tmp3 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp4 = add <8 x i8> %tmp1, %tmp3 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp4, <8 x i8>* %A + %tmp7 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp12 = tail call <8 x i8> @llvm.x86.mmx.padds.b( <8 x i8> %tmp4, <8 x i8> %tmp7 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp12, <8 x i8>* %A + %tmp16 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp21 = tail call <8 x i8> @llvm.x86.mmx.paddus.b( <8 x i8> %tmp12, <8 x i8> %tmp16 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp21, <8 x i8>* %A + %tmp27 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp28 = sub <8 x i8> %tmp21, %tmp27 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp28, <8 x i8>* %A + %tmp31 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp36 = tail call <8 x i8> @llvm.x86.mmx.psubs.b( <8 x i8> %tmp28, <8 x i8> %tmp31 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp36, <8 x i8>* %A + %tmp40 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp45 = tail call <8 x i8> @llvm.x86.mmx.psubus.b( <8 x i8> %tmp36, <8 x i8> %tmp40 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp45, <8 x i8>* %A + %tmp51 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp52 = mul <8 x i8> %tmp45, %tmp51 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp52, <8 x i8>* %A + %tmp57 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp58 = and <8 x i8> %tmp52, %tmp57 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp58, <8 x i8>* %A + %tmp63 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp64 = or <8 x i8> %tmp58, %tmp63 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp64, <8 x i8>* %A + %tmp69 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp70 = xor <8 x i8> %tmp64, %tmp69 ; <<8 x i8>> [#uses=1] + store <8 x i8> %tmp70, <8 x i8>* %A + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +define void @baz(<2 x i32>* %A, <2 x i32>* %B) { +entry: + %tmp1 = load <2 x i32>* %A ; <<2 x i32>> [#uses=1] + %tmp3 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp4 = add <2 x i32> %tmp1, %tmp3 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp4, <2 x i32>* %A + %tmp9 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp10 = sub <2 x i32> %tmp4, %tmp9 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp10, <2 x i32>* %A + %tmp15 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp16 = mul <2 x i32> %tmp10, %tmp15 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp16, <2 x i32>* %A + %tmp21 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp22 = and <2 x i32> %tmp16, %tmp21 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp22, <2 x i32>* %A + %tmp27 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp28 = or <2 x i32> %tmp22, %tmp27 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp28, <2 x i32>* %A + %tmp33 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp34 = xor <2 x i32> %tmp28, %tmp33 ; <<2 x i32>> [#uses=1] + store <2 x i32> %tmp34, <2 x i32>* %A + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +define void @bar(<4 x i16>* %A, <4 x i16>* %B) { +entry: + %tmp1 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1] + %tmp3 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp4 = add <4 x i16> %tmp1, %tmp3 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp4, <4 x i16>* %A + %tmp7 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp12 = tail call <4 x i16> @llvm.x86.mmx.padds.w( <4 x i16> %tmp4, <4 x i16> %tmp7 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp12, <4 x i16>* %A + %tmp16 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp21 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp12, <4 x i16> %tmp16 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp21, <4 x i16>* %A + %tmp27 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp28 = sub <4 x i16> %tmp21, %tmp27 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp28, <4 x i16>* %A + %tmp31 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp36 = tail call <4 x i16> @llvm.x86.mmx.psubs.w( <4 x i16> %tmp28, <4 x i16> %tmp31 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp36, <4 x i16>* %A + %tmp40 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp45 = tail call <4 x i16> @llvm.x86.mmx.psubus.w( <4 x i16> %tmp36, <4 x i16> %tmp40 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp45, <4 x i16>* %A + %tmp51 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp52 = mul <4 x i16> %tmp45, %tmp51 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp52, <4 x i16>* %A + %tmp55 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp60 = tail call <4 x i16> @llvm.x86.mmx.pmulh.w( <4 x i16> %tmp52, <4 x i16> %tmp55 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp60, <4 x i16>* %A + %tmp64 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp69 = tail call <2 x i32> @llvm.x86.mmx.pmadd.wd( <4 x i16> %tmp60, <4 x i16> %tmp64 ) ; <<2 x i32>> [#uses=1] + %tmp70 = bitcast <2 x i32> %tmp69 to <4 x i16> ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp70, <4 x i16>* %A + %tmp75 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp76 = and <4 x i16> %tmp70, %tmp75 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp76, <4 x i16>* %A + %tmp81 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp82 = or <4 x i16> %tmp76, %tmp81 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp82, <4 x i16>* %A + %tmp87 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp88 = xor <4 x i16> %tmp82, %tmp87 ; <<4 x i16>> [#uses=1] + store <4 x i16> %tmp88, <4 x i16>* %A + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8>, <8 x i8>) + +declare <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8>, <8 x i8>) + +declare <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8>, <8 x i8>) + +declare <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8>, <8 x i8>) + +declare <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.pmulh.w(<4 x i16>, <4 x i16>) + +declare <2 x i32> @llvm.x86.mmx.pmadd.wd(<4 x i16>, <4 x i16>) + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/mmx-emms.ll b/test/CodeGen/X86/mmx-emms.ll new file mode 100644 index 0000000..60ba84d --- /dev/null +++ b/test/CodeGen/X86/mmx-emms.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep emms +define void @foo() { +entry: + call void @llvm.x86.mmx.emms( ) + br label %return + +return: ; preds = %entry + ret void +} + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/mmx-insert-element.ll b/test/CodeGen/X86/mmx-insert-element.ll new file mode 100644 index 0000000..3f2e402 --- /dev/null +++ b/test/CodeGen/X86/mmx-insert-element.ll @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep movq | wc -l | grep 3 + +; FIXME: This code outputs: +; +; subl $28, %esp +; movl 32(%esp), %eax +; movd %eax, %mm0 +; movq %mm0, (%esp) +; movl (%esp), %eax +; movl %eax, 20(%esp) +; movq %mm0, 8(%esp) +; movl 12(%esp), %eax +; movl %eax, 16(%esp) +; movq 16(%esp), %mm0 +; addl $28, %esp +; +; Which is ugly. We need to fix this. + +define <2 x i32> @qux(i32 %A) { +entry: + %tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 1 ; <<2 x i32>> [#uses=1] + ret <2 x i32> %tmp3 +} diff --git a/test/CodeGen/X86/mmx-punpckhdq.ll b/test/CodeGen/X86/mmx-punpckhdq.ll new file mode 100644 index 0000000..57c73c7 --- /dev/null +++ b/test/CodeGen/X86/mmx-punpckhdq.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep punpckhdq | wc -l | grep 1 + +define void @bork(<1 x i64>* %x) { +entry: + %tmp2 = load <1 x i64>* %x ; <<1 x i64>> [#uses=1] + %tmp6 = bitcast <1 x i64> %tmp2 to <2 x i32> ; <<2 x i32>> [#uses=1] + %tmp9 = shufflevector <2 x i32> %tmp6, <2 x i32> undef, <2 x i32> < i32 1, i32 1 > ; <<2 x i32>> [#uses=1] + %tmp10 = bitcast <2 x i32> %tmp9 to <1 x i64> ; <<1 x i64>> [#uses=1] + store <1 x i64> %tmp10, <1 x i64>* %x + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/mmx-shuffle.ll b/test/CodeGen/X86/mmx-shuffle.ll new file mode 100644 index 0000000..4b91cb9 --- /dev/null +++ b/test/CodeGen/X86/mmx-shuffle.ll @@ -0,0 +1,29 @@ +; RUN: llvm-as < %s | llc -mcpu=yonah +; PR1427 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-pc-linux-gnu" + %struct.DrawHelper = type { void (i32, %struct.QT_FT_Span*, i8*)*, void (i32, %struct.QT_FT_Span*, i8*)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i32, i32)* } + %struct.QBasicAtomic = type { i32 } + %struct.QClipData = type { i32, "struct.QClipData::ClipLine"*, i32, i32, %struct.QT_FT_Span*, i32, i32, i32, i32 } + "struct.QClipData::ClipLine" = type { i32, %struct.QT_FT_Span* } + %struct.QRasterBuffer = type { %struct.QRect, %struct.QRegion, %struct.QClipData*, %struct.QClipData*, i8, i32, i32, %struct.DrawHelper*, i32, i32, i32, i8* } + %struct.QRect = type { i32, i32, i32, i32 } + %struct.QRegion = type { "struct.QRegion::QRegionData"* } + "struct.QRegion::QRegionData" = type { %struct.QBasicAtomic, %struct._XRegion*, i8*, %struct.QRegionPrivate* } + %struct.QRegionPrivate = type opaque + %struct.QT_FT_Span = type { i16, i16, i16, i8 } + %struct._XRegion = type opaque + +define void @_Z19qt_bitmapblit16_sseP13QRasterBufferiijPKhiii(%struct.QRasterBuffer* %rasterBuffer, i32 %x, i32 %y, i32 %color, i8* %src, i32 %width, i32 %height, i32 %stride) { +entry: + %tmp528 = bitcast <8 x i8> zeroinitializer to <2 x i32> ; <<2 x i32>> [#uses=1] + %tmp529 = and <2 x i32> %tmp528, bitcast (<4 x i16> < i16 -32640, i16 16448, i16 8224, i16 4112 > to <2 x i32>) ; <<2 x i32>> [#uses=1] + %tmp542 = bitcast <2 x i32> %tmp529 to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp543 = add <4 x i16> %tmp542, < i16 0, i16 16448, i16 24672, i16 28784 > ; <<4 x i16>> [#uses=1] + %tmp555 = bitcast <4 x i16> %tmp543 to <8 x i8> ; <<8 x i8>> [#uses=1] + tail call void @llvm.x86.mmx.maskmovq( <8 x i8> zeroinitializer, <8 x i8> %tmp555, i8* null ) + ret void +} + +declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*) diff --git a/test/CodeGen/X86/mul-shift-reassoc.ll b/test/CodeGen/X86/mul-shift-reassoc.ll new file mode 100644 index 0000000..52d188d --- /dev/null +++ b/test/CodeGen/X86/mul-shift-reassoc.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep lea +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep add + +int %test(int %X, int %Y) { + ; Push the shl through the mul to allow an LEA to be formed, instead + ; of using a shift and add separately. + %tmp.2 = shl int %X, ubyte 1 + %tmp.3 = mul int %tmp.2, %Y + %tmp.5 = add int %tmp.3, %Y + ret int %tmp.5 +} + diff --git a/test/CodeGen/X86/negative-sin.ll b/test/CodeGen/X86/negative-sin.ll new file mode 100644 index 0000000..39c6297 --- /dev/null +++ b/test/CodeGen/X86/negative-sin.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -enable-unsafe-fp-math -march=x86-64 | \ +; RUN: not egrep {addsd|subsd|xor} + +declare double @sin(double %f) + +define double @foo(double %e) +{ + %f = sub double 0.0, %e + %g = call double @sin(double %f) + %h = sub double 0.0, %g + ret double %h +} diff --git a/test/CodeGen/X86/negative_zero.ll b/test/CodeGen/X86/negative_zero.ll new file mode 100644 index 0000000..3328a6a --- /dev/null +++ b/test/CodeGen/X86/negative_zero.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=-sse2,-sse3 | grep fchs + + +double %T() { + ret double -1.0 ;; codegen as fld1/fchs, not as a load from cst pool +} diff --git a/test/CodeGen/X86/or-branch.ll b/test/CodeGen/X86/or-branch.ll new file mode 100644 index 0000000..62f7455 --- /dev/null +++ b/test/CodeGen/X86/or-branch.ll @@ -0,0 +1,19 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep set + +void %foo(int %X, int %Y, int %Z) { +entry: + %tmp = tail call int (...)* %bar( ) ; <int> [#uses=0] + %tmp = seteq int %X, 0 ; <bool> [#uses=1] + %tmp3 = setlt int %Y, 5 ; <bool> [#uses=1] + %tmp4 = or bool %tmp3, %tmp ; <bool> [#uses=1] + br bool %tmp4, label %cond_true, label %UnifiedReturnBlock + +cond_true: ; preds = %entry + %tmp5 = tail call int (...)* %bar( ) ; <int> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare int %bar(...) diff --git a/test/CodeGen/X86/overlap-shift.ll b/test/CodeGen/X86/overlap-shift.ll new file mode 100644 index 0000000..11673cf --- /dev/null +++ b/test/CodeGen/X86/overlap-shift.ll @@ -0,0 +1,18 @@ +;; X's live range extends beyond the shift, so the register allocator +;; cannot coalesce it with Y. Because of this, a copy needs to be +;; emitted before the shift to save the register value before it is +;; clobbered. However, this copy is not needed if the register +;; allocator turns the shift into an LEA. This also occurs for ADD. + +; Check that the shift gets turned into an LEA. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: not grep {mov E.X, E.X} + +%G = external global int + +int %test1(int %X) { + %Z = shl int %X, ubyte 2 + volatile store int %Z, int* %G + ret int %X +} diff --git a/test/CodeGen/X86/packed_struct.ll b/test/CodeGen/X86/packed_struct.ll new file mode 100644 index 0000000..d06f916 --- /dev/null +++ b/test/CodeGen/X86/packed_struct.ll @@ -0,0 +1,38 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep foos+5 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep foos+1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep foos+9 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep bara+19 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep bara+4 + +; make sure we compute the correct offset for a packed structure + +;Note: codegen for this could change rendering the above checks wrong + +; ModuleID = 'foo.c' +target datalayout = "e-p:32:32" +target endian = little +target pointersize = 32 +target triple = "i686-pc-linux-gnu" + %struct.anon = type <{ sbyte, int, int, int }> +%foos = external global %struct.anon +%bara = weak global [4 x <{ int, sbyte }>] zeroinitializer + +implementation ; Functions: + +int %foo() { +entry: + %tmp = load int* getelementptr (%struct.anon* %foos, int 0, uint 1) + %tmp3 = load int* getelementptr (%struct.anon* %foos, int 0, uint 2) + %tmp6 = load int* getelementptr (%struct.anon* %foos, int 0, uint 3) + %tmp4 = add int %tmp3, %tmp + %tmp7 = add int %tmp4, %tmp6 + ret int %tmp7 +} + +sbyte %bar() { +entry: + %tmp = load sbyte* getelementptr([4 x <{ int, sbyte }>]* %bara, int 0, int 0, uint 1 ) + %tmp4 = load sbyte* getelementptr ([4 x <{ int, sbyte }>]* %bara, int 0, int 3, uint 1) + %tmp5 = add sbyte %tmp4, %tmp + ret sbyte %tmp5 +} diff --git a/test/CodeGen/X86/peep-vector-extract-concat.ll b/test/CodeGen/X86/peep-vector-extract-concat.ll new file mode 100644 index 0000000..6880fc3 --- /dev/null +++ b/test/CodeGen/X86/peep-vector-extract-concat.ll @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep {shufps \$3, %xmm0, %xmm0} + +define float @foo(<8 x float> %a) { + %c = extractelement <8 x float> %a, i32 3 + ret float %c +} diff --git a/test/CodeGen/X86/peep-vector-extract-insert.ll b/test/CodeGen/X86/peep-vector-extract-insert.ll new file mode 100644 index 0000000..9aeb4f1 --- /dev/null +++ b/test/CodeGen/X86/peep-vector-extract-insert.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep {pxor %xmm0, %xmm0} | wc -l | grep 2 + +define float @foo(<4 x float> %a) { + %b = insertelement <4 x float> %a, float 0.0, i32 3 + %c = extractelement <4 x float> %b, i32 3 + ret float %c +} +define float @bar(float %a) { + %b = insertelement <4 x float> <float 3.4, float 4.5, float 0.0, float 9.2>, float %a, i32 3 + %c = extractelement <4 x float> %b, i32 2 + ret float %c +} diff --git a/test/CodeGen/X86/pic_jumptable.ll b/test/CodeGen/X86/pic_jumptable.ll new file mode 100644 index 0000000..4c38fb8 --- /dev/null +++ b/test/CodeGen/X86/pic_jumptable.ll @@ -0,0 +1,79 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -relocation-model=pic -march=x86 | not grep -F .text +target endian = little +target pointersize = 32 +target triple = "i386-linux-gnu" + +implementation ; Functions: + +declare void %_Z3bari( int ) + +linkonce void %_Z3fooILi1EEvi(int %Y) { +entry: + %Y_addr = alloca int ; <int*> [#uses=2] + "alloca point" = cast int 0 to int ; <int> [#uses=0] + store int %Y, int* %Y_addr + %tmp = load int* %Y_addr ; <int> [#uses=1] + switch int %tmp, label %bb10 [ + int 0, label %bb3 + int 1, label %bb + int 2, label %bb + int 3, label %bb + int 4, label %bb + int 5, label %bb + int 6, label %bb + int 7, label %bb + int 8, label %bb + int 9, label %bb + int 10, label %bb + int 12, label %bb1 + int 13, label %bb5 + int 14, label %bb6 + int 16, label %bb2 + int 17, label %bb4 + int 23, label %bb8 + int 27, label %bb7 + int 34, label %bb9 + ] + +bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry + br label %bb1 + +bb1: ; preds = %bb, %entry + br label %bb2 + +bb2: ; preds = %bb1, %entry + call void %_Z3bari( int 1 ) + br label %bb11 + +bb3: ; preds = %entry + br label %bb4 + +bb4: ; preds = %bb3, %entry + br label %bb5 + +bb5: ; preds = %bb4, %entry + br label %bb6 + +bb6: ; preds = %bb5, %entry + call void %_Z3bari( int 2 ) + br label %bb11 + +bb7: ; preds = %entry + br label %bb8 + +bb8: ; preds = %bb7, %entry + br label %bb9 + +bb9: ; preds = %bb8, %entry + call void %_Z3bari( int 3 ) + br label %bb11 + +bb10: ; preds = %entry + br label %bb11 + +bb11: ; preds = %bb10, %bb9, %bb6, %bb2 + br label %return + +return: ; preds = %bb11 + ret void +} diff --git a/test/CodeGen/X86/pr1489.ll b/test/CodeGen/X86/pr1489.ll new file mode 100644 index 0000000..61e68df --- /dev/null +++ b/test/CodeGen/X86/pr1489.ll @@ -0,0 +1,55 @@ +; RUN: llvm-as < %s | llc -disable-fp-elim -fast -mcpu=i486 | grep 1082126238 | wc -l | grep 3 +; RUN: llvm-as < %s | llc -disable-fp-elim -fast -mcpu=i486 | grep 3058016715 | wc -l | grep 1 +;; magic constants are 3.999f and half of 3.999 +; ModuleID = '1489.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" +@.str = internal constant [13 x i8] c"%d %d %d %d\0A\00" ; <[13 x i8]*> [#uses=1] + +define i32 @quux() { +entry: + %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1] + %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] + %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1] + ret i32 %tmp23 +} + +declare i32 @lrintf(float) + +define i32 @foo() { +entry: + %tmp1 = tail call i32 @lrint( double 3.999000e+00 ) ; <i32> [#uses=1] + %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] + %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1] + ret i32 %tmp23 +} + +declare i32 @lrint(double) + +define i32 @bar() { +entry: + %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1] + %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] + %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1] + ret i32 %tmp23 +} + +define i32 @baz() { +entry: + %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1] + %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] + %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1] + ret i32 %tmp23 +} + +define i32 @main() { +entry: + %tmp = tail call i32 @baz( ) ; <i32> [#uses=1] + %tmp1 = tail call i32 @bar( ) ; <i32> [#uses=1] + %tmp2 = tail call i32 @foo( ) ; <i32> [#uses=1] + %tmp3 = tail call i32 @quux( ) ; <i32> [#uses=1] + %tmp5 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 %tmp3, i32 %tmp2, i32 %tmp1, i32 %tmp ) ; <i32> [#uses=0] + ret i32 undef +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/X86/pr1505.ll b/test/CodeGen/X86/pr1505.ll new file mode 100644 index 0000000..a80d25c --- /dev/null +++ b/test/CodeGen/X86/pr1505.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -mcpu=i486 | not grep fldl + +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" +@G = weak global float 0.000000e+00 ; <float*> [#uses=1] + +define void @t1(float %F) { +entry: + store float %F, float* @G + ret void +} diff --git a/test/CodeGen/X86/pr1505b.ll b/test/CodeGen/X86/pr1505b.ll new file mode 100644 index 0000000..1e6b793 --- /dev/null +++ b/test/CodeGen/X86/pr1505b.ll @@ -0,0 +1,73 @@ +; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstpl | wc -l | grep 4 +; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstps | wc -l | grep 3 + +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* } + %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" } + %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" } + %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 } + %"struct.std::ctype_base" = type <{ i8 }> + %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" } + %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 } + %"struct.std::ios_base::_Words" = type { i8*, i32 } + %"struct.std::locale" = type { %"struct.std::locale::_Impl"* } + %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** } + %"struct.std::locale::facet" = type { i32 (...)**, i32 } + %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" } +@a = global float 0x3FD3333340000000 ; <float*> [#uses=1] +@b = global double 6.000000e-01, align 8 ; <double*> [#uses=1] +@_ZSt8__ioinit = internal global %"struct.std::ctype_base" zeroinitializer ; <%"struct.std::ctype_base"*> [#uses=2] +@__dso_handle = external global i8* ; <i8**> [#uses=1] +@_ZSt4cout = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=2] +@.str = internal constant [12 x i8] c"tan float: \00" ; <[12 x i8]*> [#uses=1] +@.str1 = internal constant [13 x i8] c"tan double: \00" ; <[13 x i8]*> [#uses=1] +@llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I_a } ] ; <[1 x { i32, void ()* }]*> [#uses=0] + +define internal void @_GLOBAL__I_a() section "__TEXT,__StaticInit,regular,pure_instructions" { +entry: + tail call void @_ZNSt8ios_base4InitC1Ev( %"struct.std::ctype_base"* @_ZSt8__ioinit ) + %tmp10.i = tail call i32 @__cxa_atexit( void (i8*)* @__tcf_0, i8* null, i8* bitcast (i8** @__dso_handle to i8*) ) ; <i32> [#uses=0] + ret void +} + +define internal void @__tcf_0(i8* %unnamed_arg) { +entry: + tail call void @_ZNSt8ios_base4InitD1Ev( %"struct.std::ctype_base"* @_ZSt8__ioinit ) + ret void +} + +declare void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ctype_base"*) + +declare void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ctype_base"*) + +declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) + +define i32 @main() { +entry: + %tmp6 = volatile load float* @a ; <float> [#uses=1] + %tmp9 = tail call float @tanf( float %tmp6 ) ; <float> [#uses=1] + %tmp12 = volatile load double* @b ; <double> [#uses=1] + %tmp13 = tail call double @tan( double %tmp12 ) ; <double> [#uses=1] + %tmp1314 = fptrunc double %tmp13 to float ; <float> [#uses=1] + %tmp16 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0) ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] + %tmp1920 = fpext float %tmp9 to double ; <double> [#uses=1] + %tmp22 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp16, double %tmp1920 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] + %tmp30 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp22 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0] + %tmp34 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr ([13 x i8]* @.str1, i32 0, i32 0) ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] + %tmp3940 = fpext float %tmp1314 to double ; <double> [#uses=1] + %tmp42 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp34, double %tmp3940 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] + %tmp51 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp42 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0] + ret i32 0 +} + +declare float @tanf(float) + +declare double @tan(double) + +declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8*) + +declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, double) + +declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(%"struct.std::basic_ostream<char,std::char_traits<char> >"*) diff --git a/test/CodeGen/X86/rdtsc.ll b/test/CodeGen/X86/rdtsc.ll new file mode 100644 index 0000000..f6c6c93 --- /dev/null +++ b/test/CodeGen/X86/rdtsc.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep rdtsc +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 | grep rdtsc + +declare ulong %llvm.readcyclecounter() + +ulong %foo() { +%tmp.1 = call ulong %llvm.readcyclecounter () +ret ulong %tmp.1 +} + diff --git a/test/CodeGen/X86/regpressure.ll b/test/CodeGen/X86/regpressure.ll new file mode 100644 index 0000000..0567564 --- /dev/null +++ b/test/CodeGen/X86/regpressure.ll @@ -0,0 +1,118 @@ +;; Both functions in this testcase should codegen to the same function, and +;; neither of them should require spilling anything to the stack. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& \ +; RUN: not grep {Number of register spills} + +;; This can be compiled to use three registers if the loads are not +;; folded into the multiplies, 2 registers otherwise. +int %regpressure1(int* %P) { + %A = load int* %P + %Bp = getelementptr int* %P, int 1 + %B = load int* %Bp + %s1 = mul int %A, %B + %Cp = getelementptr int* %P, int 2 + %C = load int* %Cp + %s2 = mul int %s1, %C + %Dp = getelementptr int* %P, int 3 + %D = load int* %Dp + %s3 = mul int %s2, %D + %Ep = getelementptr int* %P, int 4 + %E = load int* %Ep + %s4 = mul int %s3, %E + %Fp = getelementptr int* %P, int 5 + %F = load int* %Fp + %s5 = mul int %s4, %F + %Gp = getelementptr int* %P, int 6 + %G = load int* %Gp + %s6 = mul int %s5, %G + %Hp = getelementptr int* %P, int 7 + %H = load int* %Hp + %s7 = mul int %s6, %H + %Ip = getelementptr int* %P, int 8 + %I = load int* %Ip + %s8 = mul int %s7, %I + %Jp = getelementptr int* %P, int 9 + %J = load int* %Jp + %s9 = mul int %s8, %J + ret int %s9 +} + +;; This testcase should produce identical code to the test above. +int %regpressure2(int* %P) { + %A = load int* %P + %Bp = getelementptr int* %P, int 1 + %B = load int* %Bp + %Cp = getelementptr int* %P, int 2 + %C = load int* %Cp + %Dp = getelementptr int* %P, int 3 + %D = load int* %Dp + %Ep = getelementptr int* %P, int 4 + %E = load int* %Ep + %Fp = getelementptr int* %P, int 5 + %F = load int* %Fp + %Gp = getelementptr int* %P, int 6 + %G = load int* %Gp + %Hp = getelementptr int* %P, int 7 + %H = load int* %Hp + %Ip = getelementptr int* %P, int 8 + %I = load int* %Ip + %Jp = getelementptr int* %P, int 9 + %J = load int* %Jp + %s1 = mul int %A, %B + %s2 = mul int %s1, %C + %s3 = mul int %s2, %D + %s4 = mul int %s3, %E + %s5 = mul int %s4, %F + %s6 = mul int %s5, %G + %s7 = mul int %s6, %H + %s8 = mul int %s7, %I + %s9 = mul int %s8, %J + ret int %s9 +} + +;; adds should be the same as muls. +int %regpressure3(short* %P, bool %Cond, int* %Other) { + %A = load short* %P + %Bp = getelementptr short* %P, int 1 + %B = load short* %Bp + %Cp = getelementptr short* %P, int 2 + %C = load short* %Cp + %Dp = getelementptr short* %P, int 3 + %D = load short* %Dp + %Ep = getelementptr short* %P, int 4 + %E = load short* %Ep + %Fp = getelementptr short* %P, int 5 + %F = load short* %Fp + %Gp = getelementptr short* %P, int 6 + %G = load short* %Gp + %Hp = getelementptr short* %P, int 7 + %H = load short* %Hp + %Ip = getelementptr short* %P, int 8 + %I = load short* %Ip + %Jp = getelementptr short* %P, int 9 + %J = load short* %Jp + + ;; These casts prevent folding the loads into the adds. + %A = cast short %A to int + %B = cast short %B to int + %D = cast short %D to int + %C = cast short %C to int + %E = cast short %E to int + %F = cast short %F to int + %G = cast short %G to int + %H = cast short %H to int + %I = cast short %I to int + %J = cast short %J to int + %s1 = add int %A, %B + %s2 = add int %C, %s1 + %s3 = add int %D, %s2 + %s4 = add int %E, %s3 + %s5 = add int %F, %s4 + %s6 = add int %G, %s5 + %s7 = add int %H, %s6 + %s8 = add int %I, %s7 + %s9 = add int %J, %s8 + ret int %s9 +} + diff --git a/test/CodeGen/X86/rem.ll b/test/CodeGen/X86/rem.ll new file mode 100644 index 0000000..1471283 --- /dev/null +++ b/test/CodeGen/X86/rem.ll @@ -0,0 +1,22 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep div + +int %test1(int %X) { + %tmp1 = rem int %X, 255 + ret int %tmp1 +} + +int %test2(int %X) { + %tmp1 = rem int %X, 256 + ret int %tmp1 +} + +uint %test3(uint %X) { + %tmp1 = rem uint %X, 255 + ret uint %tmp1 +} + +uint %test4(uint %X) { + %tmp1 = rem uint %X, 256 ; just an and + ret uint %tmp1 +} + diff --git a/test/CodeGen/X86/rotate.ll b/test/CodeGen/X86/rotate.ll new file mode 100644 index 0000000..fb04be9 --- /dev/null +++ b/test/CodeGen/X86/rotate.ll @@ -0,0 +1,92 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {ro\[rl\]} | wc -l | grep 12 + +uint %rotl32(uint %A, ubyte %Amt) { + %B = shl uint %A, ubyte %Amt + %Amt2 = sub ubyte 32, %Amt + %C = shr uint %A, ubyte %Amt2 + %D = or uint %B, %C + ret uint %D +} + +uint %rotr32(uint %A, ubyte %Amt) { + %B = shr uint %A, ubyte %Amt + %Amt2 = sub ubyte 32, %Amt + %C = shl uint %A, ubyte %Amt2 + %D = or uint %B, %C + ret uint %D +} + +uint %rotli32(uint %A) { + %B = shl uint %A, ubyte 5 + %C = shr uint %A, ubyte 27 + %D = or uint %B, %C + ret uint %D +} + +uint %rotri32(uint %A) { + %B = shr uint %A, ubyte 5 + %C = shl uint %A, ubyte 27 + %D = or uint %B, %C + ret uint %D +} + +ushort %rotl16(ushort %A, ubyte %Amt) { + %B = shl ushort %A, ubyte %Amt + %Amt2 = sub ubyte 16, %Amt + %C = shr ushort %A, ubyte %Amt2 + %D = or ushort %B, %C + ret ushort %D +} + +ushort %rotr16(ushort %A, ubyte %Amt) { + %B = shr ushort %A, ubyte %Amt + %Amt2 = sub ubyte 16, %Amt + %C = shl ushort %A, ubyte %Amt2 + %D = or ushort %B, %C + ret ushort %D +} + +ushort %rotli16(ushort %A) { + %B = shl ushort %A, ubyte 5 + %C = shr ushort %A, ubyte 11 + %D = or ushort %B, %C + ret ushort %D +} + +ushort %rotri16(ushort %A) { + %B = shr ushort %A, ubyte 5 + %C = shl ushort %A, ubyte 11 + %D = or ushort %B, %C + ret ushort %D +} + +ubyte %rotl8(ubyte %A, ubyte %Amt) { + %B = shl ubyte %A, ubyte %Amt + %Amt2 = sub ubyte 8, %Amt + %C = shr ubyte %A, ubyte %Amt2 + %D = or ubyte %B, %C + ret ubyte %D +} + +ubyte %rotr8(ubyte %A, ubyte %Amt) { + %B = shr ubyte %A, ubyte %Amt + %Amt2 = sub ubyte 8, %Amt + %C = shl ubyte %A, ubyte %Amt2 + %D = or ubyte %B, %C + ret ubyte %D +} + +ubyte %rotli8(ubyte %A) { + %B = shl ubyte %A, ubyte 5 + %C = shr ubyte %A, ubyte 3 + %D = or ubyte %B, %C + ret ubyte %D +} + +ubyte %rotri8(ubyte %A) { + %B = shr ubyte %A, ubyte 5 + %C = shl ubyte %A, ubyte 3 + %D = or ubyte %B, %C + ret ubyte %D +} diff --git a/test/CodeGen/X86/scalar-min-max-fill-operand.ll b/test/CodeGen/X86/scalar-min-max-fill-operand.ll new file mode 100644 index 0000000..9d6fc4f --- /dev/null +++ b/test/CodeGen/X86/scalar-min-max-fill-operand.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep min | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep max | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | wc -l | grep 2 + +declare float @bar() + +define float @foo(float %a) +{ + %s = call float @bar() + %t = fcmp olt float %s, %a + %u = select i1 %t, float %s, float %a + ret float %u +} +define float @hem(float %a) +{ + %s = call float @bar() + %t = fcmp uge float %s, %a + %u = select i1 %t, float %s, float %a + ret float %u +} diff --git a/test/CodeGen/X86/scalar_sse_minmax.ll b/test/CodeGen/X86/scalar_sse_minmax.ll new file mode 100644 index 0000000..61894a4 --- /dev/null +++ b/test/CodeGen/X86/scalar_sse_minmax.ll @@ -0,0 +1,44 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse1,+sse2 | \ +; RUN: grep mins | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse1,+sse2 | \ +; RUN: grep maxs | wc -l | grep 2 + +declare bool %llvm.isunordered.f64( double %x, double %y ) +declare bool %llvm.isunordered.f32( float %x, float %y ) + +implementation + +float %min1(float %x, float %y) { + %tmp = setlt float %x, %y ; <bool> [#uses=1] + %retval = select bool %tmp, float %x, float %y ; <float> [#uses=1] + ret float %retval +} +double %min2(double %x, double %y) { + %tmp = setlt double %x, %y + %retval = select bool %tmp, double %x, double %y + ret double %retval +} + +float %max1(float %x, float %y) { + %tmp = setge float %x, %y ; <bool> [#uses=1] + %tmp2 = tail call bool %llvm.isunordered.f32( float %x, float %y ) + %tmp3 = or bool %tmp2, %tmp ; <bool> [#uses=1] + %retval = select bool %tmp3, float %x, float %y + ret float %retval +} + +double %max2(double %x, double %y) { + %tmp = setge double %x, %y ; <bool> [#uses=1] + %tmp2 = tail call bool %llvm.isunordered.f64( double %x, double %y ) + %tmp3 = or bool %tmp2, %tmp ; <bool> [#uses=1] + %retval = select bool %tmp3, double %x, double %y + ret double %retval +} + +<4 x float> %min3(float %tmp37) { + %tmp375 = insertelement <4 x float> undef, float %tmp37, uint 0 + %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > ) + ret <4 x float> %tmp48 +} + +declare <4 x float> %llvm.x86.sse.min.ss(<4 x float>, <4 x float>) diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll new file mode 100644 index 0000000..799d45c --- /dev/null +++ b/test/CodeGen/X86/select.ll @@ -0,0 +1,64 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=pentium + +bool %boolSel(bool %A, bool %B, bool %C) { + %X = select bool %A, bool %B, bool %C + ret bool %X +} + +sbyte %byteSel(bool %A, sbyte %B, sbyte %C) { + %X = select bool %A, sbyte %B, sbyte %C + ret sbyte %X +} + +short %shortSel(bool %A, short %B, short %C) { + %X = select bool %A, short %B, short %C + ret short %X +} + +int %intSel(bool %A, int %B, int %C) { + %X = select bool %A, int %B, int %C + ret int %X +} + +long %longSel(bool %A, long %B, long %C) { + %X = select bool %A, long %B, long %C + ret long %X +} + +double %doubleSel(bool %A, double %B, double %C) { + %X = select bool %A, double %B, double %C + ret double %X +} + +sbyte %foldSel(bool %A, sbyte %B, sbyte %C) { + %Cond = setlt sbyte %B, %C + %X = select bool %Cond, sbyte %B, sbyte %C + ret sbyte %X +} + +int %foldSel2(bool %A, int %B, int %C) { + %Cond = seteq int %B, %C + %X = select bool %Cond, int %B, int %C + ret int %X +} + +int %foldSel2a(bool %A, int %B, int %C, double %X, double %Y) { + %Cond = setlt double %X, %Y + %X = select bool %Cond, int %B, int %C + ret int %X +} + +float %foldSel3(bool %A, float %B, float %C, uint %X, uint %Y) { + %Cond = setlt uint %X, %Y + %X = select bool %Cond, float %B, float %C + ret float %X +} + +float %nofoldSel4(bool %A, float %B, float %C, int %X, int %Y) { + ; X86 doesn't have a cmov that reads the right flags for this! + %Cond = setlt int %X, %Y + %X = select bool %Cond, float %B, float %C + ret float %X +} + diff --git a/test/CodeGen/X86/setuge.ll b/test/CodeGen/X86/setuge.ll new file mode 100644 index 0000000..2960c6b --- /dev/null +++ b/test/CodeGen/X86/setuge.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep set + +declare bool %llvm.isunordered.f32(float, float) + +float %cmp(float %A, float %B, float %C, float %D) { +entry: + %tmp.1 = call bool %llvm.isunordered.f32(float %A, float %B) + %tmp.2 = setge float %A, %B + %tmp.3 = or bool %tmp.1, %tmp.2 + %tmp.4 = select bool %tmp.3, float %C, float %D + ret float %tmp.4 +} diff --git a/test/CodeGen/X86/shift-coalesce.ll b/test/CodeGen/X86/shift-coalesce.ll new file mode 100644 index 0000000..a071c11 --- /dev/null +++ b/test/CodeGen/X86/shift-coalesce.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {shld.*CL} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: not grep {mov CL, BL} + +; PR687 + +ulong %foo(ulong %x, long* %X) { + %tmp.1 = load long* %X ; <long> [#uses=1] + %tmp.3 = cast long %tmp.1 to ubyte ; <ubyte> [#uses=1] + %tmp.4 = shl ulong %x, ubyte %tmp.3 ; <ulong> [#uses=1] + ret ulong %tmp.4 +} diff --git a/test/CodeGen/X86/shift-codegen.ll b/test/CodeGen/X86/shift-codegen.ll new file mode 100644 index 0000000..83235c0 --- /dev/null +++ b/test/CodeGen/X86/shift-codegen.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 | \ +; RUN: grep {shll \$3} | wc -l | grep 2 + +; This should produce two shll instructions, not any lea's. + +target triple = "i686-apple-darwin8" +@Y = weak global i32 0 ; <i32*> [#uses=1] +@X = weak global i32 0 ; <i32*> [#uses=2] + + +define void @fn1() { +entry: + %tmp = load i32* @Y ; <i32> [#uses=1] + %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1] + %tmp2 = load i32* @X ; <i32> [#uses=1] + %tmp3 = or i32 %tmp1, %tmp2 ; <i32> [#uses=1] + store i32 %tmp3, i32* @X + ret void +} + +define i32 @fn2(i32 %X, i32 %Y) { +entry: + %tmp2 = shl i32 %Y, 3 ; <i32> [#uses=1] + %tmp4 = or i32 %tmp2, %X ; <i32> [#uses=1] + ret i32 %tmp4 +} + diff --git a/test/CodeGen/X86/shift-double.llx b/test/CodeGen/X86/shift-double.llx new file mode 100644 index 0000000..760e490 --- /dev/null +++ b/test/CodeGen/X86/shift-double.llx @@ -0,0 +1,31 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {sh\[lr\]d} | wc -l | grep 5 + +long %test1(long %X, ubyte %C) { + %Y = shl long %X, ubyte %C + ret long %Y +} +long %test2(long %X, ubyte %C) { + %Y = shr long %X, ubyte %C + ret long %Y +} +ulong %test3(ulong %X, ubyte %C) { + %Y = shr ulong %X, ubyte %C + ret ulong %Y +} + +uint %test4(uint %A, uint %B, ubyte %C) { + %X = shl uint %A, ubyte %C + %Cv = sub ubyte 32, %C + %Y = shr uint %B, ubyte %Cv + %Z = or uint %Y, %X + ret uint %Z +} + +ushort %test5(ushort %A, ushort %B, ubyte %C) { + %X = shl ushort %A, ubyte %C + %Cv = sub ubyte 16, %C + %Y = shr ushort %B, ubyte %Cv + %Z = or ushort %Y, %X + ret ushort %Z +} diff --git a/test/CodeGen/X86/shift-folding.ll b/test/CodeGen/X86/shift-folding.ll new file mode 100644 index 0000000..671476a --- /dev/null +++ b/test/CodeGen/X86/shift-folding.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep {s\[ah\]\[rl\]l} | wc -l | grep 1 + +int* %test1(int *%P, uint %X) { + %Y = shr uint %X, ubyte 2 + %P2 = getelementptr int* %P, uint %Y + ret int* %P2 +} + +int* %test2(int *%P, uint %X) { + %Y = shl uint %X, ubyte 2 + %P2 = getelementptr int* %P, uint %Y + ret int* %P2 +} + +int* %test3(int *%P, int %X) { + %Y = shr int %X, ubyte 2 + %P2 = getelementptr int* %P, int %Y + ret int* %P2 +} diff --git a/test/CodeGen/X86/shift-one.ll b/test/CodeGen/X86/shift-one.ll new file mode 100644 index 0000000..3108fba --- /dev/null +++ b/test/CodeGen/X86/shift-one.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep leal + +%x = external global int + +int %test() { + %tmp.0 = load int* %x + %tmp.1 = shl int %tmp.0, ubyte 1 + ret int %tmp.1 +} diff --git a/test/CodeGen/X86/shl_elim.ll b/test/CodeGen/X86/shl_elim.ll new file mode 100644 index 0000000..2e48e52 --- /dev/null +++ b/test/CodeGen/X86/shl_elim.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {movl 8(.esp), %eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {shll .15, .eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {sarl .16, .eax} + +define i32 @test1(i64 %a) { + %tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1] + %tmp23 = trunc i64 %tmp29 to i32 ; <i32> [#uses=1] + %tmp410 = lshr i32 %tmp23, 9 ; <i32> [#uses=1] + %tmp45 = trunc i32 %tmp410 to i16 ; <i16> [#uses=1] + %tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1] + ret i32 %tmp456 +} + diff --git a/test/CodeGen/X86/sse-fcopysign.ll b/test/CodeGen/X86/sse-fcopysign.ll new file mode 100644 index 0000000..cff1f7f --- /dev/null +++ b/test/CodeGen/X86/sse-fcopysign.ll @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep test + +define float @tst1(float %a, float %b) { + %tmp = tail call float @copysignf( float %b, float %a ) + ret float %tmp +} + +define double @tst2(double %a, float %b, float %c) { + %tmp1 = add float %b, %c + %tmp2 = fpext float %tmp1 to double + %tmp = tail call double @copysign( double %a, double %tmp2 ) + ret double %tmp +} + +declare float @copysignf(float, float) +declare double @copysign(double, double) diff --git a/test/CodeGen/X86/sse-load-ret.ll b/test/CodeGen/X86/sse-load-ret.ll new file mode 100644 index 0000000..c82f4fc --- /dev/null +++ b/test/CodeGen/X86/sse-load-ret.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mcpu=yonah | not grep movss +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mcpu=yonah | not grep xmm + +double %test1(double *%P) { + %X = load double* %P + ret double %X +} + +double %test2() { + ret double 1234.56 +} + +; FIXME: Todo +;double %test3(bool %B) { +; %C = select bool %B, double 123.412, double 523.01123123 +; ret double %C +;} + diff --git a/test/CodeGen/X86/store-fp-constant.ll b/test/CodeGen/X86/store-fp-constant.ll new file mode 100644 index 0000000..3a80080 --- /dev/null +++ b/test/CodeGen/X86/store-fp-constant.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep rodata +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep literal +; +; Check that no FP constants in this testcase ends up in the +; constant pool. +%G = external global float + + +declare void %extfloat(float %F) +declare void %extdouble(double) + +implementation + +void %testfloatstore() { + call void %extfloat(float 1234.4) + call void %extdouble(double 1234.4123) + store float 13.0123, float* %G + ret void +} + diff --git a/test/CodeGen/X86/store-global-address.ll b/test/CodeGen/X86/store-global-address.ll new file mode 100644 index 0000000..77e344d --- /dev/null +++ b/test/CodeGen/X86/store-global-address.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep movl | wc -l | grep 1 + +%dst = global int 0 +%ptr = global int* null + +void %test() { + store int* %dst, int** %ptr + ret void +} diff --git a/test/CodeGen/X86/store_op_load_fold.ll b/test/CodeGen/X86/store_op_load_fold.ll new file mode 100644 index 0000000..9c1c7b8 --- /dev/null +++ b/test/CodeGen/X86/store_op_load_fold.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep mov +; +; Test the add and load are folded into the store instruction. + +%X = internal global short 0 + +void %foo() { + %tmp.0 = load short* %X + %tmp.3 = add short %tmp.0, 329 + store short %tmp.3, short* %X + ret void +} diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll new file mode 100644 index 0000000..46996d7 --- /dev/null +++ b/test/CodeGen/X86/store_op_load_fold2.ll @@ -0,0 +1,43 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {and DWORD PTR} | wc -l | grep 2 + +target endian = little +target pointersize = 32 + + %struct.Macroblock = type { int, int, int, int, int, [8 x int], %struct.Macroblock*, %struct.Macroblock*, int, [2 x [4 x [4 x [2 x int]]]], [16 x sbyte], [16 x sbyte], int, long, [4 x int], [4 x int], long, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, short, double, int, int, int, int, int, int, int, int, int } + +implementation ; Functions: + +internal fastcc int %dct_chroma(int %uv, int %cr_cbp) { +entry: + br bool true, label %cond_true2732.preheader, label %cond_true129 + +cond_true129: ; preds = %entry + ret int 0 + +cond_true2732.preheader: ; preds = %bb2611 + %tmp2666 = getelementptr %struct.Macroblock* null, int 0, uint 13 ; <long*> [#uses=2] + %tmp2674 = cast int 0 to ubyte ; <ubyte> [#uses=1] + br bool true, label %cond_true2732.preheader.split.us, label %cond_true2732.preheader.split + +cond_true2732.preheader.split.us: ; preds = %cond_true2732.preheader + br bool true, label %cond_true2732.outer.us.us, label %cond_true2732.outer.us + +cond_true2732.outer.us.us: ; preds = %cond_true2732.preheader.split.us + %tmp2667.us.us = load long* %tmp2666 ; <long> [#uses=1] + %tmp2670.us.us = load long* null ; <long> [#uses=1] + %tmp2675.us.us = shl long %tmp2670.us.us, ubyte %tmp2674 ; <long> [#uses=1] + %tmp2675not.us.us = xor long %tmp2675.us.us, -1 ; <long> [#uses=1] + %tmp2676.us.us = and long %tmp2667.us.us, %tmp2675not.us.us ; <long> [#uses=1] + store long %tmp2676.us.us, long* %tmp2666 + ret int 0 + +cond_true2732.outer.us: ; preds = %cond_true2732.preheader.split.us + ret int 0 + +cond_true2732.preheader.split: ; preds = %cond_true2732.preheader + ret int 0 + +cond_next2752: ; preds = %bb2611 + ret int 0 +} diff --git a/test/CodeGen/X86/test-hidden.ll b/test/CodeGen/X86/test-hidden.ll new file mode 100644 index 0000000..e95ca6a --- /dev/null +++ b/test/CodeGen/X86/test-hidden.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | \ +; RUN: grep .hidden | wc -l | grep 2 +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin8.8.0 | \ +; RUN: grep .private_extern | wc -l | grep 2 + +%struct.Person = type { i32 } +@a = hidden global i32 0 +@b = external global i32 + + +define weak hidden void @_ZN6Person13privateMethodEv(%struct.Person* %this) { + ret void +} + +declare void @function(i32) + +define weak void @_ZN6PersonC1Ei(%struct.Person* %this, i32 %_c) { + ret void +} + diff --git a/test/CodeGen/X86/test-load-fold.ll b/test/CodeGen/X86/test-load-fold.ll new file mode 100644 index 0000000..847d91e --- /dev/null +++ b/test/CodeGen/X86/test-load-fold.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + %struct._obstack_chunk = type { sbyte*, %struct._obstack_chunk*, [4 x sbyte] } + %struct.obstack = type { int, %struct._obstack_chunk*, sbyte*, sbyte*, sbyte*, int, int, %struct._obstack_chunk* (...)*, void (...)*, sbyte*, ubyte } +%stmt_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=1] + +implementation ; Functions: + +void %expand_start_bindings() { +entry: + br bool false, label %cond_true, label %cond_next + +cond_true: ; preds = %entry + %new_size.0.i = select bool false, int 0, int 0 ; <int> [#uses=1] + %tmp.i = load uint* cast (ubyte* getelementptr (%struct.obstack* %stmt_obstack, int 0, uint 10) to uint*) ; <uint> [#uses=1] + %tmp.i = cast uint %tmp.i to ubyte ; <ubyte> [#uses=1] + %tmp21.i = and ubyte %tmp.i, 1 ; <ubyte> [#uses=1] + %tmp22.i = seteq ubyte %tmp21.i, 0 ; <bool> [#uses=1] + br bool %tmp22.i, label %cond_false30.i, label %cond_true23.i + +cond_true23.i: ; preds = %cond_true + ret void + +cond_false30.i: ; preds = %cond_true + %tmp35.i = tail call %struct._obstack_chunk* null( int %new_size.0.i ) ; <%struct._obstack_chunk*> [#uses=0] + ret void + +cond_next: ; preds = %entry + ret void +} diff --git a/test/CodeGen/X86/test-pic-1.ll b/test/CodeGen/X86/test-pic-1.ll new file mode 100644 index 0000000..4d9703e --- /dev/null +++ b/test/CodeGen/X86/test-pic-1.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep GOT %t | wc -l | grep 3 +; RUN: not grep GOTOFF %t | wc -l + +@ptr = external global i32* +@dst = external global i32 +@src = external global i32 + +define void @foo() { +entry: + store i32* @dst, i32** @ptr + %tmp.s = load i32* @src + store i32 %tmp.s, i32* @dst + ret void +} + diff --git a/test/CodeGen/X86/test-pic-2.ll b/test/CodeGen/X86/test-pic-2.ll new file mode 100644 index 0000000..1d875fa --- /dev/null +++ b/test/CodeGen/X86/test-pic-2.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep GOTOFF %t | wc -l | grep 4 + +@ptr = internal global i32* null +@dst = internal global i32 0 +@src = internal global i32 0 + +define void @foo() { +entry: + store i32* @dst, i32** @ptr + %tmp.s = load i32* @src + store i32 %tmp.s, i32* @dst + ret void +} + diff --git a/test/CodeGen/X86/test-pic-3.ll b/test/CodeGen/X86/test-pic-3.ll new file mode 100644 index 0000000..91b4761 --- /dev/null +++ b/test/CodeGen/X86/test-pic-3.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep PLT %t | wc -l | grep 1 + +define void @bar() { +entry: + call void(...)* @foo() + br label %return +return: + ret void +} + +declare void @foo(...) diff --git a/test/CodeGen/X86/test-pic-4.ll b/test/CodeGen/X86/test-pic-4.ll new file mode 100644 index 0000000..7637d35 --- /dev/null +++ b/test/CodeGen/X86/test-pic-4.ll @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep PLT %t | wc -l | grep 1 +; RUN: grep GOT %t | wc -l | grep 1 +; RUN: not grep GOTOFF %t + +@pfoo = external global void(...)* + +define void @bar() { +entry: + %tmp = call void(...)*(...)* @afoo() + store void(...)* %tmp, void(...)** @pfoo + %tmp1 = load void(...)** @pfoo + call void(...)* %tmp1() + br label %return +return: + ret void +} + +declare void(...)* @afoo(...) diff --git a/test/CodeGen/X86/test-pic-5.ll b/test/CodeGen/X86/test-pic-5.ll new file mode 100644 index 0000000..0ed38b9 --- /dev/null +++ b/test/CodeGen/X86/test-pic-5.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep PLT %t | wc -l | grep 1 + +@ptr = external global i32* + +define void @foo() { +entry: + %ptr = malloc i32, i32 10 + ret void +} + diff --git a/test/CodeGen/X86/test-pic-6.ll b/test/CodeGen/X86/test-pic-6.ll new file mode 100644 index 0000000..43485c3 --- /dev/null +++ b/test/CodeGen/X86/test-pic-6.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep GOT %t | wc -l | grep 3 + +@ptr = global i32* null +@dst = global i32 0 +@src = global i32 0 + +define void @foo() { +entry: + store i32* @dst, i32** @ptr + %tmp.s = load i32* @src + store i32 %tmp.s, i32* @dst + ret void +} + diff --git a/test/CodeGen/X86/test-pic-cpool.ll b/test/CodeGen/X86/test-pic-cpool.ll new file mode 100644 index 0000000..79f5607 --- /dev/null +++ b/test/CodeGen/X86/test-pic-cpool.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep GOTOFF %t | wc -l | grep 2 +; RUN: grep CPI %t | wc -l | grep 4 + +define double @foo(i32 %a.u) { +entry: + %tmp = icmp eq i32 %a.u,0 + %retval = select i1 %tmp, double 4.561230e+02, double 1.234560e+02 + ret double %retval +} + diff --git a/test/CodeGen/X86/test-pic-jtbl.ll b/test/CodeGen/X86/test-pic-jtbl.ll new file mode 100644 index 0000000..1afa4ca --- /dev/null +++ b/test/CodeGen/X86/test-pic-jtbl.ll @@ -0,0 +1,58 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep PLT %t | wc -l | grep 6 +; RUN: grep GOTOFF %t | wc -l | grep 1 +; RUN: grep JTI %t | wc -l | grep 8 + +define void @bar(i32 %n.u) { +entry: + switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ] +bb: + tail call void(...)* @foo1() + ret void +bb1: + tail call void(...)* @foo2() + ret void +bb2: + tail call void(...)* @foo6() + ret void +bb3: + tail call void(...)* @foo3() + ret void +bb4: + tail call void(...)* @foo4() + ret void +bb5: + tail call void(...)* @foo5() + ret void +bb6: + tail call void(...)* @foo1() + ret void +bb7: + tail call void(...)* @foo2() + ret void +bb8: + tail call void(...)* @foo6() + ret void +bb9: + tail call void(...)* @foo3() + ret void +bb10: + tail call void(...)* @foo4() + ret void +bb11: + tail call void(...)* @foo5() + ret void +bb12: + tail call void(...)* @foo6() + ret void +} + +declare void @foo1(...) +declare void @foo2(...) +declare void @foo6(...) +declare void @foo3(...) +declare void @foo4(...) +declare void @foo5(...) diff --git a/test/CodeGen/X86/tls1.ll b/test/CodeGen/X86/tls1.ll new file mode 100644 index 0000000..ae90c94 --- /dev/null +++ b/test/CodeGen/X86/tls1.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ +; RUN: grep {movl %gs:i@NTPOFF, %eax} +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ +; RUN: grep {leal i@NTPOFF(%eax), %eax} +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | \ +; RUN: grep {leal i@TLSGD(,%ebx,1), %eax} + +@i = thread_local global i32 15 ; <i32*> [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; <i32> [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} diff --git a/test/CodeGen/X86/tls2.ll b/test/CodeGen/X86/tls2.ll new file mode 100644 index 0000000..50e2ba6 --- /dev/null +++ b/test/CodeGen/X86/tls2.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ +; RUN: grep {movl %gs:(%eax), %eax} +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ +; RUN: grep {addl i@INDNTPOFF, %eax} +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | \ +; RUN: grep {leal i@TLSGD(,%ebx,1), %eax} + +@i = external thread_local global i32 ; <i32*> [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; <i32> [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} diff --git a/test/CodeGen/X86/trunc-to-bool.ll b/test/CodeGen/X86/trunc-to-bool.ll new file mode 100644 index 0000000..bf53825 --- /dev/null +++ b/test/CodeGen/X86/trunc-to-bool.ll @@ -0,0 +1,60 @@ +; An integer truncation to i1 should be done with an and instruction to make +; sure only the LSBit survives. Test that this is the case both for a returned +; value and as the operand of a branch. +; RUN: llvm-as < %s | llc -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \ +; RUN: wc -l | grep 6 + +define i1 @test1(i32 %X) zext { + %Y = trunc i32 %X to i1 + ret i1 %Y +} + +define i1 @test2(i32 %val, i32 %mask) { +entry: + %shifted = ashr i32 %val, %mask + %anded = and i32 %shifted, 1 + %trunced = trunc i32 %anded to i1 + br i1 %trunced, label %ret_true, label %ret_false +ret_true: + ret i1 true +ret_false: + ret i1 false +} + +define i32 @test3(i8* %ptr) { + %val = load i8* %ptr + %tmp = trunc i8 %val to i1 + br i1 %tmp, label %cond_true, label %cond_false +cond_true: + ret i32 21 +cond_false: + ret i32 42 +} + +define i32 @test4(i8* %ptr) { + %tmp = ptrtoint i8* %ptr to i1 + br i1 %tmp, label %cond_true, label %cond_false +cond_true: + ret i32 21 +cond_false: + ret i32 42 +} + +define i32 @test5(float %f) { + %tmp = fptoui float %f to i1 + br i1 %tmp, label %cond_true, label %cond_false +cond_true: + ret i32 21 +cond_false: + ret i32 42 +} + +define i32 @test6(double %d) { + %tmp = fptosi double %d to i1 + br i1 %tmp, label %cond_true, label %cond_false +cond_true: + ret i32 21 +cond_false: + ret i32 42 +} + diff --git a/test/CodeGen/X86/vec_add.ll b/test/CodeGen/X86/vec_add.ll new file mode 100644 index 0000000..b4154f6 --- /dev/null +++ b/test/CodeGen/X86/vec_add.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | | llc -march=x86 -mattr=+sse2 + +define <2 x i64> @test(<2 x i64> %a, <2 x i64> %b) { +entry: + %tmp9 = add <2 x i64> %b, %a ; <<2 x i64>> [#uses=1] + ret <2 x i64> %tmp9 +} diff --git a/test/CodeGen/X86/vec_call.ll b/test/CodeGen/X86/vec_call.ll new file mode 100644 index 0000000..990f20f --- /dev/null +++ b/test/CodeGen/X86/vec_call.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ +; RUN: grep {subl.*60} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ +; RUN: grep {movdqa.*32} + +void %test() { + tail call void %xx( int 1, int 2, int 3, int 4, int 5, int 6, int 7, <2 x long> cast (<4 x int> < int 4, int 3, int 2, int 1 > to <2 x long>), <2 x long> cast (<4 x int> < int 8, int 7, int 6, int 5 > to <2 x long>), <2 x long> cast (<4 x int> < int 6, int 4, int 2, int 0 > to <2 x long>), <2 x long> cast (<4 x int> < int 8, int 4, int 2, int 1 > to <2 x long>), <2 x long> cast (<4 x int> < int 0, int 1, int 3, int 9 > to <2 x long>) ) + ret void +} + +declare void %xx(int, int, int, int, int, int, int, <2 x long>, <2 x long>, <2 x long>, <2 x long>, <2 x long>) diff --git a/test/CodeGen/X86/vec_clear.ll b/test/CodeGen/X86/vec_clear.ll new file mode 100644 index 0000000..8289b6b --- /dev/null +++ b/test/CodeGen/X86/vec_clear.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | not grep and +<4 x float> %test(<4 x float>* %v1) { + %tmp = load <4 x float>* %v1 + %tmp15 = cast <4 x float> %tmp to <2 x long> + %tmp24 = and <2 x long> %tmp15, cast (<4 x int> < int 0, int 0, int -1, int -1 > to <2 x long>) + %tmp31 = cast <2 x long> %tmp24 to <4 x float> + ret <4 x float> %tmp31 +} diff --git a/test/CodeGen/X86/vec_extract.ll b/test/CodeGen/X86/vec_extract.ll new file mode 100644 index 0000000..2d3e87e --- /dev/null +++ b/test/CodeGen/X86/vec_extract.ll @@ -0,0 +1,36 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movss %t | wc -l | grep 3 +; RUN: grep movhlps %t | wc -l | grep 1 +; RUN: grep pshufd %t | wc -l | grep 1 +; RUN: grep unpckhpd %t | wc -l | grep 1 + +void %test1(<4 x float>* %F, float* %f) { + %tmp = load <4 x float>* %F + %tmp7 = add <4 x float> %tmp, %tmp + %tmp2 = extractelement <4 x float> %tmp7, uint 0 + store float %tmp2, float* %f + ret void +} + +float %test2(<4 x float>* %F, float* %f) { + %tmp = load <4 x float>* %F + %tmp7 = add <4 x float> %tmp, %tmp + %tmp2 = extractelement <4 x float> %tmp7, uint 2 + ret float %tmp2 +} + +void %test3(float* %R, <4 x float>* %P1) { + %X = load <4 x float>* %P1 + %tmp = extractelement <4 x float> %X, uint 3 + store float %tmp, float* %R + ret void +} + +double %test4(double %A) { + %tmp1 = call <2 x double> %foo() + %tmp2 = extractelement <2 x double> %tmp1, uint 1 + %tmp3 = add double %tmp2, %A + ret double %tmp3 +} + +declare <2 x double> %foo() diff --git a/test/CodeGen/X86/vec_fneg.ll b/test/CodeGen/X86/vec_fneg.ll new file mode 100644 index 0000000..0a057a4 --- /dev/null +++ b/test/CodeGen/X86/vec_fneg.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | | llc -march=x86 -mattr=+sse2 + +define <4 x float> @t1(<4 x float> %Q) { + %tmp15 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %Q + ret <4 x float> %tmp15 +} + +define <4 x float> @t2(<4 x float> %Q) { + %tmp15 = sub <4 x float> zeroinitializer, %Q + ret <4 x float> %tmp15 +} diff --git a/test/CodeGen/X86/vec_ins_extract.ll b/test/CodeGen/X86/vec_ins_extract.ll new file mode 100644 index 0000000..9f44afe --- /dev/null +++ b/test/CodeGen/X86/vec_ins_extract.ll @@ -0,0 +1,51 @@ +; RUN: llvm-upgrade < %s | llvm-as | opt -scalarrepl -instcombine | \ +; RUN: llc -march=x86 -mcpu=yonah | not grep sub.*esp + +; This checks that various insert/extract idiom work without going to the +; stack. + +void %test(<4 x float>* %F, float %f) { +entry: + %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2] + %tmp3 = add <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1] + %tmp10 = insertelement <4 x float> %tmp3, float %f, uint 0 ; <<4 x float>> [#uses=2] + %tmp6 = add <4 x float> %tmp10, %tmp10 ; <<4 x float>> [#uses=1] + store <4 x float> %tmp6, <4 x float>* %F + ret void +} + +void %test2(<4 x float>* %F, float %f) { +entry: + %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3] + %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2] + %tmp3 = add <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1] + store <4 x float> %tmp3, <4 x float>* %G + %tmp = getelementptr <4 x float>* %G, int 0, int 2 ; <float*> [#uses=1] + store float %f, float* %tmp + %tmp4 = load <4 x float>* %G ; <<4 x float>> [#uses=2] + %tmp6 = add <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1] + store <4 x float> %tmp6, <4 x float>* %F + ret void +} + +void %test3(<4 x float>* %F, float* %f) { +entry: + %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2] + %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2] + %tmp3 = add <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1] + store <4 x float> %tmp3, <4 x float>* %G + %tmp = getelementptr <4 x float>* %G, int 0, int 2 ; <float*> [#uses=1] + %tmp = load float* %tmp ; <float> [#uses=1] + store float %tmp, float* %f + ret void +} + +void %test4(<4 x float>* %F, float* %f) { +entry: + %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2] + %tmp5.lhs = extractelement <4 x float> %tmp, uint 0 ; <float> [#uses=1] + %tmp5.rhs = extractelement <4 x float> %tmp, uint 0 ; <float> [#uses=1] + %tmp5 = add float %tmp5.lhs, %tmp5.rhs ; <float> [#uses=1] + store float %tmp5, float* %f + ret void +} diff --git a/test/CodeGen/X86/vec_insert.ll b/test/CodeGen/X86/vec_insert.ll new file mode 100644 index 0000000..021685e --- /dev/null +++ b/test/CodeGen/X86/vec_insert.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movss %t | wc -l | grep 1 +; RUN: grep pinsrw %t | wc -l | grep 2 + +void %test(<4 x float>* %F, int %I) { + %tmp = load <4 x float>* %F + %f = cast int %I to float + %tmp1 = insertelement <4 x float> %tmp, float %f, uint 0 + %tmp18 = add <4 x float> %tmp1, %tmp1 + store <4 x float> %tmp18, <4 x float>* %F + ret void +} + +void %test2(<4 x float>* %F, int %I, float %g) { + %tmp = load <4 x float>* %F + %f = cast int %I to float + %tmp1 = insertelement <4 x float> %tmp, float %f, uint 2 + store <4 x float> %tmp1, <4 x float>* %F + ret void +} diff --git a/test/CodeGen/X86/vec_return.ll b/test/CodeGen/X86/vec_return.ll new file mode 100644 index 0000000..2b2d954 --- /dev/null +++ b/test/CodeGen/X86/vec_return.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah + +<2 x double> %test() { + ret <2 x double> <double 0.0, double 0.0> +} diff --git a/test/CodeGen/X86/vec_select.ll b/test/CodeGen/X86/vec_select.ll new file mode 100644 index 0000000..05f2a8c --- /dev/null +++ b/test/CodeGen/X86/vec_select.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse + +void %test(int %C, <4 x float>* %A, <4 x float>* %B) { + %tmp = load <4 x float>* %A + %tmp3 = load <4 x float>* %B + %tmp9 = mul <4 x float> %tmp3, %tmp3 + %tmp = seteq int %C, 0 + %iftmp.38.0 = select bool %tmp, <4 x float> %tmp9, <4 x float> %tmp + store <4 x float> %iftmp.38.0, <4 x float>* %A + ret void +} diff --git a/test/CodeGen/X86/vec_set-2.ll b/test/CodeGen/X86/vec_set-2.ll new file mode 100644 index 0000000..1d1449d --- /dev/null +++ b/test/CodeGen/X86/vec_set-2.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movss | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movd | wc -l | grep 1 + +<4 x float> %test1(float %a) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 0 + %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1 + %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, uint 2 + %tmp7 = insertelement <4 x float> %tmp6, float 0.000000e+00, uint 3 + ret <4 x float> %tmp7 +} + +<2 x long> %test(short %a) { + %tmp = insertelement <8 x short> zeroinitializer, short %a, uint 0 + %tmp6 = insertelement <8 x short> %tmp, short 0, uint 1 + %tmp8 = insertelement <8 x short> %tmp6, short 0, uint 2 + %tmp10 = insertelement <8 x short> %tmp8, short 0, uint 3 + %tmp12 = insertelement <8 x short> %tmp10, short 0, uint 4 + %tmp14 = insertelement <8 x short> %tmp12, short 0, uint 5 + %tmp16 = insertelement <8 x short> %tmp14, short 0, uint 6 + %tmp18 = insertelement <8 x short> %tmp16, short 0, uint 7 + %tmp19 = cast <8 x short> %tmp18 to <2 x long> + ret <2 x long> %tmp19 +} diff --git a/test/CodeGen/X86/vec_set-3.ll b/test/CodeGen/X86/vec_set-3.ll new file mode 100644 index 0000000..1edaa58 --- /dev/null +++ b/test/CodeGen/X86/vec_set-3.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep shufps %t | wc -l | grep 1 +; RUN: grep pshufd %t | wc -l | grep 1 + +<4 x float> %test(float %a) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 1 + %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 2 + %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, uint 3 + ret <4 x float> %tmp6 +} + +<2 x long> %test2(int %a) { + %tmp7 = insertelement <4 x int> zeroinitializer, int %a, uint 2 + %tmp9 = insertelement <4 x int> %tmp7, int 0, uint 3 + %tmp10 = cast <4 x int> %tmp9 to <2 x long> + ret <2 x long> %tmp10 +} diff --git a/test/CodeGen/X86/vec_set-4.ll b/test/CodeGen/X86/vec_set-4.ll new file mode 100644 index 0000000..c656a58 --- /dev/null +++ b/test/CodeGen/X86/vec_set-4.ll @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep pinsrw | wc -l | grep 2 + +<2 x long> %test(short %a) { +entry: + %tmp10 = insertelement <8 x short> zeroinitializer, short %a, uint 3 ; <<8 x short>> [#uses=1] + %tmp12 = insertelement <8 x short> %tmp10, short 0, uint 4 ; <<8 x short>> [#uses=1] + %tmp14 = insertelement <8 x short> %tmp12, short 0, uint 5 ; <<8 x short>> [#uses=1] + %tmp16 = insertelement <8 x short> %tmp14, short 0, uint 6 ; <<8 x short>> [#uses=1] + %tmp18 = insertelement <8 x short> %tmp16, short 0, uint 7 ; <<8 x short>> [#uses=1] + %tmp19 = cast <8 x short> %tmp18 to <2 x long> ; <<2 x long>> [#uses=1] + ret <2 x long> %tmp19 +} + +<2 x long> %test2(sbyte %a) { +entry: + %tmp24 = insertelement <16 x sbyte> zeroinitializer, sbyte %a, uint 10 + %tmp26 = insertelement <16 x sbyte> %tmp24, sbyte 0, uint 11 + %tmp28 = insertelement <16 x sbyte> %tmp26, sbyte 0, uint 12 + %tmp30 = insertelement <16 x sbyte> %tmp28, sbyte 0, uint 13 + %tmp32 = insertelement <16 x sbyte> %tmp30, sbyte 0, uint 14 + %tmp34 = insertelement <16 x sbyte> %tmp32, sbyte 0, uint 15 + %tmp35 = cast <16 x sbyte> %tmp34 to <2 x long> + ret <2 x long> %tmp35 +} diff --git a/test/CodeGen/X86/vec_set-5.ll b/test/CodeGen/X86/vec_set-5.ll new file mode 100644 index 0000000..218f041 --- /dev/null +++ b/test/CodeGen/X86/vec_set-5.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movlhps %t | wc -l | grep 2 +; RUN: grep unpcklps %t | wc -l | grep 1 +; RUN: grep punpckldq %t | wc -l | grep 1 + +<4 x float> %test1(float %a, float %b) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 0 + %tmp6 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1 + %tmp8 = insertelement <4 x float> %tmp6, float %b, uint 2 + %tmp9 = insertelement <4 x float> %tmp8, float 0.000000e+00, uint 3 + ret <4 x float> %tmp9 +} + +<4 x float> %test2(float %a, float %b) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 0 + %tmp7 = insertelement <4 x float> %tmp, float %b, uint 1 + %tmp8 = insertelement <4 x float> %tmp7, float 0.000000e+00, uint 2 + %tmp9 = insertelement <4 x float> %tmp8, float 0.000000e+00, uint 3 + ret <4 x float> %tmp9 +} + +<2 x long> %test3(int %a, int %b) { + %tmp = insertelement <4 x int> zeroinitializer, int %a, uint 0 + %tmp6 = insertelement <4 x int> %tmp, int %b, uint 1 + %tmp8 = insertelement <4 x int> %tmp6, int 0, uint 2 + %tmp10 = insertelement <4 x int> %tmp8, int 0, uint 3 + %tmp11 = cast <4 x int> %tmp10 to <2 x long> + ret <2 x long> %tmp11 +} diff --git a/test/CodeGen/X86/vec_set-6.ll b/test/CodeGen/X86/vec_set-6.ll new file mode 100644 index 0000000..ea6be74 --- /dev/null +++ b/test/CodeGen/X86/vec_set-6.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep unpcklps %t | wc -l | grep 1 +; RUN: grep shufps %t | wc -l | grep 1 + +<4 x float> %test(float %a, float %b, float %c) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 1 + %tmp8 = insertelement <4 x float> %tmp, float %b, uint 2 + %tmp10 = insertelement <4 x float> %tmp8, float %c, uint 3 + ret <4 x float> %tmp10 +} diff --git a/test/CodeGen/X86/vec_set-7.ll b/test/CodeGen/X86/vec_set-7.ll new file mode 100644 index 0000000..ab342df --- /dev/null +++ b/test/CodeGen/X86/vec_set-7.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movq | wc -l | grep 1 + +<2 x long> %test(<2 x long>* %p) { + %tmp = cast <2 x long>* %p to double* + %tmp = load double* %tmp + %tmp = insertelement <2 x double> undef, double %tmp, uint 0 + %tmp5 = insertelement <2 x double> %tmp, double 0.000000e+00, uint 1 + %tmp = cast <2 x double> %tmp5 to <2 x long> + ret <2 x long> %tmp +} diff --git a/test/CodeGen/X86/vec_set.ll b/test/CodeGen/X86/vec_set.ll new file mode 100644 index 0000000..c190e41 --- /dev/null +++ b/test/CodeGen/X86/vec_set.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep punpckl | wc -l | grep 7 + +void %test(<8 x short>* %b, short %a0, short %a1, short %a2, short %a3, short %a4, short %a5, short %a6, short %a7) { + %tmp = insertelement <8 x short> zeroinitializer, short %a0, uint 0 + %tmp2 = insertelement <8 x short> %tmp, short %a1, uint 1 + %tmp4 = insertelement <8 x short> %tmp2, short %a2, uint 2 + %tmp6 = insertelement <8 x short> %tmp4, short %a3, uint 3 + %tmp8 = insertelement <8 x short> %tmp6, short %a4, uint 4 + %tmp10 = insertelement <8 x short> %tmp8, short %a5, uint 5 + %tmp12 = insertelement <8 x short> %tmp10, short %a6, uint 6 + %tmp14 = insertelement <8 x short> %tmp12, short %a7, uint 7 + store <8 x short> %tmp14, <8 x short>* %b + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-10.ll b/test/CodeGen/X86/vec_shuffle-10.ll new file mode 100644 index 0000000..34a97c4 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-10.ll @@ -0,0 +1,27 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ +; RUN: grep unpcklps | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ +; RUN: grep unpckhps | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ +; RUN: not grep {sub.*esp} + +void %test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B) { + %tmp = load <4 x float>* %B ; <<4 x float>> [#uses=2] + %tmp3 = load <4 x float>* %A ; <<4 x float>> [#uses=2] + %tmp = extractelement <4 x float> %tmp3, uint 0 ; <float> [#uses=1] + %tmp7 = extractelement <4 x float> %tmp, uint 0 ; <float> [#uses=1] + %tmp8 = extractelement <4 x float> %tmp3, uint 1 ; <float> [#uses=1] + %tmp9 = extractelement <4 x float> %tmp, uint 1 ; <float> [#uses=1] + %tmp10 = insertelement <4 x float> undef, float %tmp, uint 0 ; <<4 x float>> [#uses=1] + %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, uint 1 ; <<4 x float>> [#uses=1] + %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, uint 2 ; <<4 x float>> [#uses=1] + %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, uint 3 ; <<4 x float>> [#uses=1] + store <4 x float> %tmp13, <4 x float>* %res + ret void +} + +void %test2(<4 x float> %X, <4 x float>* %res) { + %tmp5 = shufflevector <4 x float> %X, <4 x float> undef, <4 x uint> < uint 2, uint 6, uint 3, uint 7 > + store <4 x float> %tmp5, <4 x float>* %res + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-11.ll b/test/CodeGen/X86/vec_shuffle-11.ll new file mode 100644 index 0000000..553088f --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-11.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep mov + +define <4 x i32> @test() { + %tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1] + %tmp137 = bitcast <2 x i64> %tmp131 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp138 = and <4 x i32> %tmp137, bitcast (<2 x i64> < i64 -1, i64 -1 > to <4 x i32>) ; <<4 x i32>> [#uses=1] + ret <4 x i32> %tmp138 +} + +declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32) diff --git a/test/CodeGen/X86/vec_shuffle-2.ll b/test/CodeGen/X86/vec_shuffle-2.ll new file mode 100644 index 0000000..df78323 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-2.ll @@ -0,0 +1,47 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep pshufhw %t | wc -l | grep 1 +; RUN: grep pshuflw %t | wc -l | grep 1 +; RUN: grep movhps %t | wc -l | grep 1 + +void %test1(<2 x long>* %res, <2 x long>* %A) { + %tmp = load <2 x long>* %A + %tmp = cast <2 x long> %tmp to <8 x short> + %tmp0 = extractelement <8 x short> %tmp, uint 0 + %tmp1 = extractelement <8 x short> %tmp, uint 1 + %tmp2 = extractelement <8 x short> %tmp, uint 2 + %tmp3 = extractelement <8 x short> %tmp, uint 3 + %tmp4 = extractelement <8 x short> %tmp, uint 4 + %tmp5 = extractelement <8 x short> %tmp, uint 5 + %tmp6 = extractelement <8 x short> %tmp, uint 6 + %tmp7 = extractelement <8 x short> %tmp, uint 7 + %tmp8 = insertelement <8 x short> undef, short %tmp2, uint 0 + %tmp9 = insertelement <8 x short> %tmp8, short %tmp1, uint 1 + %tmp10 = insertelement <8 x short> %tmp9, short %tmp0, uint 2 + %tmp11 = insertelement <8 x short> %tmp10, short %tmp3, uint 3 + %tmp12 = insertelement <8 x short> %tmp11, short %tmp6, uint 4 + %tmp13 = insertelement <8 x short> %tmp12, short %tmp5, uint 5 + %tmp14 = insertelement <8 x short> %tmp13, short %tmp4, uint 6 + %tmp15 = insertelement <8 x short> %tmp14, short %tmp7, uint 7 + %tmp15 = cast <8 x short> %tmp15 to <2 x long> + store <2 x long> %tmp15, <2 x long>* %res + ret void +} + +void %test2(<4 x float>* %r, <2 x int>* %A) { + %tmp = load <4 x float>* %r + %tmp = cast <2 x int>* %A to double* + %tmp = load double* %tmp + %tmp = insertelement <2 x double> undef, double %tmp, uint 0 + %tmp5 = insertelement <2 x double> %tmp, double undef, uint 1 + %tmp6 = cast <2 x double> %tmp5 to <4 x float> + %tmp = extractelement <4 x float> %tmp, uint 0 + %tmp7 = extractelement <4 x float> %tmp, uint 1 + %tmp8 = extractelement <4 x float> %tmp6, uint 0 + %tmp9 = extractelement <4 x float> %tmp6, uint 1 + %tmp10 = insertelement <4 x float> undef, float %tmp, uint 0 + %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, uint 1 + %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, uint 2 + %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, uint 3 + store <4 x float> %tmp13, <4 x float>* %r + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-3.ll b/test/CodeGen/X86/vec_shuffle-3.ll new file mode 100644 index 0000000..a0ce0f0 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-3.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movlhps %t | wc -l | grep 1 +; RUN: grep movhlps %t | wc -l | grep 1 + +<4 x float> %test1(<4 x float>* %x, <4 x float>* %y) { + %tmp = load <4 x float>* %y + %tmp5 = load <4 x float>* %x + %tmp9 = add <4 x float> %tmp5, %tmp + %tmp21 = sub <4 x float> %tmp5, %tmp + %tmp27 = shufflevector <4 x float> %tmp9, <4 x float> %tmp21, <4 x uint> < uint 0, uint 1, uint 4, uint 5 > + ret <4 x float> %tmp27 +} + +<4 x float> %movhl(<4 x float>* %x, <4 x float>* %y) { +entry: + %tmp = load <4 x float>* %y + %tmp3 = load <4 x float>* %x + %tmp4 = shufflevector <4 x float> %tmp3, <4 x float> %tmp, <4 x uint> < uint 2, uint 3, uint 6, uint 7 > + ret <4 x float> %tmp4 +} diff --git a/test/CodeGen/X86/vec_shuffle-4.ll b/test/CodeGen/X86/vec_shuffle-4.ll new file mode 100644 index 0000000..5bb30bf --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-4.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 > %t +; RUN: grep shuf %t | wc -l | grep 2 +; RUN: not grep unpck %t +void %test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B, <4 x float>* %C) { + %tmp3 = load <4 x float>* %B + %tmp5 = load <4 x float>* %C + %tmp11 = shufflevector <4 x float> %tmp3, <4 x float> %tmp5, <4 x uint> < uint 1, uint 4, uint 1, uint 5 > + store <4 x float> %tmp11, <4 x float>* %res + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-5.ll b/test/CodeGen/X86/vec_shuffle-5.ll new file mode 100644 index 0000000..e980a12 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-5.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movhlps %t | wc -l | grep 1 +; RUN: grep shufps %t | wc -l | grep 1 + +void %test() { + %tmp1 = load <4 x float>* null + %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x uint> < uint 0, uint 1, uint 6, uint 7 > + %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x uint> < uint 2, uint 3, uint 6, uint 7 > + %tmp4 = add <4 x float> %tmp2, %tmp3 + store <4 x float> %tmp4, <4 x float>* null + ret void +} + diff --git a/test/CodeGen/X86/vec_shuffle-6.ll b/test/CodeGen/X86/vec_shuffle-6.ll new file mode 100644 index 0000000..661fe09 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-6.ll @@ -0,0 +1,43 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movapd %t | wc -l | grep 1 +; RUN: grep movaps %t | wc -l | grep 1 +; RUN: grep movups %t | wc -l | grep 2 + +target triple = "i686-apple-darwin" + +%x = global [4 x int] [ int 1, int 2, int 3, int 4 ] + +<2 x long> %test1() { + %tmp = load int* getelementptr ([4 x int]* %x, int 0, int 0) + %tmp3 = load int* getelementptr ([4 x int]* %x, int 0, int 1) + %tmp5 = load int* getelementptr ([4 x int]* %x, int 0, int 2) + %tmp7 = load int* getelementptr ([4 x int]* %x, int 0, int 3) + %tmp = insertelement <4 x int> undef, int %tmp, uint 0 + %tmp13 = insertelement <4 x int> %tmp, int %tmp3, uint 1 + %tmp14 = insertelement <4 x int> %tmp13, int %tmp5, uint 2 + %tmp15 = insertelement <4 x int> %tmp14, int %tmp7, uint 3 + %tmp16 = cast <4 x int> %tmp15 to <2 x long> + ret <2 x long> %tmp16 +} + +<4 x float> %test2(int %dummy, float %a, float %b, float %c, float %d) { + %tmp = insertelement <4 x float> undef, float %a, uint 0 + %tmp11 = insertelement <4 x float> %tmp, float %b, uint 1 + %tmp12 = insertelement <4 x float> %tmp11, float %c, uint 2 + %tmp13 = insertelement <4 x float> %tmp12, float %d, uint 3 + ret <4 x float> %tmp13 +} + +<4 x float> %test3(float %a, float %b, float %c, float %d) { + %tmp = insertelement <4 x float> undef, float %a, uint 0 + %tmp11 = insertelement <4 x float> %tmp, float %b, uint 1 + %tmp12 = insertelement <4 x float> %tmp11, float %c, uint 2 + %tmp13 = insertelement <4 x float> %tmp12, float %d, uint 3 + ret <4 x float> %tmp13 +} + +<2 x double> %test4(double %a, double %b) { + %tmp = insertelement <2 x double> undef, double %a, uint 0 + %tmp7 = insertelement <2 x double> %tmp, double %b, uint 1 + ret <2 x double> %tmp7 +} diff --git a/test/CodeGen/X86/vec_shuffle-7.ll b/test/CodeGen/X86/vec_shuffle-7.ll new file mode 100644 index 0000000..ae64c28 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-7.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep xorps %t | wc -l | grep 1 +; RUN: not grep shufps %t + +void %test() { + cast <4 x int> zeroinitializer to <4 x float> + shufflevector <4 x float> %0, <4 x float> zeroinitializer, <4 x uint> zeroinitializer + store <4 x float> %1, <4 x float>* null + unreachable +} diff --git a/test/CodeGen/X86/vec_shuffle-8.ll b/test/CodeGen/X86/vec_shuffle-8.ll new file mode 100644 index 0000000..4daf73e --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-8.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ +; RUN: not grep shufps + +void %test(<4 x float>* %res, <4 x float>* %A) { + %tmp1 = load <4 x float>* %A + %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x uint> < uint 0, uint 5, uint 6, uint 7 > + store <4 x float> %tmp2, <4 x float>* %res + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-9.ll b/test/CodeGen/X86/vec_shuffle-9.ll new file mode 100644 index 0000000..e83e298 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-9.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep punpck %t | wc -l | grep 2 +; RUN: not grep pextrw %t + +<4 x int> %test(sbyte** %ptr) { +entry: + %tmp = load sbyte** %ptr + %tmp = cast sbyte* %tmp to float* + %tmp = load float* %tmp + %tmp = insertelement <4 x float> undef, float %tmp, uint 0 + %tmp9 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1 + %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, uint 2 + %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, uint 3 + %tmp21 = cast <4 x float> %tmp11 to <16 x sbyte> + %tmp22 = shufflevector <16 x sbyte> %tmp21, <16 x sbyte> zeroinitializer, <16 x uint> < uint 0, uint 16, uint 1, uint 17, uint 2, uint 18, uint 3, uint 19, uint 4, uint 20, uint 5, uint 21, uint 6, uint 22, uint 7, uint 23 > + %tmp31 = cast <16 x sbyte> %tmp22 to <8 x short> + %tmp = shufflevector <8 x short> zeroinitializer, <8 x short> %tmp31, <8 x uint> < uint 0, uint 8, uint 1, uint 9, uint 2, uint 10, uint 3, uint 11 > + %tmp36 = cast <8 x short> %tmp to <4 x int> + ret <4 x int> %tmp36 +} diff --git a/test/CodeGen/X86/vec_shuffle.ll b/test/CodeGen/X86/vec_shuffle.ll new file mode 100644 index 0000000..d06efa5 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle.ll @@ -0,0 +1,44 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep shufp %t | wc -l | grep 1 +; RUN: grep movups %t | wc -l | grep 1 +; RUN: grep pshufhw %t | wc -l | grep 1 + +void %test_v4sf(<4 x float>* %P, float %X, float %Y) { + %tmp = insertelement <4 x float> zeroinitializer, float %X, uint 0 + %tmp2 = insertelement <4 x float> %tmp, float %X, uint 1 + %tmp4 = insertelement <4 x float> %tmp2, float %Y, uint 2 + %tmp6 = insertelement <4 x float> %tmp4, float %Y, uint 3 + store <4 x float> %tmp6, <4 x float>* %P + ret void +} + +void %test_v2sd(<2 x double>* %P, double %X, double %Y) { + %tmp = insertelement <2 x double> zeroinitializer, double %X, uint 0 + %tmp2 = insertelement <2 x double> %tmp, double %Y, uint 1 + store <2 x double> %tmp2, <2 x double>* %P + ret void +} + +void %test_v8i16(<2 x long>* %res, <2 x long>* %A) { + %tmp = load <2 x long>* %A + %tmp = cast <2 x long> %tmp to <8 x short> + %tmp = extractelement <8 x short> %tmp, uint 0 + %tmp1 = extractelement <8 x short> %tmp, uint 1 + %tmp2 = extractelement <8 x short> %tmp, uint 2 + %tmp3 = extractelement <8 x short> %tmp, uint 3 + %tmp4 = extractelement <8 x short> %tmp, uint 6 + %tmp5 = extractelement <8 x short> %tmp, uint 5 + %tmp6 = extractelement <8 x short> %tmp, uint 4 + %tmp7 = extractelement <8 x short> %tmp, uint 7 + %tmp8 = insertelement <8 x short> undef, short %tmp, uint 0 + %tmp9 = insertelement <8 x short> %tmp8, short %tmp1, uint 1 + %tmp10 = insertelement <8 x short> %tmp9, short %tmp2, uint 2 + %tmp11 = insertelement <8 x short> %tmp10, short %tmp3, uint 3 + %tmp12 = insertelement <8 x short> %tmp11, short %tmp4, uint 4 + %tmp13 = insertelement <8 x short> %tmp12, short %tmp5, uint 5 + %tmp14 = insertelement <8 x short> %tmp13, short %tmp6, uint 6 + %tmp15 = insertelement <8 x short> %tmp14, short %tmp7, uint 7 + %tmp15 = cast <8 x short> %tmp15 to <2 x long> + store <2 x long> %tmp15, <2 x long>* %res + ret void +} diff --git a/test/CodeGen/X86/vec_splat-2.ll b/test/CodeGen/X86/vec_splat-2.ll new file mode 100644 index 0000000..a874500 --- /dev/null +++ b/test/CodeGen/X86/vec_splat-2.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep pshufd | wc -l | grep 1 + +void %test(<2 x long>* %P, sbyte %x) { + %tmp = insertelement <16 x sbyte> zeroinitializer, sbyte %x, uint 0 ; <<16 x sbyte>> [#uses=1] + %tmp36 = insertelement <16 x sbyte> %tmp, sbyte %x, uint 1 + %tmp38 = insertelement <16 x sbyte> %tmp36, sbyte %x, uint 2 + %tmp40 = insertelement <16 x sbyte> %tmp38, sbyte %x, uint 3 + %tmp42 = insertelement <16 x sbyte> %tmp40, sbyte %x, uint 4 + %tmp44 = insertelement <16 x sbyte> %tmp42, sbyte %x, uint 5 + %tmp46 = insertelement <16 x sbyte> %tmp44, sbyte %x, uint 6 + %tmp48 = insertelement <16 x sbyte> %tmp46, sbyte %x, uint 7 + %tmp50 = insertelement <16 x sbyte> %tmp48, sbyte %x, uint 8 + %tmp52 = insertelement <16 x sbyte> %tmp50, sbyte %x, uint 9 + %tmp54 = insertelement <16 x sbyte> %tmp52, sbyte %x, uint 10 + %tmp56 = insertelement <16 x sbyte> %tmp54, sbyte %x, uint 11 + %tmp58 = insertelement <16 x sbyte> %tmp56, sbyte %x, uint 12 + %tmp60 = insertelement <16 x sbyte> %tmp58, sbyte %x, uint 13 + %tmp62 = insertelement <16 x sbyte> %tmp60, sbyte %x, uint 14 + %tmp64 = insertelement <16 x sbyte> %tmp62, sbyte %x, uint 15 + %tmp68 = load <2 x long>* %P + %tmp71 = cast <2 x long> %tmp68 to <16 x sbyte> + %tmp73 = add <16 x sbyte> %tmp71, %tmp64 + %tmp73 = cast <16 x sbyte> %tmp73 to <2 x long> + store <2 x long> %tmp73, <2 x long>* %P + ret void +} diff --git a/test/CodeGen/X86/vec_splat.ll b/test/CodeGen/X86/vec_splat.ll new file mode 100644 index 0000000..3d73a87 --- /dev/null +++ b/test/CodeGen/X86/vec_splat.ll @@ -0,0 +1,22 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep shufps +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse3 | grep movddup + +void %test_v4sf(<4 x float>* %P, <4 x float>* %Q, float %X) { + %tmp = insertelement <4 x float> zeroinitializer, float %X, uint 0 + %tmp2 = insertelement <4 x float> %tmp, float %X, uint 1 + %tmp4 = insertelement <4 x float> %tmp2, float %X, uint 2 + %tmp6 = insertelement <4 x float> %tmp4, float %X, uint 3 + %tmp8 = load <4 x float>* %Q + %tmp10 = mul <4 x float> %tmp8, %tmp6 + store <4 x float> %tmp10, <4 x float>* %P + ret void +} + +void %test_v2sd(<2 x double>* %P, <2 x double>* %Q, double %X) { + %tmp = insertelement <2 x double> zeroinitializer, double %X, uint 0 + %tmp2 = insertelement <2 x double> %tmp, double %X, uint 1 + %tmp4 = load <2 x double>* %Q + %tmp6 = mul <2 x double> %tmp4, %tmp2 + store <2 x double> %tmp6, <2 x double>* %P + ret void +} diff --git a/test/CodeGen/X86/vec_ss_load_fold.ll b/test/CodeGen/X86/vec_ss_load_fold.ll new file mode 100644 index 0000000..1c9f6f1 --- /dev/null +++ b/test/CodeGen/X86/vec_ss_load_fold.ll @@ -0,0 +1,47 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse,+sse2 -o %t -f +; RUN: grep minss %t | grep CPI | wc -l | grep 2 +; RUN: grep CPI %t | not grep movss + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8.7.2" + +implementation ; Functions: + +ushort %test1(float %f) { + %tmp = insertelement <4 x float> undef, float %f, uint 0 ; <<4 x float>> [#uses=1] + %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1 ; <<4 x float>> [#uses=1] + %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, uint 2 ; <<4 x float>> [#uses=1] + %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, uint 3 ; <<4 x float>> [#uses=1] + %tmp28 = tail call <4 x float> %llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1] + %tmp37 = tail call <4 x float> %llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1] + %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1] + %tmp59 = tail call <4 x float> %llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1] + %tmp = tail call int %llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <int> [#uses=1] + %tmp69 = cast int %tmp to ushort ; <ushort> [#uses=1] + ret ushort %tmp69 +} + +ushort %test2(float %f) { + %tmp28 = sub float %f, 1.000000e+00 ; <float> [#uses=1] + %tmp37 = mul float %tmp28, 5.000000e-01 ; <float> [#uses=1] + %tmp375 = insertelement <4 x float> undef, float %tmp37, uint 0 ; <<4 x float>> [#uses=1] + %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1] + %tmp59 = tail call <4 x float> %llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> < float 0.000000e+00, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1] + %tmp = tail call int %llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <int> [#uses=1] + %tmp69 = cast int %tmp to ushort ; <ushort> [#uses=1] + ret ushort %tmp69 +} + + +declare <4 x float> %llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) + +declare <4 x float> %llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) + +declare <4 x float> %llvm.x86.sse.min.ss(<4 x float>, <4 x float>) + +declare <4 x float> %llvm.x86.sse.max.ss(<4 x float>, <4 x float>) + +declare int %llvm.x86.sse.cvttss2si(<4 x float>) + + diff --git a/test/CodeGen/X86/vec_zero.ll b/test/CodeGen/X86/vec_zero.ll new file mode 100644 index 0000000..f976fc1 --- /dev/null +++ b/test/CodeGen/X86/vec_zero.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep xorps | wc -l | grep 2 + +void %foo(<4 x float> *%P) { + %T = load <4 x float> * %P + %S = add <4 x float> zeroinitializer, %T + store <4 x float> %S, <4 x float>* %P + ret void +} + +void %bar(<4 x int> *%P) { + %T = load <4 x int> * %P + %S = add <4 x int> zeroinitializer, %T + store <4 x int> %S, <4 x int>* %P + ret void +} diff --git a/test/CodeGen/X86/vector.ll b/test/CodeGen/X86/vector.ll new file mode 100644 index 0000000..348d4d6 --- /dev/null +++ b/test/CodeGen/X86/vector.ll @@ -0,0 +1,157 @@ +; Test that vectors are scalarized/lowered correctly. +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah + +%f1 = type <1 x float> +%f2 = type <2 x float> +%f4 = type <4 x float> +%i4 = type <4 x int> +%f8 = type <8 x float> +%d8 = type <8 x double> + +implementation + +;;; TEST HANDLING OF VARIOUS VECTOR SIZES + +void %test_f1(%f1 *%P, %f1* %Q, %f1 *%S) { + %p = load %f1 *%P + %q = load %f1* %Q + %R = add %f1 %p, %q + store %f1 %R, %f1 *%S + ret void +} + +void %test_f2(%f2 *%P, %f2* %Q, %f2 *%S) { + %p = load %f2* %P + %q = load %f2* %Q + %R = add %f2 %p, %q + store %f2 %R, %f2 *%S + ret void +} + +void %test_f4(%f4 *%P, %f4* %Q, %f4 *%S) { + %p = load %f4* %P + %q = load %f4* %Q + %R = add %f4 %p, %q + store %f4 %R, %f4 *%S + ret void +} + +void %test_f8(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = add %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +void %test_fmul(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = mul %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +void %test_div(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = div %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +;;; TEST VECTOR CONSTRUCTS + +void %test_cst(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, <float 0.1, float 1.0, float 2.0, float 4.5> + store %f4 %R, %f4 *%S + ret void +} + +void %test_zero(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, zeroinitializer + store %f4 %R, %f4 *%S + ret void +} + +void %test_undef(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, undef + store %f4 %R, %f4 *%S + ret void +} + +void %test_constant_insert(%f4 *%S) { + %R = insertelement %f4 zeroinitializer, float 10.0, uint 0 + store %f4 %R, %f4 *%S + ret void +} + +void %test_variable_buildvector(float %F, %f4 *%S) { + %R = insertelement %f4 zeroinitializer, float %F, uint 0 + store %f4 %R, %f4 *%S + ret void +} + +void %test_scalar_to_vector(float %F, %f4 *%S) { + %R = insertelement %f4 undef, float %F, uint 0 ;; R = scalar_to_vector F + store %f4 %R, %f4 *%S + ret void +} + +float %test_extract_elt(%f8 *%P) { + %p = load %f8* %P + %R = extractelement %f8 %p, uint 3 + ret float %R +} + +double %test_extract_elt2(%d8 *%P) { + %p = load %d8* %P + %R = extractelement %d8 %p, uint 3 + ret double %R +} + +void %test_cast_1(<4 x float>* %b, <4 x int>* %a) { + %tmp = load <4 x float>* %b + %tmp2 = add <4 x float> %tmp, <float 1.0, float 2.0, float 3.0, float 4.0> + %tmp3 = cast <4 x float> %tmp2 to <4 x int> + %tmp4 = add <4 x int> %tmp3, <int 1, int 2, int 3, int 4> + store <4 x int> %tmp4, <4 x int>* %a + ret void +} + +void %test_cast_2(<8 x float>* %a, <8 x int>* %b) { + %T = load <8 x float>* %a + %T2 = cast <8 x float> %T to <8 x int> + store <8 x int> %T2, <8 x int>* %b + ret void +} + + +;;; TEST IMPORTANT IDIOMS + +void %splat(%f4* %P, %f4* %Q, float %X) { + %tmp = insertelement %f4 undef, float %X, uint 0 + %tmp2 = insertelement %f4 %tmp, float %X, uint 1 + %tmp4 = insertelement %f4 %tmp2, float %X, uint 2 + %tmp6 = insertelement %f4 %tmp4, float %X, uint 3 + %q = load %f4* %Q + %R = add %f4 %q, %tmp6 + store %f4 %R, %f4* %P + ret void +} + +void %splat_i4(%i4* %P, %i4* %Q, int %X) { + %tmp = insertelement %i4 undef, int %X, uint 0 + %tmp2 = insertelement %i4 %tmp, int %X, uint 1 + %tmp4 = insertelement %i4 %tmp2, int %X, uint 2 + %tmp6 = insertelement %i4 %tmp4, int %X, uint 3 + %q = load %i4* %Q + %R = add %i4 %q, %tmp6 + store %i4 %R, %i4* %P + ret void +} + diff --git a/test/CodeGen/X86/weak.ll b/test/CodeGen/X86/weak.ll new file mode 100644 index 0000000..1397b19 --- /dev/null +++ b/test/CodeGen/X86/weak.ll @@ -0,0 +1,3 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +%a = extern_weak global int +%b = global int* %a diff --git a/test/CodeGen/X86/x86-64-arg.ll b/test/CodeGen/X86/x86-64-arg.ll new file mode 100644 index 0000000..f4fe2f4 --- /dev/null +++ b/test/CodeGen/X86/x86-64-arg.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc | grep {movl %edi, %eax} +; The input value is already sign extended, don't re-extend it. +; This testcase corresponds to: +; int test(short X) { return (int)X; } + +target datalayout = "e-p:64:64" +target triple = "x86_64-apple-darwin8" + + +define i32 @test(i16 sext %X) { +entry: + %tmp12 = sext i16 %X to i32 ; <i32> [#uses=1] + ret i32 %tmp12 +} + diff --git a/test/CodeGen/X86/x86-64-asm.ll b/test/CodeGen/X86/x86-64-asm.ll new file mode 100644 index 0000000..0814684 --- /dev/null +++ b/test/CodeGen/X86/x86-64-asm.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; PR1029 + +target datalayout = "e-p:64:64" +target endian = little +target pointersize = 64 +target triple = "x86_64-unknown-linux-gnu" + +implementation ; Functions: + +void %frame_dummy() { +entry: + %tmp1 = tail call void (sbyte*)* (void (sbyte*)*)* asm "", "=r,0,~{dirflag},~{fpsr},~{flags}"( void (sbyte*)* null ) ; <void (sbyte*)*> [#uses=0] + ret void +} diff --git a/test/CodeGen/X86/x86-64-mem.ll b/test/CodeGen/X86/x86-64-mem.ll new file mode 100644 index 0000000..8e11976 --- /dev/null +++ b/test/CodeGen/X86/x86-64-mem.ll @@ -0,0 +1,38 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=x86_64-apple-darwin -o %t1 -f +; RUN: grep GOTPCREL %t1 | wc -l | grep 4 +; RUN: grep rip %t1 | wc -l | grep 6 +; RUN: grep movq %t1 | wc -l | grep 6 +; RUN: grep leaq %t1 | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -mtriple=x86_64-apple-darwin -relocation-model=static -o %t2 -f +; RUN: grep rip %t2 | wc -l | grep 4 +; RUN: grep movl %t2 | wc -l | grep 2 +; RUN: grep movq %t2 | wc -l | grep 2 + +%ptr = external global int* +%src = external global [0 x int] +%dst = external global [0 x int] +%lptr = internal global int* null +%ldst = internal global [500 x int] zeroinitializer, align 32 +%lsrc = internal global [500 x int] zeroinitializer, align 32 +%bsrc = internal global [500000 x int] zeroinitializer, align 32 +%bdst = internal global [500000 x int] zeroinitializer, align 32 + +void %test1() { + %tmp = load int* getelementptr ([0 x int]* %src, int 0, int 0) + store int %tmp, int* getelementptr ([0 x int]* %dst, int 0, int 0) + ret void +} + +void %test2() { + store int* getelementptr ([0 x int]* %dst, int 0, int 0), int** %ptr + ret void +} + +void %test3() { + store int* getelementptr ([500 x int]* %ldst, int 0, int 0), int** %lptr + br label %return + +return: + ret void +} diff --git a/test/CodeGen/X86/x86-64-shortint.ll b/test/CodeGen/X86/x86-64-shortint.ll new file mode 100644 index 0000000..d136450 --- /dev/null +++ b/test/CodeGen/X86/x86-64-shortint.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc | grep movswl + +target datalayout = "e-p:64:64" +target triple = "x86_64-apple-darwin8" + + +define void @bar(i16 zext %A) { + tail call void @foo( i16 %A sext ) + ret void +} +declare void @foo(i16 sext ) + diff --git a/test/CodeGen/X86/xmm-r64.ll b/test/CodeGen/X86/xmm-r64.ll new file mode 100644 index 0000000..596e5c9 --- /dev/null +++ b/test/CodeGen/X86/xmm-r64.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 + +<4 x int> %test() { + %tmp1039 = call <4 x int> %llvm.x86.sse2.psll.d( <4 x int> zeroinitializer, <4 x int> zeroinitializer ) ; <<4 x int>> [#uses=1] + %tmp1040 = cast <4 x int> %tmp1039 to <2 x long> ; <<2 x long>> [#uses=1] + %tmp1048 = add <2 x long> %tmp1040, zeroinitializer ; <<2 x long>> [#uses=1] + %tmp1048 = cast <2 x long> %tmp1048 to <4 x int> ; <<4 x int>> [#uses=1] + ret <4 x int> %tmp1048 +} + +declare <4 x int> %llvm.x86.sse2.psll.d(<4 x int>, <4 x int>) |