diff options
Diffstat (limited to 'test/MC/ARM')
54 files changed, 3956 insertions, 0 deletions
diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s new file mode 100644 index 0000000..3663634 --- /dev/null +++ b/test/MC/ARM/arm_instructions.s @@ -0,0 +1,17 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s | FileCheck %s + +@ CHECK: nop +@ CHECK: encoding: [0x00,0xf0,0x20,0xe3] + nop + +@ CHECK: nopeq +@ CHECK: encoding: [0x00,0xf0,0x20,0x03] + nopeq + +@ CHECK: bx lr +@ CHECK: encoding: [0x1e,0xff,0x2f,0xe1] + bx lr + +@ CHECK: vqdmull.s32 q8, d17, d16 +@ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2] + vqdmull.s32 q8, d17, d16 diff --git a/test/MC/ARM/arm_word_directive.s b/test/MC/ARM/arm_word_directive.s new file mode 100644 index 0000000..e782479 --- /dev/null +++ b/test/MC/ARM/arm_word_directive.s @@ -0,0 +1,6 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown %s | FileCheck %s + +@ CHECK: TEST0: +@ CHECK: .long 3 +TEST0: + .word 3 diff --git a/test/MC/ARM/dg.exp b/test/MC/ARM/dg.exp new file mode 100644 index 0000000..055fa25 --- /dev/null +++ b/test/MC/ARM/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target ARM] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] +} diff --git a/test/MC/ARM/neon-abs-encoding.s b/test/MC/ARM/neon-abs-encoding.s new file mode 100644 index 0000000..a914979 --- /dev/null +++ b/test/MC/ARM/neon-abs-encoding.s @@ -0,0 +1,31 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vabs.s8 d16, d16 @ encoding: [0x20,0x03,0xf1,0xf3] + vabs.s8 d16, d16 +@ CHECK: vabs.s16 d16, d16 @ encoding: [0x20,0x03,0xf5,0xf3] + vabs.s16 d16, d16 +@ CHECK: vabs.s32 d16, d16 @ encoding: [0x20,0x03,0xf9,0xf3] + vabs.s32 d16, d16 +@ CHECK: vabs.f32 d16, d16 @ encoding: [0x20,0x07,0xf9,0xf3] + vabs.f32 d16, d16 +@ CHECK: vabs.s8 q8, q8 @ encoding: [0x60,0x03,0xf1,0xf3] + vabs.s8 q8, q8 +@ CHECK: vabs.s16 q8, q8 @ encoding: [0x60,0x03,0xf5,0xf3] + vabs.s16 q8, q8 +@ CHECK: vabs.s32 q8, q8 @ encoding: [0x60,0x03,0xf9,0xf3] + vabs.s32 q8, q8 +@ CHECK: vabs.f32 q8, q8 @ encoding: [0x60,0x07,0xf9,0xf3] + vabs.f32 q8, q8 + +@ CHECK: vqabs.s8 d16, d16 @ encoding: [0x20,0x07,0xf0,0xf3] + vqabs.s8 d16, d16 +@ CHECK: vqabs.s16 d16, d16 @ encoding: [0x20,0x07,0xf4,0xf3] + vqabs.s16 d16, d16 +@ CHECK: vqabs.s32 d16, d16 @ encoding: [0x20,0x07,0xf8,0xf3] + vqabs.s32 d16, d16 +@ CHECK: vqabs.s8 q8, q8 @ encoding: [0x60,0x07,0xf0,0xf3] + vqabs.s8 q8, q8 +@ CHECK: vqabs.s16 q8, q8 @ encoding: [0x60,0x07,0xf4,0xf3] + vqabs.s16 q8, q8 +@ CHECK: vqabs.s32 q8, q8 @ encoding: [0x60,0x07,0xf8,0xf3] + vqabs.s32 q8, q8 diff --git a/test/MC/ARM/neon-absdiff-encoding.s b/test/MC/ARM/neon-absdiff-encoding.s new file mode 100644 index 0000000..f5baff6 --- /dev/null +++ b/test/MC/ARM/neon-absdiff-encoding.s @@ -0,0 +1,84 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * +@ NOTE: This currently fails because the ASM parser doesn't parse vabal. + +@ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xf2] + vabd.s8 d16, d16, d17 +@ CHECK: vabd.s16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xf2] + vabd.s16 d16, d16, d17 +@ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xf2] + vabd.s32 d16, d16, d17 +@ CHECK: vabd.u8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xf3] + vabd.u8 d16, d16, d17 +@ CHECK: vabd.u16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xf3] + vabd.u16 d16, d16, d17 + @ CHECK: vabd.u32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xf3] + vabd.u32 d16, d16, d17 +@ CHECK: vabd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xf3] + vabd.f32 d16, d16, d17 +@ CHECK: vabd.s8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xf2] + vabd.s8 q8, q8, q9 +@ CHECK: vabd.s16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xf2] + vabd.s16 q8, q8, q9 +@ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xf2] + vabd.s32 q8, q8, q9 +@ CHECK: vabd.u8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xf3] + vabd.u8 q8, q8, q9 +@ CHECK: vabd.u16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xf3] + vabd.u16 q8, q8, q9 +@ CHECK: vabd.u32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xf3] + vabd.u32 q8, q8, q9 +@ CHECK: vabd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x60,0xf3] + vabd.f32 q8, q8, q9 + +@ CHECK: vabdl.s8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xf2] + vabdl.s8 q8, d16, d17 +@ CHECK: vabdl.s16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xf2] + vabdl.s16 q8, d16, d17 +@ CHECK: vabdl.s32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xf2] + vabdl.s32 q8, d16, d17 +@ CHECK: vabdl.u8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xf3] + vabdl.u8 q8, d16, d17 +@ CHECK: vabdl.u16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xf3] + vabdl.u16 q8, d16, d17 +@ CHECK: vabdl.u32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xf3] + vabdl.u32 q8, d16, d17 + +@ CHECK: vaba.s8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xf2] + vaba.s8 d16, d18, d17 +@ CHECK: vaba.s16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xf2] + vaba.s16 d16, d18, d17 +@ CHECK: vaba.s32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xf2] + vaba.s32 d16, d18, d17 +@ CHECK: vaba.u8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xf3] + vaba.u8 d16, d18, d17 +@ CHECK: vaba.u16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xf3] + vaba.u16 d16, d18, d17 +@ CHECK: vaba.u32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xf3] + vaba.u32 d16, d18, d17 +@ CHECK: vaba.s8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xf2] + vaba.s8 q9, q8, q10 +@ CHECK: vaba.s16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xf2] + vaba.s16 q9, q8, q10 +@ CHECK: vaba.s32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xf2] + vaba.s32 q9, q8, q10 +@ CHECK: vaba.u8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xf3] + vaba.u8 q9, q8, q10 +@ CHECK: vaba.u16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xf3] + vaba.u16 q9, q8, q10 +@ CHECK: vaba.u32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xf3] + vaba.u32 q9, q8, q10 + +@ CHECK: vabal.s8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xf2] + vabal.s8 q8, d19, d18 +@ CHECK: vabal.s16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xf2] + vabal.s16 q8, d19, d18 +@ CHECK: vabal.s32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xf2] + vabal.s32 q8, d19, d18 +@ CHECK: vabal.u8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xf3] + vabal.u8 q8, d19, d18 +@ CHECK: vabal.u16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xf3] + vabal.u16 q8, d19, d18 +@ CHECK: vabal.u32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xf3] + vabal.u32 q8, d19, d18 + diff --git a/test/MC/ARM/neon-add-encoding.s b/test/MC/ARM/neon-add-encoding.s new file mode 100644 index 0000000..e425397 --- /dev/null +++ b/test/MC/ARM/neon-add-encoding.s @@ -0,0 +1,137 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s + + +@ CHECK: vadd.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf2] + vadd.i8 d16, d17, d16 +@ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xf2] + vadd.i16 d16, d17, d16 +@ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xf2] + vadd.i64 d16, d17, d16 +@ CHECK: vadd.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xf2] + vadd.i32 d16, d17, d16 +@ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf2] + vadd.f32 d16, d16, d17 +@ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x40,0xf2] + vadd.f32 q8, q8, q9 + +@ CHECK: vaddl.s8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xf2] + vaddl.s8 q8, d17, d16 +@ CHECK: vaddl.s16 q8, d17, d16 @ encoding: [0xa0,0x00,0xd1,0xf2] + vaddl.s16 q8, d17, d16 +@ CHECK: vaddl.s32 q8, d17, d16 @ encoding: [0xa0,0x00,0xe1,0xf2] + vaddl.s32 q8, d17, d16 +@ CHECK: vaddl.u8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xf3] + vaddl.u8 q8, d17, d16 +@ CHECK: vaddl.u16 q8, d17, d16 @ encoding: [0xa0,0x00,0xd1,0xf3] + vaddl.u16 q8, d17, d16 +@ CHECK: vaddl.u32 q8, d17, d16 @ encoding: [0xa0,0x00,0xe1,0xf3] + vaddl.u32 q8, d17, d16 + +@ CHECK: vaddw.s8 q8, q8, d18 @ encoding: [0xa2,0x01,0xc0,0xf2] + vaddw.s8 q8, q8, d18 +@ CHECK: vaddw.s16 q8, q8, d18 @ encoding: [0xa2,0x01,0xd0,0xf2] + vaddw.s16 q8, q8, d18 +@ CHECK: vaddw.s32 q8, q8, d18 @ encoding: [0xa2,0x01,0xe0,0xf2] + vaddw.s32 q8, q8, d18 +@ CHECK: vaddw.u8 q8, q8, d18 @ encoding: [0xa2,0x01,0xc0,0xf3] + vaddw.u8 q8, q8, d18 +@ CHECK: vaddw.u16 q8, q8, d18 @ encoding: [0xa2,0x01,0xd0,0xf3] + vaddw.u16 q8, q8, d18 +@ CHECK: vaddw.u32 q8, q8, d18 @ encoding: [0xa2,0x01,0xe0,0xf3] + vaddw.u32 q8, q8, d18 + +@ CHECK: vhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x00,0x40,0xf2] + vhadd.s8 d16, d16, d17 +@ CHECK: vhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x00,0x50,0xf2] + vhadd.s16 d16, d16, d17 +@ CHECK: vhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x00,0x60,0xf2] + vhadd.s32 d16, d16, d17 +@ CHECK: vhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x00,0x40,0xf3] + vhadd.u8 d16, d16, d17 +@ CHECK: vhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x00,0x50,0xf3] + vhadd.u16 d16, d16, d17 +@ CHECK: vhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x00,0x60,0xf3] + vhadd.u32 d16, d16, d17 +@ CHECK: vhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x00,0x40,0xf2] + vhadd.s8 q8, q8, q9 +@ CHECK: vhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x00,0x50,0xf2] + vhadd.s16 q8, q8, q9 +@ CHECK: vhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x00,0x60,0xf2] + vhadd.s32 q8, q8, q9 + @ CHECK: vhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x00,0x40,0xf3] + vhadd.u8 q8, q8, q9 +@ CHECK: vhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x00,0x50,0xf3] + vhadd.u16 q8, q8, q9 +@ CHECK: vhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x00,0x60,0xf3] + vhadd.u32 q8, q8, q9 + +@ CHECK: vrhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf2] + vrhadd.s8 d16, d16, d17 +@ CHECK: vrhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf2] + vrhadd.s16 d16, d16, d17 +@ CHECK: vrhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf2] + vrhadd.s32 d16, d16, d17 +@ CHECK: vrhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf3] + vrhadd.u8 d16, d16, d17 +@ CHECK: vrhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf3] + vrhadd.u16 d16, d16, d17 +@ CHECK: vrhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf3] + vrhadd.u32 d16, d16, d17 +@ CHECK: vrhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf2] + vrhadd.s8 q8, q8, q9 +@ CHECK: vrhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf2] + vrhadd.s16 q8, q8, q9 +@ CHECK: vrhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf2] + vrhadd.s32 q8, q8, q9 +@ CHECK: vrhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf3] + vrhadd.u8 q8, q8, q9 +@ CHECK: vrhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf3] + vrhadd.u16 q8, q8, q9 +@ CHECK: vrhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf3] + vrhadd.u32 q8, q8, q9 + +@ CHECK: vqadd.s8 d16, d16, d17 @ encoding: [0xb1,0x00,0x40,0xf2] + vqadd.s8 d16, d16, d17 +@ CHECK: vqadd.s16 d16, d16, d17 @ encoding: [0xb1,0x00,0x50,0xf2] + vqadd.s16 d16, d16, d17 +@ CHECK: vqadd.s32 d16, d16, d17 @ encoding: [0xb1,0x00,0x60,0xf2] + vqadd.s32 d16, d16, d17 +@ CHECK: vqadd.s64 d16, d16, d17 @ encoding: [0xb1,0x00,0x70,0xf2] + vqadd.s64 d16, d16, d17 +@ CHECK: vqadd.u8 d16, d16, d17 @ encoding: [0xb1,0x00,0x40,0xf3] + vqadd.u8 d16, d16, d17 +@ CHECK: vqadd.u16 d16, d16, d17 @ encoding: [0xb1,0x00,0x50,0xf3] + vqadd.u16 d16, d16, d17 +@ CHECK: vqadd.u32 d16, d16, d17 @ encoding: [0xb1,0x00,0x60,0xf3] + vqadd.u32 d16, d16, d17 +@ CHECK: vqadd.u64 d16, d16, d17 @ encoding: [0xb1,0x00,0x70,0xf3] + vqadd.u64 d16, d16, d17 +@ CHECK: vqadd.s8 q8, q8, q9 @ encoding: [0xf2,0x00,0x40,0xf2] + vqadd.s8 q8, q8, q9 +@ CHECK: vqadd.s16 q8, q8, q9 @ encoding: [0xf2,0x00,0x50,0xf2] + vqadd.s16 q8, q8, q9 +@ CHECK: vqadd.s32 q8, q8, q9 @ encoding: [0xf2,0x00,0x60,0xf2] + vqadd.s32 q8, q8, q9 +@ CHECK: vqadd.s64 q8, q8, q9 @ encoding: [0xf2,0x00,0x70,0xf2] + vqadd.s64 q8, q8, q9 +@ CHECK: vqadd.u8 q8, q8, q9 @ encoding: [0xf2,0x00,0x40,0xf3] + vqadd.u8 q8, q8, q9 +@ CHECK: vqadd.u16 q8, q8, q9 @ encoding: [0xf2,0x00,0x50,0xf3] + vqadd.u16 q8, q8, q9 +@ CHECK: vqadd.u32 q8, q8, q9 @ encoding: [0xf2,0x00,0x60,0xf3] + vqadd.u32 q8, q8, q9 +@ CHECK: vqadd.u64 q8, q8, q9 @ encoding: [0xf2,0x00,0x70,0xf3] + vqadd.u64 q8, q8, q9 + +@ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xf2] + vaddhn.i16 d16, q8, q9 +@ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xf2] + vaddhn.i32 d16, q8, q9 +@ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf2] + vaddhn.i64 d16, q8, q9 +@ CHECK: vraddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xf3] + vraddhn.i16 d16, q8, q9 +@ CHECK: vraddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xf3] + vraddhn.i32 d16, q8, q9 +@ CHECK: vraddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf3] + vraddhn.i64 d16, q8, q9 diff --git a/test/MC/ARM/neon-bitcount-encoding.s b/test/MC/ARM/neon-bitcount-encoding.s new file mode 100644 index 0000000..218e91b --- /dev/null +++ b/test/MC/ARM/neon-bitcount-encoding.s @@ -0,0 +1,32 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xf3] + vcnt.8 d16, d16 +@ CHECK: vcnt.8 q8, q8 @ encoding: [0x60,0x05,0xf0,0xf3] + vcnt.8 q8, q8 +@ CHECK: vclz.i8 d16, d16 @ encoding: [0xa0,0x04,0xf0,0xf3] + vclz.i8 d16, d16 +@ CHECK: vclz.i16 d16, d16 @ encoding: [0xa0,0x04,0xf4,0xf3] + vclz.i16 d16, d16 +@ CHECK: vclz.i32 d16, d16 @ encoding: [0xa0,0x04,0xf8,0xf3] + vclz.i32 d16, d16 +@ CHECK: vclz.i8 q8, q8 @ encoding: [0xe0,0x04,0xf0,0xf3] + vclz.i8 q8, q8 +@ CHECK: vclz.i16 q8, q8 @ encoding: [0xe0,0x04,0xf4,0xf3] + vclz.i16 q8, q8 +@ CHECK: vclz.i32 q8, q8 @ encoding: [0xe0,0x04,0xf8,0xf3] + vclz.i32 q8, q8 +@ CHECK: vcls.s8 d16, d16 @ encoding: [0x20,0x04,0xf0,0xf3] + vcls.s8 d16, d16 +@ CHECK: vcls.s16 d16, d16 @ encoding: [0x20,0x04,0xf4,0xf3] + vcls.s16 d16, d16 +@ CHECK: vcls.s32 d16, d16 @ encoding: [0x20,0x04,0xf8,0xf3] + vcls.s32 d16, d16 +@ CHECK: vcls.s8 q8, q8 @ encoding: [0x60,0x04,0xf0,0xf3] + vcls.s8 q8, q8 +@ CHECK: vcls.s16 q8, q8 @ encoding: [0x60,0x04,0xf4,0xf3] + vcls.s16 q8, q8 +@ CHECK: vcls.s32 q8, q8 @ encoding: [0x60,0x04,0xf8,0xf3] + vcls.s32 q8, q8 + diff --git a/test/MC/ARM/neon-bitwise-encoding.s b/test/MC/ARM/neon-bitwise-encoding.s new file mode 100644 index 0000000..7a4c8fd --- /dev/null +++ b/test/MC/ARM/neon-bitwise-encoding.s @@ -0,0 +1,47 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vand d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xf2] + vand d16, d17, d16 +@ CHECK: vand q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xf2] + vand q8, q8, q9 + +@ CHECK: veor d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xf3] + veor d16, d17, d16 +@ CHECK: veor q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xf3] + veor q8, q8, q9 + +@ CHECK: vorr d16, d17, d16 @ encoding: [0xb0,0x01,0x61,0xf2] + vorr d16, d17, d16 +@ CHECK: vorr q8, q8, q9 @ encoding: [0xf2,0x01,0x60,0xf2] + vorr q8, q8, q9 +@ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2] + vorr.i32 d16, #0x1000000 +@ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2] + vorr.i32 q8, #0x1000000 +@ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2] + vorr.i32 q8, #0x0 + +@ CHECK: vbic d16, d17, d16 @ encoding: [0xb0,0x01,0x51,0xf2] + vbic d16, d17, d16 +@ CHECK: vbic q8, q8, q9 @ encoding: [0xf2,0x01,0x50,0xf2] + vbic q8, q8, q9 +@ CHECK: vbic.i32 d16, #0xFF000000 @ encoding: [0x3f,0x07,0xc7,0xf3] + vbic.i32 d16, #0xFF000000 +@ CHECK: vbic.i32 q8, #0xFF000000 @ encoding: [0x7f,0x07,0xc7,0xf3] + vbic.i32 q8, #0xFF000000 + +@ CHECK: vorn d16, d17, d16 @ encoding: [0xb0,0x01,0x71,0xf2] + vorn d16, d17, d16 +@ CHECK: vorn q8, q8, q9 @ encoding: [0xf2,0x01,0x70,0xf2] + vorn q8, q8, q9 + +@ CHECK: vmvn d16, d16 @ encoding: [0xa0,0x05,0xf0,0xf3] + vmvn d16, d16 +@ CHECK: vmvn q8, q8 @ encoding: [0xe0,0x05,0xf0,0xf3] + vmvn q8, q8 + +@ CHECK: vbsl d18, d17, d16 @ encoding: [0xb0,0x21,0x51,0xf3] + vbsl d18, d17, d16 +@ CHECK: vbsl q8, q10, q9 @ encoding: [0xf2,0x01,0x54,0xf3] + vbsl q8, q10, q9 diff --git a/test/MC/ARM/neon-cmp-encoding.s b/test/MC/ARM/neon-cmp-encoding.s new file mode 100644 index 0000000..da59ee7 --- /dev/null +++ b/test/MC/ARM/neon-cmp-encoding.s @@ -0,0 +1,115 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ FIXME: We cannot currently test the following instructions, which are +@ currently marked as for-disassembly only in the .td files: +@ - VCEQz +@ - VCGEz, VCLEz +@ - VCGTz, VCLTz + +@ CHECK: vceq.i8 d16, d16, d17 @ encoding: [0xb1,0x08,0x40,0xf3] + vceq.i8 d16, d16, d17 +@ CHECK: vceq.i16 d16, d16, d17 @ encoding: [0xb1,0x08,0x50,0xf3] + vceq.i16 d16, d16, d17 +@ CHECK: vceq.i32 d16, d16, d17 @ encoding: [0xb1,0x08,0x60,0xf3] + vceq.i32 d16, d16, d17 +@ CHECK: vceq.f32 d16, d16, d17 @ encoding: [0xa1,0x0e,0x40,0xf2] + vceq.f32 d16, d16, d17 +@ CHECK: vceq.i8 q8, q8, q9 @ encoding: [0xf2,0x08,0x40,0xf3] + vceq.i8 q8, q8, q9 +@ CHECK: vceq.i16 q8, q8, q9 @ encoding: [0xf2,0x08,0x50,0xf3] + vceq.i16 q8, q8, q9 +@ CHECK: vceq.i32 q8, q8, q9 @ encoding: [0xf2,0x08,0x60,0xf3] + vceq.i32 q8, q8, q9 +@ CHECK: vceq.f32 q8, q8, q9 @ encoding: [0xe2,0x0e,0x40,0xf2] + vceq.f32 q8, q8, q9 + +@ CHECK: vcge.s8 d16, d16, d17 @ encoding: [0xb1,0x03,0x40,0xf2] + vcge.s8 d16, d16, d17 +@ CHECK: vcge.s16 d16, d16, d17 @ encoding: [0xb1,0x03,0x50,0xf2] + vcge.s16 d16, d16, d17 +@ CHECK: vcge.s32 d16, d16, d17 @ encoding: [0xb1,0x03,0x60,0xf2] + vcge.s32 d16, d16, d17 +@ CHECK: vcge.u8 d16, d16, d17 @ encoding: [0xb1,0x03,0x40,0xf3] + vcge.u8 d16, d16, d17 +@ CHECK: vcge.u16 d16, d16, d17 @ encoding: [0xb1,0x03,0x50,0xf3] + vcge.u16 d16, d16, d17 +@ CHECK: vcge.u32 d16, d16, d17 @ encoding: [0xb1,0x03,0x60,0xf3] + vcge.u32 d16, d16, d17 +@ CHECK: vcge.f32 d16, d16, d17 @ encoding: [0xa1,0x0e,0x40,0xf3] + vcge.f32 d16, d16, d17 +@ CHECK: vcge.s8 q8, q8, q9 @ encoding: [0xf2,0x03,0x40,0xf2] + vcge.s8 q8, q8, q9 +@ CHECK: vcge.s16 q8, q8, q9 @ encoding: [0xf2,0x03,0x50,0xf2] + vcge.s16 q8, q8, q9 +@ CHECK: vcge.s32 q8, q8, q9 @ encoding: [0xf2,0x03,0x60,0xf2] + vcge.s32 q8, q8, q9 +@ CHECK: vcge.u8 q8, q8, q9 @ encoding: [0xf2,0x03,0x40,0xf3] + vcge.u8 q8, q8, q9 +@ CHECK: vcge.u16 q8, q8, q9 @ encoding: [0xf2,0x03,0x50,0xf3] + vcge.u16 q8, q8, q9 +@ CHECK: vcge.u32 q8, q8, q9 @ encoding: [0xf2,0x03,0x60,0xf3] + vcge.u32 q8, q8, q9 +@ CHECK: vcge.f32 q8, q8, q9 @ encoding: [0xe2,0x0e,0x40,0xf3] + vcge.f32 q8, q8, q9 +@ CHECK: vacge.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x40,0xf3] + vacge.f32 d16, d16, d17 +@ CHECK: vacge.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x40,0xf3] + vacge.f32 q8, q8, q9 + +@ CHECK: vcgt.s8 d16, d16, d17 @ encoding: [0xa1,0x03,0x40,0xf2] + vcgt.s8 d16, d16, d17 +@ CHECK: vcgt.s16 d16, d16, d17 @ encoding: [0xa1,0x03,0x50,0xf2] + vcgt.s16 d16, d16, d17 +@ CHECK: vcgt.s32 d16, d16, d17 @ encoding: [0xa1,0x03,0x60,0xf2] + vcgt.s32 d16, d16, d17 +@ CHECK: vcgt.u8 d16, d16, d17 @ encoding: [0xa1,0x03,0x40,0xf3] + vcgt.u8 d16, d16, d17 +@ CHECK: vcgt.u16 d16, d16, d17 @ encoding: [0xa1,0x03,0x50,0xf3] + vcgt.u16 d16, d16, d17 +@ CHECK: vcgt.u32 d16, d16, d17 @ encoding: [0xa1,0x03,0x60,0xf3] + vcgt.u32 d16, d16, d17 +@ CHECK: vcgt.f32 d16, d16, d17 @ encoding: [0xa1,0x0e,0x60,0xf3] + vcgt.f32 d16, d16, d17 +@ CHECK: vcgt.s8 q8, q8, q9 @ encoding: [0xe2,0x03,0x40,0xf2] + vcgt.s8 q8, q8, q9 +@ CHECK: vcgt.s16 q8, q8, q9 @ encoding: [0xe2,0x03,0x50,0xf2] + vcgt.s16 q8, q8, q9 +@ CHECK: vcgt.s32 q8, q8, q9 @ encoding: [0xe2,0x03,0x60,0xf2] + vcgt.s32 q8, q8, q9 +@ CHECK: vcgt.u8 q8, q8, q9 @ encoding: [0xe2,0x03,0x40,0xf3] + vcgt.u8 q8, q8, q9 +@ CHECK: vcgt.u16 q8, q8, q9 @ encoding: [0xe2,0x03,0x50,0xf3] + vcgt.u16 q8, q8, q9 +@ CHECK: vcgt.u32 q8, q8, q9 @ encoding: [0xe2,0x03,0x60,0xf3] + vcgt.u32 q8, q8, q9 +@ CHECK: vcgt.f32 q8, q8, q9 @ encoding: [0xe2,0x0e,0x60,0xf3] + vcgt.f32 q8, q8, q9 +@ CHECK: vacgt.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x60,0xf3] + vacgt.f32 d16, d16, d17 +@ CHECK: vacgt.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x60,0xf3] + vacgt.f32 q8, q8, q9 + +@ CHECK: vtst.8 d16, d16, d17 @ encoding: [0xb1,0x08,0x40,0xf2] + vtst.8 d16, d16, d17 +@ CHECK: vtst.16 d16, d16, d17 @ encoding: [0xb1,0x08,0x50,0xf2] + vtst.16 d16, d16, d17 +@ CHECK: vtst.32 d16, d16, d17 @ encoding: [0xb1,0x08,0x60,0xf2] + vtst.32 d16, d16, d17 +@ CHECK: vtst.8 q8, q8, q9 @ encoding: [0xf2,0x08,0x40,0xf2] + vtst.8 q8, q8, q9 +@ CHECK: vtst.16 q8, q8, q9 @ encoding: [0xf2,0x08,0x50,0xf2] + vtst.16 q8, q8, q9 +@ CHECK: vtst.32 q8, q8, q9 @ encoding: [0xf2,0x08,0x60,0xf2] + vtst.32 q8, q8, q9 + +@ CHECK: vceq.i8 d16, d16, #0 @ encoding: [0x20,0x01,0xf1,0xf3] + vceq.i8 d16, d16, #0 +@ CHECK: vcge.s8 d16, d16, #0 @ encoding: [0xa0,0x00,0xf1,0xf3] + vcge.s8 d16, d16, #0 +@ CHECK: vcle.s8 d16, d16, #0 @ encoding: [0xa0,0x01,0xf1,0xf3] + vcle.s8 d16, d16, #0 +@ CHECK: vcgt.s8 d16, d16, #0 @ encoding: [0x20,0x00,0xf1,0xf3] + vcgt.s8 d16, d16, #0 +@ CHECK: vclt.s8 d16, d16, #0 @ encoding: [0x20,0x02,0xf1,0xf3] + vclt.s8 d16, d16, #0 diff --git a/test/MC/ARM/neon-convert-encoding.s b/test/MC/ARM/neon-convert-encoding.s new file mode 100644 index 0000000..e5c8a38 --- /dev/null +++ b/test/MC/ARM/neon-convert-encoding.s @@ -0,0 +1,34 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3] + vcvt.s32.f32 d16, d16 +@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xf3] + vcvt.u32.f32 d16, d16 +@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xf3] + vcvt.f32.s32 d16, d16 +@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xf3] + vcvt.f32.u32 d16, d16 +@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xf3] + vcvt.s32.f32 q8, q8 +@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xe0,0x07,0xfb,0xf3] + vcvt.u32.f32 q8, q8 +@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xf3] + vcvt.f32.s32 q8, q8 +@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xe0,0x06,0xfb,0xf3] + vcvt.f32.u32 q8, q8 +@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xf2] + vcvt.s32.f32 d16, d16, #1 +@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xf3] + vcvt.u32.f32 d16, d16, #1 +@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xf2] + vcvt.f32.s32 d16, d16, #1 +@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xf3] + vcvt.f32.u32 d16, d16, #1 +@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xf2] + vcvt.s32.f32 q8, q8, #1 +@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xf3] + vcvt.u32.f32 q8, q8, #1 +@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xf2] + vcvt.f32.s32 q8, q8, #1 +@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xf3] + vcvt.f32.u32 q8, q8, #1 diff --git a/test/MC/ARM/neon-dup-encoding.s b/test/MC/ARM/neon-dup-encoding.s new file mode 100644 index 0000000..3af7fac --- /dev/null +++ b/test/MC/ARM/neon-dup-encoding.s @@ -0,0 +1,27 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee] + vdup.8 d16, r0 +@ CHECK: vdup.16 d16, r0 @ encoding: [0xb0,0x0b,0x80,0xee] + vdup.16 d16, r0 +@ CHECK: vdup.32 d16, r0 @ encoding: [0x90,0x0b,0x80,0xee] + vdup.32 d16, r0 +@ CHECK: vdup.8 q8, r0 @ encoding: [0x90,0x0b,0xe0,0xee] + vdup.8 q8, r0 +@ CHECK: vdup.16 q8, r0 @ encoding: [0xb0,0x0b,0xa0,0xee] + vdup.16 q8, r0 +@ CHECK: vdup.32 q8, r0 @ encoding: [0x90,0x0b,0xa0,0xee] + vdup.32 q8, r0 +@ CHECK: vdup.8 d16, d16[1] @ encoding: [0x20,0x0c,0xf3,0xf3] + vdup.8 d16, d16[1] +@ CHECK: vdup.16 d16, d16[1] @ encoding: [0x20,0x0c,0xf6,0xf3] + vdup.16 d16, d16[1] +@ CHECK: vdup.32 d16, d16[1] @ encoding: [0x20,0x0c,0xfc,0xf3] + vdup.32 d16, d16[1] +@ CHECK: vdup.8 q8, d16[1] @ encoding: [0x60,0x0c,0xf3,0xf3] + vdup.8 q8, d16[1] +@ CHECK: vdup.16 q8, d16[1] @ encoding: [0x60,0x0c,0xf6,0xf3] + vdup.16 q8, d16[1] +@ CHECK: vdup.32 q8, d16[1] @ encoding: [0x60,0x0c,0xfc,0xf3] + vdup.32 q8, d16[1] diff --git a/test/MC/ARM/neon-minmax-encoding.s b/test/MC/ARM/neon-minmax-encoding.s new file mode 100644 index 0000000..2f3d257 --- /dev/null +++ b/test/MC/ARM/neon-minmax-encoding.s @@ -0,0 +1,58 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xf2] + vmin.s8 d16, d16, d17 +@ CHECK: vmin.s16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xf2] + vmin.s16 d16, d16, d17 +@ CHECK: vmin.s32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xf2] + vmin.s32 d16, d16, d17 +@ CHECK: vmin.u8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xf3] + vmin.u8 d16, d16, d17 +@ CHECK: vmin.u16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xf3] + vmin.u16 d16, d16, d17 +@ CHECK: vmin.u32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xf3] + vmin.u32 d16, d16, d17 +@ CHECK: vmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xf2] + vmin.f32 d16, d16, d17 +@ CHECK: vmin.s8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xf2] + vmin.s8 q8, q8, q9 +@ CHECK: vmin.s16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xf2] + vmin.s16 q8, q8, q9 +@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xf2] + vmin.s32 q8, q8, q9 +@ CHECK: vmin.u8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xf3] + vmin.u8 q8, q8, q9 +@ CHECK: vmin.u16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xf3] + vmin.u16 q8, q8, q9 +@ CHECK: vmin.u32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xf3] + vmin.u32 q8, q8, q9 +@ CHECK: vmin.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x60,0xf2] + vmin.f32 q8, q8, q9 +@ CHECK: vmax.s8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xf2] + vmax.s8 d16, d16, d17 +@ CHECK: vmax.s16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xf2] + vmax.s16 d16, d16, d17 +@ CHECK: vmax.s32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xf2] + vmax.s32 d16, d16, d17 +@ CHECK: vmax.u8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xf3] + vmax.u8 d16, d16, d17 +@ CHECK: vmax.u16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xf3] + vmax.u16 d16, d16, d17 +@ CHECK: vmax.u32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xf3] + vmax.u32 d16, d16, d17 +@ CHECK: vmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xf2] + vmax.f32 d16, d16, d17 +@ CHECK: vmax.s8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xf2] + vmax.s8 q8, q8, q9 +@ CHECK: vmax.s16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xf2] + vmax.s16 q8, q8, q9 +@ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xf2] + vmax.s32 q8, q8, q9 +@ CHECK: vmax.u8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xf3] + vmax.u8 q8, q8, q9 +@ CHECK: vmax.u16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xf3] + vmax.u16 q8, q8, q9 +@ CHECK: vmax.u32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xf3] + vmax.u32 q8, q8, q9 +@ CHECK: vmax.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x40,0xf2] + vmax.f32 q8, q8, q9 diff --git a/test/MC/ARM/neon-mov-encoding.s b/test/MC/ARM/neon-mov-encoding.s new file mode 100644 index 0000000..71e568e --- /dev/null +++ b/test/MC/ARM/neon-mov-encoding.s @@ -0,0 +1,117 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xf2] + vmov.i8 d16, #0x8 +@ CHECK: vmov.i16 d16, #0x10 @ encoding: [0x10,0x08,0xc1,0xf2] + vmov.i16 d16, #0x10 +@ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0x10,0x0a,0xc1,0xf2] + vmov.i16 d16, #0x1000 +@ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2] + vmov.i32 d16, #0x20 +@ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2] + vmov.i32 d16, #0x2000 +@ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2] + vmov.i32 d16, #0x200000 +@ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2] + vmov.i32 d16, #0x20000000 +@ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xf2] + vmov.i32 d16, #0x20FF +@ CHECK: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xf2] + vmov.i32 d16, #0x20FFFF +@ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xf3] + vmov.i64 d16, #0xFF0000FF0000FFFF +@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0x58,0x0e,0xc0,0xf2] + vmov.i8 q8, #0x8 +@ CHECK: vmov.i16 q8, #0x10 @ encoding: [0x50,0x08,0xc1,0xf2] + vmov.i16 q8, #0x10 +@ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0x50,0x0a,0xc1,0xf2] + vmov.i16 q8, #0x1000 +@ CHECK: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xf2] + vmov.i32 q8, #0x20 +@ CHECK: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xf2] + vmov.i32 q8, #0x2000 +@ CHECK: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xf2] + vmov.i32 q8, #0x200000 +@ CHECK: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xf2] + vmov.i32 q8, #0x20000000 +@ CHECK: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xf2] + vmov.i32 q8, #0x20FF +@ CHECK: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xf2] + vmov.i32 q8, #0x20FFFF +@ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xf3] + vmov.i64 q8, #0xFF0000FF0000FFFF +@ CHECK: vmvn.i16 d16, #0x10 @ encoding: [0x30,0x08,0xc1,0xf2] + vmvn.i16 d16, #0x10 +@ CHECK: vmvn.i16 d16, #0x1000 @ encoding: [0x30,0x0a,0xc1,0xf2] + vmvn.i16 d16, #0x1000 +@ CHECK: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xf2] + vmvn.i32 d16, #0x20 +@ CHECK: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xf2] + vmvn.i32 d16, #0x2000 +@ CHECK: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xf2] + vmvn.i32 d16, #0x200000 +@ CHECK: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xf2] + vmvn.i32 d16, #0x20000000 +@ CHECK: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xf2] + vmvn.i32 d16, #0x20FF +@ CHECK: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xf2] + vmvn.i32 d16, #0x20FFFF +@ CHECK: vmovl.s8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xf2] + vmovl.s8 q8, d16 +@ CHECK: vmovl.s16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xf2] + vmovl.s16 q8, d16 +@ CHECK: vmovl.s32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xf2] + vmovl.s32 q8, d16 +@ CHECK: vmovl.u8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xf3] + vmovl.u8 q8, d16 +@ CHECK: vmovl.u16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xf3] + vmovl.u16 q8, d16 +@ CHECK: vmovl.u32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xf3] + vmovl.u32 q8, d16 +@ CHECK: vmovn.i16 d16, q8 @ encoding: [0x20,0x02,0xf2,0xf3] + vmovn.i16 d16, q8 +@ CHECK: vmovn.i32 d16, q8 @ encoding: [0x20,0x02,0xf6,0xf3] + vmovn.i32 d16, q8 +@ CHECK: vmovn.i64 d16, q8 @ encoding: [0x20,0x02,0xfa,0xf3] + vmovn.i64 d16, q8 +@ CHECK: vqmovn.s16 d16, q8 @ encoding: [0xa0,0x02,0xf2,0xf3] + vqmovn.s16 d16, q8 +@ CHECK: vqmovn.s32 d16, q8 @ encoding: [0xa0,0x02,0xf6,0xf3] + vqmovn.s32 d16, q8 +@ CHECK: vqmovn.s64 d16, q8 @ encoding: [0xa0,0x02,0xfa,0xf3] + vqmovn.s64 d16, q8 +@ CHECK: vqmovn.u16 d16, q8 @ encoding: [0xe0,0x02,0xf2,0xf3] + vqmovn.u16 d16, q8 +@ CHECK: vqmovn.u32 d16, q8 @ encoding: [0xe0,0x02,0xf6,0xf3] + vqmovn.u32 d16, q8 +@ CHECK: vqmovn.u64 d16, q8 @ encoding: [0xe0,0x02,0xfa,0xf3] + vqmovn.u64 d16, q8 +@ CHECK: vqmovun.s16 d16, q8 @ encoding: [0x60,0x02,0xf2,0xf3] + vqmovun.s16 d16, q8 +@ CHECK: vqmovun.s32 d16, q8 @ encoding: [0x60,0x02,0xf6,0xf3] + vqmovun.s32 d16, q8 +@ CHECK: vqmovun.s64 d16, q8 @ encoding: [0x60,0x02,0xfa,0xf3] + vqmovun.s64 d16, q8 +@ CHECK: vmov.s8 r0, d16[1] @ encoding: [0xb0,0x0b,0x50,0xee] + vmov.s8 r0, d16[1] +@ CHECK: vmov.s16 r0, d16[1] @ encoding: [0xf0,0x0b,0x10,0xee] + vmov.s16 r0, d16[1] +@ CHECK: vmov.u8 r0, d16[1] @ encoding: [0xb0,0x0b,0xd0,0xee] + vmov.u8 r0, d16[1] +@ CHECK: vmov.u16 r0, d16[1] @ encoding: [0xf0,0x0b,0x90,0xee] + vmov.u16 r0, d16[1] +@ CHECK: vmov.32 r0, d16[1] @ encoding: [0x90,0x0b,0x30,0xee] + vmov.32 r0, d16[1] +@ CHECK: vmov.8 d16[1], r1 @ encoding: [0xb0,0x1b,0x40,0xee] + vmov.8 d16[1], r1 +@ CHECK: vmov.16 d16[1], r1 @ encoding: [0xf0,0x1b,0x00,0xee] + vmov.16 d16[1], r1 +@ CHECK: vmov.32 d16[1], r1 @ encoding: [0x90,0x1b,0x20,0xee] + vmov.32 d16[1], r1 +@ CHECK: vmov.8 d18[1], r1 @ encoding: [0xb0,0x1b,0x42,0xee] + vmov.8 d18[1], r1 +@ CHECK: vmov.16 d18[1], r1 @ encoding: [0xf0,0x1b,0x02,0xee] + vmov.16 d18[1], r1 +@ CHECK: vmov.32 d18[1], r1 @ encoding: [0x90,0x1b,0x22,0xee] + vmov.32 d18[1], r1 diff --git a/test/MC/ARM/neon-mul-accum-encoding.s b/test/MC/ARM/neon-mul-accum-encoding.s new file mode 100644 index 0000000..0263d9e --- /dev/null +++ b/test/MC/ARM/neon-mul-accum-encoding.s @@ -0,0 +1,67 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vmla.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xf2] + vmla.i8 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xf2] + vmla.i16 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xf2] + vmla.i32 d16, d18, d17 +@ CHECK: vmla.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x42,0xf2] + vmla.f32 d16, d18, d17 +@ CHECK: vmla.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xf2] + vmla.i8 q9, q8, q10 +@ CHECK: vmla.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xf2] + vmla.i16 q9, q8, q10 +@ CHECK: vmla.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xf2] + vmla.i32 q9, q8, q10 +@ CHECK: vmla.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x40,0xf2] + vmla.f32 q9, q8, q10 +@ CHECK: vmlal.s8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xf2] + vmlal.s8 q8, d19, d18 +@ CHECK: vmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xf2] + vmlal.s16 q8, d19, d18 +@ CHECK: vmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xf2] + vmlal.s32 q8, d19, d18 +@ CHECK: vmlal.u8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xf3] + vmlal.u8 q8, d19, d18 +@ CHECK: vmlal.u16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xf3] + vmlal.u16 q8, d19, d18 +@ CHECK: vmlal.u32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xf3] + vmlal.u32 q8, d19, d18 +@ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xf2] + vqdmlal.s16 q8, d19, d18 +@ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xf2] + vqdmlal.s32 q8, d19, d18 +@ CHECK: vmls.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xf3] + vmls.i8 d16, d18, d17 +@ CHECK: vmls.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xf3] + vmls.i16 d16, d18, d17 +@ CHECK: vmls.i32 d16, d18, d17 @ encoding: [0xa1,0x09,0x62,0xf3] + vmls.i32 d16, d18, d17 +@ CHECK: vmls.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x62,0xf2] + vmls.f32 d16, d18, d17 +@ CHECK: vmls.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xf3] + vmls.i8 q9, q8, q10 +@ CHECK: vmls.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xf3] + vmls.i16 q9, q8, q10 +@ CHECK: vmls.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xf3] + vmls.i32 q9, q8, q10 +@ CHECK: vmls.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x60,0xf2] + vmls.f32 q9, q8, q10 +@ CHECK: vmlsl.s8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xf2] + vmlsl.s8 q8, d19, d18 +@ CHECK: vmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xf2] + vmlsl.s16 q8, d19, d18 +@ CHECK: vmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xf2] + vmlsl.s32 q8, d19, d18 +@ CHECK: vmlsl.u8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xf3] + vmlsl.u8 q8, d19, d18 +@ CHECK: vmlsl.u16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xf3] + vmlsl.u16 q8, d19, d18 +@ CHECK: vmlsl.u32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xf3] + vmlsl.u32 q8, d19, d18 +@ CHECK: vqdmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0b,0xd3,0xf2] + vqdmlsl.s16 q8, d19, d18 +@ CHECK: vqdmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0b,0xe3,0xf2] + vqdmlsl.s32 q8, d19, d18 diff --git a/test/MC/ARM/neon-mul-encoding.s b/test/MC/ARM/neon-mul-encoding.s new file mode 100644 index 0000000..350fa6e --- /dev/null +++ b/test/MC/ARM/neon-mul-encoding.s @@ -0,0 +1,56 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf2] + vmul.i8 d16, d16, d17 +@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xf2] + vmul.i16 d16, d16, d17 +@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0xb1,0x09,0x60,0xf2] + vmul.i32 d16, d16, d17 +@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0xb1,0x0d,0x40,0xf3] + vmul.f32 d16, d16, d17 +@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf2] + vmul.i8 q8, q8, q9 +@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0xf2,0x09,0x50,0xf2] + vmul.i16 q8, q8, q9 +@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0xf2,0x09,0x60,0xf2] + vmul.i32 q8, q8, q9 +@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0xf2,0x0d,0x40,0xf3] + vmul.f32 q8, q8, q9 +@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf3] + vmul.p8 d16, d16, d17 +@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf3] + vmul.p8 q8, q8, q9 +@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xf2] + vqdmulh.s16 d16, d16, d17 +@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf2] + vqdmulh.s32 d16, d16, d17 +@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xf2] + vqdmulh.s16 q8, q8, q9 +@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf2] + vqdmulh.s32 q8, q8, q9 +@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xf3] + vqrdmulh.s16 d16, d16, d17 +@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf3] + vqrdmulh.s32 d16, d16, d17 +@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xf3] + vqrdmulh.s16 q8, q8, q9 +@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf3] + vqrdmulh.s32 q8, q8, q9 +@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xf2] + vmull.s8 q8, d16, d17 +@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xf2] + vmull.s16 q8, d16, d17 +@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xf2] + vmull.s32 q8, d16, d17 +@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xf3] + vmull.u8 q8, d16, d17 +@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xf3] + vmull.u16 q8, d16, d17 +@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xf3] + vmull.u32 q8, d16, d17 +@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xa1,0x0e,0xc0,0xf2] + vmull.p8 q8, d16, d17 +@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0d,0xd0,0xf2] + vqdmull.s16 q8, d16, d17 +@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0d,0xe0,0xf2] + vqdmull.s32 q8, d16, d17 diff --git a/test/MC/ARM/neon-neg-encoding.s b/test/MC/ARM/neon-neg-encoding.s new file mode 100644 index 0000000..7994ac8 --- /dev/null +++ b/test/MC/ARM/neon-neg-encoding.s @@ -0,0 +1,30 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vneg.s8 d16, d16 @ encoding: [0xa0,0x03,0xf1,0xf3] + vneg.s8 d16, d16 +@ CHECK: vneg.s16 d16, d16 @ encoding: [0xa0,0x03,0xf5,0xf3] + vneg.s16 d16, d16 +@ CHECK: vneg.s32 d16, d16 @ encoding: [0xa0,0x03,0xf9,0xf3] + vneg.s32 d16, d16 +@ CHECK: vneg.f32 d16, d16 @ encoding: [0xa0,0x07,0xf9,0xf3] + vneg.f32 d16, d16 +@ CHECK: vneg.s8 q8, q8 @ encoding: [0xe0,0x03,0xf1,0xf3] + vneg.s8 q8, q8 +@ CHECK: vneg.s16 q8, q8 @ encoding: [0xe0,0x03,0xf5,0xf3] + vneg.s16 q8, q8 +@ CHECK: vneg.s32 q8, q8 @ encoding: [0xe0,0x03,0xf9,0xf3] + vneg.s32 q8, q8 +@ CHECK: vneg.f32 q8, q8 @ encoding: [0xe0,0x07,0xf9,0xf3] + vneg.f32 q8, q8 +@ CHECK: vqneg.s8 d16, d16 @ encoding: [0xa0,0x07,0xf0,0xf3] + vqneg.s8 d16, d16 +@ CHECK: vqneg.s16 d16, d16 @ encoding: [0xa0,0x07,0xf4,0xf3] + vqneg.s16 d16, d16 +@ CHECK: vqneg.s32 d16, d16 @ encoding: [0xa0,0x07,0xf8,0xf3] + vqneg.s32 d16, d16 +@ CHECK: vqneg.s8 q8, q8 @ encoding: [0xe0,0x07,0xf0,0xf3] + vqneg.s8 q8, q8 +@ CHECK: vqneg.s16 q8, q8 @ encoding: [0xe0,0x07,0xf4,0xf3] + vqneg.s16 q8, q8 +@ CHECK: vqneg.s32 q8, q8 @ encoding: [0xe0,0x07,0xf8,0xf3] + vqneg.s32 q8, q8 diff --git a/test/MC/ARM/neon-pairwise-encoding.s b/test/MC/ARM/neon-pairwise-encoding.s new file mode 100644 index 0000000..1fccc11 --- /dev/null +++ b/test/MC/ARM/neon-pairwise-encoding.s @@ -0,0 +1,87 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xf2] + vpadd.i8 d16, d17, d16 +@ CHECK: vpadd.i16 d16, d17, d16 @ encoding: [0xb0,0x0b,0x51,0xf2] + vpadd.i16 d16, d17, d16 +@ CHECK: vpadd.i32 d16, d17, d16 @ encoding: [0xb0,0x0b,0x61,0xf2] + vpadd.i32 d16, d17, d16 +@ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf3] + vpadd.f32 d16, d16, d17 +@ CHECK: vpaddl.s8 d16, d16 @ encoding: [0x20,0x02,0xf0,0xf3] + vpaddl.s8 d16, d16 +@ CHECK: vpaddl.s16 d16, d16 @ encoding: [0x20,0x02,0xf4,0xf3] + vpaddl.s16 d16, d16 +@ CHECK: vpaddl.s32 d16, d16 @ encoding: [0x20,0x02,0xf8,0xf3] + vpaddl.s32 d16, d16 +@ CHECK: vpaddl.u8 d16, d16 @ encoding: [0xa0,0x02,0xf0,0xf3] + vpaddl.u8 d16, d16 +@ CHECK: vpaddl.u16 d16, d16 @ encoding: [0xa0,0x02,0xf4,0xf3] + vpaddl.u16 d16, d16 +@ CHECK: vpaddl.u32 d16, d16 @ encoding: [0xa0,0x02,0xf8,0xf3] + vpaddl.u32 d16, d16 +@ CHECK: vpaddl.s8 q8, q8 @ encoding: [0x60,0x02,0xf0,0xf3] + vpaddl.s8 q8, q8 +@ CHECK: vpaddl.s16 q8, q8 @ encoding: [0x60,0x02,0xf4,0xf3] + vpaddl.s16 q8, q8 +@ CHECK: vpaddl.s32 q8, q8 @ encoding: [0x60,0x02,0xf8,0xf3] + vpaddl.s32 q8, q8 +@ CHECK: vpaddl.u8 q8, q8 @ encoding: [0xe0,0x02,0xf0,0xf3] + vpaddl.u8 q8, q8 +@ CHECK: vpaddl.u16 q8, q8 @ encoding: [0xe0,0x02,0xf4,0xf3] + vpaddl.u16 q8, q8 +@ CHECK: vpaddl.u32 q8, q8 @ encoding: [0xe0,0x02,0xf8,0xf3] + vpaddl.u32 q8, q8 +@ CHECK: vpadal.s8 d16, d17 @ encoding: [0x21,0x06,0xf0,0xf3] + vpadal.s8 d16, d17 +@ CHECK: vpadal.s16 d16, d17 @ encoding: [0x21,0x06,0xf4,0xf3] + vpadal.s16 d16, d17 +@ CHECK: vpadal.s32 d16, d17 @ encoding: [0x21,0x06,0xf8,0xf3] + vpadal.s32 d16, d17 +@ CHECK: vpadal.u8 d16, d17 @ encoding: [0xa1,0x06,0xf0,0xf3] + vpadal.u8 d16, d17 +@ CHECK: vpadal.u16 d16, d17 @ encoding: [0xa1,0x06,0xf4,0xf3] + vpadal.u16 d16, d17 +@ CHECK: vpadal.u32 d16, d17 @ encoding: [0xa1,0x06,0xf8,0xf3] + vpadal.u32 d16, d17 +@ CHECK: vpadal.s8 q9, q8 @ encoding: [0x60,0x26,0xf0,0xf3] + vpadal.s8 q9, q8 +@ CHECK: vpadal.s16 q9, q8 @ encoding: [0x60,0x26,0xf4,0xf3] + vpadal.s16 q9, q8 +@ CHECK: vpadal.s32 q9, q8 @ encoding: [0x60,0x26,0xf8,0xf3] + vpadal.s32 q9, q8 +@ CHECK: vpadal.u8 q9, q8 @ encoding: [0xe0,0x26,0xf0,0xf3] + vpadal.u8 q9, q8 +@ CHECK: vpadal.u16 q9, q8 @ encoding: [0xe0,0x26,0xf4,0xf3] + vpadal.u16 q9, q8 +@ CHECK: vpadal.u32 q9, q8 @ encoding: [0xe0,0x26,0xf8,0xf3] + vpadal.u32 q9, q8 +@ CHECK: vpmin.s8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xf2] + vpmin.s8 d16, d16, d17 +@ CHECK: vpmin.s16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xf2] + vpmin.s16 d16, d16, d17 +@ CHECK: vpmin.s32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xf2] + vpmin.s32 d16, d16, d17 +@ CHECK: vpmin.u8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xf3] + vpmin.u8 d16, d16, d17 +@ CHECK: vpmin.u16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xf3] + vpmin.u16 d16, d16, d17 +@ CHECK: vpmin.u32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xf3] + vpmin.u32 d16, d16, d17 +@ CHECK: vpmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xf3] + vpmin.f32 d16, d16, d17 +@ CHECK: vpmax.s8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xf2] + vpmax.s8 d16, d16, d17 +@ CHECK: vpmax.s16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xf2] + vpmax.s16 d16, d16, d17 +@ CHECK: vpmax.s32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xf2] + vpmax.s32 d16, d16, d17 +@ CHECK: vpmax.u8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xf3] + vpmax.u8 d16, d16, d17 +@ CHECK: vpmax.u16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xf3] + vpmax.u16 d16, d16, d17 +@ CHECK: vpmax.u32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xf3] + vpmax.u32 d16, d16, d17 +@ CHECK: vpmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xf3] + vpmax.f32 d16, d16, d17 diff --git a/test/MC/ARM/neon-reciprocal-encoding.s b/test/MC/ARM/neon-reciprocal-encoding.s new file mode 100644 index 0000000..dee1296 --- /dev/null +++ b/test/MC/ARM/neon-reciprocal-encoding.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xf3] + vrecpe.u32 d16, d16 +@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0x60,0x04,0xfb,0xf3] + vrecpe.u32 q8, q8 +@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0x20,0x05,0xfb,0xf3] + vrecpe.f32 d16, d16 +@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0x60,0x05,0xfb,0xf3] + vrecpe.f32 q8, q8 +@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x40,0xf2] + vrecps.f32 d16, d16, d17 +@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x40,0xf2] + vrecps.f32 q8, q8, q9 +@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xa0,0x04,0xfb,0xf3] + vrsqrte.u32 d16, d16 +@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xe0,0x04,0xfb,0xf3] + vrsqrte.u32 q8, q8 +@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xa0,0x05,0xfb,0xf3] + vrsqrte.f32 d16, d16 +@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xe0,0x05,0xfb,0xf3] + vrsqrte.f32 q8, q8 +@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x60,0xf2] + vrsqrts.f32 d16, d16, d17 +@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x60,0xf2] + vrsqrts.f32 q8, q8, q9 diff --git a/test/MC/ARM/neon-reverse-encoding.s b/test/MC/ARM/neon-reverse-encoding.s new file mode 100644 index 0000000..54e750b --- /dev/null +++ b/test/MC/ARM/neon-reverse-encoding.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vrev64.8 d16, d16 @ encoding: [0x20,0x00,0xf0,0xf3] + vrev64.8 d16, d16 +@ CHECK: vrev64.16 d16, d16 @ encoding: [0x20,0x00,0xf4,0xf3] + vrev64.16 d16, d16 +@ CHECK: vrev64.32 d16, d16 @ encoding: [0x20,0x00,0xf8,0xf3] + vrev64.32 d16, d16 +@ CHECK: vrev64.8 q8, q8 @ encoding: [0x60,0x00,0xf0,0xf3] + vrev64.8 q8, q8 +@ CHECK: vrev64.16 q8, q8 @ encoding: [0x60,0x00,0xf4,0xf3] + vrev64.16 q8, q8 +@ CHECK: vrev64.32 q8, q8 @ encoding: [0x60,0x00,0xf8,0xf3] + vrev64.32 q8, q8 +@ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xf3] + vrev32.8 d16, d16 +@ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xf3] + vrev32.16 d16, d16 +@ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xf3] + vrev32.8 q8, q8 +@ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xf3] + vrev32.16 q8, q8 +@ CHECK: vrev16.8 d16, d16 @ encoding: [0x20,0x01,0xf0,0xf3] + vrev16.8 d16, d16 +@ CHECK: vrev16.8 q8, q8 @ encoding: [0x60,0x01,0xf0,0xf3] + vrev16.8 q8, q8 diff --git a/test/MC/ARM/neon-satshift-encoding.s b/test/MC/ARM/neon-satshift-encoding.s new file mode 100644 index 0000000..4bb64b1 --- /dev/null +++ b/test/MC/ARM/neon-satshift-encoding.s @@ -0,0 +1,150 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xf2] + vqshl.s8 d16, d16, d17 +@ CHECK: vqshl.s16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xf2] + vqshl.s16 d16, d16, d17 +@ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xf2] + vqshl.s32 d16, d16, d17 +@ CHECK: vqshl.s64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xf2] + vqshl.s64 d16, d16, d17 +@ CHECK: vqshl.u8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xf3] + vqshl.u8 d16, d16, d17 +@ CHECK: vqshl.u16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xf3] + vqshl.u16 d16, d16, d17 +@ CHECK: vqshl.u32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xf3] + vqshl.u32 d16, d16, d17 +@ CHECK: vqshl.u64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xf3] + vqshl.u64 d16, d16, d17 +@ CHECK: vqshl.s8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xf2] + vqshl.s8 q8, q8, q9 +@ CHECK: vqshl.s16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xf2] + vqshl.s16 q8, q8, q9 +@ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xf2] + vqshl.s32 q8, q8, q9 +@ CHECK: vqshl.s64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xf2] + vqshl.s64 q8, q8, q9 +@ CHECK: vqshl.u8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xf3] + vqshl.u8 q8, q8, q9 +@ CHECK: vqshl.u16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xf3] + vqshl.u16 q8, q8, q9 +@ CHECK: vqshl.u32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xf3] + vqshl.u32 q8, q8, q9 +@ CHECK: vqshl.u64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xf3] + vqshl.u64 q8, q8, q9 +@ CHECK: vqshl.s8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xf2] + vqshl.s8 d16, d16, #7 +@ CHECK: vqshl.s16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xf2] + vqshl.s16 d16, d16, #15 +@ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xf2] + vqshl.s32 d16, d16, #31 +@ CHECK: vqshl.s64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xf2] + vqshl.s64 d16, d16, #63 +@ CHECK: vqshl.u8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xf3] + vqshl.u8 d16, d16, #7 +@ CHECK: vqshl.u16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xf3] + vqshl.u16 d16, d16, #15 +@ CHECK: vqshl.u32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xf3] + vqshl.u32 d16, d16, #31 +@ CHECK: vqshl.u64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xf3] + vqshl.u64 d16, d16, #63 +@ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0x30,0x06,0xcf,0xf3] + vqshlu.s8 d16, d16, #7 +@ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0x30,0x06,0xdf,0xf3] + vqshlu.s16 d16, d16, #15 +@ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xf3] + vqshlu.s32 d16, d16, #31 +@ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xb0,0x06,0xff,0xf3] + vqshlu.s64 d16, d16, #63 +@ CHECK: vqshl.s8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xf2] + vqshl.s8 q8, q8, #7 +@ CHECK: vqshl.s16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xf2] + vqshl.s16 q8, q8, #15 +@ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xf2] + vqshl.s32 q8, q8, #31 +@ CHECK: vqshl.s64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xf2] + vqshl.s64 q8, q8, #63 +@ CHECK: vqshl.u8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xf3] + vqshl.u8 q8, q8, #7 +@ CHECK: vqshl.u16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xf3] + vqshl.u16 q8, q8, #15 +@ CHECK: vqshl.u32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xf3] + vqshl.u32 q8, q8, #31 +@ CHECK: vqshl.u64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xf3] + vqshl.u64 q8, q8, #63 +@ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0x70,0x06,0xcf,0xf3] + vqshlu.s8 q8, q8, #7 +@ CHECK: vqshlu.s16 q8, q8, #15 @ encoding: [0x70,0x06,0xdf,0xf3] + vqshlu.s16 q8, q8, #15 +@ CHECK: vqshlu.s32 q8, q8, #31 @ encoding: [0x70,0x06,0xff,0xf3] + vqshlu.s32 q8, q8, #31 +@ CHECK: vqshlu.s64 q8, q8, #63 @ encoding: [0xf0,0x06,0xff,0xf3] + vqshlu.s64 q8, q8, #63 +@ CHECK: vqrshl.s8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xf2] + vqrshl.s8 d16, d16, d17 +@ CHECK: vqrshl.s16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xf2] + vqrshl.s16 d16, d16, d17 +@ CHECK: vqrshl.s32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xf2] + vqrshl.s32 d16, d16, d17 +@ CHECK: vqrshl.s64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xf2] + vqrshl.s64 d16, d16, d17 +@ CHECK: vqrshl.u8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xf3] + vqrshl.u8 d16, d16, d17 +@ CHECK: vqrshl.u16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xf3] + vqrshl.u16 d16, d16, d17 +@ CHECK: vqrshl.u32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xf3] + vqrshl.u32 d16, d16, d17 +@ CHECK: vqrshl.u64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xf3] + vqrshl.u64 d16, d16, d17 +@ CHECK: vqrshl.s8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xf2] + vqrshl.s8 q8, q8, q9 +@ CHECK: vqrshl.s16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xf2] + vqrshl.s16 q8, q8, q9 +@ CHECK: vqrshl.s32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xf2] + vqrshl.s32 q8, q8, q9 +@ CHECK: vqrshl.s64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xf2] + vqrshl.s64 q8, q8, q9 +@ CHECK: vqrshl.u8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xf3] + vqrshl.u8 q8, q8, q9 +@ CHECK: vqrshl.u16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xf3] + vqrshl.u16 q8, q8, q9 +@ CHECK: vqrshl.u32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xf3] + vqrshl.u32 q8, q8, q9 +@ CHECK: vqrshl.u64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xf3] + vqrshl.u64 q8, q8, q9 +@ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf2] + vqshrn.s16 d16, q8, #8 +@ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf2] + vqshrn.s32 d16, q8, #16 +@ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xf2] + vqshrn.s64 d16, q8, #32 +@ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf3] + vqshrn.u16 d16, q8, #8 +@ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf3] + vqshrn.u32 d16, q8, #16 +@ CHECK: vqshrn.u64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xf3] + vqshrn.u64 d16, q8, #32 +@ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf3] + vqshrun.s16 d16, q8, #8 +@ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xf3] + vqshrun.s32 d16, q8, #16 +@ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xf3] + vqshrun.s64 d16, q8, #32 +@ CHECK: vqrshrn.s16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xf2] + vqrshrn.s16 d16, q8, #8 +@ CHECK: vqrshrn.s32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xf2] + vqrshrn.s32 d16, q8, #16 +@ CHECK: vqrshrn.s64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xf2] + vqrshrn.s64 d16, q8, #32 +@ CHECK: vqrshrn.u16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xf3] + vqrshrn.u16 d16, q8, #8 +@ CHECK: vqrshrn.u32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xf3] + vqrshrn.u32 d16, q8, #16 +@ CHECK: vqrshrn.u64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xf3] + vqrshrn.u64 d16, q8, #32 +@ CHECK: vqrshrun.s16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xf3] + vqrshrun.s16 d16, q8, #8 +@ CHECK: vqrshrun.s32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xf3] + vqrshrun.s32 d16, q8, #16 +@ CHECK: vqrshrun.s64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf3] + vqrshrun.s64 d16, q8, #32 diff --git a/test/MC/ARM/neon-shift-encoding.s b/test/MC/ARM/neon-shift-encoding.s new file mode 100644 index 0000000..015214a --- /dev/null +++ b/test/MC/ARM/neon-shift-encoding.s @@ -0,0 +1,160 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0xa1,0x04,0x40,0xf3] + vshl.u8 d16, d17, d16 +@ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0xa1,0x04,0x50,0xf3] + vshl.u16 d16, d17, d16 +@ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0xa1,0x04,0x60,0xf3] + vshl.u32 d16, d17, d16 +@ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0xa1,0x04,0x70,0xf3] + vshl.u64 d16, d17, d16 +@ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xf2] + vshl.i8 d16, d16, #7 +@ CHECK: vshl.i16 d16, d16, #15 @ encoding: [0x30,0x05,0xdf,0xf2] + vshl.i16 d16, d16, #15 +@ CHECK: vshl.i32 d16, d16, #31 @ encoding: [0x30,0x05,0xff,0xf2] + vshl.i32 d16, d16, #31 +@ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xb0,0x05,0xff,0xf2] + vshl.i64 d16, d16, #63 +@ CHECK: vshl.u8 q8, q9, q8 @ encoding: [0xe2,0x04,0x40,0xf3] + vshl.u8 q8, q9, q8 +@ CHECK: vshl.u16 q8, q9, q8 @ encoding: [0xe2,0x04,0x50,0xf3] + vshl.u16 q8, q9, q8 +@ CHECK: vshl.u32 q8, q9, q8 @ encoding: [0xe2,0x04,0x60,0xf3] + vshl.u32 q8, q9, q8 +@ CHECK: vshl.u64 q8, q9, q8 @ encoding: [0xe2,0x04,0x70,0xf3] + vshl.u64 q8, q9, q8 +@ CHECK: vshl.i8 q8, q8, #7 @ encoding: [0x70,0x05,0xcf,0xf2] + vshl.i8 q8, q8, #7 +@ CHECK: vshl.i16 q8, q8, #15 @ encoding: [0x70,0x05,0xdf,0xf2] + vshl.i16 q8, q8, #15 +@ CHECK: vshl.i32 q8, q8, #31 @ encoding: [0x70,0x05,0xff,0xf2] + vshl.i32 q8, q8, #31 +@ CHECK: vshl.i64 q8, q8, #63 @ encoding: [0xf0,0x05,0xff,0xf2] + vshl.i64 q8, q8, #63 +@ CHECK: vshr.u8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xf3] + vshr.u8 d16, d16, #8 +@ CHECK: vshr.u16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xf3] + vshr.u16 d16, d16, #16 +@ CHECK: vshr.u32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xf3] + vshr.u32 d16, d16, #32 +@ CHECK: vshr.u64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xf3] + vshr.u64 d16, d16, #64 +@ CHECK: vshr.u8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xf3] + vshr.u8 q8, q8, #8 +@ CHECK: vshr.u16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xf3] + vshr.u16 q8, q8, #16 +@ CHECK: vshr.u32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xf3] + vshr.u32 q8, q8, #32 +@ CHECK: vshr.u64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xf3] + vshr.u64 q8, q8, #64 +@ CHECK: vshr.s8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xf2] + vshr.s8 d16, d16, #8 +@ CHECK: vshr.s16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xf2] + vshr.s16 d16, d16, #16 +@ CHECK: vshr.s32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xf2] + vshr.s32 d16, d16, #32 +@ CHECK: vshr.s64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xf2] + vshr.s64 d16, d16, #64 +@ CHECK: vshr.s8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xf2] + vshr.s8 q8, q8, #8 +@ CHECK: vshr.s16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xf2] + vshr.s16 q8, q8, #16 +@ CHECK: vshr.s32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xf2 + vshr.s32 q8, q8, #32 +@ CHECK: vshr.s64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xf2] + vshr.s64 q8, q8, #64 +@ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2] + vshll.s8 q8, d16, #7 +@ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf2] + vshll.s16 q8, d16, #15 +@ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf2] + vshll.s32 q8, d16, #31 +@ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf3] + vshll.u8 q8, d16, #7 +@ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf3] + vshll.u16 q8, d16, #15 +@ CHECK: vshll.u32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf3] + vshll.u32 q8, d16, #31 +@ CHECK: vshll.i8 q8, d16, #8 @ encoding: [0x20,0x03,0xf2,0xf3] + vshll.i8 q8, d16, #8 +@ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0x20,0x03,0xf6,0xf3] + vshll.i16 q8, d16, #16 +@ CHECK: vshll.i32 q8, d16, #32 @ encoding: [0x20,0x03,0xfa,0xf3] + vshll.i32 q8, d16, #32 +@ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf2] + vshrn.i16 d16, q8, #8 +@ CHECK: vshrn.i32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xf2] + vshrn.i32 d16, q8, #16 +@ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xf2] + vshrn.i64 d16, q8, #32 +@ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf2] + vrshl.s8 d16, d17, d16 +@ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf2] + vrshl.s16 d16, d17, d16 +@ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf2] + vrshl.s32 d16, d17, d16 +@ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0 + vrshl.s64 d16, d17, d16 +@ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf3] + vrshl.u8 d16, d17, d16 +@ CHECK: vrshl.u16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf3] + vrshl.u16 d16, d17, d16 +@ CHECK: vrshl.u32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf3] + vrshl.u32 d16, d17, d16 +@ CHECK: vrshl.u64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xf3] + vrshl.u64 d16, d17, d16 +@ CHECK: vrshl.s8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xf2] + vrshl.s8 q8, q9, q8 +@ CHECK: vrshl.s16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xf2] + vrshl.s16 q8, q9, q8 +@ CHECK: vrshl.s32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xf2] + vrshl.s32 q8, q9, q8 +@ CHECK: vrshl.s64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xf2] + vrshl.s64 q8, q9, q8 +@ CHECK: vrshl.u8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xf3] + vrshl.u8 q8, q9, q8 +@ CHECK: vrshl.u16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xf3] + vrshl.u16 q8, q9, q8 +@ CHECK: vrshl.u32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xf3] + vrshl.u32 q8, q9, q8 +@ CHECK: vrshl.u64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xf3] + vrshl.u64 q8, q9, q8 +@ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf2] + vrshr.s8 d16, d16, #8 +@ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf2] + vrshr.s16 d16, d16, #16 +@ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf2] + vrshr.s32 d16, d16, #32 +@ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf2] + vrshr.s64 d16, d16, #64 +@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf3] + vrshr.u8 d16, d16, #8 +@ CHECK: vrshr.u16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf3] + vrshr.u16 d16, d16, #16 +@ CHECK: vrshr.u32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf3] + vrshr.u32 d16, d16, #32 +@ CHECK: vrshr.u64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf3] + vrshr.u64 d16, d16, #64 +@ CHECK: vrshr.s8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xf2] + vrshr.s8 q8, q8, #8 +@ CHECK: vrshr.s16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xf2] + vrshr.s16 q8, q8, #16 +@ CHECK: vrshr.s32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xf2] + vrshr.s32 q8, q8, #32 +@ CHECK: vrshr.s64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xf2] + vrshr.s64 q8, q8, #64 +@ CHECK: vrshr.u8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xf3] + vrshr.u8 q8, q8, #8 +@ CHECK: vrshr.u16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xf3] + vrshr.u16 q8, q8, #16 +@ CHECK: vrshr.u32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xf3] + vrshr.u32 q8, q8, #32 +@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xf3] + vrshr.u64 q8, q8, #64 +@ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xf2] + vrshrn.i16 d16, q8, #8 +@ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xf2] + vrshrn.i32 d16, q8, #16 +@ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf2] + vrshrn.i64 d16, q8, #32 diff --git a/test/MC/ARM/neon-shiftaccum-encoding.s b/test/MC/ARM/neon-shiftaccum-encoding.s new file mode 100644 index 0000000..25f151b --- /dev/null +++ b/test/MC/ARM/neon-shiftaccum-encoding.s @@ -0,0 +1,98 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xf2] + vsra.s8 d17, d16, #8 +@ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xf2] + vsra.s16 d17, d16, #16 +@ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xf2] + vsra.s32 d17, d16, #32 +@ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xf2] + vsra.s64 d17, d16, #64 +@ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xf2] + vsra.s8 q8, q9, #8 +@ CHECK: vsra.s16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xf2] + vsra.s16 q8, q9, #16 +@ CHECK: vsra.s32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xf2] + vsra.s32 q8, q9, #32 +@ CHECK: vsra.s64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xf2] + vsra.s64 q8, q9, #64 +@ CHECK: vsra.u8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xf3] + vsra.u8 d17, d16, #8 +@ CHECK: vsra.u16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xf3] + vsra.u16 d17, d16, #16 +@ CHECK: vsra.u32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xf3] + vsra.u32 d17, d16, #32 +@ CHECK: vsra.u64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xf3] + vsra.u64 d17, d16, #64 +@ CHECK: vsra.u8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xf3] + vsra.u8 q8, q9, #8 +@ CHECK: vsra.u16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xf3] + vsra.u16 q8, q9, #16 +@ CHECK: vsra.u32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xf3] + vsra.u32 q8, q9, #32 +@ CHECK: vsra.u64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xf3] + vsra.u64 q8, q9, #64 +@ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xf2] + vrsra.s8 d17, d16, #8 +@ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xf2] + vrsra.s16 d17, d16, #16 +@ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xf2] + vrsra.s32 d17, d16, #32 +@ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xf2] + vrsra.s64 d17, d16, #64 +@ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xf3] + vrsra.u8 d17, d16, #8 +@ CHECK: vrsra.u16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xf3] + vrsra.u16 d17, d16, #16 +@ CHECK: vrsra.u32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xf3] + vrsra.u32 d17, d16, #32 +@ CHECK: vrsra.u64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xf3] + vrsra.u64 d17, d16, #64 +@ CHECK: vrsra.s8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xf2] + vrsra.s8 q8, q9, #8 +@ CHECK: vrsra.s16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xf2] + vrsra.s16 q8, q9, #16 +@ CHECK: vrsra.s32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xf2] + vrsra.s32 q8, q9, #32 +@ CHECK: vrsra.s64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xf2] + vrsra.s64 q8, q9, #64 +@ CHECK: vrsra.u8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xf3] + vrsra.u8 q8, q9, #8 +@ CHECK: vrsra.u16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xf3] + vrsra.u16 q8, q9, #16 +@ CHECK: vrsra.u32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xf3] + vrsra.u32 q8, q9, #32 +@ CHECK: vrsra.u64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xf3] + vrsra.u64 q8, q9, #64 +@ CHECK: vsli.8 d17, d16, #7 @ encoding: [0x30,0x15,0xcf,0xf3] + vsli.8 d17, d16, #7 +@ CHECK: vsli.16 d17, d16, #15 @ encoding: [0x30,0x15,0xdf,0xf3] + vsli.16 d17, d16, #15 +@ CHECK: vsli.32 d17, d16, #31 @ encoding: [0x30,0x15,0xff,0xf3] + vsli.32 d17, d16, #31 +@ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xb0,0x15,0xff,0xf3] + vsli.64 d17, d16, #63 +@ CHECK: vsli.8 q9, q8, #7 @ encoding: [0x70,0x25,0xcf,0xf3] + vsli.8 q9, q8, #7 +@ CHECK: vsli.16 q9, q8, #15 @ encoding: [0x70,0x25,0xdf,0xf3] + vsli.16 q9, q8, #15 +@ CHECK: vsli.32 q9, q8, #31 @ encoding: [0x70,0x25,0xff,0xf3] + vsli.32 q9, q8, #31 +@ CHECK: vsli.64 q9, q8, #63 @ encoding: [0xf0,0x25,0xff,0xf3] + vsli.64 q9, q8, #63 +@ CHECK: vsri.8 d17, d16, #8 @ encoding: [0x30,0x14,0xc8,0xf3] + vsri.8 d17, d16, #8 +@ CHECK: vsri.16 d17, d16, #16 @ encoding: [0x30,0x14,0xd0,0xf3] + vsri.16 d17, d16, #16 +@ CHECK: vsri.32 d17, d16, #32 @ encoding: [0x30,0x14,0xe0,0xf3] + vsri.32 d17, d16, #32 +@ CHECK: vsri.64 d17, d16, #64 @ encoding: [0xb0,0x14,0xc0,0xf3] + vsri.64 d17, d16, #64 +@ CHECK: vsri.8 q9, q8, #8 @ encoding: [0x70,0x24,0xc8,0xf3] + vsri.8 q9, q8, #8 +@ CHECK: vsri.16 q9, q8, #16 @ encoding: [0x70,0x24,0xd0,0xf3] + vsri.16 q9, q8, #16 +@ CHECK: vsri.32 q9, q8, #32 @ encoding: [0x70,0x24,0xe0,0xf3] + vsri.32 q9, q8, #32 +@ CHECK: vsri.64 q9, q8, #64 @ encoding: [0xf0,0x24,0xc0,0xf3] + vsri.64 q9, q8, #64 diff --git a/test/MC/ARM/neon-shuffle-encoding.s b/test/MC/ARM/neon-shuffle-encoding.s new file mode 100644 index 0000000..c8844d3 --- /dev/null +++ b/test/MC/ARM/neon-shuffle-encoding.s @@ -0,0 +1,46 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xa0,0x03,0xf1,0xf2] + vext.8 d16, d17, d16, #3 +@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xa0,0x05,0xf1,0xf2] + vext.8 d16, d17, d16, #5 +@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xe0,0x03,0xf2,0xf2] + vext.8 q8, q9, q8, #3 +@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xe0,0x07,0xf2,0xf2] + vext.8 q8, q9, q8, #7 +@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xa0,0x06,0xf1,0xf2] + vext.16 d16, d17, d16, #3 +@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xe0,0x0c,0xf2,0xf2] + vext.32 q8, q9, q8, #3 +@ CHECK: vtrn.8 d17, d16 @ encoding: [0xa0,0x10,0xf2,0xf3] + vtrn.8 d17, d16 +@ CHECK: vtrn.16 d17, d16 @ encoding: [0xa0,0x10,0xf6,0xf3] + vtrn.16 d17, d16 +@ CHECK: vtrn.32 d17, d16 @ encoding: [0xa0,0x10,0xfa,0xf3] + vtrn.32 d17, d16 +@ CHECK: vtrn.8 q9, q8 @ encoding: [0xe0,0x20,0xf2,0xf3] + vtrn.8 q9, q8 +@ CHECK: vtrn.16 q9, q8 @ encoding: [0xe0,0x20,0xf6,0xf3] + vtrn.16 q9, q8 +@ CHECK: vtrn.32 q9, q8 @ encoding: [0xe0,0x20,0xfa,0xf3] + vtrn.32 q9, q8 +@ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xf3] + vuzp.8 d17, d16 +@ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xf3] + vuzp.16 d17, d16 +@ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xf3] + vuzp.8 q9, q8 +@ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xf3] + vuzp.16 q9, q8 +@ CHECK: vuzp.32 q9, q8 @ encoding: [0x60,0x21,0xfa,0xf3] + vuzp.32 q9, q8 +@ CHECK: vzip.8 d17, d16 @ encoding: [0xa0,0x11,0xf2,0xf3] + vzip.8 d17, d16 +@ CHECK: vzip.16 d17, d16 @ encoding: [0xa0,0x11,0xf6,0xf3] + vzip.16 d17, d16 +@ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xf3] + vzip.8 q9, q8 +@ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xf3] + vzip.16 q9, q8 +@ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xf3] + vzip.32 q9, q8 diff --git a/test/MC/ARM/neon-sub-encoding.s b/test/MC/ARM/neon-sub-encoding.s new file mode 100644 index 0000000..43c7e98 --- /dev/null +++ b/test/MC/ARM/neon-sub-encoding.s @@ -0,0 +1,108 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vsub.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf3] + vsub.i8 d16, d17, d16 +@ CHECK: vsub.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xf3] + vsub.i16 d16, d17, d16 +@ CHECK: vsub.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xf3] + vsub.i32 d16, d17, d16 +@ CHECK: vsub.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xf3] + vsub.i64 d16, d17, d16 +@ CHECK: vsub.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xf2] + vsub.f32 d16, d16, d17 +@ CHECK: vsub.i8 q8, q8, q9 @ encoding: [0xe2,0x08,0x40,0xf3] + vsub.i8 q8, q8, q9 +@ CHECK: vsub.i16 q8, q8, q9 @ encoding: [0xe2,0x08,0x50,0xf3] + vsub.i16 q8, q8, q9 +@ CHECK: vsub.i32 q8, q8, q9 @ encoding: [0xe2,0x08,0x60,0xf3] + vsub.i32 q8, q8, q9 +@ CHECK: vsub.i64 q8, q8, q9 @ encoding: [0xe2,0x08,0x70,0xf3] + vsub.i64 q8, q8, q9 +@ CHECK: vsub.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x60,0xf2] + vsub.f32 q8, q8, q9 +@ CHECK: vsubl.s8 q8, d17, d16 @ encoding: [0xa0,0x02,0xc1,0xf2] + vsubl.s8 q8, d17, d16 +@ CHECK: vsubl.s16 q8, d17, d16 @ encoding: [0xa0,0x02,0xd1,0xf2] + vsubl.s16 q8, d17, d16 +@ CHECK: vsubl.s32 q8, d17, d16 @ encoding: [0xa0,0x02,0xe1,0xf2] + vsubl.s32 q8, d17, d16 +@ CHECK: vsubl.u8 q8, d17, d16 @ encoding: [0xa0,0x02,0xc1,0xf3] + vsubl.u8 q8, d17, d16 +@ CHECK: vsubl.u16 q8, d17, d16 @ encoding: [0xa0,0x02,0xd1,0xf3] + vsubl.u16 q8, d17, d16 +@ CHECK: vsubl.u32 q8, d17, d16 @ encoding: [0xa0,0x02,0xe1,0xf3] + vsubl.u32 q8, d17, d16 +@ CHECK: vsubw.s8 q8, q8, d18 @ encoding: [0xa2,0x03,0xc0,0xf2] + vsubw.s8 q8, q8, d18 +@ CHECK: vsubw.s16 q8, q8, d18 @ encoding: [0xa2,0x03,0xd0,0xf2] + vsubw.s16 q8, q8, d18 +@ CHECK: vsubw.s32 q8, q8, d18 @ encoding: [0xa2,0x03,0xe0,0xf2] + vsubw.s32 q8, q8, d18 +@ CHECK: vsubw.u8 q8, q8, d18 @ encoding: [0xa2,0x03,0xc0,0xf3] + vsubw.u8 q8, q8, d18 +@ CHECK: vsubw.u16 q8, q8, d18 @ encoding: [0xa2,0x03,0xd0,0xf3] + vsubw.u16 q8, q8, d18 +@ CHECK: vsubw.u32 q8, q8, d18 @ encoding: [0xa2,0x03,0xe0,0xf3] + vsubw.u32 q8, q8, d18 +@ CHECK: vhsub.s8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf2] + vhsub.s8 d16, d16, d17 +@ CHECK: vhsub.s16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf2] + vhsub.s16 d16, d16, d17 +@ CHECK: vhsub.s32 d16, d16, d17 @ encoding: [0xa1,0x02,0x60,0xf2] + vhsub.s32 d16, d16, d17 +@ CHECK: vhsub.u8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf3] + vhsub.u8 d16, d16, d17 +@ CHECK: vhsub.u16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf3] + vhsub.u16 d16, d16, d17 +@ CHECK: vhsub.u32 d16, d16, d17 @ encoding: [0xa1,0x02,0x60,0xf3] + vhsub.u32 d16, d16, d17 +@ CHECK: vhsub.s8 q8, q8, q9 @ encoding: [0xe2,0x02,0x40,0xf2] + vhsub.s8 q8, q8, q9 +@ CHECK: vhsub.s16 q8, q8, q9 @ encoding: [0xe2,0x02,0x50,0xf2] + vhsub.s16 q8, q8, q9 +@ CHECK: vhsub.s32 q8, q8, q9 @ encoding: [0xe2,0x02,0x60,0xf2] + vhsub.s32 q8, q8, q9 +@ CHECK: vqsub.s8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf2] + vqsub.s8 d16, d16, d17 +@ CHECK: vqsub.s16 d16, d16, d17 @ encoding: [0xb1,0x02,0x50,0xf2] + vqsub.s16 d16, d16, d17 +@ CHECK: vqsub.s32 d16, d16, d17 @ encoding: [0xb1,0x02,0x60,0xf2] + vqsub.s32 d16, d16, d17 +@ CHECK: vqsub.s64 d16, d16, d17 @ encoding: [0xb1,0x02,0x70,0xf2] + vqsub.s64 d16, d16, d17 +@ CHECK: vqsub.u8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf3] + vqsub.u8 d16, d16, d17 +@ CHECK: vqsub.u16 d16, d16, d17 @ encoding: [0xb1,0x02,0x50,0xf3] + vqsub.u16 d16, d16, d17 +@ CHECK: vqsub.u32 d16, d16, d17 @ encoding: [0xb1,0x02,0x60,0xf3] + vqsub.u32 d16, d16, d17 +@ CHECK: vqsub.u64 d16, d16, d17 @ encoding: [0xb1,0x02,0x70,0xf3] + vqsub.u64 d16, d16, d17 +@ CHECK: vqsub.s8 q8, q8, q9 @ encoding: [0xf2,0x02,0x40,0xf2] + vqsub.s8 q8, q8, q9 +@ CHECK: vqsub.s16 q8, q8, q9 @ encoding: [0xf2,0x02,0x50,0xf2] + vqsub.s16 q8, q8, q9 +@ CHECK: vqsub.s32 q8, q8, q9 @ encoding: [0xf2,0x02,0x60,0xf2] + vqsub.s32 q8, q8, q9 +@ CHECK: vqsub.s64 q8, q8, q9 @ encoding: [0xf2,0x02,0x70,0xf2] + vqsub.s64 q8, q8, q9 +@ CHECK: vqsub.u8 q8, q8, q9 @ encoding: [0xf2,0x02,0x40,0xf3] + vqsub.u8 q8, q8, q9 +@ CHECK: vqsub.u16 q8, q8, q9 @ encoding: [0xf2,0x02,0x50,0xf3] + vqsub.u16 q8, q8, q9 +@ CHECK: vqsub.u32 q8, q8, q9 @ encoding: [0xf2,0x02,0x60,0xf3] + vqsub.u32 q8, q8, q9 +@ CHECK: vqsub.u64 q8, q8, q9 @ encoding: [0xf2,0x02,0x70,0xf3] + vqsub.u64 q8, q8, q9 +@ CHECK: vsubhn.i16 d16, q8, q9 @ encoding: [0xa2,0x06,0xc0,0xf2] + vsubhn.i16 d16, q8, q9 +@ CHECK: vsubhn.i32 d16, q8, q9 @ encoding: [0xa2,0x06,0xd0,0xf2] + vsubhn.i32 d16, q8, q9 +@ CHECK: vsubhn.i64 d16, q8, q9 @ encoding: [0xa2,0x06,0xe0,0xf2] + vsubhn.i64 d16, q8, q9 +@ CHECK: vrsubhn.i16 d16, q8, q9 @ encoding: [0xa2,0x06,0xc0,0xf3] + vrsubhn.i16 d16, q8, q9 +@ CHECK: vrsubhn.i32 d16, q8, q9 @ encoding: [0xa2,0x06,0xd0,0xf3] + vrsubhn.i32 d16, q8, q9 +@ CHECK: vrsubhn.i64 d16, q8, q9 @ encoding: [0xa2,0x06,0xe0,0xf3] + vrsubhn.i64 d16, q8, q9 diff --git a/test/MC/ARM/neon-table-encoding.s b/test/MC/ARM/neon-table-encoding.s new file mode 100644 index 0000000..c1666bf --- /dev/null +++ b/test/MC/ARM/neon-table-encoding.s @@ -0,0 +1,19 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vtbl.8 d16, {d17}, d16 @ encoding: [0xa0,0x08,0xf1,0xf3] + vtbl.8 d16, {d17}, d16 +@ CHECK: vtbl.8 d16, {d16, d17}, d18 @ encoding: [0xa2,0x09,0xf0,0xf3] + vtbl.8 d16, {d16, d17}, d18 +@ CHECK: vtbl.8 d16, {d16, d17, d18}, d20 @ encoding: [0xa4,0x0a,0xf0,0xf3] + vtbl.8 d16, {d16, d17, d18}, d20 +@ CHECK: vtbl.8 d16, {d16, d17, d18, d19}, d20 @ encoding: [0xa4,0x0b,0xf0,0xf3] + vtbl.8 d16, {d16, d17, d18, d19}, d20 +@ CHECK: vtbx.8 d18, {d16}, d17 @ encoding: [0xe1,0x28,0xf0,0xf3] + vtbx.8 d18, {d16}, d17 +@ CHECK: vtbx.8 d19, {d16, d17}, d18 @ encoding: [0xe2,0x39,0xf0,0xf3] + vtbx.8 d19, {d16, d17}, d18 +@ CHECK: vtbx.8 d20, {d16, d17, d18}, d21 @ encoding: [0xe5,0x4a,0xf0,0xf3] + vtbx.8 d20, {d16, d17, d18}, d21 +@ CHECK: vtbx.8 d20, {d16, d17, d18, d19}, d21 @ encoding: [0xe5,0x4b,0xf0,0xf3] + vtbx.8 d20, {d16, d17, d18, d19}, d21 diff --git a/test/MC/ARM/neon-vld-encoding.s b/test/MC/ARM/neon-vld-encoding.s new file mode 100644 index 0000000..be55f47 --- /dev/null +++ b/test/MC/ARM/neon-vld-encoding.s @@ -0,0 +1,110 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vld1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x60,0xf4] + vld1.8 {d16}, [r0, :64] +@ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x60,0xf4] + vld1.16 {d16}, [r0] +@ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x60,0xf4] + vld1.32 {d16}, [r0] +@ CHECK: vld1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x60,0xf4] + vld1.64 {d16}, [r0] +@ CHECK: vld1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x60,0xf4] + vld1.8 {d16, d17}, [r0, :64] +@ CHECK: vld1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x60,0xf4] + vld1.16 {d16, d17}, [r0, :128] +@ CHECK: vld1.32 {d16, d17}, [r0] @ encoding: [0x8f,0x0a,0x60,0xf4] + vld1.32 {d16, d17}, [r0] +@ CHECK: vld1.64 {d16, d17}, [r0] @ encoding: [0xcf,0x0a,0x60,0xf4] + vld1.64 {d16, d17}, [r0] + +@ CHECK: vld2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x60,0xf4] + vld2.8 {d16, d17}, [r0, :64] +@ CHECK: vld2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x60,0xf4] + vld2.16 {d16, d17}, [r0, :128] +@ CHECK: vld2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x60,0xf4] + vld2.32 {d16, d17}, [r0] +@ CHECK: vld2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x60,0xf4] + vld2.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vld2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x60,0xf4] + vld2.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vld2.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x03,0x60,0xf4] + vld2.32 {d16, d17, d18, d19}, [r0, :256] + +@ CHECK: vld3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x60,0xf4] + vld3.8 {d16, d17, d18}, [r0, :64] +@ CHECK: vld3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x60,0xf4] + vld3.16 {d16, d17, d18}, [r0] +@ CHECK: vld3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x60,0xf4] + vld3.32 {d16, d17, d18}, [r0] +@ CHECK: vld3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x60,0xf4] + vld3.8 {d16, d18, d20}, [r0, :64]! +@ CHECK: vld3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x60,0xf4] + vld3.8 {d17, d19, d21}, [r0, :64]! +@ CHECK: vld3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x60,0xf4] + vld3.16 {d16, d18, d20}, [r0]! +@ CHECK: vld3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x60,0xf4] + vld3.16 {d17, d19, d21}, [r0]! +@ CHECK: vld3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x60,0xf4] + vld3.32 {d16, d18, d20}, [r0]! +@ CHECK: vld3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x60,0xf4] + vld3.32 {d17, d19, d21}, [r0]! + +@ CHECK: vld4.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x00,0x60,0xf4] + vld4.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vld4.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x00,0x60,0xf4] + vld4.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vld4.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x00,0x60,0xf4] + vld4.32 {d16, d17, d18, d19}, [r0, :256] +@ CHECK: vld4.8 {d16, d18, d20, d22}, [r0, :256]! @ encoding: [0x3d,0x01,0x60,0xf4] + vld4.8 {d16, d18, d20, d22}, [r0, :256]! +@ CHECK: vld4.8 {d17, d19, d21, d23}, [r0, :256]! @ encoding: [0x3d,0x11,0x60,0xf4] + vld4.8 {d17, d19, d21, d23}, [r0, :256]! +@ CHECK: vld4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x60,0xf4] + vld4.16 {d16, d18, d20, d22}, [r0]! +@ CHECK: vld4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x60,0xf4] + vld4.16 {d17, d19, d21, d23}, [r0]! +@ CHECK: vld4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x60,0xf4] + vld4.32 {d16, d18, d20, d22}, [r0]! +@ CHECK: vld4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x60,0xf4] + vld4.32 {d17, d19, d21, d23}, [r0]! + +@ CHECK: vld1.8 {d16[3]}, [r0] @ encoding: [0x6f,0x00,0xe0,0xf4] + vld1.8 {d16[3]}, [r0] +@ CHECK: vld1.16 {d16[2]}, [r0, :16] @ encoding: [0x9f,0x04,0xe0,0xf4] + vld1.16 {d16[2]}, [r0, :16] +@ CHECK: vld1.32 {d16[1]}, [r0, :32] @ encoding: [0xbf,0x08,0xe0,0xf4] + vld1.32 {d16[1]}, [r0, :32] + +@ CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xe0,0xf4] + vld2.8 {d16[1], d17[1]}, [r0, :16] +@ CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xe0,0xf4] + vld2.16 {d16[1], d17[1]}, [r0, :32] +@ CHECK: vld2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xe0,0xf4] + vld2.32 {d16[1], d17[1]}, [r0] +@ CHECK: vld2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xe0,0xf4] + vld2.16 {d17[1], d19[1]}, [r0] +@ CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xe0,0xf4] + vld2.32 {d17[0], d19[0]}, [r0, :64] + +@ CHECK: vld3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xe0,0xf4] + vld3.8 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x4f,0x06,0xe0,0xf4] + vld3.16 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.32 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x8f,0x0a,0xe0,0xf4] + vld3.32 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0] @ encoding: [0x6f,0x06,0xe0,0xf4] + vld3.16 {d16[1], d18[1], d20[1]}, [r0] +@ CHECK: vld3.32 {d17[1], d19[1], d21[1]}, [r0] @ encoding: [0xcf,0x1a,0xe0,0xf4] + vld3.32 {d17[1], d19[1], d21[1]}, [r0] + +@ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xe0,0xf4] + vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] +@ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xe0,0xf4] + vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +@ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xe0,0xf4] + vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] +@ CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] @ encoding: [0x7f,0x07,0xe0,0xf4] + vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] +@ CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xe0,0xf4] + vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] diff --git a/test/MC/ARM/neon-vst-encoding.s b/test/MC/ARM/neon-vst-encoding.s new file mode 100644 index 0000000..c595aa2 --- /dev/null +++ b/test/MC/ARM/neon-vst-encoding.s @@ -0,0 +1,101 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vst1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x40,0xf4] + vst1.8 {d16}, [r0, :64] +@ CHECK: vst1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x40,0xf4] + vst1.16 {d16}, [r0] +@ CHECK: vst1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x40,0xf4] + vst1.32 {d16}, [r0] +@ CHECK: vst1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x40,0xf4] + vst1.64 {d16}, [r0] +@ CHECK: vst1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x40,0xf4] + vst1.8 {d16, d17}, [r0, :64] +@ CHECK: vst1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x40,0xf4] + vst1.16 {d16, d17}, [r0, :128] +@ CHECK: vst1.32 {d16, d17}, [r0] @ encoding: [0x8f,0x0a,0x40,0xf4] + vst1.32 {d16, d17}, [r0] +@ CHECK: vst1.64 {d16, d17}, [r0] @ encoding: [0xcf,0x0a,0x40,0xf4] + vst1.64 {d16, d17}, [r0] + +@ CHECK: vst2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x40,0xf4] + vst2.8 {d16, d17}, [r0, :64] +@ CHECK: vst2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x40,0xf4] + vst2.16 {d16, d17}, [r0, :128] +@ CHECK: vst2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x40,0xf4] + vst2.32 {d16, d17}, [r0] +@ CHECK: vst2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x40,0xf4] + vst2.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vst2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x40,0xf4] + vst2.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vst2.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x03,0x40,0xf4] + vst2.32 {d16, d17, d18, d19}, [r0, :256] + +@ CHECK: vst3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x40,0xf4] + vst3.8 {d16, d17, d18}, [r0, :64] +@ CHECK: vst3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x40,0xf4] + vst3.16 {d16, d17, d18}, [r0] +@ CHECK: vst3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x40,0xf4] + vst3.32 {d16, d17, d18}, [r0] +@ CHECK: vst3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x40,0xf4] + vst3.8 {d16, d18, d20}, [r0, :64]! +@ CHECK: vst3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x40,0xf4] + vst3.8 {d17, d19, d21}, [r0, :64]! +@ CHECK: vst3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x40,0xf4] + vst3.16 {d16, d18, d20}, [r0]! +@ CHECK: vst3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x40,0xf4] + vst3.16 {d17, d19, d21}, [r0]! +@ CHECK: vst3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x40,0xf4] + vst3.32 {d16, d18, d20}, [r0]! +@ CHECK: vst3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x40,0xf4] + vst3.32 {d17, d19, d21}, [r0]! + +@ CHECK: vst4.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x00,0x40,0xf4] + vst4.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vst4.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x00,0x40,0xf4] + vst4.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vst4.8 {d16, d18, d20, d22}, [r0, :256]! @ encoding: [0x3d,0x01,0x40,0xf4] + vst4.8 {d16, d18, d20, d22}, [r0, :256]! +@ CHECK: vst4.8 {d17, d19, d21, d23}, [r0, :256]! @ encoding: [0x3d,0x11,0x40,0xf4] + vst4.8 {d17, d19, d21, d23}, [r0, :256]! +@ CHECK: vst4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x40,0xf4] + vst4.16 {d16, d18, d20, d22}, [r0]! +@ CHECK: vst4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x40,0xf4] + vst4.16 {d17, d19, d21, d23}, [r0]! +@ CHECK: vst4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x40,0xf4] + vst4.32 {d16, d18, d20, d22}, [r0]! +@ CHECK: vst4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x40,0xf4] + vst4.32 {d17, d19, d21, d23}, [r0]! + +@ CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xc0,0xf4] + vst2.8 {d16[1], d17[1]}, [r0, :16] +@ CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xc0,0xf4] + vst2.16 {d16[1], d17[1]}, [r0, :32] +@ CHECK: vst2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xc0,0xf4] + vst2.32 {d16[1], d17[1]}, [r0] +@ CHECK: vst2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xc0,0xf4] + vst2.16 {d17[1], d19[1]}, [r0] +@ CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xc0,0xf4] + vst2.32 {d17[0], d19[0]}, [r0, :64] + +@ CHECK: vst3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xc0,0xf4] + vst3.8 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.16 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x4f,0x06,0xc0,0xf4] + vst3.16 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.32 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x8f,0x0a,0xc0,0xf4] + vst3.32 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.16 {d17[2], d19[2], d21[2]}, [r0] @ encoding: [0xaf,0x16,0xc0,0xf4] + vst3.16 {d17[2], d19[2], d21[2]}, [r0] +@ CHECK: vst3.32 {d16[0], d18[0], d20[0]}, [r0] @ encoding: [0x4f,0x0a,0xc0,0xf4] + vst3.32 {d16[0], d18[0], d20[0]}, [r0] + +@ CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xc0,0xf4] + vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] +@ CHECK: vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xc0,0xf4] + vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +@ CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xc0,0xf4] + vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] +@ CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] @ encoding: [0xff,0x17,0xc0,0xf4] + vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] +@ CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xc0,0xf4] + vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] diff --git a/test/MC/ARM/neont2-abs-encoding.s b/test/MC/ARM/neont2-abs-encoding.s new file mode 100644 index 0000000..dd36133 --- /dev/null +++ b/test/MC/ARM/neont2-abs-encoding.s @@ -0,0 +1,33 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vabs.s8 d16, d16 @ encoding: [0x20,0x03,0xf1,0xff] + vabs.s8 d16, d16 +@ CHECK: vabs.s16 d16, d16 @ encoding: [0x20,0x03,0xf5,0xff] + vabs.s16 d16, d16 +@ CHECK: vabs.s32 d16, d16 @ encoding: [0x20,0x03,0xf9,0xff] + vabs.s32 d16, d16 +@ CHECK: vabs.f32 d16, d16 @ encoding: [0x20,0x07,0xf9,0xff] + vabs.f32 d16, d16 +@ CHECK: vabs.s8 q8, q8 @ encoding: [0x60,0x03,0xf1,0xff] + vabs.s8 q8, q8 +@ CHECK: vabs.s16 q8, q8 @ encoding: [0x60,0x03,0xf5,0xff] + vabs.s16 q8, q8 +@ CHECK: vabs.s32 q8, q8 @ encoding: [0x60,0x03,0xf9,0xff] + vabs.s32 q8, q8 +@ CHECK: vabs.f32 q8, q8 @ encoding: [0x60,0x07,0xf9,0xff] + vabs.f32 q8, q8 + +@ CHECK: vqabs.s8 d16, d16 @ encoding: [0x20,0x07,0xf0,0xff] + vqabs.s8 d16, d16 +@ CHECK: vqabs.s16 d16, d16 @ encoding: [0x20,0x07,0xf4,0xff] + vqabs.s16 d16, d16 +@ CHECK: vqabs.s32 d16, d16 @ encoding: [0x20,0x07,0xf8,0xff] + vqabs.s32 d16, d16 +@ CHECK: vqabs.s8 q8, q8 @ encoding: [0x60,0x07,0xf0,0xff] + vqabs.s8 q8, q8 +@ CHECK: vqabs.s16 q8, q8 @ encoding: [0x60,0x07,0xf4,0xff] + vqabs.s16 q8, q8 +@ CHECK: vqabs.s32 q8, q8 @ encoding: [0x60,0x07,0xf8,0xff] + vqabs.s32 q8, q8 diff --git a/test/MC/ARM/neont2-absdiff-encoding.s b/test/MC/ARM/neont2-absdiff-encoding.s new file mode 100644 index 0000000..be8e798 --- /dev/null +++ b/test/MC/ARM/neont2-absdiff-encoding.s @@ -0,0 +1,86 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * +@ NOTE: This currently fails because the ASM parser doesn't parse vabal. + +.code 16 + +@ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xef] + vabd.s8 d16, d16, d17 +@ CHECK: vabd.s16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xef] + vabd.s16 d16, d16, d17 +@ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xef] + vabd.s32 d16, d16, d17 +@ CHECK: vabd.u8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xff] + vabd.u8 d16, d16, d17 +@ CHECK: vabd.u16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xff] + vabd.u16 d16, d16, d17 + @ CHECK: vabd.u32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xff] + vabd.u32 d16, d16, d17 +@ CHECK: vabd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xff] + vabd.f32 d16, d16, d17 +@ CHECK: vabd.s8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xef] + vabd.s8 q8, q8, q9 +@ CHECK: vabd.s16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xef] + vabd.s16 q8, q8, q9 +@ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xef] + vabd.s32 q8, q8, q9 +@ CHECK: vabd.u8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xff] + vabd.u8 q8, q8, q9 +@ CHECK: vabd.u16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xff] + vabd.u16 q8, q8, q9 +@ CHECK: vabd.u32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xff] + vabd.u32 q8, q8, q9 +@ CHECK: vabd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x60,0xff] + vabd.f32 q8, q8, q9 + +@ CHECK: vabdl.s8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xef] + vabdl.s8 q8, d16, d17 +@ CHECK: vabdl.s16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xef] + vabdl.s16 q8, d16, d17 +@ CHECK: vabdl.s32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xef] + vabdl.s32 q8, d16, d17 +@ CHECK: vabdl.u8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xff] + vabdl.u8 q8, d16, d17 +@ CHECK: vabdl.u16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xff] + vabdl.u16 q8, d16, d17 +@ CHECK: vabdl.u32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xff] + vabdl.u32 q8, d16, d17 + +@ CHECK: vaba.s8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xef] + vaba.s8 d16, d18, d17 +@ CHECK: vaba.s16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xef] + vaba.s16 d16, d18, d17 +@ CHECK: vaba.s32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xef] + vaba.s32 d16, d18, d17 +@ CHECK: vaba.u8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xff] + vaba.u8 d16, d18, d17 +@ CHECK: vaba.u16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xff] + vaba.u16 d16, d18, d17 +@ CHECK: vaba.u32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xff] + vaba.u32 d16, d18, d17 +@ CHECK: vaba.s8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xef] + vaba.s8 q9, q8, q10 +@ CHECK: vaba.s16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xef] + vaba.s16 q9, q8, q10 +@ CHECK: vaba.s32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xef] + vaba.s32 q9, q8, q10 +@ CHECK: vaba.u8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xff] + vaba.u8 q9, q8, q10 +@ CHECK: vaba.u16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xff] + vaba.u16 q9, q8, q10 +@ CHECK: vaba.u32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xff] + vaba.u32 q9, q8, q10 + +@ CHECK: vabal.s8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xef] + vabal.s8 q8, d19, d18 +@ CHECK: vabal.s16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xef] + vabal.s16 q8, d19, d18 +@ CHECK: vabal.s32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xef] + vabal.s32 q8, d19, d18 +@ CHECK: vabal.u8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xff] + vabal.u8 q8, d19, d18 +@ CHECK: vabal.u16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xff] + vabal.u16 q8, d19, d18 +@ CHECK: vabal.u32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xff] + vabal.u32 q8, d19, d18 + diff --git a/test/MC/ARM/neont2-add-encoding.s b/test/MC/ARM/neont2-add-encoding.s new file mode 100644 index 0000000..f7c32a7 --- /dev/null +++ b/test/MC/ARM/neont2-add-encoding.s @@ -0,0 +1,138 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vadd.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xef] + vadd.i8 d16, d17, d16 +@ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xef] + vadd.i16 d16, d17, d16 +@ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xef] + vadd.i64 d16, d17, d16 +@ CHECK: vadd.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xef] + vadd.i32 d16, d17, d16 +@ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xef] + vadd.f32 d16, d16, d17 +@ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x40,0xef] + vadd.f32 q8, q8, q9 + +@ CHECK: vaddl.s8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xef] + vaddl.s8 q8, d17, d16 +@ CHECK: vaddl.s16 q8, d17, d16 @ encoding: [0xa0,0x00,0xd1,0xef] + vaddl.s16 q8, d17, d16 +@ CHECK: vaddl.s32 q8, d17, d16 @ encoding: [0xa0,0x00,0xe1,0xef] + vaddl.s32 q8, d17, d16 +@ CHECK: vaddl.u8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xff] + vaddl.u8 q8, d17, d16 +@ CHECK: vaddl.u16 q8, d17, d16 @ encoding: [0xa0,0x00,0xd1,0xff] + vaddl.u16 q8, d17, d16 +@ CHECK: vaddl.u32 q8, d17, d16 @ encoding: [0xa0,0x00,0xe1,0xff] + vaddl.u32 q8, d17, d16 + +@ CHECK: vaddw.s8 q8, q8, d18 @ encoding: [0xa2,0x01,0xc0,0xef] + vaddw.s8 q8, q8, d18 +@ CHECK: vaddw.s16 q8, q8, d18 @ encoding: [0xa2,0x01,0xd0,0xef] + vaddw.s16 q8, q8, d18 +@ CHECK: vaddw.s32 q8, q8, d18 @ encoding: [0xa2,0x01,0xe0,0xef] + vaddw.s32 q8, q8, d18 +@ CHECK: vaddw.u8 q8, q8, d18 @ encoding: [0xa2,0x01,0xc0,0xff] + vaddw.u8 q8, q8, d18 +@ CHECK: vaddw.u16 q8, q8, d18 @ encoding: [0xa2,0x01,0xd0,0xff] + vaddw.u16 q8, q8, d18 +@ CHECK: vaddw.u32 q8, q8, d18 @ encoding: [0xa2,0x01,0xe0,0xff] + vaddw.u32 q8, q8, d18 + +@ CHECK: vhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x00,0x40,0xef] + vhadd.s8 d16, d16, d17 +@ CHECK: vhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x00,0x50,0xef] + vhadd.s16 d16, d16, d17 +@ CHECK: vhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x00,0x60,0xef] + vhadd.s32 d16, d16, d17 +@ CHECK: vhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x00,0x40,0xff] + vhadd.u8 d16, d16, d17 +@ CHECK: vhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x00,0x50,0xff] + vhadd.u16 d16, d16, d17 +@ CHECK: vhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x00,0x60,0xff] + vhadd.u32 d16, d16, d17 +@ CHECK: vhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x00,0x40,0xef] + vhadd.s8 q8, q8, q9 +@ CHECK: vhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x00,0x50,0xef] + vhadd.s16 q8, q8, q9 +@ CHECK: vhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x00,0x60,0xef] + vhadd.s32 q8, q8, q9 + @ CHECK: vhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x00,0x40,0xff] + vhadd.u8 q8, q8, q9 +@ CHECK: vhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x00,0x50,0xff] + vhadd.u16 q8, q8, q9 +@ CHECK: vhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x00,0x60,0xff] + vhadd.u32 q8, q8, q9 + +@ CHECK: vrhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xef] + vrhadd.s8 d16, d16, d17 +@ CHECK: vrhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xef] + vrhadd.s16 d16, d16, d17 +@ CHECK: vrhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xef] + vrhadd.s32 d16, d16, d17 +@ CHECK: vrhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xff] + vrhadd.u8 d16, d16, d17 +@ CHECK: vrhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xff] + vrhadd.u16 d16, d16, d17 +@ CHECK: vrhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xff] + vrhadd.u32 d16, d16, d17 +@ CHECK: vrhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xef] + vrhadd.s8 q8, q8, q9 +@ CHECK: vrhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xef] + vrhadd.s16 q8, q8, q9 +@ CHECK: vrhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xef] + vrhadd.s32 q8, q8, q9 +@ CHECK: vrhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xff] + vrhadd.u8 q8, q8, q9 +@ CHECK: vrhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xff] + vrhadd.u16 q8, q8, q9 +@ CHECK: vrhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xff] + vrhadd.u32 q8, q8, q9 + +@ CHECK: vqadd.s8 d16, d16, d17 @ encoding: [0xb1,0x00,0x40,0xef] + vqadd.s8 d16, d16, d17 +@ CHECK: vqadd.s16 d16, d16, d17 @ encoding: [0xb1,0x00,0x50,0xef] + vqadd.s16 d16, d16, d17 +@ CHECK: vqadd.s32 d16, d16, d17 @ encoding: [0xb1,0x00,0x60,0xef] + vqadd.s32 d16, d16, d17 +@ CHECK: vqadd.s64 d16, d16, d17 @ encoding: [0xb1,0x00,0x70,0xef] + vqadd.s64 d16, d16, d17 +@ CHECK: vqadd.u8 d16, d16, d17 @ encoding: [0xb1,0x00,0x40,0xff] + vqadd.u8 d16, d16, d17 +@ CHECK: vqadd.u16 d16, d16, d17 @ encoding: [0xb1,0x00,0x50,0xff] + vqadd.u16 d16, d16, d17 +@ CHECK: vqadd.u32 d16, d16, d17 @ encoding: [0xb1,0x00,0x60,0xff] + vqadd.u32 d16, d16, d17 +@ CHECK: vqadd.u64 d16, d16, d17 @ encoding: [0xb1,0x00,0x70,0xff] + vqadd.u64 d16, d16, d17 +@ CHECK: vqadd.s8 q8, q8, q9 @ encoding: [0xf2,0x00,0x40,0xef] + vqadd.s8 q8, q8, q9 +@ CHECK: vqadd.s16 q8, q8, q9 @ encoding: [0xf2,0x00,0x50,0xef] + vqadd.s16 q8, q8, q9 +@ CHECK: vqadd.s32 q8, q8, q9 @ encoding: [0xf2,0x00,0x60,0xef] + vqadd.s32 q8, q8, q9 +@ CHECK: vqadd.s64 q8, q8, q9 @ encoding: [0xf2,0x00,0x70,0xef] + vqadd.s64 q8, q8, q9 +@ CHECK: vqadd.u8 q8, q8, q9 @ encoding: [0xf2,0x00,0x40,0xff] + vqadd.u8 q8, q8, q9 +@ CHECK: vqadd.u16 q8, q8, q9 @ encoding: [0xf2,0x00,0x50,0xff] + vqadd.u16 q8, q8, q9 +@ CHECK: vqadd.u32 q8, q8, q9 @ encoding: [0xf2,0x00,0x60,0xff] + vqadd.u32 q8, q8, q9 +@ CHECK: vqadd.u64 q8, q8, q9 @ encoding: [0xf2,0x00,0x70,0xff] + vqadd.u64 q8, q8, q9 + +@ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xef] + vaddhn.i16 d16, q8, q9 +@ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xef] + vaddhn.i32 d16, q8, q9 +@ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xef] + vaddhn.i64 d16, q8, q9 +@ CHECK: vraddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xff] + vraddhn.i16 d16, q8, q9 +@ CHECK: vraddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xff] + vraddhn.i32 d16, q8, q9 +@ CHECK: vraddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xff] + vraddhn.i64 d16, q8, q9 diff --git a/test/MC/ARM/neont2-bitcount-encoding.s b/test/MC/ARM/neont2-bitcount-encoding.s new file mode 100644 index 0000000..cebd972 --- /dev/null +++ b/test/MC/ARM/neont2-bitcount-encoding.s @@ -0,0 +1,34 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xff] + vcnt.8 d16, d16 +@ CHECK: vcnt.8 q8, q8 @ encoding: [0x60,0x05,0xf0,0xff] + vcnt.8 q8, q8 +@ CHECK: vclz.i8 d16, d16 @ encoding: [0xa0,0x04,0xf0,0xff] + vclz.i8 d16, d16 +@ CHECK: vclz.i16 d16, d16 @ encoding: [0xa0,0x04,0xf4,0xff] + vclz.i16 d16, d16 +@ CHECK: vclz.i32 d16, d16 @ encoding: [0xa0,0x04,0xf8,0xff] + vclz.i32 d16, d16 +@ CHECK: vclz.i8 q8, q8 @ encoding: [0xe0,0x04,0xf0,0xff] + vclz.i8 q8, q8 +@ CHECK: vclz.i16 q8, q8 @ encoding: [0xe0,0x04,0xf4,0xff] + vclz.i16 q8, q8 +@ CHECK: vclz.i32 q8, q8 @ encoding: [0xe0,0x04,0xf8,0xff] + vclz.i32 q8, q8 +@ CHECK: vcls.s8 d16, d16 @ encoding: [0x20,0x04,0xf0,0xff] + vcls.s8 d16, d16 +@ CHECK: vcls.s16 d16, d16 @ encoding: [0x20,0x04,0xf4,0xff] + vcls.s16 d16, d16 +@ CHECK: vcls.s32 d16, d16 @ encoding: [0x20,0x04,0xf8,0xff] + vcls.s32 d16, d16 +@ CHECK: vcls.s8 q8, q8 @ encoding: [0x60,0x04,0xf0,0xff] + vcls.s8 q8, q8 +@ CHECK: vcls.s16 q8, q8 @ encoding: [0x60,0x04,0xf4,0xff] + vcls.s16 q8, q8 +@ CHECK: vcls.s32 q8, q8 @ encoding: [0x60,0x04,0xf8,0xff] + vcls.s32 q8, q8 + diff --git a/test/MC/ARM/neont2-bitwise-encoding.s b/test/MC/ARM/neont2-bitwise-encoding.s new file mode 100644 index 0000000..f5062f8 --- /dev/null +++ b/test/MC/ARM/neont2-bitwise-encoding.s @@ -0,0 +1,49 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vand d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xef] + vand d16, d17, d16 +@ CHECK: vand q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xef] + vand q8, q8, q9 + +@ CHECK: veor d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xff] + veor d16, d17, d16 +@ CHECK: veor q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xff] + veor q8, q8, q9 + +@ CHECK: vorr d16, d17, d16 @ encoding: [0xb0,0x01,0x61,0xef] + vorr d16, d17, d16 +@ CHECK: vorr q8, q8, q9 @ encoding: [0xf2,0x01,0x60,0xef] + vorr q8, q8, q9 +@ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xef] + vorr.i32 d16, #0x1000000 +@ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xef] + vorr.i32 q8, #0x1000000 +@ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xef] + vorr.i32 q8, #0x0 + +@ CHECK: vbic d16, d17, d16 @ encoding: [0xb0,0x01,0x51,0xef] + vbic d16, d17, d16 +@ CHECK: vbic q8, q8, q9 @ encoding: [0xf2,0x01,0x50,0xef] + vbic q8, q8, q9 +@ CHECK: vbic.i32 d16, #0xFF000000 @ encoding: [0x3f,0x07,0xc7,0xff] + vbic.i32 d16, #0xFF000000 +@ CHECK: vbic.i32 q8, #0xFF000000 @ encoding: [0x7f,0x07,0xc7,0xff] + vbic.i32 q8, #0xFF000000 + +@ CHECK: vorn d16, d17, d16 @ encoding: [0xb0,0x01,0x71,0xef] + vorn d16, d17, d16 +@ CHECK: vorn q8, q8, q9 @ encoding: [0xf2,0x01,0x70,0xef] + vorn q8, q8, q9 + +@ CHECK: vmvn d16, d16 @ encoding: [0xa0,0x05,0xf0,0xff] + vmvn d16, d16 +@ CHECK: vmvn q8, q8 @ encoding: [0xe0,0x05,0xf0,0xff] + vmvn q8, q8 + +@ CHECK: vbsl d18, d17, d16 @ encoding: [0xb0,0x21,0x51,0xff] + vbsl d18, d17, d16 +@ CHECK: vbsl q8, q10, q9 @ encoding: [0xf2,0x01,0x54,0xff] + vbsl q8, q10, q9 diff --git a/test/MC/ARM/neont2-cmp-encoding.s b/test/MC/ARM/neont2-cmp-encoding.s new file mode 100644 index 0000000..9b00960 --- /dev/null +++ b/test/MC/ARM/neont2-cmp-encoding.s @@ -0,0 +1,36 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xff] + vcvt.s32.f32 d16, d16 +@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xff] + vcvt.u32.f32 d16, d16 +@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xff] + vcvt.f32.s32 d16, d16 +@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xff] + vcvt.f32.u32 d16, d16 +@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xff] + vcvt.s32.f32 q8, q8 +@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xe0,0x07,0xfb,0xff] + vcvt.u32.f32 q8, q8 +@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xff] + vcvt.f32.s32 q8, q8 +@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xe0,0x06,0xfb,0xff] + vcvt.f32.u32 q8, q8 +@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xef] + vcvt.s32.f32 d16, d16, #1 +@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xff] + vcvt.u32.f32 d16, d16, #1 +@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xef] + vcvt.f32.s32 d16, d16, #1 +@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xff] + vcvt.f32.u32 d16, d16, #1 +@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xef] + vcvt.s32.f32 q8, q8, #1 +@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xff] + vcvt.u32.f32 q8, q8, #1 +@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xef] + vcvt.f32.s32 q8, q8, #1 +@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xff] + vcvt.f32.u32 q8, q8, #1 diff --git a/test/MC/ARM/neont2-convert-encoding.s b/test/MC/ARM/neont2-convert-encoding.s new file mode 100644 index 0000000..9b00960 --- /dev/null +++ b/test/MC/ARM/neont2-convert-encoding.s @@ -0,0 +1,36 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xff] + vcvt.s32.f32 d16, d16 +@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xff] + vcvt.u32.f32 d16, d16 +@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xff] + vcvt.f32.s32 d16, d16 +@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xff] + vcvt.f32.u32 d16, d16 +@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xff] + vcvt.s32.f32 q8, q8 +@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xe0,0x07,0xfb,0xff] + vcvt.u32.f32 q8, q8 +@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xff] + vcvt.f32.s32 q8, q8 +@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xe0,0x06,0xfb,0xff] + vcvt.f32.u32 q8, q8 +@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xef] + vcvt.s32.f32 d16, d16, #1 +@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xff] + vcvt.u32.f32 d16, d16, #1 +@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xef] + vcvt.f32.s32 d16, d16, #1 +@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xff] + vcvt.f32.u32 d16, d16, #1 +@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xef] + vcvt.s32.f32 q8, q8, #1 +@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xff] + vcvt.u32.f32 q8, q8, #1 +@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xef] + vcvt.f32.s32 q8, q8, #1 +@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xff] + vcvt.f32.u32 q8, q8, #1 diff --git a/test/MC/ARM/neont2-dup-encoding.s b/test/MC/ARM/neont2-dup-encoding.s new file mode 100644 index 0000000..5330833 --- /dev/null +++ b/test/MC/ARM/neont2-dup-encoding.s @@ -0,0 +1,29 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee] + vdup.8 d16, r0 +@ CHECK: vdup.16 d16, r0 @ encoding: [0xb0,0x0b,0x80,0xee] + vdup.16 d16, r0 +@ CHECK: vdup.32 d16, r0 @ encoding: [0x90,0x0b,0x80,0xee] + vdup.32 d16, r0 +@ CHECK: vdup.8 q8, r0 @ encoding: [0x90,0x0b,0xe0,0xee] + vdup.8 q8, r0 +@ CHECK: vdup.16 q8, r0 @ encoding: [0xb0,0x0b,0xa0,0xee] + vdup.16 q8, r0 +@ CHECK: vdup.32 q8, r0 @ encoding: [0x90,0x0b,0xa0,0xee] + vdup.32 q8, r0 +@ CHECK: vdup.8 d16, d16[1] @ encoding: [0x20,0x0c,0xf3,0xff] + vdup.8 d16, d16[1] +@ CHECK: vdup.16 d16, d16[1] @ encoding: [0x20,0x0c,0xf6,0xff] + vdup.16 d16, d16[1] +@ CHECK: vdup.32 d16, d16[1] @ encoding: [0x20,0x0c,0xfc,0xff] + vdup.32 d16, d16[1] +@ CHECK: vdup.8 q8, d16[1] @ encoding: [0x60,0x0c,0xf3,0xff] + vdup.8 q8, d16[1] +@ CHECK: vdup.16 q8, d16[1] @ encoding: [0x60,0x0c,0xf6,0xff] + vdup.16 q8, d16[1] +@ CHECK: vdup.32 q8, d16[1] @ encoding: [0x60,0x0c,0xfc,0xff] + vdup.32 q8, d16[1] diff --git a/test/MC/ARM/neont2-minmax-encoding.s b/test/MC/ARM/neont2-minmax-encoding.s new file mode 100644 index 0000000..802b87c --- /dev/null +++ b/test/MC/ARM/neont2-minmax-encoding.s @@ -0,0 +1,60 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xef] + vmin.s8 d16, d16, d17 +@ CHECK: vmin.s16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xef] + vmin.s16 d16, d16, d17 +@ CHECK: vmin.s32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xef] + vmin.s32 d16, d16, d17 +@ CHECK: vmin.u8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xff] + vmin.u8 d16, d16, d17 +@ CHECK: vmin.u16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xff] + vmin.u16 d16, d16, d17 +@ CHECK: vmin.u32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xff] + vmin.u32 d16, d16, d17 +@ CHECK: vmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xef] + vmin.f32 d16, d16, d17 +@ CHECK: vmin.s8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xef] + vmin.s8 q8, q8, q9 +@ CHECK: vmin.s16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xef] + vmin.s16 q8, q8, q9 +@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xef] + vmin.s32 q8, q8, q9 +@ CHECK: vmin.u8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xff] + vmin.u8 q8, q8, q9 +@ CHECK: vmin.u16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xff] + vmin.u16 q8, q8, q9 +@ CHECK: vmin.u32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xff] + vmin.u32 q8, q8, q9 +@ CHECK: vmin.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x60,0xef] + vmin.f32 q8, q8, q9 +@ CHECK: vmax.s8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xef] + vmax.s8 d16, d16, d17 +@ CHECK: vmax.s16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xef] + vmax.s16 d16, d16, d17 +@ CHECK: vmax.s32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xef] + vmax.s32 d16, d16, d17 +@ CHECK: vmax.u8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xff] + vmax.u8 d16, d16, d17 +@ CHECK: vmax.u16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xff] + vmax.u16 d16, d16, d17 +@ CHECK: vmax.u32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xff] + vmax.u32 d16, d16, d17 +@ CHECK: vmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xef] + vmax.f32 d16, d16, d17 +@ CHECK: vmax.s8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xef] + vmax.s8 q8, q8, q9 +@ CHECK: vmax.s16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xef] + vmax.s16 q8, q8, q9 +@ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xef] + vmax.s32 q8, q8, q9 +@ CHECK: vmax.u8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xff] + vmax.u8 q8, q8, q9 +@ CHECK: vmax.u16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xff] + vmax.u16 q8, q8, q9 +@ CHECK: vmax.u32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xff] + vmax.u32 q8, q8, q9 +@ CHECK: vmax.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x40,0xef] + vmax.f32 q8, q8, q9 diff --git a/test/MC/ARM/neont2-mov-encoding.s b/test/MC/ARM/neont2-mov-encoding.s new file mode 100644 index 0000000..4f6b687 --- /dev/null +++ b/test/MC/ARM/neont2-mov-encoding.s @@ -0,0 +1,119 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xef] + vmov.i8 d16, #0x8 +@ CHECK: vmov.i16 d16, #0x10 @ encoding: [0x10,0x08,0xc1,0xef] + vmov.i16 d16, #0x10 +@ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0x10,0x0a,0xc1,0xef] + vmov.i16 d16, #0x1000 +@ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xef] + vmov.i32 d16, #0x20 +@ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xef] + vmov.i32 d16, #0x2000 +@ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xef] + vmov.i32 d16, #0x200000 +@ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xef] + vmov.i32 d16, #0x20000000 +@ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xef] + vmov.i32 d16, #0x20FF +@ CHECK: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xef] + vmov.i32 d16, #0x20FFFF +@ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xff] + vmov.i64 d16, #0xFF0000FF0000FFFF +@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0x58,0x0e,0xc0,0xef] + vmov.i8 q8, #0x8 +@ CHECK: vmov.i16 q8, #0x10 @ encoding: [0x50,0x08,0xc1,0xef] + vmov.i16 q8, #0x10 +@ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0x50,0x0a,0xc1,0xef] + vmov.i16 q8, #0x1000 +@ CHECK: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xef] + vmov.i32 q8, #0x20 +@ CHECK: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xef] + vmov.i32 q8, #0x2000 +@ CHECK: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xef] + vmov.i32 q8, #0x200000 +@ CHECK: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xef] + vmov.i32 q8, #0x20000000 +@ CHECK: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xef] + vmov.i32 q8, #0x20FF +@ CHECK: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xef] + vmov.i32 q8, #0x20FFFF +@ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xff] + vmov.i64 q8, #0xFF0000FF0000FFFF +@ CHECK: vmvn.i16 d16, #0x10 @ encoding: [0x30,0x08,0xc1,0xef] + vmvn.i16 d16, #0x10 +@ CHECK: vmvn.i16 d16, #0x1000 @ encoding: [0x30,0x0a,0xc1,0xef] + vmvn.i16 d16, #0x1000 +@ CHECK: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xef] + vmvn.i32 d16, #0x20 +@ CHECK: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xef] + vmvn.i32 d16, #0x2000 +@ CHECK: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xef] + vmvn.i32 d16, #0x200000 +@ CHECK: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xef] + vmvn.i32 d16, #0x20000000 +@ CHECK: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xef] + vmvn.i32 d16, #0x20FF +@ CHECK: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xef] + vmvn.i32 d16, #0x20FFFF +@ CHECK: vmovl.s8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xef] + vmovl.s8 q8, d16 +@ CHECK: vmovl.s16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xef] + vmovl.s16 q8, d16 +@ CHECK: vmovl.s32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xef] + vmovl.s32 q8, d16 +@ CHECK: vmovl.u8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xff] + vmovl.u8 q8, d16 +@ CHECK: vmovl.u16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xff] + vmovl.u16 q8, d16 +@ CHECK: vmovl.u32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xff] + vmovl.u32 q8, d16 +@ CHECK: vmovn.i16 d16, q8 @ encoding: [0x20,0x02,0xf2,0xff] + vmovn.i16 d16, q8 +@ CHECK: vmovn.i32 d16, q8 @ encoding: [0x20,0x02,0xf6,0xff] + vmovn.i32 d16, q8 +@ CHECK: vmovn.i64 d16, q8 @ encoding: [0x20,0x02,0xfa,0xff] + vmovn.i64 d16, q8 +@ CHECK: vqmovn.s16 d16, q8 @ encoding: [0xa0,0x02,0xf2,0xff] + vqmovn.s16 d16, q8 +@ CHECK: vqmovn.s32 d16, q8 @ encoding: [0xa0,0x02,0xf6,0xff] + vqmovn.s32 d16, q8 +@ CHECK: vqmovn.s64 d16, q8 @ encoding: [0xa0,0x02,0xfa,0xff] + vqmovn.s64 d16, q8 +@ CHECK: vqmovn.u16 d16, q8 @ encoding: [0xe0,0x02,0xf2,0xff] + vqmovn.u16 d16, q8 +@ CHECK: vqmovn.u32 d16, q8 @ encoding: [0xe0,0x02,0xf6,0xff] + vqmovn.u32 d16, q8 +@ CHECK: vqmovn.u64 d16, q8 @ encoding: [0xe0,0x02,0xfa,0xff] + vqmovn.u64 d16, q8 +@ CHECK: vqmovun.s16 d16, q8 @ encoding: [0x60,0x02,0xf2,0xff] + vqmovun.s16 d16, q8 +@ CHECK: vqmovun.s32 d16, q8 @ encoding: [0x60,0x02,0xf6,0xff] + vqmovun.s32 d16, q8 +@ CHECK: vqmovun.s64 d16, q8 @ encoding: [0x60,0x02,0xfa,0xff] + vqmovun.s64 d16, q8 +@ CHECK: vmov.s8 r0, d16[1] @ encoding: [0xb0,0x0b,0x50,0xee] + vmov.s8 r0, d16[1] +@ CHECK: vmov.s16 r0, d16[1] @ encoding: [0xf0,0x0b,0x10,0xee] + vmov.s16 r0, d16[1] +@ CHECK: vmov.u8 r0, d16[1] @ encoding: [0xb0,0x0b,0xd0,0xee] + vmov.u8 r0, d16[1] +@ CHECK: vmov.u16 r0, d16[1] @ encoding: [0xf0,0x0b,0x90,0xee] + vmov.u16 r0, d16[1] +@ CHECK: vmov.32 r0, d16[1] @ encoding: [0x90,0x0b,0x30,0xee] + vmov.32 r0, d16[1] +@ CHECK: vmov.8 d16[1], r1 @ encoding: [0xb0,0x1b,0x40,0xee] + vmov.8 d16[1], r1 +@ CHECK: vmov.16 d16[1], r1 @ encoding: [0xf0,0x1b,0x00,0xee] + vmov.16 d16[1], r1 +@ CHECK: vmov.32 d16[1], r1 @ encoding: [0x90,0x1b,0x20,0xee] + vmov.32 d16[1], r1 +@ CHECK: vmov.8 d18[1], r1 @ encoding: [0xb0,0x1b,0x42,0xee] + vmov.8 d18[1], r1 +@ CHECK: vmov.16 d18[1], r1 @ encoding: [0xf0,0x1b,0x02,0xee] + vmov.16 d18[1], r1 +@ CHECK: vmov.32 d18[1], r1 @ encoding: [0x90,0x1b,0x22,0xee] + vmov.32 d18[1], r1 diff --git a/test/MC/ARM/neont2-mul-accum-encoding.s b/test/MC/ARM/neont2-mul-accum-encoding.s new file mode 100644 index 0000000..66d4e10 --- /dev/null +++ b/test/MC/ARM/neont2-mul-accum-encoding.s @@ -0,0 +1,69 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vmla.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xef] + vmla.i8 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xef] + vmla.i16 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xef] + vmla.i32 d16, d18, d17 +@ CHECK: vmla.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x42,0xef] + vmla.f32 d16, d18, d17 +@ CHECK: vmla.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xef] + vmla.i8 q9, q8, q10 +@ CHECK: vmla.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xef] + vmla.i16 q9, q8, q10 +@ CHECK: vmla.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xef] + vmla.i32 q9, q8, q10 +@ CHECK: vmla.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x40,0xef] + vmla.f32 q9, q8, q10 +@ CHECK: vmlal.s8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xef] + vmlal.s8 q8, d19, d18 +@ CHECK: vmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xef] + vmlal.s16 q8, d19, d18 +@ CHECK: vmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xef] + vmlal.s32 q8, d19, d18 +@ CHECK: vmlal.u8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xff] + vmlal.u8 q8, d19, d18 +@ CHECK: vmlal.u16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xff] + vmlal.u16 q8, d19, d18 +@ CHECK: vmlal.u32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xff] + vmlal.u32 q8, d19, d18 +@ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xef] + vqdmlal.s16 q8, d19, d18 +@ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xef] + vqdmlal.s32 q8, d19, d18 +@ CHECK: vmls.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xff] + vmls.i8 d16, d18, d17 +@ CHECK: vmls.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xff] + vmls.i16 d16, d18, d17 +@ CHECK: vmls.i32 d16, d18, d17 @ encoding: [0xa1,0x09,0x62,0xff] + vmls.i32 d16, d18, d17 +@ CHECK: vmls.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x62,0xef] + vmls.f32 d16, d18, d17 +@ CHECK: vmls.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xff] + vmls.i8 q9, q8, q10 +@ CHECK: vmls.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xff] + vmls.i16 q9, q8, q10 +@ CHECK: vmls.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xff] + vmls.i32 q9, q8, q10 +@ CHECK: vmls.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x60,0xef] + vmls.f32 q9, q8, q10 +@ CHECK: vmlsl.s8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xef] + vmlsl.s8 q8, d19, d18 +@ CHECK: vmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xef] + vmlsl.s16 q8, d19, d18 +@ CHECK: vmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xef] + vmlsl.s32 q8, d19, d18 +@ CHECK: vmlsl.u8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xff] + vmlsl.u8 q8, d19, d18 +@ CHECK: vmlsl.u16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xff] + vmlsl.u16 q8, d19, d18 +@ CHECK: vmlsl.u32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xff] + vmlsl.u32 q8, d19, d18 +@ CHECK: vqdmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0b,0xd3,0xef] + vqdmlsl.s16 q8, d19, d18 +@ CHECK: vqdmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0b,0xe3,0xef] + vqdmlsl.s32 q8, d19, d18 diff --git a/test/MC/ARM/neont2-mul-encoding.s b/test/MC/ARM/neont2-mul-encoding.s new file mode 100644 index 0000000..4e33beb --- /dev/null +++ b/test/MC/ARM/neont2-mul-encoding.s @@ -0,0 +1,58 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xef] + vmul.i8 d16, d16, d17 +@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xef] + vmul.i16 d16, d16, d17 +@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0xb1,0x09,0x60,0xef] + vmul.i32 d16, d16, d17 +@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0xb1,0x0d,0x40,0xff] + vmul.f32 d16, d16, d17 +@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xef] + vmul.i8 q8, q8, q9 +@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0xf2,0x09,0x50,0xef] + vmul.i16 q8, q8, q9 +@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0xf2,0x09,0x60,0xef] + vmul.i32 q8, q8, q9 +@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0xf2,0x0d,0x40,0xff] + vmul.f32 q8, q8, q9 +@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xff] + vmul.p8 d16, d16, d17 +@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xff] + vmul.p8 q8, q8, q9 +@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xef] + vqdmulh.s16 d16, d16, d17 +@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xef] + vqdmulh.s32 d16, d16, d17 +@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xef] + vqdmulh.s16 q8, q8, q9 +@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xef] + vqdmulh.s32 q8, q8, q9 +@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xff] + vqrdmulh.s16 d16, d16, d17 +@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xff] + vqrdmulh.s32 d16, d16, d17 +@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xff] + vqrdmulh.s16 q8, q8, q9 +@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xff] + vqrdmulh.s32 q8, q8, q9 +@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xef] + vmull.s8 q8, d16, d17 +@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xef] + vmull.s16 q8, d16, d17 +@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xef] + vmull.s32 q8, d16, d17 +@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xff] + vmull.u8 q8, d16, d17 +@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xff] + vmull.u16 q8, d16, d17 +@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xff] + vmull.u32 q8, d16, d17 +@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xa1,0x0e,0xc0,0xef] + vmull.p8 q8, d16, d17 +@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0d,0xd0,0xef] + vqdmull.s16 q8, d16, d17 +@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0d,0xe0,0xef] + vqdmull.s32 q8, d16, d17 diff --git a/test/MC/ARM/neont2-neg-encoding.s b/test/MC/ARM/neont2-neg-encoding.s new file mode 100644 index 0000000..fa35fb1 --- /dev/null +++ b/test/MC/ARM/neont2-neg-encoding.s @@ -0,0 +1,32 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vneg.s8 d16, d16 @ encoding: [0xa0,0x03,0xf1,0xff] + vneg.s8 d16, d16 +@ CHECK: vneg.s16 d16, d16 @ encoding: [0xa0,0x03,0xf5,0xff] + vneg.s16 d16, d16 +@ CHECK: vneg.s32 d16, d16 @ encoding: [0xa0,0x03,0xf9,0xff] + vneg.s32 d16, d16 +@ CHECK: vneg.f32 d16, d16 @ encoding: [0xa0,0x07,0xf9,0xff] + vneg.f32 d16, d16 +@ CHECK: vneg.s8 q8, q8 @ encoding: [0xe0,0x03,0xf1,0xff] + vneg.s8 q8, q8 +@ CHECK: vneg.s16 q8, q8 @ encoding: [0xe0,0x03,0xf5,0xff] + vneg.s16 q8, q8 +@ CHECK: vneg.s32 q8, q8 @ encoding: [0xe0,0x03,0xf9,0xff] + vneg.s32 q8, q8 +@ CHECK: vneg.f32 q8, q8 @ encoding: [0xe0,0x07,0xf9,0xff] + vneg.f32 q8, q8 +@ CHECK: vqneg.s8 d16, d16 @ encoding: [0xa0,0x07,0xf0,0xff] + vqneg.s8 d16, d16 +@ CHECK: vqneg.s16 d16, d16 @ encoding: [0xa0,0x07,0xf4,0xff] + vqneg.s16 d16, d16 +@ CHECK: vqneg.s32 d16, d16 @ encoding: [0xa0,0x07,0xf8,0xff] + vqneg.s32 d16, d16 +@ CHECK: vqneg.s8 q8, q8 @ encoding: [0xe0,0x07,0xf0,0xff] + vqneg.s8 q8, q8 +@ CHECK: vqneg.s16 q8, q8 @ encoding: [0xe0,0x07,0xf4,0xff] + vqneg.s16 q8, q8 +@ CHECK: vqneg.s32 q8, q8 @ encoding: [0xe0,0x07,0xf8,0xff] + vqneg.s32 q8, q8 diff --git a/test/MC/ARM/neont2-pairwise-encoding.s b/test/MC/ARM/neont2-pairwise-encoding.s new file mode 100644 index 0000000..058f1d8 --- /dev/null +++ b/test/MC/ARM/neont2-pairwise-encoding.s @@ -0,0 +1,89 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xef] + vpadd.i8 d16, d17, d16 +@ CHECK: vpadd.i16 d16, d17, d16 @ encoding: [0xb0,0x0b,0x51,0xef] + vpadd.i16 d16, d17, d16 +@ CHECK: vpadd.i32 d16, d17, d16 @ encoding: [0xb0,0x0b,0x61,0xef] + vpadd.i32 d16, d17, d16 +@ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xff] + vpadd.f32 d16, d16, d17 +@ CHECK: vpaddl.s8 d16, d16 @ encoding: [0x20,0x02,0xf0,0xff] + vpaddl.s8 d16, d16 +@ CHECK: vpaddl.s16 d16, d16 @ encoding: [0x20,0x02,0xf4,0xff] + vpaddl.s16 d16, d16 +@ CHECK: vpaddl.s32 d16, d16 @ encoding: [0x20,0x02,0xf8,0xff] + vpaddl.s32 d16, d16 +@ CHECK: vpaddl.u8 d16, d16 @ encoding: [0xa0,0x02,0xf0,0xff] + vpaddl.u8 d16, d16 +@ CHECK: vpaddl.u16 d16, d16 @ encoding: [0xa0,0x02,0xf4,0xff] + vpaddl.u16 d16, d16 +@ CHECK: vpaddl.u32 d16, d16 @ encoding: [0xa0,0x02,0xf8,0xff] + vpaddl.u32 d16, d16 +@ CHECK: vpaddl.s8 q8, q8 @ encoding: [0x60,0x02,0xf0,0xff] + vpaddl.s8 q8, q8 +@ CHECK: vpaddl.s16 q8, q8 @ encoding: [0x60,0x02,0xf4,0xff] + vpaddl.s16 q8, q8 +@ CHECK: vpaddl.s32 q8, q8 @ encoding: [0x60,0x02,0xf8,0xff] + vpaddl.s32 q8, q8 +@ CHECK: vpaddl.u8 q8, q8 @ encoding: [0xe0,0x02,0xf0,0xff] + vpaddl.u8 q8, q8 +@ CHECK: vpaddl.u16 q8, q8 @ encoding: [0xe0,0x02,0xf4,0xff] + vpaddl.u16 q8, q8 +@ CHECK: vpaddl.u32 q8, q8 @ encoding: [0xe0,0x02,0xf8,0xff] + vpaddl.u32 q8, q8 +@ CHECK: vpadal.s8 d16, d17 @ encoding: [0x21,0x06,0xf0,0xff] + vpadal.s8 d16, d17 +@ CHECK: vpadal.s16 d16, d17 @ encoding: [0x21,0x06,0xf4,0xff] + vpadal.s16 d16, d17 +@ CHECK: vpadal.s32 d16, d17 @ encoding: [0x21,0x06,0xf8,0xff] + vpadal.s32 d16, d17 +@ CHECK: vpadal.u8 d16, d17 @ encoding: [0xa1,0x06,0xf0,0xff] + vpadal.u8 d16, d17 +@ CHECK: vpadal.u16 d16, d17 @ encoding: [0xa1,0x06,0xf4,0xff] + vpadal.u16 d16, d17 +@ CHECK: vpadal.u32 d16, d17 @ encoding: [0xa1,0x06,0xf8,0xff] + vpadal.u32 d16, d17 +@ CHECK: vpadal.s8 q9, q8 @ encoding: [0x60,0x26,0xf0,0xff] + vpadal.s8 q9, q8 +@ CHECK: vpadal.s16 q9, q8 @ encoding: [0x60,0x26,0xf4,0xff] + vpadal.s16 q9, q8 +@ CHECK: vpadal.s32 q9, q8 @ encoding: [0x60,0x26,0xf8,0xff] + vpadal.s32 q9, q8 +@ CHECK: vpadal.u8 q9, q8 @ encoding: [0xe0,0x26,0xf0,0xff] + vpadal.u8 q9, q8 +@ CHECK: vpadal.u16 q9, q8 @ encoding: [0xe0,0x26,0xf4,0xff] + vpadal.u16 q9, q8 +@ CHECK: vpadal.u32 q9, q8 @ encoding: [0xe0,0x26,0xf8,0xff] + vpadal.u32 q9, q8 +@ CHECK: vpmin.s8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xef] + vpmin.s8 d16, d16, d17 +@ CHECK: vpmin.s16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xef] + vpmin.s16 d16, d16, d17 +@ CHECK: vpmin.s32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xef] + vpmin.s32 d16, d16, d17 +@ CHECK: vpmin.u8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xff] + vpmin.u8 d16, d16, d17 +@ CHECK: vpmin.u16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xff] + vpmin.u16 d16, d16, d17 +@ CHECK: vpmin.u32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xff] + vpmin.u32 d16, d16, d17 +@ CHECK: vpmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xff] + vpmin.f32 d16, d16, d17 +@ CHECK: vpmax.s8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xef] + vpmax.s8 d16, d16, d17 +@ CHECK: vpmax.s16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xef] + vpmax.s16 d16, d16, d17 +@ CHECK: vpmax.s32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xef] + vpmax.s32 d16, d16, d17 +@ CHECK: vpmax.u8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xff] + vpmax.u8 d16, d16, d17 +@ CHECK: vpmax.u16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xff] + vpmax.u16 d16, d16, d17 +@ CHECK: vpmax.u32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xff] + vpmax.u32 d16, d16, d17 +@ CHECK: vpmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xff] + vpmax.f32 d16, d16, d17 diff --git a/test/MC/ARM/neont2-reciprocal-encoding.s b/test/MC/ARM/neont2-reciprocal-encoding.s new file mode 100644 index 0000000..918333b --- /dev/null +++ b/test/MC/ARM/neont2-reciprocal-encoding.s @@ -0,0 +1,28 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xff] + vrecpe.u32 d16, d16 +@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0x60,0x04,0xfb,0xff] + vrecpe.u32 q8, q8 +@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0x20,0x05,0xfb,0xff] + vrecpe.f32 d16, d16 +@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0x60,0x05,0xfb,0xff] + vrecpe.f32 q8, q8 +@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x40,0xef] + vrecps.f32 d16, d16, d17 +@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x40,0xef] + vrecps.f32 q8, q8, q9 +@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xa0,0x04,0xfb,0xff] + vrsqrte.u32 d16, d16 +@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xe0,0x04,0xfb,0xff] + vrsqrte.u32 q8, q8 +@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xa0,0x05,0xfb,0xff] + vrsqrte.f32 d16, d16 +@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xe0,0x05,0xfb,0xff] + vrsqrte.f32 q8, q8 +@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x60,0xef] + vrsqrts.f32 d16, d16, d17 +@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x60,0xef] + vrsqrts.f32 q8, q8, q9 diff --git a/test/MC/ARM/neont2-reverse-encoding.s b/test/MC/ARM/neont2-reverse-encoding.s new file mode 100644 index 0000000..4155492 --- /dev/null +++ b/test/MC/ARM/neont2-reverse-encoding.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vrev64.8 d16, d16 @ encoding: [0x20,0x00,0xf0,0xff] + vrev64.8 d16, d16 +@ CHECK: vrev64.16 d16, d16 @ encoding: [0x20,0x00,0xf4,0xff] + vrev64.16 d16, d16 +@ CHECK: vrev64.32 d16, d16 @ encoding: [0x20,0x00,0xf8,0xff] + vrev64.32 d16, d16 +@ CHECK: vrev64.8 q8, q8 @ encoding: [0x60,0x00,0xf0,0xff] + vrev64.8 q8, q8 +@ CHECK: vrev64.16 q8, q8 @ encoding: [0x60,0x00,0xf4,0xff] + vrev64.16 q8, q8 +@ CHECK: vrev64.32 q8, q8 @ encoding: [0x60,0x00,0xf8,0xff] + vrev64.32 q8, q8 +@ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xff] + vrev32.8 d16, d16 +@ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xff] + vrev32.16 d16, d16 +@ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xff] + vrev32.8 q8, q8 +@ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xff] + vrev32.16 q8, q8 +@ CHECK: vrev16.8 d16, d16 @ encoding: [0x20,0x01,0xf0,0xff] + vrev16.8 d16, d16 +@ CHECK: vrev16.8 q8, q8 @ encoding: [0x60,0x01,0xf0,0xff] + vrev16.8 q8, q8 diff --git a/test/MC/ARM/neont2-satshift-encoding.s b/test/MC/ARM/neont2-satshift-encoding.s new file mode 100644 index 0000000..5cf8b24 --- /dev/null +++ b/test/MC/ARM/neont2-satshift-encoding.s @@ -0,0 +1,152 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xef] + vqshl.s8 d16, d16, d17 +@ CHECK: vqshl.s16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xef] + vqshl.s16 d16, d16, d17 +@ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xef] + vqshl.s32 d16, d16, d17 +@ CHECK: vqshl.s64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xef] + vqshl.s64 d16, d16, d17 +@ CHECK: vqshl.u8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xff] + vqshl.u8 d16, d16, d17 +@ CHECK: vqshl.u16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xff] + vqshl.u16 d16, d16, d17 +@ CHECK: vqshl.u32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xff] + vqshl.u32 d16, d16, d17 +@ CHECK: vqshl.u64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xff] + vqshl.u64 d16, d16, d17 +@ CHECK: vqshl.s8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xef] + vqshl.s8 q8, q8, q9 +@ CHECK: vqshl.s16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xef] + vqshl.s16 q8, q8, q9 +@ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xef] + vqshl.s32 q8, q8, q9 +@ CHECK: vqshl.s64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xef] + vqshl.s64 q8, q8, q9 +@ CHECK: vqshl.u8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xff] + vqshl.u8 q8, q8, q9 +@ CHECK: vqshl.u16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xff] + vqshl.u16 q8, q8, q9 +@ CHECK: vqshl.u32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xff] + vqshl.u32 q8, q8, q9 +@ CHECK: vqshl.u64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xff] + vqshl.u64 q8, q8, q9 +@ CHECK: vqshl.s8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xef] + vqshl.s8 d16, d16, #7 +@ CHECK: vqshl.s16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xef] + vqshl.s16 d16, d16, #15 +@ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xef] + vqshl.s32 d16, d16, #31 +@ CHECK: vqshl.s64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xef] + vqshl.s64 d16, d16, #63 +@ CHECK: vqshl.u8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xff] + vqshl.u8 d16, d16, #7 +@ CHECK: vqshl.u16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xff] + vqshl.u16 d16, d16, #15 +@ CHECK: vqshl.u32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xff] + vqshl.u32 d16, d16, #31 +@ CHECK: vqshl.u64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xff] + vqshl.u64 d16, d16, #63 +@ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0x30,0x06,0xcf,0xff] + vqshlu.s8 d16, d16, #7 +@ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0x30,0x06,0xdf,0xff] + vqshlu.s16 d16, d16, #15 +@ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xff] + vqshlu.s32 d16, d16, #31 +@ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xb0,0x06,0xff,0xff] + vqshlu.s64 d16, d16, #63 +@ CHECK: vqshl.s8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xef] + vqshl.s8 q8, q8, #7 +@ CHECK: vqshl.s16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xef] + vqshl.s16 q8, q8, #15 +@ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xef] + vqshl.s32 q8, q8, #31 +@ CHECK: vqshl.s64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xef] + vqshl.s64 q8, q8, #63 +@ CHECK: vqshl.u8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xff] + vqshl.u8 q8, q8, #7 +@ CHECK: vqshl.u16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xff] + vqshl.u16 q8, q8, #15 +@ CHECK: vqshl.u32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xff] + vqshl.u32 q8, q8, #31 +@ CHECK: vqshl.u64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xff] + vqshl.u64 q8, q8, #63 +@ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0x70,0x06,0xcf,0xff] + vqshlu.s8 q8, q8, #7 +@ CHECK: vqshlu.s16 q8, q8, #15 @ encoding: [0x70,0x06,0xdf,0xff] + vqshlu.s16 q8, q8, #15 +@ CHECK: vqshlu.s32 q8, q8, #31 @ encoding: [0x70,0x06,0xff,0xff] + vqshlu.s32 q8, q8, #31 +@ CHECK: vqshlu.s64 q8, q8, #63 @ encoding: [0xf0,0x06,0xff,0xff] + vqshlu.s64 q8, q8, #63 +@ CHECK: vqrshl.s8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xef] + vqrshl.s8 d16, d16, d17 +@ CHECK: vqrshl.s16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xef] + vqrshl.s16 d16, d16, d17 +@ CHECK: vqrshl.s32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xef] + vqrshl.s32 d16, d16, d17 +@ CHECK: vqrshl.s64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xef] + vqrshl.s64 d16, d16, d17 +@ CHECK: vqrshl.u8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xff] + vqrshl.u8 d16, d16, d17 +@ CHECK: vqrshl.u16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xff] + vqrshl.u16 d16, d16, d17 +@ CHECK: vqrshl.u32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xff] + vqrshl.u32 d16, d16, d17 +@ CHECK: vqrshl.u64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xff] + vqrshl.u64 d16, d16, d17 +@ CHECK: vqrshl.s8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xef] + vqrshl.s8 q8, q8, q9 +@ CHECK: vqrshl.s16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xef] + vqrshl.s16 q8, q8, q9 +@ CHECK: vqrshl.s32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xef] + vqrshl.s32 q8, q8, q9 +@ CHECK: vqrshl.s64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xef] + vqrshl.s64 q8, q8, q9 +@ CHECK: vqrshl.u8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xff] + vqrshl.u8 q8, q8, q9 +@ CHECK: vqrshl.u16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xff] + vqrshl.u16 q8, q8, q9 +@ CHECK: vqrshl.u32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xff] + vqrshl.u32 q8, q8, q9 +@ CHECK: vqrshl.u64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xff] + vqrshl.u64 q8, q8, q9 +@ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xef] + vqshrn.s16 d16, q8, #8 +@ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xef] + vqshrn.s32 d16, q8, #16 +@ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xef] + vqshrn.s64 d16, q8, #32 +@ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xff] + vqshrn.u16 d16, q8, #8 +@ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xff] + vqshrn.u32 d16, q8, #16 +@ CHECK: vqshrn.u64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xff] + vqshrn.u64 d16, q8, #32 +@ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xff] + vqshrun.s16 d16, q8, #8 +@ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xff] + vqshrun.s32 d16, q8, #16 +@ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xff] + vqshrun.s64 d16, q8, #32 +@ CHECK: vqrshrn.s16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xef] + vqrshrn.s16 d16, q8, #8 +@ CHECK: vqrshrn.s32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xef] + vqrshrn.s32 d16, q8, #16 +@ CHECK: vqrshrn.s64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xef] + vqrshrn.s64 d16, q8, #32 +@ CHECK: vqrshrn.u16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xff] + vqrshrn.u16 d16, q8, #8 +@ CHECK: vqrshrn.u32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xff] + vqrshrn.u32 d16, q8, #16 +@ CHECK: vqrshrn.u64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xff] + vqrshrn.u64 d16, q8, #32 +@ CHECK: vqrshrun.s16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xff] + vqrshrun.s16 d16, q8, #8 +@ CHECK: vqrshrun.s32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xff] + vqrshrun.s32 d16, q8, #16 +@ CHECK: vqrshrun.s64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xff] + vqrshrun.s64 d16, q8, #32 diff --git a/test/MC/ARM/neont2-shift-encoding.s b/test/MC/ARM/neont2-shift-encoding.s new file mode 100644 index 0000000..c96ce08 --- /dev/null +++ b/test/MC/ARM/neont2-shift-encoding.s @@ -0,0 +1,162 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0xa1,0x04,0x40,0xff] + vshl.u8 d16, d17, d16 +@ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0xa1,0x04,0x50,0xff] + vshl.u16 d16, d17, d16 +@ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0xa1,0x04,0x60,0xff] + vshl.u32 d16, d17, d16 +@ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0xa1,0x04,0x70,0xff] + vshl.u64 d16, d17, d16 +@ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xef] + vshl.i8 d16, d16, #7 +@ CHECK: vshl.i16 d16, d16, #15 @ encoding: [0x30,0x05,0xdf,0xef] + vshl.i16 d16, d16, #15 +@ CHECK: vshl.i32 d16, d16, #31 @ encoding: [0x30,0x05,0xff,0xef] + vshl.i32 d16, d16, #31 +@ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xb0,0x05,0xff,0xef] + vshl.i64 d16, d16, #63 +@ CHECK: vshl.u8 q8, q9, q8 @ encoding: [0xe2,0x04,0x40,0xff] + vshl.u8 q8, q9, q8 +@ CHECK: vshl.u16 q8, q9, q8 @ encoding: [0xe2,0x04,0x50,0xff] + vshl.u16 q8, q9, q8 +@ CHECK: vshl.u32 q8, q9, q8 @ encoding: [0xe2,0x04,0x60,0xff] + vshl.u32 q8, q9, q8 +@ CHECK: vshl.u64 q8, q9, q8 @ encoding: [0xe2,0x04,0x70,0xff] + vshl.u64 q8, q9, q8 +@ CHECK: vshl.i8 q8, q8, #7 @ encoding: [0x70,0x05,0xcf,0xef] + vshl.i8 q8, q8, #7 +@ CHECK: vshl.i16 q8, q8, #15 @ encoding: [0x70,0x05,0xdf,0xef] + vshl.i16 q8, q8, #15 +@ CHECK: vshl.i32 q8, q8, #31 @ encoding: [0x70,0x05,0xff,0xef] + vshl.i32 q8, q8, #31 +@ CHECK: vshl.i64 q8, q8, #63 @ encoding: [0xf0,0x05,0xff,0xef] + vshl.i64 q8, q8, #63 +@ CHECK: vshr.u8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xff] + vshr.u8 d16, d16, #8 +@ CHECK: vshr.u16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xff] + vshr.u16 d16, d16, #16 +@ CHECK: vshr.u32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xff] + vshr.u32 d16, d16, #32 +@ CHECK: vshr.u64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xff] + vshr.u64 d16, d16, #64 +@ CHECK: vshr.u8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xff] + vshr.u8 q8, q8, #8 +@ CHECK: vshr.u16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xff] + vshr.u16 q8, q8, #16 +@ CHECK: vshr.u32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xff] + vshr.u32 q8, q8, #32 +@ CHECK: vshr.u64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xff] + vshr.u64 q8, q8, #64 +@ CHECK: vshr.s8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xef] + vshr.s8 d16, d16, #8 +@ CHECK: vshr.s16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xef] + vshr.s16 d16, d16, #16 +@ CHECK: vshr.s32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xef] + vshr.s32 d16, d16, #32 +@ CHECK: vshr.s64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xef] + vshr.s64 d16, d16, #64 +@ CHECK: vshr.s8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xef] + vshr.s8 q8, q8, #8 +@ CHECK: vshr.s16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xef] + vshr.s16 q8, q8, #16 +@ CHECK: vshr.s32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xef] + vshr.s32 q8, q8, #32 +@ CHECK: vshr.s64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xef] + vshr.s64 q8, q8, #64 +@ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xef] + vshll.s8 q8, d16, #7 +@ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xef] + vshll.s16 q8, d16, #15 +@ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xef] + vshll.s32 q8, d16, #31 +@ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xff] + vshll.u8 q8, d16, #7 +@ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xff] + vshll.u16 q8, d16, #15 +@ CHECK: vshll.u32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xff] + vshll.u32 q8, d16, #31 +@ CHECK: vshll.i8 q8, d16, #8 @ encoding: [0x20,0x03,0xf2,0xff] + vshll.i8 q8, d16, #8 +@ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0x20,0x03,0xf6,0xff] + vshll.i16 q8, d16, #16 +@ CHECK: vshll.i32 q8, d16, #32 @ encoding: [0x20,0x03,0xfa,0xff] + vshll.i32 q8, d16, #32 +@ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xef] + vshrn.i16 d16, q8, #8 +@ CHECK: vshrn.i32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xef] + vshrn.i32 d16, q8, #16 +@ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xef] + vshrn.i64 d16, q8, #32 +@ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xef] + vrshl.s8 d16, d17, d16 +@ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xef] + vrshl.s16 d16, d17, d16 +@ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xef] + vrshl.s32 d16, d17, d16 +@ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0 + vrshl.s64 d16, d17, d16 +@ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xff] + vrshl.u8 d16, d17, d16 +@ CHECK: vrshl.u16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xff] + vrshl.u16 d16, d17, d16 +@ CHECK: vrshl.u32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xff] + vrshl.u32 d16, d17, d16 +@ CHECK: vrshl.u64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xff] + vrshl.u64 d16, d17, d16 +@ CHECK: vrshl.s8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xef] + vrshl.s8 q8, q9, q8 +@ CHECK: vrshl.s16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xef] + vrshl.s16 q8, q9, q8 +@ CHECK: vrshl.s32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xef] + vrshl.s32 q8, q9, q8 +@ CHECK: vrshl.s64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xef] + vrshl.s64 q8, q9, q8 +@ CHECK: vrshl.u8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xff] + vrshl.u8 q8, q9, q8 +@ CHECK: vrshl.u16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xff] + vrshl.u16 q8, q9, q8 +@ CHECK: vrshl.u32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xff] + vrshl.u32 q8, q9, q8 +@ CHECK: vrshl.u64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xff] + vrshl.u64 q8, q9, q8 +@ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xef] + vrshr.s8 d16, d16, #8 +@ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xef] + vrshr.s16 d16, d16, #16 +@ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xef] + vrshr.s32 d16, d16, #32 +@ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xef] + vrshr.s64 d16, d16, #64 +@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xff] + vrshr.u8 d16, d16, #8 +@ CHECK: vrshr.u16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xff] + vrshr.u16 d16, d16, #16 +@ CHECK: vrshr.u32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xff] + vrshr.u32 d16, d16, #32 +@ CHECK: vrshr.u64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xff] + vrshr.u64 d16, d16, #64 +@ CHECK: vrshr.s8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xef] + vrshr.s8 q8, q8, #8 +@ CHECK: vrshr.s16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xef] + vrshr.s16 q8, q8, #16 +@ CHECK: vrshr.s32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xef] + vrshr.s32 q8, q8, #32 +@ CHECK: vrshr.s64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xef] + vrshr.s64 q8, q8, #64 +@ CHECK: vrshr.u8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xff] + vrshr.u8 q8, q8, #8 +@ CHECK: vrshr.u16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xff] + vrshr.u16 q8, q8, #16 +@ CHECK: vrshr.u32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xff] + vrshr.u32 q8, q8, #32 +@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xff] + vrshr.u64 q8, q8, #64 +@ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xef] + vrshrn.i16 d16, q8, #8 +@ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xef] + vrshrn.i32 d16, q8, #16 +@ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xef] + vrshrn.i64 d16, q8, #32 diff --git a/test/MC/ARM/neont2-shiftaccum-encoding.s b/test/MC/ARM/neont2-shiftaccum-encoding.s new file mode 100644 index 0000000..15b263a --- /dev/null +++ b/test/MC/ARM/neont2-shiftaccum-encoding.s @@ -0,0 +1,100 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xef] + vsra.s8 d17, d16, #8 +@ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xef] + vsra.s16 d17, d16, #16 +@ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xef] + vsra.s32 d17, d16, #32 +@ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xef] + vsra.s64 d17, d16, #64 +@ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xef] + vsra.s8 q8, q9, #8 +@ CHECK: vsra.s16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xef] + vsra.s16 q8, q9, #16 +@ CHECK: vsra.s32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xef] + vsra.s32 q8, q9, #32 +@ CHECK: vsra.s64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xef] + vsra.s64 q8, q9, #64 +@ CHECK: vsra.u8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xff] + vsra.u8 d17, d16, #8 +@ CHECK: vsra.u16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xff] + vsra.u16 d17, d16, #16 +@ CHECK: vsra.u32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xff] + vsra.u32 d17, d16, #32 +@ CHECK: vsra.u64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xff] + vsra.u64 d17, d16, #64 +@ CHECK: vsra.u8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xff] + vsra.u8 q8, q9, #8 +@ CHECK: vsra.u16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xff] + vsra.u16 q8, q9, #16 +@ CHECK: vsra.u32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xff] + vsra.u32 q8, q9, #32 +@ CHECK: vsra.u64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xff] + vsra.u64 q8, q9, #64 +@ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xef] + vrsra.s8 d17, d16, #8 +@ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xef] + vrsra.s16 d17, d16, #16 +@ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xef] + vrsra.s32 d17, d16, #32 +@ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xef] + vrsra.s64 d17, d16, #64 +@ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xff] + vrsra.u8 d17, d16, #8 +@ CHECK: vrsra.u16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xff] + vrsra.u16 d17, d16, #16 +@ CHECK: vrsra.u32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xff] + vrsra.u32 d17, d16, #32 +@ CHECK: vrsra.u64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xff] + vrsra.u64 d17, d16, #64 +@ CHECK: vrsra.s8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xef] + vrsra.s8 q8, q9, #8 +@ CHECK: vrsra.s16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xef] + vrsra.s16 q8, q9, #16 +@ CHECK: vrsra.s32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xef] + vrsra.s32 q8, q9, #32 +@ CHECK: vrsra.s64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xef] + vrsra.s64 q8, q9, #64 +@ CHECK: vrsra.u8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xff] + vrsra.u8 q8, q9, #8 +@ CHECK: vrsra.u16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xff] + vrsra.u16 q8, q9, #16 +@ CHECK: vrsra.u32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xff] + vrsra.u32 q8, q9, #32 +@ CHECK: vrsra.u64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xff] + vrsra.u64 q8, q9, #64 +@ CHECK: vsli.8 d17, d16, #7 @ encoding: [0x30,0x15,0xcf,0xff] + vsli.8 d17, d16, #7 +@ CHECK: vsli.16 d17, d16, #15 @ encoding: [0x30,0x15,0xdf,0xff] + vsli.16 d17, d16, #15 +@ CHECK: vsli.32 d17, d16, #31 @ encoding: [0x30,0x15,0xff,0xff] + vsli.32 d17, d16, #31 +@ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xb0,0x15,0xff,0xff] + vsli.64 d17, d16, #63 +@ CHECK: vsli.8 q9, q8, #7 @ encoding: [0x70,0x25,0xcf,0xff] + vsli.8 q9, q8, #7 +@ CHECK: vsli.16 q9, q8, #15 @ encoding: [0x70,0x25,0xdf,0xff] + vsli.16 q9, q8, #15 +@ CHECK: vsli.32 q9, q8, #31 @ encoding: [0x70,0x25,0xff,0xff] + vsli.32 q9, q8, #31 +@ CHECK: vsli.64 q9, q8, #63 @ encoding: [0xf0,0x25,0xff,0xff] + vsli.64 q9, q8, #63 +@ CHECK: vsri.8 d17, d16, #8 @ encoding: [0x30,0x14,0xc8,0xff] + vsri.8 d17, d16, #8 +@ CHECK: vsri.16 d17, d16, #16 @ encoding: [0x30,0x14,0xd0,0xff] + vsri.16 d17, d16, #16 +@ CHECK: vsri.32 d17, d16, #32 @ encoding: [0x30,0x14,0xe0,0xff] + vsri.32 d17, d16, #32 +@ CHECK: vsri.64 d17, d16, #64 @ encoding: [0xb0,0x14,0xc0,0xff] + vsri.64 d17, d16, #64 +@ CHECK: vsri.8 q9, q8, #8 @ encoding: [0x70,0x24,0xc8,0xff] + vsri.8 q9, q8, #8 +@ CHECK: vsri.16 q9, q8, #16 @ encoding: [0x70,0x24,0xd0,0xff] + vsri.16 q9, q8, #16 +@ CHECK: vsri.32 q9, q8, #32 @ encoding: [0x70,0x24,0xe0,0xff] + vsri.32 q9, q8, #32 +@ CHECK: vsri.64 q9, q8, #64 @ encoding: [0xf0,0x24,0xc0,0xff] + vsri.64 q9, q8, #64 diff --git a/test/MC/ARM/neont2-shuffle-encoding.s b/test/MC/ARM/neont2-shuffle-encoding.s new file mode 100644 index 0000000..5a2e52f --- /dev/null +++ b/test/MC/ARM/neont2-shuffle-encoding.s @@ -0,0 +1,48 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xa0,0x03,0xf1,0xef] + vext.8 d16, d17, d16, #3 +@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xa0,0x05,0xf1,0xef] + vext.8 d16, d17, d16, #5 +@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xe0,0x03,0xf2,0xef] + vext.8 q8, q9, q8, #3 +@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xe0,0x07,0xf2,0xef] + vext.8 q8, q9, q8, #7 +@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xa0,0x06,0xf1,0xef] + vext.16 d16, d17, d16, #3 +@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xe0,0x0c,0xf2,0xef] + vext.32 q8, q9, q8, #3 +@ CHECK: vtrn.8 d17, d16 @ encoding: [0xa0,0x10,0xf2,0xff] + vtrn.8 d17, d16 +@ CHECK: vtrn.16 d17, d16 @ encoding: [0xa0,0x10,0xf6,0xff] + vtrn.16 d17, d16 +@ CHECK: vtrn.32 d17, d16 @ encoding: [0xa0,0x10,0xfa,0xff] + vtrn.32 d17, d16 +@ CHECK: vtrn.8 q9, q8 @ encoding: [0xe0,0x20,0xf2,0xff] + vtrn.8 q9, q8 +@ CHECK: vtrn.16 q9, q8 @ encoding: [0xe0,0x20,0xf6,0xff] + vtrn.16 q9, q8 +@ CHECK: vtrn.32 q9, q8 @ encoding: [0xe0,0x20,0xfa,0xff] + vtrn.32 q9, q8 +@ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xff] + vuzp.8 d17, d16 +@ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xff] + vuzp.16 d17, d16 +@ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xff] + vuzp.8 q9, q8 +@ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xff] + vuzp.16 q9, q8 +@ CHECK: vuzp.32 q9, q8 @ encoding: [0x60,0x21,0xfa,0xff] + vuzp.32 q9, q8 +@ CHECK: vzip.8 d17, d16 @ encoding: [0xa0,0x11,0xf2,0xff] + vzip.8 d17, d16 +@ CHECK: vzip.16 d17, d16 @ encoding: [0xa0,0x11,0xf6,0xff] + vzip.16 d17, d16 +@ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xff] + vzip.8 q9, q8 +@ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xff] + vzip.16 q9, q8 +@ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xff] + vzip.32 q9, q8 diff --git a/test/MC/ARM/neont2-sub-encoding.s b/test/MC/ARM/neont2-sub-encoding.s new file mode 100644 index 0000000..928d0f3 --- /dev/null +++ b/test/MC/ARM/neont2-sub-encoding.s @@ -0,0 +1,46 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xa0,0x03,0xf1,0xef] + vext.8 d16, d17, d16, #3 +@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xa0,0x05,0xf1,0xef] + vext.8 d16, d17, d16, #5 +@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xe0,0x03,0xf2,0xef] + vext.8 q8, q9, q8, #3 +@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xe0,0x07,0xf2,0xef] + vext.8 q8, q9, q8, #7 +@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xa0,0x06,0xf1,0xef] + vext.16 d16, d17, d16, #3 +@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xe0,0x0c,0xf2,0xef] + vext.32 q8, q9, q8, #3 +@ CHECK: vtrn.8 d17, d16 @ encoding: [0xa0,0x10,0xf2,0xff] + vtrn.8 d17, d16 +@ CHECK: vtrn.16 d17, d16 @ encoding: [0xa0,0x10,0xf6,0xff] + vtrn.16 d17, d16 +@ CHECK: vtrn.32 d17, d16 @ encoding: [0xa0,0x10,0xfa,0xff] + vtrn.32 d17, d16 +@ CHECK: vtrn.8 q9, q8 @ encoding: [0xe0,0x20,0xf2,0xff] + vtrn.8 q9, q8 +@ CHECK: vtrn.16 q9, q8 @ encoding: [0xe0,0x20,0xf6,0xff] + vtrn.16 q9, q8 +@ CHECK: vtrn.32 q9, q8 @ encoding: [0xe0,0x20,0xfa,0xff] + vtrn.32 q9, q8 +@ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xff] + vuzp.8 d17, d16 +@ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xff] + vuzp.16 d17, d16 +@ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xff] + vuzp.8 q9, q8 +@ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xff] + vuzp.16 q9, q8 +@ CHECK: vuzp.32 q9, q8 @ encoding: [0x60,0x21,0xfa,0xff] + vuzp.32 q9, q8 +@ CHECK: vzip.8 d17, d16 @ encoding: [0xa0,0x11,0xf2,0xff] + vzip.8 d17, d16 +@ CHECK: vzip.16 d17, d16 @ encoding: [0xa0,0x11,0xf6,0xff] + vzip.16 d17, d16 +@ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xff] + vzip.8 q9, q8 +@ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xff] + vzip.16 q9, q8 +@ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xff] + vzip.32 q9, q8 diff --git a/test/MC/ARM/neont2-table-encoding.s b/test/MC/ARM/neont2-table-encoding.s new file mode 100644 index 0000000..3589f2f --- /dev/null +++ b/test/MC/ARM/neont2-table-encoding.s @@ -0,0 +1,21 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vtbl.8 d16, {d17}, d16 @ encoding: [0xa0,0x08,0xf1,0xff] + vtbl.8 d16, {d17}, d16 +@ CHECK: vtbl.8 d16, {d16, d17}, d18 @ encoding: [0xa2,0x09,0xf0,0xff] + vtbl.8 d16, {d16, d17}, d18 +@ CHECK: vtbl.8 d16, {d16, d17, d18}, d20 @ encoding: [0xa4,0x0a,0xf0,0xff] + vtbl.8 d16, {d16, d17, d18}, d20 +@ CHECK: vtbl.8 d16, {d16, d17, d18, d19}, d20 @ encoding: [0xa4,0x0b,0xf0,0xff] + vtbl.8 d16, {d16, d17, d18, d19}, d20 +@ CHECK: vtbx.8 d18, {d16}, d17 @ encoding: [0xe1,0x28,0xf0,0xff] + vtbx.8 d18, {d16}, d17 +@ CHECK: vtbx.8 d19, {d16, d17}, d18 @ encoding: [0xe2,0x39,0xf0,0xff] + vtbx.8 d19, {d16, d17}, d18 +@ CHECK: vtbx.8 d20, {d16, d17, d18}, d21 @ encoding: [0xe5,0x4a,0xf0,0xff] + vtbx.8 d20, {d16, d17, d18}, d21 +@ CHECK: vtbx.8 d20, {d16, d17, d18, d19}, d21 @ encoding: [0xe5,0x4b,0xf0,0xff] + vtbx.8 d20, {d16, d17, d18, d19}, d21 diff --git a/test/MC/ARM/neont2-vld-encoding.s b/test/MC/ARM/neont2-vld-encoding.s new file mode 100644 index 0000000..031205a --- /dev/null +++ b/test/MC/ARM/neont2-vld-encoding.s @@ -0,0 +1,112 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vld1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x60,0xf9] + vld1.8 {d16}, [r0, :64] +@ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x60,0xf9] + vld1.16 {d16}, [r0] +@ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x60,0xf9] + vld1.32 {d16}, [r0] +@ CHECK: vld1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x60,0xf9] + vld1.64 {d16}, [r0] +@ CHECK: vld1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x60,0xf9] + vld1.8 {d16, d17}, [r0, :64] +@ CHECK: vld1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x60,0xf9] + vld1.16 {d16, d17}, [r0, :128] +@ CHECK: vld1.32 {d16, d17}, [r0] @ encoding: [0x8f,0x0a,0x60,0xf9] + vld1.32 {d16, d17}, [r0] +@ CHECK: vld1.64 {d16, d17}, [r0] @ encoding: [0xcf,0x0a,0x60,0xf9] + vld1.64 {d16, d17}, [r0] + +@ CHECK: vld2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x60,0xf9] + vld2.8 {d16, d17}, [r0, :64] +@ CHECK: vld2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x60,0xf9] + vld2.16 {d16, d17}, [r0, :128] +@ CHECK: vld2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x60,0xf9] + vld2.32 {d16, d17}, [r0] +@ CHECK: vld2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x60,0xf9] + vld2.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vld2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x60,0xf9] + vld2.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vld2.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x03,0x60,0xf9] + vld2.32 {d16, d17, d18, d19}, [r0, :256] + +@ CHECK: vld3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x60,0xf9] + vld3.8 {d16, d17, d18}, [r0, :64] +@ CHECK: vld3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x60,0xf9] + vld3.16 {d16, d17, d18}, [r0] +@ CHECK: vld3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x60,0xf9] + vld3.32 {d16, d17, d18}, [r0] +@ CHECK: vld3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x60,0xf9] + vld3.8 {d16, d18, d20}, [r0, :64]! +@ CHECK: vld3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x60,0xf9] + vld3.8 {d17, d19, d21}, [r0, :64]! +@ CHECK: vld3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x60,0xf9] + vld3.16 {d16, d18, d20}, [r0]! +@ CHECK: vld3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x60,0xf9] + vld3.16 {d17, d19, d21}, [r0]! +@ CHECK: vld3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x60,0xf9] + vld3.32 {d16, d18, d20}, [r0]! +@ CHECK: vld3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x60,0xf9] + vld3.32 {d17, d19, d21}, [r0]! + +@ CHECK: vld4.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x00,0x60,0xf9] + vld4.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vld4.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x00,0x60,0xf9] + vld4.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vld4.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x00,0x60,0xf9] + vld4.32 {d16, d17, d18, d19}, [r0, :256] +@ CHECK: vld4.8 {d16, d18, d20, d22}, [r0, :256]! @ encoding: [0x3d,0x01,0x60,0xf9] + vld4.8 {d16, d18, d20, d22}, [r0, :256]! +@ CHECK: vld4.8 {d17, d19, d21, d23}, [r0, :256]! @ encoding: [0x3d,0x11,0x60,0xf9] + vld4.8 {d17, d19, d21, d23}, [r0, :256]! +@ CHECK: vld4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x60,0xf9] + vld4.16 {d16, d18, d20, d22}, [r0]! +@ CHECK: vld4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x60,0xf9] + vld4.16 {d17, d19, d21, d23}, [r0]! +@ CHECK: vld4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x60,0xf9] + vld4.32 {d16, d18, d20, d22}, [r0]! +@ CHECK: vld4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x60,0xf9] + vld4.32 {d17, d19, d21, d23}, [r0]! + +@ CHECK: vld1.8 {d16[3]}, [r0] @ encoding: [0x6f,0x00,0xe0,0xf9] + vld1.8 {d16[3]}, [r0] +@ CHECK: vld1.16 {d16[2]}, [r0, :16] @ encoding: [0x9f,0x04,0xe0,0xf9] + vld1.16 {d16[2]}, [r0, :16] +@ CHECK: vld1.32 {d16[1]}, [r0, :32] @ encoding: [0xbf,0x08,0xe0,0xf9] + vld1.32 {d16[1]}, [r0, :32] + +@ CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xe0,0xf9] + vld2.8 {d16[1], d17[1]}, [r0, :16] +@ CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xe0,0xf9] + vld2.16 {d16[1], d17[1]}, [r0, :32] +@ CHECK: vld2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xe0,0xf9] + vld2.32 {d16[1], d17[1]}, [r0] +@ CHECK: vld2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xe0,0xf9] + vld2.16 {d17[1], d19[1]}, [r0] +@ CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xe0,0xf9] + vld2.32 {d17[0], d19[0]}, [r0, :64] + +@ CHECK: vld3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xe0,0xf9] + vld3.8 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x4f,0x06,0xe0,0xf9] + vld3.16 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.32 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x8f,0x0a,0xe0,0xf9] + vld3.32 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0] @ encoding: [0x6f,0x06,0xe0,0xf9] + vld3.16 {d16[1], d18[1], d20[1]}, [r0] +@ CHECK: vld3.32 {d17[1], d19[1], d21[1]}, [r0] @ encoding: [0xcf,0x1a,0xe0,0xf9] + vld3.32 {d17[1], d19[1], d21[1]}, [r0] + +@ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xe0,0xf9] + vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] +@ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xe0,0xf9] + vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +@ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xe0,0xf9] + vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] +@ CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] @ encoding: [0x7f,0x07,0xe0,0xf9] + vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] +@ CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xe0,0xf9] + vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] diff --git a/test/MC/ARM/neont2-vst-encoding.s b/test/MC/ARM/neont2-vst-encoding.s new file mode 100644 index 0000000..1722f12 --- /dev/null +++ b/test/MC/ARM/neont2-vst-encoding.s @@ -0,0 +1,103 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vst1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x40,0xf9] + vst1.8 {d16}, [r0, :64] +@ CHECK: vst1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x40,0xf9] + vst1.16 {d16}, [r0] +@ CHECK: vst1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x40,0xf9] + vst1.32 {d16}, [r0] +@ CHECK: vst1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x40,0xf9] + vst1.64 {d16}, [r0] +@ CHECK: vst1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x40,0xf9] + vst1.8 {d16, d17}, [r0, :64] +@ CHECK: vst1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x40,0xf9] + vst1.16 {d16, d17}, [r0, :128] +@ CHECK: vst1.32 {d16, d17}, [r0] @ encoding: [0x8f,0x0a,0x40,0xf9] + vst1.32 {d16, d17}, [r0] +@ CHECK: vst1.64 {d16, d17}, [r0] @ encoding: [0xcf,0x0a,0x40,0xf9] + vst1.64 {d16, d17}, [r0] + +@ CHECK: vst2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x40,0xf9] + vst2.8 {d16, d17}, [r0, :64] +@ CHECK: vst2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x40,0xf9] + vst2.16 {d16, d17}, [r0, :128] +@ CHECK: vst2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x40,0xf9] + vst2.32 {d16, d17}, [r0] +@ CHECK: vst2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x40,0xf9] + vst2.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vst2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x40,0xf9] + vst2.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vst2.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x03,0x40,0xf9] + vst2.32 {d16, d17, d18, d19}, [r0, :256] + +@ CHECK: vst3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x40,0xf9] + vst3.8 {d16, d17, d18}, [r0, :64] +@ CHECK: vst3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x40,0xf9] + vst3.16 {d16, d17, d18}, [r0] +@ CHECK: vst3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x40,0xf9] + vst3.32 {d16, d17, d18}, [r0] +@ CHECK: vst3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x40,0xf9] + vst3.8 {d16, d18, d20}, [r0, :64]! +@ CHECK: vst3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x40,0xf9] + vst3.8 {d17, d19, d21}, [r0, :64]! +@ CHECK: vst3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x40,0xf9] + vst3.16 {d16, d18, d20}, [r0]! +@ CHECK: vst3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x40,0xf9] + vst3.16 {d17, d19, d21}, [r0]! +@ CHECK: vst3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x40,0xf9] + vst3.32 {d16, d18, d20}, [r0]! +@ CHECK: vst3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x40,0xf9] + vst3.32 {d17, d19, d21}, [r0]! + +@ CHECK: vst4.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x00,0x40,0xf9] + vst4.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vst4.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x00,0x40,0xf9] + vst4.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vst4.8 {d16, d18, d20, d22}, [r0, :256]! @ encoding: [0x3d,0x01,0x40,0xf9] + vst4.8 {d16, d18, d20, d22}, [r0, :256]! +@ CHECK: vst4.8 {d17, d19, d21, d23}, [r0, :256]! @ encoding: [0x3d,0x11,0x40,0xf9] + vst4.8 {d17, d19, d21, d23}, [r0, :256]! +@ CHECK: vst4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x40,0xf9] + vst4.16 {d16, d18, d20, d22}, [r0]! +@ CHECK: vst4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x40,0xf9] + vst4.16 {d17, d19, d21, d23}, [r0]! +@ CHECK: vst4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x40,0xf9] + vst4.32 {d16, d18, d20, d22}, [r0]! +@ CHECK: vst4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x40,0xf9] + vst4.32 {d17, d19, d21, d23}, [r0]! + +@ CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xc0,0xf9] + vst2.8 {d16[1], d17[1]}, [r0, :16] +@ CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xc0,0xf9] + vst2.16 {d16[1], d17[1]}, [r0, :32] +@ CHECK: vst2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xc0,0xf9] + vst2.32 {d16[1], d17[1]}, [r0] +@ CHECK: vst2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xc0,0xf9] + vst2.16 {d17[1], d19[1]}, [r0] +@ CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xc0,0xf9] + vst2.32 {d17[0], d19[0]}, [r0, :64] + +@ CHECK: vst3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xc0,0xf9] + vst3.8 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.16 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x4f,0x06,0xc0,0xf9] + vst3.16 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.32 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x8f,0x0a,0xc0,0xf9] + vst3.32 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.16 {d17[2], d19[2], d21[2]}, [r0] @ encoding: [0xaf,0x16,0xc0,0xf9] + vst3.16 {d17[2], d19[2], d21[2]}, [r0] +@ CHECK: vst3.32 {d16[0], d18[0], d20[0]}, [r0] @ encoding: [0x4f,0x0a,0xc0,0xf9] + vst3.32 {d16[0], d18[0], d20[0]}, [r0] + +@ CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xc0,0xf9] + vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] +@ CHECK: vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xc0,0xf9] + vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +@ CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xc0,0xf9] + vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] +@ CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] @ encoding: [0xff,0x17,0xc0,0xf9] + vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] +@ CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xc0,0xf9] + vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] diff --git a/test/MC/ARM/simple-encoding.ll b/test/MC/ARM/simple-encoding.ll new file mode 100644 index 0000000..f279bda --- /dev/null +++ b/test/MC/ARM/simple-encoding.ll @@ -0,0 +1,237 @@ +;RUN: llc -mtriple=armv7-apple-darwin -show-mc-encoding < %s | FileCheck %s + + +;FIXME: Once the ARM integrated assembler is up and going, these sorts of tests +; should run on .s source files rather than using llc to generate the +; assembly. There's also a large number of instruction encodings the +; compiler never generates, so we need the integrated assembler to be +; able to test those at all. + +declare void @llvm.trap() nounwind +declare i32 @llvm.ctlz.i32(i32) + +define i32 @foo(i32 %a, i32 %b) { +; CHECK: foo +; CHECK: trap @ encoding: [0xf0,0x00,0xf0,0x07] +; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] + + tail call void @llvm.trap() + ret i32 undef +} + +define i32 @f2(i32 %a, i32 %b) { +; CHECK: f2 +; CHECK: add r0, r1, r0 @ encoding: [0x00,0x00,0x81,0xe0] +; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] + %add = add nsw i32 %b, %a + ret i32 %add +} + + +define i32 @f3(i32 %a, i32 %b) { +; CHECK: f3 +; CHECK: add r0, r0, r1, lsl #3 @ encoding: [0x81,0x01,0x80,0xe0] +; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] + %mul = shl i32 %b, 3 + %add = add nsw i32 %mul, %a + ret i32 %add +} + +define i32 @f4(i32 %a, i32 %b) { +; CHECK: f4 +; CHECK: add r0, r0, #254, 28 @ encoding: [0xfe,0x0e,0x80,0xe2] +; CHECK: @ 4064 +; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] + %add = add nsw i32 %a, 4064 + ret i32 %add +} + +define i32 @f5(i32 %a, i32 %b, i32 %c) { +; CHECK: f5 +; CHECK: cmp r0, r1 @ encoding: [0x01,0x00,0x50,0xe1] +; CHECK: mov r0, r2 @ encoding: [0x02,0x00,0xa0,0xe1] +; CHECK: movgt r0, r1 @ encoding: [0x01,0x00,0xa0,0xc1] + %cmp = icmp sgt i32 %a, %b + %retval.0 = select i1 %cmp, i32 %b, i32 %c + ret i32 %retval.0 +} + +define i64 @f6(i64 %a, i64 %b, i64 %c) { +; CHECK: f6 +; CHECK: adds r0, r2, r0 @ encoding: [0x00,0x00,0x92,0xe0] +; CHECK: adc r1, r3, r1 @ encoding: [0x01,0x10,0xa3,0xe0] + %add = add nsw i64 %b, %a + ret i64 %add +} + +define i32 @f7(i32 %a, i32 %b) { +; CHECK: f7 +; CHECK: uxtab r0, r0, r1 @ encoding: [0x71,0x00,0xe0,0xe6] + %and = and i32 %b, 255 + %add = add i32 %and, %a + ret i32 %add +} + +define i32 @f8(i32 %a) { +; CHECK: f8 +; CHECK: movt r0, #42405 @ encoding: [0xa5,0x05,0x4a,0xe3] + %and = and i32 %a, 65535 + %or = or i32 %and, -1515913216 + ret i32 %or +} + +define i32 @f9() { +; CHECK: f9 +; CHECK: movw r0, #42405 @ encoding: [0xa5,0x05,0x0a,0xe3] + ret i32 42405 +} + +define i64 @f10(i64 %a) { +; CHECK: f10 +; CHECK: asrs r1, r1, #1 @ encoding: [0xc1,0x10,0xb0,0xe1] +; CHECK: rrx r0, r0 @ encoding: [0x60,0x00,0xa0,0xe1] + %shr = ashr i64 %a, 1 + ret i64 %shr +} + +define i32 @f11([1 x i32] %A.coerce0, [1 x i32] %B.coerce0) { +; CHECK: f11 +; CHECK: ubfx r1, r1, #8, #5 @ encoding: [0x51,0x14,0xe4,0xe7] +; CHECK: sbfx r0, r0, #13, #7 @ encoding: [0xd0,0x06,0xa6,0xe7] + %tmp1 = extractvalue [1 x i32] %A.coerce0, 0 + %tmp2 = extractvalue [1 x i32] %B.coerce0, 0 + %tmp3 = shl i32 %tmp1, 12 + %bf.val.sext = ashr i32 %tmp3, 25 + %tmp4 = lshr i32 %tmp2, 8 + %bf.clear2 = and i32 %tmp4, 31 + %mul = mul nsw i32 %bf.val.sext, %bf.clear2 + ret i32 %mul +} + +define i32 @f12(i32 %a) { +; CHECK: f12: +; CHECK: bfc r0, #4, #20 @ encoding: [0x1f,0x02,0xd7,0xe7] + %tmp = and i32 %a, 4278190095 + ret i32 %tmp +} + +define i64 @f13() { +; CHECK: f13: +; CHECK: mvn r0, #0 @ encoding: [0x00,0x00,0xe0,0xe3] +; CHECK: mvn r1, #2, 2 @ encoding: [0x02,0x11,0xe0,0xe3] + ret i64 9223372036854775807 +} + +define i32 @f14(i32 %x, i32 %y) { +; CHECK: f14: +; CHECK: smmul r0, r1, r0 @ encoding: [0x11,0xf0,0x50,0xe7] + %tmp = sext i32 %x to i64 + %tmp1 = sext i32 %y to i64 + %tmp2 = mul i64 %tmp1, %tmp + %tmp3 = lshr i64 %tmp2, 32 + %tmp3.upgrd.1 = trunc i64 %tmp3 to i32 + ret i32 %tmp3.upgrd.1 +} + +define i32 @f15(i32 %x, i32 %y) { +; CHECK: f15: +; CHECK: umull r1, r0, r1, r0 @ encoding: [0x91,0x10,0x80,0xe0] + %tmp = zext i32 %x to i64 + %tmp1 = zext i32 %y to i64 + %tmp2 = mul i64 %tmp1, %tmp + %tmp3 = lshr i64 %tmp2, 32 + %tmp3.upgrd.2 = trunc i64 %tmp3 to i32 + ret i32 %tmp3.upgrd.2 +} + +define i32 @f16(i16 %x, i32 %y) { +; CHECK: f16: +; CHECK: smulbt r0, r0, r1 @ encoding: [0xc0,0x01,0x60,0xe1] + %tmp1 = add i16 %x, 2 + %tmp2 = sext i16 %tmp1 to i32 + %tmp3 = ashr i32 %y, 16 + %tmp4 = mul i32 %tmp2, %tmp3 + ret i32 %tmp4 +} + +define i32 @f17(i32 %x, i32 %y) { +; CHECK: f17: +; CHECK: smultt r0, r1, r0 @ encoding: [0xe1,0x00,0x60,0xe1] + %tmp1 = ashr i32 %x, 16 + %tmp3 = ashr i32 %y, 16 + %tmp4 = mul i32 %tmp3, %tmp1 + ret i32 %tmp4 +} + +define i32 @f18(i32 %a, i16 %x, i32 %y) { +; CHECK: f18: +; CHECK: smlabt r0, r1, r2, r0 @ encoding: [0xc1,0x02,0x00,0xe1] + %tmp = sext i16 %x to i32 + %tmp2 = ashr i32 %y, 16 + %tmp3 = mul i32 %tmp2, %tmp + %tmp5 = add i32 %tmp3, %a + ret i32 %tmp5 +} + +define i32 @f19(i32 %x) { +; CHECK: f19 +; CHECK: clz r0, r0 @ encoding: [0x10,0x0f,0x6f,0xe1] + %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x ) + ret i32 %tmp.1 +} + +define i32 @f20(i32 %X) { +; CHECK: f20 +; CHECK: rev16 r0, r0 @ encoding: [0xb0,0x0f,0xbf,0xe6] + %tmp1 = lshr i32 %X, 8 + %X15 = bitcast i32 %X to i32 + %tmp4 = shl i32 %X15, 8 + %tmp2 = and i32 %tmp1, 16711680 + %tmp5 = and i32 %tmp4, -16777216 + %tmp9 = and i32 %tmp1, 255 + %tmp13 = and i32 %tmp4, 65280 + %tmp6 = or i32 %tmp5, %tmp2 + %tmp10 = or i32 %tmp6, %tmp13 + %tmp14 = or i32 %tmp10, %tmp9 + ret i32 %tmp14 +} + +define i32 @f21(i32 %X) { +; CHECK: f21 +; CHECK: revsh r0, r0 @ encoding: [0xb0,0x0f,0xff,0xe6] + %tmp1 = lshr i32 %X, 8 + %tmp1.upgrd.1 = trunc i32 %tmp1 to i16 + %tmp3 = trunc i32 %X to i16 + %tmp2 = and i16 %tmp1.upgrd.1, 255 + %tmp4 = shl i16 %tmp3, 8 + %tmp5 = or i16 %tmp2, %tmp4 + %tmp5.upgrd.2 = sext i16 %tmp5 to i32 + ret i32 %tmp5.upgrd.2 +} + +define i32 @f22(i32 %X, i32 %Y) { +; CHECK: f22 +; CHECK: pkhtb r0, r0, r1, asr #22 @ encoding: [0x51,0x0b,0x80,0xe6] + %tmp1 = and i32 %X, -65536 + %tmp2 = lshr i32 %Y, 22 + %tmp3 = or i32 %tmp2, %tmp1 + ret i32 %tmp3 +} + +define i32 @f23(i32 %X, i32 %Y) { +; CHECK: f23 +; CHECK: pkhbt r0, r0, r1, lsl #18 @ encoding: [0x11,0x09,0x80,0xe6] + %tmp1 = and i32 %X, 65535 + %tmp2 = shl i32 %Y, 18 + %tmp3 = or i32 %tmp1, %tmp2 + ret i32 %tmp3 +} + +define void @f24(i32 %a) { +; CHECK: f24 +; CHECK: cmp r0, #1, 16 @ encoding: [0x01,0x08,0x50,0xe3] + %b = icmp ugt i32 %a, 65536 + br i1 %b, label %r, label %r +r: + ret void +} diff --git a/test/MC/ARM/simple-fp-encoding.s b/test/MC/ARM/simple-fp-encoding.s new file mode 100644 index 0000000..9120fcf --- /dev/null +++ b/test/MC/ARM/simple-fp-encoding.s @@ -0,0 +1,209 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s + +@ CHECK: vadd.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x71,0xee] + vadd.f64 d16, d17, d16 + +@ CHECK: vadd.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x30,0xee] + vadd.f32 s0, s1, s0 + +@ CHECK: vsub.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x71,0xee] + vsub.f64 d16, d17, d16 + +@ CHECK: vsub.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x30,0xee] + vsub.f32 s0, s1, s0 + +@ CHECK: vdiv.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0xc1,0xee] + vdiv.f64 d16, d17, d16 + +@ CHECK: vdiv.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x80,0xee] + vdiv.f32 s0, s1, s0 + +@ CHECK: vmul.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x61,0xee] + vmul.f64 d16, d17, d16 + +@ CHECK: vmul.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x20,0xee] + vmul.f32 s0, s1, s0 + +@ CHECK: vnmul.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x61,0xee] + vnmul.f64 d16, d17, d16 + +@ CHECK: vnmul.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x20,0xee] + vnmul.f32 s0, s1, s0 + +@ CHECK: vcmpe.f64 d17, d16 @ encoding: [0xe0,0x1b,0xf4,0xee] + vcmpe.f64 d17, d16 + +@ CHECK: vcmpe.f32 s1, s0 @ encoding: [0xc0,0x0a,0xf4,0xee] + vcmpe.f32 s1, s0 + +@ FIXME: vcmpe.f64 d16, #0 @ encoding: [0xc0,0x0b,0xf5,0xee] +@ vcmpe.f64 d16, #0 + +@ FIXME: vcmpe.f32 s0, #0 @ encoding: [0xc0,0x0a,0xb5,0xee] +@ vcmpe.f32 s0, #0 + +@ CHECK: vabs.f64 d16, d16 @ encoding: [0xe0,0x0b,0xf0,0xee] + vabs.f64 d16, d16 + +@ CHECK: vabs.f32 s0, s0 @ encoding: [0xc0,0x0a,0xb0,0xee] + vabs.f32 s0, s0 + +@ CHECK: vcvt.f32.f64 s0, d16 @ encoding: [0xe0,0x0b,0xb7,0xee] + vcvt.f32.f64 s0, d16 + +@ CHECK: vcvt.f64.f32 d16, s0 @ encoding: [0xc0,0x0a,0xf7,0xee] + vcvt.f64.f32 d16, s0 + +@ CHECK: vneg.f64 d16, d16 @ encoding: [0x60,0x0b,0xf1,0xee] + vneg.f64 d16, d16 + +@ CHECK: vneg.f32 s0, s0 @ encoding: [0x40,0x0a,0xb1,0xee] + vneg.f32 s0, s0 + +@ CHECK: vsqrt.f64 d16, d16 @ encoding: [0xe0,0x0b,0xf1,0xee] + vsqrt.f64 d16, d16 + +@ CHECK: vsqrt.f32 s0, s0 @ encoding: [0xc0,0x0a,0xb1,0xee] + vsqrt.f32 s0, s0 + +@ CHECK: vcvt.f64.s32 d16, s0 @ encoding: [0xc0,0x0b,0xf8,0xee] + vcvt.f64.s32 d16, s0 + +@ CHECK: vcvt.f32.s32 s0, s0 @ encoding: [0xc0,0x0a,0xb8,0xee] + vcvt.f32.s32 s0, s0 + +@ CHECK: vcvt.f64.u32 d16, s0 @ encoding: [0x40,0x0b,0xf8,0xee] + vcvt.f64.u32 d16, s0 + +@ CHECK: vcvt.f32.u32 s0, s0 @ encoding: [0x40,0x0a,0xb8,0xee] + vcvt.f32.u32 s0, s0 + +@ CHECK: vcvt.s32.f64 s0, d16 @ encoding: [0xe0,0x0b,0xbd,0xee] + vcvt.s32.f64 s0, d16 + +@ CHECK: vcvt.s32.f32 s0, s0 @ encoding: [0xc0,0x0a,0xbd,0xee] + vcvt.s32.f32 s0, s0 + +@ CHECK: vcvt.u32.f64 s0, d16 @ encoding: [0xe0,0x0b,0xbc,0xee] + vcvt.u32.f64 s0, d16 + +@ CHECK: vcvt.u32.f32 s0, s0 @ encoding: [0xc0,0x0a,0xbc,0xee] + vcvt.u32.f32 s0, s0 + +@ CHECK: vmla.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0x42,0xee] + vmla.f64 d16, d18, d17 + +@ CHECK: vmla.f32 s1, s2, s0 @ encoding: [0x00,0x0a,0x41,0xee] + vmla.f32 s1, s2, s0 + +@ CHECK: vmls.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0x42,0xee] + vmls.f64 d16, d18, d17 + +@ CHECK: vmls.f32 s1, s2, s0 @ encoding: [0x40,0x0a,0x41,0xee] + vmls.f32 s1, s2, s0 + +@ CHECK: vnmla.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0x52,0xee] + vnmla.f64 d16, d18, d17 + +@ CHECK: vnmla.f32 s1, s2, s0 @ encoding: [0x40,0x0a,0x51,0xee] + vnmla.f32 s1, s2, s0 + +@ CHECK: vnmls.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0x52,0xee] + vnmls.f64 d16, d18, d17 + +@ CHECK: vnmls.f32 s1, s2, s0 @ encoding: [0x00,0x0a,0x51,0xee] + vnmls.f32 s1, s2, s0 + +@ FIXME: vmrs apsr_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] +@ vmrs apsr_nzcv, fpscr + +@ CHECK: vnegne.f64 d16, d16 @ encoding: [0x60,0x0b,0xf1,0x1e] + vnegne.f64 d16, d16 + +@ CHECK: vmovne s0, r0 @ encoding: [0x10,0x0a,0x00,0x1e] +@ CHECK: vmoveq s0, r1 @ encoding: [0x10,0x1a,0x00,0x0e] + vmovne s0, r0 + vmoveq s0, r1 + +@ CHECK: vmrs r0, fpscr @ encoding: [0x10,0x0a,0xf1,0xee] + vmrs r0, fpscr + +@ CHECK: vmsr fpscr, r0 @ encoding: [0x10,0x0a,0xe1,0xee] + vmsr fpscr, r0 + +@ FIXME: vmov.f64 d16, #3.000000e+00 @ encoding: [0x08,0x0b,0xf0,0xee] +@ vmov.f64 d16, #3.000000e+00 + +@ FIXME: vmov.f32 s0, #3.000000e+00 @ encoding: [0x08,0x0a,0xb0,0xee] +@ vmov.f32 s0, #3.000000e+00 + +@ CHECK: vmov s0, r0 @ encoding: [0x10,0x0a,0x00,0xee] +@ CHECK: vmov s1, r1 @ encoding: [0x90,0x1a,0x00,0xee] +@ CHECK: vmov s2, r2 @ encoding: [0x10,0x2a,0x01,0xee] +@ CHECK: vmov s3, r3 @ encoding: [0x90,0x3a,0x01,0xee] + vmov s0, r0 + vmov s1, r1 + vmov s2, r2 + vmov s3, r3 + +@ CHECK: vmov r0, s0 @ encoding: [0x10,0x0a,0x10,0xee] +@ CHECK: vmov r1, s1 @ encoding: [0x90,0x1a,0x10,0xee] +@ CHECK: vmov r2, s2 @ encoding: [0x10,0x2a,0x11,0xee] +@ CHECK: vmov r3, s3 @ encoding: [0x90,0x3a,0x11,0xee] + vmov r0, s0 + vmov r1, s1 + vmov r2, s2 + vmov r3, s3 + +@ CHECK: vmov r0, r1, d16 @ encoding: [0x30,0x0b,0x51,0xec] + vmov r0, r1, d16 + +@ CHECK: vldr.64 d17, [r0] @ encoding: [0x00,0x1b,0xd0,0xed] + vldr.64 d17, [r0] + +@ CHECK: vldr.64 d1, [r2, #32] @ encoding: [0x08,0x1b,0x92,0xed] +@ CHECK: vldr.64 d1, [r2, #-32] @ encoding: [0x08,0x1b,0x12,0xed] + vldr.64 d1, [r2, #32] + vldr.64 d1, [r2, #-32] + +@ CHECK: vldr.64 d2, [r3] @ encoding: [0x00,0x2b,0x93,0xed] + vldr.64 d2, [r3] + +@ CHECK: vldr.64 d3, [pc] @ encoding: [0x00,0x3b,0x9f,0xed] +@ CHECK: vldr.64 d3, [pc] @ encoding: [0x00,0x3b,0x9f,0xed] +@ CHECK: vldr.64 d3, [pc] @ encoding: [0x00,0x3b,0x9f,0xed] + vldr.64 d3, [pc] + vldr.64 d3, [pc,#0] + vldr.64 d3, [pc,#-0] + +@ CHECK: vldr.32 s13, [r0] @ encoding: [0x00,0x6a,0xd0,0xed] + vldr.32 s13, [r0] + +@ CHECK: vldr.32 s1, [r2, #32] @ encoding: [0x08,0x0a,0xd2,0xed] +@ CHECK: vldr.32 s1, [r2, #-32] @ encoding: [0x08,0x0a,0x52,0xed] + vldr.32 s1, [r2, #32] + vldr.32 s1, [r2, #-32] + +@ CHECK: vldr.32 s2, [r3] @ encoding: [0x00,0x1a,0x93,0xed] + vldr.32 s2, [r3] + +@ CHECK: vldr.32 s5, [pc] @ encoding: [0x00,0x2a,0xdf,0xed] +@ CHECK: vldr.32 s5, [pc] @ encoding: [0x00,0x2a,0xdf,0xed] +@ CHECK: vldr.32 s5, [pc] @ encoding: [0x00,0x2a,0xdf,0xed] + vldr.32 s5, [pc] + vldr.32 s5, [pc,#0] + vldr.32 s5, [pc,#-0] + +@ CHECK: vstr.64 d4, [r1] @ encoding: [0x00,0x4b,0x81,0xed] +@ CHECK: vstr.64 d4, [r1, #24] @ encoding: [0x06,0x4b,0x81,0xed] +@ CHECK: vstr.64 d4, [r1, #-24] @ encoding: [0x06,0x4b,0x01,0xed] + vstr.64 d4, [r1] + vstr.64 d4, [r1, #24] + vstr.64 d4, [r1, #-24] + +@ CHECK: vstr.32 s4, [r1] @ encoding: [0x00,0x2a,0x81,0xed] +@ CHECK: vstr.32 s4, [r1, #24] @ encoding: [0x06,0x2a,0x81,0xed] +@ CHECK: vstr.32 s4, [r1, #-24] @ encoding: [0x06,0x2a,0x01,0xed] + vstr.32 s4, [r1] + vstr.32 s4, [r1, #24] + vstr.32 s4, [r1, #-24] diff --git a/test/MC/ARM/thumb2.s b/test/MC/ARM/thumb2.s new file mode 100644 index 0000000..fbdd140 --- /dev/null +++ b/test/MC/ARM/thumb2.s @@ -0,0 +1,50 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * +.code 16 + +@ CHECK: adc r1, r1, #171 @ encoding: [0xab,0x01,0x41,0xf1] + adc r1, r1, #171 +@ CHECK: adc r1, r1, #1179666 @ encoding: [0x12,0x11,0x41,0xf1] + adc r1, r1, #1179666 +@ CHECK: adc r1, r1, #872428544 @ encoding: [0x34,0x21,0x41,0xf1] + adc r1, r1, #872428544 +@ CHECK: adc r1, r1, #1448498774 @ encoding: [0x56,0x31,0x41,0xf1] + adc r1, r1, #1448498774 +@ CHECK: adc r1, r1, #66846720 @ encoding: [0x7f,0x71,0x41,0xf1] + adc r1, r1, #66846720 + +@ CHECK: mvn r0, #187 @ encoding: [0xbb,0x00,0x6f,0xf0] + mvn r0, #187 +@ CHECK: mvn r0, #11141290 @ encoding: [0xaa,0x10,0x6f,0xf0] + mvn r0, #11141290 +@ CHECK: mvn r0, #-872363008 @ encoding: [0xcc,0x20,0x6f,0xf0] + mvn r0, #-872363008 +@ CHECK: mvn r0, #1114112 @ encoding: [0x88,0x10,0x6f,0xf4] + mvn r0, #1114112 + +@ CHECK: cmp.w r0, #11141290 @ encoding: [0xaa,0x1f,0xb0,0xf1] + cmp.w r0, #11141290 +@ CHECK: cmp.w r0, #-872363008 @ encoding: [0xcc,0x2f,0xb0,0xf1] + cmp.w r0, #-872363008 +@ CHECK: cmp.w r0, #-572662307 @ encoding: [0xdd,0x3f,0xb0,0xf1] + cmp.w r0, #-572662307 +@ CHECK: cmp.w r0, #1114112 @ encoding: [0x88,0x1f,0xb0,0xf5] + cmp.w r0, #1114112 +@ CHECK: cmp.w r0, r1, lsl #5 @ encoding: [0x41,0x1f,0xb0,0xeb] + cmp.w r0, r1, lsl #5 + +@ CHECK: sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] + sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] + +@ CHECK: movw r0, #65535 @ encoding: [0xff,0x70,0x4f,0xf6] + movw r0, #65535 +@ CHECK: movw r1, #43777 @ encoding: [0x01,0x31,0x4a,0xf6] + movw r1, #43777 +@ CHECK: movt r1, #427 @ encoding: [0xab,0x11,0xc0,0xf2] + movt r1, #427 +@ CHECK: movw r1, #43792 @ encoding: [0x10,0x31,0x4a,0xf6] + movw r1, #43792 +@ CHECK: movt r1, #4267 @ encoding: [0xab,0x01,0xc0,0xf2] + movt r1, #4267 +@ CHECK: mov.w r0, #66846720 @ encoding: [0x7f,0x70,0x4f,0xf0] + mov.w r0, #66846720 |