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-rw-r--r--test/MC/Mips/mips32r3/abiflags.s37
-rw-r--r--test/MC/Mips/mips32r3/invalid-mips64r2.s10
-rw-r--r--test/MC/Mips/mips32r3/invalid.s10
-rw-r--r--test/MC/Mips/mips32r3/valid-xfail.s308
-rw-r--r--test/MC/Mips/mips32r3/valid.s236
5 files changed, 601 insertions, 0 deletions
diff --git a/test/MC/Mips/mips32r3/abiflags.s b/test/MC/Mips/mips32r3/abiflags.s
new file mode 100644
index 0000000..a6c7057
--- /dev/null
+++ b/test/MC/Mips/mips32r3/abiflags.s
@@ -0,0 +1,37 @@
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r3 | \
+# RUN: FileCheck %s -check-prefix=CHECK-ASM
+#
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r3 -filetype=obj -o - | \
+# RUN: llvm-readobj -sections -section-data -section-relocations - | \
+# RUN: FileCheck %s -check-prefix=CHECK-OBJ
+
+# CHECK-ASM: .module fp=32
+# CHECK-ASM: .set fp=64
+
+# Checking if the Mips.abiflags were correctly emitted.
+# CHECK-OBJ: Section {
+# CHECK-OBJ: Index: 5
+# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12)
+# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A)
+# CHECK-OBJ: Flags [ (0x2)
+# CHECK-OBJ: SHF_ALLOC (0x2)
+# CHECK-OBJ: ]
+# CHECK-OBJ: Address: 0x0
+# CHECK-OBJ: Size: 24
+# CHECK-OBJ: Link: 0
+# CHECK-OBJ: Info: 0
+# CHECK-OBJ: AddressAlignment: 8
+# CHECK-OBJ: EntrySize: 24
+# CHECK-OBJ: Relocations [
+# CHECK-OBJ: ]
+# CHECK-OBJ: SectionData (
+# CHECK-OBJ: 0000: 00002003 01010001 00000000 00000000 |.. .............|
+# CHECK-OBJ: 0010: 00000001 00000000 |........|
+# CHECK-OBJ: )
+# CHECK-OBJ-LABEL: }
+
+ .module fp=32
+ .set fp=64
+# FIXME: Test should include gnu_attributes directive when implemented.
+# An explicit .gnu_attribute must be checked against the effective
+# command line options and any inconsistencies reported via a warning.
diff --git a/test/MC/Mips/mips32r3/invalid-mips64r2.s b/test/MC/Mips/mips32r3/invalid-mips64r2.s
new file mode 100644
index 0000000..0f007e2
--- /dev/null
+++ b/test/MC/Mips/mips32r3/invalid-mips64r2.s
@@ -0,0 +1,10 @@
+# Instructions that are invalid
+#
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding \
+# RUN: -mcpu=mips32r3 2>%t1
+# RUN: FileCheck %s < %t1
+
+ .set noat
+ dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+
diff --git a/test/MC/Mips/mips32r3/invalid.s b/test/MC/Mips/mips32r3/invalid.s
new file mode 100644
index 0000000..f67f4c5
--- /dev/null
+++ b/test/MC/Mips/mips32r3/invalid.s
@@ -0,0 +1,10 @@
+# Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
+# invalid set of operands or operand's restrictions not met).
+
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r3 2>%t1
+# RUN: FileCheck %s < %t1 -check-prefix=ASM
+
+ .text
+ .set noreorder
+ jalr.hb $31 # ASM: :[[@LINE]]:9: error: source and destination must be different
+ jalr.hb $31, $31 # ASM: :[[@LINE]]:9: error: source and destination must be different
diff --git a/test/MC/Mips/mips32r3/valid-xfail.s b/test/MC/Mips/mips32r3/valid-xfail.s
new file mode 100644
index 0000000..b0fc3a1
--- /dev/null
+++ b/test/MC/Mips/mips32r3/valid-xfail.s
@@ -0,0 +1,308 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r3 | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+
+ .set noat
+ abs.ps $f22,$f8
+ absq_s.ph $8,$a0
+ absq_s.qb $15,$s1
+ absq_s.w $s3,$ra
+ add.ps $f25,$f27,$f13
+ addq.ph $s1,$15,$at
+ addq_s.ph $s3,$s6,$s2
+ addq_s.w $a2,$8,$at
+ addqh.ph $s4,$14,$s1
+ addqh.w $s7,$s7,$k1
+ addqh_r.ph $sp,$25,$s8
+ addqh_r.w $8,$v1,$zero
+ addsc $s8,$15,$12
+ addu.ph $a2,$14,$s3
+ addu.qb $s6,$v1,$v1
+ addu_s.ph $a3,$s3,$gp
+ addu_s.qb $s4,$s8,$s1
+ adduh.qb $a1,$a1,$at
+ adduh_r.qb $a0,$9,$12
+ addwc $k0,$s6,$s7
+ alnv.ps $f12,$f18,$f30,$12
+ and.v $w10,$w25,$w29
+ bitrev $14,$at
+ bmnz.v $w15,$w2,$w28
+ bmz.v $w13,$w11,$w21
+ bsel.v $w28,$w7,$w0
+ c.eq.d $fcc1,$f15,$f15
+ c.eq.ps $fcc5,$f0,$f9
+ c.eq.s $fcc5,$f24,$f17
+ c.f.d $fcc4,$f11,$f21
+ c.f.ps $fcc6,$f11,$f11
+ c.f.s $fcc4,$f30,$f7
+ c.le.d $fcc4,$f18,$f1
+ c.le.ps $fcc1,$f7,$f20
+ c.le.s $fcc6,$f24,$f4
+ c.lt.d $fcc3,$f9,$f3
+ c.lt.ps $f19,$f5
+ c.lt.s $fcc2,$f17,$f14
+ c.nge.d $fcc5,$f21,$f16
+ c.nge.ps $f1,$f26
+ c.nge.s $fcc3,$f11,$f8
+ c.ngl.ps $f21,$f30
+ c.ngl.s $fcc2,$f31,$f23
+ c.ngle.ps $fcc7,$f12,$f20
+ c.ngle.s $fcc2,$f18,$f23
+ c.ngt.d $fcc4,$f24,$f7
+ c.ngt.ps $fcc5,$f30,$f6
+ c.ngt.s $fcc5,$f8,$f13
+ c.ole.d $fcc2,$f16,$f31
+ c.ole.ps $fcc7,$f21,$f8
+ c.ole.s $fcc3,$f7,$f20
+ c.olt.d $fcc4,$f19,$f28
+ c.olt.ps $fcc3,$f7,$f16
+ c.olt.s $fcc6,$f20,$f7
+ c.seq.d $fcc4,$f31,$f7
+ c.seq.ps $fcc6,$f31,$f14
+ c.seq.s $fcc7,$f1,$f25
+ c.sf.ps $fcc6,$f4,$f6
+ c.ueq.d $fcc4,$f13,$f25
+ c.ueq.ps $fcc1,$f5,$f29
+ c.ueq.s $fcc6,$f3,$f30
+ c.ule.d $fcc7,$f25,$f18
+ c.ule.ps $fcc6,$f17,$f3
+ c.ule.s $fcc7,$f21,$f30
+ c.ult.d $fcc6,$f6,$f17
+ c.ult.ps $fcc7,$f14,$f0
+ c.ult.s $fcc7,$f24,$f10
+ c.un.d $fcc6,$f23,$f24
+ c.un.ps $fcc4,$f2,$f26
+ c.un.s $fcc1,$f30,$f4
+ ceil.l.d $f1,$f3
+ ceil.l.s $f18,$f13
+ cfcmsa $s6,$19
+ cmp.eq.ph $s7,$14
+ cmp.le.ph $8,$14
+ cmp.lt.ph $k0,$sp
+ cmpgdu.eq.qb $s3,$zero,$k0
+ cmpgdu.le.qb $v1,$15,$s2
+ cmpgdu.lt.qb $s0,$gp,$sp
+ cmpgu.eq.qb $14,$s6,$s8
+ cmpgu.le.qb $9,$a3,$s4
+ cmpgu.lt.qb $sp,$at,$8
+ cmpu.eq.qb $v0,$24
+ cmpu.le.qb $s1,$a1
+ cmpu.lt.qb $at,$a3
+ ctcmsa $31,$s7
+ cvt.d.l $f4,$f16
+ cvt.ps.s $f3,$f18,$f19
+ cvt.s.l $f15,$f30
+ cvt.s.pl $f30,$f1
+ cvt.s.pu $f14,$f25
+ dmt $k0
+ dpa.w.ph $ac1,$s7,$k0
+ dpaq_s.w.ph $ac2,$a0,$13
+ dpaq_sa.l.w $ac0,$a2,$14
+ dpaqx_s.w.ph $ac3,$a0,$24
+ dpaqx_sa.w.ph $ac1,$zero,$s5
+ dpau.h.qbl $ac1,$10,$24
+ dpau.h.qbr $ac1,$s7,$s6
+ dpax.w.ph $ac3,$a0,$k0
+ dps.w.ph $ac1,$a3,$a1
+ dpsq_s.w.ph $ac0,$gp,$k0
+ dpsq_sa.l.w $ac0,$a3,$15
+ dpsqx_s.w.ph $ac3,$13,$a3
+ dpsqx_sa.w.ph $ac3,$sp,$s2
+ dpsu.h.qbl $ac2,$14,$10
+ dpsu.h.qbr $ac2,$a1,$s6
+ dpsx.w.ph $ac0,$s7,$gp
+ dvpe $s6
+ emt $8
+ evpe $v0
+ extpdpv $s6,$ac0,$s8
+ extpv $13,$ac0,$14
+ extrv.w $8,$ac3,$at
+ extrv_r.w $8,$ac1,$s6
+ extrv_rs.w $gp,$ac1,$s6
+ extrv_s.h $s2,$ac1,$14
+ fclass.d $w14,$w27
+ fclass.w $w19,$w28
+ fexupl.d $w10,$w29
+ fexupl.w $w12,$w27
+ fexupr.d $w31,$w15
+ fexupr.w $w29,$w12
+ ffint_s.d $w1,$w30
+ ffint_s.w $w16,$w14
+ ffint_u.d $w23,$w18
+ ffint_u.w $w19,$w12
+ ffql.d $w2,$w3
+ ffql.w $w9,$w0
+ ffqr.d $w25,$w24
+ ffqr.w $w10,$w6
+ fill.b $w9,$v1
+ fill.h $w9,$8
+ fill.w $w31,$15
+ flog2.d $w12,$w16
+ flog2.w $w19,$w23
+ floor.l.d $f26,$f7
+ floor.l.s $f12,$f5
+ fork $s2,$8,$a0
+ frcp.d $w12,$w4
+ frcp.w $w30,$w8
+ frint.d $w20,$w8
+ frint.w $w11,$w29
+ frsqrt.d $w29,$w2
+ frsqrt.w $w9,$w8
+ fsqrt.d $w3,$w1
+ fsqrt.w $w5,$w15
+ ftint_s.d $w31,$w26
+ ftint_s.w $w27,$w14
+ ftint_u.d $w5,$w31
+ ftint_u.w $w12,$w29
+ ftrunc_s.d $w4,$w22
+ ftrunc_s.w $w24,$w7
+ ftrunc_u.d $w20,$w25
+ ftrunc_u.w $w7,$w26
+ insv $s2,$at
+ iret
+ lbe $14,122($9)
+ lbue $11,-108($10)
+ lbux $9,$14($v0)
+ lhe $s6,219($v1)
+ lhue $gp,118($11)
+ lhx $sp,$k0($15)
+ lle $gp,-237($ra)
+ lwe $ra,-145($14)
+ lwle $11,-42($11)
+ lwre $sp,-152($24)
+ lwx $12,$12($s4)
+ madd.ps $f22,$f3,$f14,$f3
+ maq_s.w.phl $ac2,$25,$11
+ maq_s.w.phr $ac0,$10,$25
+ maq_sa.w.phl $ac3,$a1,$v1
+ maq_sa.w.phr $ac1,$at,$10
+ mfgc0 $s6,c0_datahi1
+ mflo $9,$ac2
+ modsub $a3,$12,$a3
+ mov.ps $f22,$f17
+ move.v $w8,$w17
+ movf.ps $f10,$f28,$fcc6
+ movn.ps $f31,$f31,$s3
+ movt.ps $f20,$f25,$fcc2
+ movz.ps $f18,$f17,$ra
+ msub $ac2,$sp,$14
+ msub.ps $f12,$f14,$f29,$f17
+ msubu $ac2,$a1,$24
+ mtc0 $9,c0_datahi1
+ mtgc0 $s4,$21,7
+ mthi $v0,$ac1
+ mthlip $a3,$ac0
+ mul.ph $s4,$24,$s0
+ mul.ps $f14,$f0,$f16
+ mul_s.ph $10,$14,$15
+ muleq_s.w.phl $11,$s4,$s4
+ muleq_s.w.phr $s6,$a0,$s8
+ muleu_s.ph.qbl $a2,$14,$8
+ muleu_s.ph.qbr $a1,$ra,$9
+ mulq_rs.ph $s2,$14,$15
+ mulq_rs.w $at,$s4,$25
+ mulq_s.ph $s0,$k1,$15
+ mulq_s.w $9,$a3,$s0
+ mulsa.w.ph $ac1,$s4,$s6
+ mulsaq_s.w.ph $ac0,$ra,$s2
+ neg.ps $f19,$f13
+ nloc.b $w12,$w30
+ nloc.d $w16,$w7
+ nloc.h $w21,$w17
+ nloc.w $w17,$w16
+ nlzc.b $w12,$w7
+ nlzc.d $w14,$w14
+ nlzc.h $w24,$w24
+ nlzc.w $w10,$w4
+ nmadd.ps $f27,$f4,$f9,$f25
+ nmsub.ps $f6,$f12,$f14,$f17
+ nor.v $w20,$w20,$w15
+ or.v $w13,$w23,$w12
+ packrl.ph $ra,$24,$14
+ pcnt.b $w30,$w15
+ pcnt.d $w5,$w16
+ pcnt.h $w20,$w24
+ pcnt.w $w22,$w20
+ pick.ph $ra,$a2,$gp
+ pick.qb $11,$a0,$gp
+ pll.ps $f25,$f9,$f30
+ plu.ps $f1,$f26,$f29
+ preceq.w.phl $s8,$gp
+ preceq.w.phr $s5,$15
+ precequ.ph.qbl $s7,$ra
+ precequ.ph.qbla $a0,$9
+ precequ.ph.qbr $ra,$s3
+ precequ.ph.qbra $24,$8
+ preceu.ph.qbl $sp,$8
+ preceu.ph.qbla $s6,$11
+ preceu.ph.qbr $gp,$s1
+ preceu.ph.qbra $k1,$s0
+ precr.qb.ph $v0,$12,$s8
+ precrq.ph.w $14,$s8,$24
+ precrq.qb.ph $a2,$12,$12
+ precrq_rs.ph.w $a1,$k0,$a3
+ precrqu_s.qb.ph $zero,$gp,$s5
+ pul.ps $f9,$f30,$f26
+ puu.ps $f24,$f9,$f2
+ raddu.w.qb $25,$s3
+ rdpgpr $s3,$9
+ recip.d $f19,$f6
+ recip.s $f3,$f30
+ repl.ph $at,-307
+ replv.ph $v1,$s7
+ replv.qb $25,$12
+ rorv $13,$a3,$s5
+ round.l.d $f12,$f1
+ round.l.s $f25,$f5
+ rsqrt.d $f3,$f28
+ rsqrt.s $f4,$f8
+ sbe $s7,33($s1)
+ sce $sp,189($10)
+ she $24,105($v0)
+ shilo $ac1,26
+ shilov $ac2,$10
+ shllv.ph $10,$s0,$s0
+ shllv.qb $gp,$v1,$zero
+ shllv_s.ph $k1,$at,$13
+ shllv_s.w $s1,$ra,$k0
+ shrav.ph $25,$s2,$s1
+ shrav.qb $zero,$24,$11
+ shrav_r.ph $s3,$11,$25
+ shrav_r.qb $a0,$sp,$s5
+ shrav_r.w $s7,$s4,$s6
+ shrlv.ph $14,$10,$9
+ shrlv.qb $a2,$s2,$11
+ sub.ps $f5,$f14,$f26
+ subq.ph $ra,$9,$s8
+ subq_s.ph $13,$s8,$s5
+ subq_s.w $k1,$a2,$a3
+ subqh.ph $10,$at,$9
+ subqh.w $v0,$a2,$zero
+ subqh_r.ph $a0,$12,$s6
+ subqh_r.w $10,$a2,$gp
+ subu.ph $9,$s6,$s4
+ subu.qb $s6,$a2,$s6
+ subu_s.ph $v1,$a1,$s3
+ subu_s.qb $s1,$at,$ra
+ subuh.qb $zero,$gp,$gp
+ subuh_r.qb $s4,$s8,$s6
+ swe $24,94($k0)
+ swle $v1,-209($gp)
+ swre $k0,-202($s2)
+ tlbginv
+ tlbginvf
+ tlbgp
+ tlbgr
+ tlbgwi
+ tlbgwr
+ tlbinv
+ tlbinvf
+ trunc.l.d $f23,$f23
+ trunc.l.s $f28,$f31
+ wrpgpr $zero,$13
+ xor.v $w20,$w21,$w30
+ yield $v1,$s0
diff --git a/test/MC/Mips/mips32r3/valid.s b/test/MC/Mips/mips32r3/valid.s
new file mode 100644
index 0000000..4280de5
--- /dev/null
+++ b/test/MC/Mips/mips32r3/valid.s
@@ -0,0 +1,236 @@
+# Instructions that are valid
+#
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r3 | FileCheck %s
+
+ .set noat
+ abs.d $f7,$f25 # CHECK: encoding:
+ abs.s $f9,$f16
+ add $s7,$s2,$a1
+ add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48]
+ add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7]
+ add.d $f1,$f7,$f29
+ add.s $f8,$f21,$f24
+ addi $13,$9,26322
+ addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe]
+ addu $9,$a0,$a2
+ addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a]
+ and $s7,$v0,$12
+ and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04]
+ bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
+ bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
+ bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
+ bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94]
+ bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94]
+ bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06]
+ bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
+ bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
+ bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
+ bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94]
+ bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94]
+ bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06]
+ bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
+ bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
+ bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
+ bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
+ beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
+ bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
+ bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
+ bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
+ blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
+ bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
+ bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
+ bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
+ cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
+ c.ngl.d $f29,$f29
+ c.ngle.d $f0,$f16
+ c.sf.d $f30,$f0
+ c.sf.s $f14,$f22
+ ceil.w.d $f11,$f25
+ ceil.w.s $f6,$f20
+ cfc1 $s1,$21
+ clo $11,$a1 # CHECK: clo $11, $5 # encoding: [0x70,0xab,0x58,0x21]
+ clz $sp,$gp # CHECK: clz $sp, $gp # encoding: [0x73,0x9d,0xe8,0x20]
+ ctc1 $a2,$26
+ cvt.d.s $f22,$f28
+ cvt.d.w $f26,$f11
+ cvt.l.d $f24,$f15
+ cvt.l.s $f11,$f29
+ cvt.s.d $f26,$f8
+ cvt.s.w $f22,$f15
+ cvt.w.d $f20,$f14
+ cvt.w.s $f20,$f24
+ deret
+ di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00]
+ di # CHECK: di # encoding: [0x41,0x60,0x60,0x00]
+ div $zero,$25,$11
+ div.d $f29,$f20,$f27
+ div.s $f4,$f5,$f15
+ divu $zero,$25,$15
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
+ ei $14 # CHECK: ei $14 # encoding: [0x41,0x6e,0x60,0x20]
+ ei # CHECK: ei # encoding: [0x41,0x60,0x60,0x20]
+ eret
+ floor.w.d $f14,$f11
+ floor.w.s $f8,$f9
+ jr.hb $4 # CHECK: jr.hb $4 # encoding: [0x00,0x80,0x04,0x08]
+ jalr.hb $4 # CHECK: jalr.hb $4 # encoding: [0x00,0x80,0xfc,0x09]
+ jalr.hb $4, $5 # CHECK: jalr.hb $4, $5 # encoding: [0x00,0xa0,0x24,0x09]
+ lb $24,-14515($10)
+ lbu $8,30195($v1)
+ ldc1 $f11,16391($s0)
+ ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
+ ldxc1 $f8,$s7($15)
+ lh $11,-8556($s5)
+ lhu $s3,-22851($v0)
+ li $at,-29773
+ li $zero,-29889
+ ll $v0,-7321($s2) # CHECK: ll $2, -7321($18) # encoding: [0xc2,0x42,0xe3,0x67]
+ luxc1 $f19,$s6($s5)
+ lw $8,5674($a1)
+ lwc1 $f16,10225($k0)
+ lwc2 $18,-841($a2) # CHECK: lwc2 $18, -841($6) # encoding: [0xc8,0xd2,0xfc,0xb7]
+ lwl $s4,-4231($15)
+ lwr $zero,-19147($gp)
+ lwxc1 $f12,$s1($s8)
+ madd $s6,$13
+ madd $zero,$9
+ madd.d $f18,$f19,$f26,$f20
+ madd.s $f1,$f31,$f19,$f25
+ maddu $s3,$gp
+ maddu $24,$s2
+ mfc0 $a2,$14,1
+ mfc1 $a3,$f27
+ mfhc1 $s8,$f24
+ mfhi $s3
+ mfhi $sp
+ mflo $s1
+ mov.d $f20,$f14
+ mov.s $f2,$f27
+ move $s8,$a0
+ move $25,$a2
+ movf $gp,$8,$fcc7
+ movf.d $f6,$f11,$fcc5
+ movf.s $f23,$f5,$fcc6
+ movn $v1,$s1,$s0
+ movn.d $f27,$f21,$k0
+ movn.s $f12,$f0,$s7
+ movt $zero,$s4,$fcc5
+ movt.d $f0,$f2,$fcc0
+ movt.s $f30,$f2,$fcc1
+ movz $a1,$s6,$9
+ movz.d $f12,$f29,$9
+ movz.s $f25,$f7,$v1
+ msub $s7,$k1
+ msub.d $f10,$f1,$f31,$f18
+ msub.s $f12,$f19,$f10,$f16
+ msubu $15,$a1
+ mtc0 $9,$29,3
+ mtc1 $s8,$f9
+ mthc1 $zero,$f16
+ mthi $s1
+ mtlo $sp
+ mtlo $25
+ mul $s0,$s4,$at
+ mul.d $f20,$f20,$f16
+ mul.s $f30,$f10,$f2
+ mult $sp,$s4
+ mult $sp,$v0
+ multu $gp,$k0
+ multu $9,$s2
+ negu $2 # CHECK: negu $2, $2 # encoding: [0x00,0x02,0x10,0x23]
+ negu $2,$3 # CHECK: negu $2, $3 # encoding: [0x00,0x03,0x10,0x23]
+ neg.d $f27,$f18
+ neg.s $f1,$f15
+ nmadd.d $f18,$f9,$f14,$f19
+ nmadd.s $f0,$f5,$f25,$f12
+ nmsub.d $f30,$f8,$f16,$f30
+ nmsub.s $f1,$f24,$f19,$f4
+ nop
+ nor $a3,$zero,$a3
+ or $12,$s0,$sp
+ or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
+ pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
+ pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
+ # FIXME: Use the code generator in order to print the .set directives
+ # instead of the instruction printer.
+ rdhwr $sp,$11 # CHECK: .set push
+ # CHECK-NEXT: .set mips32r2
+ # CHECK-NEXT: rdhwr $sp, $11
+ # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
+ rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
+ rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
+ rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
+ round.w.d $f6,$f4
+ round.w.s $f27,$f28
+ sb $s6,-19857($14)
+ sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8]
+ sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f]
+ sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf]
+ sdc1 $f31,30574($13)
+ sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75]
+ sdxc1 $f11,$10($14)
+ seb $25,$15
+ seh $v1,$12
+ sh $14,-6704($15)
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
+ sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
+ slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a]
+ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
+ sltiu $25,$25,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
+ sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
+ sltu $24,$25,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
+ sqrt.d $f17,$f22
+ sqrt.s $f0,$f1
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sub $s6,$s3,$12
+ sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36]
+ sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90]
+ sub.d $f18,$f3,$f17
+ sub.s $f23,$f22,$f22
+ subu $sp,$s6,$s6
+ suxc1 $f12,$k1($13)
+ sw $ra,-10160($sp)
+ swc1 $f6,-8465($24)
+ swc2 $25,24880($s0) # CHECK: swc2 $25, 24880($16) # encoding: [0xea,0x19,0x61,0x30]
+ swl $15,13694($s3)
+ swr $s1,-26590($14)
+ swxc1 $f19,$12($k0)
+ sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f]
+ sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f]
+ teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
+ teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
+ teqi $s5,-17504
+ tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
+ tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
+ tgei $s1,5025
+ tgeiu $sp,-28621
+ tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
+ tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
+ tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
+ tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
+ tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
+ tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
+ tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
+ tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
+ tlti $14,-21059
+ tltiu $ra,-5076
+ tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
+ tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
+ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
+ tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
+ tnei $12,-29647
+ trunc.w.d $f22,$f15
+ trunc.w.s $f28,$f30
+ wsbh $k1,$9
+ xor $s2,$a0,$s8
+ synci -15842($a2) # CHECK: synci -15842($6) # encoding: [0x04,0xdf,0xc2,0x1e]
generated by cgit v1.1 at 2024-12-22 16:34:47 +0000