diff options
Diffstat (limited to 'test/MC')
39 files changed, 39 insertions, 39 deletions
diff --git a/test/MC/Disassembler/ARM/invalid-BFI-arm.txt b/test/MC/Disassembler/ARM/invalid-BFI-arm.txt index a0d5944..3743ac8 100644 --- a/test/MC/Disassembler/ARM/invalid-BFI-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-BFI-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=60 Name=BFI Format=ARM_FORMAT_DPFRM(4) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt b/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt index d2d424c..9025542 100644 --- a/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=2249 Name=tBcc Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-CPS2p-arm.txt b/test/MC/Disassembler/ARM/invalid-CPS2p-arm.txt index 10748e9..c6265f8 100644 --- a/test/MC/Disassembler/ARM/invalid-CPS2p-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-CPS2p-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # invalid imod value (0b01) 0xc0 0x67 0x4 0xf1 diff --git a/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt b/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt index 8146b5c..b23653e 100644 --- a/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {potentially undefined instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "potentially undefined instruction encoding" # invalid (imod, M, iflags) combination 0x93 0x00 0x02 0xf1 diff --git a/test/MC/Disassembler/ARM/invalid-DMB-thumb.txt b/test/MC/Disassembler/ARM/invalid-DMB-thumb.txt index b441485..c78e7c9 100644 --- a/test/MC/Disassembler/ARM/invalid-DMB-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-DMB-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=1908 Name=t2DMB Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-DSB-arm.txt b/test/MC/Disassembler/ARM/invalid-DSB-arm.txt index de042a97..afe467f 100644 --- a/test/MC/Disassembler/ARM/invalid-DSB-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-DSB-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=102 Name=DSB Format=ARM_FORMAT_MISCFRM(26) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-IT-CBNZ-thumb.txt b/test/MC/Disassembler/ARM/invalid-IT-CBNZ-thumb.txt index 6174e92..3d70c94 100644 --- a/test/MC/Disassembler/ARM/invalid-IT-CBNZ-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-IT-CBNZ-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep {potentially undefined instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep "potentially undefined instruction encoding" # CBZ / CBNZ not allowed in IT block. diff --git a/test/MC/Disassembler/ARM/invalid-IT-thumb.txt b/test/MC/Disassembler/ARM/invalid-IT-thumb.txt index 9b571b3..6b10e67 100644 --- a/test/MC/Disassembler/ARM/invalid-IT-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-IT-thumb.txt @@ -1,3 +1,3 @@ -# RUN: llvm-mc --disassemble %s -triple=thumbv7-unknown-unknown |& grep {potentially undefined instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumbv7-unknown-unknown |& grep "potentially undefined instruction encoding" 0xff 0xbf 0x6b 0x80 0x00 0x75 diff --git a/test/MC/Disassembler/ARM/invalid-LDC-form-arm.txt b/test/MC/Disassembler/ARM/invalid-LDC-form-arm.txt index 0b0426b..41f734d 100644 --- a/test/MC/Disassembler/ARM/invalid-LDC-form-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-LDC-form-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=0 Name=PHI Format=(42) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-LDM-thumb.txt b/test/MC/Disassembler/ARM/invalid-LDM-thumb.txt index a42b248..d6e746c 100644 --- a/test/MC/Disassembler/ARM/invalid-LDM-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-LDM-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep {potentially undefined instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep "potentially undefined instruction encoding" # Writeback is not allowed is Rn is in the target register list. diff --git a/test/MC/Disassembler/ARM/invalid-LDRB_POST-arm.txt b/test/MC/Disassembler/ARM/invalid-LDRB_POST-arm.txt index 6b695b9..1dad49d 100644 --- a/test/MC/Disassembler/ARM/invalid-LDRB_POST-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-LDRB_POST-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {potentially undefined instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "potentially undefined instruction encoding" # Opcode=140 Name=LDRB_POST Format=ARM_FORMAT_LDFRM(6) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt b/test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt index 7ea1b46..aa77bb2 100644 --- a/test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=1930 Name=t2LDRD_PRE Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-LDR_PRE-arm.txt b/test/MC/Disassembler/ARM/invalid-LDR_PRE-arm.txt index e42e0de..197e34f 100644 --- a/test/MC/Disassembler/ARM/invalid-LDR_PRE-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-LDR_PRE-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {potentially undefined instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "potentially undefined instruction encoding" # Opcode=165 Name=LDR_PRE Format=ARM_FORMAT_LDFRM(6) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-LDRrs-arm.txt b/test/MC/Disassembler/ARM/invalid-LDRrs-arm.txt index 23a0b85..af16e97 100644 --- a/test/MC/Disassembler/ARM/invalid-LDRrs-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-LDRrs-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # LDR (register) has encoding Inst{4} = 0. 0xba 0xae 0x9f 0x57 diff --git a/test/MC/Disassembler/ARM/invalid-MCR-arm.txt b/test/MC/Disassembler/ARM/invalid-MCR-arm.txt index 8343d54..575d063 100644 --- a/test/MC/Disassembler/ARM/invalid-MCR-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-MCR-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=171 Name=MCR Format=ARM_FORMAT_BRFRM(2) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt b/test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt index 235952f..d15ee05 100644 --- a/test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=185 Name=MOVTi16 Format=ARM_FORMAT_DPFRM(4) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-MOVr-arm.txt b/test/MC/Disassembler/ARM/invalid-MOVr-arm.txt index 01c1466..f8f055c 100644 --- a/test/MC/Disassembler/ARM/invalid-MOVr-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-MOVr-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=0 Name=PHI Format=(42) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt b/test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt index 757d167..3f682d8 100644 --- a/test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=196 Name=MOVs Format=ARM_FORMAT_DPSOREGFRM(5) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt b/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt index ba48877..78acffe 100644 --- a/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=0 Name=PHI Format=(42) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt b/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt index 3765b1f..b635a02 100644 --- a/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=206 Name=MSRi Format=ARM_FORMAT_BRFRM(2) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt b/test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt index cffd86d..2b7d22c 100644 --- a/test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=134 Name=LDMIA Format=ARM_FORMAT_LDSTMULFRM(10) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-SBFX-arm.txt b/test/MC/Disassembler/ARM/invalid-SBFX-arm.txt index 9e16536..48fe0f2 100644 --- a/test/MC/Disassembler/ARM/invalid-SBFX-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-SBFX-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=271 Name=SBFX Format=ARM_FORMAT_DPFRM(4) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt b/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt index 91f3d58..5f39bb6 100644 --- a/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=284 Name=SMLAD Format=ARM_FORMAT_MULFRM(1) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-SRS-arm.txt b/test/MC/Disassembler/ARM/invalid-SRS-arm.txt index fc5c711..dc6788e 100644 --- a/test/MC/Disassembler/ARM/invalid-SRS-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-SRS-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=0 Name=PHI Format=(42) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-STMIA_UPD-thumb.txt b/test/MC/Disassembler/ARM/invalid-STMIA_UPD-thumb.txt index ca16724..9709b06 100644 --- a/test/MC/Disassembler/ARM/invalid-STMIA_UPD-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-STMIA_UPD-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=2313 Name=tSTMIA_UPD Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt b/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt index 400d44c..4b70bdd 100644 --- a/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=390 Name=SXTBr_rot Format=ARM_FORMAT_EXTFRM(14) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt b/test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt index c7cbd84..5726401 100644 --- a/test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=419 Name=UMAAL Format=ARM_FORMAT_MULFRM(1) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt b/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt index bab32ca..d7d70f7 100644 --- a/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=871 Name=VLD3DUPd32_UPD Format=ARM_FORMAT_NLdSt(30) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-VLDMSDB_UPD-arm.txt b/test/MC/Disassembler/ARM/invalid-VLDMSDB_UPD-arm.txt index 887b983..9c0d93e 100644 --- a/test/MC/Disassembler/ARM/invalid-VLDMSDB_UPD-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-VLDMSDB_UPD-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep "invalid instruction encoding" # core registers out of range 0xa5 0xba 0x72 0xed diff --git a/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt b/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt index 8ff3a2b..397584e 100644 --- a/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=1839 Name=VST1d8Twb_register Format=ARM_FORMAT_NLdSt(30) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-t2Bcc-thumb.txt b/test/MC/Disassembler/ARM/invalid-t2Bcc-thumb.txt index df0a642..bbf415a 100644 --- a/test/MC/Disassembler/ARM/invalid-t2Bcc-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-t2Bcc-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=1894 Name=t2Bcc Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-t2LDRBT-thumb.txt b/test/MC/Disassembler/ARM/invalid-t2LDRBT-thumb.txt index e1f841b8..0a61202 100644 --- a/test/MC/Disassembler/ARM/invalid-t2LDRBT-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-t2LDRBT-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=1922 Name=t2LDRBT Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-t2LDRSHi12-thumb.txt b/test/MC/Disassembler/ARM/invalid-t2LDRSHi12-thumb.txt index a63d121..047121e 100644 --- a/test/MC/Disassembler/ARM/invalid-t2LDRSHi12-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-t2LDRSHi12-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=1953 Name=t2LDRSHi12 Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-t2LDRSHi8-thumb.txt b/test/MC/Disassembler/ARM/invalid-t2LDRSHi8-thumb.txt index f126ff0..57b5038 100644 --- a/test/MC/Disassembler/ARM/invalid-t2LDRSHi8-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-t2LDRSHi8-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=1954 Name=t2LDRSHi8 Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-t2PUSH-thumb.txt b/test/MC/Disassembler/ARM/invalid-t2PUSH-thumb.txt index b3daa9a..3348a42 100644 --- a/test/MC/Disassembler/ARM/invalid-t2PUSH-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-t2PUSH-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 |& grep "invalid instruction encoding" # SP and PC are not allowed in the register list on STM instructions in Thumb2. diff --git a/test/MC/Disassembler/ARM/invalid-t2STREXD-thumb.txt b/test/MC/Disassembler/ARM/invalid-t2STREXD-thumb.txt index 0f9a16e..5721fe1 100644 --- a/test/MC/Disassembler/ARM/invalid-t2STREXD-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-t2STREXD-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=2128 Name=t2STREXD Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/ARM/invalid-t2STR_POST-thumb.txt b/test/MC/Disassembler/ARM/invalid-t2STR_POST-thumb.txt index 548ad05..b957899 100644 --- a/test/MC/Disassembler/ARM/invalid-t2STR_POST-thumb.txt +++ b/test/MC/Disassembler/ARM/invalid-t2STR_POST-thumb.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding" # Opcode=2137 Name=t2STR_POST Format=ARM_FORMAT_THUMBFRM(25) # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 diff --git a/test/MC/Disassembler/X86/invalid-VEX-vvvv.txt b/test/MC/Disassembler/X86/invalid-VEX-vvvv.txt index 9feb54c..9353d8a 100644 --- a/test/MC/Disassembler/X86/invalid-VEX-vvvv.txt +++ b/test/MC/Disassembler/X86/invalid-VEX-vvvv.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 |& grep "invalid instruction encoding" # This instruction would decode as movmskps if the vvvv field in the VEX prefix was all 1s. 0xc5 0xf0 0x50 0xc0 diff --git a/test/MC/Disassembler/X86/invalid-cmp-imm.txt b/test/MC/Disassembler/X86/invalid-cmp-imm.txt index bf8699b..c569ada 100644 --- a/test/MC/Disassembler/X86/invalid-cmp-imm.txt +++ b/test/MC/Disassembler/X86/invalid-cmp-imm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 |& grep "invalid instruction encoding" # This instruction would decode as cmpordps if the immediate byte was less than 8. 0x0f 0xc2 0xc7 0x08 |