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-rw-r--r--test/Transforms/InstCombine/aligned-altivec.ll32
1 files changed, 16 insertions, 16 deletions
diff --git a/test/Transforms/InstCombine/aligned-altivec.ll b/test/Transforms/InstCombine/aligned-altivec.ll
index 6ac2691..10b4e4d 100644
--- a/test/Transforms/InstCombine/aligned-altivec.ll
+++ b/test/Transforms/InstCombine/aligned-altivec.ll
@@ -6,7 +6,7 @@ declare <4 x i32> @llvm.ppc.altivec.lvx(i8*) #1
define <4 x i32> @test1(<4 x i32>* %h) #0 {
entry:
- %h1 = getelementptr <4 x i32>* %h, i64 1
+ %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
%hv = bitcast <4 x i32>* %h1 to i8*
%vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv)
@@ -14,14 +14,14 @@ entry:
; CHECK: @llvm.ppc.altivec.lvx
; CHECK: ret <4 x i32>
- %v0 = load <4 x i32>* %h, align 8
+ %v0 = load <4 x i32>, <4 x i32>* %h, align 8
%a = add <4 x i32> %v0, %vl
ret <4 x i32> %a
}
define <4 x i32> @test1a(<4 x i32>* align 16 %h) #0 {
entry:
- %h1 = getelementptr <4 x i32>* %h, i64 1
+ %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
%hv = bitcast <4 x i32>* %h1 to i8*
%vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv)
@@ -29,7 +29,7 @@ entry:
; CHECK-NOT: @llvm.ppc.altivec.lvx
; CHECK: ret <4 x i32>
- %v0 = load <4 x i32>* %h, align 8
+ %v0 = load <4 x i32>, <4 x i32>* %h, align 8
%a = add <4 x i32> %v0, %vl
ret <4 x i32> %a
}
@@ -38,11 +38,11 @@ declare void @llvm.ppc.altivec.stvx(<4 x i32>, i8*) #0
define <4 x i32> @test2(<4 x i32>* %h, <4 x i32> %d) #0 {
entry:
- %h1 = getelementptr <4 x i32>* %h, i64 1
+ %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
%hv = bitcast <4 x i32>* %h1 to i8*
call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv)
- %v0 = load <4 x i32>* %h, align 8
+ %v0 = load <4 x i32>, <4 x i32>* %h, align 8
ret <4 x i32> %v0
; CHECK-LABEL: @test2
@@ -52,11 +52,11 @@ entry:
define <4 x i32> @test2a(<4 x i32>* align 16 %h, <4 x i32> %d) #0 {
entry:
- %h1 = getelementptr <4 x i32>* %h, i64 1
+ %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
%hv = bitcast <4 x i32>* %h1 to i8*
call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv)
- %v0 = load <4 x i32>* %h, align 8
+ %v0 = load <4 x i32>, <4 x i32>* %h, align 8
ret <4 x i32> %v0
; CHECK-LABEL: @test2
@@ -68,7 +68,7 @@ declare <4 x i32> @llvm.ppc.altivec.lvxl(i8*) #1
define <4 x i32> @test1l(<4 x i32>* %h) #0 {
entry:
- %h1 = getelementptr <4 x i32>* %h, i64 1
+ %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
%hv = bitcast <4 x i32>* %h1 to i8*
%vl = call <4 x i32> @llvm.ppc.altivec.lvxl(i8* %hv)
@@ -76,14 +76,14 @@ entry:
; CHECK: @llvm.ppc.altivec.lvxl
; CHECK: ret <4 x i32>
- %v0 = load <4 x i32>* %h, align 8
+ %v0 = load <4 x i32>, <4 x i32>* %h, align 8
%a = add <4 x i32> %v0, %vl
ret <4 x i32> %a
}
define <4 x i32> @test1la(<4 x i32>* align 16 %h) #0 {
entry:
- %h1 = getelementptr <4 x i32>* %h, i64 1
+ %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
%hv = bitcast <4 x i32>* %h1 to i8*
%vl = call <4 x i32> @llvm.ppc.altivec.lvxl(i8* %hv)
@@ -91,7 +91,7 @@ entry:
; CHECK-NOT: @llvm.ppc.altivec.lvxl
; CHECK: ret <4 x i32>
- %v0 = load <4 x i32>* %h, align 8
+ %v0 = load <4 x i32>, <4 x i32>* %h, align 8
%a = add <4 x i32> %v0, %vl
ret <4 x i32> %a
}
@@ -100,11 +100,11 @@ declare void @llvm.ppc.altivec.stvxl(<4 x i32>, i8*) #0
define <4 x i32> @test2l(<4 x i32>* %h, <4 x i32> %d) #0 {
entry:
- %h1 = getelementptr <4 x i32>* %h, i64 1
+ %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
%hv = bitcast <4 x i32>* %h1 to i8*
call void @llvm.ppc.altivec.stvxl(<4 x i32> %d, i8* %hv)
- %v0 = load <4 x i32>* %h, align 8
+ %v0 = load <4 x i32>, <4 x i32>* %h, align 8
ret <4 x i32> %v0
; CHECK-LABEL: @test2l
@@ -114,11 +114,11 @@ entry:
define <4 x i32> @test2la(<4 x i32>* align 16 %h, <4 x i32> %d) #0 {
entry:
- %h1 = getelementptr <4 x i32>* %h, i64 1
+ %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
%hv = bitcast <4 x i32>* %h1 to i8*
call void @llvm.ppc.altivec.stvxl(<4 x i32> %d, i8* %hv)
- %v0 = load <4 x i32>* %h, align 8
+ %v0 = load <4 x i32>, <4 x i32>* %h, align 8
ret <4 x i32> %v0
; CHECK-LABEL: @test2l