diff options
Diffstat (limited to 'test/Transforms/InstCombine/icmp.ll')
| -rw-r--r-- | test/Transforms/InstCombine/icmp.ll | 162 |
1 files changed, 130 insertions, 32 deletions
diff --git a/test/Transforms/InstCombine/icmp.ll b/test/Transforms/InstCombine/icmp.ll index 26e144f..279d86d 100644 --- a/test/Transforms/InstCombine/icmp.ll +++ b/test/Transforms/InstCombine/icmp.ll @@ -1148,22 +1148,6 @@ define i1 @icmp_shl_1_V_eq_32(i32 %V) { ret i1 %cmp } -; CHECK-LABEL: @icmp_shl_1_V_eq_31( -; CHECK-NEXT: ret i1 false -define i1 @icmp_shl_1_V_eq_31(i32 %V) { - %shl = shl i32 1, %V - %cmp = icmp eq i32 %shl, 31 - ret i1 %cmp -} - -; CHECK-LABEL: @icmp_shl_1_V_ne_31( -; CHECK-NEXT: ret i1 true -define i1 @icmp_shl_1_V_ne_31(i32 %V) { - %shl = shl i32 1, %V - %cmp = icmp ne i32 %shl, 31 - ret i1 %cmp -} - ; CHECK-LABEL: @icmp_shl_1_V_ult_30( ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %V, 5 ; CHECK-NEXT: ret i1 [[CMP]] @@ -1209,22 +1193,6 @@ define i1 @icmp_shl_1_V_uge_2147483648(i32 %V) { ret i1 %cmp } -; CHECK-LABEL: @icmp_shl_1_V_ugt_2147483648( -; CHECK-NEXT: ret i1 false -define i1 @icmp_shl_1_V_ugt_2147483648(i32 %V) { - %shl = shl i32 1, %V - %cmp = icmp ugt i32 %shl, 2147483648 - ret i1 %cmp -} - -; CHECK-LABEL: @icmp_shl_1_V_ule_2147483648( -; CHECK-NEXT: ret i1 true -define i1 @icmp_shl_1_V_ule_2147483648(i32 %V) { - %shl = shl i32 1, %V - %cmp = icmp ule i32 %shl, 2147483648 - ret i1 %cmp -} - ; CHECK-LABEL: @icmp_shl_1_V_ult_2147483648( ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 %V, 31 ; CHECK-NEXT: ret i1 [[CMP]] @@ -1424,3 +1392,133 @@ define i1 @icmp_neg_cst_slt(i32 %a) { %2 = icmp slt i32 %1, -10 ret i1 %2 } + +; CHECK-LABEL: @icmp_and_or_lshr +; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl nuw i32 1, %y +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[SHL]], 1 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[OR]], %x +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[AND]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +define i1 @icmp_and_or_lshr(i32 %x, i32 %y) { + %shf = lshr i32 %x, %y + %or = or i32 %shf, %x + %and = and i32 %or, 1 + %ret = icmp ne i32 %and, 0 + ret i1 %ret +} + +; CHECK-LABEL: @icmp_and_or_lshr_cst +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 3 +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[AND]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +define i1 @icmp_and_or_lshr_cst(i32 %x) { + %shf = lshr i32 %x, 1 + %or = or i32 %shf, %x + %and = and i32 %or, 1 + %ret = icmp ne i32 %and, 0 + ret i1 %ret +} + +; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_2 +; CHECK-NEXT: %cmp = icmp ugt i32 %a, 29 +; CHECK-NEXT: ret i1 %cmp +define i1 @shl_ap1_zero_ap2_non_zero_2(i32 %a) { + %shl = shl i32 4, %a + %cmp = icmp eq i32 %shl, 0 + ret i1 %cmp +} + +; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_4 +; CHECK-NEXT: %cmp = icmp ugt i32 %a, 30 +; CHECK-NEXT: ret i1 %cmp +define i1 @shl_ap1_zero_ap2_non_zero_4(i32 %a) { + %shl = shl i32 -2, %a + %cmp = icmp eq i32 %shl, 0 + ret i1 %cmp +} + +; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_positive +; CHECK-NEXT: %cmp = icmp eq i32 %a, 0 +; CHECK-NEXT: ret i1 %cmp +define i1 @shl_ap1_non_zero_ap2_non_zero_both_positive(i32 %a) { + %shl = shl i32 50, %a + %cmp = icmp eq i32 %shl, 50 + ret i1 %cmp +} + +; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_negative +; CHECK-NEXT: %cmp = icmp eq i32 %a, 0 +; CHECK-NEXT: ret i1 %cmp +define i1 @shl_ap1_non_zero_ap2_non_zero_both_negative(i32 %a) { + %shl = shl i32 -50, %a + %cmp = icmp eq i32 %shl, -50 + ret i1 %cmp +} + +; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_1 +; CHECK-NEXT: ret i1 false +define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_1(i32 %a) { + %shl = shl i32 50, %a + %cmp = icmp eq i32 %shl, 25 + ret i1 %cmp +} + +; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_2 +; CHECK-NEXT: %cmp = icmp eq i32 %a, 1 +; CHECK-NEXT: ret i1 %cmp +define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_2(i32 %a) { + %shl = shl i32 25, %a + %cmp = icmp eq i32 %shl, 50 + ret i1 %cmp +} + +; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_3 +; CHECK-NEXT: ret i1 false +define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_3(i32 %a) { + %shl = shl i32 26, %a + %cmp = icmp eq i32 %shl, 50 + ret i1 %cmp +} + +; CHECK-LABEL: @icmp_sgt_zero_add_nsw +; CHECK-NEXT: icmp sgt i32 %a, -1 +define i1 @icmp_sgt_zero_add_nsw(i32 %a) { + %add = add nsw i32 %a, 1 + %cmp = icmp sgt i32 %add, 0 + ret i1 %cmp +} + +; CHECK-LABEL: @icmp_sge_zero_add_nsw +; CHECK-NEXT: icmp sgt i32 %a, -2 +define i1 @icmp_sge_zero_add_nsw(i32 %a) { + %add = add nsw i32 %a, 1 + %cmp = icmp sge i32 %add, 0 + ret i1 %cmp +} + +; CHECK-LABEL: @icmp_slt_zero_add_nsw +; CHECK-NEXT: icmp slt i32 %a, -1 +define i1 @icmp_slt_zero_add_nsw(i32 %a) { + %add = add nsw i32 %a, 1 + %cmp = icmp slt i32 %add, 0 + ret i1 %cmp +} + +; CHECK-LABEL: @icmp_sle_zero_add_nsw +; CHECK-NEXT: icmp slt i32 %a, 0 +define i1 @icmp_sle_zero_add_nsw(i32 %a) { + %add = add nsw i32 %a, 1 + %cmp = icmp sle i32 %add, 0 + ret i1 %cmp +} + +; CHECK-LABEL: @icmp_cmpxchg_strong +; CHECK-NEXT: %[[xchg:.*]] = cmpxchg i32* %sc, i32 %old_val, i32 %new_val seq_cst seq_cst +; CHECK-NEXT: %[[icmp:.*]] = extractvalue { i32, i1 } %[[xchg]], 1 +; CHECK-NEXT: ret i1 %[[icmp]] +define zeroext i1 @icmp_cmpxchg_strong(i32* %sc, i32 %old_val, i32 %new_val) { + %xchg = cmpxchg i32* %sc, i32 %old_val, i32 %new_val seq_cst seq_cst + %xtrc = extractvalue { i32, i1 } %xchg, 0 + %icmp = icmp eq i32 %xtrc, %old_val + ret i1 %icmp +} |