diff options
Diffstat (limited to 'test/Transforms/InstCombine')
20 files changed, 767 insertions, 61 deletions
diff --git a/test/Transforms/InstCombine/2010-07-19-sqrt.ll b/test/Transforms/InstCombine/2010-07-19-sqrt.ll deleted file mode 100644 index 6505382..0000000 --- a/test/Transforms/InstCombine/2010-07-19-sqrt.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: opt -S -instcombine %s | FileCheck %s - -define float @foo(float %x) nounwind readnone ssp { -entry: -; CHECK-NOT: fpext -; CHECK-NOT: sqrt( -; CHECK: sqrtf( -; CHECK-NOT: fptrunc - %conv = fpext float %x to double ; <double> [#uses=1] - %call = tail call double @sqrt(double %conv) nounwind ; <double> [#uses=1] - %conv1 = fptrunc double %call to float ; <float> [#uses=1] -; CHECK: ret float - ret float %conv1 -} - -declare double @sqrt(double) readnone diff --git a/test/Transforms/InstCombine/2010-08-19-StoreNarrowing.ll b/test/Transforms/InstCombine/2010-08-19-StoreNarrowing.ll deleted file mode 100644 index d4d5289..0000000 --- a/test/Transforms/InstCombine/2010-08-19-StoreNarrowing.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: opt -S -instcombine %s | not grep and -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" -target triple = "x86_64-apple-darwin10.0.0" - -%class.A = type { i8, [3 x i8] } - -define void @_ZN1AC2Ev(%class.A* %this) nounwind ssp align 2 { -entry: - %0 = bitcast %class.A* %this to i32* ; <i32*> [#uses=5] - %1 = load i32* %0, align 4 ; <i32> [#uses=1] - %2 = and i32 %1, -8 ; <i32> [#uses=2] - store i32 %2, i32* %0, align 4 - %3 = and i32 %2, -57 ; <i32> [#uses=1] - %4 = or i32 %3, 8 ; <i32> [#uses=2] - store i32 %4, i32* %0, align 4 - %5 = and i32 %4, -65 ; <i32> [#uses=2] - store i32 %5, i32* %0, align 4 - %6 = and i32 %5, -129 ; <i32> [#uses=1] - store i32 %6, i32* %0, align 4 - ret void -} diff --git a/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll b/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll new file mode 100644 index 0000000..d74c70e --- /dev/null +++ b/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll @@ -0,0 +1,20 @@ +; RUN: opt -instcombine -S < %s | FileCheck %s +; <rdar://problem/8606771> + +define i32 @main(i32 %argc) nounwind ssp { +entry: + %tmp3151 = trunc i32 %argc to i8 + %tmp3161 = or i8 %tmp3151, -17 + %tmp3162 = and i8 %tmp3151, 122 + %tmp3163 = xor i8 %tmp3162, -17 + %tmp4114 = shl i8 %tmp3163, 6 + %tmp4115 = xor i8 %tmp4114, %tmp3163 + %tmp4120 = xor i8 %tmp3161, %tmp4115 +; CHECK: lshr i8 %tmp4115, 1 +; CHECK-NOT: shl i8 %tmp4126, 6 + %tmp4126 = lshr i8 %tmp4120, 7 + %tmp4127 = mul i8 %tmp4126, 64 + %tmp4086 = zext i8 %tmp4127 to i32 +; CHECK: ret i32 + ret i32 %tmp4086 +} diff --git a/test/Transforms/InstCombine/and2.ll b/test/Transforms/InstCombine/and2.ll index a5a6574..d898ea3 100644 --- a/test/Transforms/InstCombine/and2.ll +++ b/test/Transforms/InstCombine/and2.ll @@ -8,3 +8,21 @@ define i1 @test1(double %X, double %Y) { ret i1 %bothcond ; CHECK: fcmp ord double %Y, %X } + +define i1 @test2(i1 %X, i1 %Y) { + %a = and i1 %X, %Y + %b = and i1 %a, %X + ret i1 %b +; CHECK: @test2 +; CHECK-NEXT: and i1 %X, %Y +; CHECK-NEXT: ret +} + +define i32 @test3(i32 %X, i32 %Y) { + %a = and i32 %X, %Y + %b = and i32 %Y, %a + ret i32 %b +; CHECK: @test3 +; CHECK-NEXT: and i32 %X, %Y +; CHECK-NEXT: ret +} diff --git a/test/Transforms/InstCombine/bit-checks.ll b/test/Transforms/InstCombine/bit-checks.ll index d774c09..79a096f 100644 --- a/test/Transforms/InstCombine/bit-checks.ll +++ b/test/Transforms/InstCombine/bit-checks.ll @@ -23,4 +23,350 @@ entry: %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] ret i32 %storemerge -}
\ No newline at end of file +} + +; tests to check combining (icmp eq (A & B), C) & (icmp eq (A & D), E) +; tests to check if (icmp eq (A & B), 0) is treated like (icmp eq (A & B), B) +; if B is a single bit constant + +; (icmp eq (A & B), 0) & (icmp eq (A & D), 0) -> (icmp eq (A & (B|D)), 0) +define i32 @main3(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 0 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main3b(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 16 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main3e_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 0 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp ne (A & B), 0) | (icmp ne (A & D), 0) -> (icmp ne (A & (B|D)), 0) +define i32 @main3c(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 0 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main3d(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 16 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main3f_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 0 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp eq (A & B), B) & (icmp eq (A & D), D) -> (icmp eq (A & (B|D)), (B|D)) +define i32 @main4(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 48 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main4b(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 0 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main4e_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, %argc2 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %argc3 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp ne (A & B), B) | (icmp ne (A & D), D) -> (icmp ne (A & (B|D)), (B|D)) +define i32 @main4c(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 48 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main4d(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 0 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main4f_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, %argc2 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, %argc3 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp eq (A & B), A) & (icmp eq (A & D), A) -> (icmp eq (A & (B&D)), A) +define i32 @main5_like(i32 %argc, i32 %argc2, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc2, 7 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 7 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main5e_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, %argc ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %argc ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp ne (A & B), A) | (icmp ne (A & D), A) -> (icmp ne (A & (B&D)), A) +define i32 @main5c_like(i32 %argc, i32 %argc2, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc2, 7 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 7 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main5f_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, %argc ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, %argc ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp eq (A & B), C) & (icmp eq (A & D), E) -> (icmp eq (A & (B|D)), (C|E)) +; if B, C, D, E are constant, and it's possible +define i32 @main6(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 3 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 16 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main6b(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 3 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 0 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp ne (A & B), C) | (icmp ne (A & D), E) -> (icmp ne (A & (B|D)), (C|E)) +; if B, C, D, E are constant, and it's possible +define i32 @main6c(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 3 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 16 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main6d(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 3 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 0 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; test parameter permutations +; (B & A) == B & (D & A) == D +define i32 @main7a(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and1 = and i32 %argc2, %argc ; <i32> [#uses=1] + %tobool = icmp eq i32 %and1, %argc2 ; <i1> [#uses=1] + %and2 = and i32 %argc3, %argc ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %argc3 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; B == (A & B) & D == (A & D) +define i32 @main7b(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and1 = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp eq i32 %argc2, %and1 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %argc3, %and2 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; B == (B & A) & D == (D & A) +define i32 @main7c(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and1 = and i32 %argc2, %argc ; <i32> [#uses=1] + %tobool = icmp eq i32 %argc2, %and1 ; <i1> [#uses=1] + %and2 = and i32 %argc3, %argc ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %argc3, %and2 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (A & (B & C)) == (B & C) & (A & (D & E)) == (D & E) +define i32 @main7d(i32 %argc, i32 %argc2, i32 %argc3, + i32 %argc4, i32 %argc5, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %bc = and i32 %argc2, %argc4 ; <i32> [#uses=1] + %de = and i32 %argc3, %argc5 ; <i32> [#uses=1] + %and1 = and i32 %argc, %bc ; <i32> [#uses=1] + %tobool = icmp eq i32 %and1, %bc ; <i1> [#uses=1] + %and2 = and i32 %argc, %de ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %de ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; ((B & C) & A) == (B & C) & ((D & E) & A) == (D & E) +define i32 @main7e(i32 %argc, i32 %argc2, i32 %argc3, + i32 %argc4, i32 %argc5, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %bc = and i32 %argc2, %argc4 ; <i32> [#uses=1] + %de = and i32 %argc3, %argc5 ; <i32> [#uses=1] + %and1 = and i32 %bc, %argc ; <i32> [#uses=1] + %tobool = icmp eq i32 %and1, %bc ; <i1> [#uses=1] + %and2 = and i32 %de, %argc ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %de ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (B & C) == (A & (B & C)) & (D & E) == (A & (D & E)) +define i32 @main7f(i32 %argc, i32 %argc2, i32 %argc3, + i32 %argc4, i32 %argc5, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %bc = and i32 %argc2, %argc4 ; <i32> [#uses=1] + %de = and i32 %argc3, %argc5 ; <i32> [#uses=1] + %and1 = and i32 %argc, %bc ; <i32> [#uses=1] + %tobool = icmp eq i32 %bc, %and1 ; <i1> [#uses=1] + %and2 = and i32 %argc, %de ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %de, %and2 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (B & C) == ((B & C) & A) & (D & E) == ((D & E) & A) +define i32 @main7g(i32 %argc, i32 %argc2, i32 %argc3, + i32 %argc4, i32 %argc5, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %bc = and i32 %argc2, %argc4 ; <i32> [#uses=1] + %de = and i32 %argc3, %argc5 ; <i32> [#uses=1] + %and1 = and i32 %bc, %argc ; <i32> [#uses=1] + %tobool = icmp eq i32 %bc, %and1 ; <i1> [#uses=1] + %and2 = and i32 %de, %argc ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %de, %and2 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} diff --git a/test/Transforms/InstCombine/bitcast-store.ll b/test/Transforms/InstCombine/bitcast-store.ll new file mode 100644 index 0000000..e4a61e9 --- /dev/null +++ b/test/Transforms/InstCombine/bitcast-store.ll @@ -0,0 +1,21 @@ +; RUN: opt -S -instcombine < %s | FileCheck %s + +; Instcombine should preserve metadata and alignment while +; folding a bitcast into a store. + +; CHECK: store i32 (...)** bitcast (i8** getelementptr inbounds ([5 x i8*]* @G, i64 0, i64 2) to i32 (...)**), i32 (...)*** %0, align 16, !tag !0 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" + +%struct.A = type { i32 (...)** } + +@G = external constant [5 x i8*] + +define void @foo(%struct.A* %a) nounwind { +entry: + %0 = bitcast %struct.A* %a to i8*** + store i8** getelementptr inbounds ([5 x i8*]* @G, i64 0, i64 2), i8*** %0, align 16, !tag !0 + ret void +} + +!0 = metadata !{metadata !"hello"} diff --git a/test/Transforms/InstCombine/cast.ll b/test/Transforms/InstCombine/cast.ll index 102d2f0..7547877 100644 --- a/test/Transforms/InstCombine/cast.ll +++ b/test/Transforms/InstCombine/cast.ll @@ -437,8 +437,8 @@ define i64 @test47(i8 %A) { ret i64 %E ; CHECK: @test47 ; CHECK-NEXT: %B = sext i8 %A to i64 -; CHECK-NEXT: %C = or i64 %B, 42 -; CHECK-NEXT: %E = and i64 %C, 4294967295 +; CHECK-NEXT: %C = and i64 %B, 4294967253 +; CHECK-NEXT: %E = or i64 %C, 42 ; CHECK-NEXT: ret i64 %E } @@ -508,8 +508,8 @@ define i32 @test52(i64 %A) { ret i32 %E ; CHECK: @test52 ; CHECK-NEXT: %B = trunc i64 %A to i32 -; CHECK-NEXT: %C = or i32 %B, 32962 -; CHECK-NEXT: %D = and i32 %C, 40186 +; CHECK-NEXT: %C = and i32 %B, 7224 +; CHECK-NEXT: %D = or i32 %C, 32962 ; CHECK-NEXT: ret i32 %D } @@ -521,8 +521,8 @@ define i64 @test53(i32 %A) { ret i64 %E ; CHECK: @test53 ; CHECK-NEXT: %B = zext i32 %A to i64 -; CHECK-NEXT: %C = or i64 %B, 32962 -; CHECK-NEXT: %D = and i64 %C, 40186 +; CHECK-NEXT: %C = and i64 %B, 7224 +; CHECK-NEXT: %D = or i64 %C, 32962 ; CHECK-NEXT: ret i64 %D } @@ -534,8 +534,8 @@ define i32 @test54(i64 %A) { ret i32 %E ; CHECK: @test54 ; CHECK-NEXT: %B = trunc i64 %A to i32 -; CHECK-NEXT: %C = or i32 %B, -32574 -; CHECK-NEXT: %D = and i32 %C, -25350 +; CHECK-NEXT: %C = and i32 %B, 7224 +; CHECK-NEXT: %D = or i32 %C, -32574 ; CHECK-NEXT: ret i32 %D } @@ -547,8 +547,8 @@ define i64 @test55(i32 %A) { ret i64 %E ; CHECK: @test55 ; CHECK-NEXT: %B = zext i32 %A to i64 -; CHECK-NEXT: %C = or i64 %B, -32574 -; CHECK-NEXT: %D = and i64 %C, -25350 +; CHECK-NEXT: %C = and i64 %B, 7224 +; CHECK-NEXT: %D = or i64 %C, -32574 ; CHECK-NEXT: ret i64 %D } @@ -584,8 +584,8 @@ define i64 @test58(i64 %A) nounwind { ; CHECK: @test58 ; CHECK-NEXT: %C = lshr i64 %A, 8 -; CHECK-NEXT: %D = or i64 %C, 128 -; CHECK-NEXT: %E = and i64 %D, 16777215 +; CHECK-NEXT: %D = and i64 %C, 16777087 +; CHECK-NEXT: %E = or i64 %D, 128 ; CHECK-NEXT: ret i64 %E } diff --git a/test/Transforms/InstCombine/crash.ll b/test/Transforms/InstCombine/crash.ll index 30d467e..a600af0 100644 --- a/test/Transforms/InstCombine/crash.ll +++ b/test/Transforms/InstCombine/crash.ll @@ -252,3 +252,36 @@ entry: %conv6 = zext i1 %cmp5 to i32 ; <i32> [#uses=0] ret void } + +%s1 = type { %s2, %s2, [6 x %s2], i32, i32, i32, [1 x i32], [0 x i8] } +%s2 = type { i64 } +define void @test13() nounwind ssp { +entry: + %0 = getelementptr inbounds %s1* null, i64 0, i32 2, i64 0, i32 0 + %1 = bitcast i64* %0 to i32* + %2 = getelementptr inbounds %s1* null, i64 0, i32 2, i64 1, i32 0 + %.pre = load i32* %1, align 8 + %3 = lshr i32 %.pre, 19 + %brmerge = or i1 undef, undef + %4 = and i32 %3, 3 + %5 = add nsw i32 %4, 1 + %6 = shl i32 %5, 19 + %7 = add i32 %6, 1572864 + %8 = and i32 %7, 1572864 + %9 = load i64* %2, align 8 + %trunc156 = trunc i64 %9 to i32 + %10 = and i32 %trunc156, -1537 + %11 = and i32 %10, -6145 + %12 = or i32 %11, 2048 + %13 = and i32 %12, -24577 + %14 = or i32 %13, 16384 + %15 = or i32 %14, 98304 + store i32 %15, i32* undef, align 8 + %16 = and i32 %15, -1572865 + %17 = or i32 %16, %8 + store i32 %17, i32* undef, align 8 + %18 = and i32 %17, -449 + %19 = or i32 %18, 64 + store i32 %19, i32* undef, align 8 + unreachable +} diff --git a/test/Transforms/InstCombine/fold-calls.ll b/test/Transforms/InstCombine/fold-calls.ll new file mode 100644 index 0000000..504f874 --- /dev/null +++ b/test/Transforms/InstCombine/fold-calls.ll @@ -0,0 +1,19 @@ +; RUN: opt -instcombine -S < %s | FileCheck %s + +; This shouldn't fold, because sin(inf) is invalid. +; CHECK: @foo +; CHECK: %t = call double @sin(double 0x7FF0000000000000) +define double @foo() { + %t = call double @sin(double 0x7FF0000000000000) + ret double %t +} + +; This should fold. +; CHECK: @bar +; CHECK: ret double 0.0 +define double @bar() { + %t = call double @sin(double 0.0) + ret double %t +} + +declare double @sin(double) diff --git a/test/Transforms/InstCombine/memcpy.ll b/test/Transforms/InstCombine/memcpy.ll index 2e7b2c0..8a2e3aa 100644 --- a/test/Transforms/InstCombine/memcpy.ll +++ b/test/Transforms/InstCombine/memcpy.ll @@ -1,10 +1,19 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind -define void @test4(i8* %a) { - tail call void @llvm.memcpy.i32( i8* %a, i8* %a, i32 100, i32 1 ) +define void @test1(i8* %a) { + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %a, i32 100, i32 1, i1 false) ret void -} -; CHECK: define void @test4 +; CHECK: define void @test1 ; CHECK-NEXT: ret void +} + + +; PR8267 +define void @test2(i8* %a) { + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %a, i32 100, i32 1, i1 true) + ret void +; CHECK: define void @test2 +; CHECK-NEXT: call void @llvm.memcpy +} diff --git a/test/Transforms/InstCombine/neon-intrinsics.ll b/test/Transforms/InstCombine/neon-intrinsics.ll new file mode 100644 index 0000000..3ad09cc --- /dev/null +++ b/test/Transforms/InstCombine/neon-intrinsics.ll @@ -0,0 +1,25 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +; The alignment arguments for NEON load/store intrinsics can be increased +; by instcombine. Check for this. + +; CHECK: vld4.v2i32({{.*}}, i32 32) +; CHECK: vst4.v2i32({{.*}}, i32 16) + +@x = common global [8 x i32] zeroinitializer, align 32 +@y = common global [8 x i32] zeroinitializer, align 16 + +%struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } + +define void @test() nounwind ssp { + %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8* bitcast ([8 x i32]* @x to i8*), i32 1) + %tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 1 + %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2 + %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 3 + call void @llvm.arm.neon.vst4.v2i32(i8* bitcast ([8 x i32]* @y to i8*), <2 x i32> %tmp2, <2 x i32> %tmp3, <2 x i32> %tmp4, <2 x i32> %tmp5, i32 1) + ret void +} + +declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8*, i32) nounwind readonly +declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll index c3526b7..500cad2 100644 --- a/test/Transforms/InstCombine/or.ll +++ b/test/Transforms/InstCombine/or.ll @@ -316,8 +316,8 @@ entry: %E = or i32 %D, %C ret i32 %E ; CHECK: @test30 -; CHECK: %B = or i32 %A, 32962 -; CHECK: %E = and i32 %B, -25350 +; CHECK: %D = and i32 %A, -58312 +; CHECK: %E = or i32 %D, 32962 ; CHECK: ret i32 %E } @@ -332,8 +332,8 @@ define i64 @test31(i64 %A) nounwind readnone ssp noredzone { %F = or i64 %D, %E ret i64 %F ; CHECK: @test31 -; CHECK-NEXT: %bitfield = or i64 %A, 32962 -; CHECK-NEXT: %F = and i64 %bitfield, 4294941946 +; CHECK-NEXT: %E1 = and i64 %A, 4294908984 +; CHECK-NEXT: %F = or i64 %E1, 32962 ; CHECK-NEXT: ret i64 %F } @@ -350,3 +350,29 @@ define <4 x i32> @test32(<4 x i1> %and.i1352, <4 x i32> %vecinit6.i176, <4 x i32 ; CHECK: or <4 x i32> %and.i, %and.i129 } +define i1 @test33(i1 %X, i1 %Y) { + %a = or i1 %X, %Y + %b = or i1 %a, %X + ret i1 %b +; CHECK: @test33 +; CHECK-NEXT: or i1 %X, %Y +; CHECK-NEXT: ret +} + +define i32 @test34(i32 %X, i32 %Y) { + %a = or i32 %X, %Y + %b = or i32 %Y, %a + ret i32 %b +; CHECK: @test34 +; CHECK-NEXT: or i32 %X, %Y +; CHECK-NEXT: ret +} + +define i32 @test35(i32 %a, i32 %b) { + %1 = or i32 %a, 1135 + %2 = or i32 %1, %b + ret i32 %2 + ; CHECK: @test35 + ; CHECK-NEXT: or i32 %a, %b + ; CHECK-NEXT: or i32 %1, 1135 +} diff --git a/test/Transforms/InstCombine/phi.ll b/test/Transforms/InstCombine/phi.ll index fc321e9..c3e034f 100644 --- a/test/Transforms/InstCombine/phi.ll +++ b/test/Transforms/InstCombine/phi.ll @@ -402,3 +402,89 @@ if.else: ; preds = %entry store i32 %tmp5, i32* %res br label %if.end } + +; PR4413 +declare i32 @ext() +; CHECK: @test17 +define i32 @test17(i1 %a) { +entry: + br i1 %a, label %bb1, label %bb2 + +bb1: ; preds = %entry + %0 = tail call i32 @ext() ; <i32> [#uses=1] + br label %bb2 + +bb2: ; preds = %bb1, %entry + %cond = phi i1 [ true, %bb1 ], [ false, %entry ] ; <i1> [#uses=1] +; CHECK-NOT: %val = phi i32 [ %0, %bb1 ], [ 0, %entry ] + %val = phi i32 [ %0, %bb1 ], [ 0, %entry ] ; <i32> [#uses=1] + %res = select i1 %cond, i32 %val, i32 0 ; <i32> [#uses=1] +; CHECK: ret i32 %cond + ret i32 %res +} + +define i1 @test18(i1 %cond) { + %zero = alloca i32 + %one = alloca i32 + br i1 %cond, label %true, label %false +true: + br label %ret +false: + br label %ret +ret: + %ptr = phi i32* [ %zero, %true ] , [ %one, %false ] + %isnull = icmp eq i32* %ptr, null + ret i1 %isnull +; CHECK: @test18 +; CHECK: ret i1 false +} + +define i1 @test19(i1 %cond, double %x) { + br i1 %cond, label %true, label %false +true: + br label %ret +false: + br label %ret +ret: + %p = phi double [ %x, %true ], [ 0x7FF0000000000000, %false ]; RHS = +infty + %cmp = fcmp ule double %x, %p + ret i1 %cmp +; CHECK: @test19 +; CHECK: ret i1 true +} + +define i1 @test20(i1 %cond) { + %a = alloca i32 + %b = alloca i32 + %c = alloca i32 + br i1 %cond, label %true, label %false +true: + br label %ret +false: + br label %ret +ret: + %p = phi i32* [ %a, %true ], [ %b, %false ] + %r = icmp eq i32* %p, %c + ret i1 %r +; CHECK: @test20 +; CHECK: ret i1 false +} + +define i1 @test21(i1 %c1, i1 %c2) { + %a = alloca i32 + %b = alloca i32 + %c = alloca i32 + br i1 %c1, label %true, label %false +true: + br label %loop +false: + br label %loop +loop: + %p = phi i32* [ %a, %true ], [ %b, %false ], [ %p, %loop ] + %r = icmp eq i32* %p, %c + br i1 %c2, label %ret, label %loop +ret: + ret i1 %r +; CHECK: @test21 +; CHECK: ret i1 false +} diff --git a/test/Transforms/InstCombine/pr8547.ll b/test/Transforms/InstCombine/pr8547.ll new file mode 100644 index 0000000..f26035c --- /dev/null +++ b/test/Transforms/InstCombine/pr8547.ll @@ -0,0 +1,26 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +; Converting the 2 shifts to SHL 6 without the AND is wrong. PR 8547. + +@g_2 = global i32 0, align 4 +@.str = constant [10 x i8] c"g_2 = %d\0A\00" + +declare i32 @printf(i8*, ...) + +define i32 @main() nounwind { +codeRepl: + br label %for.cond + +for.cond: ; preds = %for.cond, %codeRepl + %storemerge = phi i32 [ 0, %codeRepl ], [ 5, %for.cond ] + store i32 %storemerge, i32* @g_2, align 4 + %shl = shl i32 %storemerge, 30 + %conv2 = lshr i32 %shl, 24 +; CHECK: %0 = shl i32 %storemerge, 6 +; CHECK: %conv2 = and i32 %0, 64 + %tobool = icmp eq i32 %conv2, 0 + br i1 %tobool, label %for.cond, label %codeRepl2 + +codeRepl2: ; preds = %for.cond + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([10 x i8]* @.str, i64 0, i64 0), i32 %conv2) nounwind + ret i32 0 +}
\ No newline at end of file diff --git a/test/Transforms/InstCombine/select-crash.ll b/test/Transforms/InstCombine/select-crash.ll new file mode 100644 index 0000000..8ee3369 --- /dev/null +++ b/test/Transforms/InstCombine/select-crash.ll @@ -0,0 +1,20 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +; Formerly crashed, PR8490. + +define fastcc double @gimp_operation_color_balance_map(float %value, double %highlights) nounwind readnone inlinehint { +entry: +; CHECK: gimp_operation_color_balance_map +; CHECK: fsub double -0.000000 + %conv = fpext float %value to double + %div = fdiv double %conv, 1.600000e+01 + %add = fadd double %div, 1.000000e+00 + %div1 = fdiv double 1.000000e+00, %add + %sub = fsub double 1.075000e+00, %div1 + %sub24 = fsub double 1.000000e+00, %sub + %add26 = fadd double %sub, 1.000000e+00 + %cmp86 = fcmp ogt double %highlights, 0.000000e+00 + %cond90 = select i1 %cmp86, double %sub24, double %add26 + %mul91 = fmul double %highlights, %cond90 + %add94 = fadd double undef, %mul91 + ret double %add94 +} diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll index 246a7bc..120d158 100644 --- a/test/Transforms/InstCombine/select.ll +++ b/test/Transforms/InstCombine/select.ll @@ -470,3 +470,42 @@ define i32 @test37(i32 %x) { ; CHECK: or i32 {{.*}}, 1 ; CHECK: ret } + +define i1 @test38(i1 %cond) { + %zero = alloca i32 + %one = alloca i32 + %ptr = select i1 %cond, i32* %zero, i32* %one + %isnull = icmp eq i32* %ptr, null + ret i1 %isnull +; CHECK: @test38 +; CHECK: ret i1 false +} + +define i1 @test39(i1 %cond, double %x) { + %s = select i1 %cond, double %x, double 0x7FF0000000000000 ; RHS = +infty + %cmp = fcmp ule double %x, %s + ret i1 %cmp +; CHECK: @test39 +; CHECK: ret i1 true +} + +define i1 @test40(i1 %cond) { + %a = alloca i32 + %b = alloca i32 + %c = alloca i32 + %s = select i1 %cond, i32* %a, i32* %b + %r = icmp eq i32* %s, %c + ret i1 %r +; CHECK: @test40 +; CHECK: ret i1 false +} + +define i32 @test41(i1 %cond, i32 %x, i32 %y) { + %z = and i32 %x, %y + %s = select i1 %cond, i32 %y, i32 %z + %r = and i32 %x, %s + ret i32 %r +; CHECK: @test41 +; CHECK: %r = and i32 %x, %y +; CHECK: ret i32 %r +} diff --git a/test/Transforms/InstCombine/sqrt.ll b/test/Transforms/InstCombine/sqrt.ll new file mode 100644 index 0000000..69e511b --- /dev/null +++ b/test/Transforms/InstCombine/sqrt.ll @@ -0,0 +1,32 @@ +; RUN: opt -S -instcombine %s | FileCheck %s + +define float @test1(float %x) nounwind readnone ssp { +entry: +; CHECK: @test1 +; CHECK-NOT: fpext +; CHECK-NOT: sqrt( +; CHECK: sqrtf( +; CHECK-NOT: fptrunc + %conv = fpext float %x to double ; <double> [#uses=1] + %call = tail call double @sqrt(double %conv) readnone nounwind ; <double> [#uses=1] + %conv1 = fptrunc double %call to float ; <float> [#uses=1] +; CHECK: ret float + ret float %conv1 +} + +declare double @sqrt(double) + +; PR8096 +define float @test2(float %x) nounwind readnone ssp { +entry: +; CHECK: @test2 +; CHECK-NOT: fpext +; CHECK-NOT: sqrt( +; CHECK: sqrtf( +; CHECK-NOT: fptrunc + %conv = fpext float %x to double ; <double> [#uses=1] + %call = tail call double @sqrt(double %conv) nounwind ; <double> [#uses=1] + %conv1 = fptrunc double %call to float ; <float> [#uses=1] +; CHECK: ret float + ret float %conv1 +} diff --git a/test/Transforms/InstCombine/urem-simplify-bug.ll b/test/Transforms/InstCombine/urem-simplify-bug.ll index 7c2b4b0..229f1a8 100644 --- a/test/Transforms/InstCombine/urem-simplify-bug.ll +++ b/test/Transforms/InstCombine/urem-simplify-bug.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -instcombine -S | grep {= or i32 %x, -5 } +; RUN: opt < %s -instcombine -S | grep {= or i32 %x, -5} @.str = internal constant [5 x i8] c"foo\0A\00" ; <[5 x i8]*> [#uses=1] @.str1 = internal constant [5 x i8] c"bar\0A\00" ; <[5 x i8]*> [#uses=1] diff --git a/test/Transforms/InstCombine/vec_shuffle.ll b/test/Transforms/InstCombine/vec_shuffle.ll index 5132a8f..bd36e9e 100644 --- a/test/Transforms/InstCombine/vec_shuffle.ll +++ b/test/Transforms/InstCombine/vec_shuffle.ll @@ -87,3 +87,26 @@ define <4 x i8> @test9(<16 x i8> %tmp6) nounwind { %tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1] ret <4 x i8> %tmp9 } + +; Same as test9, but make sure that "undef" mask values are not confused with +; mask values of 2*N, where N is the mask length. These shuffles should not +; be folded (because [8,9,4,8] may not be a mask supported by the target). +define <4 x i8> @test9a(<16 x i8> %tmp6) nounwind { +; CHECK: @test9a +; CHECK-NEXT: shufflevector +; CHECK-NEXT: shufflevector +; CHECK-NEXT: ret + %tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 undef, i32 9, i32 4, i32 8 > ; <<4 x i8>> [#uses=1] + %tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1] + ret <4 x i8> %tmp9 +} + +; Redundant vector splats should be removed. Radar 8597790. +define <4 x i32> @test10(<4 x i32> %tmp5) nounwind { +; CHECK: @test10 +; CHECK-NEXT: shufflevector +; CHECK-NEXT: ret + %tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> + %tmp7 = shufflevector <4 x i32> %tmp6, <4 x i32> undef, <4 x i32> zeroinitializer + ret <4 x i32> %tmp7 +} diff --git a/test/Transforms/InstCombine/xor2.ll b/test/Transforms/InstCombine/xor2.ll index 67f05ef..89f00bd 100644 --- a/test/Transforms/InstCombine/xor2.ll +++ b/test/Transforms/InstCombine/xor2.ll @@ -34,7 +34,7 @@ define i32 @test2(i32 %tmp1) { define i32 @test3(i32 %tmp1) { ; CHECK: @test3 ; CHECK-NEXT: and i32 %tmp1, 32 -; CHECK-NEXT: or i32 %tmp, 8 +; CHECK-NEXT: or i32 %ovm, 8 ; CHECK-NEXT: ret i32 %ovm = or i32 %tmp1, 145 %ov31 = and i32 %ovm, 177 |