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-rw-r--r--test/CodeGen/X86/misched-new.ll26
1 files changed, 26 insertions, 0 deletions
diff --git a/test/CodeGen/X86/misched-new.ll b/test/CodeGen/X86/misched-new.ll
index cec04b5..a39ea03 100644
--- a/test/CodeGen/X86/misched-new.ll
+++ b/test/CodeGen/X86/misched-new.ll
@@ -51,3 +51,29 @@ if.end: ; preds = %if.then, %entry
}
declare void @bar(i32,i32)
+
+; Test that the DAG builder can handle an undef vreg on ExitSU.
+; CHECK: hasundef
+; CHECK: call
+
+%t0 = type { i32, i32, i8 }
+%t6 = type { i32 (...)**, %t7* }
+%t7 = type { i32 (...)** }
+
+define void @hasundef() unnamed_addr uwtable ssp align 2 {
+ %1 = alloca %t0, align 8
+ br i1 undef, label %3, label %2
+
+; <label>:2 ; preds = %0
+ unreachable
+
+; <label>:3 ; preds = %0
+ br i1 undef, label %4, label %5
+
+; <label>:4 ; preds = %3
+ call void undef(%t6* undef, %t0* %1)
+ unreachable
+
+; <label>:5 ; preds = %3
+ ret void
+}