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-rw-r--r--test/CodeGen/X86/avx2-intrinsics-x86.ll80
-rw-r--r--test/MC/Disassembler/X86/simple-tests.txt6
-rw-r--r--test/MC/X86/x86_64-avx-encoding.s8
3 files changed, 94 insertions, 0 deletions
diff --git a/test/CodeGen/X86/avx2-intrinsics-x86.ll b/test/CodeGen/X86/avx2-intrinsics-x86.ll
index 3f27a02..3fb3497 100644
--- a/test/CodeGen/X86/avx2-intrinsics-x86.ll
+++ b/test/CodeGen/X86/avx2-intrinsics-x86.ll
@@ -976,3 +976,83 @@ define void @test_x86_avx_storeu_dq_256(i8* %a0, <32 x i8> %a1) {
ret void
}
declare void @llvm.x86.avx.storeu.dq.256(i8*, <32 x i8>) nounwind
+
+define <2 x double> @test_x86_avx2_gather_d_pd(<2 x double> %a0, i8* %a1,
+ <4 x i32> %idx, <2 x double> %mask) {
+ ; CHECK: vgatherdpd
+ %res = call <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double> %a0,
+ i8* %a1, <4 x i32> %idx, <2 x double> %mask, i8 2) ;
+ ret <2 x double> %res
+}
+declare <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double>, i8*,
+ <4 x i32>, <2 x double>, i8) nounwind readonly
+
+define <4 x double> @test_x86_avx2_gather_d_pd_256(<4 x double> %a0, i8* %a1,
+ <8 x i32> %idx, <4 x double> %mask) {
+ ; CHECK: vgatherdpd
+ %res = call <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double> %a0,
+ i8* %a1, <8 x i32> %idx, <4 x double> %mask, i8 2) ;
+ ret <4 x double> %res
+}
+declare <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double>, i8*,
+ <8 x i32>, <4 x double>, i8) nounwind readonly
+
+define <2 x double> @test_x86_avx2_gather_q_pd(<2 x double> %a0, i8* %a1,
+ <2 x i64> %idx, <2 x double> %mask) {
+ ; CHECK: vgatherqpd
+ %res = call <2 x double> @llvm.x86.avx2.gather.q.pd(<2 x double> %a0,
+ i8* %a1, <2 x i64> %idx, <2 x double> %mask, i8 2) ;
+ ret <2 x double> %res
+}
+declare <2 x double> @llvm.x86.avx2.gather.q.pd(<2 x double>, i8*,
+ <2 x i64>, <2 x double>, i8) nounwind readonly
+
+define <4 x double> @test_x86_avx2_gather_q_pd_256(<4 x double> %a0, i8* %a1,
+ <4 x i64> %idx, <4 x double> %mask) {
+ ; CHECK: vgatherqpd
+ %res = call <4 x double> @llvm.x86.avx2.gather.q.pd.256(<4 x double> %a0,
+ i8* %a1, <4 x i64> %idx, <4 x double> %mask, i8 2) ;
+ ret <4 x double> %res
+}
+declare <4 x double> @llvm.x86.avx2.gather.q.pd.256(<4 x double>, i8*,
+ <4 x i64>, <4 x double>, i8) nounwind readonly
+
+define <4 x float> @test_x86_avx2_gather_d_ps(<4 x float> %a0, i8* %a1,
+ <4 x i32> %idx, <4 x float> %mask) {
+ ; CHECK: vgatherdps
+ %res = call <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float> %a0,
+ i8* %a1, <4 x i32> %idx, <4 x float> %mask, i8 2) ;
+ ret <4 x float> %res
+}
+declare <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float>, i8*,
+ <4 x i32>, <4 x float>, i8) nounwind readonly
+
+define <8 x float> @test_x86_avx2_gather_d_ps_256(<8 x float> %a0, i8* %a1,
+ <8 x i32> %idx, <8 x float> %mask) {
+ ; CHECK: vgatherdps
+ %res = call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> %a0,
+ i8* %a1, <8 x i32> %idx, <8 x float> %mask, i8 2) ;
+ ret <8 x float> %res
+}
+declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*,
+ <8 x i32>, <8 x float>, i8) nounwind readonly
+
+define <4 x float> @test_x86_avx2_gather_q_ps(<4 x float> %a0, i8* %a1,
+ <2 x i64> %idx, <4 x float> %mask) {
+ ; CHECK: vgatherqps
+ %res = call <4 x float> @llvm.x86.avx2.gather.q.ps(<4 x float> %a0,
+ i8* %a1, <2 x i64> %idx, <4 x float> %mask, i8 2) ;
+ ret <4 x float> %res
+}
+declare <4 x float> @llvm.x86.avx2.gather.q.ps(<4 x float>, i8*,
+ <2 x i64>, <4 x float>, i8) nounwind readonly
+
+define <8 x float> @test_x86_avx2_gather_q_ps_256(<8 x float> %a0, i8* %a1,
+ <4 x i64> %idx, <8 x float> %mask) {
+ ; CHECK: vgatherqps
+ %res = call <8 x float> @llvm.x86.avx2.gather.q.ps.256(<8 x float> %a0,
+ i8* %a1, <4 x i64> %idx, <8 x float> %mask, i8 2) ;
+ ret <8 x float> %res
+}
+declare <8 x float> @llvm.x86.avx2.gather.q.ps.256(<8 x float>, i8*,
+ <4 x i64>, <8 x float>, i8) nounwind readonly
diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt
index c0e77d0..c543e46 100644
--- a/test/MC/Disassembler/X86/simple-tests.txt
+++ b/test/MC/Disassembler/X86/simple-tests.txt
@@ -725,6 +725,12 @@
# CHECK: vpermil2ps $1, 4(%rax), %xmm2, %xmm3, %xmm0
0xc4 0xe3 0xe1 0x48 0x40 0x04 0x21
+# CHECK: vgatherdpd %xmm0, (%rdi,%xmm1,2), %xmm2
+0xc4 0xe2 0xe9 0x92 0x04 0x4f
+
+# CHECK: vgatherqps %ymm8, (%r15,%ymm9,2), %ymm10
+0xc4 0x02 0x2d 0x93 0x04 0x4f
+
# rdar://8812056 lldb doesn't print the x86 lock prefix when disassembling
# CHECK: lock
# CHECK-NEXT: xaddq %rcx, %rbx
diff --git a/test/MC/X86/x86_64-avx-encoding.s b/test/MC/X86/x86_64-avx-encoding.s
index cdc5da4..77c0ff3 100644
--- a/test/MC/X86/x86_64-avx-encoding.s
+++ b/test/MC/X86/x86_64-avx-encoding.s
@@ -4121,3 +4121,11 @@ _foo:
_foo2:
nop
vblendvps %ymm1, _foo2(%rip), %ymm0, %ymm0
+
+// CHECK: vgatherdpd %xmm0, (%rdi,%xmm1,2), %xmm2
+// CHECK: encoding: [0xc4,0xe2,0xe9,0x92,0x04,0x4f]
+ vgatherdpd %xmm0, (%rdi,%xmm1,2), %xmm2
+
+// CHECK: vgatherqps %ymm8, (%r15,%ymm9,2), %ymm10
+// CHECK: encoding: [0xc4,0x02,0x2d,0x93,0x04,0x4f]
+ vgatherqps %ymm8, (%r15,%ymm9,2), %ymm10