diff options
Diffstat (limited to 'test')
1008 files changed, 22689 insertions, 6873 deletions
diff --git a/test/Analysis/BasicAA/full-store-partial-alias.ll b/test/Analysis/BasicAA/full-store-partial-alias.ll new file mode 100644 index 0000000..4fa6375 --- /dev/null +++ b/test/Analysis/BasicAA/full-store-partial-alias.ll @@ -0,0 +1,33 @@ +; RUN: opt -S -tbaa -basicaa -gvn < %s | grep {ret i32 %} +; RUN: opt -S -tbaa -gvn < %s | grep {ret i32 0} +; rdar://8875631, rdar://8875069 + +; BasicAA should notice that the store stores to the entire %u object, +; so the %tmp5 load is PartialAlias with the store and suppress TBAA. +; Without BasicAA, TBAA should say that %tmp5 is NoAlias with the store. + +target datalayout = "e-p:64:64:64" + +%union.anon = type { double } + +@u = global %union.anon { double -2.500000e-01 }, align 8 +@endianness_test = global i64 1, align 8 + +define i32 @signbit(double %x) nounwind { +entry: + %u = alloca %union.anon, align 8 + %tmp9 = getelementptr inbounds %union.anon* %u, i64 0, i32 0 + store double %x, double* %tmp9, align 8, !tbaa !0 + %tmp2 = load i32* bitcast (i64* @endianness_test to i32*), align 8, !tbaa !3 + %idxprom = sext i32 %tmp2 to i64 + %tmp4 = bitcast %union.anon* %u to [2 x i32]* + %arrayidx = getelementptr inbounds [2 x i32]* %tmp4, i64 0, i64 %idxprom + %tmp5 = load i32* %arrayidx, align 4, !tbaa !3 + %tmp5.lobit = lshr i32 %tmp5, 31 + ret i32 %tmp5.lobit +} + +!0 = metadata !{metadata !"double", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} +!3 = metadata !{metadata !"int", metadata !1} diff --git a/test/Analysis/BasicAA/global-size.ll b/test/Analysis/BasicAA/global-size.ll index b9cbbcc..a7e5aab 100644 --- a/test/Analysis/BasicAA/global-size.ll +++ b/test/Analysis/BasicAA/global-size.ll @@ -1,16 +1,40 @@ ; A store or load cannot alias a global if the accessed amount is larger then ; the global. -; RUN: opt < %s -basicaa -gvn -instcombine -S | not grep load +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" -@B = global i16 8 ; <i16*> [#uses=2] +@B = global i16 8 -define i16 @test(i32* %P) { - %X = load i16* @B ; <i16> [#uses=1] +; CHECK: @test1 +define i16 @test1(i32* %P) { + %X = load i16* @B store i32 7, i32* %P - %Y = load i16* @B ; <i16> [#uses=1] - %Z = sub i16 %Y, %X ; <i16> [#uses=1] + %Y = load i16* @B + %Z = sub i16 %Y, %X ret i16 %Z +; CHECK: ret i16 0 +} + +; Cannot know anything about the size of this global. +; rdar://8813415 +@window = external global [0 x i8] + +; CHECK: @test2 +define i8 @test2(i32 %tmp79, i32 %w.2, i32 %indvar89) nounwind { + %tmp92 = add i32 %tmp79, %indvar89 + %arrayidx412 = getelementptr [0 x i8]* @window, i32 0, i32 %tmp92 + %tmp93 = add i32 %w.2, %indvar89 + %arrayidx416 = getelementptr [0 x i8]* @window, i32 0, i32 %tmp93 + + %A = load i8* %arrayidx412, align 1 + store i8 4, i8* %arrayidx416, align 1 + + %B = load i8* %arrayidx412, align 1 + %C = sub i8 %A, %B + ret i8 %C + +; CHECK: %B = load i8 +; CHECK: ret i8 %C } diff --git a/test/Analysis/BasicAA/modref.ll b/test/Analysis/BasicAA/modref.ll index b9a3c5e..ec0c8a7 100644 --- a/test/Analysis/BasicAA/modref.ll +++ b/test/Analysis/BasicAA/modref.ll @@ -85,11 +85,11 @@ define void @test3a(i8* %P, i8 %X) { %Y = add i8 %X, 1 ;; Dead, because the only use (the store) is dead. %P2 = getelementptr i8* %P, i32 2 - store i8 %Y, i8* %P2 ;; FIXME: Killed by llvm.lifetime.end, should be zapped. -; CHECK: store i8 %Y, i8* %P2 + store i8 %Y, i8* %P2 +; CHECK-NEXT: call void @llvm.lifetime.end call void @llvm.lifetime.end(i64 10, i8* %P) ret void -; CHECK: ret void +; CHECK-NEXT: ret void } @G1 = external global i32 @@ -105,7 +105,7 @@ define i32 @test4(i8* %P) { ; CHECK: load i32* @G ; CHECK: memset.p0i8.i32 ; CHECK-NOT: load -; CHECK: sub i32 %tmp, %tmp +; CHECK: ret i32 0 } ; Verify that basicaa is handling variable length memcpy, knowing it doesn't @@ -120,7 +120,7 @@ define i32 @test5(i8* %P, i32 %Len) { ; CHECK: load i32* @G ; CHECK: memcpy.p0i8.p0i8.i32 ; CHECK-NOT: load -; CHECK: sub i32 %tmp, %tmp +; CHECK: ret i32 0 } define i8 @test6(i8* %p, i8* noalias %a) { diff --git a/test/Analysis/Profiling/profiling-tool-chain.ll b/test/Analysis/Profiling/profiling-tool-chain.ll index 5ac31b5..9135a85 100644 --- a/test/Analysis/Profiling/profiling-tool-chain.ll +++ b/test/Analysis/Profiling/profiling-tool-chain.ll @@ -9,8 +9,8 @@ ; Test the creation, reading and displaying of profile ; RUX: rm -f llvmprof.out -; RUX: lli -load %llvmlibsdir/profile_rt%shlibext %t2 -; RUX: lli -load %llvmlibsdir/profile_rt%shlibext %t2 1 2 +; RUX: lli -load %llvmshlibdir/profile_rt%shlibext %t2 +; RUX: lli -load %llvmshlibdir/profile_rt%shlibext %t2 1 2 ; RUX: llvm-prof -print-all-code %t1 | FileCheck --check-prefix=PROF %s ; Test the loaded profile also with verifier. diff --git a/test/Analysis/ScalarEvolution/2010-09-03-RequiredTransitive.ll b/test/Analysis/ScalarEvolution/2010-09-03-RequiredTransitive.ll new file mode 100644 index 0000000..aba0ce7 --- /dev/null +++ b/test/Analysis/ScalarEvolution/2010-09-03-RequiredTransitive.ll @@ -0,0 +1,24 @@ +; RUN: opt -indvars -scalar-evolution -analyze %s +; This test checks if the SCEV analysis is printed out at all. +; It failed once as the RequiredTransitive option was not implemented +; correctly. + +define i32 @main() nounwind { +entry: + br label %for.cond + +for.cond: ; preds = %for.inc, %entry + %indvar1 = phi i64 [ %indvar.next2, %for.inc ], [ 0, %entry ] ; <i64> [#uses=3] + %exitcond = icmp ne i64 %indvar1, 1024 ; <i1> [#uses=1] + br i1 %exitcond, label %for.body, label %for.end + +for.body: ; preds = %for.cond + br label %for.inc + +for.inc: ; preds = %for.body + %indvar.next2 = add i64 %indvar1, 1 ; <i64> [#uses=1] + br label %for.cond + +for.end: ; preds = %for.cond + ret i32 0 +} diff --git a/test/Analysis/ScalarEvolution/fold.ll b/test/Analysis/ScalarEvolution/fold.ll new file mode 100644 index 0000000..4e2adf1 --- /dev/null +++ b/test/Analysis/ScalarEvolution/fold.ll @@ -0,0 +1,62 @@ +; RUN: opt -analyze -scalar-evolution %s -S | FileCheck %s + +define i16 @test1(i8 %x) { + %A = zext i8 %x to i12 + %B = sext i12 %A to i16 +; CHECK: zext i8 %x to i16 + ret i16 %B +} + +define i8 @test2(i8 %x) { + %A = zext i8 %x to i16 + %B = add i16 %A, 1025 + %C = trunc i16 %B to i8 +; CHECK: (1 + %x) + ret i8 %C +} + +define i8 @test3(i8 %x) { + %A = zext i8 %x to i16 + %B = mul i16 %A, 1027 + %C = trunc i16 %B to i8 +; CHECK: (3 * %x) + ret i8 %C +} + +define void @test4(i32 %x, i32 %y) { +entry: + %Y = and i32 %y, 3 + br label %loop +loop: + %A = phi i32 [0, %entry], [%I, %loop] + %rand1 = icmp sgt i32 %A, %Y + %Z1 = select i1 %rand1, i32 %A, i32 %Y + %rand2 = icmp ugt i32 %A, %Z1 + %Z2 = select i1 %rand2, i32 %A, i32 %Z1 +; CHECK: %Z2 = +; CHECK-NEXT: --> ([[EXPR:.*]]){{ +}}Exits: 20 + %B = trunc i32 %Z2 to i16 + %C = sext i16 %B to i30 +; CHECK: %C = +; CHECK-NEXT: (trunc i32 ([[EXPR]]) to i30) + %D = sext i16 %B to i32 +; CHECK: %D = +; CHECK-NEXT: ([[EXPR]]) + %E = sext i16 %B to i34 +; CHECK: %E = +; CHECK-NEXT: (zext i32 ([[EXPR]]) to i34) + %F = zext i16 %B to i30 +; CHECK: %F = +; CHECK-NEXT: (trunc i32 ([[EXPR]]) to i30 + %G = zext i16 %B to i32 +; CHECK: %G = +; CHECK-NEXT: ([[EXPR]]) + %H = zext i16 %B to i34 +; CHECK: %H = +; CHECK-NEXT: (zext i32 ([[EXPR]]) to i34) + %I = add i32 %A, 1 + %0 = icmp ne i32 %A, 20 + br i1 %0, label %loop, label %exit +exit: + ret void +} diff --git a/test/Analysis/ScalarEvolution/nsw.ll b/test/Analysis/ScalarEvolution/nsw.ll index 456f3f0..9d8e2b6 100644 --- a/test/Analysis/ScalarEvolution/nsw.ll +++ b/test/Analysis/ScalarEvolution/nsw.ll @@ -1,10 +1,11 @@ -; RUN: opt < %s -analyze -scalar-evolution | grep { --> {.*,+,.*}<%bb>} | count 8 +; RUN: opt < %s -analyze -scalar-evolution | FileCheck %s ; The addrecs in this loop are analyzable only by using nsw information. target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64" -define void @foo(double* %p) nounwind { +; CHECK: Classifying expressions for: @test1 +define void @test1(double* %p) nounwind { entry: %tmp = load double* %p, align 8 ; <double> [#uses=1] %tmp1 = fcmp ogt double %tmp, 2.000000e+00 ; <i1> [#uses=1] @@ -15,19 +16,29 @@ bb.nph: ; preds = %entry bb: ; preds = %bb1, %bb.nph %i.01 = phi i32 [ %tmp8, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=3] +; CHECK: %i.01 +; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%bb> %tmp2 = sext i32 %i.01 to i64 ; <i64> [#uses=1] %tmp3 = getelementptr double* %p, i64 %tmp2 ; <double*> [#uses=1] %tmp4 = load double* %tmp3, align 8 ; <double> [#uses=1] %tmp5 = fmul double %tmp4, 9.200000e+00 ; <double> [#uses=1] %tmp6 = sext i32 %i.01 to i64 ; <i64> [#uses=1] %tmp7 = getelementptr double* %p, i64 %tmp6 ; <double*> [#uses=1] +; CHECK: %tmp7 +; CHECK-NEXT: --> {%p,+,8}<%bb> store double %tmp5, double* %tmp7, align 8 %tmp8 = add nsw i32 %i.01, 1 ; <i32> [#uses=2] +; CHECK: %tmp8 +; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%bb> br label %bb1 bb1: ; preds = %bb %phitmp = sext i32 %tmp8 to i64 ; <i64> [#uses=1] +; CHECK: %phitmp +; CHECK-NEXT: --> {1,+,1}<%bb> %tmp9 = getelementptr double* %p, i64 %phitmp ; <double*> [#uses=1] +; CHECK: %tmp9 +; CHECK-NEXT: --> {(8 + %p),+,8}<%bb> %tmp10 = load double* %tmp9, align 8 ; <double> [#uses=1] %tmp11 = fcmp ogt double %tmp10, 2.000000e+00 ; <i1> [#uses=1] br i1 %tmp11, label %bb, label %bb1.return_crit_edge @@ -38,3 +49,58 @@ bb1.return_crit_edge: ; preds = %bb1 return: ; preds = %bb1.return_crit_edge, %entry ret void } + +; CHECK: Classifying expressions for: @test2 +define void @test2(i32* %begin, i32* %end) ssp { +entry: + %cmp1.i.i = icmp eq i32* %begin, %end + br i1 %cmp1.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.lr.ph.i.i + +for.body.lr.ph.i.i: ; preds = %entry + br label %for.body.i.i + +for.body.i.i: ; preds = %for.body.i.i, %for.body.lr.ph.i.i + %__first.addr.02.i.i = phi i32* [ %begin, %for.body.lr.ph.i.i ], [ %ptrincdec.i.i, %for.body.i.i ] +; CHECK: %__first.addr.02.i.i +; CHECK-NEXT: --> {%begin,+,4}<nsw><%for.body.i.i> + store i32 0, i32* %__first.addr.02.i.i, align 4 + %ptrincdec.i.i = getelementptr inbounds i32* %__first.addr.02.i.i, i64 1 +; CHECK: %ptrincdec.i.i +; CHECK-NEXT: --> {(4 + %begin),+,4}<nsw><%for.body.i.i> + %cmp.i.i = icmp eq i32* %ptrincdec.i.i, %end + br i1 %cmp.i.i, label %for.cond.for.end_crit_edge.i.i, label %for.body.i.i + +for.cond.for.end_crit_edge.i.i: ; preds = %for.body.i.i + br label %_ZSt4fillIPiiEvT_S1_RKT0_.exit + +_ZSt4fillIPiiEvT_S1_RKT0_.exit: ; preds = %entry, %for.cond.for.end_crit_edge.i.i + ret void +} + +; Various checks for inbounds geps. +define void @test3(i32* %begin, i32* %end) nounwind ssp { +entry: + %cmp7.i.i = icmp eq i32* %begin, %end + br i1 %cmp7.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.i.i + +for.body.i.i: ; preds = %entry, %for.body.i.i + %indvar.i.i = phi i64 [ %tmp, %for.body.i.i ], [ 0, %entry ] +; CHECK: %indvar.i.i +; CHECK: {0,+,1}<nuw><nsw><%for.body.i.i> + %tmp = add nsw i64 %indvar.i.i, 1 +; CHECK: %tmp = +; CHECK: {1,+,1}<nuw><nsw><%for.body.i.i> + %ptrincdec.i.i = getelementptr inbounds i32* %begin, i64 %tmp +; CHECK: %ptrincdec.i.i = +; CHECK: {(4 + %begin),+,4}<nsw><%for.body.i.i> + %__first.addr.08.i.i = getelementptr inbounds i32* %begin, i64 %indvar.i.i +; CHECK: %__first.addr.08.i.i +; CHECK: {%begin,+,4}<nsw><%for.body.i.i> + store i32 0, i32* %__first.addr.08.i.i, align 4 + %cmp.i.i = icmp eq i32* %ptrincdec.i.i, %end + br i1 %cmp.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.i.i +; CHECK: Loop %for.body.i.i: Unpredictable backedge-taken count. +; CHECK: Loop %for.body.i.i: Unpredictable max backedge-taken count. +_ZSt4fillIPiiEvT_S1_RKT0_.exit: ; preds = %for.body.i.i, %entry + ret void +}
\ No newline at end of file diff --git a/test/Analysis/ScalarEvolution/scev-aa.ll b/test/Analysis/ScalarEvolution/scev-aa.ll index 866664a..dd5a66c 100644 --- a/test/Analysis/ScalarEvolution/scev-aa.ll +++ b/test/Analysis/ScalarEvolution/scev-aa.ll @@ -190,9 +190,8 @@ define void @bar() { ret void } -; TODO: This is theoretically provable to be NoAlias. ; CHECK: Function: nonnegative: 2 pointers, 0 call sites -; CHECK: MayAlias: i64* %arrayidx, i64* %p +; CHECK: NoAlias: i64* %arrayidx, i64* %p define void @nonnegative(i64* %p) nounwind { entry: @@ -211,6 +210,6 @@ for.end: ; preds = %for.body, %entry ret void } -; CHECK: 13 no alias responses -; CHECK: 27 may alias responses +; CHECK: 14 no alias responses +; CHECK: 26 may alias responses ; CHECK: 18 must alias responses diff --git a/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll b/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll index e9b479d..d59e392 100644 --- a/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll +++ b/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -enable-tbaa -tbaa -basicaa -gvn -S | FileCheck %s +; RUN: opt < %s -tbaa -basicaa -gvn -S | FileCheck %s ; Test that basic alias queries work. diff --git a/test/Analysis/TypeBasedAliasAnalysis/argument-promotion.ll b/test/Analysis/TypeBasedAliasAnalysis/argument-promotion.ll index 83046aa..3b5211e 100644 --- a/test/Analysis/TypeBasedAliasAnalysis/argument-promotion.ll +++ b/test/Analysis/TypeBasedAliasAnalysis/argument-promotion.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -enable-tbaa -tbaa -basicaa -argpromotion -mem2reg -S | not grep alloca +; RUN: opt < %s -tbaa -basicaa -argpromotion -mem2reg -S | not grep alloca target datalayout = "E-p:64:64:64" diff --git a/test/Analysis/TypeBasedAliasAnalysis/dse.ll b/test/Analysis/TypeBasedAliasAnalysis/dse.ll index 09a7f2c..6b44eb6 100644 --- a/test/Analysis/TypeBasedAliasAnalysis/dse.ll +++ b/test/Analysis/TypeBasedAliasAnalysis/dse.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -enable-tbaa -tbaa -basicaa -dse -S | FileCheck %s +; RUN: opt < %s -tbaa -basicaa -dse -S | FileCheck %s ; DSE should make use of TBAA. diff --git a/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll b/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll index 53cce0c..8fb5fff 100644 --- a/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll +++ b/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -enable-tbaa -tbaa -basicaa -functionattrs -S | FileCheck %s +; RUN: opt < %s -tbaa -basicaa -functionattrs -S | FileCheck %s ; FunctionAttrs should make use of TBAA. diff --git a/test/Analysis/TypeBasedAliasAnalysis/gvn-nonlocal-type-mismatch.ll b/test/Analysis/TypeBasedAliasAnalysis/gvn-nonlocal-type-mismatch.ll index d605193..eceaa2c 100644 --- a/test/Analysis/TypeBasedAliasAnalysis/gvn-nonlocal-type-mismatch.ll +++ b/test/Analysis/TypeBasedAliasAnalysis/gvn-nonlocal-type-mismatch.ll @@ -1,4 +1,4 @@ -; RUN: opt -enable-tbaa -tbaa -basicaa -gvn -S < %s | FileCheck %s +; RUN: opt -tbaa -basicaa -gvn -S < %s | FileCheck %s target datalayout = "e-p:64:64:64" diff --git a/test/Analysis/TypeBasedAliasAnalysis/licm.ll b/test/Analysis/TypeBasedAliasAnalysis/licm.ll index aa0ebdb..12a9c1d 100644 --- a/test/Analysis/TypeBasedAliasAnalysis/licm.ll +++ b/test/Analysis/TypeBasedAliasAnalysis/licm.ll @@ -1,4 +1,4 @@ -; RUN: opt -tbaa -licm -enable-tbaa -S < %s | FileCheck %s +; RUN: opt -tbaa -licm -S < %s | FileCheck %s ; LICM should be able to hoist the address load out of the loop ; by using TBAA information. diff --git a/test/Analysis/TypeBasedAliasAnalysis/memcpyopt.ll b/test/Analysis/TypeBasedAliasAnalysis/memcpyopt.ll new file mode 100644 index 0000000..c2407df --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/memcpyopt.ll @@ -0,0 +1,23 @@ +; RUN: opt -S -tbaa -basicaa -memcpyopt -instcombine < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +; The second memcpy is redundant and can be deleted. There's an intervening store, but +; it has a TBAA tag which declares that it is unrelated. + +; CHECK: @foo +; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !0 +; CHECK-NEXT: store i8 2, i8* %s, align 1, !tbaa !2 +; CHECK-NEXT: ret void +define void @foo(i8* nocapture %p, i8* nocapture %q, i8* nocapture %s) nounwind { + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !2 + store i8 2, i8* %s, align 1, !tbaa !1 + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %q, i8* %p, i64 16, i32 1, i1 false), !tbaa !2 + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +!0 = metadata !{metadata !"tbaa root", null} +!1 = metadata !{metadata !"A", metadata !0} +!2 = metadata !{metadata !"B", metadata !0} diff --git a/test/Analysis/TypeBasedAliasAnalysis/precedence.ll b/test/Analysis/TypeBasedAliasAnalysis/precedence.ll index 9fa859e..47cb5f2 100644 --- a/test/Analysis/TypeBasedAliasAnalysis/precedence.ll +++ b/test/Analysis/TypeBasedAliasAnalysis/precedence.ll @@ -1,5 +1,5 @@ -; RUN: opt -enable-tbaa -basicaa -tbaa -gvn -instcombine -S < %s | grep {ret i32 0} -; RUN: opt -enable-tbaa -tbaa -basicaa -gvn -instcombine -S < %s | grep {ret i32 1075000115} +; RUN: opt -basicaa -tbaa -gvn -instcombine -S < %s | FileCheck %s --check-prefix=TBAA +; RUN: opt -tbaa -basicaa -gvn -instcombine -S < %s | FileCheck %s --check-prefix=BASICAA ; According to the TBAA metadata the load and store don't alias. However, ; according to the actual code, they do. The order of the alias analysis @@ -7,6 +7,12 @@ target datalayout = "e-p:64:64:64" +; Test for simple MustAlias aliasing. + +; TBAA: @trouble +; TBAA: ret i32 0 +; BASICAA: @trouble +; BASICAA: ret i32 1075000115 define i32 @trouble(i32* %x) nounwind { entry: store i32 0, i32* %x, !tbaa !0 @@ -16,6 +22,25 @@ entry: ret i32 %tmp3 } +; Test for PartialAlias aliasing. GVN doesn't yet eliminate the load +; in the BasicAA case. + +; TBAA: @offset +; TBAA: ret i64 0 +; BASICAA: @offset +; BASICAA: ret i64 %tmp3 +define i64 @offset(i64* %x) nounwind { +entry: + store i64 0, i64* %x, !tbaa !4 + %0 = bitcast i64* %x to i8* + %1 = getelementptr i8* %0, i64 1 + store i8 1, i8* %1, !tbaa !5 + %tmp3 = load i64* %x, !tbaa !4 + ret i64 %tmp3 +} + !0 = metadata !{metadata !"int", metadata !1} !1 = metadata !{metadata !"simple"} !3 = metadata !{metadata !"float", metadata !1} +!4 = metadata !{metadata !"long", metadata !1} +!5 = metadata !{metadata !"small", metadata !1} diff --git a/test/Analysis/TypeBasedAliasAnalysis/sink.ll b/test/Analysis/TypeBasedAliasAnalysis/sink.ll index e9bb61f..fd32d6a 100644 --- a/test/Analysis/TypeBasedAliasAnalysis/sink.ll +++ b/test/Analysis/TypeBasedAliasAnalysis/sink.ll @@ -1,4 +1,4 @@ -; RUN: opt -tbaa -enable-tbaa -sink -S < %s | FileCheck %s +; RUN: opt -tbaa -sink -S < %s | FileCheck %s ; CHECK: a: ; CHECK: %f = load float* %p, !tbaa !2 diff --git a/test/Archive/GNU.toc b/test/Archive/GNU.toc deleted file mode 100644 index d993413..0000000 --- a/test/Archive/GNU.toc +++ /dev/null @@ -1,4 +0,0 @@ -evenlen -oddlen -very_long_bytecode_file_name.bc -IsNAN.o diff --git a/test/Archive/MacOSX.toc b/test/Archive/MacOSX.toc deleted file mode 100644 index f971df7..0000000 --- a/test/Archive/MacOSX.toc +++ /dev/null @@ -1,5 +0,0 @@ -__.SYMDEF SORTED -evenlen -oddlen -very_long_bytecode_file_name.bc -IsNAN.o diff --git a/test/Archive/SVR4.toc b/test/Archive/SVR4.toc deleted file mode 100644 index d993413..0000000 --- a/test/Archive/SVR4.toc +++ /dev/null @@ -1,4 +0,0 @@ -evenlen -oddlen -very_long_bytecode_file_name.bc -IsNAN.o diff --git a/test/Archive/extract.ll b/test/Archive/extract.ll index 3649714..714c5f1 100644 --- a/test/Archive/extract.ll +++ b/test/Archive/extract.ll @@ -4,13 +4,13 @@ ; from various style archives. ; RUN: llvm-ar x %p/GNU.a very_long_bytecode_file_name.bc -; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc >/dev/null 2>/dev/null +; RUN: cmp -s %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc ; RUN: llvm-ar x %p/MacOSX.a very_long_bytecode_file_name.bc -; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc > /dev/null 2>/dev/null +; RUN: cmp -s %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc ; RUN: llvm-ar x %p/SVR4.a very_long_bytecode_file_name.bc -; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc >/dev/null 2>/dev/null +; RUN: cmp -s %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc ; RUN: llvm-ar x %p/xpg4.a very_long_bytecode_file_name.bc -; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc >/dev/null 2>/dev/null +; RUN: cmp -s %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc diff --git a/test/Archive/toc_GNU.ll b/test/Archive/toc_GNU.ll index 136f603..9ed7d8e 100644 --- a/test/Archive/toc_GNU.ll +++ b/test/Archive/toc_GNU.ll @@ -1,5 +1,8 @@ ;This isn't really an assembly file, its just here to run the test. ;This test just makes sure that llvm-ar can generate a table of contents for ;GNU style archives -;RUN: llvm-ar t %p/GNU.a > %t1 -;RUN: diff %t1 %p/GNU.toc +;RUN: llvm-ar t %p/GNU.a | FileCheck %s +;CHECK: evenlen +;CHECK-NEXT: oddlen +;CHECK-NEXT: very_long_bytecode_file_name.bc +;CHECK-NEXT: IsNAN.o diff --git a/test/Archive/toc_MacOSX.ll b/test/Archive/toc_MacOSX.ll index fb03223..6dbc9d2 100644 --- a/test/Archive/toc_MacOSX.ll +++ b/test/Archive/toc_MacOSX.ll @@ -1,5 +1,9 @@ ;This isn't really an assembly file, its just here to run the test. ;This test just makes sure that llvm-ar can generate a table of contents for ;MacOSX style archives -;RUN: llvm-ar t %p/MacOSX.a > %t1 -;RUN: diff %t1 %p/MacOSX.toc +;RUN: llvm-ar t %p/MacOSX.a | FileCheck %s +;CHECK: __.SYMDEF SORTED +;CHECK-NEXT: evenlen +;CHECK-NEXT: oddlen +;CHECK-NEXT: very_long_bytecode_file_name.bc +;CHECK-NEXT: IsNAN.o diff --git a/test/Archive/toc_SVR4.ll b/test/Archive/toc_SVR4.ll index 930a26f..d447b92 100644 --- a/test/Archive/toc_SVR4.ll +++ b/test/Archive/toc_SVR4.ll @@ -1,5 +1,8 @@ ;This isn't really an assembly file, its just here to run the test. ;This test just makes sure that llvm-ar can generate a table of contents for ;SVR4 style archives -;RUN: llvm-ar t %p/SVR4.a > %t1 -;RUN: diff %t1 %p/SVR4.toc +;RUN: llvm-ar t %p/SVR4.a | FileCheck %s +;CHECK: evenlen +;CHECK-NEXT: oddlen +;CHECK-NEXT: very_long_bytecode_file_name.bc +;CHECK-NEXT: IsNAN.o diff --git a/test/Archive/toc_xpg4.ll b/test/Archive/toc_xpg4.ll index 441af03..fd875ee 100644 --- a/test/Archive/toc_xpg4.ll +++ b/test/Archive/toc_xpg4.ll @@ -1,5 +1,8 @@ ;This isn't really an assembly file, its just here to run the test. ;This test just makes sure that llvm-ar can generate a table of contents for ;xpg4 style archives -;RUN: llvm-ar t %p/xpg4.a > %t1 -;RUN: diff %t1 %p/xpg4.toc +;RUN: llvm-ar t %p/xpg4.a | FileCheck %s +CHECK: evenlen +CHECK-NEXT: oddlen +CHECK-NEXT: very_long_bytecode_file_name.bc +CHECK-NEXT: IsNAN.o diff --git a/test/Archive/xpg4.toc b/test/Archive/xpg4.toc deleted file mode 100644 index d993413..0000000 --- a/test/Archive/xpg4.toc +++ /dev/null @@ -1,4 +0,0 @@ -evenlen -oddlen -very_long_bytecode_file_name.bc -IsNAN.o diff --git a/test/Assembler/2003-05-21-MalformedShiftCrash.ll b/test/Assembler/2003-05-21-MalformedShiftCrash.ll index c661f7c..a845d89 100644 --- a/test/Assembler/2003-05-21-MalformedShiftCrash.ll +++ b/test/Assembler/2003-05-21-MalformedShiftCrash.ll @@ -1,4 +1,4 @@ ; Found by inspection of the code -; RUN: not llvm-as < %s > /dev/null |& grep {constexpr requires integer or integer vector operands} +; RUN: not llvm-as < %s > /dev/null |& grep {constexpr requires integer operands} global i32 ashr (float 1.0, float 2.0) diff --git a/test/Assembler/extractvalue-invalid-idx.ll b/test/Assembler/extractvalue-invalid-idx.ll new file mode 100644 index 0000000..f9644ea --- /dev/null +++ b/test/Assembler/extractvalue-invalid-idx.ll @@ -0,0 +1,8 @@ +; RUN: not llvm-as < %s |& grep {invalid indices for extractvalue} +; PR4170 + +define void @test() { +entry: + extractvalue [0 x i32] undef, 0 + ret void +} diff --git a/test/Assembler/flags.ll b/test/Assembler/flags.ll index 3241909..310b807 100644 --- a/test/Assembler/flags.ll +++ b/test/Assembler/flags.ll @@ -92,6 +92,12 @@ define i64 @mul_both_reversed(i64 %x, i64 %y) { ret i64 %z } +define i64 @shl_both(i64 %x, i64 %y) { +; CHECK: %z = shl nuw nsw i64 %x, %y + %z = shl nuw nsw i64 %x, %y + ret i64 %z +} + define i64 @sdiv_exact(i64 %x, i64 %y) { ; CHECK: %z = sdiv exact i64 %x, %y %z = sdiv exact i64 %x, %y @@ -104,6 +110,42 @@ define i64 @sdiv_plain(i64 %x, i64 %y) { ret i64 %z } +define i64 @udiv_exact(i64 %x, i64 %y) { +; CHECK: %z = udiv exact i64 %x, %y + %z = udiv exact i64 %x, %y + ret i64 %z +} + +define i64 @udiv_plain(i64 %x, i64 %y) { +; CHECK: %z = udiv i64 %x, %y + %z = udiv i64 %x, %y + ret i64 %z +} + +define i64 @ashr_plain(i64 %x, i64 %y) { +; CHECK: %z = ashr i64 %x, %y + %z = ashr i64 %x, %y + ret i64 %z +} + +define i64 @ashr_exact(i64 %x, i64 %y) { +; CHECK: %z = ashr exact i64 %x, %y + %z = ashr exact i64 %x, %y + ret i64 %z +} + +define i64 @lshr_plain(i64 %x, i64 %y) { +; CHECK: %z = lshr i64 %x, %y + %z = lshr i64 %x, %y + ret i64 %z +} + +define i64 @lshr_exact(i64 %x, i64 %y) { +; CHECK: %z = lshr exact i64 %x, %y + %z = lshr exact i64 %x, %y + ret i64 %z +} + define i64* @gep_nw(i64* %p, i64 %x) { ; CHECK: %z = getelementptr inbounds i64* %p, i64 %x %z = getelementptr inbounds i64* %p, i64 %x @@ -136,6 +178,21 @@ define i64 @sdiv_exact_ce() { ret i64 sdiv exact (i64 ptrtoint (i64* @addr to i64), i64 91) } +define i64 @udiv_exact_ce() { +; CHECK: ret i64 udiv exact (i64 ptrtoint (i64* @addr to i64), i64 91) + ret i64 udiv exact (i64 ptrtoint (i64* @addr to i64), i64 91) +} + +define i64 @ashr_exact_ce() { +; CHECK: ret i64 ashr exact (i64 ptrtoint (i64* @addr to i64), i64 9) + ret i64 ashr exact (i64 ptrtoint (i64* @addr to i64), i64 9) +} + +define i64 @lshr_exact_ce() { +; CHECK: ret i64 lshr exact (i64 ptrtoint (i64* @addr to i64), i64 9) + ret i64 lshr exact (i64 ptrtoint (i64* @addr to i64), i64 9) +} + define i64* @gep_nw_ce() { ; CHECK: ret i64* getelementptr inbounds (i64* @addr, i64 171) ret i64* getelementptr inbounds (i64* @addr, i64 171) @@ -196,6 +253,12 @@ define i64 @mul_signed_ce() { ret i64 mul nsw (i64 ptrtoint (i64* @addr to i64), i64 91) } +define i64 @shl_signed_ce() { +; CHECK: ret i64 shl nsw (i64 ptrtoint (i64* @addr to i64), i64 17) + ret i64 shl nsw (i64 ptrtoint (i64* @addr to i64), i64 17) +} + + define i64 @add_unsigned_ce() { ; CHECK: ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91) ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91) @@ -210,3 +273,4 @@ define i64 @mul_unsigned_ce() { ; CHECK: ret i64 mul nuw (i64 ptrtoint (i64* @addr to i64), i64 91) ret i64 mul nuw (i64 ptrtoint (i64* @addr to i64), i64 91) } + diff --git a/test/Assembler/insertvalue-invalid-idx.ll b/test/Assembler/insertvalue-invalid-idx.ll new file mode 100644 index 0000000..86e7258 --- /dev/null +++ b/test/Assembler/insertvalue-invalid-idx.ll @@ -0,0 +1,7 @@ +; RUN: not llvm-as < %s |& grep {invalid indices for insertvalue} + +define void @test() { +entry: + insertvalue [0 x i32] undef, i32 0, 0 + ret void +} diff --git a/test/Assembler/unnamed-addr.ll b/test/Assembler/unnamed-addr.ll new file mode 100644 index 0000000..3c94ca2 --- /dev/null +++ b/test/Assembler/unnamed-addr.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llvm-dis | FileCheck %s + +%struct.foobar = type { i32 } + +@bar.d = internal unnamed_addr constant %struct.foobar zeroinitializer, align 4 +@foo.d = internal constant %struct.foobar zeroinitializer, align 4 + +define i32 @main() unnamed_addr nounwind ssp { +entry: + %call2 = tail call i32 @zed(%struct.foobar* @foo.d, %struct.foobar* @bar.d) nounwind + ret i32 0 +} + +declare i32 @zed(%struct.foobar*, %struct.foobar*) + +; CHECK: @bar.d = internal unnamed_addr constant %struct.foobar zeroinitializer, align 4 +; CHECK: @foo.d = internal constant %struct.foobar zeroinitializer, align 4 +; CHECK: define i32 @main() unnamed_addr nounwind ssp { diff --git a/test/Bindings/Ocaml/ext_exc.ml b/test/Bindings/Ocaml/ext_exc.ml new file mode 100644 index 0000000..b4d2e6d --- /dev/null +++ b/test/Bindings/Ocaml/ext_exc.ml @@ -0,0 +1,17 @@ +(* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_bitreader.cmxa llvm_executionengine.cmxa %s -o %t + * RUN: %t </dev/null + * XFAIL: vg_leak + *) +let context = Llvm.global_context () +(* this used to crash, we must not use 'external' in .mli files, but 'val' if we + * want the let _ bindings executed, see http://caml.inria.fr/mantis/view.php?id=4166 *) +let _ = + try + ignore (Llvm_bitreader.get_module context (Llvm.MemoryBuffer.of_stdin ())) + with + Llvm_bitreader.Error _ -> ();; +let _ = + try + ignore (Llvm.MemoryBuffer.of_file "/path/to/nonexistent/file") + with + Llvm.IoError _ -> ();; diff --git a/test/BugPoint/crash-narrowfunctiontest.ll b/test/BugPoint/crash-narrowfunctiontest.ll index 18a31eb..d080d9d 100644 --- a/test/BugPoint/crash-narrowfunctiontest.ll +++ b/test/BugPoint/crash-narrowfunctiontest.ll @@ -1,8 +1,7 @@ ; Test that bugpoint can narrow down the testcase to the important function -; FIXME: This likely fails on windows ; -; RUN: bugpoint -load %llvmlibsdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null -; XFAIL: mingw +; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null +; REQUIRES: loadable_module define i32 @foo() { ret i32 1 } diff --git a/test/BugPoint/metadata.ll b/test/BugPoint/metadata.ll index f2541ee..0eda566 100644 --- a/test/BugPoint/metadata.ll +++ b/test/BugPoint/metadata.ll @@ -1,6 +1,6 @@ -; RUN: bugpoint -load %llvmlibsdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null +; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null ; RUN: llvm-dis %t-reduced-simplified.bc -o - | FileCheck %s -; XFAIL: mingw +; REQUIRES: loadable_module ; Bugpoint should keep the call's metadata attached to the call. diff --git a/test/BugPoint/remove_arguments_test.ll b/test/BugPoint/remove_arguments_test.ll index 791ec69..29a03b8 100644 --- a/test/BugPoint/remove_arguments_test.ll +++ b/test/BugPoint/remove_arguments_test.ll @@ -1,7 +1,6 @@ -; FIXME: This likely fails on windows -; RUN: bugpoint -load %llvmlibsdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes +; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes ; RUN: llvm-dis %t-reduced-simplified.bc -o - | FileCheck %s -; XFAIL: mingw +; REQUIRES: loadable_module ; Test to make sure that arguments are removed from the function if they are ; unnecessary. And clean up any types that that frees up too. diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index 5a8678b..b696682 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -7,6 +7,8 @@ set(TARGETS_TO_BUILD ${TARGETS_BUILT}) set(LLVM_LIBS_DIR "${LLVM_BINARY_DIR}/lib/${CMAKE_CFG_INTDIR}") set(SHLIBEXT "${LTDL_SHLIB_EXT}") +set(SHLIBDIR "${LLVM_BINARY_DIR}/lib/${CMAKE_CFG_INTDIR}") + if(BUILD_SHARED_LIBS) set(LLVM_SHARED_LIBS_ENABLED "1") else() @@ -50,20 +52,14 @@ if(PYTHONINTERP_FOUND) MAKE_DIRECTORY(${CMAKE_CURRENT_BINARY_DIR}/Unit) + # Configuration-time: See Unit/lit.site.cfg.in + set(LLVM_BUILD_MODE "%(build_mode)s") + set(LLVM_SOURCE_DIR ${LLVM_MAIN_SRC_DIR}) set(LLVM_BINARY_DIR ${LLVM_BINARY_DIR}) - set(LLVM_TOOLS_DIR "${LLVM_TOOLS_BINARY_DIR}/${CMAKE_CFG_INTDIR}") + set(LLVM_TOOLS_DIR "${LLVM_TOOLS_BINARY_DIR}/%(build_config)s") set(LLVMGCCDIR "") set(PYTHON_EXECUTABLE ${PYTHON_EXECUTABLE}) - if (CMAKE_CONFIGURATION_TYPES) - # FIXME: We have no idea. It could be any of them... So just output all of - # them. - set(LLVM_BUILD_MODE "${CMAKE_CONFIGURATION_TYPES}") - elseif (CMAKE_BUILD_TYPE) - set(LLVM_BUILD_MODE "${CMAKE_BUILD_TYPE}") - else() - set(LLVM_BUILD_MODE "None") - endif() set(ENABLE_SHARED ${LLVM_SHARED_LIBS_ENABLED}) set(SHLIBPATH_VAR ${SHLIBPATH_VAR}) @@ -81,9 +77,21 @@ if(PYTHONINTERP_FOUND) ${LLVM_SOURCE_DIR}/utils/lit/lit.py --param llvm_site_config=${CMAKE_CURRENT_BINARY_DIR}/lit.site.cfg --param llvm_unit_site_config=${CMAKE_CURRENT_BINARY_DIR}/Unit/lit.site.cfg + --param build_config=${CMAKE_CFG_INTDIR} + --param build_mode=${RUNTIME_BUILD_MODE} ${LIT_ARGS} ${CMAKE_CURRENT_BINARY_DIR} - DEPENDS COMMENT "Running LLVM regression tests") + set_target_properties(check PROPERTIES FOLDER "Tests") + + add_custom_target(check.deps) + add_dependencies(check check.deps) + add_dependencies(check.deps + UnitTests + BugpointPasses LLVMHello + llc lli llvm-ar llvm-as llvm-dis llvm-extract + llvm-ld llvm-link llvm-mc llvm-nm macho-dump opt + FileCheck count not) + set_target_properties(check.deps PROPERTIES FOLDER "Tests") endif() diff --git a/test/CodeGen/ARM/2009-10-16-Scope.ll b/test/CodeGen/ARM/2009-10-16-Scope.ll new file mode 100644 index 0000000..ce440e9 --- /dev/null +++ b/test/CodeGen/ARM/2009-10-16-Scope.ll @@ -0,0 +1,32 @@ +; RUN: llc %s -O0 -o /dev/null -mtriple=arm-apple-darwin +; PR 5197 +; There is not any llvm instruction assocated with !5. The code generator +; should be able to handle this. + +define void @bar() nounwind ssp { +entry: + %count_ = alloca i32, align 4 ; <i32*> [#uses=2] + br label %do.body, !dbg !0 + +do.body: ; preds = %entry + call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4) + %conv = ptrtoint i32* %count_ to i32, !dbg !0 ; <i32> [#uses=1] + %call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; <i32> [#uses=0] + br label %do.end, !dbg !0 + +do.end: ; preds = %do.body + ret void, !dbg !7 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +declare i32 @foo(i32) ssp + +!0 = metadata !{i32 5, i32 2, metadata !1, null} +!1 = metadata !{i32 458763, metadata !2}; [DW_TAG_lexical_block ] +!2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"bar", metadata !"bar", metadata !"bar", metadata !3, i32 4, null, i1 false, i1 true}; [DW_TAG_subprogram ] +!3 = metadata !{i32 458769, i32 0, i32 12, metadata !"genmodes.i", metadata !"/Users/yash/Downloads", metadata !"clang 1.1", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ] +!4 = metadata !{i32 459008, metadata !5, metadata !"count_", metadata !3, i32 5, metadata !6}; [ DW_TAG_auto_variable ] +!5 = metadata !{i32 458763, metadata !1}; [DW_TAG_lexical_block ] +!6 = metadata !{i32 458788, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}; [DW_TAG_base_type ] +!7 = metadata !{i32 6, i32 1, metadata !2, null} diff --git a/test/CodeGen/ARM/2009-11-02-NegativeLane.ll b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll index 89c9037..ca5ae8b 100644 --- a/test/CodeGen/ARM/2009-11-02-NegativeLane.ll +++ b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=cortex-a8 < %s | grep vdup.16 +; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "armv7-eabi" @@ -7,6 +7,7 @@ entry: br i1 undef, label %return, label %bb bb: ; preds = %bb, %entry +; CHECK: vld1.16 {d16[], d17[]} %0 = load i16* undef, align 2 %1 = insertelement <8 x i16> undef, i16 %0, i32 2 %2 = insertelement <8 x i16> %1, i16 undef, i32 3 diff --git a/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll b/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll index 31525ef..d9e1a14 100644 --- a/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll +++ b/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s +; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s -check-prefix=V4 ; RUN: llc < %s -mtriple=armv5-unknown-eabi | FileCheck %s ; RUN: llc < %s -mtriple=armv6-unknown-eabi | FileCheck %s @@ -7,6 +7,8 @@ entry: %0 = tail call i32 @foo(i32 %a) nounwind ; <i32> [#uses=1] %1 = add nsw i32 %0, 3 ; <i32> [#uses=1] ; CHECK: ldmia sp!, {r11, pc} +; V4: pop +; V4-NEXT: mov pc, lr ret i32 %1 } diff --git a/test/CodeGen/ARM/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/ARM/2010-04-07-DbgValueOtherTargets.ll index 8a24cfa..6422689 100644 --- a/test/CodeGen/ARM/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/ARM/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=arm -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/ARM/2010-05-17-DAGCombineAssert.ll b/test/CodeGen/ARM/2010-05-17-DAGCombineAssert.ll deleted file mode 100644 index 2a4bbd1..0000000 --- a/test/CodeGen/ARM/2010-05-17-DAGCombineAssert.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 -; PR7158 - -define arm_aapcs_vfpcc i32 @main() nounwind { -bb.nph55.bb.nph55.split_crit_edge: - br label %bb3 - -bb3: ; preds = %bb3, %bb.nph55.bb.nph55.split_crit_edge - br i1 undef, label %bb.i19, label %bb3 - -bb.i19: ; preds = %bb.i19, %bb3 - %0 = insertelement <4 x float> undef, float undef, i32 3 ; <<4 x float>> [#uses=3] - %1 = fmul <4 x float> %0, %0 ; <<4 x float>> [#uses=1] - %2 = bitcast <4 x float> %1 to <2 x double> ; <<2 x double>> [#uses=0] - %3 = fmul <4 x float> %0, undef ; <<4 x float>> [#uses=0] - br label %bb.i19 -} diff --git a/test/CodeGen/ARM/2010-06-28-DAGCombineUndef.ll b/test/CodeGen/ARM/2010-06-28-DAGCombineUndef.ll deleted file mode 100644 index ad2810b..0000000 --- a/test/CodeGen/ARM/2010-06-28-DAGCombineUndef.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: llc < %s -march=arm -mattr=+neon - -define void @main() nounwind { -entry: - store <2 x i64> undef, <2 x i64>* undef, align 16 - %0 = load <16 x i8>* undef, align 16 ; <<16 x i8>> [#uses=1] - %1 = or <16 x i8> zeroinitializer, %0 ; <<16 x i8>> [#uses=1] - store <16 x i8> %1, <16 x i8>* undef, align 16 - ret void -} diff --git a/test/CodeGen/ARM/2010-08-04-StackVariable.ll b/test/CodeGen/ARM/2010-08-04-StackVariable.ll new file mode 100644 index 0000000..f077d04 --- /dev/null +++ b/test/CodeGen/ARM/2010-08-04-StackVariable.ll @@ -0,0 +1,124 @@ +; RUN: llc -O0 -mtriple=arm-apple-darwin < %s | grep DW_OP_fbreg +; Use DW_OP_fbreg in variable's location expression if the variable is in a stack slot. + +%struct.SVal = type { i8*, i32 } + +define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp { +entry: + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24 + call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24 + %0 = icmp ne i32 %i, 0, !dbg !27 ; <i1> [#uses=1] + br i1 %0, label %bb, label %bb1, !dbg !27 + +bb: ; preds = %entry + %1 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !29 ; <i32*> [#uses=1] + %2 = load i32* %1, align 8, !dbg !29 ; <i32> [#uses=1] + %3 = add i32 %2, %i, !dbg !29 ; <i32> [#uses=1] + br label %bb2, !dbg !29 + +bb1: ; preds = %entry + %4 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !30 ; <i32*> [#uses=1] + %5 = load i32* %4, align 8, !dbg !30 ; <i32> [#uses=1] + %6 = sub i32 %5, 1, !dbg !30 ; <i32> [#uses=1] + br label %bb2, !dbg !30 + +bb2: ; preds = %bb1, %bb + %.0 = phi i32 [ %3, %bb ], [ %6, %bb1 ] ; <i32> [#uses=1] + br label %return, !dbg !29 + +return: ; preds = %bb2 + ret i32 %.0, !dbg !29 +} + +define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 { +entry: + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34 + %0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; <i8**> [#uses=1] + store i8* null, i8** %0, align 8, !dbg !34 + %1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; <i32*> [#uses=1] + store i32 0, i32* %1, align 8, !dbg !34 + br label %return, !dbg !34 + +return: ; preds = %entry + ret void, !dbg !35 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +define i32 @main() nounwind ssp { +entry: + %0 = alloca %struct.SVal ; <%struct.SVal*> [#uses=3] + %v = alloca %struct.SVal ; <%struct.SVal*> [#uses=4] + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41 + call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41 + %1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; <i32*> [#uses=1] + store i32 1, i32* %1, align 8, !dbg !42 + %2 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 0, !dbg !43 ; <i8**> [#uses=1] + %3 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 0, !dbg !43 ; <i8**> [#uses=1] + %4 = load i8** %3, align 8, !dbg !43 ; <i8*> [#uses=1] + store i8* %4, i8** %2, align 8, !dbg !43 + %5 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 1, !dbg !43 ; <i32*> [#uses=1] + %6 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !43 ; <i32*> [#uses=1] + %7 = load i32* %6, align 8, !dbg !43 ; <i32> [#uses=1] + store i32 %7, i32* %5, align 8, !dbg !43 + %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; <i32> [#uses=0] + call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43 + br label %return, !dbg !45 + +return: ; preds = %entry + ret i32 0, !dbg !45 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0, !9, !16, !17, !20} + +!0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"", metadata !2, i32 11, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 524307, metadata !2, metadata !"SVal", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_structure_type ] +!2 = metadata !{i32 524329, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !3} ; [ DW_TAG_file_type ] +!3 = metadata !{i32 524305, i32 0, i32 4, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!4 = metadata !{metadata !5, metadata !7, metadata !0, metadata !9} +!5 = metadata !{i32 524301, metadata !1, metadata !"Data", metadata !2, i32 7, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] +!6 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] +!7 = metadata !{i32 524301, metadata !1, metadata !"Kind", metadata !2, i32 8, i64 32, i64 32, i64 64, i32 0, metadata !8} ; [ DW_TAG_member ] +!8 = metadata !{i32 524324, metadata !2, metadata !"unsigned int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 524334, i32 0, metadata !1, metadata !"~SVal", metadata !"~SVal", metadata !"", metadata !2, i32 12, metadata !10, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] +!11 = metadata !{null, metadata !12, metadata !13} +!12 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !1} ; [ DW_TAG_pointer_type ] +!13 = metadata !{i32 524324, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!14 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, null} ; [ DW_TAG_subroutine_type ] +!15 = metadata !{null, metadata !12} +!16 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"_ZN4SValC1Ev", metadata !2, i32 11, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void (%struct.SVal*)* @_ZN4SValC1Ev} ; [ DW_TAG_subprogram ] +!17 = metadata !{i32 524334, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3fooi4SVal", metadata !2, i32 16, metadata !18, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, %struct.SVal*)* @_Z3fooi4SVal} ; [ DW_TAG_subprogram ] +!18 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !19, i32 0, null} ; [ DW_TAG_subroutine_type ] +!19 = metadata !{metadata !13, metadata !13, metadata !1} +!20 = metadata !{i32 524334, i32 0, metadata !2, metadata !"main", metadata !"main", metadata !"main", metadata !2, i32 23, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!21 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !22, i32 0, null} ; [ DW_TAG_subroutine_type ] +!22 = metadata !{metadata !13} +!23 = metadata !{i32 524545, metadata !17, metadata !"i", metadata !2, i32 16, metadata !13} ; [ DW_TAG_arg_variable ] +!24 = metadata !{i32 16, i32 0, metadata !17, null} +!25 = metadata !{i32 524545, metadata !17, metadata !"location", metadata !2, i32 16, metadata !26} ; [ DW_TAG_arg_variable ] +!26 = metadata !{i32 524304, metadata !2, metadata !"SVal", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_reference_type ] +!27 = metadata !{i32 17, i32 0, metadata !28, null} +!28 = metadata !{i32 524299, metadata !17, i32 16, i32 0, metadata !2, i32 2} ; [ DW_TAG_lexical_block ] +!29 = metadata !{i32 18, i32 0, metadata !28, null} +!30 = metadata !{i32 20, i32 0, metadata !28, null} +!31 = metadata !{i32 524545, metadata !16, metadata !"this", metadata !2, i32 11, metadata !32} ; [ DW_TAG_arg_variable ] +!32 = metadata !{i32 524326, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !33} ; [ DW_TAG_const_type ] +!33 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_pointer_type ] +!34 = metadata !{i32 11, i32 0, metadata !16, null} +!35 = metadata !{i32 11, i32 0, metadata !36, null} +!36 = metadata !{i32 524299, metadata !37, i32 11, i32 0, metadata !2, i32 1} ; [ DW_TAG_lexical_block ] +!37 = metadata !{i32 524299, metadata !16, i32 11, i32 0, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!38 = metadata !{i32 524544, metadata !39, metadata !"v", metadata !2, i32 24, metadata !1} ; [ DW_TAG_auto_variable ] +!39 = metadata !{i32 524299, metadata !40, i32 23, i32 0, metadata !2, i32 4} ; [ DW_TAG_lexical_block ] +!40 = metadata !{i32 524299, metadata !20, i32 23, i32 0, metadata !2, i32 3} ; [ DW_TAG_lexical_block ] +!41 = metadata !{i32 24, i32 0, metadata !39, null} +!42 = metadata !{i32 25, i32 0, metadata !39, null} +!43 = metadata !{i32 26, i32 0, metadata !39, null} +!44 = metadata !{i32 524544, metadata !39, metadata !"k", metadata !2, i32 26, metadata !13} ; [ DW_TAG_auto_variable ] +!45 = metadata !{i32 27, i32 0, metadata !39, null} diff --git a/test/CodeGen/ARM/2010-09-17-vmovrrd-combine.ll b/test/CodeGen/ARM/2010-09-17-vmovrrd-combine.ll deleted file mode 100644 index a210986..0000000 --- a/test/CodeGen/ARM/2010-09-17-vmovrrd-combine.ll +++ /dev/null @@ -1,26 +0,0 @@ -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -; Radar 8407927: Make sure that VMOVRRD gets optimized away when the result is -; converted back to be used as a vector type. - -; CHECK: test: -define <4 x i32> @test() nounwind { -entry: - br i1 undef, label %bb1, label %bb2 - -bb1: - %0 = bitcast <2 x i64> zeroinitializer to <2 x double> - %1 = extractelement <2 x double> %0, i32 0 - %2 = bitcast double %1 to i64 - %3 = insertelement <1 x i64> undef, i64 %2, i32 0 -; CHECK-NOT: vmov s -; CHECK: vext.8 - %4 = shufflevector <1 x i64> %3, <1 x i64> undef, <2 x i32> <i32 0, i32 1> - %tmp2006.3 = bitcast <2 x i64> %4 to <16 x i8> - %5 = shufflevector <16 x i8> %tmp2006.3, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> - %tmp2004.3 = bitcast <16 x i8> %5 to <4 x i32> - br i1 undef, label %bb2, label %bb1 - -bb2: - %result = phi <4 x i32> [ undef, %entry ], [ %tmp2004.3, %bb1 ] - ret <4 x i32> %result -} diff --git a/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll b/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll index 561588d..bda14bc 100644 --- a/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll +++ b/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll @@ -2,11 +2,11 @@ ; This tests that MC/asm header conversion is smooth ; ; CHECK: .syntax unified -; CHECK-NEXT: .eabi_attribute 20, 1 -; CHECK-NEXT: .eabi_attribute 21, 1 -; CHECK-NEXT: .eabi_attribute 23, 3 -; CHECK-NEXT: .eabi_attribute 24, 1 -; CHECK-NEXT: .eabi_attribute 25, 1 +; CHECK: .eabi_attribute 20, 1 +; CHECK: .eabi_attribute 21, 1 +; CHECK: .eabi_attribute 23, 3 +; CHECK: .eabi_attribute 24, 1 +; CHECK: .eabi_attribute 25, 1 define i32 @f(i64 %z) { ret i32 0 diff --git a/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll b/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll index d854238..ee443fe 100644 --- a/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll +++ b/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll @@ -1,18 +1,36 @@ ; RUN: llc %s -mtriple=arm-linux-gnueabi -filetype=obj -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck %s +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=BASIC %s +; RUN: llc %s -mtriple=armv7-linux-gnueabi -march=arm -mcpu=cortex-a8 \ +; RUN: -mattr=-neon -mattr=+vfp2 \ +; RUN: -arm-reserve-r9 -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=CORTEXA8 %s + + ; This tests that the extpected ARM attributes are emitted. ; -; CHECK: .ARM.attributes -; CHECK-NEXT: 0x70000003 -; CHECK-NEXT: 0x00000000 -; CHECK-NEXT: 0x00000000 -; CHECK-NEXT: 0x0000003c -; CHECK-NEXT: 0x00000022 -; CHECK-NEXT: 0x00000000 -; CHECK-NEXT: 0x00000000 -; CHECK-NEXT: 0x00000001 -; CHECK-NEXT: 0x00000000 -; CHECK-NEXT: '41210000 00616561 62690001 17000000 06020801 09011401 15011703 18011901 2c01' +; BASIC: .ARM.attributes +; BASIC-NEXT: 0x70000003 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: 0x0000003c +; BASIC-NEXT: 0x00000020 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: 0x00000001 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: '411f0000 00616561 62690001 15000000 06020801 09011401 15011703 18011901' + +; CORTEXA8: .ARM.attributes +; CORTEXA8-NEXT: 0x70000003 +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: 0x0000003c +; CORTEXA8-NEXT: 0x0000002f +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: 0x00000001 +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: '412e0000 00616561 62690001 24000000 05434f52 5445582d 41380006 0a074108 0109020a 02140115 01170318 011901' define i32 @f(i64 %z) { ret i32 0 diff --git a/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll b/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll index 2789ccd..163c9b0 100644 --- a/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll +++ b/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll @@ -3,7 +3,7 @@ ; LDM instruction, was causing an assertion failure because the microop count ; was being treated as an instruction count. -; CHECK: ldmia +; CHECK: push ; CHECK: ldmia ; CHECK: ldmia ; CHECK: ldmia diff --git a/test/CodeGen/ARM/2010-11-29-PrologueBug.ll b/test/CodeGen/ARM/2010-11-29-PrologueBug.ll new file mode 100644 index 0000000..8d7541f --- /dev/null +++ b/test/CodeGen/ARM/2010-11-29-PrologueBug.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB2 +; rdar://8690640 + +define i32* @t(i32* %x) nounwind { +entry: +; ARM: t: +; ARM: push +; ARM: mov r7, sp +; ARM: bl _foo +; ARM: bl _foo +; ARM: bl _foo +; ARM: ldmia sp!, {r7, pc} + +; THUMB2: t: +; THUMB2: push +; THUMB2: mov r7, sp +; THUMB2: blx _foo +; THUMB2: blx _foo +; THUMB2: blx _foo +; THUMB2: pop + %0 = tail call i32* @foo(i32* %x) nounwind + %1 = tail call i32* @foo(i32* %0) nounwind + %2 = tail call i32* @foo(i32* %1) nounwind + ret i32* %2 +} + +declare i32* @foo(i32*) diff --git a/test/CodeGen/ARM/2010-11-30-reloc-movt.ll b/test/CodeGen/ARM/2010-11-30-reloc-movt.ll new file mode 100644 index 0000000..930cd8d --- /dev/null +++ b/test/CodeGen/ARM/2010-11-30-reloc-movt.ll @@ -0,0 +1,42 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + +target triple = "armv7-none-linux-gnueabi" + +@a = external global i8 + +define arm_aapcs_vfpcc i32 @barf() nounwind { +entry: + %0 = tail call arm_aapcs_vfpcc i32 @foo(i8* @a) nounwind + ret i32 %0 +; OBJ: '.text' +; OBJ-NEXT: 'sh_type' +; OBJ-NEXT: 'sh_flags' +; OBJ-NEXT: 'sh_addr' +; OBJ-NEXT: 'sh_offset' +; OBJ-NEXT: 'sh_size' +; OBJ-NEXT: 'sh_link' +; OBJ-NEXT: 'sh_info' +; OBJ-NEXT: 'sh_addralign' +; OBJ-NEXT: 'sh_entsize' +; OBJ-NEXT: '_section_data', '00482de9 000000e3 000040e3 feffffeb 0088bde8' + +; OBJ: Relocation 0x00000000 +; OBJ-NEXT: 'r_offset', 0x00000004 +; OBJ-NEXT: 'r_sym', 0x00000007 +; OBJ-NEXT: 'r_type', 0x0000002b + +; OBJ: Relocation 0x00000001 +; OBJ-NEXT: 'r_offset', 0x00000008 +; OBJ-NEXT: 'r_sym' +; OBJ-NEXT: 'r_type', 0x0000002c + +; OBJ: # Relocation 0x00000002 +; OBJ-NEXT: 'r_offset', 0x0000000c +; OBJ-NEXT: 'r_sym', 0x00000008 +; OBJ-NEXT: 'r_type', 0x0000001c + +} + +declare arm_aapcs_vfpcc i32 @foo(i8*) + diff --git a/test/CodeGen/ARM/2010-12-07-PEIBug.ll b/test/CodeGen/ARM/2010-12-07-PEIBug.ll new file mode 100644 index 0000000..c65952b --- /dev/null +++ b/test/CodeGen/ARM/2010-12-07-PEIBug.ll @@ -0,0 +1,40 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-a8 | FileCheck %s +; rdar://8728956 + +define hidden void @foo() nounwind ssp { +entry: +; CHECK: foo: +; CHECK: push {r7, lr} +; CHECK-NEXT: mov r7, sp +; CHECK-NEXT: vpush {d8} +; CHECK-NEXT: vpush {d10, d11} + %tmp40 = load <4 x i8>* undef + %tmp41 = extractelement <4 x i8> %tmp40, i32 2 + %conv42 = zext i8 %tmp41 to i32 + %conv43 = sitofp i32 %conv42 to float + %div44 = fdiv float %conv43, 2.560000e+02 + %vecinit45 = insertelement <4 x float> undef, float %div44, i32 2 + %vecinit46 = insertelement <4 x float> %vecinit45, float 1.000000e+00, i32 3 + store <4 x float> %vecinit46, <4 x float>* undef + br i1 undef, label %if.then105, label %if.else109 + +if.then105: ; preds = %entry + br label %if.end114 + +if.else109: ; preds = %entry + br label %if.end114 + +if.end114: ; preds = %if.else109, %if.then105 + %call185 = call float @bar() + %vecinit186 = insertelement <4 x float> undef, float %call185, i32 1 + %call189 = call float @bar() + %vecinit190 = insertelement <4 x float> %vecinit186, float %call189, i32 2 + %vecinit191 = insertelement <4 x float> %vecinit190, float 1.000000e+00, i32 3 + store <4 x float> %vecinit191, <4 x float>* undef +; CHECK: vpop {d10, d11} +; CHECK-NEXT: vpop {d8} +; CHECK-NEXT: pop {r7, pc} + ret void +} + +declare hidden float @bar() nounwind readnone ssp diff --git a/test/CodeGen/ARM/2010-12-08-tpsoft.ll b/test/CodeGen/ARM/2010-12-08-tpsoft.ll new file mode 100644 index 0000000..b8ed819 --- /dev/null +++ b/test/CodeGen/ARM/2010-12-08-tpsoft.ll @@ -0,0 +1,52 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -o - | \ +; RUN: FileCheck -check-prefix=ELFASM %s +; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=ELFOBJ %s + +;; Make sure that bl __aeabi_read_tp is materiazlied and fixed up correctly +;; in the obj case. + +@i = external thread_local global i32 +@a = external global i8 +@b = external global [10 x i8] + +define arm_aapcs_vfpcc i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + switch i32 %0, label %bb2 [ + i32 12, label %bb + i32 13, label %bb1 + ] + +bb: ; preds = %entry + %1 = tail call arm_aapcs_vfpcc i32 @foo(i8* @a) nounwind + ret i32 %1 +; ELFASM: bl __aeabi_read_tp + + +; ELFOBJ: '.text' +; ELFOBJ-NEXT: 'sh_type' +; ELFOBJ-NEXT: 'sh_flags' +; ELFOBJ-NEXT: 'sh_addr' +; ELFOBJ-NEXT: 'sh_offset' +; ELFOBJ-NEXT: 'sh_size' +; ELFOBJ-NEXT: 'sh_link' +; ELFOBJ-NEXT: 'sh_info' +; ELFOBJ-NEXT: 'sh_addralign' +; ELFOBJ-NEXT: 'sh_entsize' +;;; BL __aeabi_read_tp is ---+ +;;; V +; ELFOBJ-NEXT: 00482de9 3c009fe5 00109fe7 feffffeb + + +bb1: ; preds = %entry + %2 = tail call arm_aapcs_vfpcc i32 @bar(i32* bitcast ([10 x i8]* @b to i32*)) nounwind + ret i32 %2 + +bb2: ; preds = %entry + ret i32 -1 +} + +declare arm_aapcs_vfpcc i32 @foo(i8*) + +declare arm_aapcs_vfpcc i32 @bar(i32*) diff --git a/test/CodeGen/ARM/2010-12-13-reloc-pic.ll b/test/CodeGen/ARM/2010-12-13-reloc-pic.ll new file mode 100644 index 0000000..d5aefbe --- /dev/null +++ b/test/CodeGen/ARM/2010-12-13-reloc-pic.ll @@ -0,0 +1,100 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -relocation-model=pic -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=PIC01 %s + +;; FIXME: Reduce this test further, or even better, +;; redo as .s -> .o test once ARM AsmParser is working better + +; ModuleID = 'large2.pnacl.bc' +target triple = "armv7-none-linux-gnueabi" + +%struct._Bigint = type { %struct._Bigint*, i32, i32, i32, i32, [1 x i32] } +%struct.__FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, %struct._reent*, i8*, i32 (%struct._reent*, i8*, i8*, i32)*, i32 (%struct._reent*, i8*, i8*, i32)*, i32 (%struct._reent*, i8*, i32, i32)*, i32 (%struct._reent*, i8*)*, %struct.__sbuf, i8*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i32, %struct._flock_t, %struct._mbstate_t, i32 } +%struct.__sbuf = type { i8*, i32 } +%struct.__tm = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 } +%struct._atexit = type { %struct._atexit*, i32, [32 x void ()*], %struct._on_exit_args* } +%struct._flock_t = type { i32, i32, i32, i32, i32 } +%struct._glue = type { %struct._glue*, i32, %struct.__FILE* } +%struct._mbstate_t = type { i32, %union.anon } +%struct._misc_reent = type { i8*, %struct._mbstate_t, %struct._mbstate_t, %struct._mbstate_t, [8 x i8], i32, %struct._mbstate_t, %struct._mbstate_t, %struct._mbstate_t, %struct._mbstate_t, %struct._mbstate_t } +%struct._mprec = type { %struct._Bigint*, i32, %struct._Bigint*, %struct._Bigint** } +%struct._on_exit_args = type { [32 x i8*], [32 x i8*], i32, i32 } +%struct._rand48 = type { [3 x i16], [3 x i16], i16, i64 } +%struct._reent = type { %struct.__FILE*, %struct.__FILE*, %struct.__FILE*, i32, i32, i8*, i32, i32, i8*, %struct._mprec*, void (%struct._reent*)*, i32, i32, i8*, %struct._rand48*, %struct.__tm*, i8*, void (i32)**, %struct._atexit*, %struct._atexit, %struct._glue, %struct.__FILE*, %struct._misc_reent*, i8* } +%union.anon = type { i32 } + +@buf = constant [2 x i8] c"x\00", align 4 +@_impure_ptr = external thread_local global %struct._reent* +@.str = private constant [22 x i8] c"This should fault...\0A\00", align 4 +@.str1 = private constant [40 x i8] c"We're still running. This is not good.\0A\00", align 4 + +define i32 @main() nounwind { +entry: + %0 = load %struct._reent** @_impure_ptr, align 4 + %1 = getelementptr inbounds %struct._reent* %0, i32 0, i32 1 + %2 = load %struct.__FILE** %1, align 4 + %3 = bitcast %struct.__FILE* %2 to i8* + %4 = tail call i32 @fwrite(i8* getelementptr inbounds ([22 x i8]* @.str, i32 0, i32 0), i32 1, i32 21, i8* %3) nounwind + %5 = load %struct._reent** @_impure_ptr, align 4 + %6 = getelementptr inbounds %struct._reent* %5, i32 0, i32 1 + %7 = load %struct.__FILE** %6, align 4 + %8 = tail call i32 @fflush(%struct.__FILE* %7) nounwind + store i8 121, i8* getelementptr inbounds ([2 x i8]* @buf, i32 0, i32 0), align 4 + %9 = load %struct._reent** @_impure_ptr, align 4 + %10 = getelementptr inbounds %struct._reent* %9, i32 0, i32 1 + %11 = load %struct.__FILE** %10, align 4 + %12 = bitcast %struct.__FILE* %11 to i8* + %13 = tail call i32 @fwrite(i8* getelementptr inbounds ([40 x i8]* @.str1, i32 0, i32 0), i32 1, i32 39, i8* %12) nounwind + ret i32 1 +} + + +; PIC01: Relocation 0x00000000 +; PIC01-NEXT: 'r_offset', 0x0000001c +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001b + + +; PIC01: Relocation 0x00000001 +; PIC01-NEXT: 'r_offset', 0x00000038 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001b + +; PIC01: Relocation 0x00000002 +; PIC01-NEXT: 'r_offset', 0x00000044 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001b + +; PIC01: Relocation 0x00000003 +; PIC01-NEXT: 'r_offset', 0x00000070 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001b + +; PIC01: Relocation 0x00000004 +; PIC01-NEXT: 'r_offset', 0x0000007c +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x00000019 + + +; PIC01: Relocation 0x00000005 +; PIC01-NEXT: 'r_offset', 0x00000080 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x00000018 + +; PIC01: Relocation 0x00000006 +; PIC01-NEXT: 'r_offset', 0x00000084 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x00000068 + +; PIC01: Relocation 0x00000007 +; PIC01-NEXT: 'r_offset', 0x00000088 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001a + +; PIC01: Relocation 0x00000008 +; PIC01-NEXT: 'r_offset', 0x0000008c +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x00000018 + +declare i32 @fwrite(i8* nocapture, i32, i32, i8* nocapture) nounwind + +declare i32 @fflush(%struct.__FILE* nocapture) nounwind diff --git a/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll b/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll new file mode 100644 index 0000000..eaa34e7 --- /dev/null +++ b/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll @@ -0,0 +1,35 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s +; RUN: llc %s -mtriple=armv7-linux-gnueabi -o - | \ +; RUN: FileCheck -check-prefix=ASM %s + + +@dummy = internal global i32 666 +@array00 = internal global [20 x i32] zeroinitializer +@sum = internal global i32 55 +@STRIDE = internal global i32 8 + +; ASM: .type array00,%object @ @array00 +; ASM-NEXT: .lcomm array00,80 @ @array00 +; ASM-NEXT: .type _MergedGlobals,%object @ @_MergedGlobals + + + +; OBJ: Section 0x00000003 +; OBJ-NEXT: '.bss' + +; OBJ: 'array00' +; OBJ-NEXT: 'st_value', 0x00000000 +; OBJ-NEXT: 'st_size', 0x00000050 +; OBJ-NEXT: 'st_bind', 0x00000000 +; OBJ-NEXT: 'st_type', 0x00000001 +; OBJ-NEXT: 'st_other', 0x00000000 +; OBJ-NEXT: 'st_shndx', 0x00000003 + +define i32 @main(i32 %argc) nounwind { + %1 = load i32* @sum, align 4 + %2 = getelementptr [20 x i32]* @array00, i32 0, i32 %argc + %3 = load i32* %2, align 4 + %4 = add i32 %1, %3 + ret i32 %4; +} diff --git a/test/CodeGen/ARM/2010-12-17-LocalStackSlotCrash.ll b/test/CodeGen/ARM/2010-12-17-LocalStackSlotCrash.ll new file mode 100644 index 0000000..a2f50b5 --- /dev/null +++ b/test/CodeGen/ARM/2010-12-17-LocalStackSlotCrash.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -mtriple=armv6-apple-darwin10 +; <rdar://problem/8782198> +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:64-n32" +target triple = "armv6-apple-darwin10" + +define void @func() nounwind optsize { +entry: + %buf = alloca [8096 x i8], align 1 + br label %bb + +bb: + %p.2 = getelementptr [8096 x i8]* %buf, i32 0, i32 0 + store i8 undef, i8* %p.2, align 1 + ret void +} diff --git a/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll new file mode 100644 index 0000000..ec76f71 --- /dev/null +++ b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll @@ -0,0 +1,126 @@ +; RUN: llc < %s | FileCheck %s +; XFAIL: * +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32" +target triple = "thumbv7-apple-darwin10" + +@x1 = internal global i8 1 +@x2 = internal global i8 1 +@x3 = internal global i8 1 +@x4 = internal global i8 1 +@x5 = global i8 1 + +; Check debug info output for merged global. +; DW_AT_location +; DW_OP_addr +; DW_OP_plus +; .long __MergedGlobals +; DW_OP_constu +; offset + +;CHECK: .ascii "x2" @ DW_AT_name +;CHECK-NEXT: .byte 0 +;CHECK-NEXT: @ DW_AT_type +;CHECK-NEXT: @ DW_AT_decl_file +;CHECK-NEXT: @ DW_AT_decl_line +;CHECK-NEXT: @ DW_AT_location +;CHECK-NEXT: .byte 3 +;CHECK-NEXT: .long __MergedGlobals +;CHECK-NEXT: .byte 16 +;CHECK-NEXT: .byte 1 +;CHECK-NEXT: .byte 34 + +define zeroext i8 @get1(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !10), !dbg !30 + %0 = load i8* @x1, align 4, !dbg !30 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !11), !dbg !30 + store i8 %a, i8* @x1, align 4, !dbg !30 + ret i8 %0, !dbg !31 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +define zeroext i8 @get2(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !18), !dbg !32 + %0 = load i8* @x2, align 4, !dbg !32 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !19), !dbg !32 + store i8 %a, i8* @x2, align 4, !dbg !32 + ret i8 %0, !dbg !33 +} + +define zeroext i8 @get3(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !21), !dbg !34 + %0 = load i8* @x3, align 4, !dbg !34 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !22), !dbg !34 + store i8 %a, i8* @x3, align 4, !dbg !34 + ret i8 %0, !dbg !35 +} + +define zeroext i8 @get4(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !24), !dbg !36 + %0 = load i8* @x4, align 4, !dbg !36 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !25), !dbg !36 + store i8 %a, i8* @x4, align 4, !dbg !36 + ret i8 %0, !dbg !37 +} + +define zeroext i8 @get5(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !27), !dbg !38 + %0 = load i8* @x5, align 4, !dbg !38 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !28), !dbg !38 + store i8 %a, i8* @x5, align 4, !dbg !38 + ret i8 %0, !dbg !39 +} + +!llvm.dbg.sp = !{!0, !6, !7, !8, !9} +!llvm.dbg.lv.get1 = !{!10, !11} +!llvm.dbg.gv = !{!13, !14, !15, !16, !17} +!llvm.dbg.lv.get2 = !{!18, !19} +!llvm.dbg.lv.get3 = !{!21, !22} +!llvm.dbg.lv.get4 = !{!24, !25} +!llvm.dbg.lv.get5 = !{!27, !28} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get1", metadata !"get1", metadata !"get1", metadata !1, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get1} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"foo.c", metadata !"/tmp/", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 1, metadata !"foo.c", metadata !"/tmp/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build 2369.8)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5, metadata !5} +!5 = metadata !{i32 589860, metadata !1, metadata !"_Bool", metadata !1, i32 0, i64 8, i64 8, i64 0, i32 0, i32 2} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get2", metadata !"get2", metadata !"get2", metadata !1, i32 7, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get2} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get3", metadata !"get3", metadata !"get3", metadata !1, i32 10, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get3} ; [ DW_TAG_subprogram ] +!8 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get4", metadata !"get4", metadata !"get4", metadata !1, i32 13, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get4} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get5", metadata !"get5", metadata !"get5", metadata !1, i32 16, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get5} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 590081, metadata !0, metadata !"a", metadata !1, i32 4, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!11 = metadata !{i32 590080, metadata !12, metadata !"b", metadata !1, i32 4, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!12 = metadata !{i32 589835, metadata !0, i32 4, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!13 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x1", metadata !"x1", metadata !"", metadata !1, i32 3, metadata !5, i1 true, i1 true, i8* @x1} ; [ DW_TAG_variable ] +!14 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x2", metadata !"x2", metadata !"", metadata !1, i32 6, metadata !5, i1 true, i1 true, i8* @x2} ; [ DW_TAG_variable ] +!15 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x3", metadata !"x3", metadata !"", metadata !1, i32 9, metadata !5, i1 true, i1 true, i8* @x3} ; [ DW_TAG_variable ] +!16 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x4", metadata !"x4", metadata !"", metadata !1, i32 12, metadata !5, i1 true, i1 true, i8* @x4} ; [ DW_TAG_variable ] +!17 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x5", metadata !"x5", metadata !"", metadata !1, i32 15, metadata !5, i1 false, i1 true, i8* @x5} ; [ DW_TAG_variable ] +!18 = metadata !{i32 590081, metadata !6, metadata !"a", metadata !1, i32 7, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!19 = metadata !{i32 590080, metadata !20, metadata !"b", metadata !1, i32 7, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!20 = metadata !{i32 589835, metadata !6, i32 7, i32 0, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!21 = metadata !{i32 590081, metadata !7, metadata !"a", metadata !1, i32 10, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!22 = metadata !{i32 590080, metadata !23, metadata !"b", metadata !1, i32 10, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!23 = metadata !{i32 589835, metadata !7, i32 10, i32 0, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] +!24 = metadata !{i32 590081, metadata !8, metadata !"a", metadata !1, i32 13, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!25 = metadata !{i32 590080, metadata !26, metadata !"b", metadata !1, i32 13, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!26 = metadata !{i32 589835, metadata !8, i32 13, i32 0, metadata !1, i32 3} ; [ DW_TAG_lexical_block ] +!27 = metadata !{i32 590081, metadata !9, metadata !"a", metadata !1, i32 16, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!28 = metadata !{i32 590080, metadata !29, metadata !"b", metadata !1, i32 16, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!29 = metadata !{i32 589835, metadata !9, i32 16, i32 0, metadata !1, i32 4} ; [ DW_TAG_lexical_block ] +!30 = metadata !{i32 4, i32 0, metadata !0, null} +!31 = metadata !{i32 4, i32 0, metadata !12, null} +!32 = metadata !{i32 7, i32 0, metadata !6, null} +!33 = metadata !{i32 7, i32 0, metadata !20, null} +!34 = metadata !{i32 10, i32 0, metadata !7, null} +!35 = metadata !{i32 10, i32 0, metadata !23, null} +!36 = metadata !{i32 13, i32 0, metadata !8, null} +!37 = metadata !{i32 13, i32 0, metadata !26, null} +!38 = metadata !{i32 16, i32 0, metadata !9, null} +!39 = metadata !{i32 16, i32 0, metadata !29, null} diff --git a/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll b/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll new file mode 100644 index 0000000..85a1137 --- /dev/null +++ b/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll @@ -0,0 +1,128 @@ +; RUN: llc < %s -asm-verbose=false -O3 -mtriple=armv6-apple-darwin -relocation-model=pic -mcpu=arm1136jf-s | FileCheck %s +; rdar://8959122 illegal register operands for UMULL instruction +; in cfrac nightly test. +; Armv6 generates a umull that must write to two distinct destination regs. + +; ModuleID = 'bugpoint-reduced-simplified.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:64-n32" +target triple = "armv6-apple-darwin10" + +define void @ptoa() nounwind { +entry: + br i1 false, label %bb3, label %bb + +bb: ; preds = %entry + br label %bb3 + +bb3: ; preds = %bb, %entry + %0 = call noalias i8* @malloc() nounwind + br i1 undef, label %bb46, label %bb8 + +bb8: ; preds = %bb3 + %1 = getelementptr inbounds i8* %0, i32 0 + store i8 0, i8* %1, align 1 + %2 = call i32 @ptou() nounwind + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %3 = udiv i32 %2, 10 + %4 = urem i32 %3, 10 + %5 = icmp ult i32 %4, 10 + %6 = trunc i32 %4 to i8 + %7 = or i8 %6, 48 + %8 = add i8 %6, 87 + %iftmp.5.0.1 = select i1 %5, i8 %7, i8 %8 + store i8 %iftmp.5.0.1, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %9 = udiv i32 %2, 100 + %10 = urem i32 %9, 10 + %11 = icmp ult i32 %10, 10 + %12 = trunc i32 %10 to i8 + %13 = or i8 %12, 48 + %14 = add i8 %12, 87 + %iftmp.5.0.2 = select i1 %11, i8 %13, i8 %14 + store i8 %iftmp.5.0.2, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %15 = udiv i32 %2, 10000 + %16 = urem i32 %15, 10 + %17 = icmp ult i32 %16, 10 + %18 = trunc i32 %16 to i8 + %19 = or i8 %18, 48 + %20 = add i8 %18, 87 + %iftmp.5.0.4 = select i1 %17, i8 %19, i8 %20 + store i8 %iftmp.5.0.4, i8* null, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %21 = udiv i32 %2, 100000 + %22 = urem i32 %21, 10 + %23 = icmp ult i32 %22, 10 + %iftmp.5.0.5 = select i1 %23, i8 0, i8 undef + store i8 %iftmp.5.0.5, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %24 = udiv i32 %2, 1000000 + %25 = urem i32 %24, 10 + %26 = icmp ult i32 %25, 10 + %27 = trunc i32 %25 to i8 + %28 = or i8 %27, 48 + %29 = add i8 %27, 87 + %iftmp.5.0.6 = select i1 %26, i8 %28, i8 %29 + store i8 %iftmp.5.0.6, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %30 = udiv i32 %2, 10000000 + %31 = urem i32 %30, 10 + %32 = icmp ult i32 %31, 10 + %33 = trunc i32 %31 to i8 + %34 = or i8 %33, 48 + %35 = add i8 %33, 87 + %iftmp.5.0.7 = select i1 %32, i8 %34, i8 %35 + store i8 %iftmp.5.0.7, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %36 = udiv i32 %2, 100000000 + %37 = urem i32 %36, 10 + %38 = icmp ult i32 %37, 10 + %39 = trunc i32 %37 to i8 + %40 = or i8 %39, 48 + %41 = add i8 %39, 87 + %iftmp.5.0.8 = select i1 %38, i8 %40, i8 %41 + store i8 %iftmp.5.0.8, i8* null, align 1 + unreachable + +bb46: ; preds = %bb3 + ret void +} + +declare noalias i8* @malloc() nounwind + +declare i32 @ptou() diff --git a/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll b/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll new file mode 100644 index 0000000..f3d7888 --- /dev/null +++ b/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll @@ -0,0 +1,89 @@ +; RUN: llc < %s -asm-verbose=false -O3 -mtriple=armv5e-none-linux-gnueabi | FileCheck %s +; PR8986: PostRA antidependence breaker must respect "earlyclobber". +; armv5e generates mulv5 that cannot used the same reg for src/dest. + +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32" +target triple = "armv5e-none-linux-gnueabi" + +define hidden fastcc void @storeAtts() nounwind { +entry: + %.SV116 = alloca i8** + br i1 undef, label %meshBB520, label %meshBB464 + +bb15: ; preds = %meshBB424 + br i1 undef, label %bb216, label %meshBB396 + +bb22: ; preds = %meshBB396 + br label %cBB564 + +cBB564: ; preds = %cBB564, %bb22 + br label %cBB564 + +poolStoreString.exit.thread: ; preds = %meshBB424 + ret void + +bb78: ; preds = %meshBB412 + unreachable + +bb129: ; preds = %meshBB540 + br i1 undef, label %bb131.loopexit, label %meshBB540 + +bb131.loopexit: ; preds = %bb129 + br label %bb131 + +bb131: ; preds = %bb135, %bb131.loopexit + br i1 undef, label %bb134, label %meshBB396 + +bb134: ; preds = %bb131 + unreachable + +bb135: ; preds = %meshBB396 + %uriHash.1.phi.load = load i32* undef + %.load120 = load i8*** %.SV116 + %.phi24 = load i8* null + %.phi26 = load i8** null + store i8 %.phi24, i8* %.phi26, align 1 + %0 = getelementptr inbounds i8* %.phi26, i32 1 + store i8* %0, i8** %.load120, align 4 + ; CHECK: mul [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{(lr|r[0-9]+)$}} + %1 = mul i32 %uriHash.1.phi.load, 1000003 + %2 = xor i32 0, %1 + store i32 %2, i32* null + %3 = load i8* null, align 1 + %4 = icmp eq i8 %3, 0 + store i8* %0, i8** undef + br i1 %4, label %meshBB472, label %bb131 + +bb212: ; preds = %meshBB540 + unreachable + +bb216: ; preds = %bb15 + ret void + +meshBB396: ; preds = %bb131, %bb15 + br i1 undef, label %bb135, label %bb22 + +meshBB412: ; preds = %meshBB464 + br i1 undef, label %meshBB504, label %bb78 + +meshBB424: ; preds = %meshBB464 + br i1 undef, label %poolStoreString.exit.thread, label %bb15 + +meshBB464: ; preds = %entry + br i1 undef, label %meshBB424, label %meshBB412 + +meshBB472: ; preds = %meshBB504, %bb135 + unreachable + +meshBB504: ; preds = %meshBB412 + br label %meshBB472 + +meshBB520: ; preds = %entry + br label %meshBB540 + +meshBB540: ; preds = %meshBB520, %bb129 + br i1 undef, label %bb212, label %bb129 +} diff --git a/test/CodeGen/ARM/arm-and-tst-peephole.ll b/test/CodeGen/ARM/arm-and-tst-peephole.ll index 461150f..50c638b 100644 --- a/test/CodeGen/ARM/arm-and-tst-peephole.ll +++ b/test/CodeGen/ARM/arm-and-tst-peephole.ll @@ -27,9 +27,8 @@ tailrecurse: ; preds = %sw.bb, %entry ; ARM-NEXT: beq ; THUMB: movs r5, #3 -; THUMB-NEXT: mov r6, r4 -; THUMB-NEXT: ands r6, r5 -; THUMB-NEXT: tst r4, r5 +; THUMB-NEXT: ands r5, r4 +; THUMB-NEXT: cmp r5, #0 ; THUMB-NEXT: beq ; T2: ands r12, r12, #3 diff --git a/test/CodeGen/ARM/atomic-cmp.ll b/test/CodeGen/ARM/atomic-cmp.ll new file mode 100644 index 0000000..f31aa7b --- /dev/null +++ b/test/CodeGen/ARM/atomic-cmp.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=T2 +; rdar://8964854 + +define i8 @t(i8* %a, i8 %b, i8 %c) nounwind { +; ARM: t: +; ARM: ldrexb +; ARM: strexb + +; T2: t: +; T2: ldrexb +; T2: strexb + %tmp0 = tail call i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* %a, i8 %b, i8 %c) + ret i8 %tmp0 +} + +declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* nocapture, i8, i8) nounwind diff --git a/test/CodeGen/ARM/available_externally.ll b/test/CodeGen/ARM/available_externally.ll new file mode 100644 index 0000000..0f646d5 --- /dev/null +++ b/test/CodeGen/ARM/available_externally.ll @@ -0,0 +1,16 @@ +; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic | FileCheck %s +; rdar://9027648 + +@A = available_externally hidden constant i32 1 +@B = external hidden constant i32 + +define i32 @t1() { + %tmp = load i32* @A + store i32 %tmp, i32* @B + ret i32 %tmp +} + +; CHECK: L_A$non_lazy_ptr: +; CHECK-NEXT: .long _A +; CHECK: L_B$non_lazy_ptr: +; CHECK-NEXT: .long _B diff --git a/test/CodeGen/ARM/bfi.ll b/test/CodeGen/ARM/bfi.ll index 0e36283..946db19 100644 --- a/test/CodeGen/ARM/bfi.ll +++ b/test/CodeGen/ARM/bfi.ll @@ -16,7 +16,7 @@ entry: ret void } -define i32 @f2(i32 %A, i32 %B) nounwind readnone optsize { +define i32 @f2(i32 %A, i32 %B) nounwind { entry: ; CHECK: f2 ; CHECK: lsr{{.*}}#7 @@ -27,7 +27,7 @@ entry: ret i32 %or } -define i32 @f3(i32 %A, i32 %B) nounwind readnone optsize { +define i32 @f3(i32 %A, i32 %B) nounwind { entry: ; CHECK: f3 ; CHECK: lsr{{.*}} #7 @@ -38,3 +38,27 @@ entry: %or = or i32 %and2, %and ; <i32> [#uses=1] ret i32 %or } + +; rdar://8752056 +define i32 @f4(i32 %a) nounwind { +; CHECK: f4 +; CHECK: movw r1, #3137 +; CHECK: bfi r1, r0, #15, #5 + %1 = shl i32 %a, 15 + %ins7 = and i32 %1, 1015808 + %ins12 = or i32 %ins7, 3137 + ret i32 %ins12 +} + +; rdar://8458663 +define i32 @f5(i32 %a, i32 %b) nounwind { +entry: +; CHECK: f5: +; CHECK-NOT: bfc +; CHECK: bfi r0, r1, #20, #4 + %0 = and i32 %a, -15728641 + %1 = shl i32 %b, 20 + %2 = and i32 %1, 15728640 + %3 = or i32 %2, %0 + ret i32 %3 +} diff --git a/test/CodeGen/ARM/bswap-inline-asm.ll b/test/CodeGen/ARM/bswap-inline-asm.ll new file mode 100644 index 0000000..472213d --- /dev/null +++ b/test/CodeGen/ARM/bswap-inline-asm.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 | FileCheck %s + +define i32 @t1(i32 %x) nounwind { +; CHECK: t1: +; CHECK-NOT: InlineAsm +; CHECK: rev + %asmtmp = tail call i32 asm "rev $0, $1\0A", "=l,l"(i32 %x) nounwind + ret i32 %asmtmp +} diff --git a/test/CodeGen/ARM/bx_fold.ll b/test/CodeGen/ARM/bx_fold.ll index 0e3e070..09f1aae 100644 --- a/test/CodeGen/ARM/bx_fold.ll +++ b/test/CodeGen/ARM/bx_fold.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -march=arm -; RUN: llc < %s -march=arm | not grep bx +; RUN: llc < %s -mtriple=armv5t-apple-darwin | FileCheck %s define void @test(i32 %Ptr, i8* %L) { entry: @@ -24,6 +23,8 @@ bb1: ; preds = %bb, %entry br i1 %bothcond, label %bb, label %bb18 bb18: ; preds = %bb1 +; CHECK-NOT: bx +; CHECK: ldmia sp! ret void } diff --git a/test/CodeGen/ARM/call-tc.ll b/test/CodeGen/ARM/call-tc.ll index db5afe3..a77aba0 100644 --- a/test/CodeGen/ARM/call-tc.ll +++ b/test/CodeGen/ARM/call-tc.ll @@ -1,8 +1,6 @@ -; RUN: llc < %s -mtriple=arm-apple-darwin -march=arm | FileCheck %s -check-prefix=CHECKV4 -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin -mattr=+v5t | FileCheck %s -check-prefix=CHECKV5 -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\ -; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECKELF -; XFAIL: * +; RUN: llc < %s -mtriple=armv6-apple-darwin -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKV6 +; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2 @t = weak global i32 ()* null ; <i32 ()**> [#uses=1] @@ -10,40 +8,80 @@ declare void @g(i32, i32, i32, i32) define void @t1() { ; CHECKELF: t1: -; CHECKELF: PLT +; CHECKELF: bl g(PLT) call void @g( i32 1, i32 2, i32 3, i32 4 ) ret void } define void @t2() { -; CHECKV4: t2: -; CHECKV4: bx r0 @ TAILCALL -; CHECKV5: t2: -; CHECKV5: bx r0 @ TAILCALL +; CHECKV6: t2: +; CHECKV6: bx r0 @ TAILCALL %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1] %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0] ret void } -define i32* @t3(i32, i32, i32*, i32*, i32*) nounwind { -; CHECKV4: t3: -; CHECKV4: bx r{{.*}} -BB0: - %5 = inttoptr i32 %0 to i32* ; <i32*> [#uses=1] - %t35 = volatile load i32* %5 ; <i32> [#uses=1] - %6 = inttoptr i32 %t35 to i32** ; <i32**> [#uses=1] - %7 = getelementptr i32** %6, i32 86 ; <i32**> [#uses=1] - %8 = load i32** %7 ; <i32*> [#uses=1] - %9 = bitcast i32* %8 to i32* (i32, i32*, i32, i32*, i32*, i32*)* ; <i32* (i32, i32*, i32, i32*, i32*, i32*)*> [#uses=1] - %10 = call i32* %9(i32 %0, i32* null, i32 %1, i32* %2, i32* %3, i32* %4) ; <i32*> [#uses=1] - ret i32* %10 -} - -define void @t4() { -; CHECKV4: t4: -; CHECKV4: b _t2 @ TAILCALL -; CHECKV5: t4: -; CHECKV5: b _t2 @ TAILCALL +define void @t3() { +; CHECKV6: t3: +; CHECKV6: b _t2 @ TAILCALL +; CHECKELF: t3: +; CHECKELF: b t2(PLT) @ TAILCALL tail call void @t2( ) ; <i32> [#uses=0] ret void } + +; Sibcall optimization of expanded libcalls. rdar://8707777 +define double @t4(double %a) nounwind readonly ssp { +entry: +; CHECKV6: t4: +; CHECKV6: b _sin @ TAILCALL +; CHECKELF: t4: +; CHECKELF: b sin(PLT) @ TAILCALL + %0 = tail call double @sin(double %a) nounwind readonly ; <double> [#uses=1] + ret double %0 +} + +define float @t5(float %a) nounwind readonly ssp { +entry: +; CHECKV6: t5: +; CHECKV6: b _sinf @ TAILCALL +; CHECKELF: t5: +; CHECKELF: b sinf(PLT) @ TAILCALL + %0 = tail call float @sinf(float %a) nounwind readonly ; <float> [#uses=1] + ret float %0 +} + +declare float @sinf(float) nounwind readonly + +declare double @sin(double) nounwind readonly + +define i32 @t6(i32 %a, i32 %b) nounwind readnone { +entry: +; CHECKV6: t6: +; CHECKV6: b ___divsi3 @ TAILCALL +; CHECKELF: t6: +; CHECKELF: b __aeabi_idiv(PLT) @ TAILCALL + %0 = sdiv i32 %a, %b + ret i32 %0 +} + +; Make sure the tail call instruction isn't deleted +; rdar://8309338 +declare void @foo() nounwind + +define void @t7() nounwind { +entry: +; CHECKT2: t7: +; CHECKT2: blxeq _foo +; CHECKT2-NEXT: pop.w +; CHECKT2-NEXT: b.w _foo + br i1 undef, label %bb, label %bb1.lr.ph + +bb1.lr.ph: + tail call void @foo() nounwind + unreachable + +bb: + tail call void @foo() nounwind + ret void +} diff --git a/test/CodeGen/ARM/code-placement.ll b/test/CodeGen/ARM/code-placement.ll index 845be8c..036598f 100644 --- a/test/CodeGen/ARM/code-placement.ll +++ b/test/CodeGen/ARM/code-placement.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=armv7-apple-darwin -cgp-critical-edge-splitting=0 | FileCheck %s +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s ; PHI elimination shouldn't break backedge. ; rdar://8263994 diff --git a/test/CodeGen/ARM/div.ll b/test/CodeGen/ARM/div.ll index 448b437..3d29e05 100644 --- a/test/CodeGen/ARM/div.ll +++ b/test/CodeGen/ARM/div.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECK-ARM +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=CHECK-ARM define i32 @f1(i32 %a, i32 %b) { entry: diff --git a/test/CodeGen/ARM/fast-isel-crash.ll b/test/CodeGen/ARM/fast-isel-crash.ll new file mode 100644 index 0000000..370c70f --- /dev/null +++ b/test/CodeGen/ARM/fast-isel-crash.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -O0 -mtriple=thumbv7-apple-darwin + +%union.anon = type { <16 x i32> } + +@__md0 = external global [137 x i8] + +define internal void @stretch(<4 x i8> addrspace(1)* %src, <4 x i8> addrspace(1)* %dst, i32 %width, i32 %height, i32 %iLS, i32 %oLS, <2 x float> %c, <4 x float> %param) nounwind { +entry: + ret void +} + +define internal i32 @_Z13get_global_idj(i32 %dim) nounwind ssp { +entry: + ret i32 undef +} + +define void @wrap(i8 addrspace(1)* addrspace(1)* %arglist, i32 addrspace(1)* %gtid) nounwind ssp { +entry: + call void @stretch(<4 x i8> addrspace(1)* undef, <4 x i8> addrspace(1)* undef, i32 undef, i32 undef, i32 undef, i32 undef, <2 x float> undef, <4 x float> undef) + ret void +} diff --git a/test/CodeGen/ARM/fast-isel-static.ll b/test/CodeGen/ARM/fast-isel-static.ll new file mode 100644 index 0000000..8f58480 --- /dev/null +++ b/test/CodeGen/ARM/fast-isel-static.ll @@ -0,0 +1,30 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O0 -relocation-model=static -arm-long-calls | FileCheck -check-prefix=LONG %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O0 -relocation-model=static | FileCheck -check-prefix=NORM %s + +define void @myadd(float* %sum, float* %addend) nounwind { +entry: + %sum.addr = alloca float*, align 4 + %addend.addr = alloca float*, align 4 + store float* %sum, float** %sum.addr, align 4 + store float* %addend, float** %addend.addr, align 4 + %tmp = load float** %sum.addr, align 4 + %tmp1 = load float* %tmp + %tmp2 = load float** %addend.addr, align 4 + %tmp3 = load float* %tmp2 + %add = fadd float %tmp1, %tmp3 + %tmp4 = load float** %sum.addr, align 4 + store float %add, float* %tmp4 + ret void +} + +define i32 @main(i32 %argc, i8** %argv) nounwind { +entry: + %ztot = alloca float, align 4 + %z = alloca float, align 4 + store float 0.000000e+00, float* %ztot, align 4 + store float 1.000000e+00, float* %z, align 4 +; CHECK-LONG: blx r2 +; CHECK-NORM: blx _myadd + call void @myadd(float* %ztot, float* %z) + ret i32 0 +} diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll index a6d7410..9e94e39 100644 --- a/test/CodeGen/ARM/fcopysign.ll +++ b/test/CodeGen/ARM/fcopysign.ll @@ -1,18 +1,58 @@ -; RUN: llc < %s -march=arm | grep bic | count 2 -; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | \ -; RUN: grep vneg | count 2 +; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=SOFT +; RUN: llc < %s -mtriple=armv7-gnueabi -float-abi=hard -mcpu=cortex-a8 | FileCheck %s -check-prefix=HARD -define float @test1(float %x, double %y) { - %tmp = fpext float %x to double - %tmp2 = tail call double @copysign( double %tmp, double %y ) - %tmp3 = fptrunc double %tmp2 to float - ret float %tmp3 +; rdar://8984306 +define float @test1(float %x, float %y) nounwind { +entry: +; SOFT: test1: +; SOFT: lsr r1, r1, #31 +; SOFT: bfi r0, r1, #31, #1 + +; HARD: test1: +; HARD: vmov.i32 [[REG1:(d[0-9]+)]], #0x80000000 +; HARD: vbsl [[REG1]], d2, d0 + %0 = tail call float @copysignf(float %x, float %y) nounwind + ret float %0 +} + +define double @test2(double %x, double %y) nounwind { +entry: +; SOFT: test2: +; SOFT: lsr r2, r3, #31 +; SOFT: bfi r1, r2, #31, #1 + +; HARD: test2: +; HARD: vmov.i32 [[REG2:(d[0-9]+)]], #0x80000000 +; HARD: vshl.i64 [[REG2]], [[REG2]], #32 +; HARD: vbsl [[REG2]], d1, d0 + %0 = tail call double @copysign(double %x, double %y) nounwind + ret double %0 +} + +define double @test3(double %x, double %y, double %z) nounwind { +entry: +; SOFT: test3: +; SOFT: vmov.i32 [[REG3:(d[0-9]+)]], #0x80000000 +; SOFT: vshl.i64 [[REG3]], [[REG3]], #32 +; SOFT: vbsl [[REG3]], + %0 = fmul double %x, %y + %1 = tail call double @copysign(double %0, double %z) nounwind + ret double %1 } -define double @test2(double %x, float %y) { - %tmp = fpext float %y to double - %tmp2 = tail call double @copysign( double %x, double %tmp ) - ret double %tmp2 +; rdar://9059537 +define i32 @test4() ssp { +entry: +; SOFT: test4: +; SOFT: vcvt.f32.f64 s0, +; SOFT: vmov.i32 [[REG4:(d[0-9]+)]], #0x80000000 +; SOFT: vbic [[REG5:(d[0-9]+)]], d0, [[REG4]] +; SOFT: vorr d0, [[REG4]], [[REG5]] + %call80 = tail call double @copysign(double 1.000000e+00, double undef) + %conv81 = fptrunc double %call80 to float + %tmp88 = bitcast float %conv81 to i32 + ret i32 %tmp88 } -declare double @copysign(double, double) +declare double @copysign(double, double) nounwind +declare float @copysignf(float, float) nounwind diff --git a/test/CodeGen/ARM/fnegs.ll b/test/CodeGen/ARM/fnegs.ll index c15005e..418b598 100644 --- a/test/CodeGen/ARM/fnegs.ll +++ b/test/CodeGen/ARM/fnegs.ll @@ -13,19 +13,19 @@ entry: ret float %retval } ; VFP2: test1: -; VFP2: vneg.f32 s1, s0 +; VFP2: vneg.f32 s{{.*}}, s{{.*}} ; NFP1: test1: -; NFP1: vneg.f32 d1, d0 +; NFP1: vneg.f32 d{{.*}}, d{{.*}} ; NFP0: test1: -; NFP0: vneg.f32 s1, s0 +; NFP0: vneg.f32 s{{.*}}, s{{.*}} ; CORTEXA8: test1: -; CORTEXA8: vneg.f32 d1, d0 +; CORTEXA8: vneg.f32 d{{.*}}, d{{.*}} ; CORTEXA9: test1: -; CORTEXA9: vneg.f32 s1, s0 +; CORTEXA9: vneg.f32 s{{.*}}, s{{.*}} define float @test2(float* %a) { entry: @@ -37,17 +37,17 @@ entry: ret float %retval } ; VFP2: test2: -; VFP2: vneg.f32 s1, s0 +; VFP2: vneg.f32 s{{.*}}, s{{.*}} ; NFP1: test2: -; NFP1: vneg.f32 d1, d0 +; NFP1: vneg.f32 d{{.*}}, d{{.*}} ; NFP0: test2: -; NFP0: vneg.f32 s1, s0 +; NFP0: vneg.f32 s{{.*}}, s{{.*}} ; CORTEXA8: test2: -; CORTEXA8: vneg.f32 d1, d0 +; CORTEXA8: vneg.f32 d{{.*}}, d{{.*}} ; CORTEXA9: test2: -; CORTEXA9: vneg.f32 s1, s0 +; CORTEXA9: vneg.f32 s{{.*}}, s{{.*}} diff --git a/test/CodeGen/ARM/fnmscs.ll b/test/CodeGen/ARM/fnmscs.ll index 5d83253..76c8067 100644 --- a/test/CodeGen/ARM/fnmscs.ll +++ b/test/CodeGen/ARM/fnmscs.ll @@ -11,7 +11,7 @@ entry: ; NEON: vnmla.f32 ; A8: t1: -; A8: vnmul.f32 s0, s1, s0 +; A8: vnmul.f32 s0, s{{[01]}}, s{{[01]}} ; A8: vsub.f32 d0, d0, d1 %0 = fmul float %a, %b %1 = fsub float -0.0, %0 @@ -28,7 +28,7 @@ entry: ; NEON: vnmla.f32 ; A8: t2: -; A8: vnmul.f32 s0, s1, s0 +; A8: vnmul.f32 s0, s{{[01]}}, s{{[01]}} ; A8: vsub.f32 d0, d0, d1 %0 = fmul float %a, %b %1 = fmul float -1.0, %0 @@ -45,7 +45,7 @@ entry: ; NEON: vnmla.f64 ; A8: t3: -; A8: vnmul.f64 d16, d16, d17 +; A8: vnmul.f64 d16, d1{{[67]}}, d1{{[67]}} ; A8: vsub.f64 d16, d16, d17 %0 = fmul double %a, %b %1 = fsub double -0.0, %0 @@ -62,7 +62,7 @@ entry: ; NEON: vnmla.f64 ; A8: t4: -; A8: vnmul.f64 d16, d16, d17 +; A8: vnmul.f64 d16, d1{{[67]}}, d1{{[67]}} ; A8: vsub.f64 d16, d16, d17 %0 = fmul double %a, %b %1 = fmul double -1.0, %0 diff --git a/test/CodeGen/ARM/fpcmp-opt.ll b/test/CodeGen/ARM/fpcmp-opt.ll index 6435059..65b921b 100644 --- a/test/CodeGen/ARM/fpcmp-opt.ll +++ b/test/CodeGen/ARM/fpcmp-opt.ll @@ -38,6 +38,7 @@ entry: ; FINITE: t2: ; FINITE-NOT: vldr ; FINITE: ldrd r0, [r0] +; FINITE-NOT: b LBB ; FINITE: cmp r0, #0 ; FINITE: cmpeq r1, #0 ; FINITE-NOT: vcmpe.f32 diff --git a/test/CodeGen/ARM/fpcmp_ueq.ll b/test/CodeGen/ARM/fpcmp_ueq.ll index 20eaa13..2e6b3e3 100644 --- a/test/CodeGen/ARM/fpcmp_ueq.ll +++ b/test/CodeGen/ARM/fpcmp_ueq.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | grep moveq +; RUN: llc < %s -mtriple=arm-apple-darwin | grep moveq ; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s define i32 @f7(float %a, float %b) { diff --git a/test/CodeGen/ARM/fpconsts.ll b/test/CodeGen/ARM/fpconsts.ll index 9e7a8ae..638dde9 100644 --- a/test/CodeGen/ARM/fpconsts.ll +++ b/test/CodeGen/ARM/fpconsts.ll @@ -3,7 +3,7 @@ define float @t1(float %x) nounwind readnone optsize { entry: ; CHECK: t1: -; CHECK: vmov.f32 s1, #4.000000e+00 +; CHECK: vmov.f32 s{{.*}}, #4.000000e+00 %0 = fadd float %x, 4.000000e+00 ret float %0 } @@ -27,7 +27,7 @@ entry: define float @t4(float %x) nounwind readnone optsize { entry: ; CHECK: t4: -; CHECK: vmov.f32 s1, #-2.400000e+01 +; CHECK: vmov.f32 s{{.*}}, #-2.400000e+01 %0 = fmul float %x, -2.400000e+01 ret float %0 } diff --git a/test/CodeGen/ARM/fpconv.ll b/test/CodeGen/ARM/fpconv.ll index bf197a4..1b4c008 100644 --- a/test/CodeGen/ARM/fpconv.ll +++ b/test/CodeGen/ARM/fpconv.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP -; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s define float @f1(double %x) { ;CHECK-VFP: f1: diff --git a/test/CodeGen/ARM/global-merge.ll b/test/CodeGen/ARM/global-merge.ll new file mode 100644 index 0000000..49e546c --- /dev/null +++ b/test/CodeGen/ARM/global-merge.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s +; XFAIL: * +; Test the ARMGlobalMerge pass. Use -march=thumb because it has a small +; value for the maximum offset (127). + +; A local array that exceeds the maximum offset should not be merged. +; CHECK: g0: +@g0 = internal global [32 x i32] [ i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2 ] + +; CHECK: _MergedGlobals: +@g1 = internal global i32 1 +@g2 = internal global i32 2 + +; Make sure that the complete variable fits within the range of the maximum +; offset. Having the starting offset in range is not sufficient. +; When this works properly, @g3 is placed in a separate chunk of merged globals. +; CHECK: _MergedGlobals1: +@g3 = internal global [30 x i32] [ i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ] + +; Global variables that can be placed in BSS should be kept together in a +; separate pool of merged globals. +; CHECK: _MergedGlobals2 +@g4 = internal global i32 0 +@g5 = internal global i32 0 diff --git a/test/CodeGen/ARM/hello.ll b/test/CodeGen/ARM/hello.ll index ccdc7bf..bfed7a6 100644 --- a/test/CodeGen/ARM/hello.ll +++ b/test/CodeGen/ARM/hello.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=arm ; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep mov | count 1 ; RUN: llc < %s -mtriple=arm-linux-gnu --disable-fp-elim | \ -; RUN: grep mov | count 3 +; RUN: grep mov | count 2 ; RUN: llc < %s -mtriple=arm-apple-darwin | grep mov | count 2 @str = internal constant [12 x i8] c"Hello World\00" diff --git a/test/CodeGen/ARM/ifcvt6.ll b/test/CodeGen/ARM/ifcvt6.ll index e2c0ba3..5edf32f 100644 --- a/test/CodeGen/ARM/ifcvt6.ll +++ b/test/CodeGen/ARM/ifcvt6.ll @@ -1,10 +1,9 @@ -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep cmpne | count 1 -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep ldmiahi | count 1 +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s define void @foo(i32 %X, i32 %Y) { entry: +; CHECK: cmpne +; CHECK: ldmiahi sp! %tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1] %tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1] %tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1] diff --git a/test/CodeGen/ARM/ifcvt7.ll b/test/CodeGen/ARM/ifcvt7.ll index eb97085..62e1355 100644 --- a/test/CodeGen/ARM/ifcvt7.ll +++ b/test/CodeGen/ARM/ifcvt7.ll @@ -1,14 +1,12 @@ -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep cmpeq | count 1 -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep moveq | count 1 -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep ldmiaeq | count 1 +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s ; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1. %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } define fastcc i32 @CountTree(%struct.quad_struct* %tree) { +; CHECK: cmpeq +; CHECK: moveq +; CHECK: ldmiaeq sp! entry: br label %tailrecurse diff --git a/test/CodeGen/ARM/ifcvt8.ll b/test/CodeGen/ARM/ifcvt8.ll index 1e39060..5fdfc4e 100644 --- a/test/CodeGen/ARM/ifcvt8.ll +++ b/test/CodeGen/ARM/ifcvt8.ll @@ -1,11 +1,11 @@ -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep ldmiane | count 1 +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s %struct.SString = type { i8*, i32, i32 } declare void @abort() define fastcc void @t(%struct.SString* %word, i8 signext %c) { +; CHECK: ldmiane sp! entry: %tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1] br i1 %tmp1, label %cond_true, label %cond_false diff --git a/test/CodeGen/ARM/ldm.ll b/test/CodeGen/ARM/ldm.ll index 78201a6..2f1b85e 100644 --- a/test/CodeGen/ARM/ldm.ll +++ b/test/CodeGen/ARM/ldm.ll @@ -1,10 +1,13 @@ -; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=armv4t-apple-darwin | FileCheck %s -check-prefix=V4T @X = external global [0 x i32] ; <[0 x i32]*> [#uses=5] define i32 @t1() { ; CHECK: t1: ; CHECK: ldmia +; V4T: t1: +; V4T: ldmia %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1] %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1] @@ -14,6 +17,8 @@ define i32 @t1() { define i32 @t2() { ; CHECK: t2: ; CHECK: ldmia +; V4T: t2: +; V4T: ldmia %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1] %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1] @@ -25,6 +30,10 @@ define i32 @t3() { ; CHECK: t3: ; CHECK: ldmib ; CHECK: ldmia sp! +; V4T: t3: +; V4T: ldmib +; V4T: pop +; V4T-NEXT: bx lr %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1] %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1] diff --git a/test/CodeGen/ARM/ldst-f32-2-i32.ll b/test/CodeGen/ARM/ldst-f32-2-i32.ll new file mode 100644 index 0000000..2d016f6 --- /dev/null +++ b/test/CodeGen/ARM/ldst-f32-2-i32.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s +; Check if the f32 load / store pair are optimized to i32 load / store. +; rdar://8944252 + +define void @t(i32 %width, float* nocapture %src, float* nocapture %dst, i32 %index) nounwind { +; CHECK: t: +entry: + %src6 = bitcast float* %src to i8* + %0 = icmp eq i32 %width, 0 + br i1 %0, label %return, label %bb + +bb: +; CHECK: ldr [[REGISTER:(r[0-9]+)]], [r1], r3 +; CHECK: str [[REGISTER]], [r2], #4 + %j.05 = phi i32 [ %2, %bb ], [ 0, %entry ] + %tmp = mul i32 %j.05, %index + %uglygep = getelementptr i8* %src6, i32 %tmp + %src_addr.04 = bitcast i8* %uglygep to float* + %dst_addr.03 = getelementptr float* %dst, i32 %j.05 + %1 = load float* %src_addr.04, align 4 + store float %1, float* %dst_addr.03, align 4 + %2 = add i32 %j.05, 1 + %exitcond = icmp eq i32 %2, %width + br i1 %exitcond, label %return, label %bb + +return: + ret void +} diff --git a/test/CodeGen/ARM/load-global.ll b/test/CodeGen/ARM/load-global.ll new file mode 100644 index 0000000..15a415d --- /dev/null +++ b/test/CodeGen/ARM/load-global.ll @@ -0,0 +1,50 @@ +; RUN: llc < %s -mtriple=armv6-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC +; RUN: llc < %s -mtriple=armv6-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DYNAMIC +; RUN: llc < %s -mtriple=armv6-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC +; RUN: llc < %s -mtriple=thumbv6-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC_T +; RUN: llc < %s -mtriple=armv7-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC_V7 +; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LINUX + +@G = external global i32 + +define i32 @test1() { +; STATIC: _test1: +; STATIC: ldr r0, LCPI0_0 +; STATIC: ldr r0, [r0] +; STATIC: .long _G + +; DYNAMIC: _test1: +; DYNAMIC: ldr r0, LCPI0_0 +; DYNAMIC: ldr r0, [r0] +; DYNAMIC: ldr r0, [r0] +; DYNAMIC: .long L_G$non_lazy_ptr + +; PIC: _test1 +; PIC: ldr r0, LCPI0_0 +; PIC: ldr r0, [pc, r0] +; PIC: ldr r0, [r0] +; PIC: .long L_G$non_lazy_ptr-(LPC0_0+8) + +; PIC_T: _test1 +; PIC_T: ldr.n r0, LCPI0_0 +; PIC_T: add r0, pc +; PIC_T: ldr r0, [r0] +; PIC_T: ldr r0, [r0] +; PIC_T: .long L_G$non_lazy_ptr-(LPC0_0+4) + +; PIC_V7: _test1 +; PIC_V7: movw r0, :lower16:(L_G$non_lazy_ptr-(LPC0_0+8)) +; PIC_V7: movt r0, :upper16:(L_G$non_lazy_ptr-(LPC0_0+8)) +; PIC_V7: ldr r0, [pc, r0] +; PIC_V7: ldr r0, [r0] + +; LINUX: test1 +; LINUX: ldr r0, .LCPI0_0 +; LINUX: ldr r1, .LCPI0_1 +; LINUX: add r0, pc, r0 +; LINUX: ldr r0, [r1, r0] +; LINUX: ldr r0, [r0] +; LINUX: .long G(GOT) + %tmp = load i32* @G + ret i32 %tmp +} diff --git a/test/CodeGen/ARM/lsr-code-insertion.ll b/test/CodeGen/ARM/lsr-code-insertion.ll index b8c543b..1bbb96d 100644 --- a/test/CodeGen/ARM/lsr-code-insertion.ll +++ b/test/CodeGen/ARM/lsr-code-insertion.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -stats |& grep {38.*Number of machine instrs printed} +; RUN: llc < %s -stats |& grep {39.*Number of machine instrs printed} ; RUN: llc < %s -stats |& not grep {.*Number of re-materialization} ; This test really wants to check that the resultant "cond_true" block only ; has a single store in it, and that cond_true55 only has code to materialize diff --git a/test/CodeGen/Thumb/machine-licm.ll b/test/CodeGen/ARM/machine-licm.ll index a87e82c..8656c5b 100644 --- a/test/CodeGen/Thumb/machine-licm.ll +++ b/test/CodeGen/ARM/machine-licm.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s +; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s -check-prefix=THUMB +; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -disable-fp-elim -mattr=+v6t2 | FileCheck %s -check-prefix=MOVT ; rdar://7353541 ; rdar://7354376 +; rdar://8887598 ; The generated code is no where near ideal. It's not recognizing the two ; constantpool entries being loaded can be merged into one. @@ -9,19 +12,41 @@ define void @t(i32* nocapture %vals, i32 %c) nounwind { entry: -; CHECK: t: +; ARM: t: +; ARM: ldr [[REGISTER_1:r[0-9]+]], LCPI0_0 +; Unfortunately currently ARM codegen doesn't cse the ldr from constantpool. +; The issue is it can be read by an "add pc" or a "ldr [pc]" so it's messy +; to add the pseudo instructions to make sure they are CSE'ed at the same +; time as the "ldr cp". +; ARM: ldr r{{[0-9]+}}, LCPI0_1 +; ARM: LPC0_0: +; ARM: ldr r{{[0-9]+}}, [pc, [[REGISTER_1]]] +; ARM: ldr r{{[0-9]+}}, [r{{[0-9]+}}] + +; MOVT: t: +; MOVT: movw [[REGISTER_2:r[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+8)) +; MOVT: movt [[REGISTER_2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+8)) +; MOVT: LPC0_0: +; MOVT: ldr r{{[0-9]+}}, [pc, [[REGISTER_2]]] +; MOVT: ldr r{{[0-9]+}}, [r{{[0-9]+}}] + +; THUMB: t: %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1] br i1 %0, label %return, label %bb.nph bb.nph: ; preds = %entry -; CHECK: BB#1 -; CHECK: ldr.n r2, LCPI0_0 -; CHECK: add r2, pc -; CHECK: ldr r{{[0-9]+}}, [r2] -; CHECK: LBB0_2 -; CHECK: LCPI0_0: -; CHECK-NOT: LCPI0_1: -; CHECK: .section +; ARM: LCPI0_0: +; ARM: LCPI0_1: +; ARM: .section + +; THUMB: BB#1 +; THUMB: ldr.n r2, LCPI0_0 +; THUMB: add r2, pc +; THUMB: ldr r{{[0-9]+}}, [r2] +; THUMB: LBB0_2 +; THUMB: LCPI0_0: +; THUMB-NOT: LCPI0_1: +; THUMB: .section %.pre = load i32* @GV, align 4 ; <i32> [#uses=1] br label %bb diff --git a/test/CodeGen/ARM/neon_div.ll b/test/CodeGen/ARM/neon_div.ll new file mode 100644 index 0000000..e337970 --- /dev/null +++ b/test/CodeGen/ARM/neon_div.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s + +define <8 x i8> @sdivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecpe.f32 +;CHECK: vmovn.i32 +;CHECK: vmovn.i32 +;CHECK: vmovn.i16 + %tmp1 = load <8 x i8>* %A + %tmp2 = load <8 x i8>* %B + %tmp3 = sdiv <8 x i8> %tmp1, %tmp2 + ret <8 x i8> %tmp3 +} + +define <8 x i8> @udivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vmovn.i32 +;CHECK: vmovn.i32 +;CHECK: vqmovun.s16 + %tmp1 = load <8 x i8>* %A + %tmp2 = load <8 x i8>* %B + %tmp3 = udiv <8 x i8> %tmp1, %tmp2 + ret <8 x i8> %tmp3 +} + +define <4 x i16> @sdivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vmovn.i32 + %tmp1 = load <4 x i16>* %A + %tmp2 = load <4 x i16>* %B + %tmp3 = sdiv <4 x i16> %tmp1, %tmp2 + ret <4 x i16> %tmp3 +} + +define <4 x i16> @udivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vrecps.f32 +;CHECK: vmovn.i32 + %tmp1 = load <4 x i16>* %A + %tmp2 = load <4 x i16>* %B + %tmp3 = udiv <4 x i16> %tmp1, %tmp2 + ret <4 x i16> %tmp3 +} diff --git a/test/CodeGen/ARM/neon_shift.ll b/test/CodeGen/ARM/neon_shift.ll new file mode 100644 index 0000000..340f220 --- /dev/null +++ b/test/CodeGen/ARM/neon_shift.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s + +; <rdar://problem/9055897> +define <4 x i16> @t1(<4 x i32> %a) nounwind { +entry: +; CHECK: vqrshrn.s32 d{{[0-9]+}}, q{{[0-9]*}}, #13 + %x = tail call <4 x i16> @llvm.arm.neon.vqrshiftns.v4i16(<4 x i32> %a, <4 x i32> <i32 -13, i32 -13, i32 -13, i32 -13>) + ret <4 x i16> %x +} + +declare <4 x i16> @llvm.arm.neon.vqrshiftns.v4i16(<4 x i32>, <4 x i32>) nounwind readnone diff --git a/test/CodeGen/ARM/phi.ll b/test/CodeGen/ARM/phi.ll new file mode 100644 index 0000000..29e17c0 --- /dev/null +++ b/test/CodeGen/ARM/phi.ll @@ -0,0 +1,23 @@ +; RUN: llc -march=arm < %s | FileCheck %s +; <rdar://problem/8686347> + +define i32 @test1(i1 %a, i32* %b) { +; CHECK: test1 +entry: + br i1 %a, label %lblock, label %rblock + +lblock: + %lbranch = getelementptr i32* %b, i32 1 + br label %end + +rblock: + %rbranch = getelementptr i32* %b, i32 1 + br label %end + +end: +; CHECK: ldr r0, [r1, #4] + %gep = phi i32* [%lbranch, %lblock], [%rbranch, %rblock] + %r = load i32* %gep +; CHECK-NEXT: bx lr + ret i32 %r +}
\ No newline at end of file diff --git a/test/CodeGen/ARM/reg_sequence.ll b/test/CodeGen/ARM/reg_sequence.ll index 24eb3a8..53214fd 100644 --- a/test/CodeGen/ARM/reg_sequence.ll +++ b/test/CodeGen/ARM/reg_sequence.ll @@ -270,8 +270,9 @@ define arm_aapcs_vfpcc float @t9(%0* nocapture, %3* nocapture) nounwind { define arm_aapcs_vfpcc i32 @t10() nounwind { entry: ; CHECK: t10: +; CHECK: vmul.f32 q8, q8, d0[0] ; CHECK: vmov.i32 q9, #0x3F000000 -; CHECK: vmla.f32 q8, q8, d0[0] +; CHECK: vadd.f32 q8, q8, q8 %0 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] %1 = insertelement <4 x float> %0, float undef, i32 1 ; <<4 x float>> [#uses=1] %2 = insertelement <4 x float> %1, float undef, i32 2 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll index 06b42f4..1aa0d39 100644 --- a/test/CodeGen/ARM/select.ll +++ b/test/CodeGen/ARM/select.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP ; RUN: llc < %s -mattr=+neon,+thumb2 -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=CHECK-NEON diff --git a/test/CodeGen/ARM/select_xform.ll b/test/CodeGen/ARM/select_xform.ll index 21bc5fa..5dabfc3 100644 --- a/test/CodeGen/ARM/select_xform.ll +++ b/test/CodeGen/ARM/select_xform.ll @@ -8,7 +8,8 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { ; ARM: movgt r0, r1 ; T2: t1: -; T2: sub.w r0, r1, #-2147483648 +; T2: mvn r0, #-2147483648 +; T2: add r0, r1 ; T2: movgt r0, r1 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 diff --git a/test/CodeGen/ARM/spill-q.ll b/test/CodeGen/ARM/spill-q.ll index dc83e25..bf4e55c 100644 --- a/test/CodeGen/ARM/spill-q.ll +++ b/test/CodeGen/ARM/spill-q.ll @@ -15,7 +15,10 @@ define void @aaa(%quuz* %this, i8* %block) { ; CHECK: vst1.64 {{.*}}sp, :128 ; CHECK: vld1.64 {{.*}}sp, :128 entry: - %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] + %aligned_vec = alloca <4 x float>, align 16 + %"alloca point" = bitcast i32 0 to i32 + %vecptr = bitcast <4 x float>* %aligned_vec to i8* + %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %vecptr, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 6.300000e+01, float* undef, align 4 %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 0.000000e+00, float* undef, align 4 diff --git a/test/CodeGen/ARM/str_pre-2.ll b/test/CodeGen/ARM/str_pre-2.ll index 4f9ba4d..465c7e6 100644 --- a/test/CodeGen/ARM/str_pre-2.ll +++ b/test/CodeGen/ARM/str_pre-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=arm-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=armv6-linux-gnu | FileCheck %s @b = external global i64* diff --git a/test/CodeGen/ARM/tail-opts.ll b/test/CodeGen/ARM/tail-opts.ll index 17c8bae..5b3dce3 100644 --- a/test/CodeGen/ARM/tail-opts.ll +++ b/test/CodeGen/ARM/tail-opts.ll @@ -17,13 +17,16 @@ declare i8* @choose(i8*, i8*) ; CHECK: tail_duplicate_me: ; CHECK: qux ; CHECK: qux -; CHECK: ldr r{{.}}, LCPI +; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK +; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK ; CHECK: str r ; CHECK-NEXT: bx r -; CHECK: ldr r{{.}}, LCPI +; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK +; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK ; CHECK: str r ; CHECK-NEXT: bx r -; CHECK: ldr r{{.}}, LCPI +; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK +; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK ; CHECK: str r ; CHECK-NEXT: bx r diff --git a/test/CodeGen/ARM/thumb1-varalloc.ll b/test/CodeGen/ARM/thumb1-varalloc.ll new file mode 100644 index 0000000..25093fe --- /dev/null +++ b/test/CodeGen/ARM/thumb1-varalloc.ll @@ -0,0 +1,40 @@ +; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s +; rdar://8819685 + +@__bar = external hidden global i8* +@__baz = external hidden global i8* + +define i8* @_foo() { +entry: +; CHECK: foo: + + %size = alloca i32, align 4 + %0 = load i8** @__bar, align 4 + %1 = icmp eq i8* %0, null + br i1 %1, label %bb1, label %bb3 + +bb1: + store i32 1026, i32* %size, align 4 + %2 = alloca [1026 x i8], align 1 +; CHECK: mov r0, sp +; CHECK: adds r4, r0, r4 + %3 = getelementptr inbounds [1026 x i8]* %2, i32 0, i32 0 + %4 = call i32 @_called_func(i8* %3, i32* %size) nounwind + %5 = icmp eq i32 %4, 0 + br i1 %5, label %bb2, label %bb3 + +bb2: + %6 = call i8* @strdup(i8* %3) nounwind + store i8* %6, i8** @__baz, align 4 + br label %bb3 + +bb3: + %.0 = phi i8* [ %0, %entry ], [ %6, %bb2 ], [ %3, %bb1 ] +; CHECK: subs r4, #5 +; CHECK-NEXT: mov sp, r4 +; CHECK-NEXT: pop {r4, r5, r6, r7, pc} + ret i8* %.0 +} + +declare noalias i8* @strdup(i8* nocapture) nounwind +declare i32 @_called_func(i8*, i32*) nounwind
\ No newline at end of file diff --git a/test/CodeGen/ARM/umulo-32.ll b/test/CodeGen/ARM/umulo-32.ll new file mode 100644 index 0000000..aa7d28a --- /dev/null +++ b/test/CodeGen/ARM/umulo-32.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s + +%umul.ty = type { i32, i1 } + +define i32 @func(i32 %a) nounwind { +; CHECK: func +; CHECK: muldi3 + %tmp0 = tail call %umul.ty @llvm.umul.with.overflow.i32(i32 %a, i32 37) + %tmp1 = extractvalue %umul.ty %tmp0, 0 + %tmp2 = select i1 undef, i32 -1, i32 %tmp1 + ret i32 %tmp2 +} + +declare %umul.ty @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone diff --git a/test/CodeGen/ARM/unaligned_load_store.ll b/test/CodeGen/ARM/unaligned_load_store.ll index 354895e..b42e11f 100644 --- a/test/CodeGen/ARM/unaligned_load_store.ll +++ b/test/CodeGen/ARM/unaligned_load_store.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=GENERIC +; RUN: llc < %s -march=arm -pre-RA-sched=source | FileCheck %s -check-prefix=GENERIC ; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=DARWIN_V6 ; RUN: llc < %s -mtriple=armv6-apple-darwin -arm-strict-align | FileCheck %s -check-prefix=GENERIC ; RUN: llc < %s -mtriple=armv6-linux | FileCheck %s -check-prefix=GENERIC diff --git a/test/CodeGen/ARM/vbits.ll b/test/CodeGen/ARM/vbits.ll index 880495d..51f9bdf 100644 --- a/test/CodeGen/ARM/vbits.ll +++ b/test/CodeGen/ARM/vbits.ll @@ -529,7 +529,7 @@ define <16 x i8> @v_orrimmQ(<16 x i8>* %A) nounwind { define <8 x i8> @v_bicimm(<8 x i8>* %A) nounwind { ; CHECK: v_bicimm: ; CHECK-NOT: vmov -; CHECK-NOT vmvn +; CHECK-NOT: vmvn ; CHECK: vbic %tmp1 = load <8 x i8>* %A %tmp3 = and <8 x i8> %tmp1, < i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0 > diff --git a/test/CodeGen/ARM/vcge.ll b/test/CodeGen/ARM/vcge.ll index f190931..bf5f0b9 100644 --- a/test/CodeGen/ARM/vcge.ll +++ b/test/CodeGen/ARM/vcge.ll @@ -182,3 +182,22 @@ define <8 x i8> @vclei8Z(<8 x i8>* %A) nounwind { %tmp4 = sext <8 x i1> %tmp3 to <8 x i8> ret <8 x i8> %tmp4 } + +; Radar 8782191 +; Floating-point comparisons against zero produce results with integer +; elements, not floating-point elements. +define void @test_vclez_fp() nounwind optsize { +;CHECK: test_vclez_fp +;CHECK: vcle.f32 +entry: + %0 = fcmp ole <4 x float> undef, zeroinitializer + %1 = sext <4 x i1> %0 to <4 x i16> + %2 = add <4 x i16> %1, zeroinitializer + %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> + %4 = add <8 x i16> %3, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> + %5 = trunc <8 x i16> %4 to <8 x i8> + tail call void @llvm.arm.neon.vst1.v8i8(i8* undef, <8 x i8> %5, i32 1) + unreachable +} + +declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>, i32) nounwind diff --git a/test/CodeGen/ARM/vcgt.ll b/test/CodeGen/ARM/vcgt.ll index 7663da3..c3c4cb3 100644 --- a/test/CodeGen/ARM/vcgt.ll +++ b/test/CodeGen/ARM/vcgt.ll @@ -161,9 +161,9 @@ define <4 x i32> @vacgtQf32(<4 x float>* %A, <4 x float>* %B) nounwind { ; rdar://7923010 define <4 x i32> @vcgt_zext(<4 x float>* %A, <4 x float>* %B) nounwind { ;CHECK: vcgt_zext: +;CHECK: vmov.i32 q10, #0x1 ;CHECK: vcgt.f32 q8 -;CHECK: vmov.i32 q9, #0x1 -;CHECK: vand q8, q8, q9 +;CHECK: vand q8, q8, q10 %tmp1 = load <4 x float>* %A %tmp2 = load <4 x float>* %B %tmp3 = fcmp ogt <4 x float> %tmp1, %tmp2 diff --git a/test/CodeGen/ARM/vcombine.ll b/test/CodeGen/ARM/vcombine.ll index e673305..527f93b 100644 --- a/test/CodeGen/ARM/vcombine.ll +++ b/test/CodeGen/ARM/vcombine.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -march=arm -mattr=+neon +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s define <16 x i8> @vcombine8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +; CHECK: vcombine8 +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> @@ -8,6 +11,9 @@ define <16 x i8> @vcombine8(<8 x i8>* %A, <8 x i8>* %B) nounwind { } define <8 x i16> @vcombine16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +; CHECK: vcombine16 +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> @@ -15,6 +21,9 @@ define <8 x i16> @vcombine16(<4 x i16>* %A, <4 x i16>* %B) nounwind { } define <4 x i32> @vcombine32(<2 x i32>* %A, <2 x i32>* %B) nounwind { +; CHECK: vcombine32 +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -22,6 +31,9 @@ define <4 x i32> @vcombine32(<2 x i32>* %A, <2 x i32>* %B) nounwind { } define <4 x float> @vcombinefloat(<2 x float>* %A, <2 x float>* %B) nounwind { +; CHECK: vcombinefloat +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <2 x float>* %A %tmp2 = load <2 x float>* %B %tmp3 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -29,8 +41,32 @@ define <4 x float> @vcombinefloat(<2 x float>* %A, <2 x float>* %B) nounwind { } define <2 x i64> @vcombine64(<1 x i64>* %A, <1 x i64>* %B) nounwind { +; CHECK: vcombine64 +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <1 x i64>* %A %tmp2 = load <1 x i64>* %B %tmp3 = shufflevector <1 x i64> %tmp1, <1 x i64> %tmp2, <2 x i32> <i32 0, i32 1> ret <2 x i64> %tmp3 } + +; Check for vget_low and vget_high implemented with shufflevector. PR8411. +; They should not require storing to the stack. + +define <4 x i16> @vget_low16(<8 x i16>* %A) nounwind { +; CHECK: vget_low16 +; CHECK-NOT: vst +; CHECK: vmov r0, r1, d16 + %tmp1 = load <8 x i16>* %A + %tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> + ret <4 x i16> %tmp2 +} + +define <8 x i8> @vget_high8(<16 x i8>* %A) nounwind { +; CHECK: vget_high8 +; CHECK-NOT: vst +; CHECK: vmov r0, r1, d17 + %tmp1 = load <16 x i8>* %A + %tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> + ret <8 x i8> %tmp2 +} diff --git a/test/CodeGen/ARM/vcvt.ll b/test/CodeGen/ARM/vcvt.ll index f4cc536..c078f49 100644 --- a/test/CodeGen/ARM/vcvt.ll +++ b/test/CodeGen/ARM/vcvt.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+neon,+fp16 | FileCheck %s define <2 x i32> @vcvt_f32tos32(<2 x float>* %A) nounwind { ;CHECK: vcvt_f32tos32: @@ -138,3 +138,21 @@ declare <4 x i32> @llvm.arm.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float>, i32) nounwi declare <4 x float> @llvm.arm.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone declare <4 x float> @llvm.arm.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone +define <4 x float> @vcvt_f16tof32(<4 x i16>* %A) nounwind { +;CHECK: vcvt_f16tof32: +;CHECK: vcvt.f32.f16 + %tmp1 = load <4 x i16>* %A + %tmp2 = call <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16> %tmp1) + ret <4 x float> %tmp2 +} + +define <4 x i16> @vcvt_f32tof16(<4 x float>* %A) nounwind { +;CHECK: vcvt_f32tof16: +;CHECK: vcvt.f16.f32 + %tmp1 = load <4 x float>* %A + %tmp2 = call <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float> %tmp1) + ret <4 x i16> %tmp2 +} + +declare <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16>) nounwind readnone +declare <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float>) nounwind readnone diff --git a/test/CodeGen/ARM/vdup.ll b/test/CodeGen/ARM/vdup.ll index a545f6c..e99fac1 100644 --- a/test/CodeGen/ARM/vdup.ll +++ b/test/CodeGen/ARM/vdup.ll @@ -162,24 +162,6 @@ define <4 x float> @v_shuffledupQfloat(float %A) nounwind { ret <4 x float> %tmp2 } -define <2 x float> @v_shuffledupfloat2(float* %A) nounwind { -;CHECK: v_shuffledupfloat2: -;CHECK: vdup.32 - %tmp0 = load float* %A - %tmp1 = insertelement <2 x float> undef, float %tmp0, i32 0 - %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer - ret <2 x float> %tmp2 -} - -define <4 x float> @v_shuffledupQfloat2(float* %A) nounwind { -;CHECK: v_shuffledupQfloat2: -;CHECK: vdup.32 - %tmp0 = load float* %A - %tmp1 = insertelement <4 x float> undef, float %tmp0, i32 0 - %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> zeroinitializer - ret <4 x float> %tmp2 -} - define <8 x i8> @vduplane8(<8 x i8>* %A) nounwind { ;CHECK: vduplane8: ;CHECK: vdup.8 diff --git a/test/CodeGen/ARM/vector-DAGCombine.ll b/test/CodeGen/ARM/vector-DAGCombine.ll new file mode 100644 index 0000000..3ab0cfc --- /dev/null +++ b/test/CodeGen/ARM/vector-DAGCombine.ll @@ -0,0 +1,107 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s + +; PR7158 +define i32 @test_pr7158() nounwind { +bb.nph55.bb.nph55.split_crit_edge: + br label %bb3 + +bb3: ; preds = %bb3, %bb.nph55.bb.nph55.split_crit_edge + br i1 undef, label %bb.i19, label %bb3 + +bb.i19: ; preds = %bb.i19, %bb3 + %0 = insertelement <4 x float> undef, float undef, i32 3 ; <<4 x float>> [#uses=3] + %1 = fmul <4 x float> %0, %0 ; <<4 x float>> [#uses=1] + %2 = bitcast <4 x float> %1 to <2 x double> ; <<2 x double>> [#uses=0] + %3 = fmul <4 x float> %0, undef ; <<4 x float>> [#uses=0] + br label %bb.i19 +} + +; Check that the DAG combiner does not arbitrarily modify BUILD_VECTORs +; after legalization. +define void @test_illegal_build_vector() nounwind { +entry: + store <2 x i64> undef, <2 x i64>* undef, align 16 + %0 = load <16 x i8>* undef, align 16 ; <<16 x i8>> [#uses=1] + %1 = or <16 x i8> zeroinitializer, %0 ; <<16 x i8>> [#uses=1] + store <16 x i8> %1, <16 x i8>* undef, align 16 + ret void +} + +; Radar 8407927: Make sure that VMOVRRD gets optimized away when the result is +; converted back to be used as a vector type. +; CHECK: test_vmovrrd_combine +define <4 x i32> @test_vmovrrd_combine() nounwind { +entry: + br i1 undef, label %bb1, label %bb2 + +bb1: + %0 = bitcast <2 x i64> zeroinitializer to <2 x double> + %1 = extractelement <2 x double> %0, i32 0 + %2 = bitcast double %1 to i64 + %3 = insertelement <1 x i64> undef, i64 %2, i32 0 +; CHECK-NOT: vmov s +; CHECK: vext.8 + %4 = shufflevector <1 x i64> %3, <1 x i64> undef, <2 x i32> <i32 0, i32 1> + %tmp2006.3 = bitcast <2 x i64> %4 to <16 x i8> + %5 = shufflevector <16 x i8> %tmp2006.3, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> + %tmp2004.3 = bitcast <16 x i8> %5 to <4 x i32> + br i1 undef, label %bb2, label %bb1 + +bb2: + %result = phi <4 x i32> [ undef, %entry ], [ %tmp2004.3, %bb1 ] + ret <4 x i32> %result +} + +; Test trying to do a ShiftCombine on illegal types. +; The vector should be split first. +define void @lshrIllegalType(<8 x i32>* %A) nounwind { + %tmp1 = load <8 x i32>* %A + %tmp2 = lshr <8 x i32> %tmp1, < i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3> + store <8 x i32> %tmp2, <8 x i32>* %A + ret void +} + +; Test folding a binary vector operation with constant BUILD_VECTOR +; operands with i16 elements. +define void @test_i16_constant_fold() nounwind optsize { +entry: + %0 = sext <4 x i1> zeroinitializer to <4 x i16> + %1 = add <4 x i16> %0, zeroinitializer + %2 = shufflevector <4 x i16> %1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> + %3 = add <8 x i16> %2, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> + %4 = trunc <8 x i16> %3 to <8 x i8> + tail call void @llvm.arm.neon.vst1.v8i8(i8* undef, <8 x i8> %4, i32 1) + unreachable +} + +declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>, i32) nounwind + +; Test that loads and stores of i64 vector elements are handled as f64 values +; so they are not split up into i32 values. Radar 8755338. +define void @i64_buildvector(i64* %ptr, <2 x i64>* %vp) nounwind { +; CHECK: i64_buildvector +; CHECK: vldr.64 + %t0 = load i64* %ptr, align 4 + %t1 = insertelement <2 x i64> undef, i64 %t0, i32 0 + store <2 x i64> %t1, <2 x i64>* %vp + ret void +} + +define void @i64_insertelement(i64* %ptr, <2 x i64>* %vp) nounwind { +; CHECK: i64_insertelement +; CHECK: vldr.64 + %t0 = load i64* %ptr, align 4 + %vec = load <2 x i64>* %vp + %t1 = insertelement <2 x i64> %vec, i64 %t0, i32 0 + store <2 x i64> %t1, <2 x i64>* %vp + ret void +} + +define void @i64_extractelement(i64* %ptr, <2 x i64>* %vp) nounwind { +; CHECK: i64_extractelement +; CHECK: vstr.64 + %vec = load <2 x i64>* %vp + %t1 = extractelement <2 x i64> %vec, i32 0 + store i64 %t1, i64* %ptr + ret void +} diff --git a/test/CodeGen/ARM/vext.ll b/test/CodeGen/ARM/vext.ll index e460a84..55abefe 100644 --- a/test/CodeGen/ARM/vext.ll +++ b/test/CodeGen/ARM/vext.ll @@ -74,3 +74,62 @@ define <16 x i8> @test_vextRq_undef(<16 x i8>* %A, <16 x i8>* %B) nounwind { ret <16 x i8> %tmp3 } +; Tests for ReconstructShuffle function. Indices have to be carefully +; chosen to reach lowering phase as a BUILD_VECTOR. + +; One vector needs vext, the other can be handled by extract_subvector +; Also checks interleaving of sources is handled correctly. +; Essence: a vext is used on %A and something saner than stack load/store for final result. +define <4 x i16> @test_interleaved(<8 x i16>* %A, <8 x i16>* %B) nounwind { +;CHECK: test_interleaved: +;CHECK: vext.16 +;CHECK-NOT: vext.16 +;CHECK: vzip.16 + %tmp1 = load <8 x i16>* %A + %tmp2 = load <8 x i16>* %B + %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <4 x i32> <i32 3, i32 8, i32 5, i32 9> + ret <4 x i16> %tmp3 +} + +; An undef in the shuffle list should still be optimizable +define <4 x i16> @test_undef(<8 x i16>* %A, <8 x i16>* %B) nounwind { +;CHECK: test_undef: +;CHECK: vzip.16 + %tmp1 = load <8 x i16>* %A + %tmp2 = load <8 x i16>* %B + %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <4 x i32> <i32 undef, i32 8, i32 5, i32 9> + ret <4 x i16> %tmp3 +} + +; We should ignore a build_vector with more than two sources. +; Use illegal <32 x i16> type to produce such a shuffle after legalizing types. +; Try to look for fallback to stack expansion. +define <4 x i16> @test_multisource(<32 x i16>* %B) nounwind { +;CHECK: test_multisource: +;CHECK: vst1.16 + %tmp1 = load <32 x i16>* %B + %tmp2 = shufflevector <32 x i16> %tmp1, <32 x i16> undef, <4 x i32> <i32 0, i32 8, i32 16, i32 24> + ret <4 x i16> %tmp2 +} + +; We don't handle shuffles using more than half of a 128-bit vector. +; Again, test for fallback to stack expansion +define <4 x i16> @test_largespan(<8 x i16>* %B) nounwind { +;CHECK: test_largespan: +;CHECK: vst1.16 + %tmp1 = load <8 x i16>* %B + %tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> + ret <4 x i16> %tmp2 +} + +; The actual shuffle code only handles some cases, make sure we check +; this rather than blindly emitting a VECTOR_SHUFFLE (infinite +; lowering loop can result otherwise). +define <8 x i8> @test_illegal(<16 x i8>* %A, <16 x i8>* %B) nounwind { +;CHECK: test_illegal: +;CHECK: vst1.8 + %tmp1 = load <16 x i8>* %A + %tmp2 = load <16 x i8>* %B + %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <8 x i32> <i32 0, i32 7, i32 5, i32 25, i32 3, i32 2, i32 2, i32 26> + ret <8 x i8> %tmp3 +} diff --git a/test/CodeGen/ARM/vld1.ll b/test/CodeGen/ARM/vld1.ll index 16bd832..c886125 100644 --- a/test/CodeGen/ARM/vld1.ll +++ b/test/CodeGen/ARM/vld1.ll @@ -16,6 +16,18 @@ define <4 x i16> @vld1i16(i16* %A) nounwind { ret <4 x i16> %tmp1 } +;Check for a post-increment updating load. +define <4 x i16> @vld1i16_update(i16** %ptr) nounwind { +;CHECK: vld1i16_update: +;CHECK: vld1.16 {d16}, [r1]! + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1) + %tmp2 = getelementptr i16* %A, i32 4 + store i16* %tmp2, i16** %ptr + ret <4 x i16> %tmp1 +} + define <2 x i32> @vld1i32(i32* %A) nounwind { ;CHECK: vld1i32: ;CHECK: vld1.32 @@ -24,6 +36,18 @@ define <2 x i32> @vld1i32(i32* %A) nounwind { ret <2 x i32> %tmp1 } +;Check for a post-increment updating load with register increment. +define <2 x i32> @vld1i32_update(i32** %ptr, i32 %inc) nounwind { +;CHECK: vld1i32_update: +;CHECK: vld1.32 {d16}, [r2], r1 + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0, i32 1) + %tmp2 = getelementptr i32* %A, i32 %inc + store i32* %tmp2, i32** %ptr + ret <2 x i32> %tmp1 +} + define <2 x float> @vld1f(float* %A) nounwind { ;CHECK: vld1f: ;CHECK: vld1.32 @@ -48,6 +72,17 @@ define <16 x i8> @vld1Qi8(i8* %A) nounwind { ret <16 x i8> %tmp1 } +;Check for a post-increment updating load. +define <16 x i8> @vld1Qi8_update(i8** %ptr) nounwind { +;CHECK: vld1Qi8_update: +;CHECK: vld1.8 {d16, d17}, [r1, :64]! + %A = load i8** %ptr + %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A, i32 8) + %tmp2 = getelementptr i8* %A, i32 16 + store i8* %tmp2, i8** %ptr + ret <16 x i8> %tmp1 +} + define <8 x i16> @vld1Qi16(i16* %A) nounwind { ;CHECK: vld1Qi16: ;Check the alignment value. Max for this instruction is 128 bits: diff --git a/test/CodeGen/ARM/vld2.ll b/test/CodeGen/ARM/vld2.ll index 3fdd7b7..29b3794 100644 --- a/test/CodeGen/ARM/vld2.ll +++ b/test/CodeGen/ARM/vld2.ll @@ -56,6 +56,21 @@ define <2 x float> @vld2f(float* %A) nounwind { ret <2 x float> %tmp4 } +;Check for a post-increment updating load. +define <2 x float> @vld2f_update(float** %ptr) nounwind { +;CHECK: vld2f_update: +;CHECK: vld2.32 {d16, d17}, [r1]! + %A = load float** %ptr + %tmp0 = bitcast float* %A to i8* + %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1) + %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1 + %tmp4 = fadd <2 x float> %tmp2, %tmp3 + %tmp5 = getelementptr float* %A, i32 4 + store float* %tmp5, float** %ptr + ret <2 x float> %tmp4 +} + define <1 x i64> @vld2i64(i64* %A) nounwind { ;CHECK: vld2i64: ;Check the alignment value. Max for this instruction is 128 bits: @@ -79,6 +94,20 @@ define <16 x i8> @vld2Qi8(i8* %A) nounwind { ret <16 x i8> %tmp4 } +;Check for a post-increment updating load with register increment. +define <16 x i8> @vld2Qi8_update(i8** %ptr, i32 %inc) nounwind { +;CHECK: vld2Qi8_update: +;CHECK: vld2.8 {d16, d17, d18, d19}, [r2, :128], r1 + %A = load i8** %ptr + %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 16) + %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1 + %tmp4 = add <16 x i8> %tmp2, %tmp3 + %tmp5 = getelementptr i8* %A, i32 %inc + store i8* %tmp5, i8** %ptr + ret <16 x i8> %tmp4 +} + define <8 x i16> @vld2Qi16(i16* %A) nounwind { ;CHECK: vld2Qi16: ;Check the alignment value. Max for this instruction is 256 bits: diff --git a/test/CodeGen/ARM/vld3.ll b/test/CodeGen/ARM/vld3.ll index 0e541bb..dde530f 100644 --- a/test/CodeGen/ARM/vld3.ll +++ b/test/CodeGen/ARM/vld3.ll @@ -33,6 +33,21 @@ define <4 x i16> @vld3i16(i16* %A) nounwind { ret <4 x i16> %tmp4 } +;Check for a post-increment updating load with register increment. +define <4 x i16> @vld3i16_update(i16** %ptr, i32 %inc) nounwind { +;CHECK: vld3i16_update: +;CHECK: vld3.16 {d16, d17, d18}, [r2], r1 + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0, i32 1) + %tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 2 + %tmp4 = add <4 x i16> %tmp2, %tmp3 + %tmp5 = getelementptr i16* %A, i32 %inc + store i16* %tmp5, i16** %ptr + ret <4 x i16> %tmp4 +} + define <2 x i32> @vld3i32(i32* %A) nounwind { ;CHECK: vld3i32: ;CHECK: vld3.32 @@ -103,6 +118,22 @@ define <4 x i32> @vld3Qi32(i32* %A) nounwind { ret <4 x i32> %tmp4 } +;Check for a post-increment updating load. +define <4 x i32> @vld3Qi32_update(i32** %ptr) nounwind { +;CHECK: vld3Qi32_update: +;CHECK: vld3.32 {d16, d18, d20}, [r1]! +;CHECK: vld3.32 {d17, d19, d21}, [r1]! + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8* %tmp0, i32 1) + %tmp2 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 2 + %tmp4 = add <4 x i32> %tmp2, %tmp3 + %tmp5 = getelementptr i32* %A, i32 12 + store i32* %tmp5, i32** %ptr + ret <4 x i32> %tmp4 +} + define <4 x float> @vld3Qf(float* %A) nounwind { ;CHECK: vld3Qf: ;CHECK: vld3.32 diff --git a/test/CodeGen/ARM/vld4.ll b/test/CodeGen/ARM/vld4.ll index a616a98..59a73db 100644 --- a/test/CodeGen/ARM/vld4.ll +++ b/test/CodeGen/ARM/vld4.ll @@ -22,6 +22,20 @@ define <8 x i8> @vld4i8(i8* %A) nounwind { ret <8 x i8> %tmp4 } +;Check for a post-increment updating load with register increment. +define <8 x i8> @vld4i8_update(i8** %ptr, i32 %inc) nounwind { +;CHECK: vld4i8_update: +;CHECK: vld4.8 {d16, d17, d18, d19}, [r2, :128], r1 + %A = load i8** %ptr + %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 16) + %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2 + %tmp4 = add <8 x i8> %tmp2, %tmp3 + %tmp5 = getelementptr i8* %A, i32 %inc + store i8* %tmp5, i8** %ptr + ret <8 x i8> %tmp4 +} + define <4 x i16> @vld4i16(i16* %A) nounwind { ;CHECK: vld4i16: ;Check the alignment value. Max for this instruction is 256 bits: @@ -94,6 +108,22 @@ define <8 x i16> @vld4Qi16(i16* %A) nounwind { ret <8 x i16> %tmp4 } +;Check for a post-increment updating load. +define <8 x i16> @vld4Qi16_update(i16** %ptr) nounwind { +;CHECK: vld4Qi16_update: +;CHECK: vld4.16 {d16, d18, d20, d22}, [r1, :64]! +;CHECK: vld4.16 {d17, d19, d21, d23}, [r1, :64]! + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0, i32 8) + %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2 + %tmp4 = add <8 x i16> %tmp2, %tmp3 + %tmp5 = getelementptr i16* %A, i32 32 + store i16* %tmp5, i16** %ptr + ret <8 x i16> %tmp4 +} + define <4 x i32> @vld4Qi32(i32* %A) nounwind { ;CHECK: vld4Qi32: ;CHECK: vld4.32 diff --git a/test/CodeGen/ARM/vlddup.ll b/test/CodeGen/ARM/vlddup.ll new file mode 100644 index 0000000..d0e9ac3 --- /dev/null +++ b/test/CodeGen/ARM/vlddup.ll @@ -0,0 +1,212 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s + +define <8 x i8> @vld1dupi8(i8* %A) nounwind { +;CHECK: vld1dupi8: +;Check the (default) alignment value. +;CHECK: vld1.8 {d16[]}, [r0] + %tmp1 = load i8* %A, align 8 + %tmp2 = insertelement <8 x i8> undef, i8 %tmp1, i32 0 + %tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> undef, <8 x i32> zeroinitializer + ret <8 x i8> %tmp3 +} + +define <4 x i16> @vld1dupi16(i16* %A) nounwind { +;CHECK: vld1dupi16: +;Check the alignment value. Max for this instruction is 16 bits: +;CHECK: vld1.16 {d16[]}, [r0, :16] + %tmp1 = load i16* %A, align 8 + %tmp2 = insertelement <4 x i16> undef, i16 %tmp1, i32 0 + %tmp3 = shufflevector <4 x i16> %tmp2, <4 x i16> undef, <4 x i32> zeroinitializer + ret <4 x i16> %tmp3 +} + +define <2 x i32> @vld1dupi32(i32* %A) nounwind { +;CHECK: vld1dupi32: +;Check the alignment value. Max for this instruction is 32 bits: +;CHECK: vld1.32 {d16[]}, [r0, :32] + %tmp1 = load i32* %A, align 8 + %tmp2 = insertelement <2 x i32> undef, i32 %tmp1, i32 0 + %tmp3 = shufflevector <2 x i32> %tmp2, <2 x i32> undef, <2 x i32> zeroinitializer + ret <2 x i32> %tmp3 +} + +define <2 x float> @vld1dupf(float* %A) nounwind { +;CHECK: vld1dupf: +;CHECK: vld1.32 {d16[]}, [r0] + %tmp0 = load float* %A + %tmp1 = insertelement <2 x float> undef, float %tmp0, i32 0 + %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer + ret <2 x float> %tmp2 +} + +define <16 x i8> @vld1dupQi8(i8* %A) nounwind { +;CHECK: vld1dupQi8: +;Check the (default) alignment value. +;CHECK: vld1.8 {d16[], d17[]}, [r0] + %tmp1 = load i8* %A, align 8 + %tmp2 = insertelement <16 x i8> undef, i8 %tmp1, i32 0 + %tmp3 = shufflevector <16 x i8> %tmp2, <16 x i8> undef, <16 x i32> zeroinitializer + ret <16 x i8> %tmp3 +} + +define <4 x float> @vld1dupQf(float* %A) nounwind { +;CHECK: vld1dupQf: +;CHECK: vld1.32 {d16[], d17[]}, [r0] + %tmp0 = load float* %A + %tmp1 = insertelement <4 x float> undef, float %tmp0, i32 0 + %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> zeroinitializer + ret <4 x float> %tmp2 +} + +%struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } +%struct.__neon_int4x16x2_t = type { <4 x i16>, <4 x i16> } +%struct.__neon_int2x32x2_t = type { <2 x i32>, <2 x i32> } + +define <8 x i8> @vld2dupi8(i8* %A) nounwind { +;CHECK: vld2dupi8: +;Check the (default) alignment value. +;CHECK: vld2.8 {d16[], d17[]}, [r0] + %tmp0 = tail call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, i32 0, i32 1) + %tmp1 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 0 + %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 1 + %tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp5 = add <8 x i8> %tmp2, %tmp4 + ret <8 x i8> %tmp5 +} + +define <4 x i16> @vld2dupi16(i16* %A) nounwind { +;CHECK: vld2dupi16: +;Check that a power-of-two alignment smaller than the total size of the memory +;being loaded is ignored. +;CHECK: vld2.16 {d16[], d17[]}, [r0] + %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2) + %tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0 + %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1 + %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp5 = add <4 x i16> %tmp2, %tmp4 + ret <4 x i16> %tmp5 +} + +;Check for a post-increment updating load. +define <4 x i16> @vld2dupi16_update(i16** %ptr) nounwind { +;CHECK: vld2dupi16_update: +;CHECK: vld2.16 {d16[], d17[]}, [r1]! + %A = load i16** %ptr + %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2) + %tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0 + %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1 + %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp5 = add <4 x i16> %tmp2, %tmp4 + %tmp6 = getelementptr i16* %A, i32 2 + store i16* %tmp6, i16** %ptr + ret <4 x i16> %tmp5 +} + +define <2 x i32> @vld2dupi32(i32* %A) nounwind { +;CHECK: vld2dupi32: +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vld2.32 {d16[], d17[]}, [r0, :64] + %tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16) + %tmp1 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 0 + %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 1 + %tmp4 = shufflevector <2 x i32> %tmp3, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp5 = add <2 x i32> %tmp2, %tmp4 + ret <2 x i32> %tmp5 +} + +declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly +declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly + +%struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> } +%struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> } + +;Check for a post-increment updating load with register increment. +define <8 x i8> @vld3dupi8_update(i8** %ptr, i32 %inc) nounwind { +;CHECK: vld3dupi8_update: +;CHECK: vld3.8 {d16[], d17[], d18[]}, [r2], r1 + %A = load i8** %ptr + %tmp0 = tail call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 0, i32 8) + %tmp1 = extractvalue %struct.__neon_int8x8x3_t %tmp0, 0 + %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp0, 1 + %tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp0, 2 + %tmp6 = shufflevector <8 x i8> %tmp5, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp7 = add <8 x i8> %tmp2, %tmp4 + %tmp8 = add <8 x i8> %tmp7, %tmp6 + %tmp9 = getelementptr i8* %A, i32 %inc + store i8* %tmp9, i8** %ptr + ret <8 x i8> %tmp8 +} + +define <4 x i16> @vld3dupi16(i16* %A) nounwind { +;CHECK: vld3dupi16: +;Check the (default) alignment value. VLD3 does not support alignment. +;CHECK: vld3.16 {d16[], d17[], d18[]}, [r0] + %tmp0 = tail call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 8) + %tmp1 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 0 + %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 1 + %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 2 + %tmp6 = shufflevector <4 x i16> %tmp5, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp7 = add <4 x i16> %tmp2, %tmp4 + %tmp8 = add <4 x i16> %tmp7, %tmp6 + ret <4 x i16> %tmp8 +} + +declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly +declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly + +%struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } +%struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } + +;Check for a post-increment updating load. +define <4 x i16> @vld4dupi16_update(i16** %ptr) nounwind { +;CHECK: vld4dupi16_update: +;CHECK: vld4.16 {d16[], d17[], d18[], d19[]}, [r1]! + %A = load i16** %ptr + %tmp0 = tail call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 1) + %tmp1 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 0 + %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 1 + %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 2 + %tmp6 = shufflevector <4 x i16> %tmp5, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp7 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 3 + %tmp8 = shufflevector <4 x i16> %tmp7, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp9 = add <4 x i16> %tmp2, %tmp4 + %tmp10 = add <4 x i16> %tmp6, %tmp8 + %tmp11 = add <4 x i16> %tmp9, %tmp10 + %tmp12 = getelementptr i16* %A, i32 4 + store i16* %tmp12, i16** %ptr + ret <4 x i16> %tmp11 +} + +define <2 x i32> @vld4dupi32(i32* %A) nounwind { +;CHECK: vld4dupi32: +;Check the alignment value. An 8-byte alignment is allowed here even though +;it is smaller than the total size of the memory being loaded. +;CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r0, :64] + %tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 8) + %tmp1 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 0 + %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 1 + %tmp4 = shufflevector <2 x i32> %tmp3, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 2 + %tmp6 = shufflevector <2 x i32> %tmp5, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp7 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 3 + %tmp8 = shufflevector <2 x i32> %tmp7, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp9 = add <2 x i32> %tmp2, %tmp4 + %tmp10 = add <2 x i32> %tmp6, %tmp8 + %tmp11 = add <2 x i32> %tmp9, %tmp10 + ret <2 x i32> %tmp11 +} + +declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly diff --git a/test/CodeGen/ARM/vldlane.ll b/test/CodeGen/ARM/vldlane.ll index fc14e24..770ed07 100644 --- a/test/CodeGen/ARM/vldlane.ll +++ b/test/CodeGen/ARM/vldlane.ll @@ -30,6 +30,15 @@ define <2 x i32> @vld1lanei32(i32* %A, <2 x i32>* %B) nounwind { ret <2 x i32> %tmp3 } +define <2 x float> @vld1lanef(float* %A, <2 x float>* %B) nounwind { +;CHECK: vld1lanef: +;CHECK: vld1.32 {d16[1]}, [r0] + %tmp1 = load <2 x float>* %B + %tmp2 = load float* %A, align 4 + %tmp3 = insertelement <2 x float> %tmp1, float %tmp2, i32 1 + ret <2 x float> %tmp3 +} + define <16 x i8> @vld1laneQi8(i8* %A, <16 x i8>* %B) nounwind { ;CHECK: vld1laneQi8: ;CHECK: vld1.8 {d17[1]}, [r0] @@ -57,6 +66,15 @@ define <4 x i32> @vld1laneQi32(i32* %A, <4 x i32>* %B) nounwind { ret <4 x i32> %tmp3 } +define <4 x float> @vld1laneQf(float* %A, <4 x float>* %B) nounwind { +;CHECK: vld1laneQf: +;CHECK: vld1.32 {d16[0]}, [r0] + %tmp1 = load <4 x float>* %B + %tmp2 = load float* %A + %tmp3 = insertelement <4 x float> %tmp1, float %tmp2, i32 0 + ret <4 x float> %tmp3 +} + %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> } %struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> } @@ -103,6 +121,22 @@ define <2 x i32> @vld2lanei32(i32* %A, <2 x i32>* %B) nounwind { ret <2 x i32> %tmp5 } +;Check for a post-increment updating load. +define <2 x i32> @vld2lanei32_update(i32** %ptr, <2 x i32>* %B) nounwind { +;CHECK: vld2lanei32_update: +;CHECK: vld2.32 {d16[1], d17[1]}, [r1]! + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = load <2 x i32>* %B + %tmp2 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) + %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 0 + %tmp4 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 1 + %tmp5 = add <2 x i32> %tmp3, %tmp4 + %tmp6 = getelementptr i32* %A, i32 2 + store i32* %tmp6, i32** %ptr + ret <2 x i32> %tmp5 +} + define <2 x float> @vld2lanef(float* %A, <2 x float>* %B) nounwind { ;CHECK: vld2lanef: ;CHECK: vld2.32 @@ -242,6 +276,24 @@ define <8 x i16> @vld3laneQi16(i16* %A, <8 x i16>* %B) nounwind { ret <8 x i16> %tmp7 } +;Check for a post-increment updating load with register increment. +define <8 x i16> @vld3laneQi16_update(i16** %ptr, <8 x i16>* %B, i32 %inc) nounwind { +;CHECK: vld3laneQi16_update: +;CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r2], r1 + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = load <8 x i16>* %B + %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 8) + %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0 + %tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1 + %tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2 + %tmp6 = add <8 x i16> %tmp3, %tmp4 + %tmp7 = add <8 x i16> %tmp5, %tmp6 + %tmp8 = getelementptr i16* %A, i32 %inc + store i16* %tmp8, i16** %ptr + ret <8 x i16> %tmp7 +} + define <4 x i32> @vld3laneQi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vld3laneQi32: ;CHECK: vld3.32 @@ -304,12 +356,33 @@ define <8 x i8> @vld4lanei8(i8* %A, <8 x i8>* %B) nounwind { ret <8 x i8> %tmp9 } +;Check for a post-increment updating load. +define <8 x i8> @vld4lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind { +;CHECK: vld4lanei8_update: +;CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]! + %A = load i8** %ptr + %tmp1 = load <8 x i8>* %B + %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8) + %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0 + %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1 + %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2 + %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3 + %tmp7 = add <8 x i8> %tmp3, %tmp4 + %tmp8 = add <8 x i8> %tmp5, %tmp6 + %tmp9 = add <8 x i8> %tmp7, %tmp8 + %tmp10 = getelementptr i8* %A, i32 4 + store i8* %tmp10, i8** %ptr + ret <8 x i8> %tmp9 +} + define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vld4lanei16: -;CHECK: vld4.16 +;Check that a power-of-two alignment smaller than the total size of the memory +;being loaded is ignored. +;CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 4) %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 2 @@ -322,11 +395,12 @@ define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind { define <2 x i32> @vld4lanei32(i32* %A, <2 x i32>* %B) nounwind { ;CHECK: vld4lanei32: -;Check the alignment value. Max for this instruction is 128 bits: -;CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] +;Check the alignment value. An 8-byte alignment is allowed here even though +;it is smaller than the total size of the memory being loaded. +;CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :64] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16) + %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 8) %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 2 @@ -411,3 +485,22 @@ declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8*, <2 x flo declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly + +; Radar 8776599: If one of the operands to a QQQQ REG_SEQUENCE is a register +; in the QPR_VFP2 regclass, it needs to be copied to a QPR regclass because +; we don't currently have a QQQQ_VFP2 super-regclass. (The "0" for the low +; part of %ins67 is supposed to be loaded by a VLDRS instruction in this test.) +define void @test_qqqq_regsequence_subreg([6 x i64] %b) nounwind { +;CHECK: test_qqqq_regsequence_subreg +;CHECK: vld3.16 + %tmp63 = extractvalue [6 x i64] %b, 5 + %tmp64 = zext i64 %tmp63 to i128 + %tmp65 = shl i128 %tmp64, 64 + %ins67 = or i128 %tmp65, 0 + %tmp78 = bitcast i128 %ins67 to <8 x i16> + %vld3_lane = tail call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* undef, <8 x i16> undef, <8 x i16> undef, <8 x i16> %tmp78, i32 1, i32 2) + call void @llvm.trap() + unreachable +} + +declare void @llvm.trap() nounwind diff --git a/test/CodeGen/ARM/vmul.ll b/test/CodeGen/ARM/vmul.ll index 5383425..ee033ca 100644 --- a/test/CodeGen/ARM/vmul.ll +++ b/test/CodeGen/ARM/vmul.ll @@ -267,3 +267,75 @@ entry: } declare <8 x i16> @llvm.arm.neon.vmullp.v8i16(<8 x i8>, <8 x i8>) nounwind readnone + + +; Radar 8687140 +; VMULL needs to recognize BUILD_VECTORs with sign/zero-extended elements. + +define <8 x i16> @vmull_extvec_s8(<8 x i8> %arg) nounwind { +; CHECK: vmull_extvec_s8 +; CHECK: vmull.s8 + %tmp3 = sext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, <i16 -12, i16 -12, i16 -12, i16 -12, i16 -12, i16 -12, i16 -12, i16 -12> + ret <8 x i16> %tmp4 +} + +define <8 x i16> @vmull_extvec_u8(<8 x i8> %arg) nounwind { +; CHECK: vmull_extvec_u8 +; CHECK: vmull.u8 + %tmp3 = zext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, <i16 12, i16 12, i16 12, i16 12, i16 12, i16 12, i16 12, i16 12> + ret <8 x i16> %tmp4 +} + +define <8 x i16> @vmull_noextvec_s8(<8 x i8> %arg) nounwind { +; Do not use VMULL if the BUILD_VECTOR element values are too big. +; CHECK: vmull_noextvec_s8 +; CHECK: vmovl.s8 +; CHECK: vmul.i16 + %tmp3 = sext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, <i16 -999, i16 -999, i16 -999, i16 -999, i16 -999, i16 -999, i16 -999, i16 -999> + ret <8 x i16> %tmp4 +} + +define <8 x i16> @vmull_noextvec_u8(<8 x i8> %arg) nounwind { +; Do not use VMULL if the BUILD_VECTOR element values are too big. +; CHECK: vmull_noextvec_u8 +; CHECK: vmovl.u8 +; CHECK: vmul.i16 + %tmp3 = zext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, <i16 999, i16 999, i16 999, i16 999, i16 999, i16 999, i16 999, i16 999> + ret <8 x i16> %tmp4 +} + +define <4 x i32> @vmull_extvec_s16(<4 x i16> %arg) nounwind { +; CHECK: vmull_extvec_s16 +; CHECK: vmull.s16 + %tmp3 = sext <4 x i16> %arg to <4 x i32> + %tmp4 = mul <4 x i32> %tmp3, <i32 -12, i32 -12, i32 -12, i32 -12> + ret <4 x i32> %tmp4 +} + +define <4 x i32> @vmull_extvec_u16(<4 x i16> %arg) nounwind { +; CHECK: vmull_extvec_u16 +; CHECK: vmull.u16 + %tmp3 = zext <4 x i16> %arg to <4 x i32> + %tmp4 = mul <4 x i32> %tmp3, <i32 1234, i32 1234, i32 1234, i32 1234> + ret <4 x i32> %tmp4 +} + +define <2 x i64> @vmull_extvec_s32(<2 x i32> %arg) nounwind { +; CHECK: vmull_extvec_s32 +; CHECK: vmull.s32 + %tmp3 = sext <2 x i32> %arg to <2 x i64> + %tmp4 = mul <2 x i64> %tmp3, <i64 -1234, i64 -1234> + ret <2 x i64> %tmp4 +} + +define <2 x i64> @vmull_extvec_u32(<2 x i32> %arg) nounwind { +; CHECK: vmull_extvec_u32 +; CHECK: vmull.u32 + %tmp3 = zext <2 x i32> %arg to <2 x i64> + %tmp4 = mul <2 x i64> %tmp3, <i64 1234, i64 1234> + ret <2 x i64> %tmp4 +} diff --git a/test/CodeGen/ARM/vst1.ll b/test/CodeGen/ARM/vst1.ll index 70f3a4c..364d44b 100644 --- a/test/CodeGen/ARM/vst1.ll +++ b/test/CodeGen/ARM/vst1.ll @@ -36,6 +36,19 @@ define void @vst1f(float* %A, <2 x float>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst1f_update(float** %ptr, <2 x float>* %B) nounwind { +;CHECK: vst1f_update: +;CHECK: vst1.32 {d16}, [r1]! + %A = load float** %ptr + %tmp0 = bitcast float* %A to i8* + %tmp1 = load <2 x float>* %B + call void @llvm.arm.neon.vst1.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1) + %tmp2 = getelementptr float* %A, i32 2 + store float* %tmp2, float** %ptr + ret void +} + define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind { ;CHECK: vst1i64: ;CHECK: vst1.64 @@ -64,6 +77,19 @@ define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind { ret void } +;Check for a post-increment updating store with register increment. +define void @vst1Qi16_update(i16** %ptr, <8 x i16>* %B, i32 %inc) nounwind { +;CHECK: vst1Qi16_update: +;CHECK: vst1.16 {d16, d17}, [r1, :64], r2 + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = load <8 x i16>* %B + call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1, i32 8) + %tmp2 = getelementptr i16* %A, i32 %inc + store i16* %tmp2, i16** %ptr + ret void +} + define void @vst1Qi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vst1Qi32: ;CHECK: vst1.32 diff --git a/test/CodeGen/ARM/vst2.ll b/test/CodeGen/ARM/vst2.ll index ed2498b..915a84b 100644 --- a/test/CodeGen/ARM/vst2.ll +++ b/test/CodeGen/ARM/vst2.ll @@ -9,6 +9,18 @@ define void @vst2i8(i8* %A, <8 x i8>* %B) nounwind { ret void } +;Check for a post-increment updating store with register increment. +define void @vst2i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { +;CHECK: vst2i8_update: +;CHECK: vst2.8 {d16, d17}, [r1], r2 + %A = load i8** %ptr + %tmp1 = load <8 x i8>* %B + call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 4) + %tmp2 = getelementptr i8* %A, i32 %inc + store i8* %tmp2, i8** %ptr + ret void +} + define void @vst2i16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst2i16: ;Check the alignment value. Max for this instruction is 128 bits: @@ -47,6 +59,19 @@ define void @vst2i64(i64* %A, <1 x i64>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst2i64_update(i64** %ptr, <1 x i64>* %B) nounwind { +;CHECK: vst2i64_update: +;CHECK: vst1.64 {d16, d17}, [r1, :64]! + %A = load i64** %ptr + %tmp0 = bitcast i64* %A to i8* + %tmp1 = load <1 x i64>* %B + call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 8) + %tmp2 = getelementptr i64* %A, i32 2 + store i64* %tmp2, i64** %ptr + ret void +} + define void @vst2Qi8(i8* %A, <16 x i8>* %B) nounwind { ;CHECK: vst2Qi8: ;Check the alignment value. Max for this instruction is 256 bits: diff --git a/test/CodeGen/ARM/vst3.ll b/test/CodeGen/ARM/vst3.ll index 0a2df77..d262303 100644 --- a/test/CodeGen/ARM/vst3.ll +++ b/test/CodeGen/ARM/vst3.ll @@ -28,6 +28,19 @@ define void @vst3i32(i32* %A, <2 x i32>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst3i32_update(i32** %ptr, <2 x i32>* %B) nounwind { +;CHECK: vst3i32_update: +;CHECK: vst3.32 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = load <2 x i32>* %B + call void @llvm.arm.neon.vst3.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) + %tmp2 = getelementptr i32* %A, i32 6 + store i32* %tmp2, i32** %ptr + ret void +} + define void @vst3f(float* %A, <2 x float>* %B) nounwind { ;CHECK: vst3f: ;CHECK: vst3.32 @@ -69,6 +82,20 @@ define void @vst3Qi16(i16* %A, <8 x i16>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst3Qi16_update(i16** %ptr, <8 x i16>* %B) nounwind { +;CHECK: vst3Qi16_update: +;CHECK: vst3.16 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! +;CHECK: vst3.16 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = load <8 x i16>* %B + call void @llvm.arm.neon.vst3.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) + %tmp2 = getelementptr i16* %A, i32 24 + store i16* %tmp2, i16** %ptr + ret void +} + define void @vst3Qi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vst3Qi32: ;CHECK: vst3.32 diff --git a/test/CodeGen/ARM/vst4.ll b/test/CodeGen/ARM/vst4.ll index 6a7e91d..e94acb6 100644 --- a/test/CodeGen/ARM/vst4.ll +++ b/test/CodeGen/ARM/vst4.ll @@ -9,6 +9,18 @@ define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind { ret void } +;Check for a post-increment updating store with register increment. +define void @vst4i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { +;CHECK: vst4i8_update: +;CHECK: vst4.8 {d16, d17, d18, d19}, [r1, :128], r2 + %A = load i8** %ptr + %tmp1 = load <8 x i8>* %B + call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 16) + %tmp2 = getelementptr i8* %A, i32 %inc + store i8* %tmp2, i8** %ptr + ret void +} + define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst4i16: ;Check the alignment value. Max for this instruction is 256 bits: @@ -89,6 +101,20 @@ define void @vst4Qf(float* %A, <4 x float>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst4Qf_update(float** %ptr, <4 x float>* %B) nounwind { +;CHECK: vst4Qf_update: +;CHECK: vst4.32 {d16, d18, d20, d22}, [r1]! +;CHECK: vst4.32 {d17, d19, d21, d23}, [r1]! + %A = load float** %ptr + %tmp0 = bitcast float* %A to i8* + %tmp1 = load <4 x float>* %B + call void @llvm.arm.neon.vst4.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) + %tmp2 = getelementptr float* %A, i32 16 + store float* %tmp2, float** %ptr + ret void +} + declare void @llvm.arm.neon.vst4.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind declare void @llvm.arm.neon.vst4.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind diff --git a/test/CodeGen/ARM/vstlane.ll b/test/CodeGen/ARM/vstlane.ll index c5387e0..d1bc15a 100644 --- a/test/CodeGen/ARM/vstlane.ll +++ b/test/CodeGen/ARM/vstlane.ll @@ -10,6 +10,19 @@ define void @vst1lanei8(i8* %A, <8 x i8>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst1lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind { +;CHECK: vst1lanei8_update: +;CHECK: vst1.8 {d16[3]}, [r2]! + %A = load i8** %ptr + %tmp1 = load <8 x i8>* %B + %tmp2 = extractelement <8 x i8> %tmp1, i32 3 + store i8 %tmp2, i8* %A, align 8 + %tmp3 = getelementptr i8* %A, i32 1 + store i8* %tmp3, i8** %ptr + ret void +} + define void @vst1lanei16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst1lanei16: ;Check the alignment value. Max for this instruction is 16 bits: @@ -30,6 +43,15 @@ define void @vst1lanei32(i32* %A, <2 x i32>* %B) nounwind { ret void } +define void @vst1lanef(float* %A, <2 x float>* %B) nounwind { +;CHECK: vst1lanef: +;CHECK: vst1.32 {d16[1]}, [r0] + %tmp1 = load <2 x float>* %B + %tmp2 = extractelement <2 x float> %tmp1, i32 1 + store float %tmp2, float* %A + ret void +} + define void @vst1laneQi8(i8* %A, <16 x i8>* %B) nounwind { ;CHECK: vst1laneQi8: ;CHECK: vst1.8 {d17[1]}, [r0] @@ -57,6 +79,28 @@ define void @vst1laneQi32(i32* %A, <4 x i32>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst1laneQi32_update(i32** %ptr, <4 x i32>* %B) nounwind { +;CHECK: vst1laneQi32_update: +;CHECK: vst1.32 {d17[1]}, [r1, :32]! + %A = load i32** %ptr + %tmp1 = load <4 x i32>* %B + %tmp2 = extractelement <4 x i32> %tmp1, i32 3 + store i32 %tmp2, i32* %A, align 8 + %tmp3 = getelementptr i32* %A, i32 1 + store i32* %tmp3, i32** %ptr + ret void +} + +define void @vst1laneQf(float* %A, <4 x float>* %B) nounwind { +;CHECK: vst1laneQf: +;CHECK: vst1.32 {d17[1]}, [r0] + %tmp1 = load <4 x float>* %B + %tmp2 = extractelement <4 x float> %tmp1, i32 3 + store float %tmp2, float* %A + ret void +} + define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst2lanei8: ;Check the alignment value. Max for this instruction is 16 bits: @@ -76,6 +120,19 @@ define void @vst2lanei16(i16* %A, <4 x i16>* %B) nounwind { ret void } +;Check for a post-increment updating store with register increment. +define void @vst2lanei16_update(i16** %ptr, <4 x i16>* %B, i32 %inc) nounwind { +;CHECK: vst2lanei16_update: +;CHECK: vst2.16 {d16[1], d17[1]}, [r1], r2 + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = load <4 x i16>* %B + call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 2) + %tmp2 = getelementptr i16* %A, i32 %inc + store i16* %tmp2, i16** %ptr + ret void +} + define void @vst2lanei32(i32* %A, <2 x i32>* %B) nounwind { ;CHECK: vst2lanei32: ;CHECK: vst2.32 @@ -187,6 +244,19 @@ define void @vst3laneQi32(i32* %A, <4 x i32>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst3laneQi32_update(i32** %ptr, <4 x i32>* %B) nounwind { +;CHECK: vst3laneQi32_update: +;CHECK: vst3.32 {d16[0], d18[0], d20[0]}, [r1]! + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = load <4 x i32>* %B + call void @llvm.arm.neon.vst3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 0, i32 1) + %tmp2 = getelementptr i32* %A, i32 3 + store i32* %tmp2, i32** %ptr + ret void +} + define void @vst3laneQf(float* %A, <4 x float>* %B) nounwind { ;CHECK: vst3laneQf: ;CHECK: vst3.32 @@ -215,6 +285,18 @@ define void @vst4lanei8(i8* %A, <8 x i8>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst4lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind { +;CHECK: vst4lanei8_update: +;CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]! + %A = load i8** %ptr + %tmp1 = load <8 x i8>* %B + call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8) + %tmp2 = getelementptr i8* %A, i32 4 + store i8* %tmp2, i8** %ptr + ret void +} + define void @vst4lanei16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst4lanei16: ;CHECK: vst4.16 diff --git a/test/CodeGen/Alpha/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/Alpha/2010-04-07-DbgValueOtherTargets.ll index cf3f0b9..4590f12 100644 --- a/test/CodeGen/Alpha/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/Alpha/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=alpha -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/CellSPU/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/CellSPU/2010-04-07-DbgValueOtherTargets.ll index 45d53c8..401399f 100644 --- a/test/CodeGen/CellSPU/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/CellSPU/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=cellspu -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/CellSPU/div_ops.ll b/test/CodeGen/CellSPU/div_ops.ll new file mode 100644 index 0000000..0c93d83 --- /dev/null +++ b/test/CodeGen/CellSPU/div_ops.ll @@ -0,0 +1,22 @@ +; RUN: llc --march=cellspu %s -o - | FileCheck %s + +; signed division rounds towards zero, rotma don't. +define i32 @sdivide (i32 %val ) +{ +; CHECK: rotmai +; CHECK: rotmi +; CHECK: a +; CHECK: rotmai +; CHECK: bi $lr + %rv = sdiv i32 %val, 4 + ret i32 %rv +} + +define i32 @udivide (i32 %val ) +{ +; CHECK: rotmi +; CHECK: bi $lr + %rv = udiv i32 %val, 4 + ret i32 %rv +} + diff --git a/test/CodeGen/CellSPU/fcmp32.ll b/test/CodeGen/CellSPU/fcmp32.ll index f07fe6f..c14fd7b 100644 --- a/test/CodeGen/CellSPU/fcmp32.ll +++ b/test/CodeGen/CellSPU/fcmp32.ll @@ -1,9 +1,4 @@ -; RUN: llc < %s -march=cellspu > %t1.s -; RUN: grep fceq %t1.s | count 1 -; RUN: grep fcmeq %t1.s | count 1 - -target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" -target triple = "spu" +; RUN: llc --march=cellspu %s -o - | FileCheck %s ; Exercise the floating point comparison operators for f32: @@ -11,13 +6,31 @@ declare double @fabs(double) declare float @fabsf(float) define i1 @fcmp_eq(float %arg1, float %arg2) { +; CHECK: fceq +; CHECK: bi $lr %A = fcmp oeq float %arg1, %arg2 ret i1 %A } define i1 @fcmp_mag_eq(float %arg1, float %arg2) { +; CHECK: fcmeq +; CHECK: bi $lr %1 = call float @fabsf(float %arg1) %2 = call float @fabsf(float %arg2) %3 = fcmp oeq float %1, %2 ret i1 %3 } + +define i1 @test_ogt(float %a, float %b) { +; CHECK: fcgt +; CHECK: bi $lr + %cmp = fcmp ogt float %a, %b + ret i1 %cmp +} + +define i1 @test_ugt(float %a, float %b) { +; CHECK: fcgt +; CHECK: bi $lr + %cmp = fcmp ugt float %a, %b + ret i1 %cmp +} diff --git a/test/CodeGen/CellSPU/immed32.ll b/test/CodeGen/CellSPU/immed32.ll index 119f526..8e48f0b 100644 --- a/test/CodeGen/CellSPU/immed32.ll +++ b/test/CodeGen/CellSPU/immed32.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=cellspu > %t1.s -; RUN: grep ilhu %t1.s | count 8 -; RUN: grep iohl %t1.s | count 6 +; RUN: grep ilhu %t1.s | count 9 +; RUN: grep iohl %t1.s | count 7 ; RUN: grep -w il %t1.s | count 3 ; RUN: grep 16429 %t1.s | count 1 ; RUN: grep 63572 %t1.s | count 1 @@ -12,6 +12,7 @@ ; RUN: grep 49077 %t1.s | count 1 ; RUN: grep 1267 %t1.s | count 2 ; RUN: grep 16309 %t1.s | count 1 +; RUN: cat %t1.s | FileCheck %s target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -31,6 +32,16 @@ define i32 @test_4() { ret i32 -512 ;; IL via pattern } +define i32 @test_5() +{ +;CHECK: test_5: +;CHECK-NOT: ila $3, 40000 +;CHECK: ilhu +;CHECK: iohl +;CHECK: bi $lr + ret i32 400000 +} + ;; double float floatval ;; 0x4005bf0a80000000 0x402d|f854 2.718282 define float @float_const_1() { diff --git a/test/CodeGen/CellSPU/loads.ll b/test/CodeGen/CellSPU/loads.ll index 03d7ad1..4771752 100644 --- a/test/CodeGen/CellSPU/loads.ll +++ b/test/CodeGen/CellSPU/loads.ll @@ -50,3 +50,10 @@ define i32 @load_misaligned( i32* %ptr ){ %rv = load i32* %ptr, align 2 ret i32 %rv } + +define <4 x i32> @load_null_vec( ) { +;CHECK: lqa +;CHECK: bi $lr + %rv = load <4 x i32>* null + ret <4 x i32> %rv +} diff --git a/test/CodeGen/CellSPU/rotate_ops.ll b/test/CodeGen/CellSPU/rotate_ops.ll index a504c00..e117208 100644 --- a/test/CodeGen/CellSPU/rotate_ops.ll +++ b/test/CodeGen/CellSPU/rotate_ops.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=cellspu -o %t1.s -; RUN: grep rot %t1.s | count 85 +; RUN: grep rot %t1.s | count 86 ; RUN: grep roth %t1.s | count 8 ; RUN: grep roti.*5 %t1.s | count 1 ; RUN: grep roti.*27 %t1.s | count 1 @@ -8,6 +8,7 @@ ; RUN grep rothi.*,.3 %t1.s | count 1 ; RUN: grep andhi %t1.s | count 4 ; RUN: grep shlhi %t1.s | count 4 +; RUN: cat %t1.s | FileCheck %s target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -158,3 +159,14 @@ define i8 @rotri8(i8 %A) { %D = or i8 %B, %C ; <i8> [#uses=1] ret i8 %D } + +define <2 x float> @test1(<4 x float> %param ) +{ +; CHECK: test1 +; CHECK: rotqbyi + %el = extractelement <4 x float> %param, i32 1 + %vec1 = insertelement <1 x float> undef, float %el, i32 0 + %rv = shufflevector <1 x float> %vec1, <1 x float> undef, <2 x i32><i32 0,i32 0> +; CHECK: bi $lr + ret <2 x float> %rv +} diff --git a/test/CodeGen/CellSPU/sext128.ll b/test/CodeGen/CellSPU/sext128.ll index 8a5b609..6ae9aa5 100644 --- a/test/CodeGen/CellSPU/sext128.ll +++ b/test/CodeGen/CellSPU/sext128.ll @@ -13,8 +13,8 @@ entry: ; CHECK: long 66051 ; CHECK: long 67438087 ; CHECK-NOT: rotqmbyi -; CHECK: rotmai ; CHECK: lqa +; CHECK: rotmai ; CHECK: shufb } @@ -27,8 +27,8 @@ entry: ; CHECK: long 269488144 ; CHECK: long 66051 ; CHECK-NOT: rotqmbyi -; CHECK: rotmai ; CHECK: lqa +; CHECK: rotmai ; CHECK: shufb } @@ -42,9 +42,30 @@ entry: ; CHECK: long 269488144 ; CHECK: long 66051 ; CHECK-NOT: rotqmbyi -; CHECK: rotmai ; CHECK: lqa +; CHECK: rotmai ; CHECK: shufb } declare i32 @myfunc(float) + +define i128 @func1(i8 %u) { +entry: +; CHECK: xsbh +; CHECK: xshw +; CHECK: rotmai +; CHECK: shufb +; CHECK: bi $lr + %0 = sext i8 %u to i128 + ret i128 %0 +} + +define i128 @func2(i16 %u) { +entry: +; CHECK: xshw +; CHECK: rotmai +; CHECK: shufb +; CHECK: bi $lr + %0 = sext i16 %u to i128 + ret i128 %0 +} diff --git a/test/CodeGen/CellSPU/shift_ops.ll b/test/CodeGen/CellSPU/shift_ops.ll index 0264fc8..c4a5abd 100644 --- a/test/CodeGen/CellSPU/shift_ops.ll +++ b/test/CodeGen/CellSPU/shift_ops.ll @@ -1,27 +1,25 @@ ; RUN: llc < %s -march=cellspu > %t1.s -; RUN: grep {shlh } %t1.s | count 9 +; RUN: grep {shlh } %t1.s | count 10 ; RUN: grep {shlhi } %t1.s | count 3 -; RUN: grep {shl } %t1.s | count 9 +; RUN: grep {shl } %t1.s | count 11 ; RUN: grep {shli } %t1.s | count 3 ; RUN: grep {xshw } %t1.s | count 5 -; RUN: grep {and } %t1.s | count 5 +; RUN: grep {and } %t1.s | count 14 ; RUN: grep {andi } %t1.s | count 2 ; RUN: grep {rotmi } %t1.s | count 2 ; RUN: grep {rotqmbyi } %t1.s | count 1 ; RUN: grep {rotqmbii } %t1.s | count 2 ; RUN: grep {rotqmby } %t1.s | count 1 -; RUN: grep {rotqmbi } %t1.s | count 1 +; RUN: grep {rotqmbi } %t1.s | count 2 ; RUN: grep {rotqbyi } %t1.s | count 1 ; RUN: grep {rotqbii } %t1.s | count 2 ; RUN: grep {rotqbybi } %t1.s | count 1 -; RUN: grep {sfi } %t1.s | count 3 +; RUN: grep {sfi } %t1.s | count 6 +; RUN: cat %t1.s | FileCheck %s target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" -; Vector shifts are not currently supported in gcc or llvm assembly. These are -; not tested. - ; Shift left i16 via register, note that the second operand to shl is promoted ; to a 32-bit type: @@ -281,3 +279,66 @@ define i32 @hi32_i64(i64 %arg) { %2 = trunc i64 %1 to i32 ret i32 %2 } + +; some random tests +define i128 @test_lshr_i128( i128 %val ) { + ;CHECK: test_lshr_i128 + ;CHECK: sfi + ;CHECK: rotqmbi + ;CHECK: rotqmbybi + ;CHECK: bi $lr + %rv = lshr i128 %val, 64 + ret i128 %rv +} + +;Vector shifts +define <2 x i32> @shl_v2i32(<2 x i32> %val, <2 x i32> %sh) { +;CHECK: shl +;CHECK: bi $lr + %rv = shl <2 x i32> %val, %sh + ret <2 x i32> %rv +} + +define <4 x i32> @shl_v4i32(<4 x i32> %val, <4 x i32> %sh) { +;CHECK: shl +;CHECK: bi $lr + %rv = shl <4 x i32> %val, %sh + ret <4 x i32> %rv +} + +define <8 x i16> @shl_v8i16(<8 x i16> %val, <8 x i16> %sh) { +;CHECK: shlh +;CHECK: bi $lr + %rv = shl <8 x i16> %val, %sh + ret <8 x i16> %rv +} + +define <4 x i32> @lshr_v4i32(<4 x i32> %val, <4 x i32> %sh) { +;CHECK: rotm +;CHECK: bi $lr + %rv = lshr <4 x i32> %val, %sh + ret <4 x i32> %rv +} + +define <8 x i16> @lshr_v8i16(<8 x i16> %val, <8 x i16> %sh) { +;CHECK: sfhi +;CHECK: rothm +;CHECK: bi $lr + %rv = lshr <8 x i16> %val, %sh + ret <8 x i16> %rv +} + +define <4 x i32> @ashr_v4i32(<4 x i32> %val, <4 x i32> %sh) { +;CHECK: rotma +;CHECK: bi $lr + %rv = ashr <4 x i32> %val, %sh + ret <4 x i32> %rv +} + +define <8 x i16> @ashr_v8i16(<8 x i16> %val, <8 x i16> %sh) { +;CHECK: sfhi +;CHECK: rotmah +;CHECK: bi $lr + %rv = ashr <8 x i16> %val, %sh + ret <8 x i16> %rv +} diff --git a/test/CodeGen/CellSPU/shuffles.ll b/test/CodeGen/CellSPU/shuffles.ll index 94b5fbd..c88a258 100644 --- a/test/CodeGen/CellSPU/shuffles.ll +++ b/test/CodeGen/CellSPU/shuffles.ll @@ -1,4 +1,4 @@ -; RUN: llc --march=cellspu < %s | FileCheck %s +; RUN: llc -O1 --march=cellspu < %s | FileCheck %s define <4 x float> @shuffle(<4 x float> %param1, <4 x float> %param2) { ; CHECK: cwd {{\$.}}, 0($sp) diff --git a/test/CodeGen/CellSPU/stores.ll b/test/CodeGen/CellSPU/stores.ll index efc915c..6ca5b08 100644 --- a/test/CodeGen/CellSPU/stores.ll +++ b/test/CodeGen/CellSPU/stores.ll @@ -162,3 +162,20 @@ define void @store_misaligned( i32 %val, i32* %ptr) { store i32 %val, i32*%ptr, align 2 ret void } + +define void @store_v8( <8 x float> %val, <8 x float>* %ptr ) +{ +;CHECK: stq +;CHECK: stq +;CHECK: bi $lr + store <8 x float> %val, <8 x float>* %ptr + ret void +} + +define void @store_null_vec( <4 x i32> %val ) { +; FIXME - this is for some reason compiled into a il+stqd, not a sta. +;CHECK: stqd +;CHECK: bi $lr + store <4 x i32> %val, <4 x i32>* null + ret void +} diff --git a/test/CodeGen/Generic/2010-11-11-ReturnBigBuffer.ll b/test/CodeGen/Generic/2010-11-11-ReturnBigBuffer.ll deleted file mode 100644 index bf5939d..0000000 --- a/test/CodeGen/Generic/2010-11-11-ReturnBigBuffer.ll +++ /dev/null @@ -1,32 +0,0 @@ -; RUN: llc < %s -; PR8287: SelectionDag scheduling time. -; Yes, some front end really produces this code. But that is a -; separate bug. This is more an example than a real test, because I -; don't know how give llvm-lit a timeout. - -define void @foo([4096 x i8]* %arg1, [4096 x i8]* %arg2) { - %buffer = alloca [4096 x i8] - %pbuf = alloca [4096 x i8]* - store [4096 x i8]* %buffer, [4096 x i8]** %pbuf - - %parg1 = alloca [4096 x i8]* - store [4096 x i8]* %arg1, [4096 x i8]** %parg1 - - %parg2 = alloca [4096 x i8]* - store [4096 x i8]* %arg2, [4096 x i8]** %parg2 - - ; The original test case has intermediate blocks. - ; Presumably something fills in "buffer". - - %bufferCopy1 = load [4096 x i8]** %pbuf - %dataCopy1 = load [4096 x i8]* %bufferCopy1 - %arg1Copy = load [4096 x i8]** %parg1 - store [4096 x i8] %dataCopy1, [4096 x i8]* %arg1Copy - - %bufferCopy2 = load [4096 x i8]** %pbuf - %dataCopy2 = load [4096 x i8]* %bufferCopy2 - %arg2Copy = load [4096 x i8]** %parg2 - store [4096 x i8] %dataCopy2, [4096 x i8]* %arg2Copy - - ret void -} diff --git a/test/CodeGen/Generic/2011-01-06-BigNumberCrash.ll b/test/CodeGen/Generic/2011-01-06-BigNumberCrash.ll new file mode 100644 index 0000000..05fdf4c --- /dev/null +++ b/test/CodeGen/Generic/2011-01-06-BigNumberCrash.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s +; PR8582 + +define void @uint82() nounwind { +entry: + %tmp3 = select i1 undef, i960 4872657003430991806293355221650511486142000513558154090491761976385142772940676648094983476628187266917101386048750715027104076737938178423519545241493072038894065019132638919037781494702597609951702322267198307200588774905587225212622510286498675097141625012190497682454879271766334636032, i960 0 + br i1 undef, label %for.body25.for.body25_crit_edge, label %if.end + +for.body25.for.body25_crit_edge: ; preds = %entry + %ins = or i960 %tmp3, undef + ret void + +if.end: ; preds = %entry + ret void +} diff --git a/test/CodeGen/Generic/2011-02-12-shuffle.ll b/test/CodeGen/Generic/2011-02-12-shuffle.ll new file mode 100644 index 0000000..b4d56d1 --- /dev/null +++ b/test/CodeGen/Generic/2011-02-12-shuffle.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s +; PR9165 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i686-pc-win32" + +define void @m_387() nounwind { +entry: + br i1 undef, label %if.end, label %UnifiedReturnBlock + +if.end: ; preds = %entry + %tmp1067 = load <16 x i32> addrspace(1)* null, align 64 + %tmp1082 = shufflevector <16 x i32> <i32 0, i32 0, i32 0, i32 undef, i32 undef, i32 0, i32 0, i32 undef, i32 0, i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 undef, i32 undef>, + <16 x i32> %tmp1067, + <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 26, i32 5, i32 6, i32 undef, i32 8, i32 9, i32 31, i32 30, i32 12, i32 undef, i32 undef, i32 undef> + + %tmp1100 = shufflevector <16 x i32> %tmp1082, + <16 x i32> %tmp1067, + <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 4, i32 5, i32 6, i32 18, i32 8, i32 9, i32 10, i32 11, i32 12, i32 25, i32 undef, i32 17> + + %tmp1112 = shufflevector <16 x i32> %tmp1100, + <16 x i32> %tmp1067, + <16 x i32> <i32 0, i32 1, i32 2, i32 24, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 18, i32 15> + + store <16 x i32> %tmp1112, <16 x i32> addrspace(1)* undef, align 64 + + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + diff --git a/test/CodeGen/Generic/add-with-overflow-128.ll b/test/CodeGen/Generic/add-with-overflow-128.ll index c46c820..33f44d6 100644 --- a/test/CodeGen/Generic/add-with-overflow-128.ll +++ b/test/CodeGen/Generic/add-with-overflow-128.ll @@ -3,22 +3,7 @@ @ok = internal constant [4 x i8] c"%d\0A\00" @no = internal constant [4 x i8] c"no\0A\00" -define i1 @func1(i128 signext %v1, i128 signext %v2) nounwind { -entry: - %t = call {i128, i1} @llvm.sadd.with.overflow.i128(i128 %v1, i128 %v2) - %sum = extractvalue {i128, i1} %t, 0 - %sum32 = trunc i128 %sum to i32 - %obit = extractvalue {i128, i1} %t, 1 - br i1 %obit, label %overflow, label %normal - -normal: - %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum32 ) nounwind - ret i1 true -overflow: - %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind - ret i1 false -} define i1 @func2(i128 zeroext %v1, i128 zeroext %v2) nounwind { entry: @@ -38,5 +23,12 @@ carry: } declare i32 @printf(i8*, ...) nounwind -declare {i128, i1} @llvm.sadd.with.overflow.i128(i128, i128) +declare {i96, i1} @llvm.sadd.with.overflow.i96(i96, i96) declare {i128, i1} @llvm.uadd.with.overflow.i128(i128, i128) + +define i1 @func1(i96 signext %v1, i96 signext %v2) nounwind { +entry: + %t = call {i96, i1} @llvm.sadd.with.overflow.i96(i96 %v1, i96 %v2) + %obit = extractvalue {i96, i1} %t, 1 + ret i1 %obit +} diff --git a/test/CodeGen/Generic/crash.ll b/test/CodeGen/Generic/crash.ll index 7218565..0427398 100644 --- a/test/CodeGen/Generic/crash.ll +++ b/test/CodeGen/Generic/crash.ll @@ -6,3 +6,35 @@ @tags = global [1 x %struct.AVCodecTag*] [%struct.AVCodecTag* getelementptr inbounds ([0 x %struct.AVCodecTag]* @ff_codec_bmp_tags, i32 0, i32 0)] + +; rdar://8878965 + +%struct.CAMERA = type { [3 x double], [3 x double], [3 x double], [3 x double], [3 x double], [3 x double], double, double, i32, double, double, i32, double, i32* } + +define void @Parse_Camera(%struct.CAMERA** nocapture %Camera_Ptr) nounwind { +entry: +%.pre = load %struct.CAMERA** %Camera_Ptr, align 4 +%0 = getelementptr inbounds %struct.CAMERA* %.pre, i32 0, i32 1, i32 0 +%1 = getelementptr inbounds %struct.CAMERA* %.pre, i32 0, i32 1, i32 2 +br label %bb32 + +bb32: ; preds = %bb6 +%2 = load double* %0, align 4 +%3 = load double* %1, align 4 +%4 = load double* %0, align 4 +call void @Parse_Vector(double* %0) nounwind +%5 = call i32 @llvm.objectsize.i32(i8* undef, i1 false) +%6 = icmp eq i32 %5, -1 +br i1 %6, label %bb34, label %bb33 + +bb33: ; preds = %bb32 +unreachable + +bb34: ; preds = %bb32 +unreachable + +} + +declare void @Parse_Vector(double*) +declare i32 @llvm.objectsize.i32(i8*, i1) + diff --git a/test/CodeGen/Generic/overflow.ll b/test/CodeGen/Generic/overflow.ll new file mode 100644 index 0000000..4196855 --- /dev/null +++ b/test/CodeGen/Generic/overflow.ll @@ -0,0 +1,220 @@ +; RUN: llc < %s +; Verify codegen's don't crash on overflow intrinsics. + +;; SADD + +define zeroext i8 @sadd_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %sadd = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %sadd, 1 + %sadd.result = extractvalue { i8, i1 } %sadd, 0 + %X = select i1 %cmp, i8 %sadd.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.sadd.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @sadd_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %sadd = tail call { i16, i1 } @llvm.sadd.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %sadd, 1 + %sadd.result = extractvalue { i16, i1 } %sadd, 0 + %X = select i1 %cmp, i16 %sadd.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.sadd.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @sadd_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %sadd = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %sadd, 1 + %sadd.result = extractvalue { i32, i1 } %sadd, 0 + %X = select i1 %cmp, i32 %sadd.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone + + +;; UADD + +define zeroext i8 @uadd_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %uadd = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %uadd, 1 + %uadd.result = extractvalue { i8, i1 } %uadd, 0 + %X = select i1 %cmp, i8 %uadd.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @uadd_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %uadd = tail call { i16, i1 } @llvm.uadd.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %uadd, 1 + %uadd.result = extractvalue { i16, i1 } %uadd, 0 + %X = select i1 %cmp, i16 %uadd.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.uadd.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @uadd_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %uadd = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %uadd, 1 + %uadd.result = extractvalue { i32, i1 } %uadd, 0 + %X = select i1 %cmp, i32 %uadd.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone + + + +;; ssub + +define zeroext i8 @ssub_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %ssub = tail call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %ssub, 1 + %ssub.result = extractvalue { i8, i1 } %ssub, 0 + %X = select i1 %cmp, i8 %ssub.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.ssub.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @ssub_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %ssub = tail call { i16, i1 } @llvm.ssub.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %ssub, 1 + %ssub.result = extractvalue { i16, i1 } %ssub, 0 + %X = select i1 %cmp, i16 %ssub.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.ssub.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @ssub_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %ssub = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %ssub, 1 + %ssub.result = extractvalue { i32, i1 } %ssub, 0 + %X = select i1 %cmp, i32 %ssub.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone + + +;; usub + +define zeroext i8 @usub_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %usub = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %usub, 1 + %usub.result = extractvalue { i8, i1 } %usub, 0 + %X = select i1 %cmp, i8 %usub.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.usub.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @usub_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %usub = tail call { i16, i1 } @llvm.usub.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %usub, 1 + %usub.result = extractvalue { i16, i1 } %usub, 0 + %X = select i1 %cmp, i16 %usub.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.usub.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @usub_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %usub = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %usub, 1 + %usub.result = extractvalue { i32, i1 } %usub, 0 + %X = select i1 %cmp, i32 %usub.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone + + + +;; smul + +define zeroext i8 @smul_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %smul = tail call { i8, i1 } @llvm.smul.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %smul, 1 + %smul.result = extractvalue { i8, i1 } %smul, 0 + %X = select i1 %cmp, i8 %smul.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.smul.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @smul_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %smul = tail call { i16, i1 } @llvm.smul.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %smul, 1 + %smul.result = extractvalue { i16, i1 } %smul, 0 + %X = select i1 %cmp, i16 %smul.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.smul.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @smul_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %smul = tail call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %smul, 1 + %smul.result = extractvalue { i32, i1 } %smul, 0 + %X = select i1 %cmp, i32 %smul.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone + + +;; umul + +define zeroext i8 @umul_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %umul = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %umul, 1 + %umul.result = extractvalue { i8, i1 } %umul, 0 + %X = select i1 %cmp, i8 %umul.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.umul.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @umul_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %umul = tail call { i16, i1 } @llvm.umul.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %umul, 1 + %umul.result = extractvalue { i16, i1 } %umul, 0 + %X = select i1 %cmp, i16 %umul.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.umul.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @umul_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %umul = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %umul, 1 + %umul.result = extractvalue { i32, i1 } %umul, 0 + %X = select i1 %cmp, i32 %umul.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone + diff --git a/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll index 854352a..d8970ea 100644 --- a/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=mblaze -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/MBlaze/brind.ll b/test/CodeGen/MBlaze/brind.ll index 4ec8605..2229a87 100644 --- a/test/CodeGen/MBlaze/brind.ll +++ b/test/CodeGen/MBlaze/brind.ll @@ -28,7 +28,7 @@ loop: label %L3, label %L4, label %L5 ] - ; CHECK: brd {{r[0-9]*}} + ; CHECK: brad {{r[0-9]*}} L1: %tmp.1 = add i32 %a, %b @@ -68,5 +68,5 @@ finish: %tmp.8 = urem i32 %tmp.7, 5 br label %loop - ; CHECK: brid + ; CHECK: brad {{r[0-9]*}} } diff --git a/test/CodeGen/MBlaze/imm.ll b/test/CodeGen/MBlaze/imm.ll index 7574687..6effd3e 100644 --- a/test/CodeGen/MBlaze/imm.ll +++ b/test/CodeGen/MBlaze/imm.ll @@ -22,7 +22,7 @@ define i16 @retimm_i16() { ; FPU: retimm_i16: ; FPU: rtsd ; FPU-NEXT: add - ret i16 38212 + ret i16 31212 } define i32 @retimm_i32() { diff --git a/test/CodeGen/MBlaze/intr.ll b/test/CodeGen/MBlaze/intr.ll new file mode 100644 index 0000000..79c6bff --- /dev/null +++ b/test/CodeGen/MBlaze/intr.ll @@ -0,0 +1,48 @@ +; Ensure that the MBlaze interrupt_handler calling convention (cc73) is handled +; correctly correctly by the MBlaze backend. +; +; RUN: llc < %s -march=mblaze | FileCheck %s + +@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00" +@_interrupt_handler = alias void ()* @myintr + +define cc73 void @myintr() nounwind noinline { + ; CHECK: myintr: + ; CHECK: swi r3, r1 + ; CHECK: swi r4, r1 + ; CHECK: swi r5, r1 + ; CHECK: swi r6, r1 + ; CHECK: swi r7, r1 + ; CHECK: swi r8, r1 + ; CHECK: swi r9, r1 + ; CHECK: swi r10, r1 + ; CHECK: swi r11, r1 + ; CHECK: swi r12, r1 + ; CHECK: swi r17, r1 + ; CHECK: swi r18, r1 + ; CHECK: mfs r11, rmsr + ; CHECK: swi r11, r1 + entry: + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0)) + ret void + + ; CHECK: lwi r11, r1 + ; CHECK: mts rmsr, r11 + ; CHECK: lwi r18, r1 + ; CHECK: lwi r17, r1 + ; CHECK: lwi r12, r1 + ; CHECK: lwi r11, r1 + ; CHECK: lwi r10, r1 + ; CHECK: lwi r9, r1 + ; CHECK: lwi r8, r1 + ; CHECK: lwi r7, r1 + ; CHECK: lwi r6, r1 + ; CHECK: lwi r5, r1 + ; CHECK: lwi r4, r1 + ; CHECK: lwi r3, r1 + ; CHECK: rtid r14, 0 +} + + ; CHECK: .globl _interrupt_handler + ; CHECK: _interrupt_handler = myintr +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/MBlaze/jumptable.ll b/test/CodeGen/MBlaze/jumptable.ll index 0861810..299084d 100644 --- a/test/CodeGen/MBlaze/jumptable.ll +++ b/test/CodeGen/MBlaze/jumptable.ll @@ -18,8 +18,8 @@ define i32 @jmptable(i32 %arg) i32 8, label %L8 i32 9, label %L9 ] - ; CHECK: lw [[REG:r[0-9]*]] - ; CHECK: brd [[REG]] + ; CHECK: lw [[REG:r[0-9]*]] + ; CHECK: brad [[REG]] L0: %var0 = add i32 %arg, 0 br label %DONE diff --git a/test/CodeGen/MBlaze/loop.ll b/test/CodeGen/MBlaze/loop.ll index b473020..8973f75 100644 --- a/test/CodeGen/MBlaze/loop.ll +++ b/test/CodeGen/MBlaze/loop.ll @@ -27,11 +27,10 @@ loop_inner: loop_inner_finish: %inner.5 = add i32 %inner.2, 1 - ; CHECK: addi {{.*, 1}} - call i32 (i8*,...)* @printf( i8* getelementptr([19 x i8]* @MSG,i32 0,i32 0), i32 %inner.0, i32 %inner.1, i32 %inner.2 ) ; CHECK: brlid + ; CHECK: addik {{.*, 1}} %inner.6 = icmp eq i32 %inner.5, 100 ; CHECK: cmp diff --git a/test/CodeGen/MBlaze/shift.ll b/test/CodeGen/MBlaze/shift.ll index 7eac641..99f0519 100644 --- a/test/CodeGen/MBlaze/shift.ll +++ b/test/CodeGen/MBlaze/shift.ll @@ -13,7 +13,6 @@ define i8 @test_i8(i8 %a, i8 %b) { ; FUN: andi ; FUN: add ; FUN: bnei - ; SHT-NOT: andi ; SHT-NOT: bnei ret i8 %tmp.1 @@ -50,7 +49,6 @@ define i16 @test_i16(i16 %a, i16 %b) { ; FUN: andi ; FUN: add ; FUN: bnei - ; SHT-NOT: andi ; SHT-NOT: bnei ret i16 %tmp.1 diff --git a/test/CodeGen/MBlaze/svol.ll b/test/CodeGen/MBlaze/svol.ll new file mode 100644 index 0000000..c1e9620 --- /dev/null +++ b/test/CodeGen/MBlaze/svol.ll @@ -0,0 +1,80 @@ +; Ensure that the MBlaze save_volatiles calling convention (cc74) is handled +; correctly correctly by the MBlaze backend. +; +; RUN: llc < %s -march=mblaze | FileCheck %s + +@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00" + +define cc74 void @mysvol() nounwind noinline { + ; CHECK: mysvol: + ; CHECK: swi r3, r1 + ; CHECK: swi r4, r1 + ; CHECK: swi r5, r1 + ; CHECK: swi r6, r1 + ; CHECK: swi r7, r1 + ; CHECK: swi r8, r1 + ; CHECK: swi r9, r1 + ; CHECK: swi r10, r1 + ; CHECK: swi r11, r1 + ; CHECK: swi r12, r1 + ; CHECK: swi r17, r1 + ; CHECK: swi r18, r1 + ; CHECK-NOT: mfs r11, rmsr + entry: + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0)) + ret void + + ; CHECK-NOT: mts rmsr, r11 + ; CHECK: lwi r18, r1 + ; CHECK: lwi r17, r1 + ; CHECK: lwi r12, r1 + ; CHECK: lwi r11, r1 + ; CHECK: lwi r10, r1 + ; CHECK: lwi r9, r1 + ; CHECK: lwi r8, r1 + ; CHECK: lwi r7, r1 + ; CHECK: lwi r6, r1 + ; CHECK: lwi r5, r1 + ; CHECK: lwi r4, r1 + ; CHECK: lwi r3, r1 + ; CHECK: rtsd r15, 8 +} + +define cc74 void @mysvol2() nounwind noinline { + ; CHECK: mysvol2: + ; CHECK-NOT: swi r3, r1 + ; CHECK-NOT: swi r4, r1 + ; CHECK-NOT: swi r5, r1 + ; CHECK-NOT: swi r6, r1 + ; CHECK-NOT: swi r7, r1 + ; CHECK-NOT: swi r8, r1 + ; CHECK-NOT: swi r9, r1 + ; CHECK-NOT: swi r10, r1 + ; CHECK-NOT: swi r11, r1 + ; CHECK-NOT: swi r12, r1 + ; CHECK: swi r17, r1 + ; CHECK: swi r18, r1 + ; CHECK-NOT: mfs r11, rmsr +entry: + + ; CHECK-NOT: mts rmsr, r11 + ; CHECK: lwi r18, r1 + ; CHECK: lwi r17, r1 + ; CHECK-NOT: lwi r12, r1 + ; CHECK-NOT: lwi r11, r1 + ; CHECK-NOT: lwi r10, r1 + ; CHECK-NOT: lwi r9, r1 + ; CHECK-NOT: lwi r8, r1 + ; CHECK-NOT: lwi r7, r1 + ; CHECK-NOT: lwi r6, r1 + ; CHECK-NOT: lwi r5, r1 + ; CHECK-NOT: lwi r4, r1 + ; CHECK-NOT: lwi r3, r1 + ; CHECK: rtsd r15, 8 + ret void +} + + ; CHECK-NOT: .globl _interrupt_handler + ; CHECK-NOT: _interrupt_handler = mysvol + ; CHECK-NOT: _interrupt_handler = mysvol2 +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/MSP430/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/MSP430/2010-04-07-DbgValueOtherTargets.ll index 8de044c..9d549da 100644 --- a/test/CodeGen/MSP430/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/MSP430/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=msp430 -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/MSP430/Inst16mm.ll b/test/CodeGen/MSP430/Inst16mm.ll index d4ae811..2337c2c 100644 --- a/test/CodeGen/MSP430/Inst16mm.ll +++ b/test/CodeGen/MSP430/Inst16mm.ll @@ -64,6 +64,6 @@ entry: %0 = load i16* %retval ; <i16> [#uses=1] ret i16 %0 ; CHECK: mov2: -; CHECK: mov.w 2(r1), 6(r1) ; CHECK: mov.w 0(r1), 4(r1) +; CHECK: mov.w 2(r1), 6(r1) } diff --git a/test/CodeGen/Mips/2008-07-15-InternalConstant.ll b/test/CodeGen/Mips/2008-07-15-InternalConstant.ll index bda4a31..c3db638 100644 --- a/test/CodeGen/Mips/2008-07-15-InternalConstant.ll +++ b/test/CodeGen/Mips/2008-07-15-InternalConstant.ll @@ -7,8 +7,8 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "mipsallegrexel-unknown-psp-elf" -@.str = internal constant [10 x i8] c"AAAAAAAAA\00" -@i0 = internal constant [5 x i32] [ i32 0, i32 1, i32 2, i32 3, i32 4 ] +@.str = internal unnamed_addr constant [10 x i8] c"AAAAAAAAA\00" +@i0 = internal unnamed_addr constant [5 x i32] [ i32 0, i32 1, i32 2, i32 3, i32 4 ] define i8* @foo() nounwind { entry: diff --git a/test/CodeGen/Mips/2008-07-22-Cstpool.ll b/test/CodeGen/Mips/2008-07-22-Cstpool.ll index 20bd888..94dfe35 100644 --- a/test/CodeGen/Mips/2008-07-22-Cstpool.ll +++ b/test/CodeGen/Mips/2008-07-22-Cstpool.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=mips -o %t ; RUN: grep {CPI\[01\]_\[01\]:} %t | count 2 -; RUN: grep {rodata.cst4,"aM",@progbits} %t | count 1 +; RUN: grep {.rodata.cst4,"aM",@progbits} %t | count 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "mipsallegrexel-unknown-psp-elf" diff --git a/test/CodeGen/Mips/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/Mips/2010-04-07-DbgValueOtherTargets.ll index 4161c1d..994e19a 100644 --- a/test/CodeGen/Mips/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/Mips/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=mips -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/Mips/blockaddr.ll b/test/CodeGen/Mips/blockaddr.ll new file mode 100644 index 0000000..2b06314 --- /dev/null +++ b/test/CodeGen/Mips/blockaddr.ll @@ -0,0 +1,26 @@ +; RUN: llc -march=mipsel < %s | FileCheck %s + +@reg = common global i8* null, align 4 + +define i8* @dummy(i8* %x) nounwind readnone noinline { +entry: + ret i8* %x +} + +; CHECK: lw $2, %got($tmp1)($gp) +; CHECK: addiu $4, $2, %lo($tmp1) +; CHECK: lw $2, %got($tmp2)($gp) +; CHECK: addiu $2, $2, %lo($tmp2) +define void @f() nounwind { +entry: + %call = tail call i8* @dummy(i8* blockaddress(@f, %baz)) + indirectbr i8* %call, [label %baz, label %foo] + +foo: ; preds = %foo, %entry + store i8* blockaddress(@f, %foo), i8** @reg, align 4 + br label %foo + +baz: ; preds = %entry + store i8* null, i8** @reg, align 4 + ret void +} diff --git a/test/CodeGen/Mips/cmov.ll b/test/CodeGen/Mips/cmov.ll new file mode 100755 index 0000000..7d3e025 --- /dev/null +++ b/test/CodeGen/Mips/cmov.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +@i1 = global [3 x i32] [i32 1, i32 2, i32 3], align 4 +@i3 = common global i32* null, align 4 + +; CHECK: lw $3, %got(i3)($gp) +; CHECK: addiu $5, $gp, %got(i1) +define i32* @cmov1(i32 %s) nounwind readonly { +entry: + %tobool = icmp ne i32 %s, 0 + %tmp1 = load i32** @i3, align 4 + %cond = select i1 %tobool, i32* getelementptr inbounds ([3 x i32]* @i1, i32 0, i32 0), i32* %tmp1 + ret i32* %cond +} + diff --git a/test/CodeGen/Mips/divrem.ll b/test/CodeGen/Mips/divrem.ll new file mode 100644 index 0000000..398d1b7 --- /dev/null +++ b/test/CodeGen/Mips/divrem.ll @@ -0,0 +1,51 @@ +; RUN: llc -march=mips < %s | FileCheck %s + +; CHECK: div $zero, +define i32 @sdiv1(i32 %a0, i32 %a1) nounwind readnone { +entry: + %div = sdiv i32 %a0, %a1 + ret i32 %div +} + +; CHECK: div $zero, +define i32 @srem1(i32 %a0, i32 %a1) nounwind readnone { +entry: + %rem = srem i32 %a0, %a1 + ret i32 %rem +} + +; CHECK: divu $zero, +define i32 @udiv1(i32 %a0, i32 %a1) nounwind readnone { +entry: + %div = udiv i32 %a0, %a1 + ret i32 %div +} + +; CHECK: divu $zero, +define i32 @urem1(i32 %a0, i32 %a1) nounwind readnone { +entry: + %rem = urem i32 %a0, %a1 + ret i32 %rem +} + +; CHECK: div $zero, +define i32 @sdivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind { +entry: + %rem = srem i32 %a0, %a1 + store i32 %rem, i32* %r, align 4, !tbaa !0 + %div = sdiv i32 %a0, %a1 + ret i32 %div +} + +; CHECK: divu $zero, +define i32 @udivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind { +entry: + %rem = urem i32 %a0, %a1 + store i32 %rem, i32* %r, align 4, !tbaa !0 + %div = udiv i32 %a0, %a1 + ret i32 %div +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/Mips/largeimm1.ll b/test/CodeGen/Mips/largeimm1.ll new file mode 100644 index 0000000..d65cc02 --- /dev/null +++ b/test/CodeGen/Mips/largeimm1.ll @@ -0,0 +1,13 @@ +; RUN: llc -march=mipsel < %s | FileCheck %s + +; CHECK: lui $at, 49152 +; CHECK: lui $at, 16384 +define void @f() nounwind { +entry: + %a1 = alloca [1073741824 x i8], align 1 + %arrayidx = getelementptr inbounds [1073741824 x i8]* %a1, i32 0, i32 1048676 + call void @f2(i8* %arrayidx) nounwind + ret void +} + +declare void @f2(i8*) diff --git a/test/CodeGen/Mips/madd-msub.ll b/test/CodeGen/Mips/madd-msub.ll new file mode 100644 index 0000000..4a205b1 --- /dev/null +++ b/test/CodeGen/Mips/madd-msub.ll @@ -0,0 +1,65 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; CHECK: madd $5, $4 +define i64 @madd1(i32 %a, i32 %b, i32 %c) nounwind readnone { +entry: + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %mul = mul nsw i64 %conv2, %conv + %conv4 = sext i32 %c to i64 + %add = add nsw i64 %mul, %conv4 + ret i64 %add +} + +; CHECK: maddu $5, $4 +define i64 @madd2(i32 %a, i32 %b, i32 %c) nounwind readnone { +entry: + %conv = zext i32 %a to i64 + %conv2 = zext i32 %b to i64 + %mul = mul nsw i64 %conv2, %conv + %conv4 = zext i32 %c to i64 + %add = add nsw i64 %mul, %conv4 + ret i64 %add +} + +; CHECK: madd $5, $4 +define i64 @madd3(i32 %a, i32 %b, i64 %c) nounwind readnone { +entry: + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %mul = mul nsw i64 %conv2, %conv + %add = add nsw i64 %mul, %c + ret i64 %add +} + +; CHECK: msub $5, $4 +define i64 @msub1(i32 %a, i32 %b, i32 %c) nounwind readnone { +entry: + %conv = sext i32 %c to i64 + %conv2 = sext i32 %a to i64 + %conv4 = sext i32 %b to i64 + %mul = mul nsw i64 %conv4, %conv2 + %sub = sub nsw i64 %conv, %mul + ret i64 %sub +} + +; CHECK: msubu $5, $4 +define i64 @msub2(i32 %a, i32 %b, i32 %c) nounwind readnone { +entry: + %conv = zext i32 %c to i64 + %conv2 = zext i32 %a to i64 + %conv4 = zext i32 %b to i64 + %mul = mul nsw i64 %conv4, %conv2 + %sub = sub nsw i64 %conv, %mul + ret i64 %sub +} + +; CHECK: msub $5, $4 +define i64 @msub3(i32 %a, i32 %b, i64 %c) nounwind readnone { +entry: + %conv = sext i32 %a to i64 + %conv3 = sext i32 %b to i64 + %mul = mul nsw i64 %conv3, %conv + %sub = sub nsw i64 %c, %mul + ret i64 %sub +} diff --git a/test/CodeGen/Mips/o32_cc.ll b/test/CodeGen/Mips/o32_cc.ll new file mode 100644 index 0000000..b6df62b --- /dev/null +++ b/test/CodeGen/Mips/o32_cc.ll @@ -0,0 +1,325 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; FIXME: Disabled because it unpredictably fails on certain platforms. +; REQUIRES: disabled + +; $f12, $f14 +; CHECK: ldc1 $f12, %lo +; CHECK: ldc1 $f14, %lo +define void @testlowercall0() nounwind { +entry: + tail call void @f0(double 5.000000e+00, double 6.000000e+00) nounwind + ret void +} + +declare void @f0(double, double) + +; $f12, $f14 +; CHECK: lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +define void @testlowercall1() nounwind { +entry: + tail call void @f1(float 8.000000e+00, float 9.000000e+00) nounwind + ret void +} + +declare void @f1(float, float) + +; $f12, $f14 +; CHECK: lwc1 $f12, %lo +; CHECK: ldc1 $f14, %lo +define void @testlowercall2() nounwind { +entry: + tail call void @f2(float 8.000000e+00, double 6.000000e+00) nounwind + ret void +} + +declare void @f2(float, double) + +; $f12, $f14 +; CHECK: ldc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +define void @testlowercall3() nounwind { +entry: + tail call void @f3(double 5.000000e+00, float 9.000000e+00) nounwind + ret void +} + +declare void @f3(double, float) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 12 +; CHECK: addiu $5, $zero, 13 +; CHECK: addiu $6, $zero, 14 +; CHECK: addiu $7, $zero, 15 +define void @testlowercall4() nounwind { +entry: + tail call void @f4(i32 12, i32 13, i32 14, i32 15) nounwind + ret void +} + +declare void @f4(i32, i32, i32, i32) + +; $f12, $6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 23 +define void @testlowercall5() nounwind { +entry: + tail call void @f5(double 1.500000e+01, i32 23, double 1.700000e+01) nounwind + ret void +} + +declare void @f5(double, i32, double) + +; $f12, $6, $7 +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 33 +; CHECK: addiu $7, $zero, 24 +define void @testlowercall6() nounwind { +entry: + tail call void @f6(double 2.500000e+01, i32 33, i32 24) nounwind + ret void +} + +declare void @f6(double, i32, i32) + +; $f12, $5, $6 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 43 +; CHECK: addiu $6, $zero, 34 +define void @testlowercall7() nounwind { +entry: + tail call void @f7(float 1.800000e+01, i32 43, i32 34) nounwind + ret void +} + +declare void @f7(float, i32, i32) + +; $4, $5, $6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: addiu $4, $zero, 22 +; CHECK: addiu $5, $zero, 53 +; CHECK: addiu $6, $zero, 44 +define void @testlowercall8() nounwind { +entry: + tail call void @f8(i32 22, i32 53, i32 44, double 4.000000e+00) nounwind + ret void +} + +declare void @f8(i32, i32, i32, double) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 32 +; CHECK: addiu $5, $zero, 63 +; CHECK: addiu $6, $zero, 54 +; CHECK: ori $7, $2, 0 +define void @testlowercall9() nounwind { +entry: + tail call void @f9(i32 32, i32 63, i32 54, float 1.100000e+01) nounwind + ret void +} + +declare void @f9(i32, i32, i32, float) + +; $4, $5, ($6, $7) +; CHECK: addiu $4, $zero, 42 +; CHECK: addiu $5, $zero, 73 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $2, 0 +define void @testlowercall10() nounwind { +entry: + tail call void @f10(i32 42, i32 73, double 2.700000e+01) nounwind + ret void +} + +declare void @f10(i32, i32, double) + +; $4, ($6, $7) +; CHECK: addiu $4, $zero, 52 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $2, 0 +define void @testlowercall11() nounwind { +entry: + tail call void @f11(i32 52, double 1.600000e+01) nounwind + ret void +} + +declare void @f11(i32, double) + +; $f12, $f14, $6, $7 +; CHECK: lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: ori $6, $4, 0 +; CHECK: ori $7, $5, 0 +define void @testlowercall12() nounwind { +entry: + tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind + ret void +} + +declare void @f12(float, float, float, float) + +; $f12, $5, $6, $7 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 83 +; CHECK: ori $6, $3, 0 +; CHECK: addiu $7, $zero, 25 +define void @testlowercall13() nounwind { +entry: + tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind + ret void +} + + +declare void @f13(float, i32, float, i32) + +; $f12, $f14, $7 +; CHECK: ldc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: ori $7, $4, 0 +define void @testlowercall14() nounwind { +entry: + tail call void @f14(double 3.500000e+01, float 2.900000e+01, float 3.000000e+01) nounwind + ret void +} + +declare void @f14(double, float, float) + +; $f12, $f14, ($6, $7) +; CHECK: lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $4, 32768 +define void @testlowercall15() nounwind { +entry: + tail call void @f15(float 4.800000e+01, float 3.900000e+01, double 3.700000e+01) nounwind + ret void +} + +declare void @f15(float, float, double) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 62 +; CHECK: ori $5, $2, 0 +; CHECK: addiu $6, $zero, 64 +; CHECK: ori $7, $3, 0 +define void @testlowercall16() nounwind { +entry: + tail call void @f16(i32 62, float 4.900000e+01, i32 64, float 3.100000e+01) nounwind + ret void +} + +declare void @f16(i32, float, i32, float) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 72 +; CHECK: ori $5, $2, 0 +; CHECK: addiu $6, $zero, 74 +; CHECK: addiu $7, $zero, 35 +define void @testlowercall17() nounwind { +entry: + tail call void @f17(i32 72, float 5.900000e+01, i32 74, i32 35) nounwind + ret void +} + +declare void @f17(i32, float, i32, i32) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 82 +; CHECK: addiu $5, $zero, 93 +; CHECK: ori $6, $2, 0 +; CHECK: addiu $7, $zero, 45 +define void @testlowercall18() nounwind { +entry: + tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind + ret void +} + +declare void @f18(i32, i32, float, i32) + + +; $4, ($6, $7), stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: addiu $4, $zero, 92 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $3, 0 +define void @testlowercall20() nounwind { +entry: + tail call void @f20(i32 92, double 2.600000e+01, double 4.700000e+01) nounwind + ret void +} + +declare void @f20(i32, double, double) + +; $f12, $5 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 103 +define void @testlowercall21() nounwind { +entry: + tail call void @f21(float 5.800000e+01, i32 103) nounwind + ret void +} + +declare void @f21(float, i32) + +; $f12, $5, ($6, $7) +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 113 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $3, 32768 +define void @testlowercall22() nounwind { +entry: + tail call void @f22(float 6.800000e+01, i32 113, double 5.700000e+01) nounwind + ret void +} + +declare void @f22(float, i32, double) + +; $f12, f6 +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 123 +define void @testlowercall23() nounwind { +entry: + tail call void @f23(double 4.500000e+01, i32 123) nounwind + ret void +} + +declare void @f23(double, i32) + +; $f12,$6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 133 +define void @testlowercall24() nounwind { +entry: + tail call void @f24(double 5.500000e+01, i32 133, double 6.700000e+01) nounwind + ret void +} + +declare void @f24(double, i32, double) + +; CHECK: lwc1 $f12, %lo +; lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: ori $6, $4, 0 +; CHECK: ori $7, $5, 0 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 83 +; CHECK: ori $6, $3, 0 +; CHECK: addiu $7, $zero, 25 +; CHECK: addiu $4, $zero, 82 +; CHECK: addiu $5, $zero, 93 +; CHECK: ori $6, $2, 0 +; CHECK: addiu $7, $zero, 45 +define void @testlowercall25() nounwind { +entry: + tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind + tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind + tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind + ret void +} diff --git a/test/CodeGen/Mips/rotate.ll b/test/CodeGen/Mips/rotate.ll new file mode 100644 index 0000000..e7dc309 --- /dev/null +++ b/test/CodeGen/Mips/rotate.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; CHECK: rotrv $2, $4, $2 +define i32 @rot0(i32 %a, i32 %b) nounwind readnone { +entry: + %shl = shl i32 %a, %b + %sub = sub i32 32, %b + %shr = lshr i32 %a, %sub + %or = or i32 %shr, %shl + ret i32 %or +} + +; CHECK: rotr $2, $4, 22 +define i32 @rot1(i32 %a) nounwind readnone { +entry: + %shl = shl i32 %a, 10 + %shr = lshr i32 %a, 22 + %or = or i32 %shl, %shr + ret i32 %or +} + +; CHECK: rotrv $2, $4, $5 +define i32 @rot2(i32 %a, i32 %b) nounwind readnone { +entry: + %shr = lshr i32 %a, %b + %sub = sub i32 32, %b + %shl = shl i32 %a, %sub + %or = or i32 %shl, %shr + ret i32 %or +} + +; CHECK: rotr $2, $4, 10 +define i32 @rot3(i32 %a) nounwind readnone { +entry: + %shr = lshr i32 %a, 10 + %shl = shl i32 %a, 22 + %or = or i32 %shr, %shl + ret i32 %or +} + diff --git a/test/CodeGen/PTX/add.ll b/test/CodeGen/PTX/add.ll new file mode 100644 index 0000000..598591c --- /dev/null +++ b/test/CodeGen/PTX/add.ll @@ -0,0 +1,71 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i16 @t1_u16(i16 %x, i16 %y) { +; CHECK: add.u16 rh0, rh1, rh2; +; CHECK-NEXT: ret; + %z = add i16 %x, %y + ret i16 %z +} + +define ptx_device i32 @t1_u32(i32 %x, i32 %y) { +; CHECK: add.u32 r0, r1, r2; +; CHECK-NEXT: ret; + %z = add i32 %x, %y + ret i32 %z +} + +define ptx_device i64 @t1_u64(i64 %x, i64 %y) { +; CHECK: add.u64 rd0, rd1, rd2; +; CHECK-NEXT: ret; + %z = add i64 %x, %y + ret i64 %z +} + +define ptx_device float @t1_f32(float %x, float %y) { +; CHECK: add.f32 f0, f1, f2 +; CHECK-NEXT: ret; + %z = fadd float %x, %y + ret float %z +} + +define ptx_device double @t1_f64(double %x, double %y) { +; CHECK: add.f64 fd0, fd1, fd2 +; CHECK-NEXT: ret; + %z = fadd double %x, %y + ret double %z +} + +define ptx_device i16 @t2_u16(i16 %x) { +; CHECK: add.u16 rh0, rh1, 1; +; CHECK-NEXT: ret; + %z = add i16 %x, 1 + ret i16 %z +} + +define ptx_device i32 @t2_u32(i32 %x) { +; CHECK: add.u32 r0, r1, 1; +; CHECK-NEXT: ret; + %z = add i32 %x, 1 + ret i32 %z +} + +define ptx_device i64 @t2_u64(i64 %x) { +; CHECK: add.u64 rd0, rd1, 1; +; CHECK-NEXT: ret; + %z = add i64 %x, 1 + ret i64 %z +} + +define ptx_device float @t2_f32(float %x) { +; CHECK: add.f32 f0, f1, 0F3F800000; +; CHECK-NEXT: ret; + %z = fadd float %x, 1.0 + ret float %z +} + +define ptx_device double @t2_f64(double %x) { +; CHECK: add.f64 fd0, fd1, 0D3FF0000000000000; +; CHECK-NEXT: ret; + %z = fadd double %x, 1.0 + ret double %z +} diff --git a/test/CodeGen/PTX/exit.ll b/test/CodeGen/PTX/exit.ll index 1fb297c..4071bab 100644 --- a/test/CodeGen/PTX/exit.ll +++ b/test/CodeGen/PTX/exit.ll @@ -1,6 +1,14 @@ ; RUN: llc < %s -march=ptx | FileCheck %s define ptx_kernel void @t1() { -;CHECK: exit; - ret void +; CHECK: exit; +; CHECK-NOT: ret; + ret void +} + +define ptx_kernel void @t2(i32* %p, i32 %x) { + store i32 %x, i32* %p +; CHECK: exit; +; CHECK-NOT: ret; + ret void } diff --git a/test/CodeGen/PTX/intrinsic.ll b/test/CodeGen/PTX/intrinsic.ll new file mode 100644 index 0000000..24c328b --- /dev/null +++ b/test/CodeGen/PTX/intrinsic.ll @@ -0,0 +1,43 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i16 @tid_x() { +; CHECK: mov.u16 rh0, tid.x; +; CHECK-NEXT: ret; + %x = call i16 @llvm.ptx.read.tid.x() + ret i16 %x +} + +define ptx_device i16 @tid_y() { +; CHECK: mov.u16 rh0, tid.y; +; CHECK-NEXT: ret; + %x = call i16 @llvm.ptx.read.tid.y() + ret i16 %x +} + +define ptx_device i16 @tid_z() { +; CHECK: mov.u16 rh0, tid.z; +; CHECK-NEXT: ret; + %x = call i16 @llvm.ptx.read.tid.z() + ret i16 %x +} + +define ptx_device i16 @tid_w() { +; CHECK: mov.u16 rh0, tid.w; +; CHECK-NEXT: ret; + %x = call i16 @llvm.ptx.read.tid.w() + ret i16 %x +} + +define ptx_device void @bar_sync() { +; CHECK: bar.sync 0 +; CHECK-NEXT: ret; + call void @llvm.ptx.bar.sync(i32 0) + ret void +} + +declare i16 @llvm.ptx.read.tid.x() +declare i16 @llvm.ptx.read.tid.y() +declare i16 @llvm.ptx.read.tid.z() +declare i16 @llvm.ptx.read.tid.w() + +declare void @llvm.ptx.bar.sync(i32 %i) diff --git a/test/CodeGen/PTX/ld.ll b/test/CodeGen/PTX/ld.ll new file mode 100644 index 0000000..e7cc92e --- /dev/null +++ b/test/CodeGen/PTX/ld.ll @@ -0,0 +1,422 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +;CHECK: .extern .global .u16 array_i16[]; +@array_i16 = external global [10 x i16] + +;CHECK: .extern .const .u16 array_constant_i16[]; +@array_constant_i16 = external addrspace(1) constant [10 x i16] + +;CHECK: .extern .local .u16 array_local_i16[]; +@array_local_i16 = external addrspace(2) global [10 x i16] + +;CHECK: .extern .shared .u16 array_shared_i16[]; +@array_shared_i16 = external addrspace(4) global [10 x i16] + +;CHECK: .extern .global .u32 array_i32[]; +@array_i32 = external global [10 x i32] + +;CHECK: .extern .const .u32 array_constant_i32[]; +@array_constant_i32 = external addrspace(1) constant [10 x i32] + +;CHECK: .extern .local .u32 array_local_i32[]; +@array_local_i32 = external addrspace(2) global [10 x i32] + +;CHECK: .extern .shared .u32 array_shared_i32[]; +@array_shared_i32 = external addrspace(4) global [10 x i32] + +;CHECK: .extern .global .u64 array_i64[]; +@array_i64 = external global [10 x i64] + +;CHECK: .extern .const .u64 array_constant_i64[]; +@array_constant_i64 = external addrspace(1) constant [10 x i64] + +;CHECK: .extern .local .u64 array_local_i64[]; +@array_local_i64 = external addrspace(2) global [10 x i64] + +;CHECK: .extern .shared .u64 array_shared_i64[]; +@array_shared_i64 = external addrspace(4) global [10 x i64] + +;CHECK: .extern .global .f32 array_float[]; +@array_float = external global [10 x float] + +;CHECK: .extern .const .f32 array_constant_float[]; +@array_constant_float = external addrspace(1) constant [10 x float] + +;CHECK: .extern .local .f32 array_local_float[]; +@array_local_float = external addrspace(2) global [10 x float] + +;CHECK: .extern .shared .f32 array_shared_float[]; +@array_shared_float = external addrspace(4) global [10 x float] + +;CHECK: .extern .global .f64 array_double[]; +@array_double = external global [10 x double] + +;CHECK: .extern .const .f64 array_constant_double[]; +@array_constant_double = external addrspace(1) constant [10 x double] + +;CHECK: .extern .local .f64 array_local_double[]; +@array_local_double = external addrspace(2) global [10 x double] + +;CHECK: .extern .shared .f64 array_shared_double[]; +@array_shared_double = external addrspace(4) global [10 x double] + + +define ptx_device i16 @t1_u16(i16* %p) { +entry: +;CHECK: ld.global.u16 rh0, [r1]; +;CHECK-NEXT; ret; + %x = load i16* %p + ret i16 %x +} + +define ptx_device i32 @t1_u32(i32* %p) { +entry: +;CHECK: ld.global.u32 r0, [r1]; +;CHECK-NEXT: ret; + %x = load i32* %p + ret i32 %x +} + +define ptx_device i64 @t1_u64(i64* %p) { +entry: +;CHECK: ld.global.u64 rd0, [r1]; +;CHECK-NEXT: ret; + %x = load i64* %p + ret i64 %x +} + +define ptx_device float @t1_f32(float* %p) { +entry: +;CHECK: ld.global.f32 f0, [r1]; +;CHECK-NEXT: ret; + %x = load float* %p + ret float %x +} + +define ptx_device double @t1_f64(double* %p) { +entry: +;CHECK: ld.global.f64 fd0, [r1]; +;CHECK-NEXT: ret; + %x = load double* %p + ret double %x +} + +define ptx_device i16 @t2_u16(i16* %p) { +entry: +;CHECK: ld.global.u16 rh0, [r1+2]; +;CHECK-NEXT: ret; + %i = getelementptr i16* %p, i32 1 + %x = load i16* %i + ret i16 %x +} + +define ptx_device i32 @t2_u32(i32* %p) { +entry: +;CHECK: ld.global.u32 r0, [r1+4]; +;CHECK-NEXT: ret; + %i = getelementptr i32* %p, i32 1 + %x = load i32* %i + ret i32 %x +} + +define ptx_device i64 @t2_u64(i64* %p) { +entry: +;CHECK: ld.global.u64 rd0, [r1+8]; +;CHECK-NEXT: ret; + %i = getelementptr i64* %p, i32 1 + %x = load i64* %i + ret i64 %x +} + +define ptx_device float @t2_f32(float* %p) { +entry: +;CHECK: ld.global.f32 f0, [r1+4]; +;CHECK-NEXT: ret; + %i = getelementptr float* %p, i32 1 + %x = load float* %i + ret float %x +} + +define ptx_device double @t2_f64(double* %p) { +entry: +;CHECK: ld.global.f64 fd0, [r1+8]; +;CHECK-NEXT: ret; + %i = getelementptr double* %p, i32 1 + %x = load double* %i + ret double %x +} + +define ptx_device i16 @t3_u16(i16* %p, i32 %q) { +entry: +;CHECK: shl.b32 r0, r2, 1; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: ld.global.u16 rh0, [r0]; + %i = getelementptr i16* %p, i32 %q + %x = load i16* %i + ret i16 %x +} + +define ptx_device i32 @t3_u32(i32* %p, i32 %q) { +entry: +;CHECK: shl.b32 r0, r2, 2; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: ld.global.u32 r0, [r0]; + %i = getelementptr i32* %p, i32 %q + %x = load i32* %i + ret i32 %x +} + +define ptx_device i64 @t3_u64(i64* %p, i32 %q) { +entry: +;CHECK: shl.b32 r0, r2, 3; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: ld.global.u64 rd0, [r0]; + %i = getelementptr i64* %p, i32 %q + %x = load i64* %i + ret i64 %x +} + +define ptx_device float @t3_f32(float* %p, i32 %q) { +entry: +;CHECK: shl.b32 r0, r2, 2; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: ld.global.f32 f0, [r0]; + %i = getelementptr float* %p, i32 %q + %x = load float* %i + ret float %x +} + +define ptx_device double @t3_f64(double* %p, i32 %q) { +entry: +;CHECK: shl.b32 r0, r2, 3; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: ld.global.f64 fd0, [r0]; + %i = getelementptr double* %p, i32 %q + %x = load double* %i + ret double %x +} + +define ptx_device i16 @t4_global_u16() { +entry: +;CHECK: ld.global.u16 rh0, [array_i16]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i16]* @array_i16, i32 0, i32 0 + %x = load i16* %i + ret i16 %x +} + +define ptx_device i32 @t4_global_u32() { +entry: +;CHECK: ld.global.u32 r0, [array_i32]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 0 + %x = load i32* %i + ret i32 %x +} + +define ptx_device i64 @t4_global_u64() { +entry: +;CHECK: ld.global.u64 rd0, [array_i64]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 0 + %x = load i64* %i + ret i64 %x +} + +define ptx_device float @t4_global_f32() { +entry: +;CHECK: ld.global.f32 f0, [array_float]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x float]* @array_float, i32 0, i32 0 + %x = load float* %i + ret float %x +} + +define ptx_device double @t4_global_f64() { +entry: +;CHECK: ld.global.f64 fd0, [array_double]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x double]* @array_double, i32 0, i32 0 + %x = load double* %i + ret double %x +} + +define ptx_device i16 @t4_const_u16() { +entry: +;CHECK: ld.const.u16 rh0, [array_constant_i16]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i16] addrspace(1)* @array_constant_i16, i32 0, i32 0 + %x = load i16 addrspace(1)* %i + ret i16 %x +} + +define ptx_device i32 @t4_const_u32() { +entry: +;CHECK: ld.const.u32 r0, [array_constant_i32]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i32] addrspace(1)* @array_constant_i32, i32 0, i32 0 + %x = load i32 addrspace(1)* %i + ret i32 %x +} + +define ptx_device i64 @t4_const_u64() { +entry: +;CHECK: ld.const.u64 rd0, [array_constant_i64]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i64] addrspace(1)* @array_constant_i64, i32 0, i32 0 + %x = load i64 addrspace(1)* %i + ret i64 %x +} + +define ptx_device float @t4_const_f32() { +entry: +;CHECK: ld.const.f32 f0, [array_constant_float]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x float] addrspace(1)* @array_constant_float, i32 0, i32 0 + %x = load float addrspace(1)* %i + ret float %x +} + +define ptx_device double @t4_const_f64() { +entry: +;CHECK: ld.const.f64 fd0, [array_constant_double]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x double] addrspace(1)* @array_constant_double, i32 0, i32 0 + %x = load double addrspace(1)* %i + ret double %x +} + +define ptx_device i16 @t4_local_u16() { +entry: +;CHECK: ld.local.u16 rh0, [array_local_i16]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i16] addrspace(2)* @array_local_i16, i32 0, i32 0 + %x = load i16 addrspace(2)* %i + ret i16 %x +} + +define ptx_device i32 @t4_local_u32() { +entry: +;CHECK: ld.local.u32 r0, [array_local_i32]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i32] addrspace(2)* @array_local_i32, i32 0, i32 0 + %x = load i32 addrspace(2)* %i + ret i32 %x +} + +define ptx_device i64 @t4_local_u64() { +entry: +;CHECK: ld.local.u64 rd0, [array_local_i64]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i64] addrspace(2)* @array_local_i64, i32 0, i32 0 + %x = load i64 addrspace(2)* %i + ret i64 %x +} + +define ptx_device float @t4_local_f32() { +entry: +;CHECK: ld.local.f32 f0, [array_local_float]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x float] addrspace(2)* @array_local_float, i32 0, i32 0 + %x = load float addrspace(2)* %i + ret float %x +} + +define ptx_device double @t4_local_f64() { +entry: +;CHECK: ld.local.f64 fd0, [array_local_double]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x double] addrspace(2)* @array_local_double, i32 0, i32 0 + %x = load double addrspace(2)* %i + ret double %x +} + +define ptx_device i16 @t4_shared_u16() { +entry: +;CHECK: ld.shared.u16 rh0, [array_shared_i16]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i16] addrspace(4)* @array_shared_i16, i32 0, i32 0 + %x = load i16 addrspace(4)* %i + ret i16 %x +} + +define ptx_device i32 @t4_shared_u32() { +entry: +;CHECK: ld.shared.u32 r0, [array_shared_i32]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i32] addrspace(4)* @array_shared_i32, i32 0, i32 0 + %x = load i32 addrspace(4)* %i + ret i32 %x +} + +define ptx_device i64 @t4_shared_u64() { +entry: +;CHECK: ld.shared.u64 rd0, [array_shared_i64]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i64] addrspace(4)* @array_shared_i64, i32 0, i32 0 + %x = load i64 addrspace(4)* %i + ret i64 %x +} + +define ptx_device float @t4_shared_f32() { +entry: +;CHECK: ld.shared.f32 f0, [array_shared_float]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x float] addrspace(4)* @array_shared_float, i32 0, i32 0 + %x = load float addrspace(4)* %i + ret float %x +} + +define ptx_device double @t4_shared_f64() { +entry: +;CHECK: ld.shared.f64 fd0, [array_shared_double]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x double] addrspace(4)* @array_shared_double, i32 0, i32 0 + %x = load double addrspace(4)* %i + ret double %x +} + +define ptx_device i16 @t5_u16() { +entry: +;CHECK: ld.global.u16 rh0, [array_i16+2]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i16]* @array_i16, i32 0, i32 1 + %x = load i16* %i + ret i16 %x +} + +define ptx_device i32 @t5_u32() { +entry: +;CHECK: ld.global.u32 r0, [array_i32+4]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 1 + %x = load i32* %i + ret i32 %x +} + +define ptx_device i64 @t5_u64() { +entry: +;CHECK: ld.global.u64 rd0, [array_i64+8]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 1 + %x = load i64* %i + ret i64 %x +} + +define ptx_device float @t5_f32() { +entry: +;CHECK: ld.global.f32 f0, [array_float+4]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x float]* @array_float, i32 0, i32 1 + %x = load float* %i + ret float %x +} + +define ptx_device double @t5_f64() { +entry: +;CHECK: ld.global.f64 fd0, [array_double+8]; +;CHECK-NEXT: ret; + %i = getelementptr [10 x double]* @array_double, i32 0, i32 1 + %x = load double* %i + ret double %x +} diff --git a/test/CodeGen/PTX/mov.ll b/test/CodeGen/PTX/mov.ll index 287b846..00dcf19 100644 --- a/test/CodeGen/PTX/mov.ll +++ b/test/CodeGen/PTX/mov.ll @@ -1,13 +1,62 @@ ; RUN: llc < %s -march=ptx | FileCheck %s -define ptx_device i32 @t1() { -;CHECK: mov.s32 r0, 0; -;CHECK: ret; +define ptx_device i16 @t1_u16() { +; CHECK: mov.u16 rh0, 0; +; CHECK: ret; + ret i16 0 +} + +define ptx_device i32 @t1_u32() { +; CHECK: mov.u32 r0, 0; +; CHECK: ret; ret i32 0 } -define ptx_device i32 @t2(i32 %x) { -;CHECK: mov.s32 r0, r1; -;CHECK: ret; +define ptx_device i64 @t1_u64() { +; CHECK: mov.u64 rd0, 0; +; CHECK: ret; + ret i64 0 +} + +define ptx_device float @t1_f32() { +; CHECK: mov.f32 f0, 0F00000000; +; CHECK: ret; + ret float 0.0 +} + +define ptx_device double @t1_f64() { +; CHECK: mov.f64 fd0, 0D0000000000000000; +; CHECK: ret; + ret double 0.0 +} + +define ptx_device i16 @t2_u16(i16 %x) { +; CHECK: mov.u16 rh0, rh1; +; CHECK: ret; + ret i16 %x +} + +define ptx_device i32 @t2_u32(i32 %x) { +; CHECK: mov.u32 r0, r1; +; CHECK: ret; ret i32 %x } + +define ptx_device i64 @t2_u64(i64 %x) { +; CHECK: mov.u64 rd0, rd1; +; CHECK: ret; + ret i64 %x +} + +define ptx_device float @t3_f32(float %x) { +; CHECK: mov.f32 f0, f1; +; CHECK-NEXT: ret; + ret float %x +} + +define ptx_device double @t3_f64(double %x) { +; CHECK: mov.f64 fd0, fd1; +; CHECK-NEXT: ret; + ret double %x +} + diff --git a/test/CodeGen/PTX/mul.ll b/test/CodeGen/PTX/mul.ll new file mode 100644 index 0000000..fd0788f --- /dev/null +++ b/test/CodeGen/PTX/mul.ll @@ -0,0 +1,39 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +;define ptx_device i32 @t1(i32 %x, i32 %y) { +; %z = mul i32 %x, %y +; ret i32 %z +;} + +;define ptx_device i32 @t2(i32 %x) { +; %z = mul i32 %x, 1 +; ret i32 %z +;} + +define ptx_device float @t1_f32(float %x, float %y) { +; CHECK: mul.f32 f0, f1, f2 +; CHECK-NEXT: ret; + %z = fmul float %x, %y + ret float %z +} + +define ptx_device double @t1_f64(double %x, double %y) { +; CHECK: mul.f64 fd0, fd1, fd2 +; CHECK-NEXT: ret; + %z = fmul double %x, %y + ret double %z +} + +define ptx_device float @t2_f32(float %x) { +; CHECK: mul.f32 f0, f1, 0F40A00000; +; CHECK-NEXT: ret; + %z = fmul float %x, 5.0 + ret float %z +} + +define ptx_device double @t2_f64(double %x) { +; CHECK: mul.f64 fd0, fd1, 0D4014000000000000; +; CHECK-NEXT: ret; + %z = fmul double %x, 5.0 + ret double %z +} diff --git a/test/CodeGen/PTX/options.ll b/test/CodeGen/PTX/options.ll new file mode 100644 index 0000000..1435537 --- /dev/null +++ b/test/CodeGen/PTX/options.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -march=ptx -mattr=ptx14 | grep ".version 1.4" +; RUN: llc < %s -march=ptx -mattr=ptx20 | grep ".version 2.0" +; RUN: llc < %s -march=ptx -mattr=ptx21 | grep ".version 2.1" +; RUN: llc < %s -march=ptx -mattr=sm20 | grep ".target sm_20" +; RUN: llc < %s -march=ptx -mattr=sm13 | grep ".target sm_13" + +define ptx_device void @t1() { + ret void +} diff --git a/test/CodeGen/PTX/ret.ll b/test/CodeGen/PTX/ret.ll index c129ffe..d5037f2 100644 --- a/test/CodeGen/PTX/ret.ll +++ b/test/CodeGen/PTX/ret.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=ptx | FileCheck %s define ptx_device void @t1() { -;CHECK: ret; +; CHECK: ret; +; CHECK-NOT: exit; ret void } diff --git a/test/CodeGen/PTX/shl.ll b/test/CodeGen/PTX/shl.ll new file mode 100644 index 0000000..b564b43 --- /dev/null +++ b/test/CodeGen/PTX/shl.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i32 @t1(i32 %x, i32 %y) { +; CHECK: shl.b32 r0, r1, r2 + %z = shl i32 %x, %y +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t2(i32 %x) { +; CHECK: shl.b32 r0, r1, 3 + %z = shl i32 %x, 3 +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t3(i32 %x) { +; CHECK: shl.b32 r0, 3, r1 + %z = shl i32 3, %x +; CHECK: ret; + ret i32 %z +} diff --git a/test/CodeGen/PTX/shr.ll b/test/CodeGen/PTX/shr.ll new file mode 100644 index 0000000..3f8ade8 --- /dev/null +++ b/test/CodeGen/PTX/shr.ll @@ -0,0 +1,43 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i32 @t1(i32 %x, i32 %y) { +; CHECK: shr.u32 r0, r1, r2 + %z = lshr i32 %x, %y +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t2(i32 %x) { +; CHECK: shr.u32 r0, r1, 3 + %z = lshr i32 %x, 3 +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t3(i32 %x) { +; CHECK: shr.u32 r0, 3, r1 + %z = lshr i32 3, %x +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t4(i32 %x, i32 %y) { +; CHECK: shr.s32 r0, r1, r2 + %z = ashr i32 %x, %y +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t5(i32 %x) { +; CHECK: shr.s32 r0, r1, 3 + %z = ashr i32 %x, 3 +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t6(i32 %x) { +; CHECK: shr.s32 r0, -3, r1 + %z = ashr i32 -3, %x +; CHECK: ret; + ret i32 %z +} diff --git a/test/CodeGen/PTX/st.ll b/test/CodeGen/PTX/st.ll new file mode 100644 index 0000000..bbe89a1 --- /dev/null +++ b/test/CodeGen/PTX/st.ll @@ -0,0 +1,382 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +;CHECK: .extern .global .u16 array_i16[]; +@array_i16 = external global [10 x i16] + +;CHECK: .extern .const .u16 array_constant_i16[]; +@array_constant_i16 = external addrspace(1) constant [10 x i16] + +;CHECK: .extern .local .u16 array_local_i16[]; +@array_local_i16 = external addrspace(2) global [10 x i16] + +;CHECK: .extern .shared .u16 array_shared_i16[]; +@array_shared_i16 = external addrspace(4) global [10 x i16] + +;CHECK: .extern .global .u32 array_i32[]; +@array_i32 = external global [10 x i32] + +;CHECK: .extern .const .u32 array_constant_i32[]; +@array_constant_i32 = external addrspace(1) constant [10 x i32] + +;CHECK: .extern .local .u32 array_local_i32[]; +@array_local_i32 = external addrspace(2) global [10 x i32] + +;CHECK: .extern .shared .u32 array_shared_i32[]; +@array_shared_i32 = external addrspace(4) global [10 x i32] + +;CHECK: .extern .global .u64 array_i64[]; +@array_i64 = external global [10 x i64] + +;CHECK: .extern .const .u64 array_constant_i64[]; +@array_constant_i64 = external addrspace(1) constant [10 x i64] + +;CHECK: .extern .local .u64 array_local_i64[]; +@array_local_i64 = external addrspace(2) global [10 x i64] + +;CHECK: .extern .shared .u64 array_shared_i64[]; +@array_shared_i64 = external addrspace(4) global [10 x i64] + +;CHECK: .extern .global .f32 array_float[]; +@array_float = external global [10 x float] + +;CHECK: .extern .const .f32 array_constant_float[]; +@array_constant_float = external addrspace(1) constant [10 x float] + +;CHECK: .extern .local .f32 array_local_float[]; +@array_local_float = external addrspace(2) global [10 x float] + +;CHECK: .extern .shared .f32 array_shared_float[]; +@array_shared_float = external addrspace(4) global [10 x float] + +;CHECK: .extern .global .f64 array_double[]; +@array_double = external global [10 x double] + +;CHECK: .extern .const .f64 array_constant_double[]; +@array_constant_double = external addrspace(1) constant [10 x double] + +;CHECK: .extern .local .f64 array_local_double[]; +@array_local_double = external addrspace(2) global [10 x double] + +;CHECK: .extern .shared .f64 array_shared_double[]; +@array_shared_double = external addrspace(4) global [10 x double] + + +define ptx_device void @t1_u16(i16* %p, i16 %x) { +entry: +;CHECK: st.global.u16 [r1], rh1; +;CHECK-NEXT: ret; + store i16 %x, i16* %p + ret void +} + +define ptx_device void @t1_u32(i32* %p, i32 %x) { +entry: +;CHECK: st.global.u32 [r1], r2; +;CHECK-NEXT: ret; + store i32 %x, i32* %p + ret void +} + +define ptx_device void @t1_u64(i64* %p, i64 %x) { +entry: +;CHECK: st.global.u64 [r1], rd1; +;CHECK-NEXT: ret; + store i64 %x, i64* %p + ret void +} + +define ptx_device void @t1_f32(float* %p, float %x) { +entry: +;CHECK: st.global.f32 [r1], f1; +;CHECK-NEXT: ret; + store float %x, float* %p + ret void +} + +define ptx_device void @t1_f64(double* %p, double %x) { +entry: +;CHECK: st.global.f64 [r1], fd1; +;CHECK-NEXT: ret; + store double %x, double* %p + ret void +} + +define ptx_device void @t2_u16(i16* %p, i16 %x) { +entry: +;CHECK: st.global.u16 [r1+2], rh1; +;CHECK-NEXT: ret; + %i = getelementptr i16* %p, i32 1 + store i16 %x, i16* %i + ret void +} + +define ptx_device void @t2_u32(i32* %p, i32 %x) { +entry: +;CHECK: st.global.u32 [r1+4], r2; +;CHECK-NEXT: ret; + %i = getelementptr i32* %p, i32 1 + store i32 %x, i32* %i + ret void +} + +define ptx_device void @t2_u64(i64* %p, i64 %x) { +entry: +;CHECK: st.global.u64 [r1+8], rd1; +;CHECK-NEXT: ret; + %i = getelementptr i64* %p, i32 1 + store i64 %x, i64* %i + ret void +} + +define ptx_device void @t2_f32(float* %p, float %x) { +entry: +;CHECK: st.global.f32 [r1+4], f1; +;CHECK-NEXT: ret; + %i = getelementptr float* %p, i32 1 + store float %x, float* %i + ret void +} + +define ptx_device void @t2_f64(double* %p, double %x) { +entry: +;CHECK: st.global.f64 [r1+8], fd1; +;CHECK-NEXT: ret; + %i = getelementptr double* %p, i32 1 + store double %x, double* %i + ret void +} + +define ptx_device void @t3_u16(i16* %p, i32 %q, i16 %x) { +entry: +;CHECK: shl.b32 r0, r2, 1; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: st.global.u16 [r0], rh1; +;CHECK-NEXT: ret; + %i = getelementptr i16* %p, i32 %q + store i16 %x, i16* %i + ret void +} + +define ptx_device void @t3_u32(i32* %p, i32 %q, i32 %x) { +entry: +;CHECK: shl.b32 r0, r2, 2; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: st.global.u32 [r0], r3; +;CHECK-NEXT: ret; + %i = getelementptr i32* %p, i32 %q + store i32 %x, i32* %i + ret void +} + +define ptx_device void @t3_u64(i64* %p, i32 %q, i64 %x) { +entry: +;CHECK: shl.b32 r0, r2, 3; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: st.global.u64 [r0], rd1; +;CHECK-NEXT: ret; + %i = getelementptr i64* %p, i32 %q + store i64 %x, i64* %i + ret void +} + +define ptx_device void @t3_f32(float* %p, i32 %q, float %x) { +entry: +;CHECK: shl.b32 r0, r2, 2; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: st.global.f32 [r0], f1; +;CHECK-NEXT: ret; + %i = getelementptr float* %p, i32 %q + store float %x, float* %i + ret void +} + +define ptx_device void @t3_f64(double* %p, i32 %q, double %x) { +entry: +;CHECK: shl.b32 r0, r2, 3; +;CHECK-NEXT: add.u32 r0, r1, r0; +;CHECK-NEXT: st.global.f64 [r0], fd1; +;CHECK-NEXT: ret; + %i = getelementptr double* %p, i32 %q + store double %x, double* %i + ret void +} + +define ptx_device void @t4_global_u16(i16 %x) { +entry: +;CHECK: st.global.u16 [array_i16], rh1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i16]* @array_i16, i16 0, i16 0 + store i16 %x, i16* %i + ret void +} + +define ptx_device void @t4_global_u32(i32 %x) { +entry: +;CHECK: st.global.u32 [array_i32], r1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 0 + store i32 %x, i32* %i + ret void +} + +define ptx_device void @t4_global_u64(i64 %x) { +entry: +;CHECK: st.global.u64 [array_i64], rd1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 0 + store i64 %x, i64* %i + ret void +} + +define ptx_device void @t4_global_f32(float %x) { +entry: +;CHECK: st.global.f32 [array_float], f1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x float]* @array_float, i32 0, i32 0 + store float %x, float* %i + ret void +} + +define ptx_device void @t4_global_f64(double %x) { +entry: +;CHECK: st.global.f64 [array_double], fd1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x double]* @array_double, i32 0, i32 0 + store double %x, double* %i + ret void +} + +define ptx_device void @t4_local_u16(i16 %x) { +entry: +;CHECK: st.local.u16 [array_local_i16], rh1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i16] addrspace(2)* @array_local_i16, i32 0, i32 0 + store i16 %x, i16 addrspace(2)* %i + ret void +} + +define ptx_device void @t4_local_u32(i32 %x) { +entry: +;CHECK: st.local.u32 [array_local_i32], r1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i32] addrspace(2)* @array_local_i32, i32 0, i32 0 + store i32 %x, i32 addrspace(2)* %i + ret void +} + +define ptx_device void @t4_local_u64(i64 %x) { +entry: +;CHECK: st.local.u64 [array_local_i64], rd1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i64] addrspace(2)* @array_local_i64, i32 0, i32 0 + store i64 %x, i64 addrspace(2)* %i + ret void +} + +define ptx_device void @t4_local_f32(float %x) { +entry: +;CHECK: st.local.f32 [array_local_float], f1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x float] addrspace(2)* @array_local_float, i32 0, i32 0 + store float %x, float addrspace(2)* %i + ret void +} + +define ptx_device void @t4_local_f64(double %x) { +entry: +;CHECK: st.local.f64 [array_local_double], fd1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x double] addrspace(2)* @array_local_double, i32 0, i32 0 + store double %x, double addrspace(2)* %i + ret void +} + +define ptx_device void @t4_shared_u16(i16 %x) { +entry: +;CHECK: st.shared.u16 [array_shared_i16], rh1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i16] addrspace(4)* @array_shared_i16, i32 0, i32 0 + store i16 %x, i16 addrspace(4)* %i + ret void +} + +define ptx_device void @t4_shared_u32(i32 %x) { +entry: +;CHECK: st.shared.u32 [array_shared_i32], r1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i32] addrspace(4)* @array_shared_i32, i32 0, i32 0 + store i32 %x, i32 addrspace(4)* %i + ret void +} + +define ptx_device void @t4_shared_u64(i64 %x) { +entry: +;CHECK: st.shared.u64 [array_shared_i64], rd1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i64] addrspace(4)* @array_shared_i64, i32 0, i32 0 + store i64 %x, i64 addrspace(4)* %i + ret void +} + +define ptx_device void @t4_shared_f32(float %x) { +entry: +;CHECK: st.shared.f32 [array_shared_float], f1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x float] addrspace(4)* @array_shared_float, i32 0, i32 0 + store float %x, float addrspace(4)* %i + ret void +} + +define ptx_device void @t4_shared_f64(double %x) { +entry: +;CHECK: st.shared.f64 [array_shared_double], fd1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x double] addrspace(4)* @array_shared_double, i32 0, i32 0 + store double %x, double addrspace(4)* %i + ret void +} + +define ptx_device void @t5_u16(i16 %x) { +entry: +;CHECK: st.global.u16 [array_i16+2], rh1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i16]* @array_i16, i32 0, i32 1 + store i16 %x, i16* %i + ret void +} + +define ptx_device void @t5_u32(i32 %x) { +entry: +;CHECK: st.global.u32 [array_i32+4], r1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 1 + store i32 %x, i32* %i + ret void +} + +define ptx_device void @t5_u64(i64 %x) { +entry: +;CHECK: st.global.u64 [array_i64+8], rd1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 1 + store i64 %x, i64* %i + ret void +} + +define ptx_device void @t5_f32(float %x) { +entry: +;CHECK: st.global.f32 [array_float+4], f1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x float]* @array_float, i32 0, i32 1 + store float %x, float* %i + ret void +} + +define ptx_device void @t5_f64(double %x) { +entry: +;CHECK: st.global.f64 [array_double+8], fd1; +;CHECK-NEXT: ret; + %i = getelementptr [10 x double]* @array_double, i32 0, i32 1 + store double %x, double* %i + ret void +} diff --git a/test/CodeGen/PTX/sub.ll b/test/CodeGen/PTX/sub.ll new file mode 100644 index 0000000..4810e4f --- /dev/null +++ b/test/CodeGen/PTX/sub.ll @@ -0,0 +1,71 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i16 @t1_u16(i16 %x, i16 %y) { +; CHECK: sub.u16 rh0, rh1, rh2; +; CHECK-NEXT: ret; + %z = sub i16 %x, %y + ret i16 %z +} + +define ptx_device i32 @t1_u32(i32 %x, i32 %y) { +; CHECK: sub.u32 r0, r1, r2; +; CHECK-NEXT: ret; + %z = sub i32 %x, %y + ret i32 %z +} + +define ptx_device i64 @t1_u64(i64 %x, i64 %y) { +; CHECK: sub.u64 rd0, rd1, rd2; +; CHECK-NEXT: ret; + %z = sub i64 %x, %y + ret i64 %z +} + +define ptx_device float @t1_f32(float %x, float %y) { +; CHECK: sub.f32 f0, f1, f2 +; CHECK-NEXT: ret; + %z = fsub float %x, %y + ret float %z +} + +define ptx_device double @t1_f64(double %x, double %y) { +; CHECK: sub.f64 fd0, fd1, fd2 +; CHECK-NEXT: ret; + %z = fsub double %x, %y + ret double %z +} + +define ptx_device i16 @t2_u16(i16 %x) { +; CHECK: add.u16 rh0, rh1, -1; +; CHECK-NEXT: ret; + %z = sub i16 %x, 1 + ret i16 %z +} + +define ptx_device i32 @t2_u32(i32 %x) { +; CHECK: add.u32 r0, r1, -1; +; CHECK-NEXT: ret; + %z = sub i32 %x, 1 + ret i32 %z +} + +define ptx_device i64 @t2_u64(i64 %x) { +; CHECK: add.u64 rd0, rd1, -1; +; CHECK-NEXT: ret; + %z = sub i64 %x, 1 + ret i64 %z +} + +define ptx_device float @t2_f32(float %x) { +; CHECK: add.f32 f0, f1, 0FBF800000; +; CHECK-NEXT: ret; + %z = fsub float %x, 1.0 + ret float %z +} + +define ptx_device double @t2_f64(double %x) { +; CHECK: add.f64 fd0, fd1, 0DBFF0000000000000; +; CHECK-NEXT: ret; + %z = fsub double %x, 1.0 + ret double %z +} diff --git a/test/CodeGen/PowerPC/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/PowerPC/2010-04-07-DbgValueOtherTargets.ll index f48f32f..4a85098 100644 --- a/test/CodeGen/PowerPC/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/PowerPC/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=ppc32 -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll b/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll new file mode 100644 index 0000000..bf3d577 --- /dev/null +++ b/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll @@ -0,0 +1,22 @@ +; RUN: llc -disable-fp-elim < %s | FileCheck %s +; PR8749 +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32" +target triple = "powerpc-apple-darwin9.8" + +define i32 @main() nounwind { +entry: +; Make sure we're generating references using the red zone +; CHECK: main: +; CHECK: stw r3, -12(r1) + %retval = alloca i32 + %0 = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + store i32 0, i32* %0, align 4 + %1 = load i32* %0, align 4 + store i32 %1, i32* %retval, align 4 + br label %return + +return: ; preds = %entry + %retval1 = load i32* %retval + ret i32 %retval1 +} diff --git a/test/CodeGen/SPARC/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/SPARC/2010-04-07-DbgValueOtherTargets.ll index f66ee21..3b64498 100644 --- a/test/CodeGen/SPARC/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/SPARC/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=sparc -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/SPARC/2011-01-11-CC.ll b/test/CodeGen/SPARC/2011-01-11-CC.ll new file mode 100755 index 0000000..3ceda95 --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-11-CC.ll @@ -0,0 +1,105 @@ +; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8 +; RUN: llc -march=sparc -mattr=v9 <%s | FileCheck %s -check-prefix=V9 + + +define i32 @test_addx(i64 %a, i64 %b, i64 %c) nounwind readnone noinline { +entry: +; V8: addcc +; V8-NOT: subcc +; V8: addx +; V9: addcc +; V9-NOT: subcc +; V9: addx +; V9: mov{{e|ne}} %icc + %0 = add i64 %a, %b + %1 = icmp ugt i64 %0, %c + %2 = zext i1 %1 to i32 + ret i32 %2 +} + + +define i32 @test_select_int_icc(i32 %a, i32 %b, i32 %c) nounwind readnone noinline { +entry: +; V8: test_select_int_icc +; V8: subcc +; V8: {{be|bne}} +; V9: test_select_int_icc +; V9: subcc +; V9-NOT: {{be|bne}} +; V9: mov{{e|ne}} %icc + %0 = icmp eq i32 %a, 0 + %1 = select i1 %0, i32 %b, i32 %c + ret i32 %1 +} + + +define float @test_select_fp_icc(i32 %a, float %f1, float %f2) nounwind readnone noinline { +entry: +; V8: test_select_fp_icc +; V8: subcc +; V8: {{be|bne}} +; V9: test_select_fp_icc +; V9: subcc +; V9-NOT: {{be|bne}} +; V9: fmovs{{e|ne}} %icc + %0 = icmp eq i32 %a, 0 + %1 = select i1 %0, float %f1, float %f2 + ret float %1 +} + +define double @test_select_dfp_icc(i32 %a, double %f1, double %f2) nounwind readnone noinline { +entry: +; V8: test_select_dfp_icc +; V8: subcc +; V8: {{be|bne}} +; V9: test_select_dfp_icc +; V9: subcc +; V9=NOT: {{be|bne}} +; V9: fmovd{{e|ne}} %icc + %0 = icmp eq i32 %a, 0 + %1 = select i1 %0, double %f1, double %f2 + ret double %1 +} + +define i32 @test_select_int_fcc(float %f, i32 %a, i32 %b) nounwind readnone noinline { +entry: +;V8: test_select_int_fcc +;V8: fcmps +;V8: {{fbe|fbne}} +;V9: test_select_int_fcc +;V9: fcmps +;V9-NOT: {{fbe|fbne}} +;V9: mov{{e|ne}} %fcc0 + %0 = fcmp une float %f, 0.000000e+00 + %a.b = select i1 %0, i32 %a, i32 %b + ret i32 %a.b +} + + +define float @test_select_fp_fcc(float %f, float %f1, float %f2) nounwind readnone noinline { +entry: +;V8: test_select_fp_fcc +;V8: fcmps +;V8: {{fbe|fbne}} +;V9: test_select_fp_fcc +;V9: fcmps +;V9-NOT: {{fbe|fbne}} +;V9: fmovs{{e|ne}} %fcc0 + %0 = fcmp une float %f, 0.000000e+00 + %1 = select i1 %0, float %f1, float %f2 + ret float %1 +} + +define double @test_select_dfp_fcc(double %f, double %f1, double %f2) nounwind readnone noinline { +entry: +;V8: test_select_dfp_fcc +;V8: fcmpd +;V8: {{fbne|fbe}} +;V9: test_select_dfp_fcc +;V9: fcmpd +;V9-NOT: {{fbne|fbe}} +;V9: fmovd{{e|ne}} %fcc0 + %0 = fcmp une double %f, 0.000000e+00 + %1 = select i1 %0, double %f1, double %f2 + ret double %1 +} diff --git a/test/CodeGen/SPARC/2011-01-11-Call.ll b/test/CodeGen/SPARC/2011-01-11-Call.ll new file mode 100644 index 0000000..7350e92 --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-11-Call.ll @@ -0,0 +1,13 @@ +; RUN: llc -march=sparc -O0 <%s + +define void @test() nounwind { +entry: + %0 = tail call i32 (...)* @foo() nounwind + tail call void (...)* @bar() nounwind + ret void +} + +declare i32 @foo(...) + +declare void @bar(...) + diff --git a/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll b/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll new file mode 100644 index 0000000..fbf7242 --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll @@ -0,0 +1,64 @@ +;RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8 +;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9 + +define i8* @frameaddr() nounwind readnone { +entry: +;V8: frameaddr +;V8: or %g0, %fp, {{.+}} + +;V9: frameaddr +;V9: or %g0, %fp, {{.+}} + %0 = tail call i8* @llvm.frameaddress(i32 0) + ret i8* %0 +} + +define i8* @frameaddr2() nounwind readnone { +entry: +;V8: frameaddr2 +;V8: ta 3 +;V8: ld [%fp+56], {{.+}} +;V8: ld [{{.+}}+56], {{.+}} +;V8: ld [{{.+}}+56], {{.+}} + +;V9: frameaddr2 +;V9: flushw +;V9: ld [%fp+56], {{.+}} +;V9: ld [{{.+}}+56], {{.+}} +;V9: ld [{{.+}}+56], {{.+}} + %0 = tail call i8* @llvm.frameaddress(i32 3) + ret i8* %0 +} + +declare i8* @llvm.frameaddress(i32) nounwind readnone + + + +define i8* @retaddr() nounwind readnone { +entry: +;V8: retaddr +;V8: or %g0, %i7, {{.+}} + +;V9: retaddr +;V9: or %g0, %i7, {{.+}} + %0 = tail call i8* @llvm.returnaddress(i32 0) + ret i8* %0 +} + +define i8* @retaddr2() nounwind readnone { +entry: +;V8: retaddr2 +;V8: ta 3 +;V8: ld [%fp+56], {{.+}} +;V8: ld [{{.+}}+56], {{.+}} +;V8: ld [{{.+}}+60], {{.+}} + +;V9: retaddr2 +;V9: flushw +;V9: ld [%fp+56], {{.+}} +;V9: ld [{{.+}}+56], {{.+}} +;V9: ld [{{.+}}+60], {{.+}} + %0 = tail call i8* @llvm.returnaddress(i32 3) + ret i8* %0 +} + +declare i8* @llvm.returnaddress(i32) nounwind readnone diff --git a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll new file mode 100644 index 0000000..71fdb4e --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll @@ -0,0 +1,90 @@ +;RUN: llc -march=sparc < %s | FileCheck %s +;RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=UNOPT + + +define i32 @test(i32 %a) nounwind { +entry: +; CHECK: test +; CHECK: call bar +; CHECK-NOT: nop +; CHECK: jmp +; CHECK-NEXT: restore + %0 = tail call i32 @bar(i32 %a) nounwind + ret i32 %0 +} + +define i32 @test_jmpl(i32 (i32, i32)* nocapture %f, i32 %a, i32 %b) nounwind { +entry: +; CHECK: test_jmpl +; CHECK: call +; CHECK-NOT: nop +; CHECK: jmp +; CHECK-NEXT: restore + %0 = tail call i32 %f(i32 %a, i32 %b) nounwind + ret i32 %0 +} + +define i32 @test_loop(i32 %a, i32 %b) nounwind readnone { +; CHECK: test_loop +entry: + %0 = icmp sgt i32 %b, 0 + br i1 %0, label %bb, label %bb5 + +bb: ; preds = %entry, %bb + %a_addr.18 = phi i32 [ %a_addr.0, %bb ], [ %a, %entry ] + %1 = phi i32 [ %3, %bb ], [ 0, %entry ] + %tmp9 = mul i32 %1, %b + %2 = and i32 %1, 1 + %tmp = xor i32 %2, 1 + %.pn = shl i32 %tmp9, %tmp + %a_addr.0 = add i32 %.pn, %a_addr.18 + %3 = add nsw i32 %1, 1 + %exitcond = icmp eq i32 %3, %b +;CHECK: subcc +;CHECK: bne +;CHECK-NOT: nop + br i1 %exitcond, label %bb5, label %bb + +bb5: ; preds = %bb, %entry + %a_addr.1.lcssa = phi i32 [ %a, %entry ], [ %a_addr.0, %bb ] +;CHECK: jmp +;CHECK-NEXT: restore + ret i32 %a_addr.1.lcssa +} + +define i32 @test_inlineasm(i32 %a) nounwind { +entry: +;CHECK: test_inlineasm +;CHECK: sethi +;CHECK: !NO_APP +;CHECK-NEXT: subcc +;CHECK-NEXT: bg +;CHECK-NEXT: nop + tail call void asm sideeffect "sethi 0, %g0", ""() nounwind + %0 = icmp slt i32 %a, 0 + br i1 %0, label %bb, label %bb1 + +bb: ; preds = %entry + %1 = tail call i32 (...)* @foo(i32 %a) nounwind + ret i32 %1 + +bb1: ; preds = %entry + %2 = tail call i32 @bar(i32 %a) nounwind + ret i32 %2 +} + +declare i32 @foo(...) + +declare i32 @bar(i32) + + +define i32 @test_implicit_def() nounwind { +entry: +;UNOPT: test_implicit_def +;UNOPT: call func +;UNOPT-NEXT: nop + %0 = tail call i32 @func(i32* undef) nounwind + ret i32 0 +} + +declare i32 @func(i32*) diff --git a/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll b/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll new file mode 100644 index 0000000..85c16e4 --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll @@ -0,0 +1,18 @@ +;RUN: llc -march=sparc < %s | FileCheck %s + +%struct.foo_t = type { i32, i32, i32 } + +@s = internal unnamed_addr global %struct.foo_t { i32 10, i32 20, i32 30 } + +define i32 @test() nounwind { +entry: +;CHECK: test +;CHECK: st +;CHECK: st +;CHECK: st +;CHECK: bar + %0 = tail call i32 @bar(%struct.foo_t* byval @s) nounwind + ret i32 %0 +} + +declare i32 @bar(%struct.foo_t* byval) diff --git a/test/CodeGen/SPARC/2011-01-22-SRet.ll b/test/CodeGen/SPARC/2011-01-22-SRet.ll new file mode 100644 index 0000000..506d3a8 --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-22-SRet.ll @@ -0,0 +1,37 @@ +;RUN: llc -march=sparc < %s | FileCheck %s + +%struct.foo_t = type { i32, i32, i32 } + +define weak void @make_foo(%struct.foo_t* noalias sret %agg.result, i32 %a, i32 %b, i32 %c) nounwind { +entry: +;CHECK: make_foo +;CHECK: ld [%fp+64], {{.+}} +;CHECK: or {{.+}}, {{.+}}, %i0 +;CHECK: jmp %i7+12 + %0 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 0 + store i32 %a, i32* %0, align 4 + %1 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 1 + store i32 %b, i32* %1, align 4 + %2 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 2 + store i32 %c, i32* %2, align 4 + ret void +} + +define i32 @test() nounwind { +entry: +;CHECK: test +;CHECK: st {{.+}}, [%sp+64] +;CHECK: make_foo +;CHECK: unimp 12 + %f = alloca %struct.foo_t, align 8 + call void @make_foo(%struct.foo_t* noalias sret %f, i32 10, i32 20, i32 30) nounwind + %0 = getelementptr inbounds %struct.foo_t* %f, i32 0, i32 0 + %1 = load i32* %0, align 8 + %2 = getelementptr inbounds %struct.foo_t* %f, i32 0, i32 1 + %3 = load i32* %2, align 4 + %4 = getelementptr inbounds %struct.foo_t* %f, i32 0, i32 2 + %5 = load i32* %4, align 8 + %6 = add nsw i32 %3, %1 + %7 = add nsw i32 %6, %5 + ret i32 %7 +} diff --git a/test/CodeGen/SPARC/basictest.ll b/test/CodeGen/SPARC/basictest.ll index 9c2c16a..4352e62 100644 --- a/test/CodeGen/SPARC/basictest.ll +++ b/test/CodeGen/SPARC/basictest.ll @@ -1,6 +1,26 @@ -; RUN: llc < %s -march=sparc +; RUN: llc < %s -march=sparc | FileCheck %s -define i32 @test(i32 %X) { +define i32 @test0(i32 %X) { %tmp.1 = add i32 %X, 1 ret i32 %tmp.1 +; CHECK: test0: +; CHECK: add %i0, 1, %i0 +} + + +;; xnor tests. +define i32 @test1(i32 %X, i32 %Y) { + %A = xor i32 %X, %Y + %B = xor i32 %A, -1 + ret i32 %B +; CHECK: test1: +; CHECK: xnor %i0, %i1, %i0 +} + +define i32 @test2(i32 %X, i32 %Y) { + %A = xor i32 %X, -1 + %B = xor i32 %A, %Y + ret i32 %B +; CHECK: test2: +; CHECK: xnor %i0, %i1, %i0 } diff --git a/test/CodeGen/SPARC/xnor.ll b/test/CodeGen/SPARC/xnor.ll deleted file mode 100644 index 6ff66bd..0000000 --- a/test/CodeGen/SPARC/xnor.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc < %s -march=sparc | \ -; RUN: grep xnor | count 2 - -define i32 @test1(i32 %X, i32 %Y) { - %A = xor i32 %X, %Y ; <i32> [#uses=1] - %B = xor i32 %A, -1 ; <i32> [#uses=1] - ret i32 %B -} - -define i32 @test2(i32 %X, i32 %Y) { - %A = xor i32 %X, -1 ; <i32> [#uses=1] - %B = xor i32 %A, %Y ; <i32> [#uses=1] - ret i32 %B -} - diff --git a/test/CodeGen/SystemZ/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/SystemZ/2010-04-07-DbgValueOtherTargets.ll index 610aa40..c2877ac 100644 --- a/test/CodeGen/SystemZ/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/SystemZ/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=systemz -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/Thumb/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/Thumb/2010-04-07-DbgValueOtherTargets.ll index 6b6c14f..b903977 100644 --- a/test/CodeGen/Thumb/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/Thumb/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=thumb -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/Thumb/2011-EpilogueBug.ll b/test/CodeGen/Thumb/2011-EpilogueBug.ll new file mode 100644 index 0000000..16789e6 --- /dev/null +++ b/test/CodeGen/Thumb/2011-EpilogueBug.ll @@ -0,0 +1,17 @@ +; RUN: llc -mtriple=thumbv6-apple-darwin < %s | FileCheck %s +; r8869722 + +%struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } +%struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } + +define void @t1(%struct.state* %v) { +; CHECK: push {r4 + %tmp6 = load i32* null + %tmp8 = alloca float, i32 %tmp6 + store i32 1, i32* null + br label %return + +return: ; preds = %0 +; CHECK: mov sp, r4 + ret void +} diff --git a/test/CodeGen/Thumb/dyn-stackalloc.ll b/test/CodeGen/Thumb/dyn-stackalloc.ll index 5c8ad97..1f31dca 100644 --- a/test/CodeGen/Thumb/dyn-stackalloc.ll +++ b/test/CodeGen/Thumb/dyn-stackalloc.ll @@ -1,12 +1,15 @@ -; RUN: llc < %s -march=thumb | not grep {ldr sp} -; RUN: llc < %s -mtriple=thumb-apple-darwin | \ -; RUN: not grep {sub.*r7} -; RUN: llc < %s -march=thumb | grep {mov.*r6, sp} +; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } define void @t1(%struct.state* %v) { +; CHECK: t1: +; CHECK: push +; CHECK: add r7, sp, #12 +; CHECK: mov r2, sp +; CHECK: subs r4, r2, r1 +; CHECK: mov sp, r4 %tmp6 = load i32* null %tmp8 = alloca float, i32 %tmp6 store i32 1, i32* null @@ -34,6 +37,18 @@ declare fastcc void @f2(float*, float*, float*, i32) @str215 = external global [2 x i8] define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) { +; CHECK: t2: +; CHECK: push +; CHECK: add r7, sp, #12 +; CHECK: sub sp, #8 +; CHECK: mov r6, sp +; CHECK: str r2, [r6, #4] +; CHECK: str r0, [r6] +; CHECK-NOT: ldr r0, [sp +; CHECK: ldr r0, [r6, #4] +; CHECK: mov r0, sp +; CHECK: subs r5, r0, r1 +; CHECK: mov sp, r5 %tmp1 = call i32 @strlen( i8* %tag ) %tmp3 = call i32 @strlen( i8* %contents ) %tmp4 = add i32 %tmp1, 2 diff --git a/test/CodeGen/Thumb/large-stack.ll b/test/CodeGen/Thumb/large-stack.ll index b289484..fbacaba 100644 --- a/test/CodeGen/Thumb/large-stack.ll +++ b/test/CodeGen/Thumb/large-stack.ll @@ -10,22 +10,22 @@ define void @test1() { define void @test2() { ; CHECK: test2: -; CHECK: ldr r0, LCPI +; CHECK: ldr.n r0, LCPI ; CHECK: add sp, r0 -; CHECK: mov sp, r7 -; CHECK: sub sp, #4 +; CHECK: subs r4, r7, #4 +; CHECK: mov sp, r4 %tmp = alloca [ 4168 x i8 ] , align 4 ret void } define i32 @test3() { ; CHECK: test3: -; CHECK: ldr r2, LCPI +; CHECK: ldr.n r2, LCPI ; CHECK: add sp, r2 -; CHECK: ldr r1, LCPI +; CHECK: ldr.n r1, LCPI ; CHECK: add r1, sp -; CHECK: mov sp, r7 -; CHECK: sub sp, #4 +; CHECK: subs r4, r7, #4 +; CHECK: mov sp, r4 %retval = alloca i32, align 4 %tmp = alloca i32, align 4 %a = alloca [805306369 x i8], align 16 diff --git a/test/CodeGen/Thumb/long.ll b/test/CodeGen/Thumb/long.ll index e3ef44a..197e19e 100644 --- a/test/CodeGen/Thumb/long.ll +++ b/test/CodeGen/Thumb/long.ll @@ -4,7 +4,7 @@ ; RUN: grep adc | count 1 ; RUN: llc < %s -march=thumb | \ ; RUN: grep sbc | count 1 -; RUN: llc < %s -march=thumb | grep __muldi3 +; RUN: llc < %s -mtriple=thumb-apple-darwin | grep __muldi3 define i64 @f1() { entry: diff --git a/test/CodeGen/Thumb/select.ll b/test/CodeGen/Thumb/select.ll index 7a183b0..780e5fa 100644 --- a/test/CodeGen/Thumb/select.ll +++ b/test/CodeGen/Thumb/select.ll @@ -4,7 +4,7 @@ ; RUN: llc < %s -march=thumb | grep ble | count 1 ; RUN: llc < %s -march=thumb | grep bls | count 1 ; RUN: llc < %s -march=thumb | grep bhi | count 1 -; RUN: llc < %s -march=thumb | grep __ltdf2 +; RUN: llc < %s -mtriple=thumb-apple-darwin | grep __ltdf2 define i32 @f1(i32 %a.s) { entry: diff --git a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll index f26c6d1..550b3ef 100644 --- a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll +++ b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll @@ -5,8 +5,13 @@ define hidden i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind { entry: ; CHECK: __gcov_execlp: -; CHECK: mov sp, r7 -; CHECK: sub sp, #4 +; CHECK: sub sp, #8 +; CHECK: push +; CHECK: add r7, sp, #4 +; CHECK: subs r4, r7, #4 +; CHECK: mov sp, r4 +; CHECK-NOT: mov sp, r7 +; CHECK: add sp, #8 call void @__gcov_flush() nounwind br i1 undef, label %bb5, label %bb diff --git a/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll b/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll index 7ee1986..458569e 100644 --- a/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll +++ b/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll @@ -1,4 +1,7 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 \ +; RUN: -pre-RA-sched=source | FileCheck -check-prefix=SOURCE %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 \ +; RUN: -pre-RA-sched=list-hybrid | FileCheck -check-prefix=HYBRID %s ; Radar 7459078 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" @@ -10,9 +13,11 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32- %s5 = type { i32 } ; Make sure the cmp is not scheduled before the InlineAsm that clobbers cc. -; CHECK: InlineAsm End -; CHECK: cmp -; CHECK: beq +; SOURCE: InlineAsm End +; SOURCE: cmp +; SOURCE: beq +; HYBRID: InlineAsm End +; HYBRID: cbz define void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind { entry: %tmp1 = getelementptr inbounds %s1* %this, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0 diff --git a/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll b/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll index abcf13a..41f7f29 100644 --- a/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll +++ b/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll @@ -5,6 +5,10 @@ define internal fastcc i32 @Callee(i32 %i) nounwind { entry: ; CHECK: Callee: +; CHECK: push +; CHECK: mov r4, sp +; CHECK: sub.w r12, r4, #1000 +; CHECK: mov sp, r12 %0 = icmp eq i32 %i, 0 ; <i1> [#uses=1] br i1 %0, label %bb2, label %bb @@ -17,9 +21,11 @@ bb: ; preds = %entry ret i32 %4 bb2: ; preds = %entry -; Must restore sp from fp here -; CHECK: mov sp, r7 -; CHECK: sub sp, #8 +; Must restore sp from fp here. Make sure not to leave sp in a temporarily invalid +; state though. rdar://8465407 +; CHECK-NOT: mov sp, r7 +; CHECK: sub.w r4, r7, #8 +; CHECK: mov sp, r4 ; CHECK: pop ret i32 0 } diff --git a/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll b/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll new file mode 100644 index 0000000..313728c --- /dev/null +++ b/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll @@ -0,0 +1,34 @@ +; rdar://8465407 +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s + +%struct.buf = type opaque + +declare void @bar() nounwind optsize + +define void @foo() nounwind optsize { +; CHECK: foo: +; CHECK: push +; CHECK: add r7, sp, #4 +; CHECK: sub sp, #4 +entry: + %m.i = alloca %struct.buf*, align 4 + br label %bb + +bb: + br i1 undef, label %bb3, label %bb2 + +bb2: + call void @bar() nounwind optsize + br i1 undef, label %bb, label %bb3 + +bb3: + br i1 undef, label %return, label %bb + +return: +; CHECK: %return +; 'mov sp, r7' would have left sp in an invalid state +; CHECK-NOT: mov sp, r7 +; CHECK-NOT: sub, sp, #4 +; CHECK: add sp, #4 + ret void +} diff --git a/test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll b/test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll new file mode 100644 index 0000000..5b91a5f --- /dev/null +++ b/test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s +; Radar 8724703: Make sure that a t2ADDrSPi instruction with SP as the +; destination register is narrowed to tADDspi instead of tADDrSPi. + +define void @test() nounwind { +entry: +; CHECK: sub.w +; CHECK: add.w + %Buffer.i = alloca [512 x i8], align 4 + ret void +} diff --git a/test/CodeGen/Thumb2/bfi.ll b/test/CodeGen/Thumb2/bfi.ll index 22473bb..6fb2fc8 100644 --- a/test/CodeGen/Thumb2/bfi.ll +++ b/test/CodeGen/Thumb2/bfi.ll @@ -38,3 +38,14 @@ entry: %or = or i32 %and2, %and ; <i32> [#uses=1] ret i32 %or } + +; rdar://8752056 +define i32 @f4(i32 %a) nounwind { +; CHECK: f4 +; CHECK: movw r1, #3137 +; CHECK: bfi r1, r0, #15, #5 + %1 = shl i32 %a, 15 + %ins7 = and i32 %1, 1015808 + %ins12 = or i32 %ins7, 3137 + ret i32 %ins12 +} diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll index c169fb3..b8c8cb1 100644 --- a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll +++ b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll @@ -15,9 +15,6 @@ bb.nph: ; preds = %bb5 ; Loop preheader ; CHECK: vmov.f32 -; CHECK: vsub.f32 -; CHECK: vadd.f32 -; CHECK: vmul.f32 bb7: ; preds = %bb9, %bb.nph %s1.02 = phi float [ undef, %bb.nph ], [ %35, %bb9 ] ; <float> [#uses=3] %tmp79 = add i32 undef, undef ; <i32> [#uses=1] @@ -73,8 +70,6 @@ bb8: ; preds = %bb8, %bb7 br i1 %34, label %bb8, label %bb9 bb9: ; preds = %bb8 -; CHECK: %bb9 -; CHECK: vmov.f32 %35 = fadd float 0.000000e+00, undef ; <float> [#uses=1] br label %bb7 } diff --git a/test/CodeGen/Thumb2/div.ll b/test/CodeGen/Thumb2/div.ll index e63a115..2c00c70 100644 --- a/test/CodeGen/Thumb2/div.ll +++ b/test/CodeGen/Thumb2/div.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 \ +; RUN: llc < %s -mtriple=thumb-apple-darwin -mattr=+thumb2 \ ; RUN: | FileCheck %s -check-prefix=CHECK-THUMB ; RUN: llc < %s -march=thumb -mcpu=cortex-m3 -mattr=+thumb2 \ ; RUN: | FileCheck %s -check-prefix=CHECK-THUMBV7M diff --git a/test/CodeGen/Thumb2/large-stack.ll b/test/CodeGen/Thumb2/large-stack.ll index 763d316..68b5d1c 100644 --- a/test/CodeGen/Thumb2/large-stack.ll +++ b/test/CodeGen/Thumb2/large-stack.ll @@ -27,7 +27,7 @@ define i32 @test3() { ; DARWIN: sub.w sp, sp, #805306368 ; DARWIN: sub sp, #20 ; LINUX: test3: -; LINUX: push {r4, r7, r11, lr} +; LINUX: push.w {r4, r7, r11, lr} ; LINUX: sub.w sp, sp, #805306368 ; LINUX: sub sp, #16 %retval = alloca i32, align 4 diff --git a/test/CodeGen/Thumb2/load-global.ll b/test/CodeGen/Thumb2/load-global.ll deleted file mode 100644 index 46e053c..0000000 --- a/test/CodeGen/Thumb2/load-global.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DYNAMIC -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC -; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LINUX - -@G = external global i32 - -define i32 @test1() { -; STATIC: _test1: -; STATIC: .long _G - -; DYNAMIC: _test1: -; DYNAMIC: .long L_G$non_lazy_ptr - -; PIC: _test1 -; PIC: add r0, pc -; PIC: .long L_G$non_lazy_ptr-(LPC0_0+4) - -; LINUX: test1 -; LINUX: .long G(GOT) - %tmp = load i32* @G - ret i32 %tmp -} diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll index 14d04a4..5e776dd 100644 --- a/test/CodeGen/Thumb2/machine-licm.ll +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -3,9 +3,6 @@ ; rdar://7353541 ; rdar://7354376 -; The generated code is no where near ideal. It's not recognizing the two -; constantpool entries being loaded can be merged into one. - @GV = external global i32 ; <i32*> [#uses=2] define void @t1(i32* nocapture %vals, i32 %c) nounwind { @@ -17,21 +14,21 @@ entry: bb.nph: ; preds = %entry ; CHECK: BB#1 -; CHECK: ldr.n r2, LCPI0_0 +; CHECK: movw r2, :lower16:L_GV$non_lazy_ptr +; CHECK: movt r2, :upper16:L_GV$non_lazy_ptr ; CHECK: ldr r2, [r2] ; CHECK: ldr r3, [r2] ; CHECK: LBB0_2 -; CHECK: LCPI0_0: -; CHECK-NOT: LCPI0_1: +; CHECK-NOT: LCPI0_0: ; PIC: BB#1 -; PIC: ldr.n r2, LCPI0_0 +; PIC: movw r2, :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4)) +; PIC: movt r2, :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4)) ; PIC: add r2, pc ; PIC: ldr r2, [r2] ; PIC: ldr r3, [r2] ; PIC: LBB0_2 -; PIC: LCPI0_0: -; PIC-NOT: LCPI0_1: +; PIC-NOT: LCPI0_0: ; PIC: .section %.pre = load i32* @GV, align 4 ; <i32> [#uses=1] br label %bb @@ -77,10 +74,49 @@ bb2: } ; CHECK-NOT: LCPI1_0: -; CHECK: .subsections_via_symbols declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwind readnone + +; rdar://8241368 +; isel should not fold immediate into eor's which would have prevented LICM. +define zeroext i16 @t3(i8 zeroext %data, i16 zeroext %crc) nounwind readnone { +; CHECK: t3: +bb.nph: +; CHECK: bb.nph +; CHECK: movw {{(r[0-9])|(lr)}}, #32768 +; CHECK: movs {{(r[0-9])|(lr)}}, #8 +; CHECK: movw [[REGISTER:(r[0-9])|(lr)]], #16386 +; CHECK: movw {{(r[0-9])|(lr)}}, #65534 +; CHECK: movt {{(r[0-9])|(lr)}}, #65535 + br label %bb + +bb: ; preds = %bb, %bb.nph +; CHECK: bb +; CHECK: eor.w {{(r[0-9])|(lr)}}, {{(r[0-9])|(lr)}}, [[REGISTER]] +; CHECK: eor.w +; CHECK-NOT: eor +; CHECK: and + %data_addr.013 = phi i8 [ %data, %bb.nph ], [ %8, %bb ] ; <i8> [#uses=2] + %crc_addr.112 = phi i16 [ %crc, %bb.nph ], [ %crc_addr.2, %bb ] ; <i16> [#uses=3] + %i.011 = phi i8 [ 0, %bb.nph ], [ %7, %bb ] ; <i8> [#uses=1] + %0 = trunc i16 %crc_addr.112 to i8 ; <i8> [#uses=1] + %1 = xor i8 %data_addr.013, %0 ; <i8> [#uses=1] + %2 = and i8 %1, 1 ; <i8> [#uses=1] + %3 = icmp eq i8 %2, 0 ; <i1> [#uses=2] + %4 = xor i16 %crc_addr.112, 16386 ; <i16> [#uses=1] + %crc_addr.0 = select i1 %3, i16 %crc_addr.112, i16 %4 ; <i16> [#uses=1] + %5 = lshr i16 %crc_addr.0, 1 ; <i16> [#uses=2] + %6 = or i16 %5, -32768 ; <i16> [#uses=1] + %crc_addr.2 = select i1 %3, i16 %5, i16 %6 ; <i16> [#uses=2] + %7 = add i8 %i.011, 1 ; <i8> [#uses=2] + %8 = lshr i8 %data_addr.013, 1 ; <i8> [#uses=1] + %exitcond = icmp eq i8 %7, 8 ; <i1> [#uses=1] + br i1 %exitcond, label %bb8, label %bb + +bb8: ; preds = %bb + ret i16 %crc_addr.2 +} diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt3.ll b/test/CodeGen/Thumb2/thumb2-ifcvt3.ll index cc2ef14..bcf10ef 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt3.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt3.ll @@ -23,7 +23,6 @@ bb52: ; preds = %newFuncRoot ; CHECK: movne ; CHECK: moveq ; CHECK: pop -; CHECK-NEXT: @ BB#1: %0 = load i64* @posed, align 4 ; <i64> [#uses=3] %1 = sub i64 %0, %.reload78 ; <i64> [#uses=1] %2 = ashr i64 %1, 1 ; <i64> [#uses=3] diff --git a/test/CodeGen/Thumb2/thumb2-ldrd.ll b/test/CodeGen/Thumb2/thumb2-ldrd.ll index 22d4e88..a747d5f 100644 --- a/test/CodeGen/Thumb2/thumb2-ldrd.ll +++ b/test/CodeGen/Thumb2/thumb2-ldrd.ll @@ -4,7 +4,7 @@ define i64 @t(i64 %a) nounwind readonly { entry: -;CHECK: ldrd r2, [r2] +;CHECK: ldrd r2, r3, [r2] %0 = load i64** @b, align 4 %1 = load i64* %0, align 4 %2 = mul i64 %1, %a diff --git a/test/CodeGen/Thumb2/thumb2-mov.ll b/test/CodeGen/Thumb2/thumb2-mov.ll index 1dc3614..adb6dde 100644 --- a/test/CodeGen/Thumb2/thumb2-mov.ll +++ b/test/CodeGen/Thumb2/thumb2-mov.ll @@ -53,7 +53,7 @@ define i32 @t2_const_var2_2_ok_1(i32 %lhs) { define i32 @t2_const_var2_2_ok_2(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_2: -;CHECK: add.w r0, r0, #-1426063360 +;CHECK: add.w r0, r0, #2868903936 ;CHECK: add.w r0, r0, #47616 %ret = add i32 %lhs, 2868951552 ; 0xab00ba00 ret i32 %ret @@ -61,7 +61,7 @@ define i32 @t2_const_var2_2_ok_2(i32 %lhs) { define i32 @t2_const_var2_2_ok_3(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_3: -;CHECK: add.w r0, r0, #-1426019584 +;CHECK: add.w r0, r0, #2868947712 ;CHECK: adds r0, #16 %ret = add i32 %lhs, 2868947728 ; 0xab00ab10 ret i32 %ret @@ -69,7 +69,7 @@ define i32 @t2_const_var2_2_ok_3(i32 %lhs) { define i32 @t2_const_var2_2_ok_4(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_4: -;CHECK: add.w r0, r0, #-1426019584 +;CHECK: add.w r0, r0, #2868947712 ;CHECK: add.w r0, r0, #1048592 %ret = add i32 %lhs, 2869996304 ; 0xab10ab10 ret i32 %ret diff --git a/test/CodeGen/Thumb2/thumb2-mul.ll b/test/CodeGen/Thumb2/thumb2-mul.ll index b1515b5..8d1de55b 100644 --- a/test/CodeGen/Thumb2/thumb2-mul.ll +++ b/test/CodeGen/Thumb2/thumb2-mul.ll @@ -6,3 +6,21 @@ define i32 @f1(i32 %a, i32 %b, i32 %c) { %tmp = mul i32 %a, %b ret i32 %tmp } + +%struct.CMPoint = type { %struct.Point, float, float, [5 x float] } +%struct.Point = type { float, float } + +define %struct.CMPoint* @t1(i32 %i, i32 %j, i32 %n, %struct.CMPoint* %thePoints) nounwind readnone ssp { +entry: +; CHECK: t1: +; CHECK: mla r0, r2, r0, r1 +; CHECK: add.w r0, r0, r0, lsl #3 +; CHECL: add.w r0, r3, r0, lsl #2 + %mul = mul i32 %n, %i + %add = add i32 %mul, %j + %0 = ptrtoint %struct.CMPoint* %thePoints to i32 + %mul5 = mul i32 %add, 36 + %add6 = add i32 %mul5, %0 + %1 = inttoptr i32 %add6 to %struct.CMPoint* + ret %struct.CMPoint* %1 +} diff --git a/test/CodeGen/Thumb2/thumb2-select_xform.ll b/test/CodeGen/Thumb2/thumb2-select_xform.ll index 56cb1f6..ceefabb 100644 --- a/test/CodeGen/Thumb2/thumb2-select_xform.ll +++ b/test/CodeGen/Thumb2/thumb2-select_xform.ll @@ -2,8 +2,8 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { ; CHECK: t1 -; CHECK: sub.w r0, r1, #-2147483648 -; CHECK: subs r0, #1 +; CHECK: mvn r0, #-2147483648 +; CHECK: add r0, r1 ; CHECK: cmp r2, #10 ; CHECK: it gt ; CHECK: movgt r0, r1 diff --git a/test/CodeGen/Thumb2/thumb2-spill-q.ll b/test/CodeGen/Thumb2/thumb2-spill-q.ll index 0d73fba..d9a0617 100644 --- a/test/CodeGen/Thumb2/thumb2-spill-q.ll +++ b/test/CodeGen/Thumb2/thumb2-spill-q.ll @@ -15,7 +15,10 @@ define void @aaa(%quuz* %this, i8* %block) { ; CHECK: vst1.64 {{.*}}[{{.*}}, :128] ; CHECK: vld1.64 {{.*}}[{{.*}}, :128] entry: - %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] + %aligned_vec = alloca <4 x float>, align 16 + %"alloca point" = bitcast i32 0 to i32 + %vecptr = bitcast <4 x float>* %aligned_vec to i8* + %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %vecptr, i32 1) nounwind store float 6.300000e+01, float* undef, align 4 %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 0.000000e+00, float* undef, align 4 diff --git a/test/CodeGen/X86/2007-10-16-fp80_select.ll b/test/CodeGen/X86/2007-10-16-fp80_select.ll deleted file mode 100644 index 3f9845c..0000000 --- a/test/CodeGen/X86/2007-10-16-fp80_select.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: llc < %s -march=x86 -; ModuleID = 'bugpoint-reduced-simplified.bc' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i686-apple-darwin9" - %struct.wxPoint2DInt = type { i32, i32 } - -define x86_fp80 @_ZNK12wxPoint2DInt14GetVectorAngleEv(%struct.wxPoint2DInt* %this) { -entry: - br i1 false, label %cond_true, label %UnifiedReturnBlock - -cond_true: ; preds = %entry - %tmp8 = load i32* null, align 4 ; <i32> [#uses=1] - %tmp9 = icmp sgt i32 %tmp8, -1 ; <i1> [#uses=1] - %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 ; <x86_fp80> [#uses=1] - ret x86_fp80 %retval - -UnifiedReturnBlock: ; preds = %entry - ret x86_fp80 0xK4005B400000000000000 -} diff --git a/test/CodeGen/X86/2008-07-19-movups-spills.ll b/test/CodeGen/X86/2008-07-19-movups-spills.ll index 98919ee..cf04dcf 100644 --- a/test/CodeGen/X86/2008-07-19-movups-spills.ll +++ b/test/CodeGen/X86/2008-07-19-movups-spills.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75 -; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 1 +; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 75 ; PR2539 +; PR8969 - make 32-bit linux have a 16-byte aligned stack external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2] external global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1] diff --git a/test/CodeGen/X86/2008-09-17-inline-asm-1.ll b/test/CodeGen/X86/2008-09-17-inline-asm-1.ll index 3c64fe4..86e50c9 100644 --- a/test/CodeGen/X86/2008-09-17-inline-asm-1.ll +++ b/test/CodeGen/X86/2008-09-17-inline-asm-1.ll @@ -15,14 +15,16 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" -@x = common global i32 0 ; <i32*> [#uses=1] +@x = common global i32 0 define i32 @aci(i32* %pw) nounwind { entry: - %0 = load i32* @x, align 4 ; <i32> [#uses=1] - %asmtmp = tail call { i32, i32 } asm "movl $0, %eax\0A\090:\0A\09test %eax, %eax\0A\09je 1f\0A\09movl %eax, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{ax},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind ; <{ i32, i32 }> [#uses=0] - %asmtmp2 = tail call { i32, i32 } asm "movl $0, %edx\0A\090:\0A\09test %edx, %edx\0A\09je 1f\0A\09movl %edx, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{dx},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind ; <{ i32, i32 }> [#uses=1] - %asmresult3 = extractvalue { i32, i32 } %asmtmp2, 0 ; <i32> [#uses=1] - %1 = add i32 %asmresult3, %0 ; <i32> [#uses=1] - ret i32 %1 + %0 = load i32* @x, align 4 + %asmtmp = tail call { i32, i32 } asm "movl $0, %eax\0A\090:\0A\09test %eax, %eax\0A\09je 1f\0A\09movl %eax, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{ax},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind + %asmtmp2 = tail call { i32, i32 } asm "movl $0, %edx\0A\090:\0A\09test %edx, %edx\0A\09je 1f\0A\09movl %edx, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{dx},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind + %asmresult2 = extractvalue { i32, i32 } %asmtmp, 0 + %asmresult3 = extractvalue { i32, i32 } %asmtmp2, 0 + %1 = add i32 %asmresult2, %asmresult3 + %2 = add i32 %0, %1 + ret i32 %2 } diff --git a/test/CodeGen/X86/2008-10-27-StackRealignment.ll b/test/CodeGen/X86/2008-10-27-StackRealignment.ll index 784bc72..3d0766c 100644 --- a/test/CodeGen/X86/2008-10-27-StackRealignment.ll +++ b/test/CodeGen/X86/2008-10-27-StackRealignment.ll @@ -1,8 +1,8 @@ ; Linux doesn't support stack realignment for functions with allocas (PR2888). ; Until it does, we shouldn't use movaps to access the stack. On targets with ; sufficiently aligned stack (e.g. darwin) we should. - -; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mcpu=yonah | not grep movaps +; PR8969 - make 32-bit linux have a 16-byte aligned stack +; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mcpu=yonah | grep movaps | count 2 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mcpu=yonah | grep movaps | count 2 diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll deleted file mode 100644 index 2e114ab..0000000 --- a/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985 | count 1 -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i686-pc-linux-gnu" - -define zeroext i16 @a(i16 zeroext %x) nounwind { -entry: - %div = udiv i16 %x, 33 ; <i32> [#uses=1] - ret i16 %div -} diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll deleted file mode 100644 index 7c811af..0000000 --- a/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985 -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i686-pc-linux-gnu" - -define signext i16 @a(i16 signext %x) nounwind { -entry: - %div = sdiv i16 %x, 33 ; <i32> [#uses=1] - ret i16 %div -} diff --git a/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll b/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll index 9c71469..4feb764 100644 --- a/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll +++ b/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx -enable-legalize-types-checking +; RUN: llc < %s -march=x86 -mattr=+sse2 -enable-legalize-types-checking declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone diff --git a/test/CodeGen/X86/2009-01-27-NullStrings.ll b/test/CodeGen/X86/2009-01-27-NullStrings.ll index 8684f4a..8b3094b 100644 --- a/test/CodeGen/X86/2009-01-27-NullStrings.ll +++ b/test/CodeGen/X86/2009-01-27-NullStrings.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s ; CHECK: .section __TEXT,__cstring,cstring_literals -@x = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] +@x = internal unnamed_addr constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] @y = global [1 x i8]* @x diff --git a/test/CodeGen/X86/2009-04-24.ll b/test/CodeGen/X86/2009-04-24.ll index 757042e..dd88235 100644 --- a/test/CodeGen/X86/2009-04-24.ll +++ b/test/CodeGen/X86/2009-04-24.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -relocation-model=pic > %t2 -; RUN: grep {leaq.*TLSGD.*__tls_get_addr} %t2 +; RUN: grep {leaq.*TLSGD} %t2 +; RUN; grep {__tls_get_addr} %t2 ; PR4004 @i = thread_local global i32 15 diff --git a/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll index c598228..98b1e0e 100644 --- a/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll +++ b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll @@ -1,9 +1,8 @@ -; RUN: llc < %s | grep "subq.*\\\$40, \\\%rsp" -target triple = "x86_64-pc-mingw64" +; RUN: llc -mtriple=x86_64-mingw32 < %s | FileCheck %s +; CHECK-NOT: -{{[1-9][0-9]*}}(%rsp) define x86_fp80 @a(i64 %x) nounwind readnone { entry: - %conv = sitofp i64 %x to x86_fp80 ; <x86_fp80> [#uses=1] - ret x86_fp80 %conv + %conv = sitofp i64 %x to x86_fp80 ; <x86_fp80> [#uses=1] + ret x86_fp80 %conv } - diff --git a/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll index 810a6f4..12bd285 100644 --- a/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll +++ b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll @@ -1,12 +1,10 @@ -; RUN: llc < %s -o %t1 -; RUN: grep "subq.*\\\$72, \\\%rsp" %t1 -; RUN: grep "movaps \\\%xmm8, 32\\\(\\\%rsp\\\)" %t1 -; RUN: grep "movaps \\\%xmm7, 48\\\(\\\%rsp\\\)" %t1 -target triple = "x86_64-pc-mingw64" +; RUN: llc -mtriple=x86_64-mingw32 < %s | FileCheck %s +; CHECK: subq $40, %rsp +; CHECK: movaps %xmm8, (%rsp) +; CHECK: movaps %xmm7, 16(%rsp) define i32 @a() nounwind { entry: - tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind - ret i32 undef + tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind + ret i32 undef } - diff --git a/test/CodeGen/X86/2009-07-07-SplitICmp.ll b/test/CodeGen/X86/2009-07-07-SplitICmp.ll index eb9378b..3669856 100644 --- a/test/CodeGen/X86/2009-07-07-SplitICmp.ll +++ b/test/CodeGen/X86/2009-07-07-SplitICmp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-mmx +; RUN: llc < %s -march=x86 define void @test2(<2 x i32> %A, <2 x i32> %B, <2 x i32>* %C) nounwind { %D = icmp sgt <2 x i32> %A, %B diff --git a/test/CodeGen/X86/2009-08-06-inlineasm.ll b/test/CodeGen/X86/2009-08-06-inlineasm.ll index de32c21..f9b5f9e 100644 --- a/test/CodeGen/X86/2009-08-06-inlineasm.ll +++ b/test/CodeGen/X86/2009-08-06-inlineasm.ll @@ -1,10 +1,12 @@ -; RUN: llc -mtriple=i386-pc-linux-gnu < %s +; RUN: false +; XRUN: llc -mtriple=i386-pc-linux-gnu < %s ; PR4668 ; XFAIL: * ; FIXME: If the coalescer happens to coalesce %level.1 with the copy to EAX ; (for ret) then this will fail to compile. The fundamental problem is ; once the coalescer fixes a virtual register to physical register we can't -; evict it. +; evict it. This started passing again due to the changes for PR8969 +; so I've disabled it with a bigger stick. define i32 @x(i32 %qscale) nounwind { entry: diff --git a/test/CodeGen/X86/2009-09-10-SpillComments.ll b/test/CodeGen/X86/2009-09-10-SpillComments.ll index f9ca861..adac203 100644 --- a/test/CodeGen/X86/2009-09-10-SpillComments.ll +++ b/test/CodeGen/X86/2009-09-10-SpillComments.ll @@ -2,9 +2,9 @@ ; This test shouldn't require spills. -; CHECK: subq $8, %rsp +; CHECK: pushq ; CHECK-NOT: $rsp -; CHECK: addq $8, %rsp +; CHECK: popq %struct..0anon = type { i32 } %struct.rtvec_def = type { i32, [1 x %struct..0anon] } diff --git a/test/DebugInfo/2009-10-16-Scope.ll b/test/CodeGen/X86/2009-10-16-Scope.ll index 037294f..86c2024 100644 --- a/test/DebugInfo/2009-10-16-Scope.ll +++ b/test/CodeGen/X86/2009-10-16-Scope.ll @@ -1,5 +1,4 @@ ; RUN: llc %s -O0 -o /dev/null -mtriple=x86_64-apple-darwin -; RUN: llc %s -O0 -o /dev/null -mtriple=arm-apple-darwin ; PR 5197 ; There is not any llvm instruction assocated with !5. The code generator ; should be able to handle this. diff --git a/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll b/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll index f7ba661..823e0ca 100644 --- a/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll +++ b/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll @@ -21,7 +21,7 @@ define void @leaf() nounwind { ; CHECK: leaf: ; CHECK-NOT: -8(%rsp) ; CHECK: leaq link_ptr@TLSGD -; CHECK: call __tls_get_addr@PLT +; CHECK: callq __tls_get_addr@PLT "file foo2.c, line 14, bb1": %p = alloca %test*, align 8 ; <%test**> [#uses=4] br label %"file foo2.c, line 14, bb2" diff --git a/test/CodeGen/X86/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/X86/2010-04-07-DbgValueOtherTargets.ll index 76cc1a4..42f19b3 100644 --- a/test/CodeGen/X86/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/X86/2010-04-07-DbgValueOtherTargets.ll @@ -2,33 +2,27 @@ ; RUN: llc -O0 -march=x86-64 -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} diff --git a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll index 13f72a9..60171eb 100644 --- a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll +++ b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll @@ -61,6 +61,6 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone ; CHECK-NEXT: .short 1 ; CHECK-NEXT: .byte 85 ; CHECK-NEXT: .quad Ltmp3 -; CHECK-NEXT: .quad Lfunc_end +; CHECK-NEXT: .quad Ltmp6 ; CHECK-NEXT: .short 1 ; CHECK-NEXT: .byte 83 diff --git a/test/CodeGen/X86/2010-05-28-Crash.ll b/test/CodeGen/X86/2010-05-28-Crash.ll index 80643d0..ad8546e 100644 --- a/test/CodeGen/X86/2010-05-28-Crash.ll +++ b/test/CodeGen/X86/2010-05-28-Crash.ll @@ -39,6 +39,6 @@ entry: !13 = metadata !{i32 7, i32 0, metadata !14, null} !14 = metadata !{i32 524299, metadata !8, i32 6, i32 0} ; [ DW_TAG_lexical_block ] -;CHECK: DEBUG_VALUE: bar:x <- EBX+0 -;CHECK-NEXT:Ltmp -;CHECK-NEXT: DEBUG_VALUE: foo:y <- 1+0 +;CHECK: DEBUG_VALUE: bar:x <- E +;CHECK: Ltmp +;CHECK: DEBUG_VALUE: foo:y <- 1+0 diff --git a/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll b/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll index c6421a2..6db3ce1 100644 --- a/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll +++ b/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll @@ -1,4 +1,4 @@ -; RUN: llc -O1 -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim < %s | FileCheck %s +; RUN: llc -O1 -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -disable-fp-elim < %s | FileCheck %s ; <rdar://problem/8124405> %struct.type = type { %struct.subtype*, i32, i8, i32, i8, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, [256 x i32], i32, [257 x i32], [257 x i32], i32*, i16*, i8*, i32, i32, i32, i32, i32, [256 x i8], [16 x i8], [256 x i8], [4096 x i8], [16 x i32], [18002 x i8], [18002 x i8], [6 x [258 x i8]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, i32*, i32* } @@ -21,9 +21,9 @@ bb: ; statement. It can be an ADD or LEA instruction, it's not important which one ; it is. ; -; CHECK: ## %bb -; CHECK-NEXT: addq $64036, %rdi -; CHECK: rep;stosl +; CHECK: # %bb +; CHECK: addq $64036, %rdi +; CHECK: rep;stosl %tmp5 = bitcast i32* %tmp4 to i8* call void @llvm.memset.p0i8.i64(i8* %tmp5, i8 0, i64 84, i32 4, i1 false) diff --git a/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll b/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll index 9b9d636..2ba12df 100644 --- a/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll +++ b/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll @@ -7,7 +7,7 @@ ; CHECK-NEXT: .byte 37 ## DW_AT_producer ; CHECK-NEXT: .byte 8 ## DW_FORM_string ; CHECK-NEXT: .byte 19 ## DW_AT_language -; CHECK-NEXT: .byte 11 ## DW_FORM_data1 +; CHECK-NEXT: .byte 5 ## DW_FORM_data2 ; CHECK-NEXT: .byte 3 ## DW_AT_name ; CHECK-NEXT: .byte 8 ## DW_FORM_string ; CHECK-NEXT: .byte 82 ## DW_AT_entry_pc diff --git a/test/CodeGen/X86/2010-07-02-asm-alignstack.ll b/test/CodeGen/X86/2010-07-02-asm-alignstack.ll index cb47d20..0bbb24f 100644 --- a/test/CodeGen/X86/2010-07-02-asm-alignstack.ll +++ b/test/CodeGen/X86/2010-07-02-asm-alignstack.ll @@ -3,7 +3,7 @@ define void @foo() nounwind ssp { entry: ; CHECK: foo -; CHECK: subq $8, %rsp +; CHECK: pushq ; CHECK: int $3 call void asm sideeffect alignstack "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind call void asm sideeffect alignstack ".file \22small.c\22", "~{dirflag},~{fpsr},~{flags}"() nounwind @@ -18,7 +18,7 @@ return: ; preds = %entry define void @bar() nounwind ssp { entry: ; CHECK: bar -; CHECK-NOT: subq $8, %rsp +; CHECK-NOT: pushq ; CHECK: int $3 call void asm sideeffect "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind call void asm sideeffect ".file \22small.c\22", "~{dirflag},~{fpsr},~{flags}"() nounwind diff --git a/test/DebugInfo/2010-08-04-StackVariable.ll b/test/CodeGen/X86/2010-08-04-StackVariable.ll index c35c3d3..edfd1b8 100644 --- a/test/DebugInfo/2010-08-04-StackVariable.ll +++ b/test/CodeGen/X86/2010-08-04-StackVariable.ll @@ -1,4 +1,3 @@ -; RUN: llc -O0 -mtriple=arm-apple-darwin < %s | grep DW_OP_fbreg ; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s | grep DW_OP_fbreg ; Use DW_OP_fbreg in variable's location expression if the variable is in a stack slot. diff --git a/test/DebugInfo/2010-09-16-EmptyFilename.ll b/test/CodeGen/X86/2010-09-16-EmptyFilename.ll index 66c1e88..bed8c8a 100644 --- a/test/DebugInfo/2010-09-16-EmptyFilename.ll +++ b/test/CodeGen/X86/2010-09-16-EmptyFilename.ll @@ -1,8 +1,6 @@ -; RUN: llc -O0 < %s - | FileCheck %s +; RUN: llc -O0 -mtriple=x86_64-apple-darwin10 < %s - | FileCheck %s ; Radar 8286101 -; CHECK: File size -; CHECK-NEXT: stdin -; CHECK-NEXT: Directory +; CHECK: .file 2 "<stdin>" define i32 @foo() nounwind ssp { entry: diff --git a/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll b/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll index cae81d0..73e996c 100644 --- a/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll +++ b/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll @@ -1,4 +1,4 @@ -; RUN: llc -verify-machineinstrs -cgp-critical-edge-splitting=0 -mcpu=i386 < %s +; RUN: llc -verify-machineinstrs -mcpu=i386 < %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" target triple = "i386-pc-linux-gnu" diff --git a/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll b/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll new file mode 100644 index 0000000..a1074b6 --- /dev/null +++ b/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=x86 | FileCheck %s +; Both values were being zero extended. +@u = external global i8 +@s = external global i8 +define i32 @foo(i1 %cond) { +; CHECK: @foo + %u_base = load i8* @u + %u_val = zext i8 %u_base to i32 +; CHECK: movzbl +; CHECK: movsbl + %s_base = load i8* @s + %s_val = sext i8 %s_base to i32 + %val = select i1 %cond, i32 %u_val, i32 %s_val + ret i32 %val +} diff --git a/test/CodeGen/X86/2010-12-02-MC-Set.ll b/test/CodeGen/X86/2010-12-02-MC-Set.ll new file mode 100644 index 0000000..3144678 --- /dev/null +++ b/test/CodeGen/X86/2010-12-02-MC-Set.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -disable-dot-loc -mtriple=x86_64-apple-darwin -O0 | FileCheck %s + + +define void @foo() nounwind ssp { +entry: + ret void, !dbg !5 +} + +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"e.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"e.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 120563)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{null} +!5 = metadata !{i32 5, i32 1, metadata !6, null} +!6 = metadata !{i32 589835, metadata !0, i32 3, i32 16, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] + +; CHECK: .subsections_via_symbols +; CHECK-NEXT: __debug_line +; CHECK-NEXT: Ltmp +; CHECK-NEXT: Ltmp{{[0-9]}} = (Ltmp diff --git a/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll b/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll new file mode 100644 index 0000000..b9cf65b --- /dev/null +++ b/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -enable-legalize-types-checking +; PR8582 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i686-pc-win32" + +define void @test() nounwind { + %i17 = icmp eq <4 x i8> undef, zeroinitializer + %cond = extractelement <4 x i1> %i17, i32 0 + %_comp = select i1 %cond, i8 0, i8 undef + %merge = insertelement <4 x i8> undef, i8 %_comp, i32 0 + %cond3 = extractelement <4 x i1> %i17, i32 1 + %_comp4 = select i1 %cond3, i8 0, i8 undef + %merge5 = insertelement <4 x i8> %merge, i8 %_comp4, i32 1 + %cond8 = extractelement <4 x i1> %i17, i32 2 + %_comp9 = select i1 %cond8, i8 0, i8 undef + %m387 = insertelement <4 x i8> %merge5, i8 %_comp9, i32 2 + store <4 x i8> %m387, <4 x i8>* undef + ret void +} diff --git a/test/CodeGen/X86/2011-01-10-DagCombineHang.ll b/test/CodeGen/X86/2011-01-10-DagCombineHang.ll new file mode 100644 index 0000000..bf438b8 --- /dev/null +++ b/test/CodeGen/X86/2011-01-10-DagCombineHang.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 +; This formerly got DagCombine into a loop, PR 8916. + +define i32 @foo(i64 %x, i64 %y, i64 %z, i32 %a, i32 %b) { +entry: + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + %t1 = shl i64 %x, 15 + %t2 = and i64 %t1, 4294934528 + %t3 = or i64 %t2, %y + %t4 = xor i64 %z, %t3 + %t5 = trunc i64 %t4 to i32 + %t6 = add i32 %a, %t5 + %t7 = add i32 %t6, %b + ret i32 %t7 +} diff --git a/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll b/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll new file mode 100644 index 0000000..973975b --- /dev/null +++ b/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll @@ -0,0 +1,103 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; Check debug info for variable z_s +;CHECK: .ascii "z_s" ## DW_AT_name +;CHECK-NEXT: .byte 0 +;CHECK-NEXT: ## DW_AT_decl_file +;CHECK-NEXT: ## DW_AT_decl_line +;CHECK-NEXT: ## DW_AT_type +;CHECK-NEXT: ## DW_AT_location + + +@.str1 = private unnamed_addr constant [14 x i8] c"m=%u, z_s=%d\0A\00" +@str = internal constant [21 x i8] c"Failing test vector:\00" + +define i64 @gcd(i64 %a, i64 %b) nounwind readnone optsize noinline ssp { +entry: + tail call void @llvm.dbg.value(metadata !{i64 %a}, i64 0, metadata !10), !dbg !18 + tail call void @llvm.dbg.value(metadata !{i64 %b}, i64 0, metadata !11), !dbg !19 + br label %while.body, !dbg !20 + +while.body: ; preds = %while.body, %entry + %b.addr.0 = phi i64 [ %b, %entry ], [ %rem, %while.body ] + %a.addr.0 = phi i64 [ %a, %entry ], [ %b.addr.0, %while.body ] + %rem = srem i64 %a.addr.0, %b.addr.0, !dbg !21 + %cmp = icmp eq i64 %rem, 0, !dbg !23 + br i1 %cmp, label %if.then, label %while.body, !dbg !23 + +if.then: ; preds = %while.body + tail call void @llvm.dbg.value(metadata !{i64 %rem}, i64 0, metadata !12), !dbg !21 + ret i64 %b.addr.0, !dbg !23 +} + +define i32 @main() nounwind optsize ssp { +entry: + %call = tail call i32 @rand() nounwind optsize, !dbg !24 + tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !14), !dbg !24 + %cmp = icmp ugt i32 %call, 21, !dbg !25 + br i1 %cmp, label %cond.true, label %cond.end, !dbg !25 + +cond.true: ; preds = %entry + %call1 = tail call i32 @rand() nounwind optsize, !dbg !25 + br label %cond.end, !dbg !25 + +cond.end: ; preds = %entry, %cond.true + %cond = phi i32 [ %call1, %cond.true ], [ %call, %entry ], !dbg !25 + tail call void @llvm.dbg.value(metadata !{i32 %cond}, i64 0, metadata !17), !dbg !25 + %conv = sext i32 %cond to i64, !dbg !26 + %conv5 = zext i32 %call to i64, !dbg !26 + %call6 = tail call i64 @gcd(i64 %conv, i64 %conv5) optsize, !dbg !26 + %cmp7 = icmp eq i64 %call6, 0 + br i1 %cmp7, label %return, label %if.then, !dbg !26 + +if.then: ; preds = %cond.end + %puts = tail call i32 @puts(i8* getelementptr inbounds ([21 x i8]* @str, i64 0, i64 0)) + %call12 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([14 x i8]* @.str1, i64 0, i64 0), i32 %call, i32 %cond) nounwind optsize, !dbg !26 + ret i32 1, !dbg !27 + +return: ; preds = %cond.end + ret i32 0, !dbg !27 +} + +declare i32 @rand() optsize + +declare i32 @printf(i8* nocapture, ...) nounwind optsize + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +declare i32 @puts(i8* nocapture) nounwind + +!llvm.dbg.sp = !{!0, !6} +!llvm.dbg.lv.gcd = !{!10, !11, !12} +!llvm.dbg.lv.main = !{!14, !17} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"gcd", metadata !"gcd", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i64 (i64, i64)* @gcd} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"rem_small.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"rem_small.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 124117)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"long int", null, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 25, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, i32 ()* @main} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!8 = metadata !{metadata !9} +!9 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!10 = metadata !{i32 590081, metadata !0, metadata !"a", metadata !1, i32 5, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!11 = metadata !{i32 590081, metadata !0, metadata !"b", metadata !1, i32 5, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!12 = metadata !{i32 590080, metadata !13, metadata !"c", metadata !1, i32 6, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!13 = metadata !{i32 589835, metadata !0, i32 5, i32 52, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!14 = metadata !{i32 590080, metadata !15, metadata !"m", metadata !1, i32 26, metadata !16, i32 0} ; [ DW_TAG_auto_variable ] +!15 = metadata !{i32 589835, metadata !6, i32 25, i32 12, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 589860, metadata !2, metadata !"unsigned int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!17 = metadata !{i32 590080, metadata !15, metadata !"z_s", metadata !1, i32 27, metadata !9, i32 0} ; [ DW_TAG_auto_variable ] +!18 = metadata !{i32 5, i32 41, metadata !0, null} +!19 = metadata !{i32 5, i32 49, metadata !0, null} +!20 = metadata !{i32 7, i32 5, metadata !13, null} +!21 = metadata !{i32 8, i32 9, metadata !22, null} +!22 = metadata !{i32 589835, metadata !13, i32 7, i32 14, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!23 = metadata !{i32 9, i32 9, metadata !22, null} +!24 = metadata !{i32 26, i32 38, metadata !15, null} +!25 = metadata !{i32 27, i32 38, metadata !15, null} +!26 = metadata !{i32 28, i32 9, metadata !15, null} +!27 = metadata !{i32 30, i32 1, metadata !15, null} diff --git a/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll b/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll new file mode 100644 index 0000000..cedd6a2 --- /dev/null +++ b/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll @@ -0,0 +1,14 @@ +; RUN: llc -O0 < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +declare i32 @foo() + +define i32 @bar() nounwind { +; CHECK: bar +; CHECK-NOT: pop.*ax + %call = call i32 @foo() + ret i32 %call +} + diff --git a/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll b/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll new file mode 100644 index 0000000..f982723 --- /dev/null +++ b/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll @@ -0,0 +1,50 @@ +; RUN: llc < %s -O2 -march=x86 -mtriple=i386-pc-linux-gnu -relocation-model=pic | FileCheck %s +; PR9237: Assertion in VirtRegRewriter.cpp, ResurrectConfirmedKill +; `KillOps[*SR] == KillOp && "invalid subreg kill flags"' + +%t = type { i32 } + +define i32 @foo(%t* %s) nounwind { +entry: + br label %if.then735 + +if.then735: + %call747 = call i32 undef(%t* %s, i8* null, i8* undef, i32 128, i8* undef, i32 516) nounwind + br i1 undef, label %if.then751, label %if.then758 + +if.then751: + unreachable + +if.then758: + %add761 = add i32 %call747, 4 + %add763 = add i32 %add761, %call747 + %add.ptr768 = getelementptr inbounds [516 x i8]* null, i32 0, i32 %add761 + br i1 undef, label %cond.false783, label %cond.true771 + +cond.true771: + %call782 = call i8* @__memmove_chk(i8* %add.ptr768, i8* undef, i32 %call747, i32 undef) + br label %cond.end791 + +; CHECK: calll __memmove_chk +cond.false783: + %call.i1035 = call i8* @__memmove_chk(i8* %add.ptr768, i8* undef, i32 %call747, i32 undef) nounwind + br label %cond.end791 + +cond.end791: + %conv801 = trunc i32 %call747 to i8 + %add.ptr822.sum = add i32 %call747, 3 + %arrayidx833 = getelementptr inbounds [516 x i8]* null, i32 0, i32 %add.ptr822.sum + store i8 %conv801, i8* %arrayidx833, align 1 + %cmp841 = icmp eq i8* undef, null + br i1 %cmp841, label %if.end849, label %if.then843 + +if.then843: + unreachable + +if.end849: + %call921 = call i32 undef(%t* %s, i8* undef, i8* undef, i32 %add763) nounwind + unreachable + +} + +declare i8* @__memmove_chk(i8*, i8*, i32, i32) nounwind diff --git a/test/CodeGen/X86/2011-02-23-UnfoldBug.ll b/test/CodeGen/X86/2011-02-23-UnfoldBug.ll new file mode 100644 index 0000000..900106a --- /dev/null +++ b/test/CodeGen/X86/2011-02-23-UnfoldBug.ll @@ -0,0 +1,42 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 +; rdar://9045024 +; PR9305 + +define void @calc_gb_rad_still_sse2_double() nounwind ssp { +entry: + br label %for.cond.outer + +for.cond.outer: ; preds = %if.end71, %entry + %theta.0.ph = phi <2 x double> [ undef, %entry ], [ %theta.1, %if.end71 ] + %mul.i97 = fmul <2 x double> %theta.0.ph, undef + %mul.i96 = fmul <2 x double> %mul.i97, fmul (<2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double> undef) + br i1 undef, label %for.body, label %for.end82 + +for.body: ; preds = %for.cond.outer + br i1 undef, label %for.body33.lr.ph, label %for.end + +for.body33.lr.ph: ; preds = %for.body + %dccf.2 = select i1 undef, <2 x double> %mul.i96, <2 x double> undef + unreachable + +for.end: ; preds = %for.body + %vecins.i94 = insertelement <2 x double> undef, double 0.000000e+00, i32 0 + %cmpsd.i = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %vecins.i94, <2 x double> <double 0x3FE984B204153B34, double 0x3FE984B204153B34>, i8 2) nounwind + tail call void (...)* @_mm_movemask_pd(<2 x double> %cmpsd.i) nounwind + br i1 undef, label %if.then67, label %if.end71 + +if.then67: ; preds = %for.end + %vecins.i91 = insertelement <2 x double> %vecins.i94, double undef, i32 0 + br label %if.end71 + +if.end71: ; preds = %if.then67, %for.end + %theta.1 = phi <2 x double> [ %vecins.i91, %if.then67 ], [ %theta.0.ph, %for.end ] + br label %for.cond.outer + +for.end82: ; preds = %for.cond.outer + ret void +} + +declare void @_mm_movemask_pd(...) + +declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone diff --git a/test/CodeGen/X86/2011-02-27-Fpextend.ll b/test/CodeGen/X86/2011-02-27-Fpextend.ll new file mode 100644 index 0000000..c12b956 --- /dev/null +++ b/test/CodeGen/X86/2011-02-27-Fpextend.ll @@ -0,0 +1,7 @@ +; RUN: llc -mtriple=x86_64-pc-linux < %s +; PR9309 + +define <4 x double> @f_fu(<4 x float>) nounwind { + %float2double.i = fpext <4 x float> %0 to <4 x double> + ret <4 x double> %float2double.i +} diff --git a/test/CodeGen/X86/2011-03-02-DAGCombiner.ll b/test/CodeGen/X86/2011-03-02-DAGCombiner.ll new file mode 100644 index 0000000..be58ced --- /dev/null +++ b/test/CodeGen/X86/2011-03-02-DAGCombiner.ll @@ -0,0 +1,51 @@ +; RUN: llc < %s -march=x86-64 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin11.0.0" + +%0 = type { i8, [3 x i8] } +%struct.anon = type { float, x86_fp80 } + +define i32 @main() nounwind ssp { +entry: + %retval = alloca i32, align 4 + %F = alloca %struct.anon, align 16 + %K = alloca %0, align 4 + store i32 0, i32* %retval + %0 = bitcast %0* %K to i32* + %1 = load i32* %0, align 4 + %2 = and i32 %1, -121 + %3 = or i32 %2, 32 + store i32 %3, i32* %0, align 4 + %4 = bitcast %0* %K to i32* + %5 = load i32* %4, align 4 + %6 = lshr i32 %5, 3 + %bf.clear = and i32 %6, 15 + %conv = sitofp i32 %bf.clear to float + %f = getelementptr inbounds %struct.anon* %F, i32 0, i32 0 + %tmp = load float* %f, align 4 + %sub = fsub float %tmp, %conv + store float %sub, float* %f, align 4 + %ld = getelementptr inbounds %struct.anon* %F, i32 0, i32 1 + %tmp1 = load x86_fp80* %ld, align 16 + %7 = bitcast %0* %K to i32* + %8 = load i32* %7, align 4 + %9 = lshr i32 %8, 7 + %bf.clear2 = and i32 %9, 1 + %conv3 = uitofp i32 %bf.clear2 to x86_fp80 + %sub4 = fsub x86_fp80 %conv3, %tmp1 + %conv5 = fptoui x86_fp80 %sub4 to i32 + %bf.value = and i32 %conv5, 1 + %10 = bitcast %0* %K to i32* + %11 = and i32 %bf.value, 1 + %12 = shl i32 %11, 7 + %13 = load i32* %10, align 4 + %14 = and i32 %13, -129 + %15 = or i32 %14, %12 + store i32 %15, i32* %10, align 4 + %call = call i32 (...)* @iequals(i32 1841, i32 %bf.value, i32 0) + %16 = load i32* %retval + ret i32 %16 +} + +declare i32 @iequals(...) diff --git a/test/CodeGen/X86/SIMD/dg.exp b/test/CodeGen/X86/SIMD/dg.exp new file mode 100644 index 0000000..629a147 --- /dev/null +++ b/test/CodeGen/X86/SIMD/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target X86] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]] +} diff --git a/test/CodeGen/X86/SIMD/notvunpcklpd.ll b/test/CodeGen/X86/SIMD/notvunpcklpd.ll new file mode 100644 index 0000000..3afc2f2 --- /dev/null +++ b/test/CodeGen/X86/SIMD/notvunpcklpd.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -mattr=+avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + +define void @try_([2 x <4 x double>]* noalias %incarray, [2 x <4 x double>]* noalias %incarrayb ) { +entry: + %incarray1 = alloca [2 x <4 x double>]*, align 8 + %incarrayb1 = alloca [2 x <4 x double>]*, align 8 + %carray = alloca [2 x <4 x double>], align 16 + %r = getelementptr [2 x <4 x double>]* %incarray, i32 0, i32 0 + %rb = getelementptr [2 x <4 x double>]* %incarrayb, i32 0, i32 0 + %r3 = load <4 x double>* %r, align 8 + %r4 = load <4 x double>* %rb, align 8 + %r11 = shufflevector <4 x double> %r3, <4 x double> %r4, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x double>> [#uses=1] +; CHECK-NOT: vunpcklpd + %r12 = getelementptr [2 x <4 x double>]* %carray, i32 0, i32 1 + store <4 x double> %r11, <4 x double>* %r12, align 4 + ret void +} diff --git a/test/CodeGen/X86/SIMD/notvunpcklps.ll b/test/CodeGen/X86/SIMD/notvunpcklps.ll new file mode 100644 index 0000000..19daa3e --- /dev/null +++ b/test/CodeGen/X86/SIMD/notvunpcklps.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -mattr=+avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + +define void @try_([2 x <8 x float>]* noalias %incarray, [2 x <8 x float>]* noalias %incarrayb ) { +enmtry: + %incarray1 = alloca [2 x <8 x float>]*, align 8 + %incarrayb1 = alloca [2 x <8 x float>]*, align 8 + %carray = alloca [2 x <8 x float>], align 16 + %r = getelementptr [2 x <8 x float>]* %incarray, i32 0, i32 0 + %rb = getelementptr [2 x <8 x float>]* %incarrayb, i32 0, i32 0 + %r3 = load <8 x float>* %r, align 8 + %r4 = load <8 x float>* %rb, align 8 + %r8 = shufflevector <8 x float> %r3, <8 x float> %r4, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x float>> [#uses=1] +; CHECK-NOT: vunpcklps + %r9 = getelementptr [2 x <8 x float>]* %carray, i32 0, i32 0 + store <8 x float> %r8, <8 x float>* %r9, align 4 + ret void +} diff --git a/test/CodeGen/X86/SIMD/vunpcklpd.ll b/test/CodeGen/X86/SIMD/vunpcklpd.ll new file mode 100644 index 0000000..60d23a4 --- /dev/null +++ b/test/CodeGen/X86/SIMD/vunpcklpd.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -mattr=+avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + +define void @try_([2 x <4 x double>]* noalias %incarray, [2 x <4 x double>]* noalias %incarrayb ) { +entry: + %incarray1 = alloca [2 x <4 x double>]*, align 8 + %incarrayb1 = alloca [2 x <4 x double>]*, align 8 + %carray = alloca [2 x <4 x double>], align 16 + %r = getelementptr [2 x <4 x double>]* %incarray, i32 0, i32 0 + %rb = getelementptr [2 x <4 x double>]* %incarrayb, i32 0, i32 0 + %r3 = load <4 x double>* %r, align 8 + %r4 = load <4 x double>* %rb, align 8 + %r11 = shufflevector <4 x double> %r3, <4 x double> %r4, <4 x i32> < i32 0, i32 4, i32 2, i32 6 > ; <<4 x double>> [#uses=1] +; CHECK: vunpcklpd + %r12 = getelementptr [2 x <4 x double>]* %carray, i32 0, i32 1 + store <4 x double> %r11, <4 x double>* %r12, align 4 + ret void +} diff --git a/test/CodeGen/X86/SIMD/vunpcklps.ll b/test/CodeGen/X86/SIMD/vunpcklps.ll new file mode 100644 index 0000000..a87b299 --- /dev/null +++ b/test/CodeGen/X86/SIMD/vunpcklps.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -mattr=+avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + +define void @try_([2 x <8 x float>]* noalias %incarray, [2 x <8 x float>]* noalias %incarrayb ) { +entry: + %incarray1 = alloca [2 x <8 x float>]*, align 8 + %incarrayb1 = alloca [2 x <8 x float>]*, align 8 + %carray = alloca [2 x <8 x float>], align 16 + %r = getelementptr [2 x <8 x float>]* %incarray, i32 0, i32 0 + %rb = getelementptr [2 x <8 x float>]* %incarrayb, i32 0, i32 0 + %r3 = load <8 x float>* %r, align 8 + %r4 = load <8 x float>* %rb, align 8 + %r11 = shufflevector <8 x float> %r3, <8 x float> %r4, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13 > ; <<8 x float>> [#uses=1] +; CHECK: vunpcklps + %r12 = getelementptr [2 x <8 x float>]* %carray, i32 0, i32 1 + store <8 x float> %r11, <8 x float>* %r12, align 4 + ret void +} diff --git a/test/CodeGen/X86/abi-isel.ll b/test/CodeGen/X86/abi-isel.ll index 38868ff..5b4d79f 100644 --- a/test/CodeGen/X86/abi-isel.ll +++ b/test/CodeGen/X86/abi-isel.ll @@ -1,16 +1,16 @@ -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-32-STATIC -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-32-PIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-PIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-64-STATIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-64-PIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-64-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=LINUX-64-PIC -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-32-STATIC -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-32-PIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-32-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-PIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-64-STATIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-64-PIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-64-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-PIC @src = external global [131072 x i32] @dst = external global [131072 x i32] @@ -8375,7 +8375,7 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: lcallee: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll x ; LINUX-32-STATIC-NEXT: calll x ; LINUX-32-STATIC-NEXT: calll x @@ -8383,11 +8383,11 @@ entry: ; LINUX-32-STATIC-NEXT: calll x ; LINUX-32-STATIC-NEXT: calll x ; LINUX-32-STATIC-NEXT: calll x -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: lcallee: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll x ; LINUX-32-PIC-NEXT: calll x ; LINUX-32-PIC-NEXT: calll x @@ -8395,11 +8395,12 @@ entry: ; LINUX-32-PIC-NEXT: calll x ; LINUX-32-PIC-NEXT: calll x ; LINUX-32-PIC-NEXT: calll x -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: lcallee: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: callq x@PLT @@ -8407,7 +8408,7 @@ entry: ; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: callq x@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _lcallee: @@ -8447,7 +8448,7 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _lcallee: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _x ; DARWIN-64-STATIC-NEXT: callq _x ; DARWIN-64-STATIC-NEXT: callq _x @@ -8455,11 +8456,11 @@ entry: ; DARWIN-64-STATIC-NEXT: callq _x ; DARWIN-64-STATIC-NEXT: callq _x ; DARWIN-64-STATIC-NEXT: callq _x -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _lcallee: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _x ; DARWIN-64-DYNAMIC-NEXT: callq _x ; DARWIN-64-DYNAMIC-NEXT: callq _x @@ -8467,11 +8468,11 @@ entry: ; DARWIN-64-DYNAMIC-NEXT: callq _x ; DARWIN-64-DYNAMIC-NEXT: callq _x ; DARWIN-64-DYNAMIC-NEXT: callq _x -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _lcallee: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _x ; DARWIN-64-PIC-NEXT: callq _x ; DARWIN-64-PIC-NEXT: callq _x @@ -8479,7 +8480,7 @@ entry: ; DARWIN-64-PIC-NEXT: callq _x ; DARWIN-64-PIC-NEXT: callq _x ; DARWIN-64-PIC-NEXT: callq _x -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8506,7 +8507,7 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dcallee: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll y ; LINUX-32-STATIC-NEXT: calll y ; LINUX-32-STATIC-NEXT: calll y @@ -8514,11 +8515,11 @@ entry: ; LINUX-32-STATIC-NEXT: calll y ; LINUX-32-STATIC-NEXT: calll y ; LINUX-32-STATIC-NEXT: calll y -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: dcallee: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll y ; LINUX-32-PIC-NEXT: calll y ; LINUX-32-PIC-NEXT: calll y @@ -8526,11 +8527,12 @@ entry: ; LINUX-32-PIC-NEXT: calll y ; LINUX-32-PIC-NEXT: calll y ; LINUX-32-PIC-NEXT: calll y -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: dcallee: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: callq y@PLT @@ -8538,7 +8540,7 @@ entry: ; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: callq y@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _dcallee: @@ -8578,7 +8580,7 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _dcallee: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _y ; DARWIN-64-STATIC-NEXT: callq _y ; DARWIN-64-STATIC-NEXT: callq _y @@ -8586,11 +8588,11 @@ entry: ; DARWIN-64-STATIC-NEXT: callq _y ; DARWIN-64-STATIC-NEXT: callq _y ; DARWIN-64-STATIC-NEXT: callq _y -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dcallee: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _y ; DARWIN-64-DYNAMIC-NEXT: callq _y ; DARWIN-64-DYNAMIC-NEXT: callq _y @@ -8598,11 +8600,11 @@ entry: ; DARWIN-64-DYNAMIC-NEXT: callq _y ; DARWIN-64-DYNAMIC-NEXT: callq _y ; DARWIN-64-DYNAMIC-NEXT: callq _y -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dcallee: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _y ; DARWIN-64-PIC-NEXT: callq _y ; DARWIN-64-PIC-NEXT: callq _y @@ -8610,7 +8612,7 @@ entry: ; DARWIN-64-PIC-NEXT: callq _y ; DARWIN-64-PIC-NEXT: callq _y ; DARWIN-64-PIC-NEXT: callq _y -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8770,24 +8772,25 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: caller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll callee ; LINUX-32-STATIC-NEXT: calll callee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: caller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll callee ; LINUX-32-PIC-NEXT: calll callee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: caller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq callee@PLT ; LINUX-64-PIC-NEXT: callq callee@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _caller: @@ -8812,24 +8815,24 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _caller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _callee ; DARWIN-64-STATIC-NEXT: callq _callee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _caller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _callee ; DARWIN-64-DYNAMIC-NEXT: callq _callee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _caller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _callee ; DARWIN-64-PIC-NEXT: callq _callee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8844,24 +8847,25 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dcaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll dcallee ; LINUX-32-STATIC-NEXT: calll dcallee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: dcaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll dcallee ; LINUX-32-PIC-NEXT: calll dcallee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: dcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq dcallee ; LINUX-64-PIC-NEXT: callq dcallee -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _dcaller: @@ -8886,24 +8890,24 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _dcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _dcallee ; DARWIN-64-STATIC-NEXT: callq _dcallee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _dcallee ; DARWIN-64-DYNAMIC-NEXT: callq _dcallee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _dcallee ; DARWIN-64-PIC-NEXT: callq _dcallee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8918,24 +8922,25 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: lcaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll lcallee ; LINUX-32-STATIC-NEXT: calll lcallee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: lcaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll lcallee ; LINUX-32-PIC-NEXT: calll lcallee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: lcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq lcallee@PLT ; LINUX-64-PIC-NEXT: callq lcallee@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _lcaller: @@ -8960,24 +8965,24 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _lcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _lcallee ; DARWIN-64-STATIC-NEXT: callq _lcallee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _lcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _lcallee ; DARWIN-64-DYNAMIC-NEXT: callq _lcallee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _lcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _lcallee ; DARWIN-64-PIC-NEXT: callq _lcallee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8990,21 +8995,22 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: tailcaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll callee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: tailcaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll callee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: tailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq callee@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _tailcaller: @@ -9026,21 +9032,21 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _tailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _callee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _tailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _callee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _tailcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _callee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9053,21 +9059,22 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dtailcaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll dcallee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: dtailcaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll dcallee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: dtailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq dcallee -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _dtailcaller: @@ -9089,21 +9096,21 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _dtailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _dcallee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dtailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _dcallee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dtailcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _dcallee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9116,21 +9123,22 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: ltailcaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll lcallee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: ltailcaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll lcallee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: ltailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq lcallee@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _ltailcaller: @@ -9152,21 +9160,21 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _ltailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _lcallee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _ltailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _lcallee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _ltailcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _lcallee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9183,17 +9191,18 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: icaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *ifunc ; LINUX-32-STATIC-NEXT: calll *ifunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: icaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *ifunc ; LINUX-32-PIC-NEXT: calll *ifunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: icaller: @@ -9272,17 +9281,18 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dicaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *difunc ; LINUX-32-STATIC-NEXT: calll *difunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: dicaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *difunc ; LINUX-32-PIC-NEXT: calll *difunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: dicaller: @@ -9320,24 +9330,24 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _dicaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dicaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dicaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-PIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9354,24 +9364,25 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: licaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *lifunc ; LINUX-32-STATIC-NEXT: calll *lifunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: licaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *lifunc ; LINUX-32-PIC-NEXT: calll *lifunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: licaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq *lifunc(%rip) ; LINUX-64-PIC-NEXT: callq *lifunc(%rip) -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _licaller: @@ -9401,24 +9412,24 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _licaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _licaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _licaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9435,17 +9446,18 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: itailcaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *ifunc ; LINUX-32-STATIC-NEXT: calll *ifunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: itailcaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *ifunc ; LINUX-32-PIC-NEXT: calll *ifunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: itailcaller: @@ -9521,22 +9533,23 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: ditailcaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *difunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: ditailcaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *difunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: ditailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: callq *(%rax) -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _ditailcaller: @@ -9561,20 +9574,20 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _ditailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _ditailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _ditailcaller: ; DARWIN-64-PIC: callq *_difunc(%rip) -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9588,21 +9601,22 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: litailcaller: -; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *lifunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: litailcaller: -; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *lifunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: litailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq *lifunc(%rip) -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _litailcaller: @@ -9627,20 +9641,20 @@ entry: ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _litailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _litailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _litailcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } diff --git a/test/CodeGen/X86/add-of-carry.ll b/test/CodeGen/X86/add-of-carry.ll index 4c22574..f924ec8 100644 --- a/test/CodeGen/X86/add-of-carry.ll +++ b/test/CodeGen/X86/add-of-carry.ll @@ -1,8 +1,9 @@ ; RUN: llc < %s -march=x86 | FileCheck %s ; <rdar://problem/8449754> -define i32 @add32carry(i32 %sum, i32 %x) nounwind readnone ssp { +define i32 @test1(i32 %sum, i32 %x) nounwind readnone ssp { entry: +; CHECK: test1: ; CHECK: sbbl %ecx, %ecx ; CHECK-NOT: addl ; CHECK: subl %ecx, %eax @@ -12,3 +13,22 @@ entry: %z.0 = add i32 %add4, %inc ret i32 %z.0 } + +; Instcombine transforms test1 into test2: +; CHECK: test2: +; CHECK: movl +; CHECK-NEXT: addl +; CHECK-NEXT: sbbl +; CHECK-NEXT: subl +; CHECK-NEXT: ret +define i32 @test2(i32 %sum, i32 %x) nounwind readnone ssp { +entry: + %uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %x, i32 %sum) + %0 = extractvalue { i32, i1 } %uadd, 0 + %cmp = extractvalue { i32, i1 } %uadd, 1 + %inc = zext i1 %cmp to i32 + %z.0 = add i32 %0, %inc + ret i32 %z.0 +} + +declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone diff --git a/test/CodeGen/X86/add.ll b/test/CodeGen/X86/add.ll index 3991a68..62c8980 100644 --- a/test/CodeGen/X86/add.ll +++ b/test/CodeGen/X86/add.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32 -; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64 ; The immediate can be encoded in a smaller way if the ; instruction is a sub instead of an add. @@ -43,7 +44,7 @@ overflow: ; X32-NEXT: jo ; X64: test4: -; X64: addl %esi, %edi +; X64: addl %e[[A1:si|dx]], %e[[A0:di|cx]] ; X64-NEXT: jo } @@ -66,7 +67,7 @@ carry: ; X32-NEXT: jb ; X64: test5: -; X64: addl %esi, %edi +; X64: addl %e[[A1]], %e[[A0]] ; X64-NEXT: jb } @@ -87,8 +88,48 @@ define i64 @test6(i64 %A, i32 %B) nounwind { ; X32-NEXT: ret ; X64: test6: -; X64: shlq $32, %rsi -; X64: leaq (%rsi,%rdi), %rax +; X64: shlq $32, %r[[A1]] +; X64: leaq (%r[[A1]],%r[[A0]]), %rax ; X64: ret } +define {i32, i1} @test7(i32 %v1, i32 %v2) nounwind { + %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2) + ret {i32, i1} %t +} + +; X64: test7: +; X64: addl %e[[A1]], %eax +; X64-NEXT: setb %dl +; X64-NEXT: ret + +; PR5443 +define {i64, i1} @test8(i64 %left, i64 %right) nounwind { +entry: + %extleft = zext i64 %left to i65 + %extright = zext i64 %right to i65 + %sum = add i65 %extleft, %extright + %res.0 = trunc i65 %sum to i64 + %overflow = and i65 %sum, -18446744073709551616 + %res.1 = icmp ne i65 %overflow, 0 + %final0 = insertvalue {i64, i1} undef, i64 %res.0, 0 + %final1 = insertvalue {i64, i1} %final0, i1 %res.1, 1 + ret {i64, i1} %final1 +} + +; X64: test8: +; X64: addq +; X64-NEXT: sbbq +; X64-NEXT: testb + +define i32 @test9(i32 %x, i32 %y) nounwind readnone { + %cmp = icmp eq i32 %x, 10 + %sub = sext i1 %cmp to i32 + %cond = add i32 %sub, %y + ret i32 %cond +; X64: test9: +; X64: cmpl $10 +; X64: sete +; X64: subl +; X64: ret +} diff --git a/test/CodeGen/X86/adde-carry.ll b/test/CodeGen/X86/adde-carry.ll new file mode 100644 index 0000000..98c4f99 --- /dev/null +++ b/test/CodeGen/X86/adde-carry.ll @@ -0,0 +1,26 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s -check-prefix=CHECK-64 +; RUN: llc -march=x86 < %s | FileCheck %s -check-prefix=CHECK-32 + +define void @a(i64* nocapture %s, i64* nocapture %t, i64 %a, i64 %b, i64 %c) nounwind { +entry: + %0 = zext i64 %a to i128 + %1 = zext i64 %b to i128 + %2 = add i128 %1, %0 + %3 = zext i64 %c to i128 + %4 = shl i128 %3, 64 + %5 = add i128 %4, %2 + %6 = lshr i128 %5, 64 + %7 = trunc i128 %6 to i64 + store i64 %7, i64* %s, align 8 + %8 = trunc i128 %2 to i64 + store i64 %8, i64* %t, align 8 + ret void + +; CHECK-32: addl +; CHECK-32: adcl +; CHECK-32: adcl $0 +; CHECK-32: adcl $0 + +; CHECK-64: addq +; CHECK-64: adcq $0 +} diff --git a/test/CodeGen/X86/addr-label-difference.ll b/test/CodeGen/X86/addr-label-difference.ll index be0908a..49abd8a 100644 --- a/test/CodeGen/X86/addr-label-difference.ll +++ b/test/CodeGen/X86/addr-label-difference.ll @@ -5,7 +5,7 @@ target triple = "i386-apple-darwin10.0" ; This array should go into the __TEXT,__const section, not into the ; __DATA,__const section, because the elements don't need relocations. -@test.array = internal constant [3 x i32] [i32 sub (i32 ptrtoint (i8* blockaddress(@test, %foo) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %bar) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %hack) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32))] ; <[3 x i32]*> [#uses=1] +@test.array = internal unnamed_addr constant [3 x i32] [i32 sub (i32 ptrtoint (i8* blockaddress(@test, %foo) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %bar) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %hack) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32))] ; <[3 x i32]*> [#uses=1] define void @test(i32 %i) nounwind ssp { entry: diff --git a/test/CodeGen/X86/apm.ll b/test/CodeGen/X86/apm.ll new file mode 100644 index 0000000..d0c64f2 --- /dev/null +++ b/test/CodeGen/X86/apm.ll @@ -0,0 +1,26 @@ +; RUN: llc < %s -o - -march=x86-64 | FileCheck %s +; PR8573 + +; CHECK: foo: +; CHECK: leaq (%rdi), %rax +; CHECK-NEXT: movl %esi, %ecx +; CHECK-NEXT: monitor +define void @foo(i8* %P, i32 %E, i32 %H) nounwind { +entry: + tail call void @llvm.x86.sse3.monitor(i8* %P, i32 %E, i32 %H) + ret void +} + +declare void @llvm.x86.sse3.monitor(i8*, i32, i32) nounwind + +; CHECK: bar: +; CHECK: movl %edi, %ecx +; CHECK-NEXT: movl %esi, %eax +; CHECK-NEXT: mwait +define void @bar(i32 %E, i32 %H) nounwind { +entry: + tail call void @llvm.x86.sse3.mwait(i32 %E, i32 %H) + ret void +} + +declare void @llvm.x86.sse3.mwait(i32, i32) nounwind diff --git a/test/CodeGen/X86/atomic_op.ll b/test/CodeGen/X86/atomic_op.ll index 84bae46..f3ade93 100644 --- a/test/CodeGen/X86/atomic_op.ll +++ b/test/CodeGen/X86/atomic_op.ll @@ -112,7 +112,7 @@ entry: define void @test2(i32 addrspace(256)* nocapture %P) nounwind { entry: ; CHECK: lock -; CEHCK: cmpxchgl %{{.*}}, %gs:(%{{.*}}) +; CHECK: cmpxchgl %{{.*}}, %gs:(%{{.*}}) %0 = tail call i32 @llvm.atomic.cmp.swap.i32.p256i32(i32 addrspace(256)* %P, i32 0, i32 1) ret void diff --git a/test/CodeGen/X86/avx-128.ll b/test/CodeGen/X86/avx-128.ll index a72160b..2bd3b5d 100644 --- a/test/CodeGen/X86/avx-128.ll +++ b/test/CodeGen/X86/avx-128.ll @@ -4,7 +4,7 @@ define void @zero() nounwind ssp { entry: - ; CHECK: vpxor + ; CHECK: vxorps ; CHECK: vmovaps store <4 x float> zeroinitializer, <4 x float>* @z, align 16 ret void diff --git a/test/CodeGen/X86/avx-intrinsics-x86.ll b/test/CodeGen/X86/avx-intrinsics-x86.ll index ec5ed17..6c32396 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -114,8 +114,8 @@ declare i32 @llvm.x86.sse2.comile.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comilt_sd(<2 x double> %a0, <2 x double> %a1) { ; CHECK: vcomisd - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %eax, %eax + ; CHECK: andl $1, %eax %res = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -825,8 +825,7 @@ declare i32 @llvm.x86.sse2.ucomile.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomilt_sd(<2 x double> %a0, <2 x double> %a1) { ; CHECK: vucomisd - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -1183,8 +1182,7 @@ declare <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32>, <4 x i32>) nounwind readnone define i32 @test_x86_sse41_ptestc(<4 x float> %a0, <4 x float> %a1) { ; CHECK: vptest - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.sse41.ptestc(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -1455,8 +1453,7 @@ declare i32 @llvm.x86.sse.comile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comilt_ss(<4 x float> %a0, <4 x float> %a1) { ; CHECK: vcomiss - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbb %res = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -1697,8 +1694,7 @@ declare i32 @llvm.x86.sse.ucomile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomilt_ss(<4 x float> %a0, <4 x float> %a1) { ; CHECK: vucomiss - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2173,8 +2169,7 @@ declare void @llvm.x86.avx.movnt.ps.256(i8*, <8 x float>) nounwind define i32 @test_x86_avx_ptestc_256(<4 x i64> %a0, <4 x i64> %a1) { ; CHECK: vptest - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.ptestc.256(<4 x i64> %a0, <4 x i64> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2451,8 +2446,7 @@ declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>) noun define i32 @test_x86_avx_vtestc_pd(<2 x double> %a0, <2 x double> %a1) { ; CHECK: vtestpd - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.vtestc.pd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2461,8 +2455,7 @@ declare i32 @llvm.x86.avx.vtestc.pd(<2 x double>, <2 x double>) nounwind readnon define i32 @test_x86_avx_vtestc_pd_256(<4 x double> %a0, <4 x double> %a1) { ; CHECK: vtestpd - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.vtestc.pd.256(<4 x double> %a0, <4 x double> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2471,8 +2464,7 @@ declare i32 @llvm.x86.avx.vtestc.pd.256(<4 x double>, <4 x double>) nounwind rea define i32 @test_x86_avx_vtestc_ps(<4 x float> %a0, <4 x float> %a1) { ; CHECK: vtestps - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.vtestc.ps(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2481,8 +2473,7 @@ declare i32 @llvm.x86.avx.vtestc.ps(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_avx_vtestc_ps_256(<8 x float> %a0, <8 x float> %a1) { ; CHECK: vtestps - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.vtestc.ps.256(<8 x float> %a0, <8 x float> %a1) ; <i32> [#uses=1] ret i32 %res } diff --git a/test/CodeGen/X86/bc-extract.ll b/test/CodeGen/X86/bc-extract.ll new file mode 100644 index 0000000..ac972a8 --- /dev/null +++ b/test/CodeGen/X86/bc-extract.ll @@ -0,0 +1,27 @@ +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s + + +define float @extractFloat1() nounwind { +entry: + ; CHECK: 1065353216 + %tmp0 = bitcast <1 x double> <double 0x000000003F800000> to <2 x float> + %tmp1 = extractelement <2 x float> %tmp0, i32 0 + ret float %tmp1 +} + +define float @extractFloat2() nounwind { +entry: + ; CHECK: pxor %xmm0, %xmm0 + %tmp4 = bitcast <1 x double> <double 0x000000003F800000> to <2 x float> + %tmp5 = extractelement <2 x float> %tmp4, i32 1 + ret float %tmp5 +} + +define i32 @extractInt2() nounwind { +entry: + ; CHECK: xorl %eax, %eax + %tmp4 = bitcast <1 x i64> <i64 256> to <2 x i32> + %tmp5 = extractelement <2 x i32> %tmp4, i32 1 + ret i32 %tmp5 +} + diff --git a/test/CodeGen/X86/break-sse-dep.ll b/test/CodeGen/X86/break-sse-dep.ll index 094cbc7..2dee575 100644 --- a/test/CodeGen/X86/break-sse-dep.ll +++ b/test/CodeGen/X86/break-sse-dep.ll @@ -1,9 +1,10 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse2 | FileCheck %s define double @t1(float* nocapture %x) nounwind readonly ssp { entry: ; CHECK: t1: -; CHECK: movss (%rdi), %xmm0 +; CHECK: movss ([[A0:%rdi|%rcx]]), %xmm0 ; CHECK: cvtss2sd %xmm0, %xmm0 %0 = load float* %x, align 4 @@ -14,7 +15,7 @@ entry: define float @t2(double* nocapture %x) nounwind readonly ssp optsize { entry: ; CHECK: t2: -; CHECK: cvtsd2ss (%rdi), %xmm0 +; CHECK: cvtsd2ss ([[A0]]), %xmm0 %0 = load double* %x, align 8 %1 = fptrunc double %0 to float ret float %1 @@ -23,7 +24,7 @@ entry: define float @squirtf(float* %x) nounwind { entry: ; CHECK: squirtf: -; CHECK: movss (%rdi), %xmm0 +; CHECK: movss ([[A0]]), %xmm0 ; CHECK: sqrtss %xmm0, %xmm0 %z = load float* %x %t = call float @llvm.sqrt.f32(float %z) @@ -33,7 +34,7 @@ entry: define double @squirt(double* %x) nounwind { entry: ; CHECK: squirt: -; CHECK: movsd (%rdi), %xmm0 +; CHECK: movsd ([[A0]]), %xmm0 ; CHECK: sqrtsd %xmm0, %xmm0 %z = load double* %x %t = call double @llvm.sqrt.f64(double %z) @@ -43,7 +44,7 @@ entry: define float @squirtf_size(float* %x) nounwind optsize { entry: ; CHECK: squirtf_size: -; CHECK: sqrtss (%rdi), %xmm0 +; CHECK: sqrtss ([[A0]]), %xmm0 %z = load float* %x %t = call float @llvm.sqrt.f32(float %z) ret float %t @@ -52,7 +53,7 @@ entry: define double @squirt_size(double* %x) nounwind optsize { entry: ; CHECK: squirt_size: -; CHECK: sqrtsd (%rdi), %xmm0 +; CHECK: sqrtsd ([[A0]]), %xmm0 %z = load double* %x %t = call double @llvm.sqrt.f64(double %z) ret double %t diff --git a/test/CodeGen/X86/bswap-inline-asm.ll b/test/CodeGen/X86/bswap-inline-asm.ll index ecb4cec..3bb9124 100644 --- a/test/CodeGen/X86/bswap-inline-asm.ll +++ b/test/CodeGen/X86/bswap-inline-asm.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 > %t -; RUN: not grep APP %t +; RUN: llc < %s -mtriple=x86_64-apple-darwin > %t +; RUN: not grep InlineAsm %t ; RUN: FileCheck %s < %t ; CHECK: foo: diff --git a/test/CodeGen/X86/codegen-dce.ll b/test/CodeGen/X86/codegen-dce.ll deleted file mode 100644 index d83efaf..0000000 --- a/test/CodeGen/X86/codegen-dce.ll +++ /dev/null @@ -1,43 +0,0 @@ -; RUN: llc < %s -march=x86 -stats |& grep {codegen-dce} | grep {Number of dead instructions deleted} - - %struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] } - %struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* } - %struct.node = type { i16, double, [3 x double], i32, i32 } - -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { -entry: - %0 = malloc %struct.anon ; <%struct.anon*> [#uses=2] - %1 = getelementptr %struct.anon* %0, i32 0, i32 2 ; <%struct.node**> [#uses=1] - br label %bb14.i - -bb14.i: ; preds = %bb14.i, %entry - %i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %2, %bb14.i ] ; <i32> [#uses=1] - %2 = add i32 %i8.0.reg2mem.0.i, 1 ; <i32> [#uses=2] - %exitcond74.i = icmp eq i32 %2, 32 ; <i1> [#uses=1] - br i1 %exitcond74.i, label %bb32.i, label %bb14.i - -bb32.i: ; preds = %bb32.i, %bb14.i - %tmp.0.reg2mem.0.i = phi i32 [ %indvar.next63.i, %bb32.i ], [ 0, %bb14.i ] ; <i32> [#uses=1] - %indvar.next63.i = add i32 %tmp.0.reg2mem.0.i, 1 ; <i32> [#uses=2] - %exitcond64.i = icmp eq i32 %indvar.next63.i, 64 ; <i1> [#uses=1] - br i1 %exitcond64.i, label %bb47.loopexit.i, label %bb32.i - -bb.i.i: ; preds = %bb47.loopexit.i - unreachable - -stepsystem.exit.i: ; preds = %bb47.loopexit.i - store %struct.node* null, %struct.node** %1, align 4 - br label %bb.i6.i - -bb.i6.i: ; preds = %bb.i6.i, %stepsystem.exit.i - br i1 false, label %bb107.i.i, label %bb.i6.i - -bb107.i.i: ; preds = %bb107.i.i, %bb.i6.i - %q_addr.0.i.i.in = phi %struct.bnode** [ null, %bb107.i.i ], [ %3, %bb.i6.i ] ; <%struct.bnode**> [#uses=0] - br label %bb107.i.i - -bb47.loopexit.i: ; preds = %bb32.i - %3 = getelementptr %struct.anon* %0, i32 0, i32 4, i32 0 ; <%struct.bnode**> [#uses=1] - %4 = icmp eq %struct.node* null, null ; <i1> [#uses=1] - br i1 %4, label %stepsystem.exit.i, label %bb.i.i -} diff --git a/test/CodeGen/X86/codegen-prepare-extload.ll b/test/CodeGen/X86/codegen-prepare-extload.ll index 9f57d53..14df815 100644 --- a/test/CodeGen/X86/codegen-prepare-extload.ll +++ b/test/CodeGen/X86/codegen-prepare-extload.ll @@ -1,10 +1,11 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win64 | FileCheck %s ; rdar://7304838 ; CodeGenPrepare should move the zext into the block with the load ; so that SelectionDAG can select it with the load. -; CHECK: movzbl (%rdi), %eax +; CHECK: movzbl ({{%rdi|%rcx}}), %eax define void @foo(i8* %p, i32* %q) { entry: diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll index 56ea26b..89b436e 100644 --- a/test/CodeGen/X86/commute-two-addr.ll +++ b/test/CodeGen/X86/commute-two-addr.ll @@ -2,24 +2,62 @@ ; insertion of register-register copies. ; Make sure there are only 3 mov's for each testcase -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {\\\<mov\\\>} | count 6 +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=DARWIN -target triple = "i686-pc-linux-gnu" @G = external global i32 ; <i32*> [#uses=2] declare void @ext(i32) -define i32 @add_test(i32 %X, i32 %Y) { +define i32 @t1(i32 %X, i32 %Y) nounwind { +; LINUX: t1: +; LINUX: movl 4(%esp), %eax +; LINUX: movl 8(%esp), %ecx +; LINUX: addl %eax, %ecx +; LINUX: movl %ecx, G %Z = add i32 %X, %Y ; <i32> [#uses=1] store i32 %Z, i32* @G ret i32 %X } -define i32 @xor_test(i32 %X, i32 %Y) { +define i32 @t2(i32 %X, i32 %Y) nounwind { +; LINUX: t2: +; LINUX: movl 4(%esp), %eax +; LINUX: movl 8(%esp), %ecx +; LINUX: xorl %eax, %ecx +; LINUX: movl %ecx, G %Z = xor i32 %X, %Y ; <i32> [#uses=1] store i32 %Z, i32* @G ret i32 %X } +; rdar://8762995 +%0 = type { i64, i32 } + +define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind { +entry: +; DARWIN: t3: +; DARWIN: shlq $32, %rcx +; DARWIN-NOT: leaq +; DARWIN: orq %rcx, %rax +; DARWIN-NOT: mov +; DARWIN: shll $16 + %tmp21 = zext i32 %lb to i64 + %tmp23 = zext i32 %ub to i64 + %tmp24 = shl i64 %tmp23, 32 + %ins26 = or i64 %tmp24, %tmp21 + %tmp28 = zext i8 %has_lb to i32 + %tmp33 = zext i8 %has_ub to i32 + %tmp34 = shl i32 %tmp33, 8 + %tmp38 = zext i8 %lb_inclusive to i32 + %tmp39 = shl i32 %tmp38, 16 + %tmp43 = zext i8 %ub_inclusive to i32 + %tmp44 = shl i32 %tmp43, 24 + %ins31 = or i32 %tmp39, %tmp28 + %ins36 = or i32 %ins31, %tmp34 + %ins46 = or i32 %ins36, %tmp44 + %tmp16 = insertvalue %0 undef, i64 %ins26, 0 + %tmp19 = insertvalue %0 %tmp16, i32 %ins46, 1 + ret %0 %tmp19 +} diff --git a/test/CodeGen/X86/conditional-indecrement.ll b/test/CodeGen/X86/conditional-indecrement.ll new file mode 100644 index 0000000..a3a0c39 --- /dev/null +++ b/test/CodeGen/X86/conditional-indecrement.ll @@ -0,0 +1,89 @@ +; RUN: llc -march=x86 < %s | FileCheck %s + +define i32 @test1(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test1: +; CHECK: cmpl $1 +; CHECK: sbbl $-1 +; CHECK: ret +} + +define i32 @test2(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test2: +; CHECK: cmpl $1 +; CHECK: adcl $0 +; CHECK: ret +} + +define i32 @test3(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test3: +; CHECK: cmpl $1 +; CHECK: adcl $0 +; CHECK: ret +} + +define i32 @test4(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test4: +; CHECK: cmpl $1 +; CHECK: sbbl $-1 +; CHECK: ret +} + +define i32 @test5(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test5: +; CHECK: cmpl $1 +; CHECK: adcl $-1 +; CHECK: ret +} + +define i32 @test6(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test6: +; CHECK: cmpl $1 +; CHECK: sbbl $0 +; CHECK: ret +} + +define i32 @test7(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test7: +; CHECK: cmpl $1 +; CHECK: sbbl $0 +; CHECK: ret +} + +define i32 @test8(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test8: +; CHECK: cmpl $1 +; CHECK: adcl $-1 +; CHECK: ret +} diff --git a/test/CodeGen/X86/const-select.ll b/test/CodeGen/X86/const-select.ll deleted file mode 100644 index 665984c..0000000 --- a/test/CodeGen/X86/const-select.ll +++ /dev/null @@ -1,22 +0,0 @@ - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin7" - -; RUN: llc < %s | grep {LCPI0_0(,%eax,4)} -define float @f(i32 %x) nounwind readnone { -entry: - %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1] - %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1] - ret float %iftmp.0.0 -} - -; RUN: llc < %s | grep {movsbl.*(%e.x,%e.x,4), %eax} -define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly { -entry: - %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1] - %iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1] - %1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1] - %2 = load i8* %1, align 1 ; <i8> [#uses=1] - ret i8 %2 -} - diff --git a/test/CodeGen/X86/constant-pool-sharing.ll b/test/CodeGen/X86/constant-pool-sharing.ll index 33de576..f979945 100644 --- a/test/CodeGen/X86/constant-pool-sharing.ll +++ b/test/CodeGen/X86/constant-pool-sharing.ll @@ -1,11 +1,12 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; llc should share constant pool entries between this integer vector ; and this floating-point vector since they have the same encoding. ; CHECK: LCPI0_0(%rip), %xmm0 -; CHECK: movaps %xmm0, (%rdi) -; CHECK: movaps %xmm0, (%rsi) +; CHECK: movaps %xmm0, ({{%rdi|%rcx}}) +; CHECK: movaps %xmm0, ({{%rsi|%rdx}}) define void @foo(<4 x i32>* %p, <4 x float>* %q, i1 %t) nounwind { entry: diff --git a/test/CodeGen/X86/crash.ll b/test/CodeGen/X86/crash.ll index a14a48b..2d8e63e 100644 --- a/test/CodeGen/X86/crash.ll +++ b/test/CodeGen/X86/crash.ll @@ -141,3 +141,61 @@ entry: call void asm sideeffect "outb $0, ${1:w}", "{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i8 %conv4.i, i32 1017) nounwind unreachable } + +; Crash trying to form conditional increment with fp value. +; PR8981 +define i32 @test9(double %X) ssp align 2 { +entry: + %0 = fcmp one double %X, 0.000000e+00 + %cond = select i1 %0, i32 1, i32 2 + ret i32 %cond +} + + +; PR8514 - Crash in match address do to "heroics" turning and-of-shift into +; shift of and. +%struct.S0 = type { i8, [2 x i8], i8 } + +define void @func_59(i32 %p_63) noreturn nounwind { +entry: + br label %for.body + +for.body: ; preds = %for.inc44, %entry + %p_63.addr.1 = phi i32 [ %p_63, %entry ], [ 0, %for.inc44 ] + %l_74.0 = phi i32 [ 0, %entry ], [ %add46, %for.inc44 ] + br i1 undef, label %for.inc44, label %bb.nph81 + +bb.nph81: ; preds = %for.body + %tmp98 = add i32 %p_63.addr.1, 0 + br label %for.body22 + +for.body22: ; preds = %for.body22, %bb.nph81 + %l_75.077 = phi i64 [ %ins, %for.body22 ], [ undef, %bb.nph81 ] + %tmp110 = trunc i64 %l_75.077 to i32 + %tmp111 = and i32 %tmp110, 65535 + %arrayidx32.0 = getelementptr [9 x [5 x [2 x %struct.S0]]]* undef, i32 0, i32 %l_74.0, i32 %tmp98, i32 %tmp111, i32 0 + store i8 1, i8* %arrayidx32.0, align 4 + %tmp106 = shl i32 %tmp110, 2 + %tmp107 = and i32 %tmp106, 262140 + %scevgep99.sum114 = or i32 %tmp107, 1 + %arrayidx32.1.1 = getelementptr [9 x [5 x [2 x %struct.S0]]]* undef, i32 0, i32 %l_74.0, i32 %tmp98, i32 0, i32 1, i32 %scevgep99.sum114 + store i8 0, i8* %arrayidx32.1.1, align 1 + %ins = or i64 undef, undef + br label %for.body22 + +for.inc44: ; preds = %for.body + %add46 = add i32 %l_74.0, 1 + br label %for.body +} + +; PR9028 +define void @f(i64 %A) nounwind { +entry: + %0 = zext i64 %A to i160 + %1 = shl i160 %0, 64 + %2 = zext i160 %1 to i576 + %3 = zext i96 undef to i576 + %4 = or i576 %3, %2 + store i576 %4, i576* undef, align 8 + ret void +} diff --git a/test/CodeGen/X86/critical-edge-split-2.ll b/test/CodeGen/X86/critical-edge-split-2.ll new file mode 100644 index 0000000..70301cd --- /dev/null +++ b/test/CodeGen/X86/critical-edge-split-2.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +%0 = type <{ %1, %1 }> +%1 = type { i8, i8, i8, i8 } + +@g_2 = global %0 zeroinitializer +@g_4 = global %1 zeroinitializer, align 4 + + +; PR8642 +define i16 @test1(i1 zeroext %C, i8** nocapture %argv) nounwind ssp { +entry: + br i1 %C, label %cond.end.i, label %cond.false.i + +cond.false.i: ; preds = %entry + br label %cond.end.i + +cond.end.i: ; preds = %entry + %call1 = phi i16 [ trunc (i32 srem (i32 1, i32 zext (i1 icmp eq (%1* bitcast (i8* getelementptr inbounds (%0* @g_2, i64 0, i32 1, i32 0) to %1*), %1* @g_4) to i32)) to i16), %cond.false.i ], [ 1, %entry ] + ret i16 %call1 +} + +; CHECK: test1: +; CHECK: testb %dil, %dil +; CHECK: jne LBB0_2 +; CHECK: divl +; CHECK: LBB0_2: diff --git a/test/CodeGen/X86/critical-edge-split.ll b/test/CodeGen/X86/critical-edge-split.ll deleted file mode 100644 index 96fef0f..0000000 --- a/test/CodeGen/X86/critical-edge-split.ll +++ /dev/null @@ -1,50 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -o /dev/null -stats -info-output-file - | grep asm-printer | grep 29 - - %CC = type { %Register } - %II = type { %"struct.XX::II::$_74" } - %JITFunction = type %YYValue* (%CC*, %YYValue**) - %YYValue = type { i32 (...)** } - %Register = type { %"struct.XX::ByteCodeFeatures" } - %"struct.XX::ByteCodeFeatures" = type { i32 } - %"struct.XX::II::$_74" = type { i8* } -@llvm.used = appending global [1 x i8*] [ i8* bitcast (%JITFunction* @loop to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] - -define %YYValue* @loop(%CC*, %YYValue**) nounwind { -; <label>:2 - %3 = getelementptr %CC* %0, i32 -9 ; <%CC*> [#uses=1] - %4 = bitcast %CC* %3 to %YYValue** ; <%YYValue**> [#uses=2] - %5 = load %YYValue** %4 ; <%YYValue*> [#uses=3] - %unique_1.i = ptrtoint %YYValue* %5 to i1 ; <i1> [#uses=1] - br i1 %unique_1.i, label %loop, label %11 - -loop: ; preds = %6, %2 - %.1 = phi %YYValue* [ inttoptr (i32 1 to %YYValue*), %2 ], [ %intAddValue, %6 ] ; <%YYValue*> [#uses=3] - %immediateCmp = icmp slt %YYValue* %.1, %5 ; <i1> [#uses=1] - br i1 %immediateCmp, label %6, label %8 - -; <label>:6 ; preds = %loop - %lhsInt = ptrtoint %YYValue* %.1 to i32 ; <i32> [#uses=1] - %7 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %lhsInt, i32 2) ; <{ i32, i1 }> [#uses=2] - %intAdd = extractvalue { i32, i1 } %7, 0 ; <i32> [#uses=1] - %intAddValue = inttoptr i32 %intAdd to %YYValue* ; <%YYValue*> [#uses=1] - %intAddOverflow = extractvalue { i32, i1 } %7, 1 ; <i1> [#uses=1] - br i1 %intAddOverflow, label %.loopexit, label %loop - -; <label>:8 ; preds = %loop - ret %YYValue* inttoptr (i32 10 to %YYValue*) - -.loopexit: ; preds = %6 - %9 = bitcast %CC* %0 to %YYValue** ; <%YYValue**> [#uses=1] - store %YYValue* %.1, %YYValue** %9 - store %YYValue* %5, %YYValue** %4 - %10 = call fastcc %YYValue* @foobar(%II* inttoptr (i32 3431104 to %II*), %CC* %0, %YYValue** %1) ; <%YYValue*> [#uses=1] - ret %YYValue* %10 - -; <label>:11 ; preds = %2 - %12 = call fastcc %YYValue* @foobar(%II* inttoptr (i32 3431080 to %II*), %CC* %0, %YYValue** %1) ; <%YYValue*> [#uses=1] - ret %YYValue* %12 -} - -declare fastcc %YYValue* @foobar(%II*, %CC*, %YYValue**) nounwind - -declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind diff --git a/test/CodeGen/X86/ctpop-combine.ll b/test/CodeGen/X86/ctpop-combine.ll new file mode 100644 index 0000000..6406cc7 --- /dev/null +++ b/test/CodeGen/X86/ctpop-combine.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s + +declare i64 @llvm.ctpop.i64(i64) nounwind readnone + +define i32 @test1(i64 %x) nounwind readnone { + %count = tail call i64 @llvm.ctpop.i64(i64 %x) + %cast = trunc i64 %count to i32 + %cmp = icmp ugt i32 %cast, 1 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: test1: +; CHECK: leaq -1([[A0:%rdi|%rcx]]) +; CHECK-NEXT: testq +; CHECK-NEXT: setne +; CHECK: ret +} + + +define i32 @test2(i64 %x) nounwind readnone { + %count = tail call i64 @llvm.ctpop.i64(i64 %x) + %cmp = icmp ult i64 %count, 2 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: test2: +; CHECK: leaq -1([[A0]]) +; CHECK-NEXT: testq +; CHECK-NEXT: sete +; CHECK: ret +} + +define i32 @test3(i64 %x) nounwind readnone { + %count = tail call i64 @llvm.ctpop.i64(i64 %x) + %cast = trunc i64 %count to i6 ; Too small for 0-64 + %cmp = icmp ult i6 %cast, 2 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: test3: +; CHECK: cmpb $2 +; CHECK: ret +} diff --git a/test/CodeGen/X86/dagcombine-buildvector.ll b/test/CodeGen/X86/dagcombine-buildvector.ll index 5cc6eaa..dae91d5 100644 --- a/test/CodeGen/X86/dagcombine-buildvector.ll +++ b/test/CodeGen/X86/dagcombine-buildvector.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=penryn -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=penryn | FileCheck %s ; Shows a dag combine bug that will generate an illegal build vector ; with v2i64 build_vector i32, i32. diff --git a/test/CodeGen/X86/dbg-merge-loc-entry.ll b/test/CodeGen/X86/dbg-merge-loc-entry.ll new file mode 100644 index 0000000..83df147 --- /dev/null +++ b/test/CodeGen/X86/dbg-merge-loc-entry.ll @@ -0,0 +1,71 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin8" + +;CHECK: Ldebug_loc0: +;CHECK-NEXT: .quad Lfunc_begin0 +;CHECK-NEXT: .quad Lfunc_end0 +;CHECK-NEXT: .short 1 ## Loc expr size +;CHECK-NEXT: .byte 85 ## DW_OP_reg5 +;CHECK-NEXT: .quad 0 +;CHECK-NEXT: .quad 0 + +%0 = type { i64, i1 } + +@__clz_tab = external constant [256 x i8] + +define hidden i128 @__divti3(i128 %u, i128 %v) nounwind readnone { +entry: + tail call void @llvm.dbg.value(metadata !{i128 %u}, i64 0, metadata !14), !dbg !15 + tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !17), !dbg !21 + br i1 undef, label %bb2, label %bb4, !dbg !22 + +bb2: ; preds = %entry + br label %bb4, !dbg !23 + +bb4: ; preds = %bb2, %entry + br i1 undef, label %__udivmodti4.exit, label %bb82.i, !dbg !24 + +bb82.i: ; preds = %bb4 + unreachable + +__udivmodti4.exit: ; preds = %bb4 + ret i128 undef, !dbg !27 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +declare %0 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone + +!llvm.dbg.sp = !{!0, !9} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"__udivmodti4", metadata !"__udivmodti4", metadata !"", metadata !1, i32 879, metadata !3, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 true, null} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"foobar.c", metadata !"/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 1, metadata !"foobar.c", metadata !"/tmp", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5, metadata !5, metadata !5, metadata !8} +!5 = metadata !{i32 589846, metadata !6, metadata !"UTItype", metadata !6, i32 166, i64 0, i64 0, i64 0, i32 0, metadata !7} ; [ DW_TAG_typedef ] +!6 = metadata !{i32 589865, metadata !"foobar.h", metadata !"/tmp", metadata !2} ; [ DW_TAG_file_type ] +!7 = metadata !{i32 589860, metadata !1, metadata !"", metadata !1, i32 0, i64 128, i64 128, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!8 = metadata !{i32 589839, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_pointer_type ] +!9 = metadata !{i32 589870, i32 0, metadata !1, metadata !"__divti3", metadata !"__divti3", metadata !"__divti3", metadata !1, i32 1094, metadata !10, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i128 (i128, i128)* @__divti3} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] +!11 = metadata !{metadata !12, metadata !12, metadata !12} +!12 = metadata !{i32 589846, metadata !6, metadata !"TItype", metadata !6, i32 160, i64 0, i64 0, i64 0, i32 0, metadata !13} ; [ DW_TAG_typedef ] +!13 = metadata !{i32 589860, metadata !1, metadata !"", metadata !1, i32 0, i64 128, i64 128, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!14 = metadata !{i32 590081, metadata !9, metadata !"u", metadata !1, i32 1093, metadata !12, i32 0} ; [ DW_TAG_arg_variable ] +!15 = metadata !{i32 1093, i32 0, metadata !9, null} +!16 = metadata !{i64 0} +!17 = metadata !{i32 590080, metadata !18, metadata !"c", metadata !1, i32 1095, metadata !19, i32 0} ; [ DW_TAG_auto_variable ] +!18 = metadata !{i32 589835, metadata !9, i32 1094, i32 0, metadata !1, i32 13} ; [ DW_TAG_lexical_block ] +!19 = metadata !{i32 589846, metadata !6, metadata !"word_type", metadata !6, i32 424, i64 0, i64 0, i64 0, i32 0, metadata !20} ; [ DW_TAG_typedef ] +!20 = metadata !{i32 589860, metadata !1, metadata !"long int", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!21 = metadata !{i32 1095, i32 0, metadata !18, null} +!22 = metadata !{i32 1103, i32 0, metadata !18, null} +!23 = metadata !{i32 1104, i32 0, metadata !18, null} +!24 = metadata !{i32 1003, i32 0, metadata !25, metadata !26} +!25 = metadata !{i32 589835, metadata !0, i32 879, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!26 = metadata !{i32 1107, i32 0, metadata !18, null} +!27 = metadata !{i32 1111, i32 0, metadata !18, null} diff --git a/test/CodeGen/X86/dbg-value-inlined-parameter.ll b/test/CodeGen/X86/dbg-value-inlined-parameter.ll new file mode 100644 index 0000000..89bbf34 --- /dev/null +++ b/test/CodeGen/X86/dbg-value-inlined-parameter.ll @@ -0,0 +1,86 @@ +; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s + +;CHECK: DW_TAG_inlined_subroutine +;CHECK-NEXT: DW_AT_abstract_origin +;CHECK-NEXT: DW_AT_low_pc +;CHECK-NEXT: DW_AT_high_pc +;CHECK-NEXT: DW_AT_call_file +;CHECK-NEXT: DW_AT_call_line +;CHECK-NEXT: DW_TAG_formal_parameter +;CHECK-NEXT: .ascii "sp" ## DW_AT_name + +%struct.S1 = type { float*, i32 } + +@p = common global %struct.S1 zeroinitializer, align 8 + +define i32 @foo(%struct.S1* nocapture %sp, i32 %nums) nounwind optsize ssp { +entry: + tail call void @llvm.dbg.value(metadata !{%struct.S1* %sp}, i64 0, metadata !9), !dbg !20 + tail call void @llvm.dbg.value(metadata !{i32 %nums}, i64 0, metadata !18), !dbg !21 + %tmp2 = getelementptr inbounds %struct.S1* %sp, i64 0, i32 1, !dbg !22 + store i32 %nums, i32* %tmp2, align 4, !dbg !22, !tbaa !24 + %call = tail call float* @bar(i32 %nums) nounwind optsize, !dbg !27 + %tmp5 = getelementptr inbounds %struct.S1* %sp, i64 0, i32 0, !dbg !27 + store float* %call, float** %tmp5, align 8, !dbg !27, !tbaa !28 + %cmp = icmp ne float* %call, null, !dbg !29 + %cond = zext i1 %cmp to i32, !dbg !29 + ret i32 %cond, !dbg !29 +} + +declare float* @bar(i32) optsize + +define void @foobar() nounwind optsize ssp { +entry: + tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !9) nounwind, !dbg !31 + tail call void @llvm.dbg.value(metadata !34, i64 0, metadata !18) nounwind, !dbg !35 + store i32 1, i32* getelementptr inbounds (%struct.S1* @p, i64 0, i32 1), align 8, !dbg !36, !tbaa !24 + %call.i = tail call float* @bar(i32 1) nounwind optsize, !dbg !37 + store float* %call.i, float** getelementptr inbounds (%struct.S1* @p, i64 0, i32 0), align 8, !dbg !37, !tbaa !28 + ret void, !dbg !38 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0, !6} +!llvm.dbg.lv.foo = !{!9, !18} +!llvm.dbg.gv = !{!19} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 8, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (%struct.S1*, i32)* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"nm2.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"nm2.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 125693)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foobar", metadata !"foobar", metadata !"", metadata !1, i32 15, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, void ()* @foobar} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!8 = metadata !{null} +!9 = metadata !{i32 590081, metadata !0, metadata !"sp", metadata !1, i32 7, metadata !10, i32 0} ; [ DW_TAG_arg_variable ] +!10 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] +!11 = metadata !{i32 589846, metadata !2, metadata !"S1", metadata !1, i32 4, i64 0, i64 0, i64 0, i32 0, metadata !12} ; [ DW_TAG_typedef ] +!12 = metadata !{i32 589843, metadata !2, metadata !"S1", metadata !1, i32 1, i64 128, i64 64, i32 0, i32 0, i32 0, metadata !13, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!13 = metadata !{metadata !14, metadata !17} +!14 = metadata !{i32 589837, metadata !1, metadata !"m", metadata !1, i32 2, i64 64, i64 64, i64 0, i32 0, metadata !15} ; [ DW_TAG_member ] +!15 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !16} ; [ DW_TAG_pointer_type ] +!16 = metadata !{i32 589860, metadata !2, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!17 = metadata !{i32 589837, metadata !1, metadata !"nums", metadata !1, i32 3, i64 32, i64 32, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] +!18 = metadata !{i32 590081, metadata !0, metadata !"nums", metadata !1, i32 7, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!19 = metadata !{i32 589876, i32 0, metadata !2, metadata !"p", metadata !"p", metadata !"", metadata !1, i32 14, metadata !11, i32 0, i32 1, %struct.S1* @p} ; [ DW_TAG_variable ] +!20 = metadata !{i32 7, i32 13, metadata !0, null} +!21 = metadata !{i32 7, i32 21, metadata !0, null} +!22 = metadata !{i32 9, i32 3, metadata !23, null} +!23 = metadata !{i32 589835, metadata !0, i32 8, i32 1, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!24 = metadata !{metadata !"int", metadata !25} +!25 = metadata !{metadata !"omnipotent char", metadata !26} +!26 = metadata !{metadata !"Simple C/C++ TBAA", null} +!27 = metadata !{i32 10, i32 3, metadata !23, null} +!28 = metadata !{metadata !"any pointer", metadata !25} +!29 = metadata !{i32 11, i32 3, metadata !23, null} +!30 = metadata !{%struct.S1* @p} +!31 = metadata !{i32 7, i32 13, metadata !0, metadata !32} +!32 = metadata !{i32 16, i32 3, metadata !33, null} +!33 = metadata !{i32 589835, metadata !6, i32 15, i32 15, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!34 = metadata !{i32 1} +!35 = metadata !{i32 7, i32 21, metadata !0, metadata !32} +!36 = metadata !{i32 9, i32 3, metadata !23, metadata !32} +!37 = metadata !{i32 10, i32 3, metadata !23, metadata !32} +!38 = metadata !{i32 17, i32 1, metadata !33, null} diff --git a/test/CodeGen/X86/dbg-value-location.ll b/test/CodeGen/X86/dbg-value-location.ll new file mode 100644 index 0000000..87d7e91 --- /dev/null +++ b/test/CodeGen/X86/dbg-value-location.ll @@ -0,0 +1,70 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" +;Radar 8950491 + +;CHECK: .ascii "var" ## DW_AT_name +;CHECK-NEXT: .byte 0 +;CHECK-NEXT: ## DW_AT_decl_file +;CHECK-NEXT: ## DW_AT_decl_line +;CHECK-NEXT: ## DW_AT_type +;CHECK-NEXT: ## DW_AT_location + +@dfm = external global i32, align 4 + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +define i32 @foo(i32 %dev, i64 %cmd, i8* %data, i32 %data2) nounwind optsize ssp { +entry: + call void @llvm.dbg.value(metadata !{i32 %dev}, i64 0, metadata !12), !dbg !13 + %tmp.i = load i32* @dfm, align 4, !dbg !14 + %cmp.i = icmp eq i32 %tmp.i, 0, !dbg !14 + br i1 %cmp.i, label %if.else, label %if.end.i, !dbg !14 + +if.end.i: ; preds = %entry + switch i64 %cmd, label %if.then [ + i64 2147772420, label %bb.i + i64 536897538, label %bb116.i + ], !dbg !22 + +bb.i: ; preds = %if.end.i + unreachable + +bb116.i: ; preds = %if.end.i + unreachable + +if.then: ; preds = %if.end.i + ret i32 undef, !dbg !23 + +if.else: ; preds = %entry + ret i32 0 +} + +declare hidden fastcc i32 @bar(i32, i32* nocapture) nounwind optsize ssp +declare hidden fastcc i32 @bar2(i32) nounwind optsize ssp +declare hidden fastcc i32 @bar3(i32) nounwind optsize ssp +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0, !6, !7, !8} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 19510, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i64, i8*, i32)* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/f.c", metadata !"/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"f.i", metadata !"/tmp", metadata !"clang version 2.9 (trunk 124753)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"bar3", metadata !"bar3", metadata !"", metadata !1, i32 14827, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @bar3} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 589870, i32 0, metadata !1, metadata !"bar2", metadata !"bar2", metadata !"", metadata !1, i32 15397, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @bar2} ; [ DW_TAG_subprogram ] +!8 = metadata !{i32 589870, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"", metadata !1, i32 12382, metadata !9, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i32*)* @bar} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !10, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!10 = metadata !{metadata !11} +!11 = metadata !{i32 589860, metadata !2, metadata !"unsigned char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 8} ; [ DW_TAG_base_type ] +!12 = metadata !{i32 590081, metadata !0, metadata !"var", metadata !1, i32 19509, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!13 = metadata !{i32 19509, i32 20, metadata !0, null} +!14 = metadata !{i32 18091, i32 2, metadata !15, metadata !17} +!15 = metadata !{i32 589835, metadata !16, i32 18086, i32 1, metadata !1, i32 748} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo_bar", metadata !"foo_bar", metadata !"", metadata !1, i32 18086, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, null} ; [ DW_TAG_subprogram ] +!17 = metadata !{i32 19514, i32 2, metadata !18, null} +!18 = metadata !{i32 589835, metadata !0, i32 19510, i32 1, metadata !1, i32 99} ; [ DW_TAG_lexical_block ] +!22 = metadata !{i32 18094, i32 2, metadata !15, metadata !17} +!23 = metadata !{i32 19524, i32 1, metadata !18, null} diff --git a/test/CodeGen/X86/dbg-value-range.ll b/test/CodeGen/X86/dbg-value-range.ll new file mode 100644 index 0000000..2985224 --- /dev/null +++ b/test/CodeGen/X86/dbg-value-range.ll @@ -0,0 +1,56 @@ +; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s + +%struct.a = type { i32 } + +define i32 @bar(%struct.a* nocapture %b) nounwind ssp { +entry: + tail call void @llvm.dbg.value(metadata !{%struct.a* %b}, i64 0, metadata !6), !dbg !13 + %tmp1 = getelementptr inbounds %struct.a* %b, i64 0, i32 0, !dbg !14 + %tmp2 = load i32* %tmp1, align 4, !dbg !14, !tbaa !15 + tail call void @llvm.dbg.value(metadata !{i32 %tmp2}, i64 0, metadata !11), !dbg !14 + %call = tail call i32 (...)* @foo(i32 %tmp2) nounwind , !dbg !18 + %add = add nsw i32 %tmp2, 1, !dbg !19 + ret i32 %add, !dbg !19 +} + +declare i32 @foo(...) + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0} +!llvm.dbg.lv.bar = !{!6, !11} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (%struct.a*)* @bar} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"bar.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"bar.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 122997)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 590081, metadata !0, metadata !"b", metadata !1, i32 5, metadata !7, i32 0} ; [ DW_TAG_arg_variable ] +!7 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ] +!8 = metadata !{i32 589843, metadata !2, metadata !"a", metadata !1, i32 1, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !9, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!9 = metadata !{metadata !10} +!10 = metadata !{i32 589837, metadata !1, metadata !"c", metadata !1, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] +!11 = metadata !{i32 590080, metadata !12, metadata !"x", metadata !1, i32 6, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!12 = metadata !{i32 589835, metadata !0, i32 5, i32 22, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!13 = metadata !{i32 5, i32 19, metadata !0, null} +!14 = metadata !{i32 6, i32 14, metadata !12, null} +!15 = metadata !{metadata !"int", metadata !16} +!16 = metadata !{metadata !"omnipotent char", metadata !17} +!17 = metadata !{metadata !"Simple C/C++ TBAA", null} +!18 = metadata !{i32 7, i32 2, metadata !12, null} +!19 = metadata !{i32 8, i32 2, metadata !12, null} + +; check that variable bar:b value range is appropriately trucated in debug info. Here Ltmp5 is end of +; location range. + +;CHECK:Ltmp6 +;CHECK-NEXT: DEBUG_VALUE: bar:b <- undef + +;CHECK:Ldebug_loc0: +;CHECK-NEXT: .quad Ltmp +;CHECK-NEXT: .quad Ltmp6 +;CHECK-NEXT: .short 1 +;CHECK-NEXT: .byte 85 +;CHECK-NEXT: .quad 0 +;CHECK-NEXT: .quad 0 diff --git a/test/CodeGen/X86/div_const.ll b/test/CodeGen/X86/div_const.ll deleted file mode 100644 index f0ada41..0000000 --- a/test/CodeGen/X86/div_const.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: llc < %s -march=x86 | grep 365384439 - -define i32 @f9188_mul365384439_shift27(i32 %A) { - %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1] - ret i32 %tmp1 -} - diff --git a/test/CodeGen/X86/divide-by-constant.ll b/test/CodeGen/X86/divide-by-constant.ll new file mode 100644 index 0000000..fe335b9 --- /dev/null +++ b/test/CodeGen/X86/divide-by-constant.ll @@ -0,0 +1,62 @@ +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -asm-verbose=0 | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i686-pc-linux-gnu" + +define zeroext i16 @test1(i16 zeroext %x) nounwind { +entry: + %div = udiv i16 %x, 33 + ret i16 %div +; CHECK: test1: +; CHECK: imull $63551, %eax, %eax +; CHECK-NEXT: shrl $21, %eax +; CHECK-NEXT: ret +} + +define zeroext i16 @test2(i8 signext %x, i16 zeroext %c) nounwind readnone ssp noredzone { +entry: + %div = udiv i16 %c, 3 + ret i16 %div + +; CHECK: test2: +; CHECK: imull $43691, %eax, %eax +; CHECK-NEXT: shrl $17, %eax +; CHECK-NEXT: ret +} + +define zeroext i8 @test3(i8 zeroext %x, i8 zeroext %c) nounwind readnone ssp noredzone { +entry: + %div = udiv i8 %c, 3 + ret i8 %div + +; CHECK: test3: +; CHECK: movzbl 8(%esp), %eax +; CHECK-NEXT: imull $171, %eax, %eax +; CHECK-NEXT: shrl $9, %eax +; CHECK-NEXT: ret +} + +define signext i16 @test4(i16 signext %x) nounwind { +entry: + %div = sdiv i16 %x, 33 ; <i32> [#uses=1] + ret i16 %div +; CHECK: test4: +; CHECK: imull $1986, %eax, %eax +} + +define i32 @test5(i32 %A) nounwind { + %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1] + ret i32 %tmp1 +; CHECK: test5: +; CHECK: movl $365384439, %eax +; CHECK: mull 4(%esp) +} + +define signext i16 @test6(i16 signext %x) nounwind { +entry: + %div = sdiv i16 %x, 10 + ret i16 %div +; CHECK: test6: +; CHECK: imull $26215, %eax, %eax +; CHECK: shrl $31, %ecx +; CHECK: sarl $18, %eax +} diff --git a/test/CodeGen/X86/dll-linkage.ll b/test/CodeGen/X86/dll-linkage.ll index 9136175..a0c2a54 100644 --- a/test/CodeGen/X86/dll-linkage.ll +++ b/test/CodeGen/X86/dll-linkage.ll @@ -1,9 +1,14 @@ ; RUN: llc < %s -mtriple=i386-pc-mingw32 | FileCheck %s +; RUN: llc < %s -mtriple=i386-pc-mingw32 -O0 | FileCheck %s -check-prefix=FAST +; PR6275 + declare dllimport void @foo() define void @bar() nounwind { ; CHECK: calll *__imp__foo +; FAST: movl __imp__foo, [[R:%[a-z]{3}]] +; FAST: calll *[[R]] call void @foo() ret void } diff --git a/test/CodeGen/X86/fast-isel-cmp-branch.ll b/test/CodeGen/X86/fast-isel-cmp-branch.ll index 4ab1bc6..12312e8 100644 --- a/test/CodeGen/X86/fast-isel-cmp-branch.ll +++ b/test/CodeGen/X86/fast-isel-cmp-branch.ll @@ -1,13 +1,14 @@ -; RUN: llc -O0 -march=x86-64 -asm-verbose=false < %s | FileCheck %s +; RUN: llc -O0 -mtriple=x86_64-linux -asm-verbose=false < %s | FileCheck %s +; RUN: llc -O0 -mtriple=x86_64-win32 -asm-verbose=false < %s | FileCheck %s ; rdar://8337108 ; Fast-isel shouldn't try to look through the compare because it's in a ; different basic block, so its operands aren't necessarily exported ; for cross-block usage. -; CHECK: movb %al, 7(%rsp) +; CHECK: movb %al, [[OFS:[0-9]*]](%rsp) ; CHECK: callq {{_?}}bar -; CHECK: movb 7(%rsp), %al +; CHECK: movb [[OFS]](%rsp), %al declare void @bar() diff --git a/test/CodeGen/X86/fast-isel-gep.ll b/test/CodeGen/X86/fast-isel-gep.ll index 577dd72..fbe0243 100644 --- a/test/CodeGen/X86/fast-isel-gep.ll +++ b/test/CodeGen/X86/fast-isel-gep.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-linux -O0 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-win32 -O0 | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -march=x86 -O0 | FileCheck %s --check-prefix=X32 ; GEP indices are interpreted as signed integers, so they @@ -13,8 +14,8 @@ define i32 @test1(i32 %t3, i32* %t1) nounwind { ; X32: ret ; X64: test1: -; X64: movslq %edi, %rax -; X64: movl (%rsi,%rax,4), %eax +; X64: movslq %e[[A0:di|cx]], %rax +; X64: movl (%r[[A1:si|dx]],%rax,4), %eax ; X64: ret } @@ -27,7 +28,7 @@ define i32 @test2(i64 %t3, i32* %t1) nounwind { ; X32: ret ; X64: test2: -; X64: movl (%rsi,%rdi,4), %eax +; X64: movl (%r[[A1]],%r[[A0]],4), %eax ; X64: ret } @@ -47,7 +48,7 @@ entry: ; X32: ret ; X64: test3: -; X64: movb -2(%rdi), %al +; X64: movb -2(%r[[A0]]), %al ; X64: ret } @@ -70,3 +71,20 @@ entry: ; X64: test4: ; X64: 128(%r{{.*}},%r{{.*}},8) } + +; PR8961 - Make sure the sext for the GEP addressing comes before the load that +; is folded. +define i64 @test5(i8* %A, i32 %I, i64 %B) nounwind { + %v8 = getelementptr i8* %A, i32 %I + %v9 = bitcast i8* %v8 to i64* + %v10 = load i64* %v9 + %v11 = add i64 %B, %v10 + ret i64 %v11 +; X64: test5: +; X64: movslq %e[[A1]], %rax +; X64-NEXT: movq (%r[[A0]],%rax), %rax +; X64-NEXT: addq %{{rdx|r8}}, %rax +; X64-NEXT: ret +} + + diff --git a/test/CodeGen/X86/fp-in-intregs.ll b/test/CodeGen/X86/fp-in-intregs.ll index 08ea77d..6966cf0 100644 --- a/test/CodeGen/X86/fp-in-intregs.ll +++ b/test/CodeGen/X86/fp-in-intregs.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | not egrep {\(\(xor\|and\)ps\|movd\)} +; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s +; CHECK-NOT: {{((xor|and)ps|movd)}} ; These operations should be done in integer registers, eliminating constant ; pool loads, movd's etc. diff --git a/test/CodeGen/X86/gather-addresses.ll b/test/CodeGen/X86/gather-addresses.ll index 134ee28..4a6927f 100644 --- a/test/CodeGen/X86/gather-addresses.ll +++ b/test/CodeGen/X86/gather-addresses.ll @@ -1,20 +1,21 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-win32 < %s | FileCheck %s ; rdar://7398554 ; When doing vector gather-scatter index calculation with 32-bit indices, ; bounce the vector off of cache rather than shuffling each individual ; element out of the index vector. -; CHECK: andps (%rdx), %xmm0 -; CHECK: movaps %xmm0, -24(%rsp) -; CHECK: movslq -24(%rsp), %rax -; CHECK: movsd (%rdi,%rax,8), %xmm0 -; CHECK: movslq -20(%rsp), %rax -; CHECK: movhpd (%rdi,%rax,8), %xmm0 -; CHECK: movslq -16(%rsp), %rax -; CHECK: movsd (%rdi,%rax,8), %xmm1 -; CHECK: movslq -12(%rsp), %rax -; CHECK: movhpd (%rdi,%rax,8), %xmm1 +; CHECK: andps ([[H:%rdx|%r8]]), %xmm0 +; CHECK: movaps %xmm0, {{(-24)?}}(%rsp) +; CHECK: movslq {{(-24)?}}(%rsp), %rax +; CHECK: movsd ([[P:%rdi|%rcx]],%rax,8), %xmm0 +; CHECK: movslq {{-20|4}}(%rsp), %rax +; CHECK: movhpd ([[P]],%rax,8), %xmm0 +; CHECK: movslq {{-16|8}}(%rsp), %rax +; CHECK: movsd ([[P]],%rax,8), %xmm1 +; CHECK: movslq {{-12|12}}(%rsp), %rax +; CHECK: movhpd ([[P]],%rax,8), %xmm1 define <4 x double> @foo(double* %p, <4 x i32>* %i, <4 x i32>* %h) nounwind { %a = load <4 x i32>* %i diff --git a/test/CodeGen/X86/global-sections-tls.ll b/test/CodeGen/X86/global-sections-tls.ll index 2c23030..d5409a5 100644 --- a/test/CodeGen/X86/global-sections-tls.ll +++ b/test/CodeGen/X86/global-sections-tls.ll @@ -2,7 +2,7 @@ ; PR4639 @G1 = internal thread_local global i32 0 ; <i32*> [#uses=1] -; LINUX: .section .tbss,"awT",@nobits +; LINUX: .section .tbss,"awT",@nobits ; LINUX: G1: diff --git a/test/CodeGen/X86/global-sections.ll b/test/CodeGen/X86/global-sections.ll index 6d21191..d0a1b4d 100644 --- a/test/CodeGen/X86/global-sections.ll +++ b/test/CodeGen/X86/global-sections.ll @@ -15,7 +15,7 @@ ; const int G2 __attribute__((weak)) = 42; -@G2 = weak_odr constant i32 42 +@G2 = weak_odr unnamed_addr constant i32 42 ; TODO: linux drops this into .rodata, we drop it into ".gnu.linkonce.r.G2" @@ -26,7 +26,7 @@ ; int * const G3 = &G1; -@G3 = constant i32* @G1 +@G3 = unnamed_addr constant i32* @G1 ; DARWIN: .section __DATA,__const ; DARWIN: .globl _G3 @@ -41,7 +41,7 @@ ; _Complex long long const G4 = 34; -@G4 = constant {i64,i64} { i64 34, i64 0 } +@G4 = unnamed_addr constant {i64,i64} { i64 34, i64 0 } ; DARWIN: .section __TEXT,__const ; DARWIN: _G4: @@ -66,7 +66,7 @@ @"foo bar" = linkonce global i32 42 ; LINUX: .type foo_20_bar,@object -; LINUX:.section .gnu.linkonce.d.foo_20_bar,"aw",@progbits +; LINUX: .section .data.foo_20_bar,"aGw",@progbits,foo_20_bar,comdat ; LINUX: .weak foo_20_bar ; LINUX: foo_20_bar: @@ -76,10 +76,10 @@ ; DARWIN: "_foo bar": ; PR4650 -@G6 = weak_odr constant [1 x i8] c"\01" +@G6 = weak_odr unnamed_addr constant [1 x i8] c"\01" ; LINUX: .type G6,@object -; LINUX: .section .gnu.linkonce.r.G6,"a",@progbits +; LINUX: .section .rodata.G6,"aG",@progbits,G6,comdat ; LINUX: .weak G6 ; LINUX: G6: ; LINUX: .byte 1 @@ -92,14 +92,14 @@ ; DARWIN: .byte 1 -@G7 = constant [10 x i8] c"abcdefghi\00" +@G7 = unnamed_addr constant [10 x i8] c"abcdefghi\00" ; DARWIN: __TEXT,__cstring,cstring_literals ; DARWIN: .globl _G7 ; DARWIN: _G7: ; DARWIN: .asciz "abcdefghi" -; LINUX: .section .rodata.str1.1,"aMS",@progbits,1 +; LINUX: .section .rodata.str1.1,"aMS",@progbits,1 ; LINUX: .globl G7 ; LINUX: G7: ; LINUX: .asciz "abcdefghi" @@ -108,22 +108,22 @@ ; LINUX-SECTIONS: .globl G7 -@G8 = constant [4 x i16] [ i16 1, i16 2, i16 3, i16 0 ] +@G8 = unnamed_addr constant [4 x i16] [ i16 1, i16 2, i16 3, i16 0 ] ; DARWIN: .section __TEXT,__const ; DARWIN: .globl _G8 ; DARWIN: _G8: -; LINUX: .section .rodata.str2.2,"aMS",@progbits,2 +; LINUX: .section .rodata.str2.2,"aMS",@progbits,2 ; LINUX: .globl G8 ; LINUX:G8: -@G9 = constant [4 x i32] [ i32 1, i32 2, i32 3, i32 0 ] +@G9 = unnamed_addr constant [4 x i32] [ i32 1, i32 2, i32 3, i32 0 ] ; DARWIN: .globl _G9 ; DARWIN: _G9: -; LINUX: .section .rodata.str4.4,"aMS",@progbits,4 +; LINUX: .section .rodata.str4.4,"aMS",@progbits,4 ; LINUX: .globl G9 ; LINUX:G9 diff --git a/test/CodeGen/X86/i128-ret.ll b/test/CodeGen/X86/i128-ret.ll index 277f428..264f07c 100644 --- a/test/CodeGen/X86/i128-ret.ll +++ b/test/CodeGen/X86/i128-ret.ll @@ -1,5 +1,7 @@ -; RUN: llc < %s -march=x86-64 | grep {movq 8(%rdi), %rdx} -; RUN: llc < %s -march=x86-64 | grep {movq (%rdi), %rax} +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s +; CHECK: movq ([[A0:%rdi|%rcx]]), %rax +; CHECK: movq 8([[A0]]), %rdx define i128 @test(i128 *%P) { %A = load i128* %P diff --git a/test/CodeGen/X86/iabs.ll b/test/CodeGen/X86/iabs.ll index 6a79ee8..a8ba015 100644 --- a/test/CodeGen/X86/iabs.ll +++ b/test/CodeGen/X86/iabs.ll @@ -1,12 +1,11 @@ ; RUN: llc < %s -march=x86-64 -stats |& \ -; RUN: grep {6 .*Number of machine instrs printed} +; RUN: grep {5 .*Number of machine instrs printed} ;; Integer absolute value, should produce something at least as good as: -;; movl %edi, %eax -;; sarl $31, %eax -;; addl %eax, %edi -;; xorl %eax, %edi -;; movl %edi, %eax +;; movl %edi, %ecx +;; sarl $31, %ecx +;; leal (%rdi,%rcx), %eax +;; xorl %ecx, %eax ;; ret define i32 @test(i32 %a) nounwind { %tmp1neg = sub i32 0, %a diff --git a/test/CodeGen/X86/inline-asm-h.ll b/test/CodeGen/X86/inline-asm-h.ll new file mode 100644 index 0000000..53cf419 --- /dev/null +++ b/test/CodeGen/X86/inline-asm-h.ll @@ -0,0 +1,12 @@ +; RUN: llc -mtriple=x86_64-pc-linux-gnu < %s | FileCheck %s + +@foobar = common global i32 0, align 4 + +define void @zed() nounwind { +entry: + call void asm "movq %mm2,${0:H}", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* @foobar) nounwind + ret void +} + +; CHECK: zed +; CHECK: movq %mm2,foobar+8(%rip) diff --git a/test/CodeGen/X86/inline-asm-ptr-cast.ll b/test/CodeGen/X86/inline-asm-ptr-cast.ll new file mode 100644 index 0000000..50e3021 --- /dev/null +++ b/test/CodeGen/X86/inline-asm-ptr-cast.ll @@ -0,0 +1,27 @@ +; RUN: llc -mtriple=x86_64-unknown-linux-gnu <%s +; ModuleID = 'bug.c' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +@func.flagmask = internal constant i64 1, align 8 + +define void @func() nounwind { +entry: + %src = alloca i32, align 4 + %dst = alloca i32, align 4 + %flags = alloca i64, align 8 + %newflags = alloca i64, align 8 + store i32 0, i32* %src, align 4 + store i32 0, i32* %dst, align 4 + store i64 1, i64* %flags, align 8 + store i64 -1, i64* %newflags, align 8 + %0 = bitcast i32* %dst to i8* + %tmp = load i64* %flags, align 8 + %and = and i64 %tmp, 1 + %1 = bitcast i32* %src to i8* + %tmp1 = load i8* %1 + %2 = bitcast i32* %dst to i8* + %tmp2 = load i8* %2 + call void asm "pushfq \0Aandq $2, (%rsp) \0Aorq $3, (%rsp) \0Apopfq \0Aaddb $4, $1 \0Apushfq \0Apopq $0 \0A", "=*&rm,=*&rm,i,r,r,1,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %newflags, i8* %0, i64 -2, i64 %and, i8 %tmp1, i8 %tmp2) nounwind + ret void +} diff --git a/test/CodeGen/X86/insertelement-legalize.ll b/test/CodeGen/X86/insertelement-legalize.ll index 18aade2..3805cbb 100644 --- a/test/CodeGen/X86/insertelement-legalize.ll +++ b/test/CodeGen/X86/insertelement-legalize.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-mmx +; RUN: llc < %s -march=x86 ; Test to check that we properly legalize an insert vector element define void @test(<2 x i64> %val, <2 x i64>* %dst, i64 %x) nounwind { diff --git a/test/CodeGen/X86/lea.ll b/test/CodeGen/X86/lea.ll index 22a9644..5421355 100644 --- a/test/CodeGen/X86/lea.ll +++ b/test/CodeGen/X86/lea.ll @@ -1,11 +1,12 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s define i32 @test1(i32 %x) nounwind { %tmp1 = shl i32 %x, 3 %tmp2 = add i32 %tmp1, 7 ret i32 %tmp2 ; CHECK: test1: -; CHECK: leal 7(,%rdi,8), %eax +; CHECK: leal 7(,[[A0:%rdi|%rcx]],8), %eax } @@ -27,8 +28,8 @@ bb.nph: bb2: ret i32 %x_offs ; CHECK: test2: -; CHECK: leal -5(%rdi), %eax +; CHECK: leal -5([[A0]]), %eax ; CHECK: andl $-4, %eax ; CHECK: negl %eax -; CHECK: leal -4(%rdi,%rax), %eax +; CHECK: leal -4([[A0]],%rax), %eax } diff --git a/test/CodeGen/X86/legalize-sub-zero-2.ll b/test/CodeGen/X86/legalize-sub-zero-2.ll new file mode 100644 index 0000000..f02ca71 --- /dev/null +++ b/test/CodeGen/X86/legalize-sub-zero-2.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin + +define fastcc void @foo(i32 %type) nounwind optsize { +entry: + switch i32 %type, label %bb26 [ + i32 33634, label %bb11 + i32 5121, label %bb27 + ] + +bb11: ; preds = %entry + br label %bb27 + +bb26: ; preds = %entry + unreachable + +bb27: ; preds = %bb11, %entry + %srcpb.0 = phi i32 [ 1, %bb11 ], [ 0, %entry ] + br i1 undef, label %bb348, label %bb30.lr.ph + +bb30.lr.ph: ; preds = %bb27 + %.sum743 = shl i32 %srcpb.0, 1 + %0 = mul i32 %srcpb.0, -2 + %.sum745 = add i32 %.sum743, %0 + br i1 undef, label %bb70, label %bb71 + +bb70: ; preds = %bb30.lr.ph + unreachable + +bb71: ; preds = %bb30.lr.ph + br i1 undef, label %bb92, label %bb80 + +bb80: ; preds = %bb71 + unreachable + +bb92: ; preds = %bb71 + %1 = getelementptr inbounds i8* undef, i32 %.sum745 + unreachable + +bb348: ; preds = %bb27 + ret void +} diff --git a/test/CodeGen/X86/legalize-sub-zero.ll b/test/CodeGen/X86/legalize-sub-zero.ll new file mode 100644 index 0000000..ee76d46 --- /dev/null +++ b/test/CodeGen/X86/legalize-sub-zero.ll @@ -0,0 +1,35 @@ +; RUN: llc < %s -mtriple=i686-pc-win32 + +;target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +;target triple = "i686-pc-win32" + +define void @test() nounwind { + %1 = fdiv <3 x double> zeroinitializer, undef + %2 = fdiv <2 x double> zeroinitializer, undef + %3 = shufflevector <2 x double> %2, <2 x double> undef, <3 x i32> <i32 0, i32 +1, i32 undef> + %4 = insertelement <3 x double> %3, double undef, i32 2 + %5 = bitcast <3 x double> %1 to <3 x i64> + %6 = bitcast <3 x double> %4 to <3 x i64> + %7 = sub <3 x i64> %5, %6 + %8 = shufflevector <3 x i64> %7, <3 x i64> undef, <2 x i32> <i32 0, i32 1> + %9 = xor <2 x i64> %8, zeroinitializer + %10 = add nsw <2 x i64> %9, zeroinitializer + %11 = shufflevector <2 x i64> %10, <2 x i64> undef, <3 x i32> <i32 0, i32 1, +i32 undef> + %12 = insertelement <3 x i64> %11, i64 0, i32 2 + %13 = shufflevector <3 x i64> %12, <3 x i64> undef, <4 x i32> <i32 0, i32 1, +i32 2, i32 3> + %14 = shufflevector <4 x i64> %13, <4 x i64> undef, <2 x i32> <i32 0, i32 1> + %15 = bitcast <2 x i64> %14 to <4 x i32> + %16 = shufflevector <4 x i32> %15, <4 x i32> undef, <4 x i32> <i32 0, i32 2, +i32 0, i32 2> + %17 = bitcast <4 x i32> %16 to <2 x i64> + %18 = shufflevector <2 x i64> %17, <2 x i64> undef, <2 x i32> <i32 0, i32 2> + %19 = bitcast <2 x i64> %18 to <4 x i32> + %20 = shufflevector <4 x i32> %19, <4 x i32> undef, <3 x i32> <i32 0, i32 1, +i32 2> + %21 = or <3 x i32> %20, zeroinitializer + store <3 x i32> %21, <3 x i32> addrspace(1)* undef, align 16 + ret void +} diff --git a/test/CodeGen/X86/legalizedag_vec.ll b/test/CodeGen/X86/legalizedag_vec.ll index 028627d..dff6931 100644 --- a/test/CodeGen/X86/legalizedag_vec.ll +++ b/test/CodeGen/X86/legalizedag_vec.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=sse2 | FileCheck %s ; Test case for r63760 where we generate a legalization assert that an illegal diff --git a/test/CodeGen/X86/licm-symbol.ll b/test/CodeGen/X86/licm-symbol.ll index 08306c2..c3d1938 100644 --- a/test/CodeGen/X86/licm-symbol.ll +++ b/test/CodeGen/X86/licm-symbol.ll @@ -3,7 +3,7 @@ ; MachineLICM should be able to hoist the sF reference out of the loop. ; CHECK: pushl %esi -; CHECK: subl $4, %esp +; CHECK: pushl ; CHECK: movl $176, %esi ; CHECK: addl L___sF$non_lazy_ptr, %esi ; CHECK: .align 4, 0x90 diff --git a/test/CodeGen/X86/loop-blocks.ll b/test/CodeGen/X86/loop-blocks.ll index 354d082..faba630 100644 --- a/test/CodeGen/X86/loop-blocks.ll +++ b/test/CodeGen/X86/loop-blocks.ll @@ -70,6 +70,7 @@ exit: ; Same as slightly_more_involved, but block_a is now a CFG diamond with ; fallthrough edges which should be preserved. +; "callq block_a_merge_func" is tail duped. ; CHECK: yet_more_involved: ; CHECK: jmp .LBB2_1 @@ -78,12 +79,12 @@ exit: ; CHECK-NEXT: callq bar99 ; CHECK-NEXT: callq get ; CHECK-NEXT: cmpl $2999, %eax -; CHECK-NEXT: jg .LBB2_6 -; CHECK-NEXT: callq block_a_true_func -; CHECK-NEXT: jmp .LBB2_7 -; CHECK-NEXT: .LBB2_6: +; CHECK-NEXT: jle .LBB2_5 ; CHECK-NEXT: callq block_a_false_func -; CHECK-NEXT: .LBB2_7: +; CHECK-NEXT: callq block_a_merge_func +; CHECK-NEXT: jmp .LBB2_1 +; CHECK-NEXT: .LBB2_5: +; CHECK-NEXT: callq block_a_true_func ; CHECK-NEXT: callq block_a_merge_func ; CHECK-NEXT: .LBB2_1: ; CHECK-NEXT: callq body diff --git a/test/CodeGen/X86/lsr-overflow.ll b/test/CodeGen/X86/lsr-overflow.ll index 0b0214c..5bc4f7e 100644 --- a/test/CodeGen/X86/lsr-overflow.ll +++ b/test/CodeGen/X86/lsr-overflow.ll @@ -1,10 +1,11 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; The comparison uses the pre-inc value, which could lead LSR to ; try to compute -INT64_MIN. ; CHECK: movabsq $-9223372036854775808, %rax -; CHECK: cmpq %rax, %rbx +; CHECK: cmpq %rax, ; CHECK: sete %al declare i64 @bar() diff --git a/test/CodeGen/X86/lsr-quadratic-expand.ll b/test/CodeGen/X86/lsr-quadratic-expand.ll new file mode 100644 index 0000000..2bbb470 --- /dev/null +++ b/test/CodeGen/X86/lsr-quadratic-expand.ll @@ -0,0 +1,22 @@ +; RUN: llc -march=x86-64 < %s + +define void @dw2102_i2c_transfer() nounwind { +entry: + br label %bb + +bb: ; preds = %bb, %entry + %z = phi i64 [ 0, %entry ], [ %z3, %bb ] + %z1 = phi i16 [ undef, %entry ], [ %z6, %bb ] + %z2 = phi i32 [ 0, %entry ], [ %z8, %bb ] + %z3 = add i64 %z, 1 + %z4 = zext i16 %z1 to i32 + %z5 = add nsw i32 %z4, %z2 + %z6 = trunc i32 %z5 to i16 + call fastcc void @dw210x_op_rw(i16 zeroext %z6) + %z7 = getelementptr i8* null, i64 %z + store i8 undef, i8* %z7, align 1 + %z8 = add nsw i32 %z2, 1 + br label %bb +} + +declare fastcc void @dw210x_op_rw(i16 zeroext) nounwind diff --git a/test/CodeGen/X86/lsr-redundant-addressing.ll b/test/CodeGen/X86/lsr-redundant-addressing.ll new file mode 100644 index 0000000..aaa1426 --- /dev/null +++ b/test/CodeGen/X86/lsr-redundant-addressing.ll @@ -0,0 +1,45 @@ +; RUN: llc -march=x86-64 < %s | fgrep {addq $-16,} | count 1 +; rdar://9081094 + +; LSR shouldn't create lots of redundant address computations. + +%0 = type { i32, [3 x i32] } +%1 = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* } + +@pgm = external hidden unnamed_addr global [5 x %0], align 32 +@isa = external hidden unnamed_addr constant [13 x %1], align 32 + +define void @main_bb.i() nounwind { +bb: + br label %bb38 + +bb38: ; preds = %bb200, %bb + %tmp39 = phi i64 [ %tmp201, %bb200 ], [ 0, %bb ] + %tmp40 = sub i64 0, %tmp39 + %tmp47 = getelementptr [5 x %0]* @pgm, i64 0, i64 %tmp40, i32 0 + %tmp34 = load i32* %tmp47, align 16 + %tmp203 = icmp slt i32 %tmp34, 12 + br i1 %tmp203, label %bb215, label %bb200 + +bb200: ; preds = %bb38 + %tmp201 = add i64 %tmp39, 1 + br label %bb38 + +bb215: ; preds = %bb38 + %tmp50 = getelementptr [5 x %0]* @pgm, i64 0, i64 %tmp40, i32 1, i64 2 + %tmp49 = getelementptr [5 x %0]* @pgm, i64 0, i64 %tmp40, i32 1, i64 1 + %tmp48 = getelementptr [5 x %0]* @pgm, i64 0, i64 %tmp40, i32 1, i64 0 + %tmp216 = add nsw i32 %tmp34, 1 + store i32 %tmp216, i32* %tmp47, align 16 + %tmp217 = sext i32 %tmp216 to i64 + %tmp218 = getelementptr inbounds [13 x %1]* @isa, i64 0, i64 %tmp217, i32 3, i64 0 + %tmp219 = load i32* %tmp218, align 8 + store i32 %tmp219, i32* %tmp48, align 4 + %tmp220 = getelementptr inbounds [13 x %1]* @isa, i64 0, i64 %tmp217, i32 3, i64 1 + %tmp221 = load i32* %tmp220, align 4 + store i32 %tmp221, i32* %tmp49, align 4 + %tmp222 = getelementptr inbounds [13 x %1]* @isa, i64 0, i64 %tmp217, i32 3, i64 2 + %tmp223 = load i32* %tmp222, align 8 + store i32 %tmp223, i32* %tmp50, align 4 + ret void +} diff --git a/test/CodeGen/X86/lsr-reuse-trunc.ll b/test/CodeGen/X86/lsr-reuse-trunc.ll index d1d7144..29f03d6 100644 --- a/test/CodeGen/X86/lsr-reuse-trunc.ll +++ b/test/CodeGen/X86/lsr-reuse-trunc.ll @@ -1,12 +1,13 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; Full strength reduction wouldn't reduce register pressure, so LSR should ; stick with indexing here. -; CHECK: movaps (%rsi,%rax,4), %xmm3 -; CHECK: movaps %xmm3, (%rdi,%rax,4) +; CHECK: movaps (%{{rsi|rdx}},%rax,4), %xmm3 +; CHECK: movaps %xmm3, (%{{rdi|rcx}},%rax,4) ; CHECK: addq $4, %rax -; CHECK: cmpl %eax, (%rdx) +; CHECK: cmpl %eax, (%{{rdx|r8}}) ; CHECK-NEXT: jg define void @vvfloorf(float* nocapture %y, float* nocapture %x, i32* nocapture %n) nounwind { diff --git a/test/CodeGen/X86/machine-cse.ll b/test/CodeGen/X86/machine-cse.ll index a8afdc8..e284776 100644 --- a/test/CodeGen/X86/machine-cse.ll +++ b/test/CodeGen/X86/machine-cse.ll @@ -37,3 +37,43 @@ bb3: declare void @bar(i32*) declare fastcc i8* @foo(%struct.s2*) nounwind + +; rdar://8773371 + +declare void @printf(...) nounwind + +define void @commute(i32 %test_case, i32 %scale) nounwind ssp { +; CHECK: commute: +entry: + switch i32 %test_case, label %sw.bb307 [ + i32 1, label %sw.bb + i32 2, label %sw.bb + i32 3, label %sw.bb + ] + +sw.bb: ; preds = %entry, %entry, %entry + %mul = mul nsw i32 %test_case, 3 + %mul20 = mul nsw i32 %mul, %scale + br i1 undef, label %if.end34, label %sw.bb307 + +if.end34: ; preds = %sw.bb +; CHECK: %if.end34 +; CHECK: imull +; CHECK: leal +; CHECK-NOT: imull + tail call void (...)* @printf(i32 %test_case, i32 %mul20) nounwind + %tmp = mul i32 %scale, %test_case + %tmp752 = mul i32 %tmp, 3 + %tmp753 = zext i32 %tmp752 to i64 + br label %bb.nph743.us + +for.body53.us: ; preds = %bb.nph743.us, %for.body53.us + %exitcond = icmp eq i64 undef, %tmp753 + br i1 %exitcond, label %bb.nph743.us, label %for.body53.us + +bb.nph743.us: ; preds = %for.body53.us, %if.end34 + br label %for.body53.us + +sw.bb307: ; preds = %sw.bb, %entry + ret void +} diff --git a/test/CodeGen/X86/memcmp.ll b/test/CodeGen/X86/memcmp.ll index 36be1f3..f4bc1bb 100644 --- a/test/CodeGen/X86/memcmp.ll +++ b/test/CodeGen/X86/memcmp.ll @@ -1,4 +1,5 @@ -; RUN: llc %s -o - -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; This tests codegen time inlining/optimization of memcmp ; rdar://6480398 @@ -20,8 +21,8 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp2: -; CHECK: movw (%rdi), %ax -; CHECK: cmpw (%rsi), %ax +; CHECK: movw ([[A0:%rdi|%rcx]]), %ax +; CHECK: cmpw ([[A1:%rsi|%rdx]]), %ax } define void @memcmp2a(i8* %X, i32* nocapture %P) nounwind { @@ -37,7 +38,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp2a: -; CHECK: cmpw $28527, (%rdi) +; CHECK: cmpw $28527, ([[A0]]) } @@ -54,8 +55,8 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp4: -; CHECK: movl (%rdi), %eax -; CHECK: cmpl (%rsi), %eax +; CHECK: movl ([[A0]]), %eax +; CHECK: cmpl ([[A1]]), %eax } define void @memcmp4a(i8* %X, i32* nocapture %P) nounwind { @@ -71,7 +72,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp4a: -; CHECK: cmpl $1869573999, (%rdi) +; CHECK: cmpl $1869573999, ([[A0]]) } define void @memcmp8(i8* %X, i8* %Y, i32* nocapture %P) nounwind { @@ -87,8 +88,8 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp8: -; CHECK: movq (%rdi), %rax -; CHECK: cmpq (%rsi), %rax +; CHECK: movq ([[A0]]), %rax +; CHECK: cmpq ([[A1]]), %rax } define void @memcmp8a(i8* %X, i32* nocapture %P) nounwind { @@ -105,6 +106,6 @@ return: ; preds = %entry ret void ; CHECK: memcmp8a: ; CHECK: movabsq $8029759185026510694, %rax -; CHECK: cmpq %rax, (%rdi) +; CHECK: cmpq %rax, ([[A0]]) } diff --git a/test/CodeGen/X86/memcpy.ll b/test/CodeGen/X86/memcpy.ll index 7bc31be..72342cb 100644 --- a/test/CodeGen/X86/memcpy.ll +++ b/test/CodeGen/X86/memcpy.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=DARWIN declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind @@ -9,8 +10,8 @@ entry: tail call void @llvm.memcpy.p0i8.p0i8.i64( i8* %a, i8* %b, i64 %n, i32 1, i1 0 ) ret i8* %a -; CHECK: test1: -; CHECK: memcpy +; LINUX: test1: +; LINUX: memcpy } ; Variable memcpy's should lower to calls. @@ -21,18 +22,41 @@ entry: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp14, i8* %tmp25, i64 %n, i32 8, i1 0 ) ret i8* %tmp14 -; CHECK: test2: -; CHECK: memcpy +; LINUX: test2: +; LINUX: memcpy } ; Large constant memcpy's should lower to a call when optimizing for size. ; PR6623 + +; On the other hand, Darwin's definition of -Os is optimizing for size without +; hurting performance so it should just ignore optsize when expanding memcpy. +; rdar://8821501 define void @test3(i8* nocapture %A, i8* nocapture %B) nounwind optsize noredzone { entry: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %A, i8* %B, i64 64, i32 1, i1 false) ret void -; CHECK: test3: -; CHECK: memcpy +; LINUX: test3: +; LINUX: memcpy + +; DARWIN: test3: +; DARWIN-NOT: memcpy +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq } ; Large constant memcpy's should be inlined when not optimizing for size. @@ -40,18 +64,18 @@ define void @test4(i8* nocapture %A, i8* nocapture %B) nounwind noredzone { entry: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %A, i8* %B, i64 64, i32 1, i1 false) ret void -; CHECK: test4: -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq +; LINUX: test4: +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq } diff --git a/test/CodeGen/X86/memset-2.ll b/test/CodeGen/X86/memset-2.ll index 692965f..993583b 100644 --- a/test/CodeGen/X86/memset-2.ll +++ b/test/CodeGen/X86/memset-2.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=i386-apple-darwin < %s | FileCheck %s +; RUN: llc -mtriple=i386-apple-darwin -mcpu=yonah < %s | FileCheck %s declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind @@ -17,3 +17,23 @@ entry: call void @llvm.memset.i32( i8* undef, i8 %c, i32 76, i32 1 ) nounwind unreachable } + +declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind + +define void @t3(i8* nocapture %s, i8 %a) nounwind { +entry: + tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 8, i32 1, i1 false) + ret void +; CHECK: t3: +; CHECK: imull $16843009 +} + +define void @t4(i8* nocapture %s, i8 %a) nounwind { +entry: + tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 15, i32 1, i1 false) + ret void +; CHECK: t4: +; CHECK: imull $16843009 +; CHECK-NOT: imul +; CHECK: ret +} diff --git a/test/CodeGen/X86/memset64-on-x86-32.ll b/test/CodeGen/X86/memset64-on-x86-32.ll index c0cd271..3f069b4 100644 --- a/test/CodeGen/X86/memset64-on-x86-32.ll +++ b/test/CodeGen/X86/memset64-on-x86-32.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=nehalem | grep movaps | count 5 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=nehalem | grep movups | count 5 ; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=core2 | grep movl | count 20 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | grep movq | count 10 diff --git a/test/CodeGen/X86/misaligned-memset.ll b/test/CodeGen/X86/misaligned-memset.ll new file mode 100644 index 0000000..21f8bf2 --- /dev/null +++ b/test/CodeGen/X86/misaligned-memset.ll @@ -0,0 +1,15 @@ +; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=nehalem < %s | FileCheck %s + +@a = common global [3 x i64] zeroinitializer, align 16 + +define i32 @main() nounwind ssp { +; CHECK: movups +entry: + %retval = alloca i32, align 4 + store i32 0, i32* %retval + call void @llvm.memset.p0i8.i64(i8* bitcast (i64* getelementptr inbounds ([3 x i64]* @a, i32 0, i64 1) to i8*), i8 0, i64 16, i32 1, i1 false) + %0 = load i32* %retval + ret i32 %0 +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/movgs.ll b/test/CodeGen/X86/movgs.ll index 00190e8..97b7fe7 100644 --- a/test/CodeGen/X86/movgs.ll +++ b/test/CodeGen/X86/movgs.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 -mattr=sse41 | FileCheck %s --check-prefix=X32 -; RUN: llc < %s -march=x86-64 -mattr=sse41 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-linux -mattr=sse41 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse41 | FileCheck %s --check-prefix=X64 define i32 @test1() nounwind readonly { entry: @@ -30,7 +31,7 @@ entry: ; X32: calll *%gs:(%eax) ; X64: test2: -; X64: callq *%gs:(%rdi) +; X64: callq *%gs:([[A0:%rdi|%rcx]]) @@ -50,7 +51,7 @@ entry: ; X32: ret ; X64: pmovsxwd_1: -; X64: pmovsxwd %gs:(%rdi), %xmm0 +; X64: pmovsxwd %gs:([[A0]]), %xmm0 ; X64: ret } diff --git a/test/CodeGen/X86/narrow-shl-load.ll b/test/CodeGen/X86/narrow-shl-load.ll index 53b0388..ef27cbc 100644 --- a/test/CodeGen/X86/narrow-shl-load.ll +++ b/test/CodeGen/X86/narrow-shl-load.ll @@ -6,7 +6,7 @@ target triple = "x86_64-pc-linux-gnu" ; DAGCombiner should fold this code in finite time. ; rdar://8606584 -define void @D() nounwind readnone { +define void @test1() nounwind readnone { bb.nph: br label %while.cond @@ -33,10 +33,10 @@ while.end: ; preds = %while.cond ; DAGCombiner shouldn't fold the sdiv (ashr) away. ; rdar://8636812 -; CHECK: main: +; CHECK: test2: ; CHECK: sarl -define i32 @main() nounwind { +define i32 @test2() nounwind { entry: %i = alloca i32, align 4 %j = alloca i8, align 1 @@ -63,3 +63,21 @@ if.end: ; preds = %entry declare void @abort() noreturn declare void @exit(i32) noreturn + +; DAG Combiner can't fold this into a load of the 1'th byte. +; PR8757 +define i32 @test3(i32 *%P) nounwind ssp { + volatile store i32 128, i32* %P + %tmp4.pre = load i32* %P + %phitmp = trunc i32 %tmp4.pre to i16 + %phitmp13 = shl i16 %phitmp, 8 + %phitmp14 = ashr i16 %phitmp13, 8 + %phitmp15 = lshr i16 %phitmp14, 8 + %phitmp16 = zext i16 %phitmp15 to i32 + ret i32 %phitmp16 + +; CHECK: movl $128, (%rdi) +; CHECK-NEXT: movsbl (%rdi), %eax +; CHECK-NEXT: movzbl %ah, %eax +; CHECK-NEXT: ret +} diff --git a/test/CodeGen/X86/negative-sin.ll b/test/CodeGen/X86/negative-sin.ll index 7842eb8..76e557b 100644 --- a/test/CodeGen/X86/negative-sin.ll +++ b/test/CodeGen/X86/negative-sin.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -enable-unsafe-fp-math -march=x86-64 | \ -; RUN: not egrep {addsd|subsd|xor} +; RUN: llc < %s -enable-unsafe-fp-math -march=x86-64 | FileCheck %s +; CHECK-NOT: {{addsd|subsd|xor}} declare double @sin(double %f) diff --git a/test/CodeGen/X86/optimize-max-3.ll b/test/CodeGen/X86/optimize-max-3.ll index f1e3c27..b90413d 100644 --- a/test/CodeGen/X86/optimize-max-3.ll +++ b/test/CodeGen/X86/optimize-max-3.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -asm-verbose=false | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 -asm-verbose=false | FileCheck %s ; LSR's OptimizeMax should eliminate the select (max). @@ -40,13 +41,13 @@ for.end: ; preds = %for.body, %entry ; CHECK: jle ; CHECK-NOT: cmov -; CHECK: xorl %edi, %edi +; CHECK: xorl {{%edi, %edi|%ecx, %ecx}} ; CHECK-NEXT: align ; CHECK-NEXT: BB1_2: ; CHECK-NEXT: callq -; CHECK-NEXT: incl %ebx -; CHECK-NEXT: cmpl %r14d, %ebx -; CHECK-NEXT: movq %rax, %rdi +; CHECK-NEXT: incl [[BX:%ebx|%esi]] +; CHECK-NEXT: cmpl [[R14:%r14d|%edi]], [[BX]] +; CHECK-NEXT: movq %rax, %r{{di|cx}} ; CHECK-NEXT: jl define void @_Z18GenerateStatusPagei(i32 %jobs_to_display) nounwind { diff --git a/test/CodeGen/X86/phi-bit-propagation.ll b/test/CodeGen/X86/phi-bit-propagation.ll new file mode 100644 index 0000000..94c9722 --- /dev/null +++ b/test/CodeGen/X86/phi-bit-propagation.ll @@ -0,0 +1,55 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s + +%"class.std::bitset" = type { [8 x i8] } + +define zeroext i1 @_Z3fooPjmS_mRSt6bitsetILm32EE(i32* nocapture %a, i64 %asize, i32* nocapture %b, i64 %bsize, %"class.std::bitset"* %bits) nounwind readonly ssp noredzone { +entry: + %tmp.i.i.i.i = bitcast %"class.std::bitset"* %bits to i64* + br label %for.cond + +for.cond: ; preds = %for.inc, %entry + %0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ] + %conv = zext i32 %0 to i64 + %cmp = icmp eq i64 %conv, %bsize + br i1 %cmp, label %return, label %for.body + +for.body: ; preds = %for.cond + %arrayidx = getelementptr inbounds i32* %b, i64 %conv + %tmp5 = load i32* %arrayidx, align 4 + %conv6 = zext i32 %tmp5 to i64 + %rem.i.i.i.i = and i64 %conv6, 63 + %tmp3.i = load i64* %tmp.i.i.i.i, align 8 + %shl.i.i = shl i64 1, %rem.i.i.i.i + %and.i = and i64 %shl.i.i, %tmp3.i + %cmp.i = icmp eq i64 %and.i, 0 + br i1 %cmp.i, label %for.inc, label %return + +for.inc: ; preds = %for.body + %inc = add i32 %0, 1 + br label %for.cond + +return: ; preds = %for.body, %for.cond +; CHECK-NOT: and + %retval.0 = phi i1 [ true, %for.body ], [ false, %for.cond ] + ret i1 %retval.0 +} + +; This test case caused an assertion failure; see PR9324. +define void @func_37() noreturn nounwind ssp { +entry: + br i1 undef, label %lbl_919, label %entry.for.inc_crit_edge + +entry.for.inc_crit_edge: ; preds = %entry + br label %for.inc + +lbl_919: ; preds = %for.cond7.preheader, %entry + br label %for.cond7.preheader + +for.cond7.preheader: ; preds = %for.inc, %lbl_919 + %storemerge.ph = phi i8 [ 0, %lbl_919 ], [ %add, %for.inc ] + br i1 undef, label %for.inc, label %lbl_919 + +for.inc: ; preds = %for.cond7.preheader, %entry.for.inc_crit_edge + %add = add i8 undef, 1 + br label %for.cond7.preheader +} diff --git a/test/CodeGen/X86/pic_jumptable.ll b/test/CodeGen/X86/pic_jumptable.ll index 31071bc..b6761e3 100644 --- a/test/CodeGen/X86/pic_jumptable.ll +++ b/test/CodeGen/X86/pic_jumptable.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text +; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | grep -F .text._Z3fooILi1EEvi,"axG",@progbits,_Z3fooILi1EEvi,comdat ; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI' ; rdar://6971437 diff --git a/test/CodeGen/X86/popcnt.ll b/test/CodeGen/X86/popcnt.ll new file mode 100644 index 0000000..430214c --- /dev/null +++ b/test/CodeGen/X86/popcnt.ll @@ -0,0 +1,38 @@ +; RUN: llc -march=x86-64 -mattr=+popcnt < %s | FileCheck %s + +define i8 @cnt8(i8 %x) nounwind readnone { + %cnt = tail call i8 @llvm.ctpop.i8(i8 %x) + ret i8 %cnt +; CHECK: cnt8: +; CHECK: popcntw +; CHECK: ret +} + +define i16 @cnt16(i16 %x) nounwind readnone { + %cnt = tail call i16 @llvm.ctpop.i16(i16 %x) + ret i16 %cnt +; CHECK: cnt16: +; CHECK: popcntw +; CHECK: ret +} + +define i32 @cnt32(i32 %x) nounwind readnone { + %cnt = tail call i32 @llvm.ctpop.i32(i32 %x) + ret i32 %cnt +; CHECK: cnt32: +; CHECK: popcntl +; CHECK: ret +} + +define i64 @cnt64(i64 %x) nounwind readnone { + %cnt = tail call i64 @llvm.ctpop.i64(i64 %x) + ret i64 %cnt +; CHECK: cnt64: +; CHECK: popcntq +; CHECK: ret +} + +declare i8 @llvm.ctpop.i8(i8) nounwind readnone +declare i16 @llvm.ctpop.i16(i16) nounwind readnone +declare i32 @llvm.ctpop.i32(i32) nounwind readnone +declare i64 @llvm.ctpop.i64(i64) nounwind readnone diff --git a/test/CodeGen/X86/pr9127.ll b/test/CodeGen/X86/pr9127.ll new file mode 100644 index 0000000..9b251f5 --- /dev/null +++ b/test/CodeGen/X86/pr9127.ll @@ -0,0 +1,13 @@ +; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-win32 < %s | FileCheck %s + +define i8 @foobar(double %d, double* %x) { +entry: + %tmp2 = load double* %x, align 8 + %cmp = fcmp oeq double %tmp2, %d + %conv3 = zext i1 %cmp to i8 + ret i8 %conv3 +} + +; test that the load is folded. +; CHECK: ucomisd (%{{rdi|rdx}}), %xmm0 diff --git a/test/CodeGen/X86/prefetch.ll b/test/CodeGen/X86/prefetch.ll index fac5915..48d2673 100644 --- a/test/CodeGen/X86/prefetch.ll +++ b/test/CodeGen/X86/prefetch.ll @@ -1,11 +1,11 @@ -; RUN: llc < %s -march=x86 -mattr=+sse > %t -; RUN: grep prefetchnta %t -; RUN: grep prefetcht0 %t -; RUN: grep prefetcht1 %t -; RUN: grep prefetcht2 %t +; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s define void @t(i8* %ptr) nounwind { entry: +; CHECK: prefetcht2 +; CHECK: prefetcht1 +; CHECK: prefetcht0 +; CHECK: prefetchnta tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1 ) tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2 ) tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) diff --git a/test/CodeGen/X86/red-zone.ll b/test/CodeGen/X86/red-zone.ll index 1ffb4e3..d936971 100644 --- a/test/CodeGen/X86/red-zone.ll +++ b/test/CodeGen/X86/red-zone.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s ; First without noredzone. ; CHECK: f0: diff --git a/test/CodeGen/X86/remat-mov-0.ll b/test/CodeGen/X86/remat-mov-0.ll index 5fb445c..f89cd33 100644 --- a/test/CodeGen/X86/remat-mov-0.ll +++ b/test/CodeGen/X86/remat-mov-0.ll @@ -1,12 +1,13 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; CodeGen should remat the zero instead of spilling it. declare void @foo(i64 %p) ; CHECK: bar: -; CHECK: xorl %edi, %edi -; CHECK: xorl %edi, %edi +; CHECK: xorl %e[[A0:di|cx]], %e +; CHECK: xorl %e[[A0]], %e[[A0]] define void @bar() nounwind { call void @foo(i64 0) call void @foo(i64 0) @@ -14,8 +15,8 @@ define void @bar() nounwind { } ; CHECK: bat: -; CHECK: movq $-1, %rdi -; CHECK: movq $-1, %rdi +; CHECK: movq $-1, %r[[A0]] +; CHECK: movq $-1, %r[[A0]] define void @bat() nounwind { call void @foo(i64 -1) call void @foo(i64 -1) @@ -23,8 +24,8 @@ define void @bat() nounwind { } ; CHECK: bau: -; CHECK: movl $1, %edi -; CHECK: movl $1, %edi +; CHECK: movl $1, %e[[A0]] +; CHECK: movl $1, %e[[A0]] define void @bau() nounwind { call void @foo(i64 1) call void @foo(i64 1) diff --git a/test/CodeGen/X86/rodata-relocs.ll b/test/CodeGen/X86/rodata-relocs.ll index 276f8bb..9291200 100644 --- a/test/CodeGen/X86/rodata-relocs.ll +++ b/test/CodeGen/X86/rodata-relocs.ll @@ -8,14 +8,14 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" -@a = internal constant [2 x i32] [i32 1, i32 2] -@a1 = constant [2 x i32] [i32 1, i32 2] -@e = internal constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 -@e1 = constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 -@p = constant i8* bitcast ([2 x i32]* @a to i8*) -@t = constant i8* bitcast ([2 x [2 x i32]]* @e to i8*) -@p1 = constant i8* bitcast ([2 x i32]* @a1 to i8*) -@t1 = constant i8* bitcast ([2 x [2 x i32]]* @e1 to i8*) +@a = internal unnamed_addr constant [2 x i32] [i32 1, i32 2] +@a1 = unnamed_addr constant [2 x i32] [i32 1, i32 2] +@e = internal unnamed_addr constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 +@e1 = unnamed_addr constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 +@p = unnamed_addr constant i8* bitcast ([2 x i32]* @a to i8*) +@t = unnamed_addr constant i8* bitcast ([2 x [2 x i32]]* @e to i8*) +@p1 = unnamed_addr constant i8* bitcast ([2 x i32]* @a1 to i8*) +@t1 = unnamed_addr constant i8* bitcast ([2 x [2 x i32]]* @e1 to i8*) @p2 = internal global i8* bitcast([2 x i32]* @a1 to i8*) @t2 = internal global i8* bitcast([2 x [2 x i32]]* @e1 to i8*) @p3 = internal global i8* bitcast([2 x i32]* @a to i8*) diff --git a/test/CodeGen/X86/scalar_widen_div.ll b/test/CodeGen/X86/scalar_widen_div.ll index 77f320f..adc58ac 100644 --- a/test/CodeGen/X86/scalar_widen_div.ll +++ b/test/CodeGen/X86/scalar_widen_div.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -disable-mmx -march=x86-64 -mattr=+sse42 | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s ; Verify when widening a divide/remainder operation, we only generate a ; divide/rem per element since divide/remainder can trap. diff --git a/test/CodeGen/X86/select-aggregate.ll b/test/CodeGen/X86/select-aggregate.ll deleted file mode 100644 index 44cafe2..0000000 --- a/test/CodeGen/X86/select-aggregate.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s -; PR5757 - -; CHECK: cmovneq %rdi, %rsi -; CHECK: movl (%rsi), %eax - -%0 = type { i64, i32 } - -define i32 @foo(%0* %p, %0* %q, i1 %r) nounwind { - %t0 = load %0* %p - %t1 = load %0* %q - %t4 = select i1 %r, %0 %t0, %0 %t1 - %t5 = extractvalue %0 %t4, 1 - ret i32 %t5 -} diff --git a/test/CodeGen/X86/select-zero-one.ll b/test/CodeGen/X86/select-zero-one.ll deleted file mode 100644 index c38a020..0000000 --- a/test/CodeGen/X86/select-zero-one.ll +++ /dev/null @@ -1,25 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep cmov -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movzbl | count 1 - -@r1 = weak global i32 0 - -define void @t1(i32 %a, double %b) { - %tmp114 = fcmp ugt double %b, 1.000000e-09 - %tmp120 = icmp eq i32 %a, 0 ; <i1> [#uses=1] - %bothcond = or i1 %tmp114, %tmp120 ; <i1> [#uses=1] - %storemerge = select i1 %bothcond, i32 0, i32 1 ; <i32> [#uses=2] - store i32 %storemerge, i32* @r1, align 4 - ret void -} - -@r2 = weak global i8 0 - -define void @t2(i32 %a, double %b) { - %tmp114 = fcmp ugt double %b, 1.000000e-09 - %tmp120 = icmp eq i32 %a, 0 ; <i1> [#uses=1] - %bothcond = or i1 %tmp114, %tmp120 ; <i1> [#uses=1] - %storemerge = select i1 %bothcond, i8 0, i8 1 ; <i32> [#uses=2] - store i8 %storemerge, i8* @r2, align 4 - ret void -} diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll index 95ed9e9..ce04e07 100644 --- a/test/CodeGen/X86/select.ll +++ b/test/CodeGen/X86/select.ll @@ -1,63 +1,220 @@ -; RUN: llc < %s -march=x86 -mcpu=pentium -; RUN: llc < %s -march=x86 -mcpu=yonah -; RUN: llc < %s -march=x86 -mcpu=yonah | not grep set +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s +; PR5757 -define i1 @boolSel(i1 %A, i1 %B, i1 %C) nounwind { - %X = select i1 %A, i1 %B, i1 %C ; <i1> [#uses=1] - ret i1 %X +%0 = type { i64, i32 } + +define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind { + %t0 = load %0* %p + %t1 = load %0* %q + %t4 = select i1 %r, %0 %t0, %0 %t1 + %t5 = extractvalue %0 %t4, 1 + ret i32 %t5 +; CHECK: test1: +; CHECK: cmovneq %rdi, %rsi +; CHECK: movl (%rsi), %eax +} + + +; PR2139 +define i32 @test2() nounwind { +entry: + %tmp73 = tail call i1 @return_false() ; <i8> [#uses=1] + %g.0 = select i1 %tmp73, i16 0, i16 -480 ; <i16> [#uses=2] + %tmp7778 = sext i16 %g.0 to i32 ; <i32> [#uses=1] + %tmp80 = shl i32 %tmp7778, 3 ; <i32> [#uses=2] + %tmp87 = icmp sgt i32 %tmp80, 32767 ; <i1> [#uses=1] + br i1 %tmp87, label %bb90, label %bb91 +bb90: ; preds = %bb84, %bb72 + unreachable +bb91: ; preds = %bb84 + ret i32 0 +; CHECK: test2: +; CHECK: movnew +; CHECK: movswl +} + +declare i1 @return_false() + + +;; Select between two floating point constants. +define float @test3(i32 %x) nounwind readnone { +entry: + %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1] + %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1] + ret float %iftmp.0.0 +; CHECK: test3: +; CHECK: movss {{.*}},4), %xmm0 +} + +define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly { +entry: + %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1] + %iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1] + %1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1] + %2 = load i8* %1, align 1 ; <i8> [#uses=1] + ret i8 %2 +; CHECK: test4: +; CHECK: movsbl ({{.*}},4), %eax +} + +define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind { + %x = select i1 %c, <2 x i16> %a, <2 x i16> %b + store <2 x i16> %x, <2 x i16>* %p + ret void +; CHECK: test5: } -define i8 @byteSel(i1 %A, i8 %B, i8 %C) nounwind { - %X = select i1 %A, i8 %B, i8 %C ; <i8> [#uses=1] - ret i8 %X +define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind { + %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1] + %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=2] + %tmp9 = fmul <4 x float> %tmp3, %tmp3 ; <<4 x float>> [#uses=1] + %tmp.upgrd.1 = icmp eq i32 %C, 0 ; <i1> [#uses=1] + %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp ; <<4 x float>> [#uses=1] + store <4 x float> %iftmp.38.0, <4 x float>* %A + ret void +; Verify that the fmul gets sunk into the one part of the diamond where it is +; needed. +; CHECK: test6: +; CHECK: jne +; CHECK: mulps +; CHECK: ret +; CHECK: ret } -define i16 @shortSel(i1 %A, i16 %B, i16 %C) nounwind { - %X = select i1 %A, i16 %B, i16 %C ; <i16> [#uses=1] - ret i16 %X +; Select with fp80's +define x86_fp80 @test7(i32 %tmp8) nounwind { + %tmp9 = icmp sgt i32 %tmp8, -1 ; <i1> [#uses=1] + %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 + ret x86_fp80 %retval +; CHECK: test7: +; CHECK: leaq +; CHECK: fldt (%r{{.}}x,%r{{.}}x) } -define i32 @intSel(i1 %A, i32 %B, i32 %C) nounwind { - %X = select i1 %A, i32 %B, i32 %C ; <i32> [#uses=1] - ret i32 %X +; widening select v6i32 and then a sub +define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind { + %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2 + %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > + store <6 x i32> %val, <6 x i32>* %dst.addr + ret void + +; CHECK: test8: } -define i64 @longSel(i1 %A, i64 %B, i64 %C) nounwind { - %X = select i1 %A, i64 %B, i64 %C ; <i64> [#uses=1] - ret i64 %X + +;; Test integer select between values and constants. + +define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp ne i64 %x, 0 + %cond = select i1 %cmp, i64 %y, i64 -1 + ret i64 %cond +; CHECK: test9: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: orq %rsi, %rax +; CHECK: ret +} + +;; Same as test9 +define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp eq i64 %x, 0 + %cond = select i1 %cmp, i64 -1, i64 %y + ret i64 %cond +; CHECK: test9a: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: orq %rsi, %rax +; CHECK: ret +} + +define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp eq i64 %x, 0 + %A = sext i1 %cmp to i64 + %cond = or i64 %y, %A + ret i64 %cond +; CHECK: test9b: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: orq %rsi, %rax +; CHECK: ret } -define double @doubleSel(i1 %A, double %B, double %C) nounwind { - %X = select i1 %A, double %B, double %C ; <double> [#uses=1] - ret double %X +;; Select between -1 and 1. +define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp eq i64 %x, 0 + %cond = select i1 %cmp, i64 -1, i64 1 + ret i64 %cond +; CHECK: test10: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: orq $1, %rax +; CHECK: ret } -define i8 @foldSel(i1 %A, i8 %B, i8 %C) nounwind { - %Cond = icmp slt i8 %B, %C ; <i1> [#uses=1] - %X = select i1 %Cond, i8 %B, i8 %C ; <i8> [#uses=1] - ret i8 %X + + +define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp eq i64 %x, 0 + %cond = select i1 %cmp, i64 %y, i64 -1 + ret i64 %cond +; CHECK: test11: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: notq %rax +; CHECK: orq %rsi, %rax +; CHECK: ret } -define i32 @foldSel2(i1 %A, i32 %B, i32 %C) nounwind { - %Cond = icmp eq i32 %B, %C ; <i1> [#uses=1] - %X = select i1 %Cond, i32 %B, i32 %C ; <i32> [#uses=1] - ret i32 %X +define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp ne i64 %x, 0 + %cond = select i1 %cmp, i64 -1, i64 %y + ret i64 %cond +; CHECK: test11a: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: notq %rax +; CHECK: orq %rsi, %rax +; CHECK: ret } -define i32 @foldSel2a(i1 %A, i32 %B, i32 %C, double %X, double %Y) nounwind { - %Cond = fcmp olt double %X, %Y ; <i1> [#uses=1] - %X.upgrd.1 = select i1 %Cond, i32 %B, i32 %C ; <i32> [#uses=1] - ret i32 %X.upgrd.1 + +declare noalias i8* @_Znam(i64) noredzone + +define noalias i8* @test12(i64 %count) nounwind ssp noredzone { +entry: + %A = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %count, i64 4) + %B = extractvalue { i64, i1 } %A, 1 + %C = extractvalue { i64, i1 } %A, 0 + %D = select i1 %B, i64 -1, i64 %C + %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone + ret i8* %call +; CHECK: test12: +; CHECK: mulq +; CHECK: movq $-1, %rdi +; CHECK: cmovnoq %rax, %rdi +; CHECK: jmp __Znam } -define float @foldSel3(i1 %A, float %B, float %C, i32 %X, i32 %Y) nounwind { - %Cond = icmp ult i32 %X, %Y ; <i1> [#uses=1] - %X.upgrd.2 = select i1 %Cond, float %B, float %C ; <float> [#uses=1] - ret float %X.upgrd.2 +declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone + +define i32 @test13(i32 %a, i32 %b) nounwind { + %c = icmp ult i32 %a, %b + %d = sext i1 %c to i32 + ret i32 %d +; CHECK: test13: +; CHECK: cmpl +; CHECK-NEXT: sbbl +; CHECK-NEXT: ret } -define float @nofoldSel4(i1 %A, float %B, float %C, i32 %X, i32 %Y) nounwind { - %Cond = icmp slt i32 %X, %Y ; <i1> [#uses=1] - %X.upgrd.3 = select i1 %Cond, float %B, float %C ; <float> [#uses=1] - ret float %X.upgrd.3 +define i32 @test14(i32 %a, i32 %b) nounwind { + %c = icmp uge i32 %a, %b + %d = sext i1 %c to i32 + ret i32 %d +; CHECK: test14: +; CHECK: cmpl +; CHECK-NEXT: sbbl +; CHECK-NEXT: notl +; CHECK-NEXT: ret } + diff --git a/test/CodeGen/X86/sext-select.ll b/test/CodeGen/X86/sext-select.ll deleted file mode 100644 index 4aca040..0000000 --- a/test/CodeGen/X86/sext-select.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: llc < %s -march=x86 | grep movsw -; PR2139 - -declare void @abort() - -define i32 @main() { -entry: - %tmp73 = tail call i1 @return_false() ; <i8> [#uses=1] - %g.0 = select i1 %tmp73, i16 0, i16 -480 ; <i16> [#uses=2] - %tmp7778 = sext i16 %g.0 to i32 ; <i32> [#uses=1] - %tmp80 = shl i32 %tmp7778, 3 ; <i32> [#uses=2] - %tmp87 = icmp sgt i32 %tmp80, 32767 ; <i1> [#uses=1] - br i1 %tmp87, label %bb90, label %bb91 -bb90: ; preds = %bb84, %bb72 - tail call void @abort() - unreachable -bb91: ; preds = %bb84 - ret i32 0 -} - -define i1 @return_false() { - ret i1 0 -} diff --git a/test/CodeGen/X86/sibcall-5.ll b/test/CodeGen/X86/sibcall-5.ll new file mode 100644 index 0000000..9d74121 --- /dev/null +++ b/test/CodeGen/X86/sibcall-5.ll @@ -0,0 +1,31 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=X64 + +; Sibcall optimization of expanded libcalls. +; rdar://8707777 + +define double @foo(double %a) nounwind readonly ssp { +entry: +; X32: foo: +; X32: jmp _sin$stub + +; X64: foo: +; X64: jmp _sin + %0 = tail call double @sin(double %a) nounwind readonly + ret double %0 +} + +define float @bar(float %a) nounwind readonly ssp { +; X32: bar: +; X32: jmp _sinf$stub + +; X64: bar: +; X64: jmp _sinf +entry: + %0 = tail call float @sinf(float %a) nounwind readonly + ret float %0 +} + +declare float @sinf(float) nounwind readonly + +declare double @sin(double) nounwind readonly diff --git a/test/CodeGen/X86/split-select.ll b/test/CodeGen/X86/split-select.ll deleted file mode 100644 index 07d4d52..0000000 --- a/test/CodeGen/X86/split-select.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: llc < %s -march=x86-64 | grep test | count 1 - -define void @foo(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) { - %x = select i1 %c, <2 x i16> %a, <2 x i16> %b - store <2 x i16> %x, <2 x i16>* %p - ret void -} diff --git a/test/CodeGen/X86/sse-align-11.ll b/test/CodeGen/X86/sse-align-11.ll index 3cc83ca..9f5d4b4 100644 --- a/test/CodeGen/X86/sse-align-11.ll +++ b/test/CodeGen/X86/sse-align-11.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps -; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-linux-gnu | grep movups +; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-linux-gnu | grep movaps +; PR8969 - make 32-bit linux have a 16-byte aligned stack define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind { entry: diff --git a/test/CodeGen/X86/sse2.ll b/test/CodeGen/X86/sse2.ll index 6fc0190..5c3e32f 100644 --- a/test/CodeGen/X86/sse2.ll +++ b/test/CodeGen/X86/sse2.ll @@ -192,3 +192,33 @@ entry: ; CHECK: test15: ; CHECK: movhlps %xmm1, %xmm0 } + +; PR8900 +; CHECK: test16: +; CHECK: unpcklpd +; CHECK: ret + +define <2 x double> @test16(<4 x double> * nocapture %srcA, <2 x double>* nocapture %dst) { + %i5 = getelementptr inbounds <4 x double>* %srcA, i32 3 + %i6 = load <4 x double>* %i5, align 32 + %i7 = shufflevector <4 x double> %i6, <4 x double> undef, <2 x i32> <i32 0, i32 2> + ret <2 x double> %i7 +} + +; PR9009 +define fastcc void @test17() nounwind { +entry: + %0 = insertelement <4 x i32> undef, i32 undef, i32 1 + %1 = shufflevector <4 x i32> <i32 undef, i32 undef, i32 32768, i32 32768>, <4 x i32> %0, <4 x i32> <i32 4, i32 5, i32 2, i32 3> + %2 = bitcast <4 x i32> %1 to <4 x float> + store <4 x float> %2, <4 x float> * undef + ret void +} + +; PR9210 +define <4 x float> @f(<4 x double>) nounwind { +entry: + %double2float.i = fptrunc <4 x double> %0 to <4 x float> + ret <4 x float> %double2float.i +} + diff --git a/test/CodeGen/X86/sse41.ll b/test/CodeGen/X86/sse41.ll index 3a14fa2..2ac4cb4 100644 --- a/test/CodeGen/X86/sse41.ll +++ b/test/CodeGen/X86/sse41.ll @@ -200,11 +200,11 @@ define i32 @ptestz_2(<4 x float> %t1, <4 x float> %t2) nounwind { ret i32 %tmp1 ; X32: _ptestz_2: ; X32: ptest %xmm1, %xmm0 -; X32: setb %al +; X32: sbbl %eax ; X64: _ptestz_2: ; X64: ptest %xmm1, %xmm0 -; X64: setb %al +; X64: sbbl %eax } define i32 @ptestz_3(<4 x float> %t1, <4 x float> %t2) nounwind { diff --git a/test/CodeGen/X86/stack-align.ll b/test/CodeGen/X86/stack-align.ll index 8ca0b12..793c026 100644 --- a/test/CodeGen/X86/stack-align.ll +++ b/test/CodeGen/X86/stack-align.ll @@ -7,7 +7,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 target triple = "i686-apple-darwin8" @G = external global double -define void @test({ double, double }* byval %z, double* %P) { +define void @test({ double, double }* byval %z, double* %P) nounwind { entry: %tmp3 = load double* @G, align 16 ; <double> [#uses=1] %tmp4 = tail call double @fabs( double %tmp3 ) ; <double> [#uses=1] @@ -21,14 +21,14 @@ entry: ret void } -define void @test2() alignstack(16) { +define void @test2() alignstack(16) nounwind { entry: ; CHECK: andl{{.*}}$-16, %esp ret void } ; Use a call to force a spill. -define <2 x double> @test3(<2 x double> %x, <2 x double> %y) alignstack(32) { +define <2 x double> @test3(<2 x double> %x, <2 x double> %y) alignstack(32) nounwind { entry: ; CHECK: andl{{.*}}$-32, %esp call void @test2() @@ -38,3 +38,14 @@ entry: declare double @fabs(double) +; The pointer is already known aligned, so and x,-16 is eliminable. +define i32 @test4() nounwind { +entry: + %buffer = alloca [2048 x i8], align 16 + %0 = ptrtoint [2048 x i8]* %buffer to i32 + %and = and i32 %0, -16 + ret i32 %and +; CHECK: test4: +; CHECK-NOT: and +; CHECK: ret +} diff --git a/test/CodeGen/X86/switch-bt.ll b/test/CodeGen/X86/switch-bt.ll index ed3266e..9f491d4 100644 --- a/test/CodeGen/X86/switch-bt.ll +++ b/test/CodeGen/X86/switch-bt.ll @@ -49,3 +49,33 @@ sw.epilog: ; preds = %sw.default, %sw.bb4 } declare void @foo(i32) + +; Don't zero extend the test operands to pointer type if it can be avoided. +; rdar://8781238 +define void @test2(i32 %x) nounwind ssp { +; CHECK: test2: +; CHECK: cmpl $6 +; CHECK: ja + +; CHECK-NEXT: movl $91 +; CHECK-NOT: movl +; CHECK-NEXT: btl +; CHECK-NEXT: jb +entry: + switch i32 %x, label %if.end [ + i32 6, label %if.then + i32 4, label %if.then + i32 3, label %if.then + i32 1, label %if.then + i32 0, label %if.then + ] + +if.then: ; preds = %entry, %entry, %entry, %entry, %entry + tail call void @bar() nounwind + ret void + +if.end: ; preds = %entry + ret void +} + +declare void @bar() diff --git a/test/CodeGen/X86/switch-or.ll b/test/CodeGen/X86/switch-or.ll new file mode 100644 index 0000000..75832c7 --- /dev/null +++ b/test/CodeGen/X86/switch-or.ll @@ -0,0 +1,22 @@ +; RUN: llc -march=x86 -asm-verbose=false < %s | FileCheck %s + +; Check that merging switch cases that differ in one bit works. +; CHECK: orl $2 +; CHECK-NEXT: cmpl $6 + +define void @foo(i32 %variable) nounwind { +entry: + switch i32 %variable, label %if.end [ + i32 4, label %if.then + i32 6, label %if.then + ] + +if.then: + %call = tail call i32 (...)* @bar() nounwind + ret void + +if.end: + ret void +} + +declare i32 @bar(...) nounwind diff --git a/test/CodeGen/X86/tail-opts.ll b/test/CodeGen/X86/tail-opts.ll index f546ac4..9291695 100644 --- a/test/CodeGen/X86/tail-opts.ll +++ b/test/CodeGen/X86/tail-opts.ll @@ -273,7 +273,7 @@ declare fastcc %union.tree_node* @default_conversion(%union.tree_node*) nounwind ; CHECK: foo: ; CHECK: callq func ; CHECK-NEXT: .LBB4_2: -; CHECK-NEXT: addq $8, %rsp +; CHECK-NEXT: popq ; CHECK-NEXT: ret define void @foo(i1* %V) nounwind { diff --git a/test/CodeGen/X86/tailcall-largecode.ll b/test/CodeGen/X86/tailcall-largecode.ll index c7070f2..c3f4278 100644 --- a/test/CodeGen/X86/tailcall-largecode.ll +++ b/test/CodeGen/X86/tailcall-largecode.ll @@ -17,7 +17,7 @@ define fastcc i32 @indirect_manyargs(i32(i32,i32,i32,i32,i32,i32,i32)* %target) ; Adjust the stack to enter the function. (The amount of the ; adjustment may change in the future, in which case the location of ; the stack argument and the return adjustment will change too.) -; CHECK: subq $8, %rsp +; CHECK: pushq ; Put the call target into R11, which won't be clobbered while restoring ; callee-saved registers and won't be used for passing arguments. ; CHECK: movq %rdi, %rax @@ -31,7 +31,7 @@ define fastcc i32 @indirect_manyargs(i32(i32,i32,i32,i32,i32,i32,i32)* %target) ; CHECK: movl $5, %r8d ; CHECK: movl $6, %r9d ; Adjust the stack to "return". -; CHECK: addq $8, %rsp +; CHECK: popq ; And tail-call to the target. ; CHECK: jmpq *%rax # TAILCALL %res = tail call fastcc i32 %target(i32 1, i32 2, i32 3, i32 4, i32 5, @@ -46,7 +46,7 @@ define fastcc i32 @direct_manyargs() { ; Adjust the stack to enter the function. (The amount of the ; adjustment may change in the future, in which case the location of ; the stack argument and the return adjustment will change too.) -; CHECK: subq $8, %rsp +; CHECK: pushq ; Pass the stack argument. ; CHECK: movl $7, 16(%rsp) ; Pass the register arguments, in the right registers. @@ -62,7 +62,7 @@ define fastcc i32 @direct_manyargs() { ; arguments. ; CHECK: movabsq $manyargs_callee, %rax ; Adjust the stack to "return". -; CHECK: addq $8, %rsp +; CHECK: popq ; And tail-call to the target. ; CHECK: jmpq *%rax # TAILCALL %res = tail call fastcc i32 @manyargs_callee(i32 1, i32 2, i32 3, i32 4, diff --git a/test/CodeGen/X86/tailcall-ri64.ll b/test/CodeGen/X86/tailcall-ri64.ll new file mode 100644 index 0000000..914d8f7 --- /dev/null +++ b/test/CodeGen/X86/tailcall-ri64.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=AMD64 +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64 +; PR8743 +; TAILJMPri64 should not receive "callee-saved" registers beyond epilogue. + +; AMD64: jmpq +; AMD64-NOT: %{{e[a-z]|rbx|rbp|r10|r12|r13|r14|r15}} + +; WIN64: jmpq +; WIN64-NOT: %{{e[a-z]|rbx|rsi|rdi|rbp|r12|r13|r14|r15}} + +%class = type { [8 x i8] } +%vt = type { i32 (...)** } + +define %vt* @_ZN4llvm9UnsetInit20convertInitializerToEPNS_5RecTyE(%class* +%this, %vt* %Ty) align 2 { +entry: + %0 = bitcast %vt* %Ty to %vt* (%vt*, %class*)*** + %vtable = load %vt* (%vt*, %class*)*** %0, align 8 + %vfn = getelementptr inbounds %vt* (%vt*, %class*)** %vtable, i64 4 + %1 = load %vt* (%vt*, %class*)** %vfn, align 8 + %call = tail call %vt* %1(%vt* %Ty, %class* %this) + ret %vt* %call +} diff --git a/test/CodeGen/X86/tailcallstack64.ll b/test/CodeGen/X86/tailcallstack64.ll index 107bdf9..0927779 100644 --- a/test/CodeGen/X86/tailcallstack64.ll +++ b/test/CodeGen/X86/tailcallstack64.ll @@ -1,16 +1,20 @@ -; RUN: llc < %s -tailcallopt -march=x86-64 -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -tailcallopt -mtriple=x86_64-linux -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -tailcallopt -mtriple=x86_64-win32 -post-RA-scheduler=true | FileCheck %s + +; FIXME: Redundant unused stack allocation could be eliminated. +; CHECK: subq ${{24|72}}, %rsp ; Check that lowered arguments on the stack do not overwrite each other. ; Add %in1 %p1 to a different temporary register (%eax). -; CHECK: movl 32(%rsp), %eax +; CHECK: movl [[A1:32|144]](%rsp), %eax ; Move param %in1 to temp register (%r10d). -; CHECK: movl 40(%rsp), %r10d +; CHECK: movl [[A2:40|152]](%rsp), %r10d ; Add %in1 %p1 to a different temporary register (%eax). -; CHECK: addl %edi, %eax +; CHECK: addl {{%edi|%ecx}}, %eax ; Move param %in2 to stack. -; CHECK: movl %r10d, 32(%rsp) +; CHECK: movl %r10d, [[A1]](%rsp) ; Move result of addition to stack. -; CHECK: movl %eax, 40(%rsp) +; CHECK: movl %eax, [[A2]](%rsp) ; Eventually, do a TAILCALL ; CHECK: TAILCALL @@ -22,4 +26,3 @@ entry: %retval = tail call fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6, i32 %in2,i32 %tmp) ret i32 %retval } - diff --git a/test/CodeGen/X86/test-shrink.ll b/test/CodeGen/X86/test-shrink.ll index 1d63693..5bc28ec 100644 --- a/test/CodeGen/X86/test-shrink.ll +++ b/test/CodeGen/X86/test-shrink.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64 +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=CHECK-64 +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64 ; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32 ; CHECK-64: g64xh: -; CHECK-64: testb $8, %ah +; CHECK-64: testb $8, {{%ah|%ch}} ; CHECK-64: ret ; CHECK-32: g64xh: ; CHECK-32: testb $8, %ah @@ -19,7 +20,7 @@ no: ret void } ; CHECK-64: g64xl: -; CHECK-64: testb $8, %dil +; CHECK-64: testb $8, [[A0L:%dil|%cl]] ; CHECK-64: ret ; CHECK-32: g64xl: ; CHECK-32: testb $8, %al @@ -36,7 +37,7 @@ no: ret void } ; CHECK-64: g32xh: -; CHECK-64: testb $8, %ah +; CHECK-64: testb $8, {{%ah|%ch}} ; CHECK-64: ret ; CHECK-32: g32xh: ; CHECK-32: testb $8, %ah @@ -53,7 +54,7 @@ no: ret void } ; CHECK-64: g32xl: -; CHECK-64: testb $8, %dil +; CHECK-64: testb $8, [[A0L]] ; CHECK-64: ret ; CHECK-32: g32xl: ; CHECK-32: testb $8, %al @@ -70,7 +71,7 @@ no: ret void } ; CHECK-64: g16xh: -; CHECK-64: testb $8, %ah +; CHECK-64: testb $8, {{%ah|%ch}} ; CHECK-64: ret ; CHECK-32: g16xh: ; CHECK-32: testb $8, %ah @@ -87,7 +88,7 @@ no: ret void } ; CHECK-64: g16xl: -; CHECK-64: testb $8, %dil +; CHECK-64: testb $8, [[A0L]] ; CHECK-64: ret ; CHECK-32: g16xl: ; CHECK-32: testb $8, %al @@ -104,7 +105,7 @@ no: ret void } ; CHECK-64: g64x16: -; CHECK-64: testw $-32640, %di +; CHECK-64: testw $-32640, %[[A0W:di|cx]] ; CHECK-64: ret ; CHECK-32: g64x16: ; CHECK-32: testw $-32640, %ax @@ -121,7 +122,7 @@ no: ret void } ; CHECK-64: g32x16: -; CHECK-64: testw $-32640, %di +; CHECK-64: testw $-32640, %[[A0W]] ; CHECK-64: ret ; CHECK-32: g32x16: ; CHECK-32: testw $-32640, %ax @@ -138,7 +139,7 @@ no: ret void } ; CHECK-64: g64x32: -; CHECK-64: testl $268468352, %edi +; CHECK-64: testl $268468352, %e[[A0W]] ; CHECK-64: ret ; CHECK-32: g64x32: ; CHECK-32: testl $268468352, %eax diff --git a/test/CodeGen/X86/tls-pic.ll b/test/CodeGen/X86/tls-pic.ll index 4cad837..b83416d 100644 --- a/test/CodeGen/X86/tls-pic.ll +++ b/test/CodeGen/X86/tls-pic.ll @@ -11,11 +11,11 @@ entry: ; X32: f1: ; X32: leal i@TLSGD(,%ebx), %eax -; X32: call ___tls_get_addr@PLT +; X32: calll ___tls_get_addr@PLT ; X64: f1: ; X64: leaq i@TLSGD(%rip), %rdi -; X64: call __tls_get_addr@PLT +; X64: callq __tls_get_addr@PLT @i2 = external thread_local global i32 @@ -27,11 +27,11 @@ entry: ; X32: f2: ; X32: leal i@TLSGD(,%ebx), %eax -; X32: call ___tls_get_addr@PLT +; X32: calll ___tls_get_addr@PLT ; X64: f2: ; X64: leaq i@TLSGD(%rip), %rdi -; X64: call __tls_get_addr@PLT +; X64: callq __tls_get_addr@PLT @@ -43,11 +43,11 @@ entry: ; X32: f3: ; X32: leal i@TLSGD(,%ebx), %eax -; X32: call ___tls_get_addr@PLT +; X32: calll ___tls_get_addr@PLT ; X64: f3: ; X64: leaq i@TLSGD(%rip), %rdi -; X64: call __tls_get_addr@PLT +; X64: callq __tls_get_addr@PLT define i32* @f4() nounwind { @@ -57,11 +57,11 @@ entry: ; X32: f4: ; X32: leal i@TLSGD(,%ebx), %eax -; X32: call ___tls_get_addr@PLT +; X32: calll ___tls_get_addr@PLT ; X64: f4: ; X64: leaq i@TLSGD(%rip), %rdi -; X64: call __tls_get_addr@PLT +; X64: callq __tls_get_addr@PLT diff --git a/test/CodeGen/X86/tls-1.ll b/test/CodeGen/X86/tlv-1.ll index de694d8..42940f1 100644 --- a/test/CodeGen/X86/tls-1.ll +++ b/test/CodeGen/X86/tlv-1.ll @@ -1,5 +1,21 @@ ; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s +%struct.A = type { [48 x i8], i32, i32, i32 } + +@c = external thread_local global %struct.A, align 4 + +define void @main() nounwind ssp { +entry: + call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds (%struct.A* @c, i32 0, i32 0, i32 0), i8 0, i64 60, i32 1, i1 false) + unreachable + ; CHECK: movq _c@TLVP(%rip), %rdi + ; CHECK-NEXT: callq *(%rdi) + ; CHECK-NEXT: movl $0, 56(%rax) + ; CHECK-NEXT: movq $0, 48(%rax) +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind + @a = thread_local global i32 0 ; <i32*> [#uses=0] @b = thread_local global i32 0 ; <i32*> [#uses=0] diff --git a/test/CodeGen/X86/tlv-2.ll b/test/CodeGen/X86/tlv-2.ll new file mode 100644 index 0000000..5f29a60 --- /dev/null +++ b/test/CodeGen/X86/tlv-2.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -mtriple x86_64-apple-darwin -O0 | FileCheck %s + +@b = thread_local global i32 5, align 4 +@a = thread_local global i32 0, align 4 +@c = internal thread_local global i32 0, align 4 +@d = internal thread_local global i32 5, align 4 + +define void @foo() nounwind ssp { +entry: + store i32 1, i32* @a, align 4 + ; CHECK: movq _a@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $1, (%rax) + + store i32 2, i32* @b, align 4 + ; CHECK: movq _b@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $2, (%rax) + + store i32 3, i32* @c, align 4 + ; CHECK: movq _c@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $3, (%rax) + + store i32 4, i32* @d, align 4 + ; CHECK: movq _d@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $4, (%rax) + ; CHECK: popq + + ret void +} diff --git a/test/CodeGen/X86/twoaddr-lea.ll b/test/CodeGen/X86/twoaddr-lea.ll index a245ed7..a1d797f 100644 --- a/test/CodeGen/X86/twoaddr-lea.ll +++ b/test/CodeGen/X86/twoaddr-lea.ll @@ -5,20 +5,43 @@ ;; allocator turns the shift into an LEA. This also occurs for ADD. ; Check that the shift gets turned into an LEA. -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ -; RUN: not grep {mov E.X, E.X} +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -@G = external global i32 ; <i32*> [#uses=3] +@G = external global i32 -define i32 @test1(i32 %X, i32 %Y) { - %Z = add i32 %X, %Y ; <i32> [#uses=1] - volatile store i32 %Y, i32* @G +define i32 @test1(i32 %X) nounwind { +; CHECK: test1: +; CHECK-NOT: mov +; CHECK: leal 1(%rdi) + %Z = add i32 %X, 1 volatile store i32 %Z, i32* @G ret i32 %X } -define i32 @test2(i32 %X) { - %Z = add i32 %X, 1 ; <i32> [#uses=1] - volatile store i32 %Z, i32* @G - ret i32 %X +; rdar://8977508 +; The second add should not be transformed to leal nor should it be +; commutted (which would require inserting a copy). +define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind { +entry: +; CHECK: test2: +; CHECK: leal +; CHECK-NOT: leal +; CHECK-NOT: mov +; CHECK-NEXT: addl +; CHECK-NEXT: ret + %add = add i32 %b, %a + %add3 = add i32 %add, %c + %add5 = add i32 %add3, %d + ret i32 %add5 +} + +; rdar://9002648 +define i64 @test3(i64 %x) nounwind readnone ssp { +entry: +; CHECK: test3: +; CHECK: leaq (%rdi,%rdi), %rax +; CHECK-NOT: addq +; CHECK-NEXT: ret + %0 = shl i64 %x, 1 + ret i64 %0 } diff --git a/test/CodeGen/X86/umul-with-overflow.ll b/test/CodeGen/X86/umul-with-overflow.ll index d522bd8..c997661 100644 --- a/test/CodeGen/X86/umul-with-overflow.ll +++ b/test/CodeGen/X86/umul-with-overflow.ll @@ -1,8 +1,14 @@ -; RUN: llc < %s -march=x86 | grep "\\\\\\\<mul" +; RUN: llc < %s -march=x86 | FileCheck %s declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b) define i1 @a(i32 %x) zeroext nounwind { %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 3) %obil = extractvalue {i32, i1} %res, 1 ret i1 %obil + +; CHECK: a: +; CHECK: mull +; CHECK: seto %al +; CHECK: movzbl %al, %eax +; CHECK: ret } diff --git a/test/CodeGen/X86/unknown-location.ll b/test/CodeGen/X86/unknown-location.ll index fa98b78..09431b5 100644 --- a/test/CodeGen/X86/unknown-location.ll +++ b/test/CodeGen/X86/unknown-location.ll @@ -1,15 +1,15 @@ -; RUN: llc < %s -asm-verbose=false -march=x86-64 -use-unknown-locations | FileCheck %s +; RUN: llc < %s -asm-verbose=false -mtriple=x86_64-apple-darwin10 -use-unknown-locations | FileCheck %s ; The divide instruction does not have a debug location. CodeGen should -; represent this in the debug information. This is checked by a check -; for a label between the code for the add and the code for the divide, -; which indicates that the add's location doesn't spill over unto the -; divide. +; represent this in the debug information. This is done by setting line +; and column to 0 ; CHECK: leal (%rdi,%rsi), %eax +; CHECK-NEXT: .loc 1 0 0 ; CHECK-NEXT: Ltmp ; CHECK-NEXT: cltd ; CHECK-NEXT: idivl %r8d +; CHECK-NEXT: .loc 1 4 3 ; CHECK-NEXT: Ltmp ; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: ret diff --git a/test/CodeGen/X86/use-add-flags.ll b/test/CodeGen/X86/use-add-flags.ll index c2f0c23..8fbbd39 100644 --- a/test/CodeGen/X86/use-add-flags.ll +++ b/test/CodeGen/X86/use-add-flags.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86-64 -o - | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; Reuse the flags value from the add instructions instead of emitting separate ; testl instructions. @@ -6,9 +7,9 @@ ; Use the flags on the add. ; CHECK: test1: -; CHECK: addl (%rdi), %esi -; CHECK-NEXT: movl %edx, %eax -; CHECK-NEXT: cmovnsl %ecx, %eax +; CHECK: addl (%r[[A0:di|cx]]), {{%esi|%edx}} +; CHECK-NEXT: movl {{%edx|%r8d}}, %eax +; CHECK-NEXT: cmovnsl {{%ecx|%r9d}}, %eax ; CHECK-NEXT: ret define i32 @test1(i32* %x, i32 %y, i32 %a, i32 %b) nounwind { @@ -25,7 +26,7 @@ declare void @foo(i32) ; other use. A simple test is better. ; CHECK: test2: -; CHECK: testb $16, %dil +; CHECK: testb $16, {{%dil|%cl}} define void @test2(i32 %x) nounwind { %y = and i32 %x, 16 @@ -41,7 +42,7 @@ false: ; Do use the flags result of the and here, since the and has another use. ; CHECK: test3: -; CHECK: andl $16, %edi +; CHECK: andl $16, %e[[A0]] ; CHECK-NEXT: jne define void @test3(i32 %x) nounwind { diff --git a/test/CodeGen/X86/vec-sign.ll b/test/CodeGen/X86/vec-sign.ll new file mode 100644 index 0000000..31b9c2e --- /dev/null +++ b/test/CodeGen/X86/vec-sign.ll @@ -0,0 +1,30 @@ +; RUN: llc < %s -march=x86 -mcpu=nehalem | FileCheck %s + +define <4 x i32> @signd(<4 x i32> %a, <4 x i32> %b) nounwind { +entry: +; CHECK: signd: +; CHECK: psignd +; CHECK-NOT: sub +; CHECK: ret + %b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31> + %sub = sub nsw <4 x i32> zeroinitializer, %a + %0 = xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1> + %1 = and <4 x i32> %a, %0 + %2 = and <4 x i32> %b.lobit, %sub + %cond = or <4 x i32> %1, %2 + ret <4 x i32> %cond +} + +define <4 x i32> @blendvb(<4 x i32> %b, <4 x i32> %a, <4 x i32> %c) nounwind { +entry: +; CHECK: blendvb: +; CHECK: pblendvb +; CHECK: ret + %b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31> + %sub = sub nsw <4 x i32> zeroinitializer, %a + %0 = xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1> + %1 = and <4 x i32> %c, %0 + %2 = and <4 x i32> %a, %b.lobit + %cond = or <4 x i32> %1, %2 + ret <4 x i32> %cond +} diff --git a/test/CodeGen/X86/vec-trunc-store.ll b/test/CodeGen/X86/vec-trunc-store.ll index 2f57d7b..4d665f1 100644 --- a/test/CodeGen/X86/vec-trunc-store.ll +++ b/test/CodeGen/X86/vec-trunc-store.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -disable-mmx >/dev/null +; RUN: llc < %s -march=x86-64 define void @foo(<8 x i32>* %p) nounwind { %t = load <8 x i32>* %p diff --git a/test/CodeGen/X86/vec_anyext.ll b/test/CodeGen/X86/vec_anyext.ll new file mode 100644 index 0000000..d2a4c7f --- /dev/null +++ b/test/CodeGen/X86/vec_anyext.ll @@ -0,0 +1,77 @@ +; RUN: llc < %s -march=x86-64 +; PR 9267 + +define<4 x i16> @func_16_32() { + %F = load <4 x i32>* undef + %G = trunc <4 x i32> %F to <4 x i16> + %H = load <4 x i32>* undef + %Y = trunc <4 x i32> %H to <4 x i16> + %T = add <4 x i16> %Y, %G + store <4 x i16>%T , <4 x i16>* undef + ret <4 x i16> %T +} + +define<4 x i16> @func_16_64() { + %F = load <4 x i64>* undef + %G = trunc <4 x i64> %F to <4 x i16> + %H = load <4 x i64>* undef + %Y = trunc <4 x i64> %H to <4 x i16> + %T = xor <4 x i16> %Y, %G + store <4 x i16>%T , <4 x i16>* undef + ret <4 x i16> %T +} + +define<4 x i32> @func_32_64() { + %F = load <4 x i64>* undef + %G = trunc <4 x i64> %F to <4 x i32> + %H = load <4 x i64>* undef + %Y = trunc <4 x i64> %H to <4 x i32> + %T = or <4 x i32> %Y, %G + ret <4 x i32> %T +} + +define<4 x i8> @func_8_16() { + %F = load <4 x i16>* undef + %G = trunc <4 x i16> %F to <4 x i8> + %H = load <4 x i16>* undef + %Y = trunc <4 x i16> %H to <4 x i8> + %T = add <4 x i8> %Y, %G + ret <4 x i8> %T +} + +define<4 x i8> @func_8_32() { + %F = load <4 x i32>* undef + %G = trunc <4 x i32> %F to <4 x i8> + %H = load <4 x i32>* undef + %Y = trunc <4 x i32> %H to <4 x i8> + %T = sub <4 x i8> %Y, %G + ret <4 x i8> %T +} + +define<4 x i8> @func_8_64() { + %F = load <4 x i64>* undef + %G = trunc <4 x i64> %F to <4 x i8> + %H = load <4 x i64>* undef + %Y = trunc <4 x i64> %H to <4 x i8> + %T = add <4 x i8> %Y, %G + ret <4 x i8> %T +} + +define<4 x i16> @const_16_32() { + %G = trunc <4 x i32> <i32 0, i32 3, i32 8, i32 7> to <4 x i16> + ret <4 x i16> %G +} + +define<4 x i16> @const_16_64() { + %G = trunc <4 x i64> <i64 0, i64 3, i64 8, i64 7> to <4 x i16> + ret <4 x i16> %G +} + +define void @bugOnTruncBitwidthReduce() nounwind { +meh: + %0 = xor <4 x i64> zeroinitializer, zeroinitializer + %1 = trunc <4 x i64> %0 to <4 x i32> + %2 = lshr <4 x i32> %1, <i32 18, i32 18, i32 18, i32 18> + %3 = xor <4 x i32> %2, %1 + ret void +} diff --git a/test/CodeGen/X86/vec_cast.ll b/test/CodeGen/X86/vec_cast.ll index f853164..90d39d0 100644 --- a/test/CodeGen/X86/vec_cast.ll +++ b/test/CodeGen/X86/vec_cast.ll @@ -1,6 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mcpu=core2 -; RUN: llc < %s -march=x86-64 -mcpu=core2 -disable-mmx - +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core2 +; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=core2 define <8 x i32> @a(<8 x i16> %a) nounwind { %c = sext <8 x i16> %a to <8 x i32> diff --git a/test/CodeGen/X86/vec_compare-2.ll b/test/CodeGen/X86/vec_compare-2.ll index 091641b..04bb725 100644 --- a/test/CodeGen/X86/vec_compare-2.ll +++ b/test/CodeGen/X86/vec_compare-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=penryn -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=penryn | FileCheck %s declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone diff --git a/test/CodeGen/X86/vec_ext_inreg.ll b/test/CodeGen/X86/vec_ext_inreg.ll index 8d2a3c3..02b16a7 100644 --- a/test/CodeGen/X86/vec_ext_inreg.ll +++ b/test/CodeGen/X86/vec_ext_inreg.ll @@ -1,5 +1,4 @@ ; RUN: llc < %s -march=x86-64 -; RUN: llc < %s -march=x86-64 -disable-mmx define <8 x i32> @a(<8 x i32> %a) nounwind { %b = trunc <8 x i32> %a to <8 x i16> diff --git a/test/CodeGen/X86/vec_select.ll b/test/CodeGen/X86/vec_select.ll deleted file mode 100644 index 033e9f7..0000000 --- a/test/CodeGen/X86/vec_select.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse - -define void @test(i32 %C, <4 x float>* %A, <4 x float>* %B) { - %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1] - %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=2] - %tmp9 = fmul <4 x float> %tmp3, %tmp3 ; <<4 x float>> [#uses=1] - %tmp.upgrd.1 = icmp eq i32 %C, 0 ; <i1> [#uses=1] - %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp ; <<4 x float>> [#uses=1] - store <4 x float> %iftmp.38.0, <4 x float>* %A - ret void -} - diff --git a/test/CodeGen/X86/vec_sext.ll b/test/CodeGen/X86/vec_sext.ll new file mode 100644 index 0000000..776ddec --- /dev/null +++ b/test/CodeGen/X86/vec_sext.ll @@ -0,0 +1,69 @@ +; RUN: llc < %s -march=x86-64 +; PR 9267 + +define<4 x i32> @func_16_32() { + %F = load <4 x i16>* undef + %G = sext <4 x i16> %F to <4 x i32> + %H = load <4 x i16>* undef + %Y = sext <4 x i16> %H to <4 x i32> + %T = add <4 x i32> %Y, %G + store <4 x i32>%T , <4 x i32>* undef + ret <4 x i32> %T +} + +define<4 x i64> @func_16_64() { + %F = load <4 x i16>* undef + %G = sext <4 x i16> %F to <4 x i64> + %H = load <4 x i16>* undef + %Y = sext <4 x i16> %H to <4 x i64> + %T = xor <4 x i64> %Y, %G + store <4 x i64>%T , <4 x i64>* undef + ret <4 x i64> %T +} + +define<4 x i64> @func_32_64() { + %F = load <4 x i32>* undef + %G = sext <4 x i32> %F to <4 x i64> + %H = load <4 x i32>* undef + %Y = sext <4 x i32> %H to <4 x i64> + %T = or <4 x i64> %Y, %G + ret <4 x i64> %T +} + +define<4 x i16> @func_8_16() { + %F = load <4 x i8>* undef + %G = sext <4 x i8> %F to <4 x i16> + %H = load <4 x i8>* undef + %Y = sext <4 x i8> %H to <4 x i16> + %T = add <4 x i16> %Y, %G + ret <4 x i16> %T +} + +define<4 x i32> @func_8_32() { + %F = load <4 x i8>* undef + %G = sext <4 x i8> %F to <4 x i32> + %H = load <4 x i8>* undef + %Y = sext <4 x i8> %H to <4 x i32> + %T = sub <4 x i32> %Y, %G + ret <4 x i32> %T +} + +define<4 x i64> @func_8_64() { + %F = load <4 x i8>* undef + %G = sext <4 x i8> %F to <4 x i64> + %H = load <4 x i8>* undef + %Y = sext <4 x i8> %H to <4 x i64> + %T = add <4 x i64> %Y, %G + ret <4 x i64> %T +} + +define<4 x i32> @const_16_32() { + %G = sext <4 x i16> <i16 0, i16 3, i16 8, i16 7> to <4 x i32> + ret <4 x i32> %G +} + +define<4 x i64> @const_16_64() { + %G = sext <4 x i16> <i16 0, i16 3, i16 8, i16 7> to <4 x i64> + ret <4 x i64> %G +} + diff --git a/test/CodeGen/X86/vec_shuffle-27.ll b/test/CodeGen/X86/vec_shuffle-27.ll index d700ccb..dec98c7 100644 --- a/test/CodeGen/X86/vec_shuffle-27.ll +++ b/test/CodeGen/X86/vec_shuffle-27.ll @@ -1,7 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 -o %t -; RUN: grep addps %t | count 2 -; RUN: grep mulps %t | count 2 -; RUN: grep subps %t | count 2 +; RUN: llc < %s -march=x86 -mattr=sse41 | FileCheck %s ; ModuleID = 'vec_shuffle-27.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" @@ -9,9 +6,33 @@ target triple = "i686-apple-cl.1.0" define <8 x float> @my2filter4_1d(<4 x float> %a, <8 x float> %T0, <8 x float> %T1) nounwind readnone { entry: +; CHECK: subps +; CHECK: mulps +; CHECK: addps +; CHECK: subps +; CHECK: mulps +; CHECK: addps %tmp7 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3 > ; <<8 x float>> [#uses=1] %sub = fsub <8 x float> %T1, %T0 ; <<8 x float>> [#uses=1] %mul = fmul <8 x float> %sub, %tmp7 ; <<8 x float>> [#uses=1] %add = fadd <8 x float> %mul, %T0 ; <<8 x float>> [#uses=1] ret <8 x float> %add } + +; Test case for r122206 +define void @test2(<4 x i64>* %ap, <4 x i64>* %bp) nounwind { +entry: +; CHECK: movdqa + %a = load <4 x i64> * %ap + %b = load <4 x i64> * %bp + %mulaa = mul <4 x i64> %a, %a + %mulbb = mul <4 x i64> %b, %b + %mulab = mul <4 x i64> %a, %b + %vect1271 = shufflevector <4 x i64> %mulaa, <4 x i64> %mulbb, <4 x i32> <i32 0, i32 4, i32 undef, i32 undef> + %vect1272 = shufflevector <4 x i64> %mulaa, <4 x i64> %mulbb, <4 x i32> <i32 1, i32 5, i32 undef, i32 undef> + %vect1487 = shufflevector <4 x i64> %vect1271, <4 x i64> %mulab, <4 x i32> <i32 0, i32 1, i32 2, i32 4> + %vect1488 = shufflevector <4 x i64> %vect1272, <4 x i64> %mulab, <4 x i32> <i32 0, i32 1, i32 2, i32 5> + store <4 x i64> %vect1487, <4 x i64>* %ap + store <4 x i64> %vect1488, <4 x i64>* %bp + ret void; +}
\ No newline at end of file diff --git a/test/CodeGen/X86/vec_shuffle-30.ll b/test/CodeGen/X86/vec_shuffle-30.ll index 3f69150..1651c4c 100644 --- a/test/CodeGen/X86/vec_shuffle-30.ll +++ b/test/CodeGen/X86/vec_shuffle-30.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 -disable-mmx -o %t +; RUN: llc < %s -march=x86 -mattr=sse41 -o %t ; RUN: grep pshufhw %t | grep -- -95 | count 1 ; RUN: grep shufps %t | count 1 ; RUN: not grep pslldq %t diff --git a/test/CodeGen/X86/vec_shuffle-37.ll b/test/CodeGen/X86/vec_shuffle-37.ll index b090930..2efdb14 100644 --- a/test/CodeGen/X86/vec_shuffle-37.ll +++ b/test/CodeGen/X86/vec_shuffle-37.ll @@ -1,9 +1,10 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; RUN: llc -O0 < %s -march=x86 -mcpu=core2 | FileCheck %s --check-prefix=CHECK_O0 define <4 x i32> @t00(<4 x i32>* %a0) nounwind ssp { entry: -; CHECK: movaps (%rdi), %xmm0 +; CHECK: movaps ({{%rdi|%rcx}}), %xmm0 ; CHECK-NEXT: movaps %xmm0, %xmm1 ; CHECK-NEXT: movlps (%rax), %xmm1 ; CHECK-NEXT: shufps $36, %xmm1, %xmm0 diff --git a/test/CodeGen/X86/vec_zext.ll b/test/CodeGen/X86/vec_zext.ll new file mode 100644 index 0000000..615a50b --- /dev/null +++ b/test/CodeGen/X86/vec_zext.ll @@ -0,0 +1,69 @@ +; RUN: llc < %s -march=x86-64 +; PR 9267 + +define<4 x i32> @func_16_32() { + %F = load <4 x i16>* undef + %G = zext <4 x i16> %F to <4 x i32> + %H = load <4 x i16>* undef + %Y = zext <4 x i16> %H to <4 x i32> + %T = add <4 x i32> %Y, %G + store <4 x i32>%T , <4 x i32>* undef + ret <4 x i32> %T +} + +define<4 x i64> @func_16_64() { + %F = load <4 x i16>* undef + %G = zext <4 x i16> %F to <4 x i64> + %H = load <4 x i16>* undef + %Y = zext <4 x i16> %H to <4 x i64> + %T = xor <4 x i64> %Y, %G + store <4 x i64>%T , <4 x i64>* undef + ret <4 x i64> %T +} + +define<4 x i64> @func_32_64() { + %F = load <4 x i32>* undef + %G = zext <4 x i32> %F to <4 x i64> + %H = load <4 x i32>* undef + %Y = zext <4 x i32> %H to <4 x i64> + %T = or <4 x i64> %Y, %G + ret <4 x i64> %T +} + +define<4 x i16> @func_8_16() { + %F = load <4 x i8>* undef + %G = zext <4 x i8> %F to <4 x i16> + %H = load <4 x i8>* undef + %Y = zext <4 x i8> %H to <4 x i16> + %T = add <4 x i16> %Y, %G + ret <4 x i16> %T +} + +define<4 x i32> @func_8_32() { + %F = load <4 x i8>* undef + %G = zext <4 x i8> %F to <4 x i32> + %H = load <4 x i8>* undef + %Y = zext <4 x i8> %H to <4 x i32> + %T = sub <4 x i32> %Y, %G + ret <4 x i32> %T +} + +define<4 x i64> @func_8_64() { + %F = load <4 x i8>* undef + %G = zext <4 x i8> %F to <4 x i64> + %H = load <4 x i8>* undef + %Y = zext <4 x i8> %H to <4 x i64> + %T = add <4 x i64> %Y, %G + ret <4 x i64> %T +} + +define<4 x i32> @const_16_32() { + %G = zext <4 x i16> <i16 0, i16 3, i16 8, i16 7> to <4 x i32> + ret <4 x i32> %G +} + +define<4 x i64> @const_16_64() { + %G = zext <4 x i16> <i16 0, i16 3, i16 8, i16 7> to <4 x i64> + ret <4 x i64> %G +} + diff --git a/test/CodeGen/X86/visibility.ll b/test/CodeGen/X86/visibility.ll new file mode 100644 index 0000000..a8d2870 --- /dev/null +++ b/test/CodeGen/X86/visibility.ll @@ -0,0 +1,11 @@ +; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s + +define hidden void @foo() nounwind { +entry: + call void @bar() + ret void +} + +declare hidden void @bar() + +;CHECK: .hidden bar diff --git a/test/CodeGen/X86/vshift-1.ll b/test/CodeGen/X86/vshift-1.ll index ae845e0..4955156 100644 --- a/test/CodeGen/X86/vshift-1.ll +++ b/test/CodeGen/X86/vshift-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. diff --git a/test/CodeGen/X86/vshift-2.ll b/test/CodeGen/X86/vshift-2.ll index 36feb11..9a9b419 100644 --- a/test/CodeGen/X86/vshift-2.ll +++ b/test/CodeGen/X86/vshift-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. diff --git a/test/CodeGen/X86/vshift-3.ll b/test/CodeGen/X86/vshift-3.ll index 20d3f48..8e8a9aa 100644 --- a/test/CodeGen/X86/vshift-3.ll +++ b/test/CodeGen/X86/vshift-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. diff --git a/test/CodeGen/X86/vshift-4.ll b/test/CodeGen/X86/vshift-4.ll index 9773cbe..8e24fda 100644 --- a/test/CodeGen/X86/vshift-4.ll +++ b/test/CodeGen/X86/vshift-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same when using a shuffle splat. diff --git a/test/CodeGen/X86/vshift-5.ll b/test/CodeGen/X86/vshift-5.ll index a543f38..cb254ae 100644 --- a/test/CodeGen/X86/vshift-5.ll +++ b/test/CodeGen/X86/vshift-5.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; When loading the shift amount from memory, avoid generating the splat. diff --git a/test/CodeGen/X86/vsplit-and.ll b/test/CodeGen/X86/vsplit-and.ll index a247c6e..97dacfd 100644 --- a/test/CodeGen/X86/vsplit-and.ll +++ b/test/CodeGen/X86/vsplit-and.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 | FileCheck %s define void @t(<2 x i64>* %dst, <2 x i64> %src1, <2 x i64> %src2) nounwind readonly { diff --git a/test/CodeGen/X86/widen_arith-1.ll b/test/CodeGen/X86/widen_arith-1.ll index f8d0690..4b8016d 100644 --- a/test/CodeGen/X86/widen_arith-1.ll +++ b/test/CodeGen/X86/widen_arith-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; Widen a v3i8 to v16i8 to use a vector add diff --git a/test/CodeGen/X86/widen_arith-2.ll b/test/CodeGen/X86/widen_arith-2.ll index fdecaa3..03b3fea 100644 --- a/test/CodeGen/X86/widen_arith-2.ll +++ b/test/CodeGen/X86/widen_arith-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: paddb ; CHECK: pand diff --git a/test/CodeGen/X86/widen_arith-3.ll b/test/CodeGen/X86/widen_arith-3.ll index 1f2c250..0574923 100644 --- a/test/CodeGen/X86/widen_arith-3.ll +++ b/test/CodeGen/X86/widen_arith-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 -post-RA-scheduler=true | FileCheck %s ; CHECK: paddw ; CHECK: pextrw ; CHECK: movd diff --git a/test/CodeGen/X86/widen_arith-4.ll b/test/CodeGen/X86/widen_arith-4.ll index f7506ae..5931d63 100644 --- a/test/CodeGen/X86/widen_arith-4.ll +++ b/test/CodeGen/X86/widen_arith-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s ; CHECK: psubw ; CHECK-NEXT: pmullw diff --git a/test/CodeGen/X86/widen_arith-5.ll b/test/CodeGen/X86/widen_arith-5.ll index bae5c54..7f2eff0 100644 --- a/test/CodeGen/X86/widen_arith-5.ll +++ b/test/CodeGen/X86/widen_arith-5.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s ; CHECK: movdqa ; CHECK: pmulld ; CHECK: psubd diff --git a/test/CodeGen/X86/widen_arith-6.ll b/test/CodeGen/X86/widen_arith-6.ll index 538123f..b983d14 100644 --- a/test/CodeGen/X86/widen_arith-6.ll +++ b/test/CodeGen/X86/widen_arith-6.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: mulps ; CHECK: addps diff --git a/test/CodeGen/X86/widen_cast-1.ll b/test/CodeGen/X86/widen_cast-1.ll index d4ab174..1eace9e 100644 --- a/test/CodeGen/X86/widen_cast-1.ll +++ b/test/CodeGen/X86/widen_cast-1.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -mattr=+sse42 < %s -disable-mmx | FileCheck %s +; RUN: llc -march=x86 -mattr=+sse42 < %s | FileCheck %s ; CHECK: paddw ; CHECK: pextrd ; CHECK: movd diff --git a/test/CodeGen/X86/widen_cast-2.ll b/test/CodeGen/X86/widen_cast-2.ll index 14e8f75..5c695ea 100644 --- a/test/CodeGen/X86/widen_cast-2.ll +++ b/test/CodeGen/X86/widen_cast-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: pextrd ; CHECK: pextrd ; CHECK: movd diff --git a/test/CodeGen/X86/widen_cast-3.ll b/test/CodeGen/X86/widen_cast-3.ll index 02674dd..87486d9 100644 --- a/test/CodeGen/X86/widen_cast-3.ll +++ b/test/CodeGen/X86/widen_cast-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: paddd ; CHECK: pextrd ; CHECK: pextrd diff --git a/test/CodeGen/X86/widen_cast-4.ll b/test/CodeGen/X86/widen_cast-4.ll index 5f31e56..8e1adf5 100644 --- a/test/CodeGen/X86/widen_cast-4.ll +++ b/test/CodeGen/X86/widen_cast-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: sarb ; CHECK: sarb ; CHECK: sarb diff --git a/test/CodeGen/X86/widen_cast-5.ll b/test/CodeGen/X86/widen_cast-5.ll index d1d7fec..136578d 100644 --- a/test/CodeGen/X86/widen_cast-5.ll +++ b/test/CodeGen/X86/widen_cast-5.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: movl ; CHECK: movd diff --git a/test/CodeGen/X86/widen_cast-6.ll b/test/CodeGen/X86/widen_cast-6.ll index 08759bf..3903234 100644 --- a/test/CodeGen/X86/widen_cast-6.ll +++ b/test/CodeGen/X86/widen_cast-6.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse41 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse41 | FileCheck %s ; CHECK: movd ; Test bit convert that requires widening in the operand. diff --git a/test/CodeGen/X86/widen_conv-1.ll b/test/CodeGen/X86/widen_conv-1.ll index a2029dd..f6810cd 100644 --- a/test/CodeGen/X86/widen_conv-1.ll +++ b/test/CodeGen/X86/widen_conv-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: pshufd ; CHECK: paddd diff --git a/test/CodeGen/X86/widen_conv-2.ll b/test/CodeGen/X86/widen_conv-2.ll index b24a9b3..969cb51 100644 --- a/test/CodeGen/X86/widen_conv-2.ll +++ b/test/CodeGen/X86/widen_conv-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: movswl ; CHECK: movswl diff --git a/test/CodeGen/X86/widen_conv-3.ll b/test/CodeGen/X86/widen_conv-3.ll index 1a40800..a25fae9 100644 --- a/test/CodeGen/X86/widen_conv-3.ll +++ b/test/CodeGen/X86/widen_conv-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: cvtsi2ss ; sign to float v2i16 to v2f32 diff --git a/test/CodeGen/X86/widen_conv-4.ll b/test/CodeGen/X86/widen_conv-4.ll index e505b62..80f3a49 100644 --- a/test/CodeGen/X86/widen_conv-4.ll +++ b/test/CodeGen/X86/widen_conv-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: cvtsi2ss ; unsigned to float v7i16 to v7f32 diff --git a/test/CodeGen/X86/widen_extract-1.ll b/test/CodeGen/X86/widen_extract-1.ll index 308e6b8..4bcac58 100644 --- a/test/CodeGen/X86/widen_extract-1.ll +++ b/test/CodeGen/X86/widen_extract-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s ; widen extract subvector define void @convert(<2 x double>* %dst.addr, <3 x double> %src) { diff --git a/test/CodeGen/X86/widen_load-1.ll b/test/CodeGen/X86/widen_load-1.ll index d397645..639617f 100644 --- a/test/CodeGen/X86/widen_load-1.ll +++ b/test/CodeGen/X86/widen_load-1.ll @@ -1,4 +1,4 @@ -; RUN: llc %s -o - -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -disable-mmx | FileCheck %s +; RUN: llc %s -o - -march=x86-64 -mtriple=x86_64-unknown-linux-gnu | FileCheck %s ; PR4891 ; This load should be before the call, not after. diff --git a/test/CodeGen/X86/widen_load-2.ll b/test/CodeGen/X86/widen_load-2.ll index 551704c..6422063 100644 --- a/test/CodeGen/X86/widen_load-2.ll +++ b/test/CodeGen/X86/widen_load-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -o - -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -o - -march=x86-64 -mattr=+sse42 | FileCheck %s ; Test based on pr5626 to load/store ; diff --git a/test/CodeGen/X86/widen_select-1.ll b/test/CodeGen/X86/widen_select-1.ll deleted file mode 100644 index 061e33f..0000000 --- a/test/CodeGen/X86/widen_select-1.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s -; CHECK: je - -; widening select v6i32 and then a sub - -define void @select(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind { -entry: - %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2 - %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > - store <6 x i32> %val, <6 x i32>* %dst.addr - ret void -} diff --git a/test/CodeGen/X86/widen_shuffle-1.ll b/test/CodeGen/X86/widen_shuffle-1.ll index 463f522..034c42c 100644 --- a/test/CodeGen/X86/widen_shuffle-1.ll +++ b/test/CodeGen/X86/widen_shuffle-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; widening shuffle v3float and then a add define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind { diff --git a/test/CodeGen/X86/win64_params.ll b/test/CodeGen/X86/win64_params.ll index 0b67368..f9d4bf9 100644 --- a/test/CodeGen/X86/win64_params.ll +++ b/test/CodeGen/X86/win64_params.ll @@ -4,8 +4,8 @@ ; on the stack. define i32 @f6(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6) nounwind readnone optsize { entry: -; CHECK: movl 80(%rsp), %eax -; CHECK: addl 72(%rsp), %eax +; CHECK: movl 48(%rsp), %eax +; CHECK: addl 40(%rsp), %eax %add = add nsw i32 %p6, %p5 ret i32 %add } diff --git a/test/CodeGen/X86/win64_vararg.ll b/test/CodeGen/X86/win64_vararg.ll index 072f36a..a451318 100644 --- a/test/CodeGen/X86/win64_vararg.ll +++ b/test/CodeGen/X86/win64_vararg.ll @@ -5,11 +5,11 @@ ; calculated. define void @average_va(i32 %count, ...) nounwind { entry: -; CHECK: subq $40, %rsp -; CHECK: movq %r9, 72(%rsp) -; CHECK: movq %r8, 64(%rsp) -; CHECK: movq %rdx, 56(%rsp) -; CHECK: leaq 56(%rsp), %rax +; CHECK: pushq +; CHECK: movq %r9, 40(%rsp) +; CHECK: movq %r8, 32(%rsp) +; CHECK: movq %rdx, 24(%rsp) +; CHECK: leaq 24(%rsp), %rax %ap = alloca i8*, align 8 ; <i8**> [#uses=1] %ap1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1] diff --git a/test/CodeGen/X86/win_chkstk.ll b/test/CodeGen/X86/win_chkstk.ll index a377a7d..82ce81d 100644 --- a/test/CodeGen/X86/win_chkstk.ll +++ b/test/CodeGen/X86/win_chkstk.ll @@ -16,7 +16,7 @@ entry: ; WIN_X32: calll __chkstk ; WIN_X64: callq __chkstk ; MINGW_X32: calll __alloca -; MINGW_X64: callq _alloca +; MINGW_X64: callq __chkstk ; LINUX-NOT: call __chkstk %array4096 = alloca [4096 x i8], align 16 ; <[4096 x i8]*> [#uses=0] ret i32 0 diff --git a/test/CodeGen/X86/x86-64-extend-shift.ll b/test/CodeGen/X86/x86-64-extend-shift.ll new file mode 100644 index 0000000..6852785 --- /dev/null +++ b/test/CodeGen/X86/x86-64-extend-shift.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +; Formerly there were two shifts. + +define i64 @baz(i32 %A) nounwind { +; CHECK: shlq $49, %rax + %tmp1 = shl i32 %A, 17 + %tmp2 = zext i32 %tmp1 to i64 + %tmp3 = shl i64 %tmp2, 32 + ret i64 %tmp3 +} diff --git a/test/CodeGen/X86/x86_64-mul-by-const.ll b/test/CodeGen/X86/x86_64-mul-by-const.ll new file mode 100644 index 0000000..df48a29 --- /dev/null +++ b/test/CodeGen/X86/x86_64-mul-by-const.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +; Formerly there were two shifts. rdar://8771012. + +define i32 @f9188_mul365384439_shift27(i32 %A) nounwind { +; CHECK: imulq $365384439, +; CHECK: shrq $59, %rax + %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1] + ret i32 %tmp1 +} diff --git a/test/CodeGen/X86/xor.ll b/test/CodeGen/X86/xor.ll index 6c623cb..b90d81a 100644 --- a/test/CodeGen/X86/xor.ll +++ b/test/CodeGen/X86/xor.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32 -; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64 ; Though it is undefined, we want xor undef,undef to produce zero. define <4 x i32> @test1() nounwind { @@ -28,9 +29,9 @@ entry: ret i32 %tmp4 ; X64: test3: -; X64: notl %esi -; X64: andl %edi, %esi -; X64: movl %esi, %eax +; X64: notl [[A1:%esi|%edx]] +; X64: andl [[A0:%edi|%ecx]], [[A1]] +; X64: movl [[A1]], %eax ; X64: shrl %eax ; X64: ret diff --git a/test/CodeGen/X86/zext-extract_subreg.ll b/test/CodeGen/X86/zext-extract_subreg.ll new file mode 100644 index 0000000..e61e880 --- /dev/null +++ b/test/CodeGen/X86/zext-extract_subreg.ll @@ -0,0 +1,60 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s + +define void @t() nounwind ssp { +; CHECK: t: +entry: + br i1 undef, label %return, label %if.end.i + +if.end.i: ; preds = %entry + %tmp7.i = load i32* undef, align 4, !tbaa !0 + br i1 undef, label %return, label %if.end + +if.end: ; preds = %if.end.i +; CHECK: %if.end +; CHECK: movl (%{{.*}}), [[REG:%[a-z]+]] +; CHECK-NOT: movl [[REG]], [[REG]] +; CHECK-NEXT: xorb + %tmp138 = select i1 undef, i32 0, i32 %tmp7.i + %tmp867 = zext i32 %tmp138 to i64 + br label %while.cond + +while.cond: ; preds = %while.body, %if.end + %tmp869 = sub i64 %tmp867, 0 + %scale2.0 = trunc i64 %tmp869 to i32 + %cmp149 = icmp eq i32 %scale2.0, 0 + br i1 %cmp149, label %while.end, label %land.rhs + +land.rhs: ; preds = %while.cond + br i1 undef, label %while.body, label %while.end + +while.body: ; preds = %land.rhs + br label %while.cond + +while.end: ; preds = %land.rhs, %while.cond + br i1 undef, label %cond.false205, label %cond.true190 + +cond.true190: ; preds = %while.end + br i1 undef, label %cond.false242, label %cond.true225 + +cond.false205: ; preds = %while.end + unreachable + +cond.true225: ; preds = %cond.true190 + br i1 undef, label %cond.false280, label %cond.true271 + +cond.false242: ; preds = %cond.true190 + unreachable + +cond.true271: ; preds = %cond.true225 + unreachable + +cond.false280: ; preds = %cond.true225 + unreachable + +return: ; preds = %if.end.i, %entry + ret void +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/XCore/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/XCore/2010-04-07-DbgValueOtherTargets.ll index f24e1d1..80cf3a6 100644 --- a/test/CodeGen/XCore/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/XCore/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=xcore -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll b/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll new file mode 100644 index 0000000..f8fe0d2 --- /dev/null +++ b/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -march=xcore +%struct.st = type <{ i8, i32, i8, i32, i8, i32 }> + +@x = external global %struct.st, align 4 + +define i32 @test_entry() nounwind { +entry: + %0 = load i32* getelementptr inbounds (%struct.st* @x, i32 0, i32 3), align 2 + ret i32 %0 +} diff --git a/test/CodeGen/XCore/events.ll b/test/CodeGen/XCore/events.ll new file mode 100644 index 0000000..4fc2f26 --- /dev/null +++ b/test/CodeGen/XCore/events.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -march=xcore | FileCheck %s + +declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p) +declare i8* @llvm.xcore.waitevent() +declare void @llvm.xcore.clre() + +define i32 @f(i8 addrspace(1)* %r) nounwind { +; CHECK: f: +entry: +; CHECK: clre + call void @llvm.xcore.clre() + call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1)) + call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L2)) + %goto_addr = call i8* @llvm.xcore.waitevent() +; CHECK: waiteu + indirectbr i8* %goto_addr, [label %L1, label %L2] +L1: + br label %ret +L2: + br label %ret +ret: + %retval = phi i32 [1, %L1], [2, %L2] + ret i32 %retval +} diff --git a/test/CodeGen/XCore/globals.ll b/test/CodeGen/XCore/globals.ll index 342e5932..7487561 100644 --- a/test/CodeGen/XCore/globals.ll +++ b/test/CodeGen/XCore/globals.ll @@ -67,7 +67,7 @@ entry: ; CHECK: .section .dp.bss,"awd",@nobits ; CHECK: G2: -@G3 = constant i32 9401 +@G3 = unnamed_addr constant i32 9401 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4 ; CHECK: G3: @@ -75,7 +75,7 @@ entry: ; CHECK: .section .dp.data,"awd",@progbits ; CHECK: G4: -@G5 = constant i32* @G1 +@G5 = unnamed_addr constant i32* @G1 ; CHECK: .section .cp.rodata,"ac",@progbits ; CHECK: G5: @@ -83,7 +83,7 @@ entry: ; CHECK: .section .dp.data,"awd",@progbits ; CHECK: G6: -@G7 = constant i32* @G8 +@G7 = unnamed_addr constant i32* @G8 ; CHECK: .section .cp.rodata,"ac",@progbits ; CHECK: G7: diff --git a/test/CodeGen/XCore/resources.ll b/test/CodeGen/XCore/resources.ll new file mode 100644 index 0000000..3389912 --- /dev/null +++ b/test/CodeGen/XCore/resources.ll @@ -0,0 +1,176 @@ +; RUN: llc -march=xcore < %s | FileCheck %s + +declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type) +declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r) +declare void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value) +declare i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value) +declare i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value) +declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r) +declare void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r) +declare void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p) +declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r) + +define i8 addrspace(1)* @getr() { +; CHECK: getr: +; CHECK: getr r0, 5 + %result = call i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 5) + ret i8 addrspace(1)* %result +} + +define void @freer(i8 addrspace(1)* %r) { +; CHECK: freer: +; CHECK: freer res[r0] + call void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r) + ret void +} + +define i32 @in(i8 addrspace(1)* %r) { +; CHECK: in: +; CHECK: in r0, res[r0] + %result = call i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r) + ret i32 %result +} + +define i32 @int(i8 addrspace(1)* %r) { +; CHECK: int: +; CHECK: int r0, res[r0] + %result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r) + ret i32 %result +} + +define i32 @inct(i8 addrspace(1)* %r) { +; CHECK: inct: +; CHECK: inct r0, res[r0] + %result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r) + ret i32 %result +} + +define void @out(i8 addrspace(1)* %r, i32 %value) { +; CHECK: out: +; CHECK: out res[r0], r1 + call void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @outt(i8 addrspace(1)* %r, i32 %value) { +; CHECK: outt: +; CHECK: outt res[r0], r1 + call void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @outct(i8 addrspace(1)* %r, i32 %value) { +; CHECK: outct: +; CHECK: outct res[r0], r1 + call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @outcti(i8 addrspace(1)* %r) { +; CHECK: outcti: +; CHECK: outct res[r0], 11 + call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 11) + ret void +} + +define void @chkct(i8 addrspace(1)* %r, i32 %value) { +; CHECK: chkct: +; CHECK: chkct res[r0], r1 + call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @chkcti(i8 addrspace(1)* %r) { +; CHECK: chkcti: +; CHECK: chkct res[r0], 11 + call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 11) + ret void +} + +define void @setd(i8 addrspace(1)* %r, i32 %value) { +; CHECK: setd: +; CHECK: setd res[r0], r1 + call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @setc(i8 addrspace(1)* %r, i32 %value) { +; CHECK: setc: +; CHECK: setc res[r0], r1 + call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @setci(i8 addrspace(1)* %r) { +; CHECK: setci: +; CHECK: setc res[r0], 2 + call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 2) + ret void +} + +define i32 @inshr(i32 %value, i8 addrspace(1)* %r) { +; CHECK: inshr: +; CHECK: inshr r0, res[r1] + %result = call i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value) + ret i32 %result +} + +define i32 @outshr(i32 %value, i8 addrspace(1)* %r) { +; CHECK: outshr: +; CHECK: outshr res[r1], r0 + %result = call i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value) + ret i32 %result +} + +define void @setpt(i8 addrspace(1)* %r, i32 %value) { +; CHECK: setpt: +; CHECK: setpt res[r0], r1 + call void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define i32 @getts(i8 addrspace(1)* %r) { +; CHECK: getts: +; CHECK: getts r0, res[r0] + %result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r) + ret i32 %result +} + +define void @syncr(i8 addrspace(1)* %r) { +; CHECK: syncr: +; CHECK: syncr res[r0] + call void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r) + ret void +} + +define void @settw(i8 addrspace(1)* %r, i32 %value) { +; CHECK: settw: +; CHECK: settw res[r0], r1 + call void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @setv(i8 addrspace(1)* %r, i8* %p) { +; CHECK: setv: +; CHECK: mov r11, r1 +; CHECK-NEXT: setv res[r0], r11 + call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p) + ret void +} + +define void @eeu(i8 addrspace(1)* %r) { +; CHECK: eeu: +; CHECK: eeu res[r0] + call void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r) + ret void +} diff --git a/test/CodeGen/XCore/trampoline.ll b/test/CodeGen/XCore/trampoline.ll new file mode 100644 index 0000000..18cc45e --- /dev/null +++ b/test/CodeGen/XCore/trampoline.ll @@ -0,0 +1,37 @@ +; RUN: llc < %s -march=xcore | FileCheck %s + +%struct.FRAME.f = type { i32, i32 ()* } + +define void @f() nounwind { +entry: +; CHECK: f: +; CHECK ldap r11, g.1101 +; CHECK stw r11, sp[7] + %TRAMP.23 = alloca [20 x i8], align 2 + %FRAME.0 = alloca %struct.FRAME.f, align 4 + %TRAMP.23.sub = getelementptr inbounds [20 x i8]* %TRAMP.23, i32 0, i32 0 + %FRAME.02 = bitcast %struct.FRAME.f* %FRAME.0 to i8* + %tramp = call i8* @llvm.init.trampoline(i8* %TRAMP.23.sub, i8* bitcast (i32 (%struct.FRAME.f*)* @g.1101 to i8*), i8* %FRAME.02) + %0 = getelementptr inbounds %struct.FRAME.f* %FRAME.0, i32 0, i32 1 + %1 = bitcast i8* %tramp to i32 ()* + store i32 ()* %1, i32 ()** %0, align 4 + %2 = getelementptr inbounds %struct.FRAME.f* %FRAME.0, i32 0, i32 0 + store i32 1, i32* %2, align 4 + call void @h(i32 ()* %1) nounwind + ret void +} + +define internal i32 @g.1101(%struct.FRAME.f* nocapture nest %CHAIN.1) nounwind readonly { +entry: +; CHECK: g.1101: +; CHECK: ldw r11, sp[0] +; CHECK-NEXT: ldw r0, r11[0] +; CHECK-NEXT: retsp 0 + %0 = getelementptr inbounds %struct.FRAME.f* %CHAIN.1, i32 0, i32 0 + %1 = load i32* %0, align 4 + ret i32 %1 +} + +declare i8* @llvm.init.trampoline(i8*, i8*, i8*) nounwind + +declare void @h(i32 ()*) diff --git a/test/CodeGen/thumb2-mul.ll b/test/CodeGen/thumb2-mul.ll deleted file mode 100644 index 3cfeffc..0000000 --- a/test/CodeGen/thumb2-mul.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 | FileCheck %s - -%struct.CMPoint = type { %struct.Point, float, float, [5 x float] } -%struct.Point = type { float, float } - -define %struct.CMPoint* @t1(i32 %i, i32 %j, i32 %n, %struct.CMPoint* %thePoints) nounwind readnone ssp { -entry: -; CHECK: mla r0, r2, r0, r1 -; CHECK: add.w r0, r0, r0, lsl #3 -; CHECL: add.w r0, r3, r0, lsl #2 - %mul = mul i32 %n, %i - %add = add i32 %mul, %j - %0 = ptrtoint %struct.CMPoint* %thePoints to i32 - %mul5 = mul i32 %add, 36 - %add6 = add i32 %mul5, %0 - %1 = inttoptr i32 %add6 to %struct.CMPoint* - ret %struct.CMPoint* %1 -} diff --git a/test/DebugInfo/2009-03-03-deadstore.ll b/test/DebugInfo/2009-03-03-deadstore.ll deleted file mode 100644 index 0705c15..0000000 --- a/test/DebugInfo/2009-03-03-deadstore.ll +++ /dev/null @@ -1,108 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep alloca -; ModuleID = '<stdin>' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin9.6" - - type { } ; type %0 - type <{ i8 }> ; type %1 - type { i32 (...)**, %3 } ; type %2 - type { %4, %2*, i8, i8, %10*, %11*, %12*, %12* } ; type %3 - type { i32 (...)**, i32, i32, i32, i32, i32, %5*, %6, [8 x %6], i32, %6*, %7 } ; type %4 - type { %5*, void (i32, %4*, i32)*, i32, i32 } ; type %5 - type { i8*, i32 } ; type %6 - type { %8* } ; type %7 - type { i32, %9**, i32, %9**, i8** } ; type %8 - type { i32 (...)**, i32 } ; type %9 - type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %7 } ; type %10 - type { %9, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 } ; type %11 - type { %9 } ; type %12 - type { i32, void ()* } ; type %13 - type { %15 } ; type %14 - type { %16 } ; type %15 - type { %17 } ; type %16 - type { i32*, i32*, i32* } ; type %17 - type { %19 } ; type %18 - type { %20 } ; type %19 - type { %21 } ; type %20 - type { %14*, %14*, %14* } ; type %21 - type { i32 } ; type %22 - type { i8 } ; type %23 - type { i32* } ; type %24 - type { %14* } ; type %25 - type { %27 } ; type %26 - type { i8* } ; type %27 - type { %29, %30, %3 } ; type %28 - type { i32 (...)** } ; type %29 - type { %10, i32, %26 } ; type %30 - %llvm.dbg.anchor.type = type { i32, i32 } - %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 } - %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 } - %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 } - %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* } - %llvm.dbg.enumerator.type = type { i32, i8*, i64 } - %llvm.dbg.global_variable.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1, %0* } - %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 } - %llvm.dbg.subrange.type = type { i32, i64, i64 } - %llvm.dbg.variable.type = type { i32, %0*, i8*, %0*, i32, %0* } - -@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] -@llvm.dbg.subprograms = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] -internal constant [11 x i8] c"bigfib.cpp\00", section "llvm.metadata" ; <[11 x i8]*>:0 [#uses=1] -internal constant [84 x i8] c"/Volumes/Nanpura/mainline/llvm/projects/llvm-test/SingleSource/Benchmarks/Misc-C++/\00", section "llvm.metadata" ; <[84 x i8]*>:1 [#uses=1] -internal constant [57 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 2099)\00", section "llvm.metadata" ; <[57 x i8]*>:2 [#uses=1] -@llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @0, i32 0, i32 0), i8* getelementptr ([84 x i8]* @1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [23 x i8] c"/usr/include/c++/4.0.0\00", section "llvm.metadata" ; <[23 x i8]*>:3 [#uses=1] - - -internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*>:4 [#uses=1] -@llvm.dbg.basictype103 = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @4, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1] -internal constant [8 x i8] c"iomanip\00", section "llvm.metadata" ; <[8 x i8]*>:5 [#uses=1] -@llvm.dbg.compile_unit1548 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @5, i32 0, i32 0), i8* getelementptr ([23 x i8]* @3, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [6 x i8] c"_Setw\00", section "llvm.metadata" ; <[6 x i8]*>:6 [#uses=1] -internal constant [5 x i8] c"_M_n\00", section "llvm.metadata" ; <[5 x i8]*>:7 [#uses=1] -@llvm.dbg.derivedtype1552 = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @7, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 232, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1553 = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1552 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1] -@llvm.dbg.composite1554 = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @6, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 232, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array1553 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.array1555 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1554 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1556 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1555 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [5 x i8] c"setw\00", section "llvm.metadata" ; <[5 x i8]*>:8 [#uses=2] -internal constant [11 x i8] c"_ZSt4setwi\00", section "llvm.metadata" ; <[11 x i8]*>:9 [#uses=1] -@llvm.dbg.subprogram1559 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @8, i32 0, i32 0), i8* getelementptr ([5 x i8]* @8, i32 0, i32 0), i8* getelementptr ([11 x i8]* @9, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 242, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1556 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [4 x i8] c"__x\00", section "llvm.metadata" ; <[4 x i8]*>:10 [#uses=1] -@llvm.dbg.variable1563 = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1559 to %0*), i8* getelementptr ([4 x i8]* @10, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 244, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1554 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] - -define linkonce i32 @_ZSt4setwi(i32) nounwind { - %2 = alloca %22 ; <%22*> [#uses=2] - %3 = alloca %22 ; <%22*> [#uses=3] - %4 = alloca %22 ; <%22*> [#uses=2] - %5 = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1559 to %0*)) - %6 = bitcast %22* %3 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %6, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1563 to %0*)) - call void @llvm.dbg.stoppoint(i32 245, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*)) - %7 = getelementptr %22* %3, i32 0, i32 0 ; <i32*> [#uses=1] - store i32 %0, i32* %7, align 4 - call void @llvm.dbg.stoppoint(i32 246, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*)) - %8 = getelementptr %22* %4, i32 0, i32 0 ; <i32*> [#uses=1] - %9 = getelementptr %22* %3, i32 0, i32 0 ; <i32*> [#uses=1] - %10 = load i32* %9, align 4 ; <i32> [#uses=1] - store i32 %10, i32* %8, align 4 - %11 = getelementptr %22* %2, i32 0, i32 0 ; <i32*> [#uses=1] - %12 = getelementptr %22* %4, i32 0, i32 0 ; <i32*> [#uses=1] - %13 = load i32* %12, align 4 ; <i32> [#uses=1] - store i32 %13, i32* %11, align 4 - %14 = bitcast %22* %2 to i32* ; <i32*> [#uses=1] - %15 = load i32* %14 ; <i32> [#uses=1] - call void @llvm.dbg.stoppoint(i32 246, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*)) - call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1559 to %0*)) - ret i32 %15 -} - -declare void @llvm.dbg.func.start(%0*) nounwind - -declare void @llvm.dbg.declare(%0*, %0*) nounwind - -declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind - -declare void @llvm.dbg.region.end(%0*) nounwind - diff --git a/test/DebugInfo/2009-03-03-store-to-load-forward.ll b/test/DebugInfo/2009-03-03-store-to-load-forward.ll deleted file mode 100644 index 75d3a69..0000000 --- a/test/DebugInfo/2009-03-03-store-to-load-forward.ll +++ /dev/null @@ -1,260 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep alloca -; ModuleID = '<stdin>' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin9.6" - type { } ; type %0 - type <{ i8 }> ; type %1 - type { i32* } ; type %2 - %llvm.dbg.anchor.type = type { i32, i32 } - %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 } - %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 } - %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 } - %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* } - %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 } - %llvm.dbg.variable.type = type { i32, %0*, i8*, %0*, i32, %0* } -@llvm.dbg.compile_units = internal constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] -internal constant [11 x i8] c"bigfib.cpp\00", section "llvm.metadata" ; <[11 x i8]*>:0 [#uses=1] -internal constant [84 x i8] c"/Volumes/Nanpura/mainline/llvm/projects/llvm-test/SingleSource/Benchmarks/Misc-C++/\00", section "llvm.metadata" ; <[84 x i8]*>:1 [#uses=1] -internal constant [57 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 2099)\00", section "llvm.metadata" ; <[57 x i8]*>:2 [#uses=1] -@llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @0, i32 0, i32 0), i8* getelementptr ([84 x i8]* @1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [18 x i8] c"long unsigned int\00", section "llvm.metadata" ; <[18 x i8]*>:3 [#uses=1] -@llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @3, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 7 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1] -internal constant [69 x i8] c"/Developer/usr/llvm-gcc-4.2/lib/gcc/i686-apple-darwin9/4.2.1/include\00", section "llvm.metadata" ; <[69 x i8]*>:4 [#uses=1] -@llvm.dbg.subprograms = internal constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] -internal constant [12 x i8] c"unnamed_arg\00", section "llvm.metadata" ; <[12 x i8]*>:5 [#uses=1] -internal constant [28 x i8] c"/usr/include/c++/4.0.0/bits\00", section "llvm.metadata" ; <[28 x i8]*>:6 [#uses=1] -internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*>:7 [#uses=1] -@llvm.dbg.basictype103 = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @7, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1] -@llvm.dbg.derivedtype110 = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"<built-in>\00", section "llvm.metadata" ; <[11 x i8]*>:8 [#uses=1] -@llvm.dbg.compile_unit112 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @8, i32 0, i32 0), i8* getelementptr ([84 x i8]* @1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [10 x i8] c"ptrdiff_t\00", section "llvm.metadata" ; <[10 x i8]*>:9 [#uses=1] -@llvm.dbg.derivedtype114 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @9, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit112 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype110 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [9 x i8] c"_types.h\00", section "llvm.metadata" ; <[9 x i8]*>:10 [#uses=1] -internal constant [18 x i8] c"/usr/include/i386\00", section "llvm.metadata" ; <[18 x i8]*>:11 [#uses=1] -@llvm.dbg.compile_unit117 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), i8* getelementptr ([18 x i8]* @11, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [10 x i8] c"__int32_t\00", section "llvm.metadata" ; <[10 x i8]*>:12 [#uses=1] -@llvm.dbg.derivedtype119 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @12, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 43, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype114 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [19 x i8] c"__darwin_ct_rune_t\00", section "llvm.metadata" ; <[19 x i8]*>:13 [#uses=1] -@llvm.dbg.derivedtype121 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @13, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 50, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype119 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [19 x i8] c"__darwin_ptrdiff_t\00", section "llvm.metadata" ; <[19 x i8]*>:14 [#uses=1] -@llvm.dbg.derivedtype123 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @14, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 81, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype121 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [17 x i8] c"__darwin_wchar_t\00", section "llvm.metadata" ; <[17 x i8]*>:15 [#uses=1] -@llvm.dbg.derivedtype125 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @15, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 96, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype123 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [16 x i8] c"__darwin_rune_t\00", section "llvm.metadata" ; <[16 x i8]*>:16 [#uses=1] -@llvm.dbg.derivedtype127 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @16, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 102, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype125 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [16 x i8] c"__darwin_wint_t\00", section "llvm.metadata" ; <[16 x i8]*>:17 [#uses=1] -@llvm.dbg.derivedtype129 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @17, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 107, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype127 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [17 x i8] c"/usr/include/sys\00", section "llvm.metadata" ; <[17 x i8]*>:18 [#uses=1] -@llvm.dbg.compile_unit131 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), i8* getelementptr ([17 x i8]* @18, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [19 x i8] c"__darwin_blksize_t\00", section "llvm.metadata" ; <[19 x i8]*>:19 [#uses=1] -@llvm.dbg.derivedtype133 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @19, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 94, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype129 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [15 x i8] c"__darwin_dev_t\00", section "llvm.metadata" ; <[15 x i8]*>:20 [#uses=1] -@llvm.dbg.derivedtype135 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @20, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 95, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype133 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [15 x i8] c"__darwin_pid_t\00", section "llvm.metadata" ; <[15 x i8]*>:21 [#uses=1] -@llvm.dbg.derivedtype137 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @21, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 110, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype135 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [21 x i8] c"__darwin_suseconds_t\00", section "llvm.metadata" ; <[21 x i8]*>:22 [#uses=1] -@llvm.dbg.derivedtype139 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([21 x i8]* @22, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 131, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype137 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [17 x i8] c"__darwin_nl_item\00", section "llvm.metadata" ; <[17 x i8]*>:23 [#uses=1] -@llvm.dbg.derivedtype141 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @23, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 135, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype139 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [13 x i8] c"/usr/include\00", section "llvm.metadata" ; <[13 x i8]*>:24 [#uses=1] -@llvm.dbg.compile_unit143 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), i8* getelementptr ([13 x i8]* @24, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [19 x i8] c"__darwin_wctrans_t\00", section "llvm.metadata" ; <[19 x i8]*>:25 [#uses=1] -@llvm.dbg.derivedtype145 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @25, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit143 to %0*), i32 29, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype141 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [7 x i8] c"wait.h\00", section "llvm.metadata" ; <[7 x i8]*>:26 [#uses=1] -@llvm.dbg.compile_unit147 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([7 x i8]* @26, i32 0, i32 0), i8* getelementptr ([17 x i8]* @18, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [6 x i8] c"pid_t\00", section "llvm.metadata" ; <[6 x i8]*>:27 [#uses=1] -@llvm.dbg.derivedtype149 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @27, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit147 to %0*), i32 83, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype145 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [13 x i8] c"sig_atomic_t\00", section "llvm.metadata" ; <[13 x i8]*>:28 [#uses=1] -@llvm.dbg.derivedtype151 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @28, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit147 to %0*), i32 95, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype149 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [10 x i8] c"ct_rune_t\00", section "llvm.metadata" ; <[10 x i8]*>:29 [#uses=1] -@llvm.dbg.derivedtype153 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @29, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit147 to %0*), i32 262, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype151 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [9 x i8] c"stdlib.h\00", section "llvm.metadata" ; <[9 x i8]*>:30 [#uses=1] -@llvm.dbg.compile_unit155 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @30, i32 0, i32 0), i8* getelementptr ([13 x i8]* @24, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [7 x i8] c"rune_t\00", section "llvm.metadata" ; <[7 x i8]*>:31 [#uses=1] -@llvm.dbg.derivedtype157 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @31, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit155 to %0*), i32 81, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype153 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [8 x i8] c"types.h\00", section "llvm.metadata" ; <[8 x i8]*>:32 [#uses=1] -@llvm.dbg.compile_unit159 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @32, i32 0, i32 0), i8* getelementptr ([18 x i8]* @11, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [8 x i8] c"int32_t\00", section "llvm.metadata" ; <[8 x i8]*>:33 [#uses=1] -@llvm.dbg.derivedtype161 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @33, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit159 to %0*), i32 85, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype157 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"register_t\00", section "llvm.metadata" ; <[11 x i8]*>:34 [#uses=1] -@llvm.dbg.derivedtype163 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @34, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit159 to %0*), i32 95, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype161 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [6 x i8] c"dev_t\00", section "llvm.metadata" ; <[6 x i8]*>:35 [#uses=1] -@llvm.dbg.derivedtype165 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @35, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit159 to %0*), i32 125, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype163 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"_structs.h\00", section "llvm.metadata" ; <[11 x i8]*>:36 [#uses=1] -@llvm.dbg.compile_unit167 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @36, i32 0, i32 0), i8* getelementptr ([17 x i8]* @18, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [12 x i8] c"suseconds_t\00", section "llvm.metadata" ; <[12 x i8]*>:37 [#uses=1] -@llvm.dbg.derivedtype169 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @37, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit167 to %0*), i32 191, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype165 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [15 x i8] c"gthr-default.h\00", section "llvm.metadata" ; <[15 x i8]*>:38 [#uses=1] -internal constant [47 x i8] c"/usr/include/c++/4.0.0/i686-apple-darwin9/bits\00", section "llvm.metadata" ; <[47 x i8]*>:39 [#uses=1] -@llvm.dbg.compile_unit172 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @38, i32 0, i32 0), i8* getelementptr ([47 x i8]* @39, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [7 x i8] c"wint_t\00", section "llvm.metadata" ; <[7 x i8]*>:40 [#uses=1] -@llvm.dbg.derivedtype174 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @40, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit172 to %0*), i32 567, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype169 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [9 x i8] c"stdint.h\00", section "llvm.metadata" ; <[9 x i8]*>:41 [#uses=1] -@llvm.dbg.compile_unit176 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @41, i32 0, i32 0), i8* getelementptr ([69 x i8]* @4, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [14 x i8] c"int_least32_t\00", section "llvm.metadata" ; <[14 x i8]*>:42 [#uses=1] -@llvm.dbg.derivedtype178 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @42, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit176 to %0*), i32 60, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype174 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [13 x i8] c"int_fast32_t\00", section "llvm.metadata" ; <[13 x i8]*>:43 [#uses=1] -@llvm.dbg.derivedtype180 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @43, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit176 to %0*), i32 71, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype178 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"postypes.h\00", section "llvm.metadata" ; <[11 x i8]*>:44 [#uses=1] -@llvm.dbg.compile_unit182 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @44, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [11 x i8] c"streamsize\00", section "llvm.metadata" ; <[11 x i8]*>:45 [#uses=1] -@llvm.dbg.derivedtype184 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @45, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit182 to %0*), i32 72, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype180 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype230 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @9, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit112 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype184 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [15 x i8] c"stl_iterator.h\00", section "llvm.metadata" ; <[15 x i8]*>:46 [#uses=1] -@llvm.dbg.compile_unit709 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @46, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [11 x i8] c"_M_current\00", section "llvm.metadata" ; <[11 x i8]*>:47 [#uses=1] -internal constant [18 x i8] c"__normal_iterator\00", section "llvm.metadata" ; <[18 x i8]*>:48 [#uses=1] -internal constant [10 x i8] c"operator*\00", section "llvm.metadata" ; <[10 x i8]*>:49 [#uses=1] -internal constant [11 x i8] c"operator->\00", section "llvm.metadata" ; <[11 x i8]*>:50 [#uses=1] -internal constant [11 x i8] c"operator++\00", section "llvm.metadata" ; <[11 x i8]*>:51 [#uses=1] -internal constant [11 x i8] c"operator--\00", section "llvm.metadata" ; <[11 x i8]*>:52 [#uses=1] -@llvm.dbg.derivedtype759 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype230 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"operator[]\00", section "llvm.metadata" ; <[11 x i8]*>:53 [#uses=1] -internal constant [11 x i8] c"operator+=\00", section "llvm.metadata" ; <[11 x i8]*>:54 [#uses=1] -internal constant [10 x i8] c"operator+\00", section "llvm.metadata" ; <[10 x i8]*>:55 [#uses=1] -internal constant [11 x i8] c"operator-=\00", section "llvm.metadata" ; <[11 x i8]*>:56 [#uses=1] -internal constant [10 x i8] c"operator-\00", section "llvm.metadata" ; <[10 x i8]*>:57 [#uses=1] -internal constant [5 x i8] c"base\00", section "llvm.metadata" ; <[5 x i8]*>:58 [#uses=1] -internal constant [18 x i8] c"cpp_type_traits.h\00", section "llvm.metadata" ; <[18 x i8]*>:59 [#uses=1] -@llvm.dbg.compile_unit1192 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([18 x i8]* @59, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [12 x i8] c"__true_type\00", section "llvm.metadata" ; <[12 x i8]*>:60 [#uses=1] -@llvm.dbg.array1195 = internal constant [0 x %0*] zeroinitializer, section "llvm.metadata" ; <[0 x %0*]*> [#uses=1] -@llvm.dbg.composite1196 = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @60, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1192 to %0*), i32 93, i64 8, i64 8, i64 0, i32 0, %0* null, %0* bitcast ([0 x %0*]* @llvm.dbg.array1195 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.derivedtype1631 = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1633 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [106 x i8] c"__normal_iterator<long unsigned int*,std::vector<long unsigned int, std::ALLOCATOR<long unsigned int> > >\00", section "llvm.metadata" ; <[106 x i8]*>:61 [#uses=1] -@llvm.dbg.derivedtype1768 = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @47, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 589, i64 32, i64 32, i64 0, i32 2, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1631 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1769 = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1770 = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1771 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1770 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.subprogram1772 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 600, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1771 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.derivedtype1773 = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1631 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1774 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1773 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1775 = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1774 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1776 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1775 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.subprogram1777 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 603, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1776 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.composite1778 = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 587, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.derivedtype1779 = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1778 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1780 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1779 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1781 = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1780 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1782 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1781 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.subprogram1783 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 608, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1782 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.derivedtype1784 = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1785 = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1784 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1786 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1633 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1787 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1786 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [59 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEdeEv\00", section "llvm.metadata" ; <[59 x i8]*>:62 [#uses=1] -@llvm.dbg.subprogram1789 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @49, i32 0, i32 0), i8* getelementptr ([10 x i8]* @49, i32 0, i32 0), i8* getelementptr ([59 x i8]* @62, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 613, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1787 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1790 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1631 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1791 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1790 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [59 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEptEv\00", section "llvm.metadata" ; <[59 x i8]*>:63 [#uses=1] -@llvm.dbg.subprogram1793 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @50, i32 0, i32 0), i8* getelementptr ([11 x i8]* @50, i32 0, i32 0), i8* getelementptr ([59 x i8]* @63, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 617, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1791 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.derivedtype1794 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1795 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1794 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1796 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1795 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEppEv\00", section "llvm.metadata" ; <[58 x i8]*>:64 [#uses=1] -@llvm.dbg.subprogram1798 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([58 x i8]* @64, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 621, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1796 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1799 = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1800 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1799 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEppEi\00", section "llvm.metadata" ; <[58 x i8]*>:65 [#uses=1] -@llvm.dbg.subprogram1802 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([58 x i8]* @65, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 628, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1800 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmmEv\00", section "llvm.metadata" ; <[58 x i8]*>:66 [#uses=1] -@llvm.dbg.subprogram1804 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([58 x i8]* @66, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 633, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1796 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmmEi\00", section "llvm.metadata" ; <[58 x i8]*>:67 [#uses=1] -@llvm.dbg.subprogram1806 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([58 x i8]* @67, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 640, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1800 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1807 = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1633 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype759 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1808 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1807 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [61 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEixERKi\00", section "llvm.metadata" ; <[61 x i8]*>:68 [#uses=1] -@llvm.dbg.subprogram1810 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @53, i32 0, i32 0), i8* getelementptr ([11 x i8]* @53, i32 0, i32 0), i8* getelementptr ([61 x i8]* @68, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 645, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1808 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1811 = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1794 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype759 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1812 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1811 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [60 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEpLERKi\00", section "llvm.metadata" ; <[60 x i8]*>:69 [#uses=1] -@llvm.dbg.subprogram1814 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @54, i32 0, i32 0), i8* getelementptr ([11 x i8]* @54, i32 0, i32 0), i8* getelementptr ([60 x i8]* @69, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 649, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1812 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1815 = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype759 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1816 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1815 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [61 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEplERKi\00", section "llvm.metadata" ; <[61 x i8]*>:70 [#uses=1] -@llvm.dbg.subprogram1818 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @55, i32 0, i32 0), i8* getelementptr ([10 x i8]* @55, i32 0, i32 0), i8* getelementptr ([61 x i8]* @70, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 653, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1816 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [60 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmIERKi\00", section "llvm.metadata" ; <[60 x i8]*>:71 [#uses=1] -@llvm.dbg.subprogram1820 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @56, i32 0, i32 0), i8* getelementptr ([11 x i8]* @56, i32 0, i32 0), i8* getelementptr ([60 x i8]* @71, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 657, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1812 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [61 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmiERKi\00", section "llvm.metadata" ; <[61 x i8]*>:72 [#uses=1] -@llvm.dbg.subprogram1822 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @57, i32 0, i32 0), i8* getelementptr ([10 x i8]* @57, i32 0, i32 0), i8* getelementptr ([61 x i8]* @72, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 661, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1816 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1823 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1774 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1824 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1823 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [62 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEE4baseEv\00", section "llvm.metadata" ; <[62 x i8]*>:73 [#uses=1] -@llvm.dbg.subprogram1826 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @58, i32 0, i32 0), i8* getelementptr ([5 x i8]* @58, i32 0, i32 0), i8* getelementptr ([62 x i8]* @73, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 665, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1824 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1827 = internal constant [16 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1768 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1772 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1777 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1783 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1789 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1793 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1798 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1802 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1804 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1806 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1810 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1814 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1818 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1820 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1822 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1826 to %0*)], section "llvm.metadata" ; <[16 x %0*]*> [#uses=1] -@llvm.dbg.composite1828 = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([106 x i8]* @61, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 587, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([16 x %0*]* @llvm.dbg.array1827 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [8 x i8] c"__first\00", section "llvm.metadata" ; <[8 x i8]*>:74 [#uses=1] -internal constant [7 x i8] c"__last\00", section "llvm.metadata" ; <[7 x i8]*>:75 [#uses=1] -internal constant [9 x i8] c"__result\00", section "llvm.metadata" ; <[9 x i8]*>:76 [#uses=1] -internal constant [20 x i8] c"stl_uninitialized.h\00", section "llvm.metadata" ; <[20 x i8]*>:77 [#uses=1] -@llvm.dbg.compile_unit2900 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([20 x i8]* @77, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -@llvm.dbg.array4285 = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1196 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1] -@llvm.dbg.composite4286 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array4285 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [264 x i8] c"__uninitialized_copy_aux<__gnu_cxx::__normal_iterator<long unsigned int*, std::vector<long unsigned int, std::ALLOCATOR<long unsigned int> > >, __gnu_cxx::__normal_iterator<long unsigned int*, std::vector<long unsigned int, std::ALLOCATOR<long unsigned int> > > >\00", section "llvm.metadata" ; <[264 x i8]*>:78 [#uses=1] -internal constant [112 x i8] c"_ZSt24__uninitialized_copy_auxIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_11__true_type\00", section "llvm.metadata" ; <[112 x i8]*>:79 [#uses=1] -@llvm.dbg.subprogram4289 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([264 x i8]* @78, i32 0, i32 0), i8* getelementptr ([264 x i8]* @78, i32 0, i32 0), i8* getelementptr ([112 x i8]* @79, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite4286 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.variable4290 = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([8 x i8]* @74, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] -@llvm.dbg.variable4291 = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([7 x i8]* @75, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] -@llvm.dbg.variable4292 = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([9 x i8]* @76, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] -@llvm.dbg.variable4293 = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([12 x i8]* @5, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1196 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] -@llvm.used = appending global [1 x i8*] [i8* bitcast (i32* (i32*, i32*, i32*, %1*)* @_ZSt24__uninitialized_copy_auxIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_11__true_type to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] - -define i32* @_ZSt24__uninitialized_copy_auxIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_11__true_type(i32*, i32*, i32*, %1* byval align 4) { - %5 = alloca %2 ; <%2*> [#uses=3] - %6 = alloca %2 ; <%2*> [#uses=3] - %7 = alloca %2 ; <%2*> [#uses=3] - %8 = alloca %2 ; <%2*> [#uses=2] - %9 = alloca %2 ; <%2*> [#uses=2] - %10 = alloca %2 ; <%2*> [#uses=2] - %11 = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*)) - %12 = bitcast %2* %5 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %12, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4290 to %0*)) - %13 = getelementptr %2* %5, i32 0, i32 0 ; <i32**> [#uses=1] - store i32* %0, i32** %13 - %14 = bitcast %2* %6 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %14, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4291 to %0*)) - %15 = getelementptr %2* %6, i32 0, i32 0 ; <i32**> [#uses=1] - store i32* %1, i32** %15 - %16 = bitcast %2* %7 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %16, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4292 to %0*)) - %17 = getelementptr %2* %7, i32 0, i32 0 ; <i32**> [#uses=1] - store i32* %2, i32** %17 - %18 = bitcast %1* %3 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %18, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4293 to %0*)) - call void @llvm.dbg.stoppoint(i32 74, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*)) - %19 = getelementptr %2* %5, i32 0, i32 0 ; <i32**> [#uses=1] - %20 = load i32** %19 ; <i32*> [#uses=1] - %21 = getelementptr %2* %6, i32 0, i32 0 ; <i32**> [#uses=1] - %22 = load i32** %21 ; <i32*> [#uses=1] - %23 = getelementptr %2* %7, i32 0, i32 0 ; <i32**> [#uses=1] - %24 = load i32** %23 ; <i32*> [#uses=1] - %25 = call i32* @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_(i32* %20, i32* %22, i32* %24) ; <i32*> [#uses=1] - %26 = bitcast %2* %9 to i32** ; <i32**> [#uses=1] - store i32* %25, i32** %26, align 4 - %27 = getelementptr %2* %10, i32 0, i32 0 ; <i32**> [#uses=1] - %28 = getelementptr %2* %9, i32 0, i32 0 ; <i32**> [#uses=1] - %29 = load i32** %28, align 4 ; <i32*> [#uses=1] - store i32* %29, i32** %27, align 4 - %30 = getelementptr %2* %8, i32 0, i32 0 ; <i32**> [#uses=1] - %31 = getelementptr %2* %10, i32 0, i32 0 ; <i32**> [#uses=1] - %32 = load i32** %31, align 4 ; <i32*> [#uses=1] - store i32* %32, i32** %30, align 4 - %33 = bitcast %2* %8 to i32** ; <i32**> [#uses=1] - %34 = load i32** %33 ; <i32*> [#uses=1] - call void @llvm.dbg.stoppoint(i32 74, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*)) - call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*)) - ret i32* %34 -} - -declare void @llvm.dbg.func.start(%0*) nounwind - -declare void @llvm.dbg.declare(%0*, %0*) nounwind - -declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind - -declare void @llvm.dbg.region.end(%0*) nounwind - -declare i32* @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_(i32*, i32*, i32*) diff --git a/test/ExecutionEngine/2005-12-02-TailCallBug.ll b/test/ExecutionEngine/2005-12-02-TailCallBug.ll index 8323688..874ce39 100644 --- a/test/ExecutionEngine/2005-12-02-TailCallBug.ll +++ b/test/ExecutionEngine/2005-12-02-TailCallBug.ll @@ -1,5 +1,6 @@ ; PR672 ; RUN: lli %s +; XFAIL: arm define i32 @main() { %f = bitcast i32 (i32, i32*, i32)* @check_tail to i32* ; <i32*> [#uses=1] diff --git a/test/ExecutionEngine/test-call.ll b/test/ExecutionEngine/test-call.ll index 27e16f0..c4131a2 100644 --- a/test/ExecutionEngine/test-call.ll +++ b/test/ExecutionEngine/test-call.ll @@ -1,4 +1,5 @@ ; RUN: lli %s > /dev/null +; XFAIL: arm declare void @exit(i32) diff --git a/test/Feature/load_module.ll b/test/Feature/load_module.ll index e2e222f..05f6c23 100644 --- a/test/Feature/load_module.ll +++ b/test/Feature/load_module.ll @@ -1,6 +1,8 @@ ; PR1318 -; RUN: opt < %s -load=%llvmlibsdir/LLVMHello%shlibext -hello \ +; RUN: opt < %s -load=%llvmshlibdir/LLVMHello%shlibext -hello \ ; RUN: -disable-output |& grep Hello +; REQUIRES: loadable_module +; FIXME: On Cygming, it might fail without building LLVMHello manually. @junk = global i32 0 diff --git a/test/FrontendAda/Support/real_cst.ads b/test/FrontendAda/Support/real_cst.ads new file mode 100644 index 0000000..54a34bc --- /dev/null +++ b/test/FrontendAda/Support/real_cst.ads @@ -0,0 +1,4 @@ +with Ada.Streams; +package Real_Cst is + procedure Write (Stream : access Ada.Streams.Root_Stream_Type'Class); +end; diff --git a/test/FrontendAda/array_constructor.adb b/test/FrontendAda/array_constructor.adb index de64b45..13517c7 100644 --- a/test/FrontendAda/array_constructor.adb +++ b/test/FrontendAda/array_constructor.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Constructor is A : array (Integer range <>) of Boolean := (True, False); begin diff --git a/test/FrontendAda/array_range_ref.adb b/test/FrontendAda/array_range_ref.adb index ae9bdc6..037c5aa 100644 --- a/test/FrontendAda/array_range_ref.adb +++ b/test/FrontendAda/array_range_ref.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Range_Ref is A : String (1 .. 3); B : String := A (A'RANGE)(1 .. 3); diff --git a/test/FrontendAda/array_ref.adb b/test/FrontendAda/array_ref.adb index 9577e21..2bf4b79 100644 --- a/test/FrontendAda/array_ref.adb +++ b/test/FrontendAda/array_ref.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Ref is type A is array (Natural range <>, Natural range <>) of Boolean; type A_Access is access A; diff --git a/test/FrontendAda/array_size.adb b/test/FrontendAda/array_size.adb index 2f07d06..c73616c 100644 --- a/test/FrontendAda/array_size.adb +++ b/test/FrontendAda/array_size.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Size is subtype S is String (1 .. 2); type R is record diff --git a/test/FrontendAda/asm.adb b/test/FrontendAda/asm.adb index 575617c..844885e 100644 --- a/test/FrontendAda/asm.adb +++ b/test/FrontendAda/asm.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s with System.Machine_Code; procedure Asm is begin diff --git a/test/FrontendAda/debug_var_size.ads b/test/FrontendAda/debug_var_size.ads index ea966fb..e8863cb 100644 --- a/test/FrontendAda/debug_var_size.ads +++ b/test/FrontendAda/debug_var_size.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c -g %s +-- RUN: %llvmgcc -S -g %s package Debug_Var_Size is subtype Length_Type is Positive range 1 .. 64; type T (Length : Length_Type := 1) is record diff --git a/test/FrontendAda/element_copy.adb b/test/FrontendAda/element_copy.adb index bffcb97..29274fa 100644 --- a/test/FrontendAda/element_copy.adb +++ b/test/FrontendAda/element_copy.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -S -O2 %s -I%p/Support -o - | grep 6899714 +-- RUN: %llvmgcc -S -O2 %s -I%p/Support -o - | grep 105 | count 2 package body Element_Copy is function F return VariableSizedField is X : VariableSizedField; diff --git a/test/FrontendAda/emit_var.ads b/test/FrontendAda/emit_var.ads index 35d4544..47e2538 100644 --- a/test/FrontendAda/emit_var.ads +++ b/test/FrontendAda/emit_var.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s with Ada.Finalization; package Emit_Var is type Search_Type is new Ada.Finalization.Controlled with null record; diff --git a/test/FrontendAda/fat_fields.adb b/test/FrontendAda/fat_fields.adb index 510105f..443a9b6 100644 --- a/test/FrontendAda/fat_fields.adb +++ b/test/FrontendAda/fat_fields.adb @@ -1,5 +1,5 @@ --- RUN: %llvmgcc -c %s -I%p/Support --- RUN: %llvmgcc -c %s -I%p/Support -O2 +-- RUN: %llvmgcc -S %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support -O2 package body Fat_Fields is procedure Proc is begin diff --git a/test/FrontendAda/field_order.ads b/test/FrontendAda/field_order.ads index b49185d..9b2b37c 100644 --- a/test/FrontendAda/field_order.ads +++ b/test/FrontendAda/field_order.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s package Field_Order is type Tagged_Type is abstract tagged null record; type With_Discriminant (L : Positive) is new Tagged_Type with record diff --git a/test/FrontendAda/global_constant.adb b/test/FrontendAda/global_constant.adb index ce9f406..330f97b 100644 --- a/test/FrontendAda/global_constant.adb +++ b/test/FrontendAda/global_constant.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Global_Constant is begin raise An_Error; diff --git a/test/FrontendAda/init_size.ads b/test/FrontendAda/init_size.ads index 1d76ba2..f423682 100644 --- a/test/FrontendAda/init_size.ads +++ b/test/FrontendAda/init_size.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s package Init_Size is type T (B : Boolean := False) is record case B is diff --git a/test/FrontendAda/negative_field_offset.adb b/test/FrontendAda/negative_field_offset.adb index f8b8510..ec8184d 100644 --- a/test/FrontendAda/negative_field_offset.adb +++ b/test/FrontendAda/negative_field_offset.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s with System; procedure Negative_Field_Offset (N : Integer) is type String_Pointer is access String; diff --git a/test/FrontendAda/non_bitfield.ads b/test/FrontendAda/non_bitfield.ads index 8f5845a..8a49d46 100644 --- a/test/FrontendAda/non_bitfield.ads +++ b/test/FrontendAda/non_bitfield.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s package Non_Bitfield is type SP is access String; type E is (A, B, C); diff --git a/test/FrontendAda/non_lvalue.adb b/test/FrontendAda/non_lvalue.adb index 157f3dd..71e7e10 100644 --- a/test/FrontendAda/non_lvalue.adb +++ b/test/FrontendAda/non_lvalue.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Non_LValue is function A (Y : U) return String is begin diff --git a/test/FrontendAda/placeholder.adb b/test/FrontendAda/placeholder.adb index f33c9a5..8890826 100644 --- a/test/FrontendAda/placeholder.adb +++ b/test/FrontendAda/placeholder.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Placeholder is subtype Bounded is Integer range 1 .. 5; type Vector is array (Bounded range <>) of Integer; diff --git a/test/FrontendAda/real_cst.adb b/test/FrontendAda/real_cst.adb new file mode 100644 index 0000000..c970830 --- /dev/null +++ b/test/FrontendAda/real_cst.adb @@ -0,0 +1,8 @@ +-- RUN: %llvmgcc -S -O2 -gnatn %s +package body Real_Cst is + Cst : constant Float := 0.0; + procedure Write (Stream : access Ada.Streams.Root_Stream_Type'Class) is + begin + Float'Write (Stream, Cst); + end; +end; diff --git a/test/FrontendAda/switch.adb b/test/FrontendAda/switch.adb index f214bca..0c83a2e 100644 --- a/test/FrontendAda/switch.adb +++ b/test/FrontendAda/switch.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s function Switch (N : Integer) return Integer is begin case N is diff --git a/test/FrontendAda/unc_constructor.adb b/test/FrontendAda/unc_constructor.adb index bc3002c..ee10de6 100644 --- a/test/FrontendAda/unc_constructor.adb +++ b/test/FrontendAda/unc_constructor.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Unc_Constructor is procedure P (X : A) is begin diff --git a/test/FrontendAda/var_offset.adb b/test/FrontendAda/var_offset.adb index 09f1c15..1d3ca98 100644 --- a/test/FrontendAda/var_offset.adb +++ b/test/FrontendAda/var_offset.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Var_Offset is function F (X : T) return Character is begin diff --git a/test/FrontendAda/var_size.adb b/test/FrontendAda/var_size.adb index b3db9a3..291f91d 100644 --- a/test/FrontendAda/var_size.adb +++ b/test/FrontendAda/var_size.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Var_Size is function A (X : T) return String is begin diff --git a/test/FrontendAda/vce.adb b/test/FrontendAda/vce.adb index f24045c..85cdca0 100644 --- a/test/FrontendAda/vce.adb +++ b/test/FrontendAda/vce.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure VCE is S : String (1 .. 2); B : Character := 'B'; diff --git a/test/FrontendAda/vce_lv.adb b/test/FrontendAda/vce_lv.adb index 4ca4d5c..d1b9e08 100644 --- a/test/FrontendAda/vce_lv.adb +++ b/test/FrontendAda/vce_lv.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure VCE_LV is type P is access String ; type T is new P (5 .. 7); diff --git a/test/FrontendC++/2003-08-20-ExceptionFail.cpp b/test/FrontendC++/2003-08-20-ExceptionFail.cpp deleted file mode 100644 index f071c3c..0000000 --- a/test/FrontendC++/2003-08-20-ExceptionFail.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -void foo(); - -void bar() { - struct local { - ~local() { foo(); } - } local_obj; - - foo(); -} - diff --git a/test/FrontendC++/2003-08-21-EmptyClass.cpp b/test/FrontendC++/2003-08-21-EmptyClass.cpp deleted file mode 100644 index 5dbfa33..0000000 --- a/test/FrontendC++/2003-08-21-EmptyClass.cpp +++ /dev/null @@ -1,9 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// This tests compilation of EMPTY_CLASS_EXPR's - -struct empty {}; - -void foo(empty) {} - -void bar() { foo(empty()); } diff --git a/test/FrontendC++/2003-08-24-Cleanup.cpp b/test/FrontendC++/2003-08-24-Cleanup.cpp deleted file mode 100644 index ab0d1a0..0000000 --- a/test/FrontendC++/2003-08-24-Cleanup.cpp +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep unwind - -struct S { ~S(); }; - -int mightthrow(); - -int test() { - S s; - mightthrow(); -} diff --git a/test/FrontendC++/2003-08-27-TypeNamespaces.cpp b/test/FrontendC++/2003-08-27-TypeNamespaces.cpp deleted file mode 100644 index dec9718..0000000 --- a/test/FrontendC++/2003-08-27-TypeNamespaces.cpp +++ /dev/null @@ -1,16 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -namespace foo { - namespace bar { - struct X { X(); }; - - X::X() {} - } -} - - -namespace { - struct Y { Y(); }; - Y::Y() {} -} diff --git a/test/FrontendC++/2003-08-28-ForwardType.cpp b/test/FrontendC++/2003-08-28-ForwardType.cpp deleted file mode 100644 index 9330e94..0000000 --- a/test/FrontendC++/2003-08-28-ForwardType.cpp +++ /dev/null @@ -1,23 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// Default placement versions of operator new. -#include <new> - -void* operator new(size_t, void* __p) throw(); - - -template<typename _CharT> -struct stdio_filebuf -{ stdio_filebuf(); - -}; - -extern stdio_filebuf<char> buf_cout; - -void foo() { - // Create stream buffers for the standard streams and use - // those buffers without destroying and recreating the - // streams. - new (&buf_cout) stdio_filebuf<char>(); - -} diff --git a/test/FrontendC++/2003-08-28-SaveExprBug.cpp b/test/FrontendC++/2003-08-28-SaveExprBug.cpp deleted file mode 100644 index 98c5f5d..0000000 --- a/test/FrontendC++/2003-08-28-SaveExprBug.cpp +++ /dev/null @@ -1,24 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -char* eback(); - -template<typename foo> -struct basic_filebuf { - char *instancevar; - - void callee() { - instancevar += eback() != eback(); - } - - void caller(); -}; - - -template<typename _CharT> -void basic_filebuf<_CharT>::caller() { - callee(); -} - - -template class basic_filebuf<char>; diff --git a/test/FrontendC++/2003-08-29-ArgPassingBug.cpp b/test/FrontendC++/2003-08-29-ArgPassingBug.cpp deleted file mode 100644 index d4cddff..0000000 --- a/test/FrontendC++/2003-08-29-ArgPassingBug.cpp +++ /dev/null @@ -1,13 +0,0 @@ - -// RUN: %llvmgcc -xc++ -c -o /dev/null %s |& not grep WARNING - -struct iterator { - iterator(); - iterator(const iterator &I); -}; - -iterator foo(const iterator &I) { return I; } - -void test() { - foo(iterator()); -} diff --git a/test/FrontendC++/2003-08-31-StructLayout.cpp b/test/FrontendC++/2003-08-31-StructLayout.cpp deleted file mode 100644 index a45ad03..0000000 --- a/test/FrontendC++/2003-08-31-StructLayout.cpp +++ /dev/null @@ -1,16 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// There is a HOLE in the derived2 object due to not wanting to place the two -// baseclass instances at the same offset! - -struct baseclass {}; - -class derived1 : public baseclass { - void * NodePtr; -}; - -class derived2 : public baseclass { - derived1 current; -}; - -derived2 RI; diff --git a/test/FrontendC++/2003-09-22-CompositeExprValue.cpp b/test/FrontendC++/2003-09-22-CompositeExprValue.cpp deleted file mode 100644 index 3bd707e..0000000 --- a/test/FrontendC++/2003-09-22-CompositeExprValue.cpp +++ /dev/null @@ -1,11 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -struct duration { - duration operator/=(int c) { - return *this; - } -}; - -void a000090() { - duration() /= 1; -} diff --git a/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp b/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp deleted file mode 100644 index 72997c5..0000000 --- a/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp +++ /dev/null @@ -1,17 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// Non-POD classes cannot be passed into a function by component, because their -// dtors must be run. Instead, pass them in by reference. The C++ front-end -// was mistakenly "thinking" that 'foo' took a structure by component. - -struct C { - int A, B; - ~C() {} -}; - -void foo(C b); - -void test(C *P) { - foo(*P); -} - diff --git a/test/FrontendC++/2003-09-30-CommaExprBug.cpp b/test/FrontendC++/2003-09-30-CommaExprBug.cpp deleted file mode 100644 index 365795d..0000000 --- a/test/FrontendC++/2003-09-30-CommaExprBug.cpp +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -class Empty {}; - -void foo(Empty E); - -void bar() { - foo(Empty()); -} - diff --git a/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp b/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp deleted file mode 100644 index 63f62f2..0000000 --- a/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -struct C {}; - -C &foo(); - -void foox() { - for (; ; foo()); -} - diff --git a/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp b/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp deleted file mode 100644 index a1eee71..0000000 --- a/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// Test with an opaque type - -struct C; - -C &foo(); - -void foox() { - for (; ; foo()); -} - diff --git a/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp b/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp deleted file mode 100644 index 94c1199..0000000 --- a/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// The C++ front-end thinks the two foo's are different, the LLVM emitter -// thinks they are the same. The disconnect causes problems. - -void foo() { } - -void bar() { - void foo(); - - foo(); -} diff --git a/test/FrontendC++/2003-10-17-BoolBitfields.cpp b/test/FrontendC++/2003-10-17-BoolBitfields.cpp deleted file mode 100644 index 103945d..0000000 --- a/test/FrontendC++/2003-10-17-BoolBitfields.cpp +++ /dev/null @@ -1,11 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -struct test { - bool A : 1; - bool B : 1; -}; - -void foo(test *T) { - T->B = true; -} - diff --git a/test/FrontendC++/2003-10-21-InnerClass.cpp b/test/FrontendC++/2003-10-21-InnerClass.cpp deleted file mode 100644 index fadd51d..0000000 --- a/test/FrontendC++/2003-10-21-InnerClass.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgcc -xc++ -S -o - %s | grep {struct.X::Y} -struct X { - - struct Y { - Y(); - }; - -}; - -X::Y::Y() { - -} diff --git a/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp b/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp deleted file mode 100644 index abda017..0000000 --- a/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp +++ /dev/null @@ -1,17 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -template<class T> -struct super { - int Y; - void foo(); -}; - -template <class T> -struct test : virtual super<int> {}; - -extern test<int> X; - -void foo() { - X.foo(); -} diff --git a/test/FrontendC++/2003-11-04-ArrayConstructors.cpp b/test/FrontendC++/2003-11-04-ArrayConstructors.cpp deleted file mode 100644 index 4ab3398..0000000 --- a/test/FrontendC++/2003-11-04-ArrayConstructors.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -struct Foo { - Foo(int); - ~Foo(); -}; -void foo() { - struct { - Foo name; - } Int[] = { 1 }; -} diff --git a/test/FrontendC++/2003-11-04-CatchLabelName.cpp b/test/FrontendC++/2003-11-04-CatchLabelName.cpp deleted file mode 100644 index 7dbe788..0000000 --- a/test/FrontendC++/2003-11-04-CatchLabelName.cpp +++ /dev/null @@ -1,11 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -#include <string> - -void bar(); - -void test() { - try { - bar(); - } catch (std::string) {} -} diff --git a/test/FrontendC++/2003-11-08-ArrayAddress.cpp b/test/FrontendC++/2003-11-08-ArrayAddress.cpp deleted file mode 100644 index 9ad1b8f..0000000 --- a/test/FrontendC++/2003-11-08-ArrayAddress.cpp +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep getelementptr - -struct foo { - int array[100]; - void *getAddr(unsigned i); -}; - -void *foo::getAddr(unsigned i) { - return &array[i]; -} diff --git a/test/FrontendC++/2003-11-18-EnumArray.cpp b/test/FrontendC++/2003-11-18-EnumArray.cpp deleted file mode 100644 index bb1b3bf..0000000 --- a/test/FrontendC++/2003-11-18-EnumArray.cpp +++ /dev/null @@ -1,14 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -enum TchkType { - tchkNum, tchkString, tchkSCN, tchkNone -}; - -struct Operator { - enum TchkType tchk[8]; -}; - -struct Operator opTab[] = { - {{tchkNum, tchkNum, tchkString} } -}; - diff --git a/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp b/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp index b019e0c..a600e84 100644 --- a/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp +++ b/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc++ -c -o - %s | llvm-dis | grep _ZN11AccessFlags6strlenEv +// RUN: %llvmgcc -xc++ -S -o - %s | grep _ZN11AccessFlags6strlenEv struct AccessFlags { void strlen(); diff --git a/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp b/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp index 706d541..66b970c 100644 --- a/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp +++ b/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep callDefaultCtor | \ +// RUN: %llvmgxx -xc++ %s -S -o - | grep callDefaultCtor | \ // RUN: not grep declare // This is a testcase for LLVM PR445, which was a problem where the diff --git a/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp b/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp index 7711cff..ca600d6 100644 --- a/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp +++ b/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | opt -die | llvm-dis | not grep cast +// RUN: %llvmgxx -xc++ %s -S -o - | opt -die -S | not grep cast void foo(int*); diff --git a/test/FrontendC++/2006-09-27-Debug-Protection.cpp b/test/FrontendC++/2006-09-27-Debug-Protection.cpp index cb09bd0..2a70a0f 100644 --- a/test/FrontendC++/2006-09-27-Debug-Protection.cpp +++ b/test/FrontendC++/2006-09-27-Debug-Protection.cpp @@ -1,5 +1,5 @@ -// RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 1,} -// RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 2,} +// RUN: %llvmgxx -O0 -S -g -o - %s | grep {i32 1,} +// RUN: %llvmgxx -O0 -S -g -o - %s | grep {i32 2,} class A { public: int x; diff --git a/test/FrontendC++/2006-10-30-ClassBitfield.cpp b/test/FrontendC++/2006-10-30-ClassBitfield.cpp index bd3b173..b3b43fb 100644 --- a/test/FrontendC++/2006-10-30-ClassBitfield.cpp +++ b/test/FrontendC++/2006-10-30-ClassBitfield.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - // PR954 struct _Refcount_Base { diff --git a/test/FrontendC++/2006-11-20-GlobalSymbols.cpp b/test/FrontendC++/2006-11-20-GlobalSymbols.cpp index fc896b3..c4afd32 100644 --- a/test/FrontendC++/2006-11-20-GlobalSymbols.cpp +++ b/test/FrontendC++/2006-11-20-GlobalSymbols.cpp @@ -1,7 +1,7 @@ // PR1013 // Check to make sure debug symbols use the correct name for globals and // functions. Will not assemble if it fails to. -// RUN: %llvmgcc -O0 -g -c %s +// RUN: %llvmgcc_only -O0 -g -c %s int foo __asm__("f\001oo"); diff --git a/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp b/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp index 365c8e8..d351b94 100644 --- a/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp +++ b/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - // PR1027 struct sys_var { diff --git a/test/FrontendC++/2006-11-30-NoCompileUnit.cpp b/test/FrontendC++/2006-11-30-NoCompileUnit.cpp deleted file mode 100644 index 242a37e..0000000 --- a/test/FrontendC++/2006-11-30-NoCompileUnit.cpp +++ /dev/null @@ -1,60 +0,0 @@ -// This is a regression test on debug info to make sure we don't hit a compile -// unit size issue with gdb. -// RUN: %llvmgcc -S -O0 -g %s -o - | \ -// RUN: llc --disable-fp-elim -o NoCompileUnit.s -// RUN: %compile_c NoCompileUnit.s -o NoCompileUnit.o -// RUN: %link NoCompileUnit.o -o NoCompileUnit.exe -// RUN: echo {break main\nrun\np NoCompileUnit::pubname} > %t2 -// RUN: gdb -q -batch -n -x %t2 NoCompileUnit.exe | \ -// RUN: tee NoCompileUnit.out | not grep {"low == high"} -// XFAIL: alpha,arm -// XFAIL: * -// See PR2454 - - -class MamaDebugTest { -private: - int N; - -protected: - MamaDebugTest(int n) : N(n) {} - - int getN() const { return N; } - -}; - -class BabyDebugTest : public MamaDebugTest { -private: - -public: - BabyDebugTest(int n) : MamaDebugTest(n) {} - - static int doh; - - int doit() { - int N = getN(); - int Table[N]; - - int sum = 0; - - for (int i = 0; i < N; ++i) { - int j = i; - Table[i] = j; - } - for (int i = 0; i < N; ++i) { - int j = Table[i]; - sum += j; - } - - return sum; - } - -}; - -int BabyDebugTest::doh; - - -int main(int argc, const char *argv[]) { - BabyDebugTest BDT(20); - return BDT.doit(); -} diff --git a/test/FrontendC++/2007-01-02-UnboundedArray.cpp b/test/FrontendC++/2007-01-02-UnboundedArray.cpp index 648d19b..3103086 100644 --- a/test/FrontendC++/2007-01-02-UnboundedArray.cpp +++ b/test/FrontendC++/2007-01-02-UnboundedArray.cpp @@ -1,6 +1,6 @@ // Make sure unbounded arrays compile with debug information. // -// RUN: %llvmgcc -O0 -c -g %s +// RUN: %llvmgcc -O0 -S -g %s // PR1068 diff --git a/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp b/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp index 654e11b..5206640 100644 --- a/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp +++ b/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - | not grep gnu.linkonce. +// RUN: %llvmgxx %s -S -o - | not grep gnu.linkonce. // PR1085 class diff --git a/test/FrontendC++/2007-01-06-PtrMethodInit.cpp b/test/FrontendC++/2007-01-06-PtrMethodInit.cpp index f87c8d8..beb7945 100644 --- a/test/FrontendC++/2007-01-06-PtrMethodInit.cpp +++ b/test/FrontendC++/2007-01-06-PtrMethodInit.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - // PR1084 extern "C" diff --git a/test/FrontendC++/2007-03-27-FunctionVarRename.cpp b/test/FrontendC++/2007-03-27-FunctionVarRename.cpp index 538d6df..6ff1284 100644 --- a/test/FrontendC++/2007-03-27-FunctionVarRename.cpp +++ b/test/FrontendC++/2007-03-27-FunctionVarRename.cpp @@ -1,5 +1,5 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - | not grep eprintf1 -// RUN: %llvmgxx %s -emit-llvm -S -o - | grep eprintf +// RUN: %llvmgxx %s -S -o - | not grep eprintf1 +// RUN: %llvmgxx %s -S -o - | grep eprintf // Only one eprintf should exist in the output diff --git a/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp b/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp index eabcd57..4c2aad3 100644 --- a/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp +++ b/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp @@ -1,16 +1,16 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xglobWeak | grep linkonce | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xextWeak | grep linkonce | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xWeaknoinline | grep weak | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xWeakextnoinline | grep weak | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep linkonce | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xstatnoWeak | grep internal | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); inline int xglobWeak (int i) { diff --git a/test/FrontendC++/2007-05-03-VectorInit.cpp b/test/FrontendC++/2007-05-03-VectorInit.cpp index b87f4d4..af56d3a 100644 --- a/test/FrontendC++/2007-05-03-VectorInit.cpp +++ b/test/FrontendC++/2007-05-03-VectorInit.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - +// RUN: %llvmgxx %s -S -O0 -o - // PR1378 typedef float v4sf __attribute__((vector_size(16))); diff --git a/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp b/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp index 8392c0b..42342fc 100644 --- a/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp +++ b/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - #pragma reverse_bitfields on typedef unsigned long UINT32; diff --git a/test/FrontendC++/2007-05-23-TryFinally.cpp b/test/FrontendC++/2007-05-23-TryFinally.cpp index 38f0b02..c797182 100644 --- a/test/FrontendC++/2007-05-23-TryFinally.cpp +++ b/test/FrontendC++/2007-05-23-TryFinally.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O2 -o - | ignore grep _Unwind_Resume | \ +// RUN: %llvmgxx %s -S -O2 -o - | ignore grep _Unwind_Resume | \ // RUN: wc -l | grep {\[23\]} struct One { }; diff --git a/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp b/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp index d54dfbe..2e85abd 100644 --- a/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp +++ b/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgxx -S %s -o - | grep noalias void foo(int * __restrict myptr1, int * myptr2) { myptr1[0] = 0; diff --git a/test/FrontendC++/2007-07-29-RestrictRefArg.cpp b/test/FrontendC++/2007-07-29-RestrictRefArg.cpp index 0c28e4d..128ddb3 100644 --- a/test/FrontendC++/2007-07-29-RestrictRefArg.cpp +++ b/test/FrontendC++/2007-07-29-RestrictRefArg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgxx -S %s -o - | grep noalias void foo(int & __restrict myptr1, int & myptr2) { myptr1 = 0; diff --git a/test/FrontendC++/2007-08-01-RestrictMethod.cpp b/test/FrontendC++/2007-08-01-RestrictMethod.cpp index b4922be..feefaa1 100644 --- a/test/FrontendC++/2007-08-01-RestrictMethod.cpp +++ b/test/FrontendC++/2007-08-01-RestrictMethod.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgxx -S %s -o - | grep noalias class foo { diff --git a/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp b/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp index f813944..1fcf15f 100644 --- a/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp +++ b/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - +// RUN: %llvmgxx -S %s -o - // PR1634 namespace Manta diff --git a/test/FrontendC++/2007-10-01-StructResize.cpp b/test/FrontendC++/2007-10-01-StructResize.cpp index d37057a..71109eb 100644 --- a/test/FrontendC++/2007-10-01-StructResize.cpp +++ b/test/FrontendC++/2007-10-01-StructResize.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c %s -o /dev/null +// RUN: %llvmgxx -S %s -o /dev/null #pragma pack(4) diff --git a/test/FrontendC++/2008-10-29-WrongOffset.cpp b/test/FrontendC++/2008-10-29-WrongOffset.cpp index 1b3be21..c261c31 100644 --- a/test/FrontendC++/2008-10-29-WrongOffset.cpp +++ b/test/FrontendC++/2008-10-29-WrongOffset.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -c -o /dev/null +// RUN: %llvmgxx %s -S -o /dev/null // PR2917 #include <complex> diff --git a/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp b/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp index 8f1b598..eb69963 100644 --- a/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp +++ b/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -g --emit-llvm %s -o - | grep "\~A" +// RUN: %llvmgcc -S -g %s -o - | grep "\~A" class A { int i; public: diff --git a/test/FrontendC++/2009-03-17-dbg.cpp b/test/FrontendC++/2009-03-17-dbg.cpp index 93da618..6708e12 100644 --- a/test/FrontendC++/2009-03-17-dbg.cpp +++ b/test/FrontendC++/2009-03-17-dbg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null -g +// RUN: %llvmgxx -S %s -o /dev/null -g // XTARGET: darwin,linux // XFAIL: * template <typename T1,typename T2> diff --git a/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp b/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp index 997c3f7..e3616da 100644 --- a/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp +++ b/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -g %s -o - | llc -O0 -o %t.s +// RUN: %llvmgcc -S -g %s -o - | llc -O0 -o %t.s // RUN: %compile_c %t.s -o %t.o // PR4025 diff --git a/test/FrontendC++/2009-04-23-bool2.cpp b/test/FrontendC++/2009-04-23-bool2.cpp index 8614a37..2c76d98 100644 --- a/test/FrontendC++/2009-04-23-bool2.cpp +++ b/test/FrontendC++/2009-04-23-bool2.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null +// RUN: %llvmgxx -S %s -o /dev/null // g++.old-deja/g++.jason/bool2.C from gcc testsuite. // Crashed before 67975 went in. struct F { diff --git a/test/FrontendC++/2009-05-04-PureConstNounwind.cpp b/test/FrontendC++/2009-05-04-PureConstNounwind.cpp index a4b4653..e275c34 100644 --- a/test/FrontendC++/2009-05-04-PureConstNounwind.cpp +++ b/test/FrontendC++/2009-05-04-PureConstNounwind.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | grep nounwind | count 4 +// RUN: %llvmgxx -S %s -o - | grep nounwind | count 4 int c(void) __attribute__((const)); int p(void) __attribute__((pure)); int t(void); diff --git a/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp b/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp index b3758d2..c2a841b 100644 --- a/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp +++ b/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null -g +// RUN: %llvmgxx -S %s -o /dev/null -g // This crashes if we try to emit debug info for TEMPLATE_DECL members. template <class T> class K2PtrVectorBase {}; template <class T> class K2Vector {}; diff --git a/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp b/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp index dcb2f16..e0bc043 100644 --- a/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp +++ b/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp @@ -1,10 +1,10 @@ -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep baz | grep global | grep {struct.bar} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep ccc | grep global | grep {struct.CC} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep quux | grep global | grep {struct.bar} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep foo | grep global | grep {struct.SRCFilter::FilterEntry} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.bar} | grep {1 x i32} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.CC} | grep {struct.payre<KBFP,float*} | grep {.base.32} | grep {1 x i32} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.SRCFilter::FilterEntry} | not grep {1 x i32} +// RUN: %llvmgxx -S -m32 %s -o - | grep baz | grep global | grep {struct.bar} +// RUN: %llvmgxx -S -m32 %s -o - | grep ccc | grep global | grep {struct.CC} +// RUN: %llvmgxx -S -m32 %s -o - | grep quux | grep global | grep {struct.bar} +// RUN: %llvmgxx -S -m32 %s -o - | grep foo | grep global | grep {struct.SRCFilter::FilterEntry} +// RUN: %llvmgxx -S -m32 %s -o - | grep {struct.bar} | grep {1 x i32} +// RUN: %llvmgxx -S -m32 %s -o - | grep {struct.CC} | grep {struct.payre<KBFP,float*} | grep {.base.32} | grep {1 x i32} +// RUN: %llvmgxx -S -m32 %s -o - | grep {struct.SRCFilter::FilterEntry} | not grep {1 x i32} // XFAIL: * // XTARGET: powerpc-apple-darwin diff --git a/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp b/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp index bc862e7..89a79f2 100644 --- a/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp +++ b/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - +// RUN: %llvmgxx -S %s -o - // rdar://7114564 struct A { unsigned long long : (sizeof(unsigned long long) * 8) - 16; diff --git a/test/FrontendC++/2009-08-11-VectorRetTy.cpp b/test/FrontendC++/2009-08-11-VectorRetTy.cpp index b2c3ba1..403b59d 100644 --- a/test/FrontendC++/2009-08-11-VectorRetTy.cpp +++ b/test/FrontendC++/2009-08-11-VectorRetTy.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -c -o /dev/null +// RUN: %llvmgxx %s -S -o /dev/null // <rdar://problem/7096460> typedef void (*Func) (); typedef long long m64 __attribute__((__vector_size__(8), __may_alias__)); diff --git a/test/FrontendC++/2009-09-04-modify-crash.cpp b/test/FrontendC++/2009-09-04-modify-crash.cpp index ac16f8c..89274e0 100644 --- a/test/FrontendC++/2009-09-04-modify-crash.cpp +++ b/test/FrontendC++/2009-09-04-modify-crash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -fapple-kext -S -o - +// RUN: %llvmgxx %s -fapple-kext -S -o - // The extra check in 71555 caused this to crash on Darwin X86 // in an assert build. class foo { diff --git a/test/FrontendC++/2009-09-09-packed-layout.cpp b/test/FrontendC++/2009-09-09-packed-layout.cpp index a569f9f..921aad7 100644 --- a/test/FrontendC++/2009-09-09-packed-layout.cpp +++ b/test/FrontendC++/2009-09-09-packed-layout.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o /dev/null +// RUN: %llvmgxx -S -m32 %s -o /dev/null class X { public: virtual ~X(); diff --git a/test/FrontendC++/2009-10-27-crash.cpp b/test/FrontendC++/2009-10-27-crash.cpp index 21d0064..da73988 100644 --- a/test/FrontendC++/2009-10-27-crash.cpp +++ b/test/FrontendC++/2009-10-27-crash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -emit-llvm -S %s -o /dev/null +// RUN: %llvmgxx -S %s -o /dev/null // Radar 7328944 typedef struct diff --git a/test/FrontendC++/2010-03-22-empty-baseclass.cpp b/test/FrontendC++/2010-03-22-empty-baseclass.cpp index b6bdea4..bb741c4 100644 --- a/test/FrontendC++/2010-03-22-empty-baseclass.cpp +++ b/test/FrontendC++/2010-03-22-empty-baseclass.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - -O2 | FileCheck %s +// RUN: %llvmgxx -S %s -o - -O2 | FileCheck %s namespace boost { namespace detail { template <typename T> struct cv_traits_imp {}; diff --git a/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp b/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp index 203b542..9203dbd 100644 --- a/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp +++ b/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp @@ -1,5 +1,5 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | not grep ZN12basic_stringIcEC1Ev -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep ZN12basic_stringIcED1Ev | count 2 +// RUN: %llvmgxx -xc++ %s -S -o - | not grep ZN12basic_stringIcEC1Ev +// RUN: %llvmgxx -xc++ %s -S -o - | grep ZN12basic_stringIcED1Ev | count 2 template<class charT> class basic_string diff --git a/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp b/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp index 66acfbe..c2d6abe 100644 --- a/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp +++ b/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp @@ -1,4 +1,4 @@ -//RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep DW_TAG_auto_variable +//RUN: %llvmgxx -O0 -S -g -o - %s | grep DW_TAG_auto_variable class Foo { public: diff --git a/test/FrontendC++/2010-06-22-BitfieldInit.cpp b/test/FrontendC++/2010-06-22-BitfieldInit.cpp index 1cfe1f9..8dceb78 100644 --- a/test/FrontendC++/2010-06-22-BitfieldInit.cpp +++ b/test/FrontendC++/2010-06-22-BitfieldInit.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -g -c %s +// RUN: %llvmgxx -g -S %s struct TEST2 { int subid:32; diff --git a/test/FrontendC++/2010-06-22-ZeroBitfield.cpp b/test/FrontendC++/2010-06-22-ZeroBitfield.cpp index c979f8d..9c4f262 100644 --- a/test/FrontendC++/2010-06-22-ZeroBitfield.cpp +++ b/test/FrontendC++/2010-06-22-ZeroBitfield.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -g -c %s +// RUN: %llvmgxx -g -S %s struct s8_0 { unsigned : 0; }; struct s8_1 { double x; }; struct s8 { s8_0 a; s8_1 b; }; diff --git a/test/FrontendC++/2010-07-19-nowarn.cpp b/test/FrontendC++/2010-07-19-nowarn.cpp index 8742bf1..a61a84f 100644 --- a/test/FrontendC++/2010-07-19-nowarn.cpp +++ b/test/FrontendC++/2010-07-19-nowarn.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -m32 -fasm-blocks -o /dev/null +// RUN: %llvmgcc %s -S -m32 -fasm-blocks -o /dev/null // This should not warn about unreferenced label. 8195660. // XFAIL: * // XTARGET: x86,i386,i686 diff --git a/test/FrontendC++/2010-07-23-DeclLoc.cpp b/test/FrontendC++/2010-07-23-DeclLoc.cpp index c72de3b..9bf432b 100644 --- a/test/FrontendC++/2010-07-23-DeclLoc.cpp +++ b/test/FrontendC++/2010-07-23-DeclLoc.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -emit-llvm -S -g %s -o - | FileCheck %s +// RUN: %llvmgxx -S -g %s -o - | FileCheck %s // Require the template function declaration refer to the correct filename. // First, locate the function decl in metadata, and pluck out the file handle: // CHECK: {{extract_dwarf_data_from_header.*extract_dwarf_data_from_header.*extract_dwarf_data_from_header.*[^ ]+", metadata !}}[[filehandle:[0-9]+]], diff --git a/test/FrontendC++/member-alignment.cpp b/test/FrontendC++/member-alignment.cpp index 6afc0aa..c5b20b2 100644 --- a/test/FrontendC++/member-alignment.cpp +++ b/test/FrontendC++/member-alignment.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | FileCheck %s +// RUN: %llvmgxx -S %s -o - | FileCheck %s // XFAIL: arm,powerpc // rdar://7268289 diff --git a/test/FrontendC++/ptr-to-method-devirt.cpp b/test/FrontendC++/ptr-to-method-devirt.cpp index 358b801..a5ca5c7 100644 --- a/test/FrontendC++/ptr-to-method-devirt.cpp +++ b/test/FrontendC++/ptr-to-method-devirt.cpp @@ -1,6 +1,6 @@ // PR1602 -// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | not grep ptrtoint -// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | grep getelementptr | count 1 +// RUN: %llvmgxx -S %s -o - -O3 | not grep ptrtoint +// RUN: %llvmgxx -S %s -o - -O3 | grep getelementptr | count 1 struct S { virtual void f(); }; diff --git a/test/FrontendC++/varargs.cpp b/test/FrontendC++/varargs.cpp index 1c07aed..c4de76a 100644 --- a/test/FrontendC++/varargs.cpp +++ b/test/FrontendC++/varargs.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | FileCheck %s +// RUN: %llvmgxx -S %s -o - | FileCheck %s // rdar://7309675 // PR4678 diff --git a/test/FrontendC++/weak-external.cpp b/test/FrontendC++/weak-external.cpp index 94360c2..f4f0ba1 100644 --- a/test/FrontendC++/weak-external.cpp +++ b/test/FrontendC++/weak-external.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O2 -o - | not grep {_ZNSs12_S_constructIPKcEEPcT_S3_RKSaIcESt20forward_iterator_tag} +// RUN: %llvmgxx %s -S -O2 -o - | not grep {_ZNSs12_S_constructIPKcEEPcT_S3_RKSaIcESt20forward_iterator_tag} // PR4262 // The "basic_string" extern template instantiation declaration is supposed to diff --git a/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp b/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp index ec69afc..f81854e 100644 --- a/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp +++ b/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | grep byval | count 2 +// RUN: %llvmgxx -S %s -o - | grep byval | count 2 // XTARGET: x86 // PR4242 // (PR 4242 bug is on 64-bit only, test passes on x86-32 as well) diff --git a/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c b/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c index 39412e5..12b4f7b 100644 --- a/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c +++ b/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc -xc %s -c -o - | llvm-dis | not grep __builtin_ +/* RUN: %llvmgcc -xc %s -S -o - | not grep __builtin_ * * __builtin_longjmp/setjmp should get transformed into llvm.setjmp/longjmp * just like explicit setjmp/longjmp calls are. diff --git a/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c b/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c index c275fee..9ae633e 100644 --- a/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c +++ b/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o %t.o +// RUN: %llvmgcc -xc %s -S -o %t.o int test(_Bool pos, _Bool color) { return 0; diff --git a/test/FrontendC/2003-11-03-AddrArrayElement.c b/test/FrontendC/2003-11-03-AddrArrayElement.c index ed3fc1a..4337da7 100644 --- a/test/FrontendC/2003-11-03-AddrArrayElement.c +++ b/test/FrontendC/2003-11-03-AddrArrayElement.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgcc -xc %s -S -o - | grep getelementptr // This should be turned into a tasty getelementptr instruction, not a nasty // series of casts and address arithmetic. diff --git a/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c b/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c index 443dfbd..58f9f82 100644 --- a/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c +++ b/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgcc -xc %s -S -o - | grep getelementptr char *test(char* C) { return C-1; // Should turn into a GEP diff --git a/test/FrontendC/2003-11-13-TypeSafety.c b/test/FrontendC/2003-11-13-TypeSafety.c index 128b767..9b76bb1 100644 --- a/test/FrontendC/2003-11-13-TypeSafety.c +++ b/test/FrontendC/2003-11-13-TypeSafety.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgcc -xc %s -S -o - | grep getelementptr int *test(int *X, int Y) { return X + Y; diff --git a/test/FrontendC/2003-12-14-ExternInlineSupport.c b/test/FrontendC/2003-12-14-ExternInlineSupport.c index fb92ec7..a45eb98 100644 --- a/test/FrontendC/2003-12-14-ExternInlineSupport.c +++ b/test/FrontendC/2003-12-14-ExternInlineSupport.c @@ -1,3 +1,3 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | not grep dead_function +// RUN: %llvmgcc -xc %s -S -o - | not grep dead_function extern __inline__ void dead_function() {} diff --git a/test/FrontendC/2004-02-12-LargeAggregateCopy.c b/test/FrontendC/2004-02-12-LargeAggregateCopy.c index b3c9bcf..93b7fe4 100644 --- a/test/FrontendC/2004-02-12-LargeAggregateCopy.c +++ b/test/FrontendC/2004-02-12-LargeAggregateCopy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memcpy +// RUN: %llvmgcc -xc %s -S -o - | grep llvm.memcpy struct X { int V[10000]; }; struct X Global1, Global2; diff --git a/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c b/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c index 162d32a..f115b5a 100644 --- a/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c +++ b/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.*address | count 4 +// RUN: %llvmgcc -xc %s -S -o - | grep llvm.*address | count 4 void *test1() { return __builtin_return_address(1); diff --git a/test/FrontendC/2004-02-13-IllegalVararg.c b/test/FrontendC/2004-02-13-IllegalVararg.c index 21039c6..0d003c8 100644 --- a/test/FrontendC/2004-02-13-IllegalVararg.c +++ b/test/FrontendC/2004-02-13-IllegalVararg.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -w -c -o - | llc +// RUN: %llvmgcc -xc %s -w -S -o - | llc // XFAIL: * // See PR2452 diff --git a/test/FrontendC/2004-02-13-Memset.c b/test/FrontendC/2004-02-13-Memset.c index fc26051..fb6ed23 100644 --- a/test/FrontendC/2004-02-13-Memset.c +++ b/test/FrontendC/2004-02-13-Memset.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memset | count 3 +// RUN: %llvmgcc -xc %s -S -o - | grep llvm.memset | count 3 void *memset(void*, int, long); void bzero(void*, long); diff --git a/test/FrontendC/2004-02-20-Builtins.c b/test/FrontendC/2004-02-20-Builtins.c index 0c9ac7c..c056a84 100644 --- a/test/FrontendC/2004-02-20-Builtins.c +++ b/test/FrontendC/2004-02-20-Builtins.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O3 -xc %s -c -o - | llvm-dis | not grep builtin +// RUN: %llvmgcc -O3 -xc %s -S -o - | not grep builtin #include <math.h> diff --git a/test/FrontendC/2004-03-07-ExternalConstant.c b/test/FrontendC/2004-03-07-ExternalConstant.c index b8e13a3..4a9094b 100644 --- a/test/FrontendC/2004-03-07-ExternalConstant.c +++ b/test/FrontendC/2004-03-07-ExternalConstant.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep constant +// RUN: %llvmgcc -xc %s -S -o - | grep constant extern const int a[]; // 'a' should be marked constant even though it's external! int foo () { diff --git a/test/FrontendC/2004-06-17-UnorderedCompares.c b/test/FrontendC/2004-06-17-UnorderedCompares.c index f91ed66..286e7bc 100644 --- a/test/FrontendC/2004-06-17-UnorderedCompares.c +++ b/test/FrontendC/2004-06-17-UnorderedCompares.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc -std=c99 %s -c -o - | llvm-dis | grep -v llvm.isunordered | not grep call +// RUN: %llvmgcc -xc -std=c99 %s -S -o - | grep -v llvm.isunordered | not grep call #include <math.h> diff --git a/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c b/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c index b1e1421..994ac8f 100644 --- a/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c +++ b/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | \ -// RUN: opt -std-compile-opts | llvm-dis | not grep {declare i32.*func} +// RUN: %llvmgcc -S %s -o - | \ +// RUN: opt -std-compile-opts -S | not grep {declare i32.*func} // There should not be an unresolved reference to func here. Believe it or not, // the "expected result" is a function named 'func' which is internal and diff --git a/test/FrontendC/2005-01-02-PointerDifference.c b/test/FrontendC/2005-01-02-PointerDifference.c index a351da2..2c108e5 100644 --- a/test/FrontendC/2005-01-02-PointerDifference.c +++ b/test/FrontendC/2005-01-02-PointerDifference.c @@ -1,3 +1,3 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep -v div +// RUN: %llvmgcc -xc %s -S -o - | grep -v div int Diff(int *P, int *Q) { return P-Q; } diff --git a/test/FrontendC/2005-02-27-MarkGlobalConstant.c b/test/FrontendC/2005-02-27-MarkGlobalConstant.c index b9fbbb6..6806c94 100644 --- a/test/FrontendC/2005-02-27-MarkGlobalConstant.c +++ b/test/FrontendC/2005-02-27-MarkGlobalConstant.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -S -o - | grep {private constant } +// RUN: %llvmgcc -xc %s -S -o - | grep {private unnamed_addr constant } // The synthetic global made by the CFE for big initializer should be marked // constant. diff --git a/test/FrontendC/2005-12-04-AttributeUsed.c b/test/FrontendC/2005-12-04-AttributeUsed.c index 33e27e8..f47e977 100644 --- a/test/FrontendC/2005-12-04-AttributeUsed.c +++ b/test/FrontendC/2005-12-04-AttributeUsed.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llvm-as | llvm-dis | \ +// RUN: %llvmgcc %s -S -o - | llvm-as | llvm-dis | \ // RUN: grep llvm.used | grep foo | grep X int X __attribute__((used)); diff --git a/test/FrontendC/2006-03-03-MissingInitializer.c b/test/FrontendC/2006-03-03-MissingInitializer.c index 19d4bc7..5e027b1 100644 --- a/test/FrontendC/2006-03-03-MissingInitializer.c +++ b/test/FrontendC/2006-03-03-MissingInitializer.c @@ -1,5 +1,5 @@ // RUN: %llvmgcc %s -S -o - | opt -std-compile-opts | \ -// RUN: llvm-dis | grep {@nate.*internal global i32 0} +// RUN: llvm-dis | grep {@nate.*internal unnamed_addr global i32 0} struct X { int *XX; int Y;}; diff --git a/test/FrontendC/2007-01-06-KNR-Proto.c b/test/FrontendC/2007-01-06-KNR-Proto.c index eb2f254..6aa74d4 100644 --- a/test/FrontendC/2007-01-06-KNR-Proto.c +++ b/test/FrontendC/2007-01-06-KNR-Proto.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -o - -emit-llvm %s +// RUN: %llvmgcc -S -o - %s // PR1083 int svc_register (void (*dispatch) (int)); diff --git a/test/FrontendC/2007-02-04-AddrLValue-2.c b/test/FrontendC/2007-02-04-AddrLValue-2.c index 90251e6..fa20faf 100644 --- a/test/FrontendC/2007-02-04-AddrLValue-2.c +++ b/test/FrontendC/2007-02-04-AddrLValue-2.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1173 struct S { char s; }; diff --git a/test/FrontendC/2007-02-04-AddrLValue.c b/test/FrontendC/2007-02-04-AddrLValue.c index c8b65a9..214fce7 100644 --- a/test/FrontendC/2007-02-04-AddrLValue.c +++ b/test/FrontendC/2007-02-04-AddrLValue.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1176 typedef struct diff --git a/test/FrontendC/2007-02-04-EmptyStruct.c b/test/FrontendC/2007-02-04-EmptyStruct.c index 48ad31f..5ad2c70 100644 --- a/test/FrontendC/2007-02-04-EmptyStruct.c +++ b/test/FrontendC/2007-02-04-EmptyStruct.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1175 struct empty { }; diff --git a/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c b/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c index f02a44b..d5a9fbb 100644 --- a/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c +++ b/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1174 void zzz (char *s1, char *s2, int len, int *q) diff --git a/test/FrontendC/2007-02-05-nested.c b/test/FrontendC/2007-02-05-nested.c index be23f17..bd6d306 100644 --- a/test/FrontendC/2007-02-05-nested.c +++ b/test/FrontendC/2007-02-05-nested.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -fnested-functions -O0 -o - -emit-llvm %s +// RUN: %llvmgcc -S -fnested-functions -O0 -o - %s // PR915 extern void abort(void); diff --git a/test/FrontendC/2007-02-07-AddrLabel.c b/test/FrontendC/2007-02-07-AddrLabel.c index 144f62d..03ed4c9 100644 --- a/test/FrontendC/2007-02-07-AddrLabel.c +++ b/test/FrontendC/2007-02-07-AddrLabel.c @@ -1,5 +1,5 @@ // PR947 -// RUN: %llvmgcc %s -c -o - +// RUN: %llvmgcc %s -S -o - void foo() { void *ptr; diff --git a/test/FrontendC/2007-02-16-VoidPtrDiff.c b/test/FrontendC/2007-02-16-VoidPtrDiff.c index 713b9b2..15df28c 100644 --- a/test/FrontendC/2007-02-16-VoidPtrDiff.c +++ b/test/FrontendC/2007-02-16-VoidPtrDiff.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -o - -emit-llvm +// RUN: %llvmgcc %s -S -o - void foo(void *ptr, int test) { (ptr - ((void *) test + 0x2000)); diff --git a/test/FrontendC/2007-02-16-WritableStrings.c b/test/FrontendC/2007-02-16-WritableStrings.c index 0f281ce..8fa7f15 100644 --- a/test/FrontendC/2007-02-16-WritableStrings.c +++ b/test/FrontendC/2007-02-16-WritableStrings.c @@ -1,7 +1,7 @@ // Test the -fwritable-strings option. -// RUN: %llvmgcc -O3 -S -o - -emit-llvm -fwritable-strings %s | \ -// RUN: grep {internal global} -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {private constant} +// RUN: %llvmgcc -O3 -S -o - -fwritable-strings %s | \ +// RUN: grep {internal unnamed_addr global} +// RUN: %llvmgcc -O3 -S -o - %s | grep {private unnamed_addr constant} char *X = "foo"; diff --git a/test/FrontendC/2007-02-25-C-DotDotDot.c b/test/FrontendC/2007-02-25-C-DotDotDot.c index 9696022..3f96fd1 100644 --- a/test/FrontendC/2007-02-25-C-DotDotDot.c +++ b/test/FrontendC/2007-02-25-C-DotDotDot.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O0 -S -o - -emit-llvm -fno-inline -fno-unit-at-a-time %s | \ +// RUN: %llvmgcc -O0 -S -o - -fno-inline -fno-unit-at-a-time %s | \ // RUN: grep {call float @foo} // Make sure the call to foo is compiled as: diff --git a/test/FrontendC/2007-03-01-VarSizeArrayIdx.c b/test/FrontendC/2007-03-01-VarSizeArrayIdx.c index a3d480c..6ebe796 100644 --- a/test/FrontendC/2007-03-01-VarSizeArrayIdx.c +++ b/test/FrontendC/2007-03-01-VarSizeArrayIdx.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm | grep mul +// RUN: %llvmgcc %s -O3 -S -o - | grep mul // PR1233 float foo(int w, float A[][w], int g, int h) { diff --git a/test/FrontendC/2007-04-11-InlineAsmStruct.c b/test/FrontendC/2007-04-11-InlineAsmStruct.c index 49741c6..6c6c150 100644 --- a/test/FrontendC/2007-04-11-InlineAsmStruct.c +++ b/test/FrontendC/2007-04-11-InlineAsmStruct.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llc +// RUN: %llvmgcc %s -S -o - | llc struct V { short X, Y; }; int bar() { diff --git a/test/FrontendC/2007-04-11-InlineAsmUnion.c b/test/FrontendC/2007-04-11-InlineAsmUnion.c index 83fe7db..0144701 100644 --- a/test/FrontendC/2007-04-11-InlineAsmUnion.c +++ b/test/FrontendC/2007-04-11-InlineAsmUnion.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llc +// RUN: %llvmgcc %s -S -o - | llc union U { int x; float p; }; void foo() { diff --git a/test/FrontendC/2007-04-11-InlineStorageClassC89.c b/test/FrontendC/2007-04-11-InlineStorageClassC89.c index ec2b1ec..834fb07 100644 --- a/test/FrontendC/2007-04-11-InlineStorageClassC89.c +++ b/test/FrontendC/2007-04-11-InlineStorageClassC89.c @@ -1,17 +1,17 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xglobWeak | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | grep xglobWeak | \ // RUN: grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xextWeak | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | grep xextWeak | \ // RUN: grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xWeaknoinline | grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xWeakextnoinline | grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep -v internal | grep -v weak | \ // RUN: grep -v linkonce | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xstatnoWeak | grep internal | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep available_externally | grep -v weak | \ // RUN: grep -v linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); diff --git a/test/FrontendC/2007-04-11-InlineStorageClassC99.c b/test/FrontendC/2007-04-11-InlineStorageClassC99.c index 89af278..6031071 100644 --- a/test/FrontendC/2007-04-11-InlineStorageClassC99.c +++ b/test/FrontendC/2007-04-11-InlineStorageClassC99.c @@ -1,17 +1,17 @@ -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep declare | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep declare | \ // RUN: grep xglobWeak | grep extern_weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xextWeak | grep weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xWeaknoinline | grep weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xWeakextnoinline | grep weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep available_externally | grep -v weak | \ // RUN: grep -v linkonce | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xstatnoWeak | grep internal | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep -v available_externally | grep -v weak | \ // RUN: grep -v linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); diff --git a/test/FrontendC/2007-04-13-InlineAsmStruct2.c b/test/FrontendC/2007-04-13-InlineAsmStruct2.c index e4870e7..44ddeb3 100644 --- a/test/FrontendC/2007-04-13-InlineAsmStruct2.c +++ b/test/FrontendC/2007-04-13-InlineAsmStruct2.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep {call void asm} +// RUN: %llvmgcc %s -S -o - | grep {call void asm} struct V { short X, Y; }; int bar() { diff --git a/test/FrontendC/2007-04-13-InlineAsmUnion2.c b/test/FrontendC/2007-04-13-InlineAsmUnion2.c index 284654d..a0944a7 100644 --- a/test/FrontendC/2007-04-13-InlineAsmUnion2.c +++ b/test/FrontendC/2007-04-13-InlineAsmUnion2.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep {call void asm} +// RUN: %llvmgcc %s -S -o - | grep {call void asm} union U { int x; char* p; }; void foo() { diff --git a/test/FrontendC/2007-04-24-VolatileStructCopy.c b/test/FrontendC/2007-04-24-VolatileStructCopy.c index 4765921..d49e75e 100644 --- a/test/FrontendC/2007-04-24-VolatileStructCopy.c +++ b/test/FrontendC/2007-04-24-VolatileStructCopy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {volatile store} +// RUN: %llvmgcc -O3 -S -o - %s | grep {volatile store} // PR1352 struct foo { diff --git a/test/FrontendC/2007-04-24-bit-not-expr.c b/test/FrontendC/2007-04-24-bit-not-expr.c index 1c27f181..fab0b90 100644 --- a/test/FrontendC/2007-04-24-bit-not-expr.c +++ b/test/FrontendC/2007-04-24-bit-not-expr.c @@ -1,5 +1,5 @@ // PR 1346 -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null extern bar(void *); void f(void *cd) { diff --git a/test/FrontendC/2007-04-24-str-const.c b/test/FrontendC/2007-04-24-str-const.c index 4c109c4..3c3dab3 100644 --- a/test/FrontendC/2007-04-24-str-const.c +++ b/test/FrontendC/2007-04-24-str-const.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null static char *str; static const struct { diff --git a/test/FrontendC/2007-05-07-PaddingElements.c b/test/FrontendC/2007-05-07-PaddingElements.c index 9be8850..1e4f4d0 100644 --- a/test/FrontendC/2007-05-07-PaddingElements.c +++ b/test/FrontendC/2007-05-07-PaddingElements.c @@ -1,6 +1,6 @@ // PR 1278 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep {struct.s} | not grep "4 x i8] zeroinitializer" -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | not grep "i32 0, i32 2" +// RUN: %llvmgcc %s -S -O0 -o - | grep {struct.s} | not grep "4 x i8] zeroinitializer" +// RUN: %llvmgcc %s -S -O0 -o - | not grep "i32 0, i32 2" struct s { double d1; int s1; diff --git a/test/FrontendC/2007-05-11-str-const.c b/test/FrontendC/2007-05-11-str-const.c index 48deddb..46a74c1 100644 --- a/test/FrontendC/2007-05-11-str-const.c +++ b/test/FrontendC/2007-05-11-str-const.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -g %s -o /dev/null +// RUN: %llvmgcc -S -g %s -o /dev/null static unsigned char out[]={0,1}; static const unsigned char str1[]="1"; diff --git a/test/FrontendC/2007-05-15-PaddingElement.c b/test/FrontendC/2007-05-15-PaddingElement.c index a218b35..bad6a11 100644 --- a/test/FrontendC/2007-05-15-PaddingElement.c +++ b/test/FrontendC/2007-05-15-PaddingElement.c @@ -1,6 +1,6 @@ // PR 1419 -// RUN: %llvmgcc -xc -O2 %s -c -o - | llvm-dis | grep "ret i32 1" +// RUN: %llvmgcc -xc -O2 %s -S -o - | grep "ret i32 1" struct A { short x; long long :0; diff --git a/test/FrontendC/2007-05-16-EmptyStruct.c b/test/FrontendC/2007-05-16-EmptyStruct.c index 23c0b1d..7b2ab61 100644 --- a/test/FrontendC/2007-05-16-EmptyStruct.c +++ b/test/FrontendC/2007-05-16-EmptyStruct.c @@ -1,5 +1,5 @@ // PR 1417 -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep "struct.anon = type \{\}" +// RUN: %llvmgcc -xc %s -S -o - | grep "struct.anon = type \{\}" struct { } *X; diff --git a/test/FrontendC/2007-05-29-UnionCopy.c b/test/FrontendC/2007-05-29-UnionCopy.c index ded67d4..95ab388 100644 --- a/test/FrontendC/2007-05-29-UnionCopy.c +++ b/test/FrontendC/2007-05-29-UnionCopy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -o - -emit-llvm %s | grep memcpy +// RUN: %llvmgcc -S -o - %s | grep memcpy // PR1421 struct A { diff --git a/test/FrontendC/2007-06-05-NoInlineAttribute.c b/test/FrontendC/2007-06-05-NoInlineAttribute.c index b11b3c7..9543538 100644 --- a/test/FrontendC/2007-06-05-NoInlineAttribute.c +++ b/test/FrontendC/2007-06-05-NoInlineAttribute.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O2 -c -emit-llvm %s -o - | llvm-dis | grep call +// RUN: %llvmgcc -O2 -S %s -o - | grep call static int bar(int x, int y) __attribute__((noinline)); diff --git a/test/FrontendC/2007-06-15-AnnotateAttribute.c b/test/FrontendC/2007-06-15-AnnotateAttribute.c index 0099117..115c3f7 100644 --- a/test/FrontendC/2007-06-15-AnnotateAttribute.c +++ b/test/FrontendC/2007-06-15-AnnotateAttribute.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.global.annotations -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.var.annotation | count 3 +// RUN: %llvmgcc -S %s -o - | grep llvm.global.annotations +// RUN: %llvmgcc -S %s -o - | grep llvm.var.annotation | count 3 #include <stdio.h> diff --git a/test/FrontendC/2007-06-18-SextAttrAggregate.c b/test/FrontendC/2007-06-18-SextAttrAggregate.c index 2fcd726..c395db2 100644 --- a/test/FrontendC/2007-06-18-SextAttrAggregate.c +++ b/test/FrontendC/2007-06-18-SextAttrAggregate.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -o - -S -emit-llvm -O3 | grep {i8 signext} +// RUN: %llvmgcc %s -o - -S -O3 | grep {i8 signext} // PR1513 struct s{ diff --git a/test/FrontendC/2007-07-29-RestrictPtrArg.c b/test/FrontendC/2007-07-29-RestrictPtrArg.c index 99eae39..5925d97 100644 --- a/test/FrontendC/2007-07-29-RestrictPtrArg.c +++ b/test/FrontendC/2007-07-29-RestrictPtrArg.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgcc -S %s -o - | grep noalias void foo(int * __restrict myptr1, int * myptr2) { myptr1[0] = 0; diff --git a/test/FrontendC/2007-08-01-LoadStoreAlign.c b/test/FrontendC/2007-08-01-LoadStoreAlign.c index 75a82c1..5365c06 100644 --- a/test/FrontendC/2007-08-01-LoadStoreAlign.c +++ b/test/FrontendC/2007-08-01-LoadStoreAlign.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {align 1} | count 2 -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llc +// RUN: %llvmgcc -O3 -S -o - %s | grep {align 1} | count 2 +// RUN: %llvmgcc -O3 -S -o - %s | llc struct p { char a; diff --git a/test/FrontendC/2007-08-21-ComplexCst.c b/test/FrontendC/2007-08-21-ComplexCst.c index 7ddd87c..ebdee14 100644 --- a/test/FrontendC/2007-08-21-ComplexCst.c +++ b/test/FrontendC/2007-08-21-ComplexCst.c @@ -1,3 +1,3 @@ -// RUN: %llvmgcc -O2 -c %s -o /dev/null +// RUN: %llvmgcc -O2 -S %s -o /dev/null void f(_Complex float z); void g() { f(1.0i); } diff --git a/test/FrontendC/2007-09-05-ConstCtor.c b/test/FrontendC/2007-09-05-ConstCtor.c index 8e0e994..adae4a6 100644 --- a/test/FrontendC/2007-09-05-ConstCtor.c +++ b/test/FrontendC/2007-09-05-ConstCtor.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc -Os -c %s -o /dev/null +// RUN: %llvmgcc -xc -Os -S %s -o /dev/null // PR1641 struct A { diff --git a/test/FrontendC/2007-09-20-GcrootAttribute.c b/test/FrontendC/2007-09-20-GcrootAttribute.c index 23cd37f..b67b474 100644 --- a/test/FrontendC/2007-09-20-GcrootAttribute.c +++ b/test/FrontendC/2007-09-20-GcrootAttribute.c @@ -1,6 +1,6 @@ -// RUN: %llvmgcc -S -emit-llvm %s -o - | grep llvm.gcroot -// RUN: %llvmgcc -S -emit-llvm %s -o - | grep llvm.gcroot | count 6 -// RUN: %llvmgcc -S -emit-llvm %s -o - | llvm-as +// RUN: %llvmgcc -S %s -o - | grep llvm.gcroot +// RUN: %llvmgcc -S %s -o - | grep llvm.gcroot | count 6 +// RUN: %llvmgcc -S %s -o - | llvm-as typedef struct foo_s { diff --git a/test/FrontendC/2007-11-07-AlignedMemcpy.c b/test/FrontendC/2007-11-07-AlignedMemcpy.c index f1900bb..eb9d22c 100644 --- a/test/FrontendC/2007-11-07-AlignedMemcpy.c +++ b/test/FrontendC/2007-11-07-AlignedMemcpy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null void bork() { int Qux[33] = {0}; } diff --git a/test/FrontendC/2007-11-27-SExtZExt.c b/test/FrontendC/2007-11-27-SExtZExt.c index 2b6cd62..8ea4786 100644 --- a/test/FrontendC/2007-11-27-SExtZExt.c +++ b/test/FrontendC/2007-11-27-SExtZExt.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S %s -emit-llvm -o - | grep "signext" | count 4 +// RUN: %llvmgcc -S %s -o - | grep "signext" | count 4 signed char foo1() { return 1; } diff --git a/test/FrontendC/2008-01-25-ByValReadNone.c b/test/FrontendC/2008-01-25-ByValReadNone.c index 42e9c36..4cb1a63 100644 --- a/test/FrontendC/2008-01-25-ByValReadNone.c +++ b/test/FrontendC/2008-01-25-ByValReadNone.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | not grep readonly -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | not grep readnone +// RUN: %llvmgcc -O3 -S -o - %s | not grep readonly +// RUN: %llvmgcc -O3 -S -o - %s | not grep readnone // The struct being passed byval means that we cannot mark the diff --git a/test/FrontendC/2008-01-28-PragmaMark.c b/test/FrontendC/2008-01-28-PragmaMark.c index 0b3ac17..6a4b5b5 100644 --- a/test/FrontendC/2008-01-28-PragmaMark.c +++ b/test/FrontendC/2008-01-28-PragmaMark.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -Werror -c %s -o /dev/null +// RUN: %llvmgcc -Werror -S %s -o /dev/null #pragma mark LLVM's world #ifdef DO_ERROR #error LLVM's world diff --git a/test/FrontendC/2008-03-03-CtorAttrType.c b/test/FrontendC/2008-03-03-CtorAttrType.c index dc0e47d..96648f4 100644 --- a/test/FrontendC/2008-03-03-CtorAttrType.c +++ b/test/FrontendC/2008-03-03-CtorAttrType.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.global_ctors +// RUN: %llvmgcc %s -S -o - | grep llvm.global_ctors int __attribute__((constructor)) foo(void) { return 0; } diff --git a/test/FrontendC/2008-03-05-syncPtr.c b/test/FrontendC/2008-03-05-syncPtr.c index 43e4671..7b271f7 100644 --- a/test/FrontendC/2008-03-05-syncPtr.c +++ b/test/FrontendC/2008-03-05-syncPtr.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.atomic +// RUN: %llvmgcc %s -S -o - | grep llvm.atomic // XFAIL: sparc-sun-solaris2|arm // Feature currently implemented only for x86, alpha, powerpc. diff --git a/test/FrontendC/2008-05-19-AlwaysInline.c b/test/FrontendC/2008-05-19-AlwaysInline.c index 506f6cf..8dcb57b 100644 --- a/test/FrontendC/2008-05-19-AlwaysInline.c +++ b/test/FrontendC/2008-05-19-AlwaysInline.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc %s -S -fno-unit-at-a-time -emit-llvm -O0 -o - | not grep sabrina -// RUN: %llvmgcc %s -S -funit-at-a-time -emit-llvm -O0 -o - | not grep sabrina +// RUN: %llvmgcc %s -S -fno-unit-at-a-time -O0 -o - | not grep sabrina +// RUN: %llvmgcc %s -S -funit-at-a-time -O0 -o - | not grep sabrina static inline int sabrina (void) __attribute__((always_inline)); static inline int sabrina (void) diff --git a/test/FrontendC/2008-08-07-AlignPadding1.c b/test/FrontendC/2008-08-07-AlignPadding1.c index 776b105..6be9fe4 100644 --- a/test/FrontendC/2008-08-07-AlignPadding1.c +++ b/test/FrontendC/2008-08-07-AlignPadding1.c @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc %s -S -o - -emit-llvm -O0 | grep {zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer} +/* RUN: %llvmgcc %s -S -o - -O0 | grep {zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer} The FE must generate padding here both at the end of each PyG_Head and between array elements. Reduced from Python. */ diff --git a/test/FrontendC/2008-08-07-AlignPadding2.c b/test/FrontendC/2008-08-07-AlignPadding2.c index ea13a0a..51135ba 100644 --- a/test/FrontendC/2008-08-07-AlignPadding2.c +++ b/test/FrontendC/2008-08-07-AlignPadding2.c @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc %s -S -o - -emit-llvm -O0 | grep zeroinitializer | count 1 +/* RUN: %llvmgcc %s -S -o - -O0 | grep zeroinitializer | count 1 The FE must not generate padding here between array elements. PR 2533. */ diff --git a/test/FrontendC/2008-10-30-ZeroPlacement.c b/test/FrontendC/2008-10-30-ZeroPlacement.c index ec4ea94..d73442d 100644 --- a/test/FrontendC/2008-10-30-ZeroPlacement.c +++ b/test/FrontendC/2008-10-30-ZeroPlacement.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s +// RUN: %llvmgcc -S %s // PR2987 struct S2045 { diff --git a/test/FrontendC/2008-11-02-WeakAlias.c b/test/FrontendC/2008-11-02-WeakAlias.c index befafe4..d10e57f 100644 --- a/test/FrontendC/2008-11-02-WeakAlias.c +++ b/test/FrontendC/2008-11-02-WeakAlias.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -emit-llvm -o - %s | grep weak +// RUN: %llvmgcc -S -o - %s | grep weak // PR2691 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); diff --git a/test/FrontendC/2008-11-08-InstCombineSelect.c b/test/FrontendC/2008-11-08-InstCombineSelect.c index 70c8d3a..b850d3f 100644 --- a/test/FrontendC/2008-11-08-InstCombineSelect.c +++ b/test/FrontendC/2008-11-08-InstCombineSelect.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O2 -o - +// RUN: %llvmgcc %s -S -O2 -o - // PR3028 int g_187; diff --git a/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c b/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c index fa5713e..8af59d5 100644 --- a/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c +++ b/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.ptr.annotation | count 3 +// RUN: %llvmgcc -S %s -o - | grep llvm.ptr.annotation | count 3 #include <stdio.h> diff --git a/test/FrontendC/2008-12-23-AsmIntPointerTie.c b/test/FrontendC/2008-12-23-AsmIntPointerTie.c index da2eda6..5706142 100644 --- a/test/FrontendC/2008-12-23-AsmIntPointerTie.c +++ b/test/FrontendC/2008-12-23-AsmIntPointerTie.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - +// RUN: %llvmgcc %s -S -O1 -o - #include <stdint.h> diff --git a/test/FrontendC/2009-01-05-BlockInlining.c b/test/FrontendC/2009-01-05-BlockInlining.c index 9692d8f..8fb6e54 100644 --- a/test/FrontendC/2009-01-05-BlockInlining.c +++ b/test/FrontendC/2009-01-05-BlockInlining.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O2 -o %t.s +// RUN: %llvmgcc %s -S -O2 -o %t.s // RUN: grep {call i32 .*printf.*argc} %t.s | count 3 // RUN: not grep __block_holder_tmp %t.s // rdar://5865221 diff --git a/test/FrontendC/2009-03-13-dbg.c b/test/FrontendC/2009-03-13-dbg.c index aa13af4..46abd3a 100644 --- a/test/FrontendC/2009-03-13-dbg.c +++ b/test/FrontendC/2009-03-13-dbg.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -g -o /dev/null +// RUN: %llvmgcc %s -S -g -o /dev/null // XTARGET: darwin,linux // XFAIL: * void foo() {} diff --git a/test/FrontendC/2009-05-04-EnumInreg.c b/test/FrontendC/2009-05-04-EnumInreg.c index 6dbdb54..fb0c03e 100644 --- a/test/FrontendC/2009-05-04-EnumInreg.c +++ b/test/FrontendC/2009-05-04-EnumInreg.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -m32 -mregparm=3 %s -emit-llvm -o - | grep {inreg %action} +// RUN: %llvmgcc -S -m32 -mregparm=3 %s -o - | grep {inreg %action} // XFAIL: * // XTARGET: x86,i386,i686 // PR3967 diff --git a/test/FrontendC/2010-01-13-MemBarrier.c b/test/FrontendC/2010-01-13-MemBarrier.c index 8fcd522..a540e59 100644 --- a/test/FrontendC/2010-01-13-MemBarrier.c +++ b/test/FrontendC/2010-01-13-MemBarrier.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // XFAIL: sparc // rdar://7536390 diff --git a/test/FrontendC/2010-05-18-asmsched.c b/test/FrontendC/2010-05-18-asmsched.c index 12e9140..33b8770 100644 --- a/test/FrontendC/2010-05-18-asmsched.c +++ b/test/FrontendC/2010-05-18-asmsched.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -O3 -emit-llvm -o - | llc -march=x86-64 -mtriple=x86_64-apple-darwin | FileCheck %s +// RUN: %llvmgcc %s -S -O3 -o - | llc -march=x86-64 -mtriple=x86_64-apple-darwin | FileCheck %s // r9 used to be clobbered before its value was moved to r10. 7993104. void foo(int x, int y) { diff --git a/test/FrontendC/2010-05-26-AsmSideEffect.c b/test/FrontendC/2010-05-26-AsmSideEffect.c index c5f7579..acc38b7 100644 --- a/test/FrontendC/2010-05-26-AsmSideEffect.c +++ b/test/FrontendC/2010-05-26-AsmSideEffect.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // Radar 8026855 int test (void *src) { diff --git a/test/FrontendC/2010-06-28-nowarn.c b/test/FrontendC/2010-06-28-nowarn.c index 9cfb663..3db8df1 100644 --- a/test/FrontendC/2010-06-28-nowarn.c +++ b/test/FrontendC/2010-06-28-nowarn.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -m32 -fasm-blocks -o /dev/null +// RUN: %llvmgcc %s -S -m32 -fasm-blocks -o /dev/null // This should not warn about unreferenced label. 7729514. // XFAIL: * // XTARGET: x86,i386,i686 diff --git a/test/FrontendC/2010-07-14-overconservative-align.c b/test/FrontendC/2010-07-14-overconservative-align.c index 1744ba8..c4a9caa 100644 --- a/test/FrontendC/2010-07-14-overconservative-align.c +++ b/test/FrontendC/2010-07-14-overconservative-align.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -emit-llvm -S -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // PR 5995 struct s { int word; diff --git a/test/FrontendC/2010-11-16-asmblock.c b/test/FrontendC/2010-11-16-asmblock.c new file mode 100644 index 0000000..c264223 --- /dev/null +++ b/test/FrontendC/2010-11-16-asmblock.c @@ -0,0 +1,16 @@ +// RUN: %llvmgcc -S %s -fasm-blocks -o - | FileCheck %s +// XFAIL: * +// XTARGET: x86,i386,i686 +// 84282548 + +void foo() +{ +// CHECK: %0 = call i32 asm sideeffect "", "={ecx}"() nounwind +// CHECK: %asmtmp = call i32 asm sideeffect alignstack "sall $$3, $0", "={ecx},{ecx},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %0) nounwind +// CHECK: store i32 %asmtmp, i32* %"%ecx" + __asm { + sal ecx, 3; + add esi, ecx; + add edi, ecx; + } +} diff --git a/test/FrontendC/2010-12-01-CommonGlobal.c b/test/FrontendC/2010-12-01-CommonGlobal.c new file mode 100644 index 0000000..3f6d7e8 --- /dev/null +++ b/test/FrontendC/2010-12-01-CommonGlobal.c @@ -0,0 +1,7 @@ +// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null +// Don't crash on a common-linkage constant global. +extern const int kABSourceTypeProperty; +int foo(void) { + return kABSourceTypeProperty; +} +const int kABSourceTypeProperty; diff --git a/test/FrontendC/2011-02-21-DATA-common.c b/test/FrontendC/2011-02-21-DATA-common.c new file mode 100644 index 0000000..650ae7e --- /dev/null +++ b/test/FrontendC/2011-02-21-DATA-common.c @@ -0,0 +1,5 @@ +// RUN: %llvmgcc -S %s -o /dev/null +struct rtxc_snapshot { + int a, b, c, d; +}; +__attribute__ ((section("__DATA, __common"))) static struct rtxc_snapshot rtxc_log_A[4]; diff --git a/test/FrontendC/2011-03-02-UnionInitializer.c b/test/FrontendC/2011-03-02-UnionInitializer.c new file mode 100644 index 0000000..a5ea75e --- /dev/null +++ b/test/FrontendC/2011-03-02-UnionInitializer.c @@ -0,0 +1,2 @@ +// RUN: %llvmgcc -S %s +union { int :3; double f; } u17_017 = {17.17}; diff --git a/test/FrontendC/attribute_constructor.c b/test/FrontendC/attribute_constructor.c index b2f7c9b..da17a37 100644 --- a/test/FrontendC/attribute_constructor.c +++ b/test/FrontendC/attribute_constructor.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -o - | llvm-dis | grep llvm.global_ctors +// RUN: %llvmgcc %s -S -o - | grep llvm.global_ctors void foo() __attribute__((constructor)); void foo() { diff --git a/test/FrontendC/block-copy.c b/test/FrontendC/block-copy.c index a53732e..c088f2d 100644 --- a/test/FrontendC/block-copy.c +++ b/test/FrontendC/block-copy.c @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc %s -S -o - -emit-llvm -O3 | grep {call.*memcpy} +/* RUN: %llvmgcc %s -S -o - -O3 | grep {call.*memcpy} This should compile into a memcpy from a global, not 128 stores. */ diff --git a/test/FrontendC/cstring-align.c b/test/FrontendC/cstring-align.c index 764126e..544c9f3 100644 --- a/test/FrontendC/cstring-align.c +++ b/test/FrontendC/cstring-align.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -Os -emit-llvm -o - | llc -march=x86 -mtriple=i386-apple-darwin10 | FileCheck %s +// RUN: %llvmgcc %s -S -Os -o - | llc -march=x86 -mtriple=i386-apple-darwin10 | FileCheck %s extern void func(const char *, const char *); diff --git a/test/FrontendC/extern-weak.c b/test/FrontendC/extern-weak.c index 4729b04..73b59cc 100644 --- a/test/FrontendC/extern-weak.c +++ b/test/FrontendC/extern-weak.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep extern_weak -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llc +// RUN: %llvmgcc -O3 -S -o - %s | grep extern_weak +// RUN: %llvmgcc -O3 -S -o - %s | llc #if !defined(__linux__) && !defined(__FreeBSD__) && \ !defined(__OpenBSD__) && !defined(__CYGWIN__) && !defined(__DragonFly__) diff --git a/test/FrontendC/func-aligned.c b/test/FrontendC/func-aligned.c index 40149f4..477e824 100644 --- a/test/FrontendC/func-aligned.c +++ b/test/FrontendC/func-aligned.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // rdar://7270273 void foo() __attribute__((aligned (64))); diff --git a/test/FrontendC/hidden-visibility.c b/test/FrontendC/hidden-visibility.c index fc2ae44..589bb53 100644 --- a/test/FrontendC/hidden-visibility.c +++ b/test/FrontendC/hidden-visibility.c @@ -1,3 +1,3 @@ -// RUN: %llvmgcc %s -emit-llvm -S -o - | grep {hidden global} +// RUN: %llvmgcc %s -S -o - | grep {hidden unnamed_addr global} int X __attribute__ ((__visibility__ ("hidden"))) = 123; diff --git a/test/FrontendC/implicit-arg.c b/test/FrontendC/implicit-arg.c index 971245f..a6cb8bc 100644 --- a/test/FrontendC/implicit-arg.c +++ b/test/FrontendC/implicit-arg.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - +// RUN: %llvmgcc %s -S -O0 -o - +// RUN: %llvmgcc %s -S -O1 -o - // rdar://6518089 static int bar(); diff --git a/test/FrontendC/libcalls-d.c b/test/FrontendC/libcalls-d.c index 126866a..d92208d 100644 --- a/test/FrontendC/libcalls-d.c +++ b/test/FrontendC/libcalls-d.c @@ -1,10 +1,10 @@ // llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't // and -fno-builtins shouldn't. // -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not. -// RUN: %llvmgcc %s -S -fno-math-errno -emit-llvm -O0 -o - | grep {call.*exp2\\.f64} -// RUN: %llvmgcc %s -S -fmath-errno -emit-llvm -O0 -o - | grep {call.*exp2} -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp} -// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2} +// RUN: %llvmgcc %s -S -fno-math-errno -O0 -o - | grep {call.*exp2\\.f64} +// RUN: %llvmgcc %s -S -fmath-errno -O0 -o - | grep {call.*exp2} +// RUN: %llvmgcc %s -S -O1 -o - | grep {call.*ldexp} +// RUN: %llvmgcc %s -S -O3 -fno-builtin -o - | grep {call.*exp2} double exp2(double); diff --git a/test/FrontendC/libcalls-ld.c b/test/FrontendC/libcalls-ld.c index 6533eb8..cf71d19 100644 --- a/test/FrontendC/libcalls-ld.c +++ b/test/FrontendC/libcalls-ld.c @@ -1,10 +1,10 @@ // llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't // and -fno-builtins shouldn't. // -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not. -// RUN: %llvmgcc %s -S -fno-math-errno -emit-llvm -O0 -o - | grep {call.*exp2\\..*f} -// RUN: %llvmgcc %s -S -fmath-errno -emit-llvm -O0 -o - | grep {call.*exp2l} -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp} -// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2l} +// RUN: %llvmgcc %s -S -fno-math-errno -O0 -o - | grep {call.*exp2\\..*f} +// RUN: %llvmgcc %s -S -fmath-errno -O0 -o - | grep {call.*exp2l} +// RUN: %llvmgcc %s -S -O1 -o - | grep {call.*ldexp} +// RUN: %llvmgcc %s -S -O3 -fno-builtin -o - | grep {call.*exp2l} // If this fails for you because your target doesn't support long double, // please xfail the test. diff --git a/test/FrontendC/libcalls.c b/test/FrontendC/libcalls.c index a2761dd..60e22e7 100644 --- a/test/FrontendC/libcalls.c +++ b/test/FrontendC/libcalls.c @@ -1,10 +1,10 @@ // llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't // and -fno-builtins shouldn't. // -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not. -// RUN: %llvmgcc %s -S -emit-llvm -fno-math-errno -O0 -o - | grep {call.*exp2\\.f32} -// RUN: %llvmgcc %s -S -emit-llvm -fmath-errno -O0 -o - | grep {call.*exp2f} -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp} -// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2f} +// RUN: %llvmgcc %s -S -fno-math-errno -O0 -o - | grep {call.*exp2\\.f32} +// RUN: %llvmgcc %s -S -fmath-errno -O0 -o - | grep {call.*exp2f} +// RUN: %llvmgcc %s -S -O1 -o - | grep {call.*ldexp} +// RUN: %llvmgcc %s -S -O3 -fno-builtin -o - | grep {call.*exp2f} float exp2f(float); diff --git a/test/FrontendC/pr3518.c b/test/FrontendC/pr3518.c index 4c193c7..112394a 100644 --- a/test/FrontendC/pr3518.c +++ b/test/FrontendC/pr3518.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep {= internal global} | count 4 +// RUN: %llvmgcc %s -S -O0 -o - | grep {= internal unnamed_addr global} | count 4 // PR 3518 // Some of the objects were coming out as unintialized (external) before 3518 // was fixed. Internal names are different between llvm-gcc and clang so they diff --git a/test/FrontendC/pr4349.c b/test/FrontendC/pr4349.c index fbd7e56..24acd9c 100644 --- a/test/FrontendC/pr4349.c +++ b/test/FrontendC/pr4349.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | FileCheck %s +// RUN: %llvmgcc %s -S -O0 -o - | FileCheck %s // PR 4349 union reg @@ -16,22 +16,22 @@ struct svar { void *ptr; }; -// CHECK: @svars1 = global [1 x %struct.svar] [%struct.svar { i8* bitcast (%struct.cpu* @cpu to i8*) }] +// CHECK: @svars1 = unnamed_addr global [1 x %struct.svar] [%struct.svar { i8* bitcast (%struct.cpu* @cpu to i8*) }] struct svar svars1[] = { { &((cpu.pc).w[0]) } }; -// CHECK: @svars2 = global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x i8]* bitcast (%struct.cpu* @cpu to [2 x i8]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) }] +// CHECK: @svars2 = unnamed_addr global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x i8]* bitcast (%struct.cpu* @cpu to [2 x i8]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) }] struct svar svars2[] = { { &((cpu.pc).b[0][1]) } }; -// CHECK: @svars3 = global [1 x %struct.svar] [%struct.svar { i8* bitcast (i16* getelementptr ([2 x i16]* bitcast (%struct.cpu* @cpu to [2 x i16]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) to i8*) }] +// CHECK: @svars3 = unnamed_addr global [1 x %struct.svar] [%struct.svar { i8* bitcast (i16* getelementptr ([2 x i16]* bitcast (%struct.cpu* @cpu to [2 x i16]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) to i8*) }] struct svar svars3[] = { { &((cpu.pc).w[1]) } }; -// CHECK: @svars4 = global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x [2 x i8]]* bitcast (%struct.cpu* @cpu to [2 x [2 x i8]]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1, i{{[0-9]+}} 1) }] +// CHECK: @svars4 = unnamed_addr global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x [2 x i8]]* bitcast (%struct.cpu* @cpu to [2 x [2 x i8]]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1, i{{[0-9]+}} 1) }] struct svar svars4[] = { { &((cpu.pc).b[1][1]) } diff --git a/test/FrontendC/pr5406.c b/test/FrontendC/pr5406.c index 492bdaf..0b1f277 100644 --- a/test/FrontendC/pr5406.c +++ b/test/FrontendC/pr5406.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | FileCheck %s +// RUN: %llvmgcc %s -S -O0 -o - | FileCheck %s // PR 5406 // XFAIL: * diff --git a/test/FrontendC/ptr-rotate.c b/test/FrontendC/ptr-rotate.c index 56c21f4..36d9755 100644 --- a/test/FrontendC/ptr-rotate.c +++ b/test/FrontendC/ptr-rotate.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc %s -c -m32 -o /dev/null -// RUN: %llvmgcc %s -c -O1 -m32 -emit-llvm -o - | llc -march=x86 -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN +// RUN: %llvmgcc %s -S -m32 -o /dev/null +// RUN: %llvmgcc %s -S -O1 -m32 -o - | llc -march=x86 -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN unsigned int func(void *A) { // DARWIN: roll $27 diff --git a/test/FrontendC/sret.c b/test/FrontendC/sret.c index 11ac5d6..4266691 100644 --- a/test/FrontendC/sret.c +++ b/test/FrontendC/sret.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | count 5 +// RUN: %llvmgcc %s -S -O0 -o - | grep sret | count 5 struct abc { long a; diff --git a/test/FrontendC/sret2.c b/test/FrontendC/sret2.c index 7b621f9..0f35b1c 100644 --- a/test/FrontendC/sret2.c +++ b/test/FrontendC/sret2.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | count 2 +// RUN: %llvmgcc %s -S -O0 -o - | grep sret | count 2 struct abc { long a; diff --git a/test/FrontendC/unaligned-memcpy.c b/test/FrontendC/unaligned-memcpy.c index 9e6ce07..8fb84e4 100644 --- a/test/FrontendC/unaligned-memcpy.c +++ b/test/FrontendC/unaligned-memcpy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llc +// RUN: %llvmgcc %s -S -o - | llc void bork() { char Qux[33] = {0}; diff --git a/test/FrontendFortran/2008-11-03-OptionOverride.f90 b/test/FrontendFortran/2008-11-03-OptionOverride.f90 index 316e722..d65ba9b 100644 --- a/test/FrontendFortran/2008-11-03-OptionOverride.f90 +++ b/test/FrontendFortran/2008-11-03-OptionOverride.f90 @@ -1,4 +1,4 @@ -! RUN: %llvmgcc -c %s -march=k8 +! RUN: %llvmgcc -S %s -march=k8 ! XTARGET: x86 ! Note: this file intentionally left blank, the problem itself is in ! frontend initialization routines and march flag! diff --git a/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 b/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 index 870e99b..ddd05c5 100644 --- a/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 +++ b/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 @@ -1,4 +1,4 @@ -! RUN: %llvmgcc -c %s +! RUN: %llvmgcc -S %s ! PR2437 program main implicit none diff --git a/test/FrontendFortran/cpow.f90 b/test/FrontendFortran/cpow.f90 index 19ae378..25156fd 100644 --- a/test/FrontendFortran/cpow.f90 +++ b/test/FrontendFortran/cpow.f90 @@ -1,4 +1,4 @@ -! RUN: %llvmgcc -c %s +! RUN: %llvmgcc -S %s ! PR2443 ! Program to test the power (**) operator diff --git a/test/FrontendObjC++/2007-10-03-MetadataPointers.mm b/test/FrontendObjC++/2007-10-03-MetadataPointers.mm index 5975e38..2ab76c1 100644 --- a/test/FrontendObjC++/2007-10-03-MetadataPointers.mm +++ b/test/FrontendObjC++/2007-10-03-MetadataPointers.mm @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -w -x objective-c++ -c %s -o /dev/null +// RUN: %llvmgcc -w -x objective-c++ -S %s -o /dev/null @class NSImage; void bork() { diff --git a/test/FrontendObjC++/2010-08-02-NonPODObjectValue.mm b/test/FrontendObjC++/2010-08-02-NonPODObjectValue.mm index 298844e..da47ed0 100644 --- a/test/FrontendObjC++/2010-08-02-NonPODObjectValue.mm +++ b/test/FrontendObjC++/2010-08-02-NonPODObjectValue.mm @@ -1,4 +1,4 @@ -// RUN: not %llvmgcc %s -S -emit-llvm -o - |& FileCheck %s +// RUN: not %llvmgcc %s -S -o - |& FileCheck %s // This tests for a specific diagnostic in LLVM-GCC. // Clang compiles this correctly with no diagnostic, // ergo this test will fail with a Clang-based front-end. diff --git a/test/FrontendObjC++/2010-08-04-Template.mm b/test/FrontendObjC++/2010-08-04-Template.mm index d038340..2ebfd3e 100644 --- a/test/FrontendObjC++/2010-08-04-Template.mm +++ b/test/FrontendObjC++/2010-08-04-Template.mm @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm +// RUN: %llvmgcc %s -S struct TRunSoon { template <class P1> static void Post() {} }; diff --git a/test/FrontendObjC++/2010-08-06-X.Y-syntax.mm b/test/FrontendObjC++/2010-08-06-X.Y-syntax.mm index b33d730..986094c 100644 --- a/test/FrontendObjC++/2010-08-06-X.Y-syntax.mm +++ b/test/FrontendObjC++/2010-08-06-X.Y-syntax.mm @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm +// RUN: %llvmgcc %s -S struct TFENode { TFENode(const TFENode& inNode); }; diff --git a/test/FrontendObjC/2007-04-03-ObjcEH.m b/test/FrontendObjC/2007-04-03-ObjcEH.m index 353323d..ae744c7 100644 --- a/test/FrontendObjC/2007-04-03-ObjcEH.m +++ b/test/FrontendObjC/2007-04-03-ObjcEH.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null @interface B -(int)bar; diff --git a/test/FrontendObjC/2007-05-02-Strong.m b/test/FrontendObjC/2007-05-02-Strong.m index 3778fd2..34b41ad 100644 --- a/test/FrontendObjC/2007-05-02-Strong.m +++ b/test/FrontendObjC/2007-05-02-Strong.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -fobjc-gc -o /dev/null +// RUN: %llvmgcc -S %s -fobjc-gc -o /dev/null typedef int NSInteger; typedef struct _NSRect { int origin; diff --git a/test/FrontendObjC/2007-09-25-EH.m b/test/FrontendObjC/2007-09-25-EH.m index 5fa9cbb..d625584 100644 --- a/test/FrontendObjC/2007-09-25-EH.m +++ b/test/FrontendObjC/2007-09-25-EH.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -w -m64 -mmacosx-version-min=10.5 %s -o /dev/null +// RUN: %llvmgcc -S -w -m64 -mmacosx-version-min=10.5 %s -o /dev/null // XFAIL: * // XTARGET: darwin @class NSDictionary, DSoBuffer, DSoDirectory, NSMutableArray; diff --git a/test/FrontendObjC/2007-10-18-ProDescriptor.m b/test/FrontendObjC/2007-10-18-ProDescriptor.m index e87a43f..220fdd2 100644 --- a/test/FrontendObjC/2007-10-18-ProDescriptor.m +++ b/test/FrontendObjC/2007-10-18-ProDescriptor.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -x objective-c -c %s -o /dev/null +// RUN: %llvmgcc -x objective-c -S %s -o /dev/null @protocol O @end @interface O < O > { diff --git a/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m b/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m index 866c330..4bbe440 100644 --- a/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m +++ b/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -x objective-c -c %s -o /dev/null -fobjc-gc +// RUN: %llvmgcc -x objective-c -S %s -o /dev/null -fobjc-gc // rdar://5541393 typedef unsigned int NSUInteger; diff --git a/test/FrontendObjC/2008-10-3-EhValue.m b/test/FrontendObjC/2008-10-3-EhValue.m index a4c0cae..c7aabe2 100644 --- a/test/FrontendObjC/2008-10-3-EhValue.m +++ b/test/FrontendObjC/2008-10-3-EhValue.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -w -x objective-c -c %s -o /dev/null +// RUN: %llvmgcc -w -x objective-c -S %s -o /dev/null @interface Object { @public diff --git a/test/FrontendObjC/2008-11-12-Metadata.m b/test/FrontendObjC/2008-11-12-Metadata.m index 7e9f028..be8ee41 100644 --- a/test/FrontendObjC/2008-11-12-Metadata.m +++ b/test/FrontendObjC/2008-11-12-Metadata.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -x objective-c -m64 -c %s -o /dev/null +// RUN: %llvmgcc -x objective-c -m64 -S %s -o /dev/null @interface A @end diff --git a/test/FrontendObjC/2008-11-25-Blocks.m b/test/FrontendObjC/2008-11-25-Blocks.m index 258d70a..c5cd3d2 100644 --- a/test/FrontendObjC/2008-11-25-Blocks.m +++ b/test/FrontendObjC/2008-11-25-Blocks.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null // rdar://6394879 @interface bork diff --git a/test/FrontendObjC/2009-02-05-VolatileProp.m b/test/FrontendObjC/2009-02-05-VolatileProp.m index 461f92b..1deef73 100644 --- a/test/FrontendObjC/2009-02-05-VolatileProp.m +++ b/test/FrontendObjC/2009-02-05-VolatileProp.m @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc -w -x objective-c -c %s -o /dev/null -pedantic-errors +/* RUN: %llvmgcc -w -x objective-c -S %s -o /dev/null -pedantic-errors rdar://6551276 */ void foo(const unsigned short *); diff --git a/test/FrontendObjC/2009-04-14-AsmSection.m b/test/FrontendObjC/2009-04-14-AsmSection.m index de2cef0..aefe088 100644 --- a/test/FrontendObjC/2009-04-14-AsmSection.m +++ b/test/FrontendObjC/2009-04-14-AsmSection.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S %s -fobjc-abi-version=2 -emit-llvm -o %t +// RUN: %llvmgcc -S %s -fobjc-abi-version=2 -o %t // RUN: grep {OBJC_CLASS_\\\$_A.*section.*__DATA, __objc_data.*align} %t // XTARGET: darwin diff --git a/test/FrontendObjC/2009-08-05-utf16.m b/test/FrontendObjC/2009-08-05-utf16.m index 2964ecf..df3745c 100644 --- a/test/FrontendObjC/2009-08-05-utf16.m +++ b/test/FrontendObjC/2009-08-05-utf16.m @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc -w -x objective-c -S %s -o - | grep {__utf16_string_1} | grep {internal constant} | grep {12 x i8} +/* RUN: %llvmgcc -w -x objective-c -S %s -o - | grep {__utf16_string_1} | grep {internal unnamed_addr constant} | grep {12 x i8} rdar://7095855 rdar://7115749 */ void *P = @"iPod™"; diff --git a/test/FrontendObjC/2010-02-11-fwritable-stringsBug.m b/test/FrontendObjC/2010-02-11-fwritable-stringsBug.m index 13e1631..bb00f6a 100644 --- a/test/FrontendObjC/2010-02-11-fwritable-stringsBug.m +++ b/test/FrontendObjC/2010-02-11-fwritable-stringsBug.m @@ -1,6 +1,6 @@ // RUN: %llvmgcc -x objective-c -fwritable-strings -S %s -o - | FileCheck %s -// CHECK: @.str = private constant -// CHECK: @.str1 = internal global +// CHECK: @.str = private unnamed_addr constant +// CHECK: @.str1 = internal unnamed_addr global // rdar://7634471 diff --git a/test/FrontendObjC/2011-03-02-ConstCFStringLiteralAlign.m b/test/FrontendObjC/2011-03-02-ConstCFStringLiteralAlign.m new file mode 100644 index 0000000..a5bd2b7 --- /dev/null +++ b/test/FrontendObjC/2011-03-02-ConstCFStringLiteralAlign.m @@ -0,0 +1,11 @@ +// RUN: %llvmgcc -S -w -m64 -mmacosx-version-min=10.5 %s -o - | \ +// RUN: llc --disable-fp-elim -o - | FileCheck %s +// XFAIL: * +// XTARGET: darwin + +@interface Foo +@end +Foo *FooName = @"FooBar"; + +// CHECK: .section __TEXT,__cstring,cstring_literals +// CHECK-NEXT: L_.str: diff --git a/test/Linker/available_externally_a.ll b/test/Linker/available_externally_a.ll new file mode 100644 index 0000000..3ae4ce2 --- /dev/null +++ b/test/Linker/available_externally_a.ll @@ -0,0 +1,5 @@ +; RUN: llvm-link %s %p/available_externally_b.ll -S -o - | FileCheck %s + +@foo = available_externally unnamed_addr constant i32 0 + +; CHECK: @foo = hidden unnamed_addr constant i32 0 diff --git a/test/Linker/available_externally_b.ll b/test/Linker/available_externally_b.ll new file mode 100644 index 0000000..5269817 --- /dev/null +++ b/test/Linker/available_externally_b.ll @@ -0,0 +1,4 @@ +; This file is for use with available_externally_a.ll +; RUN: true + +@foo = hidden unnamed_addr constant i32 0 diff --git a/test/Linker/link-archive.ll b/test/Linker/link-archive.ll index 6696fcc..9251b4e 100644 --- a/test/Linker/link-archive.ll +++ b/test/Linker/link-archive.ll @@ -1,5 +1,6 @@ ; Test linking of a bc file to an archive via llvm-ld. ; PR1434 +; RUN: rm -f %t.bar.a %t.foo.a ; RUN: llvm-as %s -o %t.bar.bc ; RUN: echo {define i32* @foo(i32 %x) \{ ret i32* @baz \} \ ; RUN: @baz = external global i32 } | llvm-as -o %t.foo.bc diff --git a/test/Linker/linkmdnode.ll b/test/Linker/linkmdnode.ll index be74550..5f11580 100644 --- a/test/Linker/linkmdnode.ll +++ b/test/Linker/linkmdnode.ll @@ -10,3 +10,4 @@ define void @foo() { %x = call i8 @llvm.something(metadata !21) ret void } + diff --git a/test/Linker/linkmdnode2.ll b/test/Linker/linkmdnode2.ll index 54a5a57..a7d991a 100644 --- a/test/Linker/linkmdnode2.ll +++ b/test/Linker/linkmdnode2.ll @@ -10,3 +10,13 @@ define void @foo1() { %x = call i8 @llvm.something(metadata !22) ret void } + + + +; PR9015 +define void @test() { + ret void, !abc !0 +} + +!0 = metadata !{metadata !0, i32 42 } + diff --git a/test/Linker/unnamed-addr1-a.ll b/test/Linker/unnamed-addr1-a.ll new file mode 100644 index 0000000..1ddac9c --- /dev/null +++ b/test/Linker/unnamed-addr1-a.ll @@ -0,0 +1,27 @@ +; RUN: llvm-link %s %p/unnamed-addr1-b.ll -S -o - | sort | FileCheck %s + +; Only in this file +@a = common global i32 0 +; CHECK: @a = common global i32 0 +@b = common unnamed_addr global i32 0 +; CHECK: @b = common unnamed_addr global i32 0 + +; Other file has unnamed_addr definition +@c = common unnamed_addr global i32 0 +; CHECK: @c = common unnamed_addr global i32 0 +@d = external global i32 +; CHECK: @d = global i32 42 +@e = external unnamed_addr global i32 +; CHECK: @e = unnamed_addr global i32 42 +@f = weak global i32 42 +; CHECK: @f = global i32 42 + +; Other file has non-unnamed_addr definition +@g = common unnamed_addr global i32 0 +; CHECK: @g = common global i32 0 +@h = external global i32 +; CHECK: @h = global i32 42 +@i = external unnamed_addr global i32 +; CHECK: @i = global i32 42 +@j = weak global i32 42 +; CHECK: @j = global i32 42 diff --git a/test/Linker/unnamed-addr1-b.ll b/test/Linker/unnamed-addr1-b.ll new file mode 100644 index 0000000..7d94dc1 --- /dev/null +++ b/test/Linker/unnamed-addr1-b.ll @@ -0,0 +1,12 @@ +; This file is for use with unnamed-addr1-a.ll +; RUN: true + +@c = common unnamed_addr global i32 42 +@d = unnamed_addr global i32 42 +@e = unnamed_addr global i32 42 +@f = unnamed_addr global i32 42 + +@g = common global i32 42 +@h = global i32 42 +@i = global i32 42 +@j = global i32 42 diff --git a/test/MC/ARM/arm_fixups.s b/test/MC/ARM/arm_fixups.s new file mode 100644 index 0000000..0dceb83 --- /dev/null +++ b/test/MC/ARM/arm_fixups.s @@ -0,0 +1,7 @@ +// RUN: llvm-mc -triple arm-unknown-unknown %s --show-encoding > %t +// RUN: FileCheck < %t %s + +// CHECK: bl _printf @ encoding: [A,A,A,0xeb] +// CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbranch +bl _printf +
\ No newline at end of file diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s index 3663634..fbec789 100644 --- a/test/MC/ARM/arm_instructions.s +++ b/test/MC/ARM/arm_instructions.s @@ -8,6 +8,10 @@ @ CHECK: encoding: [0x00,0xf0,0x20,0x03] nopeq +@ CHECK: trap +@ CHECK: encoding: [0xfe,0xde,0xff,0xe7] + trap + @ CHECK: bx lr @ CHECK: encoding: [0x1e,0xff,0x2f,0xe1] bx lr @@ -15,3 +19,266 @@ @ CHECK: vqdmull.s32 q8, d17, d16 @ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2] vqdmull.s32 q8, d17, d16 + +@ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] +@ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9] +@ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] +@ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9] + ldmia r2, {r1,r3-r6,sp} + ldmib r2, {r1,r3-r6,sp} + ldmda r2, {r1,r3-r6,sp} + ldmdb r2, {r1,r3-r6,sp} + +@ CHECK: stmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8] +@ CHECK: stmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe9] +@ CHECK: stmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe8] +@ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9] + stmia r2, {r1,r3-r6,sp} + stmib r2, {r1,r3-r6,sp} + stmda r2, {r1,r3-r6,sp} + stmdb r2, {r1,r3-r6,sp} + +@ CHECK: ldmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe8] +@ CHECK: ldmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe9] +@ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8] +@ CHECK: ldmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe9] + ldmia r2!, {r1,r3-r6,sp} + ldmib r2!, {r1,r3-r6,sp} + ldmda r2!, {r1,r3-r6,sp} + ldmdb r2!, {r1,r3-r6,sp} + +@ CHECK: stmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe8] +@ CHECK: stmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe9] +@ CHECK: stmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe8] +@ CHECK: stmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe9] + stmia r2!, {r1,r3-r6,sp} + stmib r2!, {r1,r3-r6,sp} + stmda r2!, {r1,r3-r6,sp} + stmdb r2!, {r1,r3-r6,sp} + +@ CHECK: and r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0] + and r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0] + ands r1,r2,r3 + +@ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0] + eor r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: eors r1, r2, r3 @ encoding: [0x03,0x10,0x32,0xe0] + eors r1,r2,r3 + +@ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0] + sub r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: subs r1, r2, r3 @ encoding: [0x03,0x10,0x52,0xe0] + subs r1,r2,r3 + +@ CHECK: add r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe0] + add r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: adds r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe0] + adds r1,r2,r3 + +@ CHECK: adc r1, r2, r3 @ encoding: [0x03,0x10,0xa2,0xe0] + adc r1,r2,r3 + +@ CHECK: sbc r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe0] + sbc r1,r2,r3 + +@ CHECK: orr r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe1] + orr r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: orrs r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe1] + orrs r1,r2,r3 + +@ CHECK: bic r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe1] + bic r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: bics r1, r2, r3 @ encoding: [0x03,0x10,0xd2,0xe1] + bics r1,r2,r3 + +@ CHECK: mov r1, r2 @ encoding: [0x02,0x10,0xa0,0xe1] + mov r1,r2 + +@ CHECK: mvn r1, r2 @ encoding: [0x02,0x10,0xe0,0xe1] + mvn r1,r2 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: mvns r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1] + mvns r1,r2 + +@ CHECK: rsb r1, r2, r3 @ encoding: [0x03,0x10,0x62,0xe0] + rsb r1,r2,r3 + +@ CHECK: rsc r1, r2, r3 @ encoding: [0x03,0x10,0xe2,0xe0] + rsc r1,r2,r3 + +@ FIXME: This is broken, CCOut operands don't work correctly when their presence +@ may depend on flags. +@ CHECK-FIXME:: mlas r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0xe0] +@ mlas r1,r2,r3,r4 + +@ CHECK: bfi r0, r0, #5, #7 @ encoding: [0x90,0x02,0xcb,0xe7] + bfi r0, r0, #5, #7 + +@ CHECK: bkpt #10 @ encoding: [0x7a,0x00,0x20,0xe1] + bkpt #10 + +@ CHECK: isb @ encoding: [0x6f,0xf0,0x7f,0xf5] + isb +@ CHECK: mrs r8, cpsr @ encoding: [0x00,0x80,0x0f,0xe1] + mrs r8, cpsr + +@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xee] + mcr p7, #1, r5, c1, c1, #4 +@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xee] + mrc p14, #0, r1, c1, c2, #4 +@ CHECK: mcrr p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x44,0xec] + mcrr p7, #1, r5, r4, c1 +@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec] + mrrc p7, #1, r5, r4, c1 + +@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe] + mcr2 p7, #1, r5, c1, c1, #4 +@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe] + mrc2 p14, #0, r1, c1, c2, #4 +@ CHECK: mcrr2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x44,0xfc] + mcrr2 p7, #1, r5, r4, c1 +@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc] + mrrc2 p7, #1, r5, r4, c1 + +@ CHECK: cdp p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xee] + cdp p7, #1, c1, c1, c1, #4 +@ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe] + cdp2 p7, #1, c1, c1, c1, #4 + +@ CHECK: clrex @ encoding: [0x1f,0xf0,0x7f,0xf5] + clrex + +@ CHECK: clz r9, r0 @ encoding: [0x10,0x9f,0x6f,0xe1] + clz r9, r0 + +@ CHECK: qadd r1, r2, r3 @ encoding: [0x52,0x10,0x03,0xe1] + qadd r1, r2, r3 + +@ CHECK: qsub r1, r2, r3 @ encoding: [0x52,0x10,0x23,0xe1] + qsub r1, r2, r3 + +@ CHECK: qdadd r1, r2, r3 @ encoding: [0x52,0x10,0x43,0xe1] + qdadd r1, r2, r3 + +@ CHECK: qdsub r1, r2, r3 @ encoding: [0x52,0x10,0x63,0xe1] + qdsub r1, r2, r3 + +@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3] + wfe + +@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3] + wfi + +@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3] + yield + +@ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3] + nop + +@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] + dmb sy + +@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5] + dmb st + +@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] + dmb ish + +@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5] + dmb ishst + +@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5] + dmb nsh + +@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5] + dmb nshst + +@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5] + dmb osh + +@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5] + dmb oshst + +@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] + dsb sy + +@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5] + dsb st + +@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] + dsb ish + +@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5] + dsb ishst + +@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] + dsb nsh + +@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5] + dsb nshst + +@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5] + dsb osh + +@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5] + dsb oshst + +@ CHECK: cpsie aif @ encoding: [0xc0,0x01,0x08,0xf1] + cpsie aif + +@ CHECK: cps #15 @ encoding: [0x0f,0x00,0x02,0xf1] + cps #15 + +@ CHECK: cpsie if, #10 @ encoding: [0xca,0x00,0x0a,0xf1] + cpsie if, #10 + +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] + msr apsr, r0 + +@ CHECK: msr cpsr_s, r0 @ encoding: [0x00,0xf0,0x24,0xe1] + msr apsr_g, r0 + +@ CHECK: msr cpsr_f, r0 @ encoding: [0x00,0xf0,0x28,0xe1] + msr apsr_nzcvq, r0 + +@ CHECK: msr cpsr_fs, r0 @ encoding: [0x00,0xf0,0x2c,0xe1] + msr apsr_nzcvqg, r0 + +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] + msr cpsr_fc, r0 + +@ CHECK: msr cpsr_c, r0 @ encoding: [0x00,0xf0,0x21,0xe1] + msr cpsr_c, r0 + +@ CHECK: msr cpsr_x, r0 @ encoding: [0x00,0xf0,0x22,0xe1] + msr cpsr_x, r0 + +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] + msr cpsr_fc, r0 + +@ CHECK: msr cpsr_fsx, r0 @ encoding: [0x00,0xf0,0x2e,0xe1] + msr cpsr_fsx, r0 + +@ CHECK: msr spsr_fc, r0 @ encoding: [0x00,0xf0,0x69,0xe1] + msr spsr_fc, r0 + +@ CHECK: msr spsr_fsxc, r0 @ encoding: [0x00,0xf0,0x6f,0xe1] + msr spsr_fsxc, r0 + +@ CHECK: msr cpsr_fsxc, r0 @ encoding: [0x00,0xf0,0x2f,0xe1] + msr cpsr_fsxc, r0 + diff --git a/test/MC/ARM/bracket-darwin.s b/test/MC/ARM/bracket-darwin.s new file mode 100644 index 0000000..dc8b348 --- /dev/null +++ b/test/MC/ARM/bracket-darwin.s @@ -0,0 +1,5 @@ +// RUN: not llvm-mc -triple arm-apple-darwin %s 2> %t +// RUN: FileCheck -input-file %t %s + +// CHECK: error: brackets expression not supported on this target +.byte [4-3] diff --git a/test/MC/ARM/bracket-exprs.s b/test/MC/ARM/bracket-exprs.s new file mode 100644 index 0000000..922bf70 --- /dev/null +++ b/test/MC/ARM/bracket-exprs.s @@ -0,0 +1,15 @@ +// RUN: llvm-mc -triple arm-unknown-linux %s | FileCheck %s + +// CHECK: .byte 1 +.if [~0 >> 1] == -1 +.byte 1 +.else +.byte 2 +.endif + +// CHECK: .byte 3 +.if 4 * [4 + (3 + [2 * 2] + 1)] == 48 +.byte 3 +.else +.byte 4 +.endif diff --git a/test/MC/ARM/darwin-ARM-reloc.s b/test/MC/ARM/darwin-ARM-reloc.s new file mode 100644 index 0000000..86b45e0 --- /dev/null +++ b/test/MC/ARM/darwin-ARM-reloc.s @@ -0,0 +1,171 @@ +@ RUN: llvm-mc -n -triple armv7-apple-darwin10 %s -filetype=obj -o %t.obj +@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump +@ RUN: FileCheck < %t.dump %s + + .syntax unified + .text +_f0: + bl _printf + +_f1: + bl _f0 + + .data +_d0: +Ld0_0: + .long Lsc0_0 - Ld0_0 + + .section __TEXT,__cstring,cstring_literals +Lsc0_0: + .long 0 + +@ CHECK: ('cputype', 12) +@ CHECK: ('cpusubtype', 9) +@ CHECK: ('filetype', 1) +@ CHECK: ('num_load_commands', 3) +@ CHECK: ('load_commands_size', 364) +@ CHECK: ('flag', 0) +@ CHECK: ('load_commands', [ +@ CHECK: # Load Command 0 +@ CHECK: (('command', 1) +@ CHECK: ('size', 260) +@ CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('vm_addr', 0) +@ CHECK: ('vm_size', 16) +@ CHECK: ('file_offset', 392) +@ CHECK: ('file_size', 16) +@ CHECK: ('maxprot', 7) +@ CHECK: ('initprot', 7) +@ CHECK: ('num_sections', 3) +@ CHECK: ('flags', 0) +@ CHECK: ('sections', [ +@ CHECK: # Section 0 +@ CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 0) +@ CHECK: ('size', 8) +@ CHECK: ('offset', 392) +@ CHECK: ('alignment', 0) +@ CHECK: ('reloc_offset', 408) +@ CHECK: ('num_reloc', 2) +@ CHECK: ('flags', 0x80000400) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0x4), +@ CHECK: ('word-1', 0x55000001)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0x0), +@ CHECK: ('word-1', 0x5d000003)), +@ CHECK: ]) +@ CHECK: ('_section_data', 'feffffeb fdffffeb') +@ CHECK: # Section 1 +@ CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 8) +@ CHECK: ('size', 4) +@ CHECK: ('offset', 400) +@ CHECK: ('alignment', 0) +@ CHECK: ('reloc_offset', 424) +@ CHECK: ('num_reloc', 2) +@ CHECK: ('flags', 0x0) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0xa2000000), +@ CHECK: ('word-1', 0xc)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0xa1000000), +@ CHECK: ('word-1', 0x8)), +@ CHECK: ]) +@ CHECK: ('_section_data', '04000000') +@ CHECK: # Section 2 +@ CHECK: (('section_name', '__cstring\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 12) +@ CHECK: ('size', 4) +@ CHECK: ('offset', 404) +@ CHECK: ('alignment', 0) +@ CHECK: ('reloc_offset', 0) +@ CHECK: ('num_reloc', 0) +@ CHECK: ('flags', 0x2) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: ]) +@ CHECK: ('_section_data', '00000000') +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 1 +@ CHECK: (('command', 2) +@ CHECK: ('size', 24) +@ CHECK: ('symoff', 440) +@ CHECK: ('nsyms', 4) +@ CHECK: ('stroff', 488) +@ CHECK: ('strsize', 24) +@ CHECK: ('_string_data', '\x00_printf\x00_f0\x00_f1\x00_d0\x00\x00\x00\x00') +@ CHECK: ('_symbols', [ +@ CHECK: # Symbol 0 +@ CHECK: (('n_strx', 9) +@ CHECK: ('n_type', 0xe) +@ CHECK: ('n_sect', 1) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_f0') +@ CHECK: ), +@ CHECK: # Symbol 1 +@ CHECK: (('n_strx', 13) +@ CHECK: ('n_type', 0xe) +@ CHECK: ('n_sect', 1) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 4) +@ CHECK: ('_string', '_f1') +@ CHECK: ), +@ CHECK: # Symbol 2 +@ CHECK: (('n_strx', 17) +@ CHECK: ('n_type', 0xe) +@ CHECK: ('n_sect', 2) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 8) +@ CHECK: ('_string', '_d0') +@ CHECK: ), +@ CHECK: # Symbol 3 +@ CHECK: (('n_strx', 1) +@ CHECK: ('n_type', 0x1) +@ CHECK: ('n_sect', 0) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_printf') +@ CHECK: ), +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 2 +@ CHECK: (('command', 11) +@ CHECK: ('size', 80) +@ CHECK: ('ilocalsym', 0) +@ CHECK: ('nlocalsym', 3) +@ CHECK: ('iextdefsym', 3) +@ CHECK: ('nextdefsym', 0) +@ CHECK: ('iundefsym', 3) +@ CHECK: ('nundefsym', 1) +@ CHECK: ('tocoff', 0) +@ CHECK: ('ntoc', 0) +@ CHECK: ('modtaboff', 0) +@ CHECK: ('nmodtab', 0) +@ CHECK: ('extrefsymoff', 0) +@ CHECK: ('nextrefsyms', 0) +@ CHECK: ('indirectsymoff', 0) +@ CHECK: ('nindirectsyms', 0) +@ CHECK: ('extreloff', 0) +@ CHECK: ('nextrel', 0) +@ CHECK: ('locreloff', 0) +@ CHECK: ('nlocrel', 0) +@ CHECK: ('_indirect_symbols', [ +@ CHECK: ]) +@ CHECK: ), +@ CHECK: ]) diff --git a/test/MC/ARM/darwin-Thumb-reloc.s b/test/MC/ARM/darwin-Thumb-reloc.s new file mode 100644 index 0000000..567573d --- /dev/null +++ b/test/MC/ARM/darwin-Thumb-reloc.s @@ -0,0 +1,139 @@ +@ RUN: llvm-mc -n -triple thumbv7-apple-darwin10 %s -filetype=obj -o %t.obj +@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump +@ RUN: FileCheck < %t.dump %s + + .syntax unified + .section __TEXT,__text,regular,pure_instructions + .globl _main + .align 2 + .code 16 + .thumb_func _main +_main: +LPC0_0: + blx _printf + .align 2 +LCPI0_0: + .long L_.str-(LPC0_0+4) + + .section __TEXT,__cstring,cstring_literals + .align 2 +L_.str: + .asciz "s0" + +.subsections_via_symbols + +@ CHECK: ('cputype', 12) +@ CHECK: ('cpusubtype', 9) +@ CHECK: ('filetype', 1) +@ CHECK: ('num_load_commands', 3) +@ CHECK: ('load_commands_size', 296) +@ CHECK: ('flag', 8192) +@ CHECK: ('load_commands', [ +@ CHECK: # Load Command 0 +@ CHECK: (('command', 1) +@ CHECK: ('size', 192) +@ CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('vm_addr', 0) +@ CHECK: ('vm_size', 11) +@ CHECK: ('file_offset', 324) +@ CHECK: ('file_size', 11) +@ CHECK: ('maxprot', 7) +@ CHECK: ('initprot', 7) +@ CHECK: ('num_sections', 2) +@ CHECK: ('flags', 0) +@ CHECK: ('sections', [ +@ CHECK: # Section 0 +@ CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 0) +@ CHECK: ('size', 8) +@ CHECK: ('offset', 324) +@ CHECK: ('alignment', 2) +@ CHECK: ('reloc_offset', 336) +@ CHECK: ('num_reloc', 3) +@ CHECK: ('flags', 0x80000400) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0xa2000004), +@ CHECK: ('word-1', 0x8)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0xa1000000), +@ CHECK: ('word-1', 0x0)), +@ CHECK: # Relocation 2 +@ CHECK: (('word-0', 0x0), +@ CHECK: ('word-1', 0x6d000001)), +@ CHECK: ]) +@ CHECK-FIXME: ('_section_data', 'fff7feef 04000000') +@ CHECK: # Section 1 +@ CHECK: (('section_name', '__cstring\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 8) +@ CHECK: ('size', 3) +@ CHECK: ('offset', 332) +@ CHECK: ('alignment', 2) +@ CHECK: ('reloc_offset', 0) +@ CHECK: ('num_reloc', 0) +@ CHECK: ('flags', 0x2) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: ]) +@ CHECK: ('_section_data', '733000') +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 1 +@ CHECK: (('command', 2) +@ CHECK: ('size', 24) +@ CHECK: ('symoff', 360) +@ CHECK: ('nsyms', 2) +@ CHECK: ('stroff', 384) +@ CHECK: ('strsize', 16) +@ CHECK: ('_string_data', '\x00_main\x00_printf\x00\x00') +@ CHECK: ('_symbols', [ +@ CHECK: # Symbol 0 +@ CHECK: (('n_strx', 1) +@ CHECK: ('n_type', 0xf) +@ CHECK: ('n_sect', 1) +@ CHECK: ('n_desc', 8) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_main') +@ CHECK: ), +@ CHECK: # Symbol 1 +@ CHECK: (('n_strx', 7) +@ CHECK: ('n_type', 0x1) +@ CHECK: ('n_sect', 0) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_printf') +@ CHECK: ), +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 2 +@ CHECK: (('command', 11) +@ CHECK: ('size', 80) +@ CHECK: ('ilocalsym', 0) +@ CHECK: ('nlocalsym', 0) +@ CHECK: ('iextdefsym', 0) +@ CHECK: ('nextdefsym', 1) +@ CHECK: ('iundefsym', 1) +@ CHECK: ('nundefsym', 1) +@ CHECK: ('tocoff', 0) +@ CHECK: ('ntoc', 0) +@ CHECK: ('modtaboff', 0) +@ CHECK: ('nmodtab', 0) +@ CHECK: ('extrefsymoff', 0) +@ CHECK: ('nextrefsyms', 0) +@ CHECK: ('indirectsymoff', 0) +@ CHECK: ('nindirectsyms', 0) +@ CHECK: ('extreloff', 0) +@ CHECK: ('nextrel', 0) +@ CHECK: ('locreloff', 0) +@ CHECK: ('nlocrel', 0) +@ CHECK: ('_indirect_symbols', [ +@ CHECK: ]) +@ CHECK: ), +@ CHECK: ]) diff --git a/test/MC/ARM/elf-eflags-eabi.s b/test/MC/ARM/elf-eflags-eabi.s new file mode 100644 index 0000000..ea89eac --- /dev/null +++ b/test/MC/ARM/elf-eflags-eabi.s @@ -0,0 +1,13 @@ +@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi -filetype=obj -o - | \ +@ RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + .syntax unified + .text + .globl barf + .align 2 + .type barf,%function +barf: @ @barf +@ BB#0: @ %entry + b foo + +@@@ make sure the EF_ARM_EABIMASK comes out OK +@OBJ: 'e_flags', 0x05000000 diff --git a/test/MC/ARM/elf-movt.s b/test/MC/ARM/elf-movt.s new file mode 100644 index 0000000..0fe7c50 --- /dev/null +++ b/test/MC/ARM/elf-movt.s @@ -0,0 +1,39 @@ +@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi | FileCheck -check-prefix=ASM %s +@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi -filetype=obj -o - | \ +@ RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + .syntax unified + .text + .globl barf + .align 2 + .type barf,%function +barf: @ @barf +@ BB#0: @ %entry + movw r0, :lower16:GOT-(.LPC0_2+8) + movt r0, :upper16:GOT-(.LPC0_2+16) +.LPC0_2: +@ ASM: movw r0, :lower16:(GOT-(.LPC0_2+8)) +@ ASM-NEXT: movt r0, :upper16:(GOT-(.LPC0_2+16)) + +@@ make sure that the text section fixups are sane too +@ OBJ: '.text' +@ OBJ-NEXT: 'sh_type', 0x00000001 +@ OBJ-NEXT: 'sh_flags', 0x00000006 +@ OBJ-NEXT: 'sh_addr', 0x00000000 +@ OBJ-NEXT: 'sh_offset', 0x00000034 +@ OBJ-NEXT: 'sh_size', 0x00000008 +@ OBJ-NEXT: 'sh_link', 0x00000000 +@ OBJ-NEXT: 'sh_info', 0x00000000 +@ OBJ-NEXT: 'sh_addralign', 0x00000004 +@ OBJ-NEXT: 'sh_entsize', 0x00000000 +@ OBJ-NEXT: '_section_data', 'f00f0fe3 ff0f4fe3' + +@ OBJ: Relocation 0x00000000 +@ OBJ-NEXT: 'r_offset', 0x00000000 +@ OBJ-NEXT: 'r_sym' +@ OBJ-NEXT: 'r_type', 0x0000002d + +@ OBJ: Relocation 0x00000001 +@ OBJ-NEXT: 'r_offset', 0x00000004 +@ OBJ-NEXT: 'r_sym' +@ OBJ-NEXT: 'r_type', 0x0000002e + diff --git a/test/MC/ARM/elf-reloc-01.ll b/test/MC/ARM/elf-reloc-01.ll new file mode 100644 index 0000000..6b83c95 --- /dev/null +++ b/test/MC/ARM/elf-reloc-01.ll @@ -0,0 +1,71 @@ +;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ +;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ +;; RUN: -filetype=obj %s -o - | \ +;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + +;; FIXME: This file needs to be in .s form! +;; The args to llc are there to constrain the codegen only. +;; +;; Ensure no regression on ARM/gcc compatibility for +;; emitting explicit symbol relocs for nonexternal symbols +;; versus section symbol relocs (with offset) - +;; +;; Default llvm behavior is to emit as section symbol relocs nearly +;; everything that is not an undefined external. Unfortunately, this +;; diverges from what codesourcery ARM/gcc does! +;; +;; Tests that reloc to _MergedGlobals show up as explicit symbol reloc + + +target triple = "armv7-none-linux-gnueabi" + +@var_tls = thread_local global i32 1 +@var_tls_double = thread_local global double 1.000000e+00 +@var_static = internal global i32 1 +@var_static_double = internal global double 1.000000e+00 +@var_global = global i32 1 +@var_global_double = global double 1.000000e+00 + +declare i32 @mystrlen(i8* nocapture %s) nounwind + +declare void @myhextochar(i32 %n, i8* nocapture %buffer) + +declare void @__aeabi_read_tp() nounwind + +declare void @__nacl_read_tp() nounwind + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { +entry: + switch i32 %argc, label %bb3 [ + i32 555, label %bb + i32 6666, label %bb2 + ] + +bb: ; preds = %entry + volatile store i32 11, i32* @var_tls, align 4 + volatile store double 2.200000e+01, double* @var_tls_double, align 8 + volatile store i32 33, i32* @var_static, align 4 + volatile store double 4.400000e+01, double* @var_static_double, align 8 + volatile store i32 55, i32* @var_global, align 4 + volatile store double 6.600000e+01, double* @var_global_double, align 8 + br label %bb3 + +bb2: ; preds = %entry + ret i32 add (i32 add (i32 add (i32 ptrtoint (i32* @var_tls to i32), i32 add (i32 ptrtoint (i32* @var_static to i32), i32 ptrtoint (i32* @var_global to i32))), i32 ptrtoint (double* @var_tls_double to i32)), i32 add (i32 ptrtoint (double* @var_static_double to i32), i32 ptrtoint (double* @var_global_double to i32))) + +bb3: ; preds = %bb, %entry + tail call void @exit(i32 55) noreturn nounwind + unreachable +} + +declare void @exit(i32) noreturn nounwind + + +;; OBJ: Symbol 0x00000002 +;; OBJ-NEXT: '_MergedGlobals' +;; OBJ-NEXT: 'st_value', 0x00000010 + +;; OBJ: Relocation 0x00000001 +;; OBJ-NEXT: 'r_offset', +;; OBJ-NEXT: 'r_sym', 0x00000002 +;; OBJ-NEXT: 'r_type', 0x0000002b diff --git a/test/MC/ARM/elf-reloc-02.ll b/test/MC/ARM/elf-reloc-02.ll new file mode 100644 index 0000000..132a477 --- /dev/null +++ b/test/MC/ARM/elf-reloc-02.ll @@ -0,0 +1,51 @@ +;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ +;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ +;; RUN: -filetype=obj %s -o - | \ +;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + +;; FIXME: This file needs to be in .s form! +;; The args to llc are there to constrain the codegen only. +;; +;; Ensure no regression on ARM/gcc compatibility for +;; emitting explicit symbol relocs for nonexternal symbols +;; versus section symbol relocs (with offset) - +;; +;; Default llvm behavior is to emit as section symbol relocs nearly +;; everything that is not an undefined external. Unfortunately, this +;; diverges from what codesourcery ARM/gcc does! +;; +;; Tests that reloc to .L.str* show up as explicit symbols + +target triple = "armv7-none-linux-gnueabi" + +@.str = private constant [7 x i8] c"@null\0A\00", align 4 +@.str1 = private constant [8 x i8] c"@write\0A\00", align 4 +@.str2 = private constant [13 x i8] c"hello worldn\00", align 4 +@.str3 = private constant [7 x i8] c"@exit\0A\00", align 4 + +declare i32 @mystrlen(i8* nocapture %s) nounwind readonly + +declare void @myhextochar(i32 %n, i8* nocapture %buffer) nounwind + +define i32 @main() nounwind { +entry: + %0 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 6) nounwind + %1 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([8 x i8]* @.str1, i32 0, i32 0), i32 7) nounwind + %2 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([13 x i8]* @.str2, i32 0, i32 0), i32 12) nounwind + %3 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([7 x i8]* @.str3, i32 0, i32 0), i32 6) nounwind + tail call void @exit(i32 55) noreturn nounwind + unreachable +} + +declare i32 @write(...) + +declare void @exit(i32) noreturn nounwind + + +;; OBJ: Symbol 0x00000002 +;; OBJ-NEXT: '.L.str' + +;; OBJ: Relocation 0x00000000 +;; OBJ-NEXT: 'r_offset', +;; OBJ-NEXT: 'r_sym', 0x00000002 +;; OBJ-NEXT: 'r_type', 0x0000002b diff --git a/test/MC/ARM/elf-reloc-03.ll b/test/MC/ARM/elf-reloc-03.ll new file mode 100644 index 0000000..e052f39 --- /dev/null +++ b/test/MC/ARM/elf-reloc-03.ll @@ -0,0 +1,98 @@ +;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ +;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ +;; RUN: -filetype=obj %s -o - | \ +;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + +;; FIXME: This file needs to be in .s form! +;; The args to llc are there to constrain the codegen only. +;; +;; Ensure no regression on ARM/gcc compatibility for +;; emitting explicit symbol relocs for nonexternal symbols +;; versus section symbol relocs (with offset) - +;; +;; Default llvm behavior is to emit as section symbol relocs nearly +;; everything that is not an undefined external. Unfortunately, this +;; diverges from what codesourcery ARM/gcc does! +;; +;; Verifies that internal constants appear as explict symbol relocs + + +target triple = "armv7-none-linux-gnueabi" + +@startval = global i32 5 +@vtable = internal constant [10 x i32 (...)*] [i32 (...)* bitcast (i32 ()* @foo0 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo1 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo2 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo3 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo4 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo5 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo6 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo7 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo8 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo9 to i32 (...)*)] + +declare i32 @mystrlen(i8* nocapture %s) nounwind readonly + +declare void @myhextochar(i32 %n, i8* nocapture %buffer) nounwind + +define internal i32 @foo0() nounwind readnone { +entry: + ret i32 0 +} + +define internal i32 @foo1() nounwind readnone { +entry: + ret i32 1 +} + +define internal i32 @foo2() nounwind readnone { +entry: + ret i32 2 +} + +define internal i32 @foo3() nounwind readnone { +entry: + ret i32 3 +} + +define internal i32 @foo4() nounwind readnone { +entry: + ret i32 4 +} + +define internal i32 @foo5() nounwind readnone { +entry: + ret i32 55 +} + +define internal i32 @foo6() nounwind readnone { +entry: + ret i32 6 +} + +define internal i32 @foo7() nounwind readnone { +entry: + ret i32 7 +} + +define internal i32 @foo8() nounwind readnone { +entry: + ret i32 8 +} + +define internal i32 @foo9() nounwind readnone { +entry: + ret i32 9 +} + +define i32 @main() nounwind { +entry: + %0 = load i32* @startval, align 4 + %1 = getelementptr inbounds [10 x i32 (...)*]* @vtable, i32 0, i32 %0 + %2 = load i32 (...)** %1, align 4 + %3 = tail call i32 (...)* %2() nounwind + tail call void @exit(i32 %3) noreturn nounwind + unreachable +} + +declare void @exit(i32) noreturn nounwind + + +;; OBJ: Symbol 0x0000000c +;; OBJ-NEXT: 'vtable' + +;; OBJ: Relocation 0x00000001 +;; OBJ-NEXT: 'r_offset', +;; OBJ-NEXT: 'r_sym', 0x0000000c +;; OBJ-NEXT: 'r_type', 0x0000002b diff --git a/test/MC/ARM/full_line_comment.s b/test/MC/ARM/full_line_comment.s new file mode 100644 index 0000000..4c91986 --- /dev/null +++ b/test/MC/ARM/full_line_comment.s @@ -0,0 +1,8 @@ +// RUN: llvm-mc -triple arm-apple-darwin10 %s | FileCheck %s +# this is a full line comment starting at column 1 + # this starting at column 2 + + .data +// CHECK: .long 0 +.long 0 +# .long 1 this line is commented out diff --git a/test/MC/ARM/hilo-16bit-relocations.s b/test/MC/ARM/hilo-16bit-relocations.s new file mode 100644 index 0000000..7d6b498 --- /dev/null +++ b/test/MC/ARM/hilo-16bit-relocations.s @@ -0,0 +1,20 @@ +@ RUN: llvm-mc %s -triple armv7-apple-darwin | FileCheck %s +@ RUN: llvm-mc %s -triple armv7-apple-darwin | FileCheck %s + +_t: + movw r0, :lower16:(L_foo$non_lazy_ptr - (L1 + 8)) + movt r0, :upper16:(L_foo$non_lazy_ptr - (L1 + 8)) +L1: + +@ CHECK: movw r0, :lower16:(L_foo$non_lazy_ptr-(L1+8)) +@ CHECK: movt r0, :upper16:(L_foo$non_lazy_ptr-(L1+8)) + + .comm _foo,4,2 + + .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers + .align 2 +L_foo$non_lazy_ptr: + .indirect_symbol _foo + .long 0 + +.subsections_via_symbols diff --git a/test/MC/ARM/neon-abs-encoding.s b/test/MC/ARM/neon-abs-encoding.s index a914979..398f2db 100644 --- a/test/MC/ARM/neon-abs-encoding.s +++ b/test/MC/ARM/neon-abs-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vabs.s8 d16, d16 @ encoding: [0x20,0x03,0xf1,0xf3] vabs.s8 d16, d16 diff --git a/test/MC/ARM/neon-absdiff-encoding.s b/test/MC/ARM/neon-absdiff-encoding.s index f5baff6..f43ea65 100644 --- a/test/MC/ARM/neon-absdiff-encoding.s +++ b/test/MC/ARM/neon-absdiff-encoding.s @@ -1,6 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s -@ XFAIL: * -@ NOTE: This currently fails because the ASM parser doesn't parse vabal. +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xf2] vabd.s8 d16, d16, d17 diff --git a/test/MC/ARM/neon-bitcount-encoding.s b/test/MC/ARM/neon-bitcount-encoding.s index 218e91b..2c9518b 100644 --- a/test/MC/ARM/neon-bitcount-encoding.s +++ b/test/MC/ARM/neon-bitcount-encoding.s @@ -1,5 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s -@ XFAIL: * +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xf3] vcnt.8 d16, d16 diff --git a/test/MC/ARM/neon-bitwise-encoding.s b/test/MC/ARM/neon-bitwise-encoding.s index 7a4c8fd..8710923 100644 --- a/test/MC/ARM/neon-bitwise-encoding.s +++ b/test/MC/ARM/neon-bitwise-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * @ CHECK: vand d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xf2] diff --git a/test/MC/ARM/neon-cmp-encoding.s b/test/MC/ARM/neon-cmp-encoding.s index da59ee7..6bfc549 100644 --- a/test/MC/ARM/neon-cmp-encoding.s +++ b/test/MC/ARM/neon-cmp-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * @ FIXME: We cannot currently test the following instructions, which are diff --git a/test/MC/ARM/neon-convert-encoding.s b/test/MC/ARM/neon-convert-encoding.s index e5c8a38..1733c52 100644 --- a/test/MC/ARM/neon-convert-encoding.s +++ b/test/MC/ARM/neon-convert-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a9 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3] vcvt.s32.f32 d16, d16 @@ -32,3 +32,7 @@ vcvt.f32.s32 q8, q8, #1 @ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xf3] vcvt.f32.u32 q8, q8, #1 +@ CHECK: vcvt.f32.f16 q8, d16 @ encoding: [0x20,0x07,0xf6,0xf3] + vcvt.f32.f16 q8, d16 +@ CHECK: vcvt.f16.f32 d16, q8 @ encoding: [0x20,0x06,0xf6,0xf3] + vcvt.f16.f32 d16, q8 diff --git a/test/MC/ARM/neon-dup-encoding.s b/test/MC/ARM/neon-dup-encoding.s index 3af7fac..0aebdce 100644 --- a/test/MC/ARM/neon-dup-encoding.s +++ b/test/MC/ARM/neon-dup-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * @ CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee] diff --git a/test/MC/ARM/neon-minmax-encoding.s b/test/MC/ARM/neon-minmax-encoding.s index 2f3d257..2d0d8c9 100644 --- a/test/MC/ARM/neon-minmax-encoding.s +++ b/test/MC/ARM/neon-minmax-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xf2] vmin.s8 d16, d16, d17 diff --git a/test/MC/ARM/neon-mov-encoding.s b/test/MC/ARM/neon-mov-encoding.s index 71e568e..ca678d0 100644 --- a/test/MC/ARM/neon-mov-encoding.s +++ b/test/MC/ARM/neon-mov-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * @ CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xf2] diff --git a/test/MC/ARM/neon-mul-accum-encoding.s b/test/MC/ARM/neon-mul-accum-encoding.s index 0263d9e..e269dea 100644 --- a/test/MC/ARM/neon-mul-accum-encoding.s +++ b/test/MC/ARM/neon-mul-accum-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * @ CHECK: vmla.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xf2] diff --git a/test/MC/ARM/neon-mul-encoding.s b/test/MC/ARM/neon-mul-encoding.s index 350fa6e..4ff192f 100644 --- a/test/MC/ARM/neon-mul-encoding.s +++ b/test/MC/ARM/neon-mul-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf2] vmul.i8 d16, d16, d17 diff --git a/test/MC/ARM/neon-neg-encoding.s b/test/MC/ARM/neon-neg-encoding.s index 7994ac8..014bdb0 100644 --- a/test/MC/ARM/neon-neg-encoding.s +++ b/test/MC/ARM/neon-neg-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vneg.s8 d16, d16 @ encoding: [0xa0,0x03,0xf1,0xf3] vneg.s8 d16, d16 diff --git a/test/MC/ARM/neon-pairwise-encoding.s b/test/MC/ARM/neon-pairwise-encoding.s index 1fccc11..65c47bd 100644 --- a/test/MC/ARM/neon-pairwise-encoding.s +++ b/test/MC/ARM/neon-pairwise-encoding.s @@ -1,5 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s -@ XFAIL: * +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xf2] vpadd.i8 d16, d17, d16 diff --git a/test/MC/ARM/neon-reciprocal-encoding.s b/test/MC/ARM/neon-reciprocal-encoding.s index dee1296..e12a473 100644 --- a/test/MC/ARM/neon-reciprocal-encoding.s +++ b/test/MC/ARM/neon-reciprocal-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xf3] vrecpe.u32 d16, d16 diff --git a/test/MC/ARM/neon-reverse-encoding.s b/test/MC/ARM/neon-reverse-encoding.s index 54e750b..e33b9f3 100644 --- a/test/MC/ARM/neon-reverse-encoding.s +++ b/test/MC/ARM/neon-reverse-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vrev64.8 d16, d16 @ encoding: [0x20,0x00,0xf0,0xf3] vrev64.8 d16, d16 diff --git a/test/MC/ARM/neon-satshift-encoding.s b/test/MC/ARM/neon-satshift-encoding.s index 4bb64b1..506f48a 100644 --- a/test/MC/ARM/neon-satshift-encoding.s +++ b/test/MC/ARM/neon-satshift-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xf2] vqshl.s8 d16, d16, d17 diff --git a/test/MC/ARM/neon-shift-encoding.s b/test/MC/ARM/neon-shift-encoding.s index 015214a..1985a6a 100644 --- a/test/MC/ARM/neon-shift-encoding.s +++ b/test/MC/ARM/neon-shift-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0xa1,0x04,0x40,0xf3] vshl.u8 d16, d17, d16 @@ -158,3 +158,5 @@ vrshrn.i32 d16, q8, #16 @ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf2] vrshrn.i64 d16, q8, #32 +@ CHECK: vqrshrn.s32 d16, q8, #13 @ encoding: [0x70,0x09,0xd3,0xf2] + vqrshrn.s32 d16, q8, #13 diff --git a/test/MC/ARM/neon-shiftaccum-encoding.s b/test/MC/ARM/neon-shiftaccum-encoding.s index 25f151b..0dc630d 100644 --- a/test/MC/ARM/neon-shiftaccum-encoding.s +++ b/test/MC/ARM/neon-shiftaccum-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xf2] vsra.s8 d17, d16, #8 diff --git a/test/MC/ARM/neon-shuffle-encoding.s b/test/MC/ARM/neon-shuffle-encoding.s index c8844d3..ce7eb66 100644 --- a/test/MC/ARM/neon-shuffle-encoding.s +++ b/test/MC/ARM/neon-shuffle-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xa0,0x03,0xf1,0xf2] vext.8 d16, d17, d16, #3 diff --git a/test/MC/ARM/neon-sub-encoding.s b/test/MC/ARM/neon-sub-encoding.s index 43c7e98..241a01f 100644 --- a/test/MC/ARM/neon-sub-encoding.s +++ b/test/MC/ARM/neon-sub-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vsub.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf3] vsub.i8 d16, d17, d16 diff --git a/test/MC/ARM/neon-table-encoding.s b/test/MC/ARM/neon-table-encoding.s index c1666bf..7bf47c7 100644 --- a/test/MC/ARM/neon-table-encoding.s +++ b/test/MC/ARM/neon-table-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * @ CHECK: vtbl.8 d16, {d17}, d16 @ encoding: [0xa0,0x08,0xf1,0xf3] diff --git a/test/MC/ARM/neont2-abs-encoding.s b/test/MC/ARM/neont2-abs-encoding.s index dd36133..5c8bc33 100644 --- a/test/MC/ARM/neont2-abs-encoding.s +++ b/test/MC/ARM/neont2-abs-encoding.s @@ -1,33 +1,33 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vabs.s8 d16, d16 @ encoding: [0x20,0x03,0xf1,0xff] +@ CHECK: vabs.s8 d16, d16 @ encoding: [0xf1,0xff,0x20,0x03] vabs.s8 d16, d16 -@ CHECK: vabs.s16 d16, d16 @ encoding: [0x20,0x03,0xf5,0xff] +@ CHECK: vabs.s16 d16, d16 @ encoding: [0xf5,0xff,0x20,0x03] vabs.s16 d16, d16 -@ CHECK: vabs.s32 d16, d16 @ encoding: [0x20,0x03,0xf9,0xff] +@ CHECK: vabs.s32 d16, d16 @ encoding: [0xf9,0xff,0x20,0x03] vabs.s32 d16, d16 -@ CHECK: vabs.f32 d16, d16 @ encoding: [0x20,0x07,0xf9,0xff] +@ CHECK: vabs.f32 d16, d16 @ encoding: [0xf9,0xff,0x20,0x07] vabs.f32 d16, d16 -@ CHECK: vabs.s8 q8, q8 @ encoding: [0x60,0x03,0xf1,0xff] +@ CHECK: vabs.s8 q8, q8 @ encoding: [0xf1,0xff,0x60,0x03] vabs.s8 q8, q8 -@ CHECK: vabs.s16 q8, q8 @ encoding: [0x60,0x03,0xf5,0xff] +@ CHECK: vabs.s16 q8, q8 @ encoding: [0xf5,0xff,0x60,0x03] vabs.s16 q8, q8 -@ CHECK: vabs.s32 q8, q8 @ encoding: [0x60,0x03,0xf9,0xff] +@ CHECK: vabs.s32 q8, q8 @ encoding: [0xf9,0xff,0x60,0x03] vabs.s32 q8, q8 -@ CHECK: vabs.f32 q8, q8 @ encoding: [0x60,0x07,0xf9,0xff] +@ CHECK: vabs.f32 q8, q8 @ encoding: [0xf9,0xff,0x60,0x07] vabs.f32 q8, q8 -@ CHECK: vqabs.s8 d16, d16 @ encoding: [0x20,0x07,0xf0,0xff] +@ CHECK: vqabs.s8 d16, d16 @ encoding: [0xf0,0xff,0x20,0x07] vqabs.s8 d16, d16 -@ CHECK: vqabs.s16 d16, d16 @ encoding: [0x20,0x07,0xf4,0xff] +@ CHECK: vqabs.s16 d16, d16 @ encoding: [0xf4,0xff,0x20,0x07] vqabs.s16 d16, d16 -@ CHECK: vqabs.s32 d16, d16 @ encoding: [0x20,0x07,0xf8,0xff] +@ CHECK: vqabs.s32 d16, d16 @ encoding: [0xf8,0xff,0x20,0x07] vqabs.s32 d16, d16 -@ CHECK: vqabs.s8 q8, q8 @ encoding: [0x60,0x07,0xf0,0xff] +@ CHECK: vqabs.s8 q8, q8 @ encoding: [0xf0,0xff,0x60,0x07] vqabs.s8 q8, q8 -@ CHECK: vqabs.s16 q8, q8 @ encoding: [0x60,0x07,0xf4,0xff] +@ CHECK: vqabs.s16 q8, q8 @ encoding: [0xf4,0xff,0x60,0x07] vqabs.s16 q8, q8 -@ CHECK: vqabs.s32 q8, q8 @ encoding: [0x60,0x07,0xf8,0xff] +@ CHECK: vqabs.s32 q8, q8 @ encoding: [0xf8,0xff,0x60,0x07] vqabs.s32 q8, q8 diff --git a/test/MC/ARM/neont2-absdiff-encoding.s b/test/MC/ARM/neont2-absdiff-encoding.s index be8e798..2096357 100644 --- a/test/MC/ARM/neont2-absdiff-encoding.s +++ b/test/MC/ARM/neont2-absdiff-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * @ NOTE: This currently fails because the ASM parser doesn't parse vabal. diff --git a/test/MC/ARM/neont2-add-encoding.s b/test/MC/ARM/neont2-add-encoding.s index f7c32a7..c384d76 100644 --- a/test/MC/ARM/neont2-add-encoding.s +++ b/test/MC/ARM/neont2-add-encoding.s @@ -2,137 +2,137 @@ .code 16 -@ CHECK: vadd.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xef] +@ CHECK: vadd.i8 d16, d17, d16 @ encoding: [0x41,0xef,0xa0,0x08] vadd.i8 d16, d17, d16 -@ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xef] +@ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0x51,0xef,0xa0,0x08] vadd.i16 d16, d17, d16 -@ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xef] +@ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0x71,0xef,0xa0,0x08] vadd.i64 d16, d17, d16 -@ CHECK: vadd.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xef] +@ CHECK: vadd.i32 d16, d17, d16 @ encoding: [0x61,0xef,0xa0,0x08] vadd.i32 d16, d17, d16 -@ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xef] +@ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x0d] vadd.f32 d16, d16, d17 -@ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x40,0xef] +@ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x0d] vadd.f32 q8, q8, q9 -@ CHECK: vaddl.s8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xef] +@ CHECK: vaddl.s8 q8, d17, d16 @ encoding: [0xc1,0xef,0xa0,0x00] vaddl.s8 q8, d17, d16 -@ CHECK: vaddl.s16 q8, d17, d16 @ encoding: [0xa0,0x00,0xd1,0xef] +@ CHECK: vaddl.s16 q8, d17, d16 @ encoding: [0xd1,0xef,0xa0,0x00] vaddl.s16 q8, d17, d16 -@ CHECK: vaddl.s32 q8, d17, d16 @ encoding: [0xa0,0x00,0xe1,0xef] +@ CHECK: vaddl.s32 q8, d17, d16 @ encoding: [0xe1,0xef,0xa0,0x00] vaddl.s32 q8, d17, d16 -@ CHECK: vaddl.u8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xff] +@ CHECK: vaddl.u8 q8, d17, d16 @ encoding: [0xc1,0xff,0xa0,0x00] vaddl.u8 q8, d17, d16 -@ CHECK: vaddl.u16 q8, d17, d16 @ encoding: [0xa0,0x00,0xd1,0xff] +@ CHECK: vaddl.u16 q8, d17, d16 @ encoding: [0xd1,0xff,0xa0,0x00] vaddl.u16 q8, d17, d16 -@ CHECK: vaddl.u32 q8, d17, d16 @ encoding: [0xa0,0x00,0xe1,0xff] +@ CHECK: vaddl.u32 q8, d17, d16 @ encoding: [0xe1,0xff,0xa0,0x00] vaddl.u32 q8, d17, d16 -@ CHECK: vaddw.s8 q8, q8, d18 @ encoding: [0xa2,0x01,0xc0,0xef] +@ CHECK: vaddw.s8 q8, q8, d18 @ encoding: [0xc0,0xef,0xa2,0x01] vaddw.s8 q8, q8, d18 -@ CHECK: vaddw.s16 q8, q8, d18 @ encoding: [0xa2,0x01,0xd0,0xef] +@ CHECK: vaddw.s16 q8, q8, d18 @ encoding: [0xd0,0xef,0xa2,0x01] vaddw.s16 q8, q8, d18 -@ CHECK: vaddw.s32 q8, q8, d18 @ encoding: [0xa2,0x01,0xe0,0xef] +@ CHECK: vaddw.s32 q8, q8, d18 @ encoding: [0xe0,0xef,0xa2,0x01] vaddw.s32 q8, q8, d18 -@ CHECK: vaddw.u8 q8, q8, d18 @ encoding: [0xa2,0x01,0xc0,0xff] +@ CHECK: vaddw.u8 q8, q8, d18 @ encoding: [0xc0,0xff,0xa2,0x01] vaddw.u8 q8, q8, d18 -@ CHECK: vaddw.u16 q8, q8, d18 @ encoding: [0xa2,0x01,0xd0,0xff] +@ CHECK: vaddw.u16 q8, q8, d18 @ encoding: [0xd0,0xff,0xa2,0x01] vaddw.u16 q8, q8, d18 -@ CHECK: vaddw.u32 q8, q8, d18 @ encoding: [0xa2,0x01,0xe0,0xff] +@ CHECK: vaddw.u32 q8, q8, d18 @ encoding: [0xe0,0xff,0xa2,0x01] vaddw.u32 q8, q8, d18 -@ CHECK: vhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x00,0x40,0xef] +@ CHECK: vhadd.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x00] vhadd.s8 d16, d16, d17 -@ CHECK: vhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x00,0x50,0xef] +@ CHECK: vhadd.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x00] vhadd.s16 d16, d16, d17 -@ CHECK: vhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x00,0x60,0xef] +@ CHECK: vhadd.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x00] vhadd.s32 d16, d16, d17 -@ CHECK: vhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x00,0x40,0xff] +@ CHECK: vhadd.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xa1,0x00] vhadd.u8 d16, d16, d17 -@ CHECK: vhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x00,0x50,0xff] +@ CHECK: vhadd.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x00] vhadd.u16 d16, d16, d17 -@ CHECK: vhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x00,0x60,0xff] +@ CHECK: vhadd.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x00] vhadd.u32 d16, d16, d17 -@ CHECK: vhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x00,0x40,0xef] +@ CHECK: vhadd.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x00] vhadd.s8 q8, q8, q9 -@ CHECK: vhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x00,0x50,0xef] +@ CHECK: vhadd.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x00] vhadd.s16 q8, q8, q9 -@ CHECK: vhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x00,0x60,0xef] +@ CHECK: vhadd.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x00] vhadd.s32 q8, q8, q9 - @ CHECK: vhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x00,0x40,0xff] + @ CHECK: vhadd.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xe2,0x00] vhadd.u8 q8, q8, q9 -@ CHECK: vhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x00,0x50,0xff] +@ CHECK: vhadd.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x00] vhadd.u16 q8, q8, q9 -@ CHECK: vhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x00,0x60,0xff] +@ CHECK: vhadd.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x00] vhadd.u32 q8, q8, q9 -@ CHECK: vrhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xef] +@ CHECK: vrhadd.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x01] vrhadd.s8 d16, d16, d17 -@ CHECK: vrhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xef] +@ CHECK: vrhadd.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x01] vrhadd.s16 d16, d16, d17 -@ CHECK: vrhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xef] +@ CHECK: vrhadd.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x01] vrhadd.s32 d16, d16, d17 -@ CHECK: vrhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xff] +@ CHECK: vrhadd.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xa1,0x01] vrhadd.u8 d16, d16, d17 -@ CHECK: vrhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xff] +@ CHECK: vrhadd.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x01] vrhadd.u16 d16, d16, d17 -@ CHECK: vrhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xff] +@ CHECK: vrhadd.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x01] vrhadd.u32 d16, d16, d17 -@ CHECK: vrhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xef] +@ CHECK: vrhadd.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x01] vrhadd.s8 q8, q8, q9 -@ CHECK: vrhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xef] +@ CHECK: vrhadd.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x01] vrhadd.s16 q8, q8, q9 -@ CHECK: vrhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xef] +@ CHECK: vrhadd.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x01] vrhadd.s32 q8, q8, q9 -@ CHECK: vrhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xff] +@ CHECK: vrhadd.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xe2,0x01] vrhadd.u8 q8, q8, q9 -@ CHECK: vrhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xff] +@ CHECK: vrhadd.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x01] vrhadd.u16 q8, q8, q9 -@ CHECK: vrhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xff] +@ CHECK: vrhadd.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x01] vrhadd.u32 q8, q8, q9 -@ CHECK: vqadd.s8 d16, d16, d17 @ encoding: [0xb1,0x00,0x40,0xef] +@ CHECK: vqadd.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x00] vqadd.s8 d16, d16, d17 -@ CHECK: vqadd.s16 d16, d16, d17 @ encoding: [0xb1,0x00,0x50,0xef] +@ CHECK: vqadd.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x00] vqadd.s16 d16, d16, d17 -@ CHECK: vqadd.s32 d16, d16, d17 @ encoding: [0xb1,0x00,0x60,0xef] +@ CHECK: vqadd.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x00] vqadd.s32 d16, d16, d17 -@ CHECK: vqadd.s64 d16, d16, d17 @ encoding: [0xb1,0x00,0x70,0xef] +@ CHECK: vqadd.s64 d16, d16, d17 @ encoding: [0x70,0xef,0xb1,0x00] vqadd.s64 d16, d16, d17 -@ CHECK: vqadd.u8 d16, d16, d17 @ encoding: [0xb1,0x00,0x40,0xff] +@ CHECK: vqadd.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x00] vqadd.u8 d16, d16, d17 -@ CHECK: vqadd.u16 d16, d16, d17 @ encoding: [0xb1,0x00,0x50,0xff] +@ CHECK: vqadd.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xb1,0x00] vqadd.u16 d16, d16, d17 -@ CHECK: vqadd.u32 d16, d16, d17 @ encoding: [0xb1,0x00,0x60,0xff] +@ CHECK: vqadd.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xb1,0x00] vqadd.u32 d16, d16, d17 -@ CHECK: vqadd.u64 d16, d16, d17 @ encoding: [0xb1,0x00,0x70,0xff] +@ CHECK: vqadd.u64 d16, d16, d17 @ encoding: [0x70,0xff,0xb1,0x00] vqadd.u64 d16, d16, d17 -@ CHECK: vqadd.s8 q8, q8, q9 @ encoding: [0xf2,0x00,0x40,0xef] +@ CHECK: vqadd.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x00] vqadd.s8 q8, q8, q9 -@ CHECK: vqadd.s16 q8, q8, q9 @ encoding: [0xf2,0x00,0x50,0xef] +@ CHECK: vqadd.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x00] vqadd.s16 q8, q8, q9 -@ CHECK: vqadd.s32 q8, q8, q9 @ encoding: [0xf2,0x00,0x60,0xef] +@ CHECK: vqadd.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x00] vqadd.s32 q8, q8, q9 -@ CHECK: vqadd.s64 q8, q8, q9 @ encoding: [0xf2,0x00,0x70,0xef] +@ CHECK: vqadd.s64 q8, q8, q9 @ encoding: [0x70,0xef,0xf2,0x00] vqadd.s64 q8, q8, q9 -@ CHECK: vqadd.u8 q8, q8, q9 @ encoding: [0xf2,0x00,0x40,0xff] +@ CHECK: vqadd.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x00] vqadd.u8 q8, q8, q9 -@ CHECK: vqadd.u16 q8, q8, q9 @ encoding: [0xf2,0x00,0x50,0xff] +@ CHECK: vqadd.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xf2,0x00] vqadd.u16 q8, q8, q9 -@ CHECK: vqadd.u32 q8, q8, q9 @ encoding: [0xf2,0x00,0x60,0xff] +@ CHECK: vqadd.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xf2,0x00] vqadd.u32 q8, q8, q9 -@ CHECK: vqadd.u64 q8, q8, q9 @ encoding: [0xf2,0x00,0x70,0xff] +@ CHECK: vqadd.u64 q8, q8, q9 @ encoding: [0x70,0xff,0xf2,0x00] vqadd.u64 q8, q8, q9 -@ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xef] +@ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xef,0xa2,0x04] vaddhn.i16 d16, q8, q9 -@ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xef] +@ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xd0,0xef,0xa2,0x04] vaddhn.i32 d16, q8, q9 -@ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xef] +@ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xe0,0xef,0xa2,0x04] vaddhn.i64 d16, q8, q9 -@ CHECK: vraddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xff] +@ CHECK: vraddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xff,0xa2,0x04] vraddhn.i16 d16, q8, q9 -@ CHECK: vraddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xff] +@ CHECK: vraddhn.i32 d16, q8, q9 @ encoding: [0xd0,0xff,0xa2,0x04] vraddhn.i32 d16, q8, q9 -@ CHECK: vraddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xff] +@ CHECK: vraddhn.i64 d16, q8, q9 @ encoding: [0xe0,0xff,0xa2,0x04] vraddhn.i64 d16, q8, q9 diff --git a/test/MC/ARM/neont2-bitcount-encoding.s b/test/MC/ARM/neont2-bitcount-encoding.s index cebd972..4280cbd 100644 --- a/test/MC/ARM/neont2-bitcount-encoding.s +++ b/test/MC/ARM/neont2-bitcount-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * .code 16 diff --git a/test/MC/ARM/neont2-bitwise-encoding.s b/test/MC/ARM/neont2-bitwise-encoding.s index f5062f8..3acd7a8 100644 --- a/test/MC/ARM/neont2-bitwise-encoding.s +++ b/test/MC/ARM/neont2-bitwise-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * .code 16 diff --git a/test/MC/ARM/neont2-cmp-encoding.s b/test/MC/ARM/neont2-cmp-encoding.s index 9b00960..1dbd42a 100644 --- a/test/MC/ARM/neont2-cmp-encoding.s +++ b/test/MC/ARM/neont2-cmp-encoding.s @@ -1,36 +1,36 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xff] +@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07] vcvt.s32.f32 d16, d16 -@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xff] +@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x07] vcvt.u32.f32 d16, d16 -@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xff] +@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06] vcvt.f32.s32 d16, d16 -@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xff] +@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x06] vcvt.f32.u32 d16, d16 -@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xff] +@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07] vcvt.s32.f32 q8, q8 -@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xe0,0x07,0xfb,0xff] +@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x07] vcvt.u32.f32 q8, q8 -@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xff] +@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x06] vcvt.f32.s32 q8, q8 -@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xe0,0x06,0xfb,0xff] +@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x06] vcvt.f32.u32 q8, q8 -@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xef] +@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0f] vcvt.s32.f32 d16, d16, #1 -@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xff] +@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0f] vcvt.u32.f32 d16, d16, #1 -@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xef] +@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0e] vcvt.f32.s32 d16, d16, #1 -@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xff] +@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0e] vcvt.f32.u32 d16, d16, #1 -@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xef] +@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0f] vcvt.s32.f32 q8, q8, #1 -@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xff] +@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0f] vcvt.u32.f32 q8, q8, #1 -@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xef] +@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0e] vcvt.f32.s32 q8, q8, #1 -@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xff] +@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0e] vcvt.f32.u32 q8, q8, #1 diff --git a/test/MC/ARM/neont2-convert-encoding.s b/test/MC/ARM/neont2-convert-encoding.s index 9b00960..1df3b43 100644 --- a/test/MC/ARM/neont2-convert-encoding.s +++ b/test/MC/ARM/neont2-convert-encoding.s @@ -1,36 +1,40 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a9 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xff] +@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07] vcvt.s32.f32 d16, d16 -@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xff] +@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x07] vcvt.u32.f32 d16, d16 -@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xff] +@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06] vcvt.f32.s32 d16, d16 -@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xff] +@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x06] vcvt.f32.u32 d16, d16 -@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xff] +@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07] vcvt.s32.f32 q8, q8 -@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xe0,0x07,0xfb,0xff] +@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x07] vcvt.u32.f32 q8, q8 -@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xff] +@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x06] vcvt.f32.s32 q8, q8 -@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xe0,0x06,0xfb,0xff] +@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x06] vcvt.f32.u32 q8, q8 -@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xef] +@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0f] vcvt.s32.f32 d16, d16, #1 -@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xff] +@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0f] vcvt.u32.f32 d16, d16, #1 -@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xef] +@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0e] vcvt.f32.s32 d16, d16, #1 -@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xff] +@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0e] vcvt.f32.u32 d16, d16, #1 -@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xef] +@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0f] vcvt.s32.f32 q8, q8, #1 -@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xff] +@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0f] vcvt.u32.f32 q8, q8, #1 -@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xef] +@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0e] vcvt.f32.s32 q8, q8, #1 -@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xff] +@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0e] vcvt.f32.u32 q8, q8, #1 +@ CHECK: vcvt.f32.f16 q8, d16 @ encoding: [0xf6,0xff,0x20,0x07] + vcvt.f32.f16 q8, d16 +@ CHECK: vcvt.f16.f32 d16, q8 @ encoding: [0xf6,0xff,0x20,0x06] + vcvt.f16.f32 d16, q8 diff --git a/test/MC/ARM/neont2-dup-encoding.s b/test/MC/ARM/neont2-dup-encoding.s index 5330833..da6e78f 100644 --- a/test/MC/ARM/neont2-dup-encoding.s +++ b/test/MC/ARM/neont2-dup-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * .code 16 diff --git a/test/MC/ARM/neont2-minmax-encoding.s b/test/MC/ARM/neont2-minmax-encoding.s index 802b87c..7e86d45 100644 --- a/test/MC/ARM/neont2-minmax-encoding.s +++ b/test/MC/ARM/neont2-minmax-encoding.s @@ -1,60 +1,60 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xef] +@ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x06] vmin.s8 d16, d16, d17 -@ CHECK: vmin.s16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xef] +@ CHECK: vmin.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x06] vmin.s16 d16, d16, d17 -@ CHECK: vmin.s32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xef] +@ CHECK: vmin.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x06] vmin.s32 d16, d16, d17 -@ CHECK: vmin.u8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xff] +@ CHECK: vmin.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x06] vmin.u8 d16, d16, d17 -@ CHECK: vmin.u16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xff] +@ CHECK: vmin.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xb1,0x06] vmin.u16 d16, d16, d17 -@ CHECK: vmin.u32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xff] +@ CHECK: vmin.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xb1,0x06] vmin.u32 d16, d16, d17 -@ CHECK: vmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xef] +@ CHECK: vmin.f32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0f] vmin.f32 d16, d16, d17 -@ CHECK: vmin.s8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xef] +@ CHECK: vmin.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x06] vmin.s8 q8, q8, q9 -@ CHECK: vmin.s16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xef] +@ CHECK: vmin.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x06] vmin.s16 q8, q8, q9 -@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xef] +@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x06] vmin.s32 q8, q8, q9 -@ CHECK: vmin.u8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xff] +@ CHECK: vmin.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x06] vmin.u8 q8, q8, q9 -@ CHECK: vmin.u16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xff] +@ CHECK: vmin.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xf2,0x06] vmin.u16 q8, q8, q9 -@ CHECK: vmin.u32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xff] +@ CHECK: vmin.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xf2,0x06] vmin.u32 q8, q8, q9 -@ CHECK: vmin.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x60,0xef] +@ CHECK: vmin.f32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0f] vmin.f32 q8, q8, q9 -@ CHECK: vmax.s8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xef] +@ CHECK: vmax.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x06] vmax.s8 d16, d16, d17 -@ CHECK: vmax.s16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xef] +@ CHECK: vmax.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x06] vmax.s16 d16, d16, d17 -@ CHECK: vmax.s32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xef] +@ CHECK: vmax.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x06] vmax.s32 d16, d16, d17 -@ CHECK: vmax.u8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xff] +@ CHECK: vmax.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xa1,0x06] vmax.u8 d16, d16, d17 -@ CHECK: vmax.u16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xff] +@ CHECK: vmax.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x06] vmax.u16 d16, d16, d17 -@ CHECK: vmax.u32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xff] +@ CHECK: vmax.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x06] vmax.u32 d16, d16, d17 -@ CHECK: vmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xef] +@ CHECK: vmax.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x0f] vmax.f32 d16, d16, d17 -@ CHECK: vmax.s8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xef] +@ CHECK: vmax.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x06] vmax.s8 q8, q8, q9 -@ CHECK: vmax.s16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xef] +@ CHECK: vmax.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x06] vmax.s16 q8, q8, q9 -@ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xef] +@ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x06] vmax.s32 q8, q8, q9 -@ CHECK: vmax.u8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xff] +@ CHECK: vmax.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xe2,0x06] vmax.u8 q8, q8, q9 -@ CHECK: vmax.u16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xff] +@ CHECK: vmax.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x06] vmax.u16 q8, q8, q9 -@ CHECK: vmax.u32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xff] +@ CHECK: vmax.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x06] vmax.u32 q8, q8, q9 -@ CHECK: vmax.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x40,0xef] +@ CHECK: vmax.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x0f] vmax.f32 q8, q8, q9 diff --git a/test/MC/ARM/neont2-mov-encoding.s b/test/MC/ARM/neont2-mov-encoding.s index 4f6b687..ababbb7 100644 --- a/test/MC/ARM/neont2-mov-encoding.s +++ b/test/MC/ARM/neont2-mov-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * .code 16 diff --git a/test/MC/ARM/neont2-mul-accum-encoding.s b/test/MC/ARM/neont2-mul-accum-encoding.s index 66d4e10..e21c67d 100644 --- a/test/MC/ARM/neont2-mul-accum-encoding.s +++ b/test/MC/ARM/neont2-mul-accum-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * .code 16 diff --git a/test/MC/ARM/neont2-mul-encoding.s b/test/MC/ARM/neont2-mul-encoding.s index 4e33beb..93ecabb 100644 --- a/test/MC/ARM/neont2-mul-encoding.s +++ b/test/MC/ARM/neont2-mul-encoding.s @@ -1,58 +1,58 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xef] +@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x09] vmul.i8 d16, d16, d17 -@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xef] +@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x09] vmul.i16 d16, d16, d17 -@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0xb1,0x09,0x60,0xef] +@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x09] vmul.i32 d16, d16, d17 -@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0xb1,0x0d,0x40,0xff] +@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x0d] vmul.f32 d16, d16, d17 -@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xef] +@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x09] vmul.i8 q8, q8, q9 -@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0xf2,0x09,0x50,0xef] +@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x09] vmul.i16 q8, q8, q9 -@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0xf2,0x09,0x60,0xef] +@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x09] vmul.i32 q8, q8, q9 -@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0xf2,0x0d,0x40,0xff] +@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x0d] vmul.f32 q8, q8, q9 -@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xff] +@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x09] vmul.p8 d16, d16, d17 -@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xff] +@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x09] vmul.p8 q8, q8, q9 -@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xef] +@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x0b] vqdmulh.s16 d16, d16, d17 -@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xef] +@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0b] vqdmulh.s32 d16, d16, d17 -@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xef] +@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x0b] vqdmulh.s16 q8, q8, q9 -@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xef] +@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0b] vqdmulh.s32 q8, q8, q9 -@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xff] +@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x0b] vqrdmulh.s16 d16, d16, d17 -@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xff] +@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x0b] vqrdmulh.s32 d16, d16, d17 -@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xff] +@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x0b] vqrdmulh.s16 q8, q8, q9 -@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xff] +@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x0b] vqrdmulh.s32 q8, q8, q9 -@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xef] +@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0c] vmull.s8 q8, d16, d17 -@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xef] +@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0c] vmull.s16 q8, d16, d17 -@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xef] +@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0c] vmull.s32 q8, d16, d17 -@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xff] +@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xc0,0xff,0xa1,0x0c] vmull.u8 q8, d16, d17 -@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xff] +@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xd0,0xff,0xa1,0x0c] vmull.u16 q8, d16, d17 -@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xff] +@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xe0,0xff,0xa1,0x0c] vmull.u32 q8, d16, d17 -@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xa1,0x0e,0xc0,0xef] +@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0e] vmull.p8 q8, d16, d17 -@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0d,0xd0,0xef] +@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0d] vqdmull.s16 q8, d16, d17 -@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0d,0xe0,0xef] +@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0d] vqdmull.s32 q8, d16, d17 diff --git a/test/MC/ARM/neont2-neg-encoding.s b/test/MC/ARM/neont2-neg-encoding.s index fa35fb1..21dab65 100644 --- a/test/MC/ARM/neont2-neg-encoding.s +++ b/test/MC/ARM/neont2-neg-encoding.s @@ -1,32 +1,32 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vneg.s8 d16, d16 @ encoding: [0xa0,0x03,0xf1,0xff] +@ CHECK: vneg.s8 d16, d16 @ encoding: [0xf1,0xff,0xa0,0x03] vneg.s8 d16, d16 -@ CHECK: vneg.s16 d16, d16 @ encoding: [0xa0,0x03,0xf5,0xff] +@ CHECK: vneg.s16 d16, d16 @ encoding: [0xf5,0xff,0xa0,0x03] vneg.s16 d16, d16 -@ CHECK: vneg.s32 d16, d16 @ encoding: [0xa0,0x03,0xf9,0xff] +@ CHECK: vneg.s32 d16, d16 @ encoding: [0xf9,0xff,0xa0,0x03] vneg.s32 d16, d16 -@ CHECK: vneg.f32 d16, d16 @ encoding: [0xa0,0x07,0xf9,0xff] +@ CHECK: vneg.f32 d16, d16 @ encoding: [0xf9,0xff,0xa0,0x07] vneg.f32 d16, d16 -@ CHECK: vneg.s8 q8, q8 @ encoding: [0xe0,0x03,0xf1,0xff] +@ CHECK: vneg.s8 q8, q8 @ encoding: [0xf1,0xff,0xe0,0x03] vneg.s8 q8, q8 -@ CHECK: vneg.s16 q8, q8 @ encoding: [0xe0,0x03,0xf5,0xff] +@ CHECK: vneg.s16 q8, q8 @ encoding: [0xf5,0xff,0xe0,0x03] vneg.s16 q8, q8 -@ CHECK: vneg.s32 q8, q8 @ encoding: [0xe0,0x03,0xf9,0xff] +@ CHECK: vneg.s32 q8, q8 @ encoding: [0xf9,0xff,0xe0,0x03] vneg.s32 q8, q8 -@ CHECK: vneg.f32 q8, q8 @ encoding: [0xe0,0x07,0xf9,0xff] +@ CHECK: vneg.f32 q8, q8 @ encoding: [0xf9,0xff,0xe0,0x07] vneg.f32 q8, q8 -@ CHECK: vqneg.s8 d16, d16 @ encoding: [0xa0,0x07,0xf0,0xff] +@ CHECK: vqneg.s8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x07] vqneg.s8 d16, d16 -@ CHECK: vqneg.s16 d16, d16 @ encoding: [0xa0,0x07,0xf4,0xff] +@ CHECK: vqneg.s16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x07] vqneg.s16 d16, d16 -@ CHECK: vqneg.s32 d16, d16 @ encoding: [0xa0,0x07,0xf8,0xff] +@ CHECK: vqneg.s32 d16, d16 @ encoding: [0xf8,0xff,0xa0,0x07] vqneg.s32 d16, d16 -@ CHECK: vqneg.s8 q8, q8 @ encoding: [0xe0,0x07,0xf0,0xff] +@ CHECK: vqneg.s8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x07] vqneg.s8 q8, q8 -@ CHECK: vqneg.s16 q8, q8 @ encoding: [0xe0,0x07,0xf4,0xff] +@ CHECK: vqneg.s16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x07] vqneg.s16 q8, q8 -@ CHECK: vqneg.s32 q8, q8 @ encoding: [0xe0,0x07,0xf8,0xff] +@ CHECK: vqneg.s32 q8, q8 @ encoding: [0xf8,0xff,0xe0,0x07] vqneg.s32 q8, q8 diff --git a/test/MC/ARM/neont2-pairwise-encoding.s b/test/MC/ARM/neont2-pairwise-encoding.s index 058f1d8..ef90922 100644 --- a/test/MC/ARM/neont2-pairwise-encoding.s +++ b/test/MC/ARM/neont2-pairwise-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * .code 16 diff --git a/test/MC/ARM/neont2-reciprocal-encoding.s b/test/MC/ARM/neont2-reciprocal-encoding.s index 918333b..8ea77d7 100644 --- a/test/MC/ARM/neont2-reciprocal-encoding.s +++ b/test/MC/ARM/neont2-reciprocal-encoding.s @@ -1,28 +1,28 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xff] +@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x04] vrecpe.u32 d16, d16 -@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0x60,0x04,0xfb,0xff] +@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x04] vrecpe.u32 q8, q8 -@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0x20,0x05,0xfb,0xff] +@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x05] vrecpe.f32 d16, d16 -@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0x60,0x05,0xfb,0xff] +@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x05] vrecpe.f32 q8, q8 -@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x40,0xef] +@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x0f] vrecps.f32 d16, d16, d17 -@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x40,0xef] +@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x0f] vrecps.f32 q8, q8, q9 -@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xa0,0x04,0xfb,0xff] +@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x04] vrsqrte.u32 d16, d16 -@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xe0,0x04,0xfb,0xff] +@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x04] vrsqrte.u32 q8, q8 -@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xa0,0x05,0xfb,0xff] +@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x05] vrsqrte.f32 d16, d16 -@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xe0,0x05,0xfb,0xff] +@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x05] vrsqrte.f32 q8, q8 -@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x60,0xef] +@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x0f] vrsqrts.f32 d16, d16, d17 -@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x60,0xef] +@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x0f] vrsqrts.f32 q8, q8, q9 diff --git a/test/MC/ARM/neont2-reverse-encoding.s b/test/MC/ARM/neont2-reverse-encoding.s index 4155492..f37d72d 100644 --- a/test/MC/ARM/neont2-reverse-encoding.s +++ b/test/MC/ARM/neont2-reverse-encoding.s @@ -1,26 +1,26 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s -@ CHECK: vrev64.8 d16, d16 @ encoding: [0x20,0x00,0xf0,0xff] +@ CHECK: vrev64.8 d16, d16 @ encoding: [0xf0,0xff,0x20,0x00] vrev64.8 d16, d16 -@ CHECK: vrev64.16 d16, d16 @ encoding: [0x20,0x00,0xf4,0xff] +@ CHECK: vrev64.16 d16, d16 @ encoding: [0xf4,0xff,0x20,0x00] vrev64.16 d16, d16 -@ CHECK: vrev64.32 d16, d16 @ encoding: [0x20,0x00,0xf8,0xff] +@ CHECK: vrev64.32 d16, d16 @ encoding: [0xf8,0xff,0x20,0x00] vrev64.32 d16, d16 -@ CHECK: vrev64.8 q8, q8 @ encoding: [0x60,0x00,0xf0,0xff] +@ CHECK: vrev64.8 q8, q8 @ encoding: [0xf0,0xff,0x60,0x00] vrev64.8 q8, q8 -@ CHECK: vrev64.16 q8, q8 @ encoding: [0x60,0x00,0xf4,0xff] +@ CHECK: vrev64.16 q8, q8 @ encoding: [0xf4,0xff,0x60,0x00] vrev64.16 q8, q8 -@ CHECK: vrev64.32 q8, q8 @ encoding: [0x60,0x00,0xf8,0xff] +@ CHECK: vrev64.32 q8, q8 @ encoding: [0xf8,0xff,0x60,0x00] vrev64.32 q8, q8 -@ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xff] +@ CHECK: vrev32.8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x00] vrev32.8 d16, d16 -@ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xff] +@ CHECK: vrev32.16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x00] vrev32.16 d16, d16 -@ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xff] +@ CHECK: vrev32.8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x00] vrev32.8 q8, q8 -@ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xff] +@ CHECK: vrev32.16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x00] vrev32.16 q8, q8 -@ CHECK: vrev16.8 d16, d16 @ encoding: [0x20,0x01,0xf0,0xff] +@ CHECK: vrev16.8 d16, d16 @ encoding: [0xf0,0xff,0x20,0x01] vrev16.8 d16, d16 -@ CHECK: vrev16.8 q8, q8 @ encoding: [0x60,0x01,0xf0,0xff] +@ CHECK: vrev16.8 q8, q8 @ encoding: [0xf0,0xff,0x60,0x01] vrev16.8 q8, q8 diff --git a/test/MC/ARM/neont2-satshift-encoding.s b/test/MC/ARM/neont2-satshift-encoding.s index 5cf8b24..34e50f1 100644 --- a/test/MC/ARM/neont2-satshift-encoding.s +++ b/test/MC/ARM/neont2-satshift-encoding.s @@ -1,152 +1,152 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xef] +@ CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0x41,0xef,0xb0,0x04] vqshl.s8 d16, d16, d17 -@ CHECK: vqshl.s16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xef] +@ CHECK: vqshl.s16 d16, d16, d17 @ encoding: [0x51,0xef,0xb0,0x04] vqshl.s16 d16, d16, d17 -@ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xef] +@ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0x61,0xef,0xb0,0x04] vqshl.s32 d16, d16, d17 -@ CHECK: vqshl.s64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xef] +@ CHECK: vqshl.s64 d16, d16, d17 @ encoding: [0x71,0xef,0xb0,0x04] vqshl.s64 d16, d16, d17 -@ CHECK: vqshl.u8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xff] +@ CHECK: vqshl.u8 d16, d16, d17 @ encoding: [0x41,0xff,0xb0,0x04] vqshl.u8 d16, d16, d17 -@ CHECK: vqshl.u16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xff] +@ CHECK: vqshl.u16 d16, d16, d17 @ encoding: [0x51,0xff,0xb0,0x04] vqshl.u16 d16, d16, d17 -@ CHECK: vqshl.u32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xff] +@ CHECK: vqshl.u32 d16, d16, d17 @ encoding: [0x61,0xff,0xb0,0x04] vqshl.u32 d16, d16, d17 -@ CHECK: vqshl.u64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xff] +@ CHECK: vqshl.u64 d16, d16, d17 @ encoding: [0x71,0xff,0xb0,0x04] vqshl.u64 d16, d16, d17 -@ CHECK: vqshl.s8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xef] +@ CHECK: vqshl.s8 q8, q8, q9 @ encoding: [0x42,0xef,0xf0,0x04] vqshl.s8 q8, q8, q9 -@ CHECK: vqshl.s16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xef] +@ CHECK: vqshl.s16 q8, q8, q9 @ encoding: [0x52,0xef,0xf0,0x04] vqshl.s16 q8, q8, q9 -@ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xef] +@ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0x62,0xef,0xf0,0x04] vqshl.s32 q8, q8, q9 -@ CHECK: vqshl.s64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xef] +@ CHECK: vqshl.s64 q8, q8, q9 @ encoding: [0x72,0xef,0xf0,0x04] vqshl.s64 q8, q8, q9 -@ CHECK: vqshl.u8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xff] +@ CHECK: vqshl.u8 q8, q8, q9 @ encoding: [0x42,0xff,0xf0,0x04] vqshl.u8 q8, q8, q9 -@ CHECK: vqshl.u16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xff] +@ CHECK: vqshl.u16 q8, q8, q9 @ encoding: [0x52,0xff,0xf0,0x04] vqshl.u16 q8, q8, q9 -@ CHECK: vqshl.u32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xff] +@ CHECK: vqshl.u32 q8, q8, q9 @ encoding: [0x62,0xff,0xf0,0x04] vqshl.u32 q8, q8, q9 -@ CHECK: vqshl.u64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xff] +@ CHECK: vqshl.u64 q8, q8, q9 @ encoding: [0x72,0xff,0xf0,0x04] vqshl.u64 q8, q8, q9 -@ CHECK: vqshl.s8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xef] +@ CHECK: vqshl.s8 d16, d16, #7 @ encoding: [0xcf,0xef,0x30,0x07] vqshl.s8 d16, d16, #7 -@ CHECK: vqshl.s16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xef] +@ CHECK: vqshl.s16 d16, d16, #15 @ encoding: [0xdf,0xef,0x30,0x07] vqshl.s16 d16, d16, #15 -@ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xef] +@ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0xff,0xef,0x30,0x07] vqshl.s32 d16, d16, #31 -@ CHECK: vqshl.s64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xef] +@ CHECK: vqshl.s64 d16, d16, #63 @ encoding: [0xff,0xef,0xb0,0x07] vqshl.s64 d16, d16, #63 -@ CHECK: vqshl.u8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xff] +@ CHECK: vqshl.u8 d16, d16, #7 @ encoding: [0xcf,0xff,0x30,0x07] vqshl.u8 d16, d16, #7 -@ CHECK: vqshl.u16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xff] +@ CHECK: vqshl.u16 d16, d16, #15 @ encoding: [0xdf,0xff,0x30,0x07] vqshl.u16 d16, d16, #15 -@ CHECK: vqshl.u32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xff] +@ CHECK: vqshl.u32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x07] vqshl.u32 d16, d16, #31 -@ CHECK: vqshl.u64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xff] +@ CHECK: vqshl.u64 d16, d16, #63 @ encoding: [0xff,0xff,0xb0,0x07] vqshl.u64 d16, d16, #63 -@ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0x30,0x06,0xcf,0xff] +@ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0xcf,0xff,0x30,0x06] vqshlu.s8 d16, d16, #7 -@ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0x30,0x06,0xdf,0xff] +@ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0xdf,0xff,0x30,0x06] vqshlu.s16 d16, d16, #15 -@ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xff] +@ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x06] vqshlu.s32 d16, d16, #31 -@ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xb0,0x06,0xff,0xff] +@ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xff,0xff,0xb0,0x06] vqshlu.s64 d16, d16, #63 -@ CHECK: vqshl.s8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xef] +@ CHECK: vqshl.s8 q8, q8, #7 @ encoding: [0xcf,0xef,0x70,0x07] vqshl.s8 q8, q8, #7 -@ CHECK: vqshl.s16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xef] +@ CHECK: vqshl.s16 q8, q8, #15 @ encoding: [0xdf,0xef,0x70,0x07] vqshl.s16 q8, q8, #15 -@ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xef] +@ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0xff,0xef,0x70,0x07] vqshl.s32 q8, q8, #31 -@ CHECK: vqshl.s64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xef] +@ CHECK: vqshl.s64 q8, q8, #63 @ encoding: [0xff,0xef,0xf0,0x07] vqshl.s64 q8, q8, #63 -@ CHECK: vqshl.u8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xff] +@ CHECK: vqshl.u8 q8, q8, #7 @ encoding: [0xcf,0xff,0x70,0x07] vqshl.u8 q8, q8, #7 -@ CHECK: vqshl.u16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xff] +@ CHECK: vqshl.u16 q8, q8, #15 @ encoding: [0xdf,0xff,0x70,0x07] vqshl.u16 q8, q8, #15 -@ CHECK: vqshl.u32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xff] +@ CHECK: vqshl.u32 q8, q8, #31 @ encoding: [0xff,0xff,0x70,0x07] vqshl.u32 q8, q8, #31 -@ CHECK: vqshl.u64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xff] +@ CHECK: vqshl.u64 q8, q8, #63 @ encoding: [0xff,0xff,0xf0,0x07] vqshl.u64 q8, q8, #63 -@ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0x70,0x06,0xcf,0xff] +@ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0xcf,0xff,0x70,0x06] vqshlu.s8 q8, q8, #7 -@ CHECK: vqshlu.s16 q8, q8, #15 @ encoding: [0x70,0x06,0xdf,0xff] +@ CHECK: vqshlu.s16 q8, q8, #15 @ encoding: [0xdf,0xff,0x70,0x06] vqshlu.s16 q8, q8, #15 -@ CHECK: vqshlu.s32 q8, q8, #31 @ encoding: [0x70,0x06,0xff,0xff] +@ CHECK: vqshlu.s32 q8, q8, #31 @ encoding: [0xff,0xff,0x70,0x06] vqshlu.s32 q8, q8, #31 -@ CHECK: vqshlu.s64 q8, q8, #63 @ encoding: [0xf0,0x06,0xff,0xff] +@ CHECK: vqshlu.s64 q8, q8, #63 @ encoding: [0xff,0xff,0xf0,0x06] vqshlu.s64 q8, q8, #63 -@ CHECK: vqrshl.s8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xef] +@ CHECK: vqrshl.s8 d16, d16, d17 @ encoding: [0x41,0xef,0xb0,0x05] vqrshl.s8 d16, d16, d17 -@ CHECK: vqrshl.s16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xef] +@ CHECK: vqrshl.s16 d16, d16, d17 @ encoding: [0x51,0xef,0xb0,0x05] vqrshl.s16 d16, d16, d17 -@ CHECK: vqrshl.s32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xef] +@ CHECK: vqrshl.s32 d16, d16, d17 @ encoding: [0x61,0xef,0xb0,0x05] vqrshl.s32 d16, d16, d17 -@ CHECK: vqrshl.s64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xef] +@ CHECK: vqrshl.s64 d16, d16, d17 @ encoding: [0x71,0xef,0xb0,0x05] vqrshl.s64 d16, d16, d17 -@ CHECK: vqrshl.u8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xff] +@ CHECK: vqrshl.u8 d16, d16, d17 @ encoding: [0x41,0xff,0xb0,0x05] vqrshl.u8 d16, d16, d17 -@ CHECK: vqrshl.u16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xff] +@ CHECK: vqrshl.u16 d16, d16, d17 @ encoding: [0x51,0xff,0xb0,0x05] vqrshl.u16 d16, d16, d17 -@ CHECK: vqrshl.u32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xff] +@ CHECK: vqrshl.u32 d16, d16, d17 @ encoding: [0x61,0xff,0xb0,0x05] vqrshl.u32 d16, d16, d17 -@ CHECK: vqrshl.u64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xff] +@ CHECK: vqrshl.u64 d16, d16, d17 @ encoding: [0x71,0xff,0xb0,0x05] vqrshl.u64 d16, d16, d17 -@ CHECK: vqrshl.s8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xef] +@ CHECK: vqrshl.s8 q8, q8, q9 @ encoding: [0x42,0xef,0xf0,0x05] vqrshl.s8 q8, q8, q9 -@ CHECK: vqrshl.s16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xef] +@ CHECK: vqrshl.s16 q8, q8, q9 @ encoding: [0x52,0xef,0xf0,0x05] vqrshl.s16 q8, q8, q9 -@ CHECK: vqrshl.s32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xef] +@ CHECK: vqrshl.s32 q8, q8, q9 @ encoding: [0x62,0xef,0xf0,0x05] vqrshl.s32 q8, q8, q9 -@ CHECK: vqrshl.s64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xef] +@ CHECK: vqrshl.s64 q8, q8, q9 @ encoding: [0x72,0xef,0xf0,0x05] vqrshl.s64 q8, q8, q9 -@ CHECK: vqrshl.u8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xff] +@ CHECK: vqrshl.u8 q8, q8, q9 @ encoding: [0x42,0xff,0xf0,0x05] vqrshl.u8 q8, q8, q9 -@ CHECK: vqrshl.u16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xff] +@ CHECK: vqrshl.u16 q8, q8, q9 @ encoding: [0x52,0xff,0xf0,0x05] vqrshl.u16 q8, q8, q9 -@ CHECK: vqrshl.u32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xff] +@ CHECK: vqrshl.u32 q8, q8, q9 @ encoding: [0x62,0xff,0xf0,0x05] vqrshl.u32 q8, q8, q9 -@ CHECK: vqrshl.u64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xff] +@ CHECK: vqrshl.u64 q8, q8, q9 @ encoding: [0x72,0xff,0xf0,0x05] vqrshl.u64 q8, q8, q9 -@ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xef] +@ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0xc8,0xef,0x30,0x09] vqshrn.s16 d16, q8, #8 -@ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xef] +@ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0xd0,0xef,0x30,0x09] vqshrn.s32 d16, q8, #16 -@ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xef] +@ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0xe0,0xef,0x30,0x09] vqshrn.s64 d16, q8, #32 -@ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xff] +@ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x09] vqshrn.u16 d16, q8, #8 -@ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xff] +@ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x09] vqshrn.u32 d16, q8, #16 -@ CHECK: vqshrn.u64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xff] +@ CHECK: vqshrn.u64 d16, q8, #32 @ encoding: [0xe0,0xff,0x30,0x09] vqshrn.u64 d16, q8, #32 -@ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xff] +@ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x08] vqshrun.s16 d16, q8, #8 -@ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xff] +@ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x08] vqshrun.s32 d16, q8, #16 -@ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xff] +@ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0xe0,0xff,0x30,0x08] vqshrun.s64 d16, q8, #32 -@ CHECK: vqrshrn.s16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xef] +@ CHECK: vqrshrn.s16 d16, q8, #8 @ encoding: [0xc8,0xef,0x70,0x09] vqrshrn.s16 d16, q8, #8 -@ CHECK: vqrshrn.s32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xef] +@ CHECK: vqrshrn.s32 d16, q8, #16 @ encoding: [0xd0,0xef,0x70,0x09] vqrshrn.s32 d16, q8, #16 -@ CHECK: vqrshrn.s64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xef] +@ CHECK: vqrshrn.s64 d16, q8, #32 @ encoding: [0xe0,0xef,0x70,0x09] vqrshrn.s64 d16, q8, #32 -@ CHECK: vqrshrn.u16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xff] +@ CHECK: vqrshrn.u16 d16, q8, #8 @ encoding: [0xc8,0xff,0x70,0x09] vqrshrn.u16 d16, q8, #8 -@ CHECK: vqrshrn.u32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xff] +@ CHECK: vqrshrn.u32 d16, q8, #16 @ encoding: [0xd0,0xff,0x70,0x09] vqrshrn.u32 d16, q8, #16 -@ CHECK: vqrshrn.u64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xff] +@ CHECK: vqrshrn.u64 d16, q8, #32 @ encoding: [0xe0,0xff,0x70,0x09] vqrshrn.u64 d16, q8, #32 -@ CHECK: vqrshrun.s16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xff] +@ CHECK: vqrshrun.s16 d16, q8, #8 @ encoding: [0xc8,0xff,0x70,0x08] vqrshrun.s16 d16, q8, #8 -@ CHECK: vqrshrun.s32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xff] +@ CHECK: vqrshrun.s32 d16, q8, #16 @ encoding: [0xd0,0xff,0x70,0x08] vqrshrun.s32 d16, q8, #16 -@ CHECK: vqrshrun.s64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xff] +@ CHECK: vqrshrun.s64 d16, q8, #32 @ encoding: [0xe0,0xff,0x70,0x08] vqrshrun.s64 d16, q8, #32 diff --git a/test/MC/ARM/neont2-shift-encoding.s b/test/MC/ARM/neont2-shift-encoding.s index c96ce08..d098f54 100644 --- a/test/MC/ARM/neont2-shift-encoding.s +++ b/test/MC/ARM/neont2-shift-encoding.s @@ -1,162 +1,162 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0xa1,0x04,0x40,0xff] +@ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x04] vshl.u8 d16, d17, d16 -@ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0xa1,0x04,0x50,0xff] +@ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0x50,0xff,0xa1,0x04] vshl.u16 d16, d17, d16 -@ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0xa1,0x04,0x60,0xff] +@ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0x60,0xff,0xa1,0x04] vshl.u32 d16, d17, d16 -@ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0xa1,0x04,0x70,0xff] +@ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0x70,0xff,0xa1,0x04] vshl.u64 d16, d17, d16 -@ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xef] +@ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0xcf,0xef,0x30,0x05] vshl.i8 d16, d16, #7 -@ CHECK: vshl.i16 d16, d16, #15 @ encoding: [0x30,0x05,0xdf,0xef] +@ CHECK: vshl.i16 d16, d16, #15 @ encoding: [0xdf,0xef,0x30,0x05] vshl.i16 d16, d16, #15 -@ CHECK: vshl.i32 d16, d16, #31 @ encoding: [0x30,0x05,0xff,0xef] +@ CHECK: vshl.i32 d16, d16, #31 @ encoding: [0xff,0xef,0x30,0x05] vshl.i32 d16, d16, #31 -@ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xb0,0x05,0xff,0xef] +@ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xff,0xef,0xb0,0x05] vshl.i64 d16, d16, #63 -@ CHECK: vshl.u8 q8, q9, q8 @ encoding: [0xe2,0x04,0x40,0xff] +@ CHECK: vshl.u8 q8, q9, q8 @ encoding: [0x40,0xff,0xe2,0x04] vshl.u8 q8, q9, q8 -@ CHECK: vshl.u16 q8, q9, q8 @ encoding: [0xe2,0x04,0x50,0xff] +@ CHECK: vshl.u16 q8, q9, q8 @ encoding: [0x50,0xff,0xe2,0x04] vshl.u16 q8, q9, q8 -@ CHECK: vshl.u32 q8, q9, q8 @ encoding: [0xe2,0x04,0x60,0xff] +@ CHECK: vshl.u32 q8, q9, q8 @ encoding: [0x60,0xff,0xe2,0x04] vshl.u32 q8, q9, q8 -@ CHECK: vshl.u64 q8, q9, q8 @ encoding: [0xe2,0x04,0x70,0xff] +@ CHECK: vshl.u64 q8, q9, q8 @ encoding: [0x70,0xff,0xe2,0x04] vshl.u64 q8, q9, q8 -@ CHECK: vshl.i8 q8, q8, #7 @ encoding: [0x70,0x05,0xcf,0xef] +@ CHECK: vshl.i8 q8, q8, #7 @ encoding: [0xcf,0xef,0x70,0x05] vshl.i8 q8, q8, #7 -@ CHECK: vshl.i16 q8, q8, #15 @ encoding: [0x70,0x05,0xdf,0xef] +@ CHECK: vshl.i16 q8, q8, #15 @ encoding: [0xdf,0xef,0x70,0x05] vshl.i16 q8, q8, #15 -@ CHECK: vshl.i32 q8, q8, #31 @ encoding: [0x70,0x05,0xff,0xef] +@ CHECK: vshl.i32 q8, q8, #31 @ encoding: [0xff,0xef,0x70,0x05] vshl.i32 q8, q8, #31 -@ CHECK: vshl.i64 q8, q8, #63 @ encoding: [0xf0,0x05,0xff,0xef] +@ CHECK: vshl.i64 q8, q8, #63 @ encoding: [0xff,0xef,0xf0,0x05] vshl.i64 q8, q8, #63 -@ CHECK: vshr.u8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xff] +@ CHECK: vshr.u8 d16, d16, #8 @ encoding: [0xc8,0xff,0x30,0x00] vshr.u8 d16, d16, #8 -@ CHECK: vshr.u16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xff] +@ CHECK: vshr.u16 d16, d16, #16 @ encoding: [0xd0,0xff,0x30,0x00] vshr.u16 d16, d16, #16 -@ CHECK: vshr.u32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xff] +@ CHECK: vshr.u32 d16, d16, #32 @ encoding: [0xe0,0xff,0x30,0x00] vshr.u32 d16, d16, #32 -@ CHECK: vshr.u64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xff] +@ CHECK: vshr.u64 d16, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x00] vshr.u64 d16, d16, #64 -@ CHECK: vshr.u8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xff] +@ CHECK: vshr.u8 q8, q8, #8 @ encoding: [0xc8,0xff,0x70,0x00] vshr.u8 q8, q8, #8 -@ CHECK: vshr.u16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xff] +@ CHECK: vshr.u16 q8, q8, #16 @ encoding: [0xd0,0xff,0x70,0x00] vshr.u16 q8, q8, #16 -@ CHECK: vshr.u32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xff] +@ CHECK: vshr.u32 q8, q8, #32 @ encoding: [0xe0,0xff,0x70,0x00] vshr.u32 q8, q8, #32 -@ CHECK: vshr.u64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xff] +@ CHECK: vshr.u64 q8, q8, #64 @ encoding: [0xc0,0xff,0xf0,0x00] vshr.u64 q8, q8, #64 -@ CHECK: vshr.s8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xef] +@ CHECK: vshr.s8 d16, d16, #8 @ encoding: [0xc8,0xef,0x30,0x00] vshr.s8 d16, d16, #8 -@ CHECK: vshr.s16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xef] +@ CHECK: vshr.s16 d16, d16, #16 @ encoding: [0xd0,0xef,0x30,0x00] vshr.s16 d16, d16, #16 -@ CHECK: vshr.s32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xef] +@ CHECK: vshr.s32 d16, d16, #32 @ encoding: [0xe0,0xef,0x30,0x00] vshr.s32 d16, d16, #32 -@ CHECK: vshr.s64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xef] +@ CHECK: vshr.s64 d16, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x00] vshr.s64 d16, d16, #64 -@ CHECK: vshr.s8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xef] +@ CHECK: vshr.s8 q8, q8, #8 @ encoding: [0xc8,0xef,0x70,0x00] vshr.s8 q8, q8, #8 -@ CHECK: vshr.s16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xef] +@ CHECK: vshr.s16 q8, q8, #16 @ encoding: [0xd0,0xef,0x70,0x00] vshr.s16 q8, q8, #16 -@ CHECK: vshr.s32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xef] +@ CHECK: vshr.s32 q8, q8, #32 @ encoding: [0xe0,0xef,0x70,0x00] vshr.s32 q8, q8, #32 -@ CHECK: vshr.s64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xef] +@ CHECK: vshr.s64 q8, q8, #64 @ encoding: [0xc0,0xef,0xf0,0x00] vshr.s64 q8, q8, #64 -@ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xef] +@ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0xcf,0xef,0x30,0x0a] vshll.s8 q8, d16, #7 -@ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xef] +@ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0xdf,0xef,0x30,0x0a] vshll.s16 q8, d16, #15 -@ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xef] +@ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0xff,0xef,0x30,0x0a] vshll.s32 q8, d16, #31 -@ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xff] +@ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0xcf,0xff,0x30,0x0a] vshll.u8 q8, d16, #7 -@ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xff] +@ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0xdf,0xff,0x30,0x0a] vshll.u16 q8, d16, #15 -@ CHECK: vshll.u32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xff] +@ CHECK: vshll.u32 q8, d16, #31 @ encoding: [0xff,0xff,0x30,0x0a] vshll.u32 q8, d16, #31 -@ CHECK: vshll.i8 q8, d16, #8 @ encoding: [0x20,0x03,0xf2,0xff] +@ CHECK: vshll.i8 q8, d16, #8 @ encoding: [0xf2,0xff,0x20,0x03] vshll.i8 q8, d16, #8 -@ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0x20,0x03,0xf6,0xff] +@ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0xf6,0xff,0x20,0x03] vshll.i16 q8, d16, #16 -@ CHECK: vshll.i32 q8, d16, #32 @ encoding: [0x20,0x03,0xfa,0xff] +@ CHECK: vshll.i32 q8, d16, #32 @ encoding: [0xfa,0xff,0x20,0x03] vshll.i32 q8, d16, #32 -@ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xef] +@ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0xc8,0xef,0x30,0x08] vshrn.i16 d16, q8, #8 -@ CHECK: vshrn.i32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xef] +@ CHECK: vshrn.i32 d16, q8, #16 @ encoding: [0xd0,0xef,0x30,0x08] vshrn.i32 d16, q8, #16 -@ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xef] +@ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x30,0x08] vshrn.i64 d16, q8, #32 -@ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xef] +@ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0x40,0xef,0xa1,0x05] vrshl.s8 d16, d17, d16 -@ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xef] +@ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0x50,0xef,0xa1,0x05] vrshl.s16 d16, d17, d16 -@ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xef] +@ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0x60,0xef,0xa1,0x05] vrshl.s32 d16, d17, d16 -@ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0 +@ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0x70,0xef,0xa1,0x05] vrshl.s64 d16, d17, d16 -@ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xff] +@ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x05] vrshl.u8 d16, d17, d16 -@ CHECK: vrshl.u16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xff] +@ CHECK: vrshl.u16 d16, d17, d16 @ encoding: [0x50,0xff,0xa1,0x05] vrshl.u16 d16, d17, d16 -@ CHECK: vrshl.u32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xff] +@ CHECK: vrshl.u32 d16, d17, d16 @ encoding: [0x60,0xff,0xa1,0x05] vrshl.u32 d16, d17, d16 -@ CHECK: vrshl.u64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xff] +@ CHECK: vrshl.u64 d16, d17, d16 @ encoding: [0x70,0xff,0xa1,0x05] vrshl.u64 d16, d17, d16 -@ CHECK: vrshl.s8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xef] +@ CHECK: vrshl.s8 q8, q9, q8 @ encoding: [0x40,0xef,0xe2,0x05] vrshl.s8 q8, q9, q8 -@ CHECK: vrshl.s16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xef] +@ CHECK: vrshl.s16 q8, q9, q8 @ encoding: [0x50,0xef,0xe2,0x05] vrshl.s16 q8, q9, q8 -@ CHECK: vrshl.s32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xef] +@ CHECK: vrshl.s32 q8, q9, q8 @ encoding: [0x60,0xef,0xe2,0x05] vrshl.s32 q8, q9, q8 -@ CHECK: vrshl.s64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xef] +@ CHECK: vrshl.s64 q8, q9, q8 @ encoding: [0x70,0xef,0xe2,0x05] vrshl.s64 q8, q9, q8 -@ CHECK: vrshl.u8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xff] +@ CHECK: vrshl.u8 q8, q9, q8 @ encoding: [0x40,0xff,0xe2,0x05] vrshl.u8 q8, q9, q8 -@ CHECK: vrshl.u16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xff] +@ CHECK: vrshl.u16 q8, q9, q8 @ encoding: [0x50,0xff,0xe2,0x05] vrshl.u16 q8, q9, q8 -@ CHECK: vrshl.u32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xff] +@ CHECK: vrshl.u32 q8, q9, q8 @ encoding: [0x60,0xff,0xe2,0x05] vrshl.u32 q8, q9, q8 -@ CHECK: vrshl.u64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xff] +@ CHECK: vrshl.u64 q8, q9, q8 @ encoding: [0x70,0xff,0xe2,0x05] vrshl.u64 q8, q9, q8 -@ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xef] +@ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0xc8,0xef,0x30,0x02] vrshr.s8 d16, d16, #8 -@ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xef] +@ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0xd0,0xef,0x30,0x02] vrshr.s16 d16, d16, #16 -@ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xef] +@ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0xe0,0xef,0x30,0x02] vrshr.s32 d16, d16, #32 -@ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xef] +@ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x02] vrshr.s64 d16, d16, #64 -@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xff] +@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0xc8,0xff,0x30,0x02] vrshr.u8 d16, d16, #8 -@ CHECK: vrshr.u16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xff] +@ CHECK: vrshr.u16 d16, d16, #16 @ encoding: [0xd0,0xff,0x30,0x02] vrshr.u16 d16, d16, #16 -@ CHECK: vrshr.u32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xff] +@ CHECK: vrshr.u32 d16, d16, #32 @ encoding: [0xe0,0xff,0x30,0x02] vrshr.u32 d16, d16, #32 -@ CHECK: vrshr.u64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xff] +@ CHECK: vrshr.u64 d16, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x02] vrshr.u64 d16, d16, #64 -@ CHECK: vrshr.s8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xef] +@ CHECK: vrshr.s8 q8, q8, #8 @ encoding: [0xc8,0xef,0x70,0x02] vrshr.s8 q8, q8, #8 -@ CHECK: vrshr.s16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xef] +@ CHECK: vrshr.s16 q8, q8, #16 @ encoding: [0xd0,0xef,0x70,0x02] vrshr.s16 q8, q8, #16 -@ CHECK: vrshr.s32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xef] +@ CHECK: vrshr.s32 q8, q8, #32 @ encoding: [0xe0,0xef,0x70,0x02] vrshr.s32 q8, q8, #32 -@ CHECK: vrshr.s64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xef] +@ CHECK: vrshr.s64 q8, q8, #64 @ encoding: [0xc0,0xef,0xf0,0x02] vrshr.s64 q8, q8, #64 -@ CHECK: vrshr.u8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xff] +@ CHECK: vrshr.u8 q8, q8, #8 @ encoding: [0xc8,0xff,0x70,0x02] vrshr.u8 q8, q8, #8 -@ CHECK: vrshr.u16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xff] +@ CHECK: vrshr.u16 q8, q8, #16 @ encoding: [0xd0,0xff,0x70,0x02] vrshr.u16 q8, q8, #16 -@ CHECK: vrshr.u32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xff] +@ CHECK: vrshr.u32 q8, q8, #32 @ encoding: [0xe0,0xff,0x70,0x02] vrshr.u32 q8, q8, #32 -@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xff] +@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xc0,0xff,0xf0,0x02] vrshr.u64 q8, q8, #64 -@ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xef] +@ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0xc8,0xef,0x70,0x08] vrshrn.i16 d16, q8, #8 -@ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xef] +@ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0xd0,0xef,0x70,0x08] vrshrn.i32 d16, q8, #16 -@ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xef] +@ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x70,0x08] vrshrn.i64 d16, q8, #32 diff --git a/test/MC/ARM/neont2-shiftaccum-encoding.s b/test/MC/ARM/neont2-shiftaccum-encoding.s index 15b263a..a3a18fc 100644 --- a/test/MC/ARM/neont2-shiftaccum-encoding.s +++ b/test/MC/ARM/neont2-shiftaccum-encoding.s @@ -1,100 +1,100 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xef] +@ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0xc8,0xef,0x30,0x11] vsra.s8 d17, d16, #8 -@ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xef] +@ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0xd0,0xef,0x30,0x11] vsra.s16 d17, d16, #16 -@ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xef] +@ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0xe0,0xef,0x30,0x11] vsra.s32 d17, d16, #32 -@ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xef] +@ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x11] vsra.s64 d17, d16, #64 -@ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xef] +@ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0xc8,0xef,0x72,0x01] vsra.s8 q8, q9, #8 -@ CHECK: vsra.s16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xef] +@ CHECK: vsra.s16 q8, q9, #16 @ encoding: [0xd0,0xef,0x72,0x01] vsra.s16 q8, q9, #16 -@ CHECK: vsra.s32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xef] +@ CHECK: vsra.s32 q8, q9, #32 @ encoding: [0xe0,0xef,0x72,0x01] vsra.s32 q8, q9, #32 -@ CHECK: vsra.s64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xef] +@ CHECK: vsra.s64 q8, q9, #64 @ encoding: [0xc0,0xef,0xf2,0x01] vsra.s64 q8, q9, #64 -@ CHECK: vsra.u8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xff] +@ CHECK: vsra.u8 d17, d16, #8 @ encoding: [0xc8,0xff,0x30,0x11] vsra.u8 d17, d16, #8 -@ CHECK: vsra.u16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xff] +@ CHECK: vsra.u16 d17, d16, #16 @ encoding: [0xd0,0xff,0x30,0x11] vsra.u16 d17, d16, #16 -@ CHECK: vsra.u32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xff] +@ CHECK: vsra.u32 d17, d16, #32 @ encoding: [0xe0,0xff,0x30,0x11] vsra.u32 d17, d16, #32 -@ CHECK: vsra.u64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xff] +@ CHECK: vsra.u64 d17, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x11] vsra.u64 d17, d16, #64 -@ CHECK: vsra.u8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xff] +@ CHECK: vsra.u8 q8, q9, #8 @ encoding: [0xc8,0xff,0x72,0x01] vsra.u8 q8, q9, #8 -@ CHECK: vsra.u16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xff] +@ CHECK: vsra.u16 q8, q9, #16 @ encoding: [0xd0,0xff,0x72,0x01] vsra.u16 q8, q9, #16 -@ CHECK: vsra.u32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xff] +@ CHECK: vsra.u32 q8, q9, #32 @ encoding: [0xe0,0xff,0x72,0x01] vsra.u32 q8, q9, #32 -@ CHECK: vsra.u64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xff] +@ CHECK: vsra.u64 q8, q9, #64 @ encoding: [0xc0,0xff,0xf2,0x01] vsra.u64 q8, q9, #64 -@ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xef] +@ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0xc8,0xef,0x30,0x13] vrsra.s8 d17, d16, #8 -@ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xef] +@ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0xd0,0xef,0x30,0x13] vrsra.s16 d17, d16, #16 -@ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xef] +@ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0xe0,0xef,0x30,0x13] vrsra.s32 d17, d16, #32 -@ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xef] +@ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x13] vrsra.s64 d17, d16, #64 -@ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xff] +@ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0xc8,0xff,0x30,0x13] vrsra.u8 d17, d16, #8 -@ CHECK: vrsra.u16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xff] +@ CHECK: vrsra.u16 d17, d16, #16 @ encoding: [0xd0,0xff,0x30,0x13] vrsra.u16 d17, d16, #16 -@ CHECK: vrsra.u32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xff] +@ CHECK: vrsra.u32 d17, d16, #32 @ encoding: [0xe0,0xff,0x30,0x13] vrsra.u32 d17, d16, #32 -@ CHECK: vrsra.u64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xff] +@ CHECK: vrsra.u64 d17, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x13] vrsra.u64 d17, d16, #64 -@ CHECK: vrsra.s8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xef] +@ CHECK: vrsra.s8 q8, q9, #8 @ encoding: [0xc8,0xef,0x72,0x03] vrsra.s8 q8, q9, #8 -@ CHECK: vrsra.s16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xef] +@ CHECK: vrsra.s16 q8, q9, #16 @ encoding: [0xd0,0xef,0x72,0x03] vrsra.s16 q8, q9, #16 -@ CHECK: vrsra.s32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xef] +@ CHECK: vrsra.s32 q8, q9, #32 @ encoding: [0xe0,0xef,0x72,0x03] vrsra.s32 q8, q9, #32 -@ CHECK: vrsra.s64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xef] +@ CHECK: vrsra.s64 q8, q9, #64 @ encoding: [0xc0,0xef,0xf2,0x03] vrsra.s64 q8, q9, #64 -@ CHECK: vrsra.u8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xff] +@ CHECK: vrsra.u8 q8, q9, #8 @ encoding: [0xc8,0xff,0x72,0x03] vrsra.u8 q8, q9, #8 -@ CHECK: vrsra.u16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xff] +@ CHECK: vrsra.u16 q8, q9, #16 @ encoding: [0xd0,0xff,0x72,0x03] vrsra.u16 q8, q9, #16 -@ CHECK: vrsra.u32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xff] +@ CHECK: vrsra.u32 q8, q9, #32 @ encoding: [0xe0,0xff,0x72,0x03] vrsra.u32 q8, q9, #32 -@ CHECK: vrsra.u64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xff] +@ CHECK: vrsra.u64 q8, q9, #64 @ encoding: [0xc0,0xff,0xf2,0x03] vrsra.u64 q8, q9, #64 -@ CHECK: vsli.8 d17, d16, #7 @ encoding: [0x30,0x15,0xcf,0xff] +@ CHECK: vsli.8 d17, d16, #7 @ encoding: [0xcf,0xff,0x30,0x15] vsli.8 d17, d16, #7 -@ CHECK: vsli.16 d17, d16, #15 @ encoding: [0x30,0x15,0xdf,0xff] +@ CHECK: vsli.16 d17, d16, #15 @ encoding: [0xdf,0xff,0x30,0x15] vsli.16 d17, d16, #15 -@ CHECK: vsli.32 d17, d16, #31 @ encoding: [0x30,0x15,0xff,0xff] +@ CHECK: vsli.32 d17, d16, #31 @ encoding: [0xff,0xff,0x30,0x15] vsli.32 d17, d16, #31 -@ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xb0,0x15,0xff,0xff] +@ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xff,0xff,0xb0,0x15] vsli.64 d17, d16, #63 -@ CHECK: vsli.8 q9, q8, #7 @ encoding: [0x70,0x25,0xcf,0xff] +@ CHECK: vsli.8 q9, q8, #7 @ encoding: [0xcf,0xff,0x70,0x25] vsli.8 q9, q8, #7 -@ CHECK: vsli.16 q9, q8, #15 @ encoding: [0x70,0x25,0xdf,0xff] +@ CHECK: vsli.16 q9, q8, #15 @ encoding: [0xdf,0xff,0x70,0x25] vsli.16 q9, q8, #15 -@ CHECK: vsli.32 q9, q8, #31 @ encoding: [0x70,0x25,0xff,0xff] +@ CHECK: vsli.32 q9, q8, #31 @ encoding: [0xff,0xff,0x70,0x25] vsli.32 q9, q8, #31 -@ CHECK: vsli.64 q9, q8, #63 @ encoding: [0xf0,0x25,0xff,0xff] +@ CHECK: vsli.64 q9, q8, #63 @ encoding: [0xff,0xff,0xf0,0x25] vsli.64 q9, q8, #63 -@ CHECK: vsri.8 d17, d16, #8 @ encoding: [0x30,0x14,0xc8,0xff] +@ CHECK: vsri.8 d17, d16, #8 @ encoding: [0xc8,0xff,0x30,0x14] vsri.8 d17, d16, #8 -@ CHECK: vsri.16 d17, d16, #16 @ encoding: [0x30,0x14,0xd0,0xff] +@ CHECK: vsri.16 d17, d16, #16 @ encoding: [0xd0,0xff,0x30,0x14] vsri.16 d17, d16, #16 -@ CHECK: vsri.32 d17, d16, #32 @ encoding: [0x30,0x14,0xe0,0xff] +@ CHECK: vsri.32 d17, d16, #32 @ encoding: [0xe0,0xff,0x30,0x14] vsri.32 d17, d16, #32 -@ CHECK: vsri.64 d17, d16, #64 @ encoding: [0xb0,0x14,0xc0,0xff] +@ CHECK: vsri.64 d17, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x14] vsri.64 d17, d16, #64 -@ CHECK: vsri.8 q9, q8, #8 @ encoding: [0x70,0x24,0xc8,0xff] +@ CHECK: vsri.8 q9, q8, #8 @ encoding: [0xc8,0xff,0x70,0x24] vsri.8 q9, q8, #8 -@ CHECK: vsri.16 q9, q8, #16 @ encoding: [0x70,0x24,0xd0,0xff] +@ CHECK: vsri.16 q9, q8, #16 @ encoding: [0xd0,0xff,0x70,0x24] vsri.16 q9, q8, #16 -@ CHECK: vsri.32 q9, q8, #32 @ encoding: [0x70,0x24,0xe0,0xff] +@ CHECK: vsri.32 q9, q8, #32 @ encoding: [0xe0,0xff,0x70,0x24] vsri.32 q9, q8, #32 -@ CHECK: vsri.64 q9, q8, #64 @ encoding: [0xf0,0x24,0xc0,0xff] +@ CHECK: vsri.64 q9, q8, #64 @ encoding: [0xc0,0xff,0xf0,0x24] vsri.64 q9, q8, #64 diff --git a/test/MC/ARM/neont2-shuffle-encoding.s b/test/MC/ARM/neont2-shuffle-encoding.s index 5a2e52f..f471a2b 100644 --- a/test/MC/ARM/neont2-shuffle-encoding.s +++ b/test/MC/ARM/neont2-shuffle-encoding.s @@ -1,48 +1,48 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 -@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xa0,0x03,0xf1,0xef] +@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xf1,0xef,0xa0,0x03] vext.8 d16, d17, d16, #3 -@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xa0,0x05,0xf1,0xef] +@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xf1,0xef,0xa0,0x05] vext.8 d16, d17, d16, #5 -@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xe0,0x03,0xf2,0xef] +@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xf2,0xef,0xe0,0x03] vext.8 q8, q9, q8, #3 -@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xe0,0x07,0xf2,0xef] +@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xf2,0xef,0xe0,0x07] vext.8 q8, q9, q8, #7 -@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xa0,0x06,0xf1,0xef] +@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xf1,0xef,0xa0,0x06] vext.16 d16, d17, d16, #3 -@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xe0,0x0c,0xf2,0xef] +@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xf2,0xef,0xe0,0x0c] vext.32 q8, q9, q8, #3 -@ CHECK: vtrn.8 d17, d16 @ encoding: [0xa0,0x10,0xf2,0xff] +@ CHECK: vtrn.8 d17, d16 @ encoding: [0xf2,0xff,0xa0,0x10] vtrn.8 d17, d16 -@ CHECK: vtrn.16 d17, d16 @ encoding: [0xa0,0x10,0xf6,0xff] +@ CHECK: vtrn.16 d17, d16 @ encoding: [0xf6,0xff,0xa0,0x10] vtrn.16 d17, d16 -@ CHECK: vtrn.32 d17, d16 @ encoding: [0xa0,0x10,0xfa,0xff] +@ CHECK: vtrn.32 d17, d16 @ encoding: [0xfa,0xff,0xa0,0x10] vtrn.32 d17, d16 -@ CHECK: vtrn.8 q9, q8 @ encoding: [0xe0,0x20,0xf2,0xff] +@ CHECK: vtrn.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x20] vtrn.8 q9, q8 -@ CHECK: vtrn.16 q9, q8 @ encoding: [0xe0,0x20,0xf6,0xff] +@ CHECK: vtrn.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x20] vtrn.16 q9, q8 -@ CHECK: vtrn.32 q9, q8 @ encoding: [0xe0,0x20,0xfa,0xff] +@ CHECK: vtrn.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x20] vtrn.32 q9, q8 -@ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xff] +@ CHECK: vuzp.8 d17, d16 @ encoding: [0xf2,0xff,0x20,0x11] vuzp.8 d17, d16 -@ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xff] +@ CHECK: vuzp.16 d17, d16 @ encoding: [0xf6,0xff,0x20,0x11] vuzp.16 d17, d16 -@ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xff] +@ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21] vuzp.8 q9, q8 -@ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xff] +@ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21] vuzp.16 q9, q8 -@ CHECK: vuzp.32 q9, q8 @ encoding: [0x60,0x21,0xfa,0xff] +@ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21] vuzp.32 q9, q8 -@ CHECK: vzip.8 d17, d16 @ encoding: [0xa0,0x11,0xf2,0xff] +@ CHECK: vzip.8 d17, d16 @ encoding: [0xf2,0xff,0xa0,0x11] vzip.8 d17, d16 -@ CHECK: vzip.16 d17, d16 @ encoding: [0xa0,0x11,0xf6,0xff] +@ CHECK: vzip.16 d17, d16 @ encoding: [0xf6,0xff,0xa0,0x11] vzip.16 d17, d16 -@ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xff] +@ CHECK: vzip.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x21] vzip.8 q9, q8 -@ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xff] +@ CHECK: vzip.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x21] vzip.16 q9, q8 -@ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xff] +@ CHECK: vzip.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x21] vzip.32 q9, q8 diff --git a/test/MC/ARM/neont2-sub-encoding.s b/test/MC/ARM/neont2-sub-encoding.s index 928d0f3..fa9d145 100644 --- a/test/MC/ARM/neont2-sub-encoding.s +++ b/test/MC/ARM/neont2-sub-encoding.s @@ -1,46 +1,46 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s -@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xa0,0x03,0xf1,0xef] +@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xf1,0xef,0xa0,0x03] vext.8 d16, d17, d16, #3 -@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xa0,0x05,0xf1,0xef] +@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xf1,0xef,0xa0,0x05] vext.8 d16, d17, d16, #5 -@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xe0,0x03,0xf2,0xef] +@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xf2,0xef,0xe0,0x03] vext.8 q8, q9, q8, #3 -@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xe0,0x07,0xf2,0xef] +@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xf2,0xef,0xe0,0x07] vext.8 q8, q9, q8, #7 -@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xa0,0x06,0xf1,0xef] +@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xf1,0xef,0xa0,0x06] vext.16 d16, d17, d16, #3 -@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xe0,0x0c,0xf2,0xef] +@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xf2,0xef,0xe0,0x0c] vext.32 q8, q9, q8, #3 -@ CHECK: vtrn.8 d17, d16 @ encoding: [0xa0,0x10,0xf2,0xff] +@ CHECK: vtrn.8 d17, d16 @ encoding: [0xf2,0xff,0xa0,0x10] vtrn.8 d17, d16 -@ CHECK: vtrn.16 d17, d16 @ encoding: [0xa0,0x10,0xf6,0xff] +@ CHECK: vtrn.16 d17, d16 @ encoding: [0xf6,0xff,0xa0,0x10] vtrn.16 d17, d16 -@ CHECK: vtrn.32 d17, d16 @ encoding: [0xa0,0x10,0xfa,0xff] +@ CHECK: vtrn.32 d17, d16 @ encoding: [0xfa,0xff,0xa0,0x10] vtrn.32 d17, d16 -@ CHECK: vtrn.8 q9, q8 @ encoding: [0xe0,0x20,0xf2,0xff] +@ CHECK: vtrn.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x20] vtrn.8 q9, q8 -@ CHECK: vtrn.16 q9, q8 @ encoding: [0xe0,0x20,0xf6,0xff] +@ CHECK: vtrn.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x20] vtrn.16 q9, q8 -@ CHECK: vtrn.32 q9, q8 @ encoding: [0xe0,0x20,0xfa,0xff] +@ CHECK: vtrn.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x20] vtrn.32 q9, q8 -@ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xff] +@ CHECK: vuzp.8 d17, d16 @ encoding: [0xf2,0xff,0x20,0x11] vuzp.8 d17, d16 -@ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xff] +@ CHECK: vuzp.16 d17, d16 @ encoding: [0xf6,0xff,0x20,0x11] vuzp.16 d17, d16 -@ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xff] +@ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21] vuzp.8 q9, q8 -@ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xff] +@ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21] vuzp.16 q9, q8 -@ CHECK: vuzp.32 q9, q8 @ encoding: [0x60,0x21,0xfa,0xff] +@ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21] vuzp.32 q9, q8 -@ CHECK: vzip.8 d17, d16 @ encoding: [0xa0,0x11,0xf2,0xff] +@ CHECK: vzip.8 d17, d16 @ encoding: [0xf2,0xff,0xa0,0x11] vzip.8 d17, d16 -@ CHECK: vzip.16 d17, d16 @ encoding: [0xa0,0x11,0xf6,0xff] +@ CHECK: vzip.16 d17, d16 @ encoding: [0xf6,0xff,0xa0,0x11] vzip.16 d17, d16 -@ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xff] +@ CHECK: vzip.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x21] vzip.8 q9, q8 -@ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xff] +@ CHECK: vzip.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x21] vzip.16 q9, q8 -@ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xff] +@ CHECK: vzip.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x21] vzip.32 q9, q8 diff --git a/test/MC/ARM/neont2-table-encoding.s b/test/MC/ARM/neont2-table-encoding.s index 3589f2f..46fb934 100644 --- a/test/MC/ARM/neont2-table-encoding.s +++ b/test/MC/ARM/neont2-table-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s @ XFAIL: * .code 16 diff --git a/test/MC/ARM/prefetch.ll b/test/MC/ARM/prefetch.ll new file mode 100644 index 0000000..674b8f3 --- /dev/null +++ b/test/MC/ARM/prefetch.ll @@ -0,0 +1,58 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin -mattr=+v7a,+mp -show-mc-encoding | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+v7a -show-mc-encoding | FileCheck %s -check-prefix=T2 +; rdar://8924681 + +define void @t1(i8* %ptr) nounwind { +entry: +; ARM: t1: +; ARM: pldw [r0] @ encoding: [0x00,0xf0,0x90,0xf5] +; ARM: pld [r0] @ encoding: [0x00,0xf0,0xd0,0xf5] + +; T2: t1: +; T2: pld [r0] @ encoding: [0x90,0xf8,0x00,0xf0] + tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) + ret void +} + +define void @t2(i8* %ptr) nounwind { +entry: +; ARM: t2: +; ARM: pld [r0, #1023] @ encoding: [0xff,0xf3,0xd0,0xf5] + +; T2: t2: +; T2: pld [r0, #1023] @ encoding: [0x90,0xf8,0xff,0xf3] + %tmp = getelementptr i8* %ptr, i32 1023 + tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 ) + ret void +} + +define void @t3(i32 %base, i32 %offset) nounwind { +entry: +; ARM: t3: +; ARM: pld [r0, r1, lsr #2] @ encoding: [0x21,0xf1,0xd0,0xf7] + +; T2: t3: +; T2: pld [r0, r1] @ encoding: [0x10,0xf8,0x01,0xf0] + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +define void @t4(i32 %base, i32 %offset) nounwind { +entry: +; ARM: t4: +; ARM: pld [r0, r1, lsl #2] @ encoding: [0x01,0xf1,0xd0,0xf7] + +; T2: t4: +; T2: pld [r0, r1, lsl #2] @ encoding: [0x10,0xf8,0x21,0xf0] + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +declare void @llvm.prefetch(i8*, i32, i32) nounwind diff --git a/test/MC/ARM/reg-list.s b/test/MC/ARM/reg-list.s new file mode 100644 index 0000000..4dd392e --- /dev/null +++ b/test/MC/ARM/reg-list.s @@ -0,0 +1,8 @@ +@ RUN: llvm-mc -triple thumb-apple-darwin10 -show-encoding < %s 2> %t | FileCheck %s +@ RUN: FileCheck --check-prefix=CHECK-WARNINGS < %t %s + + push {r7, lr} +@ CHECK-WARNINGS: register not in ascending order in register list + + push {lr, r7} +@ CHECK: push {lr, r7} diff --git a/test/MC/ARM/simple-encoding.ll b/test/MC/ARM/simple-encoding.ll index f279bda..0877e8e 100644 --- a/test/MC/ARM/simple-encoding.ll +++ b/test/MC/ARM/simple-encoding.ll @@ -12,7 +12,7 @@ declare i32 @llvm.ctlz.i32(i32) define i32 @foo(i32 %a, i32 %b) { ; CHECK: foo -; CHECK: trap @ encoding: [0xf0,0x00,0xf0,0x07] +; CHECK: trap @ encoding: [0xfe,0xde,0xff,0xe7] ; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] tail call void @llvm.trap() diff --git a/test/MC/ARM/simple-fp-encoding.s b/test/MC/ARM/simple-fp-encoding.s index 9120fcf..8917380 100644 --- a/test/MC/ARM/simple-fp-encoding.s +++ b/test/MC/ARM/simple-fp-encoding.s @@ -127,9 +127,17 @@ @ CHECK: vmrs r0, fpscr @ encoding: [0x10,0x0a,0xf1,0xee] vmrs r0, fpscr +@ CHECK: vmrs r0, fpexc @ encoding: [0x10,0x0a,0xf8,0xee] + vmrs r0, fpexc +@ CHECK: vmrs r0, fpsid @ encoding: [0x10,0x0a,0xf0,0xee] + vmrs r0, fpsid @ CHECK: vmsr fpscr, r0 @ encoding: [0x10,0x0a,0xe1,0xee] vmsr fpscr, r0 +@ CHECK: vmsr fpexc, r0 @ encoding: [0x10,0x0a,0xe8,0xee] + vmsr fpexc, r0 +@ CHECK: vmsr fpsid, r0 @ encoding: [0x10,0x0a,0xe0,0xee] + vmsr fpsid, r0 @ FIXME: vmov.f64 d16, #3.000000e+00 @ encoding: [0x08,0x0b,0xf0,0xee] @ vmov.f64 d16, #3.000000e+00 @@ -207,3 +215,22 @@ vstr.32 s4, [r1] vstr.32 s4, [r1, #24] vstr.32 s4, [r1, #-24] + +@ CHECK: vldmia r1, {d2, d3, d4, d5, d6, d7} @ encoding: [0x0c,0x2b,0x91,0xec] +@ CHECK: vldmia r1, {s2, s3, s4, s5, s6, s7} @ encoding: [0x06,0x1a,0x91,0xec] + vldmia r1, {d2,d3-d6,d7} + vldmia r1, {s2,s3-s6,s7} + +@ CHECK: vstmia r1, {d2, d3, d4, d5, d6, d7} @ encoding: [0x0c,0x2b,0x81,0xec] +@ CHECK: vstmia r1, {s2, s3, s4, s5, s6, s7} @ encoding: [0x06,0x1a,0x81,0xec] + vstmia r1, {d2,d3-d6,d7} + vstmia r1, {s2,s3-s6,s7} + +@ CHECK: vcvtr.s32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbd,0xee] +@ CHECK: vcvtr.s32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbd,0xee] +@ CHECK: vcvtr.u32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbc,0xee] +@ CHECK: vcvtr.u32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbc,0xee] + vcvtr.s32.f64 s0, d0 + vcvtr.s32.f32 s0, s1 + vcvtr.u32.f64 s0, d0 + vcvtr.u32.f32 s0, s1 diff --git a/test/MC/ARM/thumb.s b/test/MC/ARM/thumb.s new file mode 100644 index 0000000..342a390 --- /dev/null +++ b/test/MC/ARM/thumb.s @@ -0,0 +1,70 @@ +@ RUN: llvm-mc -triple thumbv6-apple-darwin -show-encoding < %s | FileCheck %s + .code 16 + +@ CHECK: cmp r1, r2 @ encoding: [0x91,0x42] + cmp r1, r2 + +@ CHECK: pop {r1, r2, r4} @ encoding: [0x16,0xbc] + pop {r1, r2, r4} + +@ CHECK: trap @ encoding: [0xfe,0xde] + trap + +@ CHECK: blx r9 @ encoding: [0xc8,0x47] + blx r9 + +@ CHECK: rev r2, r3 @ encoding: [0x1a,0xba] +@ CHECK: rev16 r3, r4 @ encoding: [0x63,0xba] +@ CHECK: revsh r5, r6 @ encoding: [0xf5,0xba] + rev r2, r3 + rev16 r3, r4 + revsh r5, r6 + +@ CHECK: sxtb r2, r3 @ encoding: [0x5a,0xb2] +@ CHECK: sxth r2, r3 @ encoding: [0x1a,0xb2] + sxtb r2, r3 + sxth r2, r3 + +@ CHECK: tst r4, r5 @ encoding: [0x2c,0x42] + tst r4, r5 + +@ CHECK: uxtb r3, r6 @ encoding: [0xf3,0xb2] +@ CHECK: uxth r3, r6 @ encoding: [0xb3,0xb2] + uxtb r3, r6 + uxth r3, r6 + +@ CHECK: ldr r3, [r1, r2] @ encoding: [0x8b,0x58] + ldr r3, [r1, r2] + +@ CHECK: bkpt #2 @ encoding: [0x02,0xbe] + bkpt #2 + +@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xee,0x91,0x57] + mcr p7, #1, r5, c1, c1, #4 + +@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xee,0x92,0x1e] + mrc p14, #0, r1, c1, c2, #4 + +@ CHECK: mcrr p7, #1, r5, r4, c1 @ encoding: [0x44,0xec,0x11,0x57] + mcrr p7, #1, r5, r4, c1 + +@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57] + mrrc p7, #1, r5, r4, c1 + +@ CHECK: cdp p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xee,0x81,0x17] + cdp p7, #1, c1, c1, c1, #4 + +@ CHECK: nop @ encoding: [0x00,0xbf] + nop + +@ CHECK: yield @ encoding: [0x10,0xbf] + yield + +@ CHECK: wfe @ encoding: [0x20,0xbf] + wfe + +@ CHECK: wfi @ encoding: [0x30,0xbf] + wfi + +@ CHECK: cpsie aif @ encoding: [0x67,0xb6] + cpsie aif diff --git a/test/MC/ARM/thumb2.s b/test/MC/ARM/thumb2.s index fbdd140..cd09311 100644 --- a/test/MC/ARM/thumb2.s +++ b/test/MC/ARM/thumb2.s @@ -48,3 +48,239 @@ movt r1, #4267 @ CHECK: mov.w r0, #66846720 @ encoding: [0x7f,0x70,0x4f,0xf0] mov.w r0, #66846720 + +@ CHECK: rrx r0, r0 @ encoding: [0x30,0x00,0x4f,0xea] + rrx r0, r0 + +@ CHECK: bfc r0, #4, #20 @ encoding: [0x17,0x10,0x6f,0xf3] + bfc r0, #4, #20 +@ CHECK: bfc r0, #0, #23 @ encoding: [0x16,0x00,0x6f,0xf3] + bfc r0, #0, #23 +@ CHECK: bfc r0, #12, #20 @ encoding: [0x1f,0x30,0x6f,0xf3] + bfc r0, #12, #20 + +@ CHECK: sbfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0x40,0xf3] + sbfx r0, r0, #7, #11 +@ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3] + ubfx r0, r0, #7, #11 + +@ CHECK: mla r0, r0, r1, r2 @ encoding: [0x01,0x20,0x00,0xfb] + mla r0, r0, r1, r2 +@ CHECK: mls r0, r0, r1, r2 @ encoding: [0x11,0x20,0x00,0xfb] + mls r0, r0, r1, r2 + +@ CHECK: smlabt r0, r1, r2, r0 @ encoding: [0x12,0x00,0x11,0xfb] + smlabt r0, r1, r2, r0 + +@ CHECK: clz r0, r0 @ encoding: [0x80,0xf0,0xb0,0xfa] + clz r0, r0 + +@ CHECK: pkhbt r0, r0, r1, lsl #16 @ encoding: [0x01,0x40,0xc0,0xea] + pkhbt r0, r0, r1, lsl #16 +@ CHECK: pkhbt r0, r0, r1, lsl #12 @ encoding: [0x01,0x30,0xc0,0xea] + pkhbt r0, r0, r1, lsl #16 +@ CHECK: pkhbt r0, r0, r1, lsl #18 @ encoding: [0x81,0x40,0xc0,0xea] + pkhbt r0, r0, r1, lsl #18 +@ CHECK: pkhbt r0, r0, r1 @ encoding: [0x01,0x00,0xc0,0xea] + pkhbt r0, r0, r1 +@ CHECK: pkhtb r0, r0, r1, asr #16 @ encoding: [0x21,0x40,0xc0,0xea] + pkhtb r0, r0, r1, asr #16 +@ CHECK: pkhtb r0, r0, r1, asr #12 @ encoding: [0x21,0x30,0xc0,0xea] + pkhtb r0, r0, r1, asr #12 +@ CHECK: pkhtb r0, r0, r1, asr #18 @ encoding: [0xa1,0x40,0xc0,0xea] + pkhtb r0, r0, r1, asr #18 +@ CHECK: pkhtb r0, r0, r1, asr #22 @ encoding: [0xa1,0x50,0xc0,0xea] + pkhtb r0, r0, r1, asr #22 + +@ CHECK: str.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0xc1,0xf8] + str.w r0, [r1, #4092] +@ CHECK: str r0, [r1, #-128] @ encoding: [0x80,0x0c,0x41,0xf8] + str r0, [r1, #-128] +@ CHECK: str.w r0, [r1, r2, lsl #2] @ encoding: [0x22,0x00,0x41,0xf8 + str.w r0, [r1, r2, lsl #2] + +@ CHECK: ldr.w r0, [r0, #4092] @ encoding: [0xfc,0x0f,0xd0,0xf8] + ldr.w r0, [r0, #4092] +@ CHECK: ldr r0, [r0, #-128] @ encoding: [0x80,0x0c,0x50,0xf8] + ldr r0, [r0, #-128] +@ CHECK: ldr.w r0, [r0, r1, lsl #2] @ encoding: [0x21,0x00,0x50,0xf8] + ldr.w r0, [r0, r1, lsl #2] + +@ CHECK: str r1, [r0, #16]! @ encoding: [0x10,0x1f,0x40,0xf8] + str r1, [r0, #16]! +@ CHECK: strh r1, [r0, #8]! @ encoding: [0x08,0x1f,0x20,0xf8] + strh r1, [r0, #8]! +@ CHECK: strh r2, [r0], #-4 @ encoding: [0x04,0x29,0x20,0xf8] + strh r2, [r0], #-4 +@ CHECK: str r2, [r0], #-4 @ encoding: [0x04,0x29,0x40,0xf8] + str r2, [r0], #-4 + +@ CHECK: ldr r2, [r0, #16]! @ encoding: [0x10,0x2f,0x50,0xf8] + ldr r2, [r0, #16]! +@ CHECK: ldr r2, [r0, #-64]! @ encoding: [0x40,0x2d,0x50,0xf8] + ldr r2, [r0, #-64]! +@ CHECK: ldrsb r2, [r0, #4]! @ encoding: [0x04,0x2f,0x10,0xf9] + ldrsb r2, [r0, #4]! + +@ CHECK: strb.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0x81,0xf8] + strb.w r0, [r1, #4092] +@ CHECK: strb r0, [r1, #-128] @ encoding: [0x80,0x0c,0x01,0xf8] + strb r0, [r1, #-128] +@ CHECK: strb.w r0, [r1, r2, lsl #2] @ encoding: [0x22,0x00,0x01,0xf8] + strb.w r0, [r1, r2, lsl #2] +@ CHECK: strh.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0xa1,0xf8] + strh.w r0, [r1, #4092] +@ CHECK: strh r0, [r1, #-128] @ encoding: [0x80,0x0c,0x21,0xf8] + strh r0, [r1, #-128] +@ CHECK: strh r0, [r1, #-128] @ encoding: [0x80,0x0c,0x21,0xf8] + strh r0, [r1, #-128] +@ CHECK: strh.w r0, [r1, r2, lsl #2] @ encoding: [0x22,0x00,0x21,0xf8] + strh.w r0, [r1, r2, lsl #2] + +@ CHECK: ldrb r0, [r0, #-1] @ encoding: [0x01,0x0c,0x10,0xf8] + ldrb r0, [r0, #-1] +@ CHECK: ldrb r0, [r0, #-128] @ encoding: [0x80,0x0c,0x10,0xf8] + ldrb r0, [r0, #-128] +@ CHECK: ldrb.w r0, [r0, r1, lsl #2] @ encoding: [0x21,0x00,0x10,0xf8] + ldrb.w r0, [r0, r1, lsl #2] +@ CHECK: ldrh.w r0, [r0, #2046] @ encoding: [0xfe,0x07,0xb0,0xf8] + ldrh.w r0, [r0, #2046] +@ CHECK: ldrh r0, [r0, #-128] @ encoding: [0x80,0x0c,0x30,0xf8] + ldrh r0, [r0, #-128] +@ CHECK: ldrh.w r0, [r0, r1, lsl #2] @ encoding: [0x21,0x00,0x30,0xf8] + ldrh.w r0, [r0, r1, lsl #2] +@ CHECK: ldrsb.w r0, [r0] @ encoding: [0x00,0x00,0x90,0xf9] + ldrsb.w r0, [r0] +@ CHECK: ldrsh.w r0, [r0] @ encoding: [0x00,0x00,0xb0,0xf9] + ldrsh.w r0, [r0] +@ CHECK: bfi r0, r0, #5, #7 @ encoding: [0x60,0xf3,0x4b,0x10] + bfi r0, r0, #5, #7 +@ CHECK: isb @ encoding: [0xbf,0xf3,0x6f,0x8f] + isb +@ CHECK: mrs r0, cpsr @ encoding: [0xef,0xf3,0x00,0x80] + mrs r0, cpsr +@ CHECK: vmrs r0, fpscr @ encoding: [0xf1,0xee,0x10,0x0a] + vmrs r0, fpscr +@ CHECK: vmrs r0, fpexc @ encoding: [0xf8,0xee,0x10,0x0a] + vmrs r0, fpexc +@ CHECK: vmrs r0, fpsid @ encoding: [0xf0,0xee,0x10,0x0a] + vmrs r0, fpsid + +@ CHECK: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] + vmsr fpscr, r0 +@ CHECK: vmsr fpexc, r0 @ encoding: [0xe8,0xee,0x10,0x0a] + vmsr fpexc, r0 +@ CHECK: vmsr fpsid, r0 @ encoding: [0xe0,0xee,0x10,0x0a] + vmsr fpsid, r0 + +@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57] + mcr2 p7, #1, r5, c1, c1, #4 + +@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e] + mrc2 p14, #0, r1, c1, c2, #4 + +@ CHECK: mcrr2 p7, #1, r5, r4, c1 @ encoding: [0x44,0xfc,0x11,0x57] + mcrr2 p7, #1, r5, r4, c1 + +@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57] + mrrc2 p7, #1, r5, r4, c1 + +@ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xfe,0x81,0x17] + cdp2 p7, #1, c1, c1, c1, #4 + +@ CHECK: clrex @ encoding: [0xbf,0xf3,0x2f,0x8f] + clrex + +@ CHECK: clz r9, r0 @ encoding: [0xb0,0xfa,0x80,0xf9] + clz r9, r0 + +@ CHECK: qadd r1, r2, r3 @ encoding: [0x83,0xfa,0x82,0xf1] + qadd r1, r2, r3 + +@ CHECK: qsub r1, r2, r3 @ encoding: [0x83,0xfa,0xa2,0xf1] + qsub r1, r2, r3 + +@ CHECK: qdadd r1, r2, r3 @ encoding: [0x83,0xfa,0x92,0xf1] + qdadd r1, r2, r3 + +@ CHECK: qdsub r1, r2, r3 @ encoding: [0x83,0xfa,0xb2,0xf1] + qdsub r1, r2, r3 + +@ CHECK: nop.w @ encoding: [0xaf,0xf3,0x00,0x80] + nop.w + +@ CHECK: yield.w @ encoding: [0xaf,0xf3,0x01,0x80] + yield.w + +@ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80] + wfe.w + +@ CHECK: wfi.w @ encoding: [0xaf,0xf3,0x03,0x80] + wfi.w + +@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f] + dmb sy +@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f] + dmb st +@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f] + dmb ish +@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f] + dmb ishst +@ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f] + dmb nsh +@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f] + dmb nshst +@ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f] + dmb osh +@ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f] + dmb oshst + +@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f] + dsb sy +@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f] + dsb st +@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f] + dsb ish +@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f] + dsb ishst +@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f] + dsb nsh +@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f] + dsb nshst +@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f] + dsb osh +@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f] + dsb oshst + +@ CHECK: cpsie.w aif @ encoding: [0xaf,0xf3,0xe0,0x84] + cpsie.w aif +@ CHECK: cps #15 @ encoding: [0xaf,0xf3,0x0f,0x81] + cps #15 +@ CHECK: cpsie.w if, #10 @ encoding: [0xaf,0xf3,0x6a,0x85] + cpsie.w if, #10 + +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x80,0xf3,0x00,0x89] + msr apsr, r0 +@ CHECK: msr cpsr_s, r0 @ encoding: [0x80,0xf3,0x00,0x84] + msr apsr_g, r0 +@ CHECK: msr cpsr_f, r0 @ encoding: [0x80,0xf3,0x00,0x88] + msr apsr_nzcvq, r0 +@ CHECK: msr cpsr_fs, r0 @ encoding: [0x80,0xf3,0x00,0x8c] + msr apsr_nzcvqg, r0 +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x80,0xf3,0x00,0x89] + msr cpsr_fc, r0 +@ CHECK: msr cpsr_c, r0 @ encoding: [0x80,0xf3,0x00,0x81] + msr cpsr_c, r0 +@ CHECK: msr cpsr_x, r0 @ encoding: [0x80,0xf3,0x00,0x82] + msr cpsr_x, r0 +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x80,0xf3,0x00,0x89] + msr cpsr_fc, r0 +@ CHECK: msr cpsr_fsx, r0 @ encoding: [0x80,0xf3,0x00,0x8e] + msr cpsr_fsx, r0 +@ CHECK: msr spsr_fc, r0 @ encoding: [0x90,0xf3,0x00,0x89] + msr spsr_fc, r0 +@ CHECK: msr spsr_fsxc, r0 @ encoding: [0x90,0xf3,0x00,0x8f] + msr spsr_fsxc, r0 +@ CHECK: msr cpsr_fsxc, r0 @ encoding: [0x80,0xf3,0x00,0x8f] + msr cpsr_fsxc, r0 + diff --git a/test/MC/ARM/thumb2_instructions.s b/test/MC/ARM/thumb2_instructions.s new file mode 100644 index 0000000..71cd4ae --- /dev/null +++ b/test/MC/ARM/thumb2_instructions.s @@ -0,0 +1,12 @@ +@ RUN: llvm-mc -triple thumbv7-unknown-unknown -show-encoding %s > %t +@ RUN: FileCheck < %t %s + + .syntax unified + .text + +@ FIXME: This is not the correct instruction representation, but at least we are +@ parsing the ldr to something. +@ +@ CHECK: ldr r0, [r7, #258] + ldr r0, [r7, #-8] + diff --git a/test/MC/AsmParser/directive_values.s b/test/MC/AsmParser/directive_values.s index c222a30..98259bd 100644 --- a/test/MC/AsmParser/directive_values.s +++ b/test/MC/AsmParser/directive_values.s @@ -40,3 +40,19 @@ TEST5: .value 8 # CHECK: TEST5: # CHECK: .short 8 + +TEST6: + .byte 'c' + .byte '\'' + .byte '\\' + .byte '\#' + .byte '\t' + .byte '\n' + +# CHECK: TEST6 +# CHECK: .byte 99 +# CHECK: .byte 39 +# CHECK: .byte 92 +# CHECK: .byte 35 +# CHECK: .byte 9 +# CHECK: .byte 10 diff --git a/test/MC/AsmParser/equ.s b/test/MC/AsmParser/equ.s new file mode 100644 index 0000000..568f58f --- /dev/null +++ b/test/MC/AsmParser/equ.s @@ -0,0 +1,9 @@ +// RUN: not llvm-mc -n -triple i386-unknown-unknown %s 2> %t +// RUN: FileCheck < %t %s + +.equ a, 0 +.set a, 1 +.equ a, 2 +.equiv a, 3 +// CHECK: error: redefinition of 'a' + diff --git a/test/MC/AsmParser/floating-literals.s b/test/MC/AsmParser/floating-literals.s index b8e6e3c..bd122a8 100644 --- a/test/MC/AsmParser/floating-literals.s +++ b/test/MC/AsmParser/floating-literals.s @@ -5,6 +5,9 @@ # CHECK: .long 1077936128 # CHECK: .long 1082549862 .single 1.2455, +2.3, 3, + 4.2 + +# CHECK: .long 1067928519 +.float 1.307 # CHECK: .quad 4617315517961601024 # CHECK: .quad 4597526701198935065 diff --git a/test/MC/AsmParser/ifdef.s b/test/MC/AsmParser/ifdef.s new file mode 100644 index 0000000..98bff65 --- /dev/null +++ b/test/MC/AsmParser/ifdef.s @@ -0,0 +1,29 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +# CHECK-NOT: .byte 0 +# CHECK: .byte 1 +.ifdef undefined + .byte 0 +.else + .byte 1 +.endif + +defined: + +# CHECK: .byte 1 +# CHECK-NOT: .byte 0 +.ifdef defined + .byte 1 +.else + .byte 0 +.endif + + movl %eax, undefined + +# CHECK-NOT: .byte 0 +# CHECK: .byte 1 +.ifdef undefined + .byte 0 +.else + .byte 1 +.endif diff --git a/test/MC/AsmParser/ifndef.s b/test/MC/AsmParser/ifndef.s new file mode 100644 index 0000000..d9c9c54 --- /dev/null +++ b/test/MC/AsmParser/ifndef.s @@ -0,0 +1,29 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +# CHECK: .byte 1 +# CHECK-NOT: byte 0 +.ifndef undefined + .byte 1 +.else + .byte 0 +.endif + +defined: + +# CHECK-NOT: byte 0 +# CHECK: .byte 1 +.ifndef defined + .byte 0 +.else + .byte 1 +.endif + + movl %eax, undefined + +# CHECK: .byte 1 +# CHECK-NOT: byte 0 +.ifndef undefined + .byte 1 +.else + .byte 0 +.endif diff --git a/test/MC/AsmParser/rename.s b/test/MC/AsmParser/rename.s new file mode 100644 index 0000000..64ca515 --- /dev/null +++ b/test/MC/AsmParser/rename.s @@ -0,0 +1,10 @@ +// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + + .size bar, . - bar +.Ltmp0: + .size foo, .Ltmp0 - foo + +// CHECK: .Ltmp0: +// CHECK: .size bar, .Ltmp0-bar +// CHECK: .Ltmp01 +// CHECK: .size foo, .Ltmp01-foo diff --git a/test/MC/AsmParser/section.s b/test/MC/AsmParser/section.s new file mode 100644 index 0000000..414fc6d --- /dev/null +++ b/test/MC/AsmParser/section.s @@ -0,0 +1,107 @@ +# RUN: llvm-mc -triple i386-pc-linux-gnu -filetype=obj -o %t %s +# RUN: elf-dump --dump-section-data < %t | FileCheck %s +.section test1 +.byte 1 +.section test2 +.byte 2 +.previous +.byte 1 +.section test2 +.byte 2 +.previous +.byte 1 +.section test1 +.byte 1 +.previous +.byte 1 +.section test2 +.byte 2 +.pushsection test3 +.byte 3 +.pushsection test4 +.byte 4 +.pushsection test5 +.byte 5 +.popsection +.byte 4 +.popsection +.byte 3 +.popsection +.byte 2 +.pushsection test3 +.byte 3 +.pushsection test4 +.byte 4 +.previous +.byte 3 +.popsection +.byte 3 +.previous +.byte 2 +.section test1 +.byte 1 +.popsection +.byte 2 +.previous +.byte 1 +.previous +# CHECK: (('sh_name', 0x00000012) # 'test1' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x00000034) +# CHECK-NEXT: ('sh_size', 0x00000007) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '01010101 010101') +# CHECK-NEXT: ), +# CHECK: (('sh_name', 0x00000018) # 'test2' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x0000003b) +# CHECK-NEXT: ('sh_size', 0x00000006) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '02020202 0202') +# CHECK-NEXT: ), +# CHECK: (('sh_name', 0x0000001e) # 'test3' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x00000041) +# CHECK-NEXT: ('sh_size', 0x00000005) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '03030303 03') +# CHECK-NEXT: ), +# CHECK: (('sh_name', 0x00000024) # 'test4' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x00000046) +# CHECK-NEXT: ('sh_size', 0x00000003) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '040404') +# CHECK-NEXT: ), +# CHECK: (('sh_name', 0x0000002a) # 'test5' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x00000049) +# CHECK-NEXT: ('sh_size', 0x00000001) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '05') +# CHECK-NEXT: ), diff --git a/test/MC/COFF/basic-coff.s b/test/MC/COFF/basic-coff.s index fcbe290..0c86582 100644 --- a/test/MC/COFF/basic-coff.s +++ b/test/MC/COFF/basic-coff.s @@ -94,7 +94,7 @@ L_.str: # @.str // CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
// CHECK: NumberOfAuxSymbols = 1
// CHECK: AuxillaryData =
-// CHECK: 18 00 00 00 02 00 00 00 - 00 00 00 00 01 00 00 00 |................|
+// CHECK: 15 00 00 00 02 00 00 00 - 00 00 00 00 01 00 00 00 |................|
// CHECK: 00 00 |..|
// CHECK: }
// CHECK: 2 = {
diff --git a/test/MC/COFF/symbol-fragment-offset.s b/test/MC/COFF/symbol-fragment-offset.s index 577b6c5..c314ac2 100644 --- a/test/MC/COFF/symbol-fragment-offset.s +++ b/test/MC/COFF/symbol-fragment-offset.s @@ -62,7 +62,7 @@ L_.str2: // CHECK: SectionData =
// CHECK: 83 EC 04 C7 04 24 00 00 - 00 00 E8 00 00 00 00 C7 |.....$..........|
// CHECK: 04 24 07 00 00 00 E8 00 - 00 00 00 C7 04 24 10 00 |.$...........$..|
-// CHECK: 00 00 E8 00 00 00 00 31 - C0 83 C4 04 C3 00 00 00 |.......1........|
+// CHECK: 00 00 E8 00 00 00 00 31 - C0 83 C4 04 C3 |.......1.....|
// CHECK: Relocations = [
// CHECK: 0 = {
// CHECK: VirtualAddress = 0x6
@@ -134,7 +134,7 @@ L_.str2: // CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
// CHECK: NumberOfAuxSymbols = 1
// CHECK: AuxillaryData =
-// CHECK: 30 00 00 00 06 00 00 00 - 00 00 00 00 01 00 00 00 |0...............|
+// CHECK: 2D 00 00 00 06 00 00 00 - 00 00 00 00 01 00 00 00 |-...............|
// CHECK: 00 00 |..|
// CHECK: }
diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt index 31e4f13..d707565 100644 --- a/test/MC/Disassembler/ARM/arm-tests.txt +++ b/test/MC/Disassembler/ARM/arm-tests.txt @@ -9,6 +9,9 @@ # CHECK: bfi r8, r0, #16, #1 0x10 0x88 0xd0 0xe7 +# CHECK: mov pc, lr +0x0e 0xf0 0xa0 0xe1 + # CHECK: cmn r0, #1 0x01 0x00 0x70 0xe3 @@ -45,7 +48,7 @@ # CHECK: lsls r0, r2, #31 0x82 0x0f 0xb0 0xe1 -# CHECK: mcr2 p0, #0, r2, cr1, cr0, #7 +# CHECK: mcr2 p0, #0, r2, c1, c0, #7 0xf0 0x20 0x01 0xfe # CHECK: movt r8, #65535 @@ -115,3 +118,24 @@ # CHECK: setend le 0x00 0x00 0x01 0xf1 + +# CHECK: cpsie aif +0xc0 0x01 0x08 0xf1 + +# CHECK: cps #15 +0x0f 0x00 0x02 0xf1 + +# CHECK: cpsie if, #10 +0xca 0x00 0x0a 0xf1 + +# CHECK: msr cpsr_fc, r0 +0x00 0xf0 0x29 0xe1 + +# CHECK: rsbs r6, r7, r8 +0x08 0x60 0x77 0xe0 + +# CHECK: blxeq r5 +0x35 0xff 0x2f 0x01 + +# CHECK: bx r12 +0x1c 0xff 0x2f 0xe1 diff --git a/test/MC/Disassembler/ARM/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt index 06d12fe..36f7438 100644 --- a/test/MC/Disassembler/ARM/thumb-tests.txt +++ b/test/MC/Disassembler/ARM/thumb-tests.txt @@ -46,10 +46,10 @@ # CHECK: pkhbt r2, r4, r6 0xc4 0xea 0x06 0x02 -# CHECK: pop {r2, r4, r6, r8, r10, r12} +# CHECK: pop.w {r2, r4, r6, r8, r10, r12} 0xbd 0xe8 0x54 0x15 -# CHECK: push {r2, r4, r6, r8, r10, r12} +# CHECK: push.w {r2, r4, r6, r8, r10, r12} 0x2d 0xe9 0x54 0x15 # CHECK: rsbs r0, r0, #0 @@ -63,7 +63,7 @@ # CHECK: ssat r0, #17, r12 0x0c 0xf3 0x10 0x00 -# CHECK: strd r0, [r7, #64] +# CHECK: strd r0, r1, [r7, #64] 0xc7 0xe9 0x10 0x01 # CHECK: sub sp, #60 @@ -103,3 +103,21 @@ # IT block end # CHECK: rsbs r1, r2, #0 0x51 0x42 + +# CHECK: cpsid.w f +0xaf 0xf3 0x20 0x86 + +# CHECK: cps #15 +0xaf 0xf3 0x0f 0x81 + +# CHECK: cpsie.w if, #10 +0xaf 0xf3 0x6a 0x85 + +# CHECK: cpsie aif +0x67 0xb6 + +# CHECK: msr cpsr_fc, r0 +0x80 0xf3 0x00 0x89 + +# CHECK: blx #0 +0xff 0xf7 0xfe 0xef diff --git a/test/MC/Disassembler/MBlaze/mblaze-tests.txt b/test/MC/Disassembler/MBlaze/mblaze-tests.txt deleted file mode 100644 index 224473f..0000000 --- a/test/MC/Disassembler/MBlaze/mblaze-tests.txt +++ /dev/null @@ -1,1079 +0,0 @@ -# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s - -################################################################################ -# Branch instructions -################################################################################ - -# CHECK: beq r2, r3 -0x9c 0x02 0x18 0x00 - -# CHECK: bge r2, r3 -0x9c 0xa2 0x18 0x00 - -# CHECK: bgt r2, r3 -0x9c 0x82 0x18 0x00 - -# CHECK: ble r2, r3 -0x9c 0x62 0x18 0x00 - -# CHECK: blt r2, r3 -0x9c 0x42 0x18 0x00 - -# CHECK: bne r2, r3 -0x9c 0x22 0x18 0x00 - -# CHECK: beqd r2, r3 -0x9e 0x02 0x18 0x00 - -# CHECK: bged r2, r3 -0x9e 0xa2 0x18 0x00 - -# CHECK: bgtd r2, r3 -0x9e 0x82 0x18 0x00 - -# CHECK: bled r2, r3 -0x9e 0x62 0x18 0x00 - -# CHECK: bltd r2, r3 -0x9e 0x42 0x18 0x00 - -# CHECK: bned r2, r3 -0x9e 0x22 0x18 0x00 - -# CHECK: br r3 -0x98 0x00 0x18 0x00 - -# CHECK: bra r3 -0x98 0x08 0x18 0x00 - -# CHECK: brd r3 -0x98 0x10 0x18 0x00 - -# CHECK: brad r3 -0x98 0x18 0x18 0x00 - -# CHECK: brld r15, r3 -0x99 0xf4 0x18 0x00 - -# CHECK: brald r15, r3 -0x99 0xfc 0x18 0x00 - -# CHECK: brk r15, r3 -0x99 0xec 0x18 0x00 - -# CHECK: beqi r2, 0 -0xbc 0x02 0x00 0x00 - -# CHECK: bgei r2, 0 -0xbc 0xa2 0x00 0x00 - -# CHECK: bgti r2, 0 -0xbc 0x82 0x00 0x00 - - # CHECK: blei r2, 0 -0xbc 0x62 0x00 0x00 - -# CHECK: blti r2, 0 -0xbc 0x42 0x00 0x00 - -# CHECK: bnei r2, 0 -0xbc 0x22 0x00 0x00 - -# CHECK: beqid r2, 0 -0xbe 0x02 0x00 0x00 - -# CHECK: bgeid r2, 0 -0xbe 0xa2 0x00 0x00 - -# CHECK: bgtid r2, 0 -0xbe 0x82 0x00 0x00 - -# CHECK: bleid r2, 0 -0xbe 0x62 0x00 0x00 - -# CHECK: bltid r2, 0 -0xbe 0x42 0x00 0x00 - -# CHECK: bneid r2, 0 -0xbe 0x22 0x00 0x00 - -# CHECK: bri 0 -0xb8 0x00 0x00 0x00 - -# CHECK: brai 0 -0xb8 0x08 0x00 0x00 - -# CHECK: brid 0 -0xb8 0x10 0x00 0x00 - -# CHECK: braid 0 -0xb8 0x18 0x00 0x00 - -# CHECK: brlid r15, 0 -0xb9 0xf4 0x00 0x00 - -# CHECK: bralid r15, 0 -0xb9 0xfc 0x00 0x00 - -# CHECK: brki r15, 0 -0xb9 0xec 0x00 0x00 - -################################################################################ -# TYPE A instructions -################################################################################ - -# CHECK: add r1, r2, r3 -0x00 0x22 0x18 0x00 - -# CHECK: addc r1, r2, r3 -0x08 0x22 0x18 0x00 - -# CHECK: addk r1, r2, r3 -0x10 0x22 0x18 0x00 - -# CHECK: addkc r1, r2, r3 -0x18 0x22 0x18 0x00 - -# CHECK: and r1, r2, r3 -0x84 0x22 0x18 0x00 - -# CHECK: andn r1, r2, r3 -0x8c 0x22 0x18 0x00 - -# CHECK: cmp r1, r2, r3 -0x14 0x22 0x18 0x01 - -# CHECK: cmpu r1, r2, r3 -0x14 0x22 0x18 0x03 - -# CHECK: idiv r1, r2, r3 -0x48 0x22 0x18 0x00 - -# CHECK: idivu r1, r2, r3 -0x48 0x22 0x18 0x02 - -# CHECK: mul r1, r2, r3 -0x40 0x22 0x18 0x00 - -# CHECK: mulh r1, r2, r3 -0x40 0x22 0x18 0x01 - -# CHECK: mulhu r1, r2, r3 -0x40 0x22 0x18 0x03 - -# CHECK: mulhsu r1, r2, r3 -0x40 0x22 0x18 0x02 - -# CHECK: or r1, r2, r3 -0x80 0x22 0x18 0x00 - -# CHECK: rsub r1, r2, r3 -0x04 0x22 0x18 0x00 - -# CHECK: rsubc r1, r2, r3 -0x0c 0x22 0x18 0x00 - -# CHECK: rsubk r1, r2, r3 -0x14 0x22 0x18 0x00 - -# CHECK: rsubkc r1, r2, r3 -0x1c 0x22 0x18 0x00 - -# CHECK: sext16 r1, r2 -0x90 0x22 0x00 0x61 - -# CHECK: sext8 r1, r2 -0x90 0x22 0x00 0x60 - -# CHECK: xor r1, r2, r3 -0x88 0x22 0x18 0x00 - -# CHECK: or r0, r0, r0 -0x80 0x00 0x00 0x00 - -################################################################################ -# TYPE B instructions -################################################################################ - -# CHECK: addi r1, r2, 15 -0x20 0x22 0x00 0x0f - -# CHECK: addic r1, r2, 15 -0x28 0x22 0x00 0x0f - -# CHECK: addik r1, r2, 15 -0x30 0x22 0x00 0x0f - -# CHECK: addikc r1, r2, 15 -0x38 0x22 0x00 0x0f - -# CHECK: andi r1, r2, 15 -0xa4 0x22 0x00 0x0f - -# CHECK: andni r1, r2, 15 -0xac 0x22 0x00 0x0f - -# CHECK: muli r1, r2, 15 -0x60 0x22 0x00 0x0f - -# CHECK: ori r1, r2, 15 -0xa0 0x22 0x00 0x0f - -# CHECK: rsubi r1, r2, 15 -0x24 0x22 0x00 0x0f - -# CHECK: rsubic r1, r2, 15 -0x2c 0x22 0x00 0x0f - -# CHECK: rsubik r1, r2, 15 -0x34 0x22 0x00 0x0f - -# CHECK: rsubikc r1, r2, 15 -0x3c 0x22 0x00 0x0f - -# CHECK: rtbd r15, 15 -0xb6 0x4f 0x00 0x0f - -# CHECK: rted r15, 15 -0xb6 0x8f 0x00 0x0f - -# CHECK: rtid r15, 15 -0xb6 0x2f 0x00 0x0f - -# CHECK: rtsd r15, 15 -0xb6 0x0f 0x00 0x0f - -# CHECK: xori r1, r2, 15 -0xa8 0x22 0x00 0x0f - -################################################################################ -# FPU instructions -################################################################################ - -# CHECK: fadd r0, r1, r2 -0x58 0x01 0x10 0x00 - -# CHECK: frsub r0, r1, r2 -0x58 0x01 0x10 0x80 - -# CHECK: fmul r0, r1, r2 -0x58 0x01 0x11 0x00 - -# CHECK: fdiv r0, r1, r2 -0x58 0x01 0x11 0x80 - -# CHECK: fsqrt r0, r1 -0x58 0x01 0x03 0x80 - -# CHECK: fint r0, r1 -0x58 0x01 0x03 0x00 - -# CHECK: flt r0, r1 -0x58 0x01 0x02 0x80 - -# CHECK: fcmp.un r0, r1, r2 -0x58 0x01 0x12 0x00 - -# CHECK: fcmp.lt r0, r1, r2 -0x58 0x01 0x12 0x10 - -# CHECK: fcmp.eq r0, r1, r2 -0x58 0x01 0x12 0x20 - -# CHECK: fcmp.le r0, r1, r2 -0x58 0x01 0x12 0x30 - -# CHECK: fcmp.gt r0, r1, r2 -0x58 0x01 0x12 0x40 - -# CHECK: fcmp.ne r0, r1, r2 -0x58 0x01 0x12 0x50 - -# CHECK: fcmp.ge r0, r1, r2 -0x58 0x01 0x12 0x60 - -################################################################################ -# IMM instruction processing -################################################################################ - -# CHECK: addi r0, r0, 0 -0x20 0x00 0x00 0x00 - -# CHECK: addi r0, r0, 1 -0x20 0x00 0x00 0x01 - -# CHECK: addi r0, r0, 2 -0x20 0x00 0x00 0x02 - -# CHECK: addi r0, r0, 4 -0x20 0x00 0x00 0x04 - -# CHECK: addi r0, r0, 8 -0x20 0x00 0x00 0x08 - -# CHECK: addi r0, r0, 16 -0x20 0x00 0x00 0x10 - -# CHECK: addi r0, r0, 32 -0x20 0x00 0x00 0x20 - -# CHECK: addi r0, r0, 64 -0x20 0x00 0x00 0x40 - -# CHECK: addi r0, r0, 128 -0x20 0x00 0x00 0x80 - -# CHECK: addi r0, r0, 256 -0x20 0x00 0x01 0x00 - -# CHECK: addi r0, r0, 512 -0x20 0x00 0x02 0x00 - -# CHECK: addi r0, r0, 1024 -0x20 0x00 0x04 0x00 - -# CHECK: addi r0, r0, 2048 -0x20 0x00 0x08 0x00 - -# CHECK: addi r0, r0, 4096 -0x20 0x00 0x10 0x00 - -# CHECK: addi r0, r0, 8192 -0x20 0x00 0x20 0x00 - -# CHECK: addi r0, r0, 16384 -0x20 0x00 0x40 0x00 - -# CHECK: imm 0 -# CHECK: addi r0, r0, -32768 -0xb0 0x00 0x00 0x00 0x20 0x00 0x80 0x00 - -# CHECK: imm 1 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x01 0x20 0x00 0x00 0x00 - -# CHECK: imm 2 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x02 0x20 0x00 0x00 0x00 - -# CHECK: imm 4 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x04 0x20 0x00 0x00 0x00 - -# CHECK: imm 8 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x08 0x20 0x00 0x00 0x00 - -# CHECK: imm 16 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x10 0x20 0x00 0x00 0x00 - -# CHECK: imm 32 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x20 0x20 0x00 0x00 0x00 - -# CHECK: imm 64 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x40 0x20 0x00 0x00 0x00 - -# CHECK: imm 128 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x80 0x20 0x00 0x00 0x00 - -# CHECK: imm 256 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x01 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 512 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x02 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 1024 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x04 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 2048 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x08 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 4096 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x10 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 8192 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x20 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 16384 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x40 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm -32768 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x80 0x00 0x20 0x00 0x00 0x00 - -################################################################################ -# Memory instructions -################################################################################ - -# CHECK: lbu r1, r2, r3 -0xc0 0x22 0x18 0x00 - -# CHECK: lbur r1, r2, r3 -0xc0 0x22 0x1a 0x00 - -# CHECK: lbui r1, r2, 28 -0xe0 0x22 0x00 0x1c - -# CHECK: lhu r1, r2, r3 -0xc4 0x22 0x18 0x00 - -# CHECK: lhur r1, r2, r3 -0xc4 0x22 0x1a 0x00 - -# CHECK: lhui r1, r2, 28 -0xe4 0x22 0x00 0x1c - -# CHECK: lw r1, r2, r3 -0xc8 0x22 0x18 0x00 - -# CHECK: lwr r1, r2, r3 -0xc8 0x22 0x1a 0x00 - -# CHECK: lwi r1, r2, 28 -0xe8 0x22 0x00 0x1c - -# CHECK: lwx r1, r2, r3 -0xc8 0x22 0x1c 0x00 - -# CHECK: sb r1, r2, r3 -0xd0 0x22 0x18 0x00 - -# CHECK: sbr r1, r2, r3 -0xd0 0x22 0x1a 0x00 - -# CHECK: sbi r1, r2, 28 -0xf0 0x22 0x00 0x1c - -# CHECK: sh r1, r2, r3 -0xd4 0x22 0x18 0x00 - -# CHECK: shr r1, r2, r3 -0xd4 0x22 0x1a 0x00 - -# CHECK: shi r1, r2, 28 -0xf4 0x22 0x00 0x1c - -# CHECK: sw r1, r2, r3 -0xd8 0x22 0x18 0x00 - -# CHECK: swr r1, r2, r3 -0xd8 0x22 0x1a 0x00 - -# CHECK: swi r1, r2, 28 -0xf8 0x22 0x00 0x1c - -# CHECK: swx r1, r2, r3 -0xd8 0x22 0x1c 0x00 - -################################################################################ -# Special instructions -################################################################################ - -# CHECK: mfs r0, 0 -0x94 0x00 0x80 0x00 - -# CHECK: msrclr r0, 0 -0x94 0x11 0x00 0x00 - -# CHECK: msrset r0, 0 -0x94 0x10 0x00 0x00 - -# CHECK: mts 0, r0 -0x94 0x00 0xc0 0x00 - -# CHECK: wdc r0, r1 -0x90 0x00 0x08 0x64 - -# CHECK: wdc.clear r0, r1 -0x90 0x00 0x08 0x66 - -# CHECK: wdc.flush r0, r1 -0x90 0x00 0x08 0x74 - -# CHECK: wic r0, r1 -0x90 0x00 0x08 0x68 - -################################################################################ -# Shift instructions -################################################################################ - -# CHECK: bsrl r1, r2, r3 -0x44 0x22 0x18 0x00 - -# CHECK: bsra r1, r2, r3 -0x44 0x22 0x1a 0x00 - -# CHECK: bsll r1, r2, r3 -0x44 0x22 0x1c 0x00 - -# CHECK: bsrli r1, r2, 0 -0x64 0x22 0x00 0x00 - -# CHECK: bsrai r1, r2, 0 -0x64 0x22 0x02 0x00 - -# CHECK: bslli r1, r2, 0 -0x64 0x22 0x04 0x00 - -# CHECK: sra r1, r2 -0x90 0x22 0x00 0x01 - -# CHECK: srl r1, r2 -0x90 0x22 0x00 0x41 - -################################################################################ -# Pattern instructions -################################################################################ - -# CHECK: pcmpbf r0, r1, r2 -0x80 0x01 0x14 0x00 - -# CHECK: pcmpne r0, r1, r2 -0x8c 0x01 0x14 0x00 - -# CHECK: pcmpeq r0, r1, r2 -0x88 0x01 0x14 0x00 - -################################################################################ -# Opcode disassembly -################################################################################ - -# CHECK: add r0, r0, r0 -0x00 0x00 0x00 0x00 - -# CHECK: add r1, r1, r1 -0x00 0x21 0x08 0x00 - -# CHECK: add r2, r2, r2 -0x00 0x42 0x10 0x00 - -# CHECK: add r3, r3, r3 -0x00 0x63 0x18 0x00 - -# CHECK: add r4, r4, r4 -0x00 0x84 0x20 0x00 - -# CHECK: add r5, r5, r5 -0x00 0xa5 0x28 0x00 - -# CHECK: add r6, r6, r6 -0x00 0xc6 0x30 0x00 - -# CHECK: add r7, r7, r7 -0x00 0xe7 0x38 0x00 - -# CHECK: add r8, r8, r8 -0x01 0x08 0x40 0x00 - -# CHECK: add r9, r9, r9 -0x01 0x29 0x48 0x00 - -# CHECK: add r10, r10, r10 -0x01 0x4a 0x50 0x00 - -# CHECK: add r11, r11, r11 -0x01 0x6b 0x58 0x00 - -# CHECK: add r12, r12, r12 -0x01 0x8c 0x60 0x00 - -# CHECK: add r13, r13, r13 -0x01 0xad 0x68 0x00 - -# CHECK: add r14, r14, r14 -0x01 0xce 0x70 0x00 - -# CHECK: add r15, r15, r15 -0x01 0xef 0x78 0x00 - -# CHECK: add r16, r16, r16 -0x02 0x10 0x80 0x00 - -# CHECK: add r17, r17, r17 -0x02 0x31 0x88 0x00 - -# CHECK: add r18, r18, r18 -0x02 0x52 0x90 0x00 - -# CHECK: add r19, r19, r19 -0x02 0x73 0x98 0x00 - -# CHECK: add r20, r20, r20 -0x02 0x94 0xa0 0x00 - -# CHECK: add r21, r21, r21 -0x02 0xb5 0xa8 0x00 - -# CHECK: add r22, r22, r22 -0x02 0xd6 0xb0 0x00 - -# CHECK: add r23, r23, r23 -0x02 0xf7 0xb8 0x00 - -# CHECK: add r24, r24, r24 -0x03 0x18 0xc0 0x00 - -# CHECK: add r25, r25, r25 -0x03 0x39 0xc8 0x00 - -# CHECK: add r26, r26, r26 -0x03 0x5a 0xd0 0x00 - -# CHECK: add r27, r27, r27 -0x03 0x7b 0xd8 0x00 - -# CHECK: add r28, r28, r28 -0x03 0x9c 0xe0 0x00 - -# CHECK: add r29, r29, r29 -0x03 0xbd 0xe8 0x00 - -# CHECK: add r30, r30, r30 -0x03 0xde 0xf0 0x00 - -# CHECK: add r31, r31, r31 -0x03 0xff 0xf8 0x00 - -# CHECK: addi r0, r0, 0 -0x20 0x00 0x00 0x00 - -# CHECK: addi r0, r0, 1 -0x20 0x00 0x00 0x01 - -# CHECK: addi r0, r0, 2 -0x20 0x00 0x00 0x02 - -# CHECK: addi r0, r0, 4 -0x20 0x00 0x00 0x04 - -# CHECK: addi r0, r0, 8 -0x20 0x00 0x00 0x08 - -# CHECK: addi r0, r0, 16 -0x20 0x00 0x00 0x10 - -# CHECK: addi r0, r0, 32 -0x20 0x00 0x00 0x20 - -# CHECK: addi r0, r0, 64 -0x20 0x00 0x00 0x40 - -# CHECK: addi r0, r0, 128 -0x20 0x00 0x00 0x80 - -# CHECK: addi r0, r0, 256 -0x20 0x00 0x01 0x00 - -# CHECK: addi r0, r0, 512 -0x20 0x00 0x02 0x00 - -# CHECK: addi r0, r0, 1024 -0x20 0x00 0x04 0x00 - -# CHECK: addi r0, r0, 2048 -0x20 0x00 0x08 0x00 - -# CHECK: addi r0, r0, 4096 -0x20 0x00 0x10 0x00 - -# CHECK: addi r0, r0, 8192 -0x20 0x00 0x20 0x00 - -# CHECK: addi r0, r0, 16384 -0x20 0x00 0x40 0x00 - -# CHECK: addi r0, r0, -1 -0x20 0x00 0xff 0xff - -# CHECK: addi r0, r0, -2 -0x20 0x00 0xff 0xfe - -# CHECK: addi r0, r0, -4 -0x20 0x00 0xff 0xfc - -# CHECK: addi r0, r0, -8 -0x20 0x00 0xff 0xf8 - -# CHECK: addi r0, r0, -16 -0x20 0x00 0xff 0xf0 - -# CHECK: addi r0, r0, -32 -0x20 0x00 0xff 0xe0 - -# CHECK: addi r0, r0, -64 -0x20 0x00 0xff 0xc0 - -# CHECK: addi r0, r0, -128 -0x20 0x00 0xff 0x80 - -# CHECK: addi r0, r0, -256 -0x20 0x00 0xff 0x00 - -# CHECK: addi r0, r0, -512 -0x20 0x00 0xfe 0x00 - -# CHECK: addi r0, r0, -1024 -0x20 0x00 0xfc 0x00 - -# CHECK: addi r0, r0, -2048 -0x20 0x00 0xf8 0x00 - -# CHECK: addi r0, r0, -4096 -0x20 0x00 0xf0 0x00 - -# CHECK: addi r0, r0, -8192 -0x20 0x00 0xe0 0x00 - -# CHECK: addi r0, r0, -16384 -0x20 0x00 0xc0 0x00 - -# CHECK: addi r0, r0, -32768 -0x20 0x00 0x80 0x00 - -################################################################################ -# FSL instructions -################################################################################ - -# CHECK: get r0, rfsl0 -0x6c 0x00 0x00 0x00 - -# CHECK: nget r0, rfsl0 -0x6c 0x00 0x40 0x00 - -# CHECK: cget r0, rfsl0 -0x6c 0x00 0x20 0x00 - -# CHECK: ncget r0, rfsl0 -0x6c 0x00 0x60 0x00 - -# CHECK: tget r0, rfsl0 -0x6c 0x00 0x10 0x00 - -# CHECK: tnget r0, rfsl0 -0x6c 0x00 0x50 0x00 - -# CHECK: tcget r0, rfsl0 -0x6c 0x00 0x30 0x00 - -# CHECK: tncget r0, rfsl0 -0x6c 0x00 0x70 0x00 - -# CHECK: aget r0, rfsl0 -0x6c 0x00 0x08 0x00 - -# CHECK: naget r0, rfsl0 -0x6c 0x00 0x48 0x00 - -# CHECK: caget r0, rfsl0 -0x6c 0x00 0x28 0x00 - -# CHECK: ncaget r0, rfsl0 -0x6c 0x00 0x68 0x00 - -# CHECK: taget r0, rfsl0 -0x6c 0x00 0x18 0x00 - -# CHECK: tnaget r0, rfsl0 -0x6c 0x00 0x58 0x00 - -# CHECK: tcaget r0, rfsl0 -0x6c 0x00 0x38 0x00 - -# CHECK: tncaget r0, rfsl0 -0x6c 0x00 0x78 0x00 - -# CHECK: eget r0, rfsl0 -0x6c 0x00 0x04 0x00 - -# CHECK: neget r0, rfsl0 -0x6c 0x00 0x44 0x00 - -# CHECK: ecget r0, rfsl0 -0x6c 0x00 0x24 0x00 - -# CHECK: necget r0, rfsl0 -0x6c 0x00 0x64 0x00 - -# CHECK: teget r0, rfsl0 -0x6c 0x00 0x14 0x00 - -# CHECK: tneget r0, rfsl0 -0x6c 0x00 0x54 0x00 - -# CHECK: tecget r0, rfsl0 -0x6c 0x00 0x34 0x00 - -# CHECK: tnecget r0, rfsl0 -0x6c 0x00 0x74 0x00 - -# CHECK: eaget r0, rfsl0 -0x6c 0x00 0x0c 0x00 - -# CHECK: neaget r0, rfsl0 -0x6c 0x00 0x4c 0x00 - -# CHECK: ecaget r0, rfsl0 -0x6c 0x00 0x2c 0x00 - -# CHECK: necaget r0, rfsl0 -0x6c 0x00 0x6c 0x00 - -# CHECK: teaget r0, rfsl0 -0x6c 0x00 0x1c 0x00 - -# CHECK: tneaget r0, rfsl0 -0x6c 0x00 0x5c 0x00 - -# CHECK: tecaget r0, rfsl0 -0x6c 0x00 0x3c 0x00 - -# CHECK: tnecaget r0, rfsl0 -0x6c 0x00 0x7c 0x00 - -# CHECK: getd r0, r1 -0x4c 0x00 0x08 0x00 - -# CHECK: ngetd r0, r1 -0x4c 0x00 0x0a 0x00 - -# CHECK: cgetd r0, r1 -0x4c 0x00 0x09 0x00 - -# CHECK: ncgetd r0, r1 -0x4c 0x00 0x0b 0x00 - -# CHECK: tgetd r0, r1 -0x4c 0x00 0x08 0x80 - -# CHECK: tngetd r0, r1 -0x4c 0x00 0x0a 0x80 - -# CHECK: tcgetd r0, r1 -0x4c 0x00 0x09 0x80 - -# CHECK: tncgetd r0, r1 -0x4c 0x00 0x0b 0x80 - -# CHECK: agetd r0, r1 -0x4c 0x00 0x08 0x40 - -# CHECK: nagetd r0, r1 -0x4c 0x00 0x0a 0x40 - -# CHECK: cagetd r0, r1 -0x4c 0x00 0x09 0x40 - -# CHECK: ncagetd r0, r1 -0x4c 0x00 0x0b 0x40 - -# CHECK: tagetd r0, r1 -0x4c 0x00 0x08 0xc0 - -# CHECK: tnagetd r0, r1 -0x4c 0x00 0x0a 0xc0 - -# CHECK: tcagetd r0, r1 -0x4c 0x00 0x09 0xc0 - -# CHECK: tncagetd r0, r1 -0x4c 0x00 0x0b 0xc0 - -# CHECK: egetd r0, r1 -0x4c 0x00 0x08 0x20 - -# CHECK: negetd r0, r1 -0x4c 0x00 0x0a 0x20 - -# CHECK: ecgetd r0, r1 -0x4c 0x00 0x09 0x20 - -# CHECK: necgetd r0, r1 -0x4c 0x00 0x0b 0x20 - -# CHECK: tegetd r0, r1 -0x4c 0x00 0x08 0xa0 - -# CHECK: tnegetd r0, r1 -0x4c 0x00 0x0a 0xa0 - -# CHECK: tecgetd r0, r1 -0x4c 0x00 0x09 0xa0 - -# CHECK: tnecgetd r0, r1 -0x4c 0x00 0x0b 0xa0 - -# CHECK: eagetd r0, r1 -0x4c 0x00 0x08 0x60 - -# CHECK: neagetd r0, r1 -0x4c 0x00 0x0a 0x60 - -# CHECK: ecagetd r0, r1 -0x4c 0x00 0x09 0x60 - -# CHECK: necagetd r0, r1 -0x4c 0x00 0x0b 0x60 - -# CHECK: teagetd r0, r1 -0x4c 0x00 0x08 0xe0 - -# CHECK: tneagetd r0, r1 -0x4c 0x00 0x0a 0xe0 - -# CHECK: tecagetd r0, r1 -0x4c 0x00 0x09 0xe0 - -# CHECK: tnecagetd r0, r1 -0x4c 0x00 0x0b 0xe0 - -# CHECK: put r0, rfsl0 -0x6c 0x00 0x80 0x00 - -# CHECK: aput r0, rfsl0 -0x6c 0x00 0x88 0x00 - -# CHECK: cput r0, rfsl0 -0x6c 0x00 0xa0 0x00 - -# CHECK: caput r0, rfsl0 -0x6c 0x00 0xa8 0x00 - -# CHECK: nput r0, rfsl0 -0x6c 0x00 0xc0 0x00 - -# CHECK: naput r0, rfsl0 -0x6c 0x00 0xc8 0x00 - -# CHECK: ncput r0, rfsl0 -0x6c 0x00 0xe0 0x00 - -# CHECK: ncaput r0, rfsl0 -0x6c 0x00 0xe8 0x00 - -# CHECK: tput rfsl0 -0x6c 0x00 0x90 0x00 - -# CHECK: taput rfsl0 -0x6c 0x00 0x98 0x00 - -# CHECK: tcput rfsl0 -0x6c 0x00 0xb0 0x00 - -# CHECK: tcaput rfsl0 -0x6c 0x00 0xb8 0x00 - -# CHECK: tnput rfsl0 -0x6c 0x00 0xd0 0x00 - -# CHECK: tnaput rfsl0 -0x6c 0x00 0xd8 0x00 - -# CHECK: tncput rfsl0 -0x6c 0x00 0xf0 0x00 - -# CHECK: tncaput rfsl0 -0x6c 0x00 0xf8 0x00 - -# CHECK: putd r0, r1 -0x4c 0x00 0x0c 0x00 - -# CHECK: aputd r0, r1 -0x4c 0x00 0x0c 0x40 - -# CHECK: cputd r0, r1 -0x4c 0x00 0x0d 0x00 - -# CHECK: caputd r0, r1 -0x4c 0x00 0x0d 0x40 - -# CHECK: nputd r0, r1 -0x4c 0x00 0x0e 0x00 - -# CHECK: naputd r0, r1 -0x4c 0x00 0x0e 0x40 - -# CHECK: ncputd r0, r1 -0x4c 0x00 0x0f 0x00 - -# CHECK: ncaputd r0, r1 -0x4c 0x00 0x0f 0x40 - -# CHECK: tputd r1 -0x4c 0x00 0x0c 0x80 - -# CHECK: taputd r1 -0x4c 0x00 0x0c 0xc0 - -# CHECK: tcputd r1 -0x4c 0x00 0x0d 0x80 - -# CHECK: tcaputd r1 -0x4c 0x00 0x0d 0xc0 - -# CHECK: tnputd r1 -0x4c 0x00 0x0e 0x80 - -# CHECK: tnaputd r1 -0x4c 0x00 0x0e 0xc0 - -# CHECK: tncputd r1 -0x4c 0x00 0x0f 0x80 - -# CHECK: tncaputd r1 -0x4c 0x00 0x0f 0xc0 - -# CHECK: get r0, rfsl1 -0x6c 0x00 0x00 0x01 - -# CHECK: get r0, rfsl2 -0x6c 0x00 0x00 0x02 - -# CHECK: get r0, rfsl3 -0x6c 0x00 0x00 0x03 - -# CHECK: get r0, rfsl4 -0x6c 0x00 0x00 0x04 - -# CHECK: get r0, rfsl5 -0x6c 0x00 0x00 0x05 - -# CHECK: get r0, rfsl6 -0x6c 0x00 0x00 0x06 - -# CHECK: get r0, rfsl7 -0x6c 0x00 0x00 0x07 - -# CHECK: get r0, rfsl8 -0x6c 0x00 0x00 0x08 - -# CHECK: get r0, rfsl9 -0x6c 0x00 0x00 0x09 - -# CHECK: get r0, rfsl10 -0x6c 0x00 0x00 0x0a - -# CHECK: get r0, rfsl11 -0x6c 0x00 0x00 0x0b - -# CHECK: get r0, rfsl12 -0x6c 0x00 0x00 0x0c - -# CHECK: get r0, rfsl13 -0x6c 0x00 0x00 0x0d - -# CHECK: get r0, rfsl14 -0x6c 0x00 0x00 0x0e - -# CHECK: get r0, rfsl15 -0x6c 0x00 0x00 0x0f diff --git a/test/MC/Disassembler/MBlaze/mblaze_branch.txt b/test/MC/Disassembler/MBlaze/mblaze_branch.txt new file mode 100644 index 0000000..5f40517 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_branch.txt @@ -0,0 +1,119 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Branch instructions +################################################################################ + +# CHECK: beq r2, r3 +0x9c 0x02 0x18 0x00 + +# CHECK: bge r2, r3 +0x9c 0xa2 0x18 0x00 + +# CHECK: bgt r2, r3 +0x9c 0x82 0x18 0x00 + +# CHECK: ble r2, r3 +0x9c 0x62 0x18 0x00 + +# CHECK: blt r2, r3 +0x9c 0x42 0x18 0x00 + +# CHECK: bne r2, r3 +0x9c 0x22 0x18 0x00 + +# CHECK: beqd r2, r3 +0x9e 0x02 0x18 0x00 + +# CHECK: bged r2, r3 +0x9e 0xa2 0x18 0x00 + +# CHECK: bgtd r2, r3 +0x9e 0x82 0x18 0x00 + +# CHECK: bled r2, r3 +0x9e 0x62 0x18 0x00 + +# CHECK: bltd r2, r3 +0x9e 0x42 0x18 0x00 + +# CHECK: bned r2, r3 +0x9e 0x22 0x18 0x00 + +# CHECK: br r3 +0x98 0x00 0x18 0x00 + +# CHECK: bra r3 +0x98 0x08 0x18 0x00 + +# CHECK: brd r3 +0x98 0x10 0x18 0x00 + +# CHECK: brad r3 +0x98 0x18 0x18 0x00 + +# CHECK: brld r15, r3 +0x99 0xf4 0x18 0x00 + +# CHECK: brald r15, r3 +0x99 0xfc 0x18 0x00 + +# CHECK: brk r15, r3 +0x99 0xec 0x18 0x00 + +# CHECK: beqi r2, 0 +0xbc 0x02 0x00 0x00 + +# CHECK: bgei r2, 0 +0xbc 0xa2 0x00 0x00 + +# CHECK: bgti r2, 0 +0xbc 0x82 0x00 0x00 + + # CHECK: blei r2, 0 +0xbc 0x62 0x00 0x00 + +# CHECK: blti r2, 0 +0xbc 0x42 0x00 0x00 + +# CHECK: bnei r2, 0 +0xbc 0x22 0x00 0x00 + +# CHECK: beqid r2, 0 +0xbe 0x02 0x00 0x00 + +# CHECK: bgeid r2, 0 +0xbe 0xa2 0x00 0x00 + +# CHECK: bgtid r2, 0 +0xbe 0x82 0x00 0x00 + +# CHECK: bleid r2, 0 +0xbe 0x62 0x00 0x00 + +# CHECK: bltid r2, 0 +0xbe 0x42 0x00 0x00 + +# CHECK: bneid r2, 0 +0xbe 0x22 0x00 0x00 + +# CHECK: bri 0 +0xb8 0x00 0x00 0x00 + +# CHECK: brai 0 +0xb8 0x08 0x00 0x00 + +# CHECK: brid 0 +0xb8 0x10 0x00 0x00 + +# CHECK: braid 0 +0xb8 0x18 0x00 0x00 + +# CHECK: brlid r15, 0 +0xb9 0xf4 0x00 0x00 + +# CHECK: bralid r15, 0 +0xb9 0xfc 0x00 0x00 + +# CHECK: brki r15, 0 +0xb9 0xec 0x00 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_fpu.txt b/test/MC/Disassembler/MBlaze/mblaze_fpu.txt new file mode 100644 index 0000000..0fb7abc --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_fpu.txt @@ -0,0 +1,47 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# FPU instructions +################################################################################ + +# CHECK: fadd r0, r1, r2 +0x58 0x01 0x10 0x00 + +# CHECK: frsub r0, r1, r2 +0x58 0x01 0x10 0x80 + +# CHECK: fmul r0, r1, r2 +0x58 0x01 0x11 0x00 + +# CHECK: fdiv r0, r1, r2 +0x58 0x01 0x11 0x80 + +# CHECK: fsqrt r0, r1 +0x58 0x01 0x03 0x80 + +# CHECK: fint r0, r1 +0x58 0x01 0x03 0x00 + +# CHECK: flt r0, r1 +0x58 0x01 0x02 0x80 + +# CHECK: fcmp.un r0, r1, r2 +0x58 0x01 0x12 0x00 + +# CHECK: fcmp.lt r0, r1, r2 +0x58 0x01 0x12 0x10 + +# CHECK: fcmp.eq r0, r1, r2 +0x58 0x01 0x12 0x20 + +# CHECK: fcmp.le r0, r1, r2 +0x58 0x01 0x12 0x30 + +# CHECK: fcmp.gt r0, r1, r2 +0x58 0x01 0x12 0x40 + +# CHECK: fcmp.ne r0, r1, r2 +0x58 0x01 0x12 0x50 + +# CHECK: fcmp.ge r0, r1, r2 +0x58 0x01 0x12 0x60 diff --git a/test/MC/Disassembler/MBlaze/mblaze_fsl.txt b/test/MC/Disassembler/MBlaze/mblaze_fsl.txt new file mode 100644 index 0000000..a12b3b4 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_fsl.txt @@ -0,0 +1,338 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# FSL instructions +################################################################################ + +# CHECK: get r0, rfsl0 +0x6c 0x00 0x00 0x00 + +# CHECK: nget r0, rfsl0 +0x6c 0x00 0x40 0x00 + +# CHECK: cget r0, rfsl0 +0x6c 0x00 0x20 0x00 + +# CHECK: ncget r0, rfsl0 +0x6c 0x00 0x60 0x00 + +# CHECK: tget r0, rfsl0 +0x6c 0x00 0x10 0x00 + +# CHECK: tnget r0, rfsl0 +0x6c 0x00 0x50 0x00 + +# CHECK: tcget r0, rfsl0 +0x6c 0x00 0x30 0x00 + +# CHECK: tncget r0, rfsl0 +0x6c 0x00 0x70 0x00 + +# CHECK: aget r0, rfsl0 +0x6c 0x00 0x08 0x00 + +# CHECK: naget r0, rfsl0 +0x6c 0x00 0x48 0x00 + +# CHECK: caget r0, rfsl0 +0x6c 0x00 0x28 0x00 + +# CHECK: ncaget r0, rfsl0 +0x6c 0x00 0x68 0x00 + +# CHECK: taget r0, rfsl0 +0x6c 0x00 0x18 0x00 + +# CHECK: tnaget r0, rfsl0 +0x6c 0x00 0x58 0x00 + +# CHECK: tcaget r0, rfsl0 +0x6c 0x00 0x38 0x00 + +# CHECK: tncaget r0, rfsl0 +0x6c 0x00 0x78 0x00 + +# CHECK: eget r0, rfsl0 +0x6c 0x00 0x04 0x00 + +# CHECK: neget r0, rfsl0 +0x6c 0x00 0x44 0x00 + +# CHECK: ecget r0, rfsl0 +0x6c 0x00 0x24 0x00 + +# CHECK: necget r0, rfsl0 +0x6c 0x00 0x64 0x00 + +# CHECK: teget r0, rfsl0 +0x6c 0x00 0x14 0x00 + +# CHECK: tneget r0, rfsl0 +0x6c 0x00 0x54 0x00 + +# CHECK: tecget r0, rfsl0 +0x6c 0x00 0x34 0x00 + +# CHECK: tnecget r0, rfsl0 +0x6c 0x00 0x74 0x00 + +# CHECK: eaget r0, rfsl0 +0x6c 0x00 0x0c 0x00 + +# CHECK: neaget r0, rfsl0 +0x6c 0x00 0x4c 0x00 + +# CHECK: ecaget r0, rfsl0 +0x6c 0x00 0x2c 0x00 + +# CHECK: necaget r0, rfsl0 +0x6c 0x00 0x6c 0x00 + +# CHECK: teaget r0, rfsl0 +0x6c 0x00 0x1c 0x00 + +# CHECK: tneaget r0, rfsl0 +0x6c 0x00 0x5c 0x00 + +# CHECK: tecaget r0, rfsl0 +0x6c 0x00 0x3c 0x00 + +# CHECK: tnecaget r0, rfsl0 +0x6c 0x00 0x7c 0x00 + +# CHECK: getd r0, r1 +0x4c 0x00 0x08 0x00 + +# CHECK: ngetd r0, r1 +0x4c 0x00 0x0a 0x00 + +# CHECK: cgetd r0, r1 +0x4c 0x00 0x09 0x00 + +# CHECK: ncgetd r0, r1 +0x4c 0x00 0x0b 0x00 + +# CHECK: tgetd r0, r1 +0x4c 0x00 0x08 0x80 + +# CHECK: tngetd r0, r1 +0x4c 0x00 0x0a 0x80 + +# CHECK: tcgetd r0, r1 +0x4c 0x00 0x09 0x80 + +# CHECK: tncgetd r0, r1 +0x4c 0x00 0x0b 0x80 + +# CHECK: agetd r0, r1 +0x4c 0x00 0x08 0x40 + +# CHECK: nagetd r0, r1 +0x4c 0x00 0x0a 0x40 + +# CHECK: cagetd r0, r1 +0x4c 0x00 0x09 0x40 + +# CHECK: ncagetd r0, r1 +0x4c 0x00 0x0b 0x40 + +# CHECK: tagetd r0, r1 +0x4c 0x00 0x08 0xc0 + +# CHECK: tnagetd r0, r1 +0x4c 0x00 0x0a 0xc0 + +# CHECK: tcagetd r0, r1 +0x4c 0x00 0x09 0xc0 + +# CHECK: tncagetd r0, r1 +0x4c 0x00 0x0b 0xc0 + +# CHECK: egetd r0, r1 +0x4c 0x00 0x08 0x20 + +# CHECK: negetd r0, r1 +0x4c 0x00 0x0a 0x20 + +# CHECK: ecgetd r0, r1 +0x4c 0x00 0x09 0x20 + +# CHECK: necgetd r0, r1 +0x4c 0x00 0x0b 0x20 + +# CHECK: tegetd r0, r1 +0x4c 0x00 0x08 0xa0 + +# CHECK: tnegetd r0, r1 +0x4c 0x00 0x0a 0xa0 + +# CHECK: tecgetd r0, r1 +0x4c 0x00 0x09 0xa0 + +# CHECK: tnecgetd r0, r1 +0x4c 0x00 0x0b 0xa0 + +# CHECK: eagetd r0, r1 +0x4c 0x00 0x08 0x60 + +# CHECK: neagetd r0, r1 +0x4c 0x00 0x0a 0x60 + +# CHECK: ecagetd r0, r1 +0x4c 0x00 0x09 0x60 + +# CHECK: necagetd r0, r1 +0x4c 0x00 0x0b 0x60 + +# CHECK: teagetd r0, r1 +0x4c 0x00 0x08 0xe0 + +# CHECK: tneagetd r0, r1 +0x4c 0x00 0x0a 0xe0 + +# CHECK: tecagetd r0, r1 +0x4c 0x00 0x09 0xe0 + +# CHECK: tnecagetd r0, r1 +0x4c 0x00 0x0b 0xe0 + +# CHECK: put r0, rfsl0 +0x6c 0x00 0x80 0x00 + +# CHECK: aput r0, rfsl0 +0x6c 0x00 0x88 0x00 + +# CHECK: cput r0, rfsl0 +0x6c 0x00 0xa0 0x00 + +# CHECK: caput r0, rfsl0 +0x6c 0x00 0xa8 0x00 + +# CHECK: nput r0, rfsl0 +0x6c 0x00 0xc0 0x00 + +# CHECK: naput r0, rfsl0 +0x6c 0x00 0xc8 0x00 + +# CHECK: ncput r0, rfsl0 +0x6c 0x00 0xe0 0x00 + +# CHECK: ncaput r0, rfsl0 +0x6c 0x00 0xe8 0x00 + +# CHECK: tput rfsl0 +0x6c 0x00 0x90 0x00 + +# CHECK: taput rfsl0 +0x6c 0x00 0x98 0x00 + +# CHECK: tcput rfsl0 +0x6c 0x00 0xb0 0x00 + +# CHECK: tcaput rfsl0 +0x6c 0x00 0xb8 0x00 + +# CHECK: tnput rfsl0 +0x6c 0x00 0xd0 0x00 + +# CHECK: tnaput rfsl0 +0x6c 0x00 0xd8 0x00 + +# CHECK: tncput rfsl0 +0x6c 0x00 0xf0 0x00 + +# CHECK: tncaput rfsl0 +0x6c 0x00 0xf8 0x00 + +# CHECK: putd r0, r1 +0x4c 0x00 0x0c 0x00 + +# CHECK: aputd r0, r1 +0x4c 0x00 0x0c 0x40 + +# CHECK: cputd r0, r1 +0x4c 0x00 0x0d 0x00 + +# CHECK: caputd r0, r1 +0x4c 0x00 0x0d 0x40 + +# CHECK: nputd r0, r1 +0x4c 0x00 0x0e 0x00 + +# CHECK: naputd r0, r1 +0x4c 0x00 0x0e 0x40 + +# CHECK: ncputd r0, r1 +0x4c 0x00 0x0f 0x00 + +# CHECK: ncaputd r0, r1 +0x4c 0x00 0x0f 0x40 + +# CHECK: tputd r1 +0x4c 0x00 0x0c 0x80 + +# CHECK: taputd r1 +0x4c 0x00 0x0c 0xc0 + +# CHECK: tcputd r1 +0x4c 0x00 0x0d 0x80 + +# CHECK: tcaputd r1 +0x4c 0x00 0x0d 0xc0 + +# CHECK: tnputd r1 +0x4c 0x00 0x0e 0x80 + +# CHECK: tnaputd r1 +0x4c 0x00 0x0e 0xc0 + +# CHECK: tncputd r1 +0x4c 0x00 0x0f 0x80 + +# CHECK: tncaputd r1 +0x4c 0x00 0x0f 0xc0 + +# CHECK: get r0, rfsl1 +0x6c 0x00 0x00 0x01 + +# CHECK: get r0, rfsl2 +0x6c 0x00 0x00 0x02 + +# CHECK: get r0, rfsl3 +0x6c 0x00 0x00 0x03 + +# CHECK: get r0, rfsl4 +0x6c 0x00 0x00 0x04 + +# CHECK: get r0, rfsl5 +0x6c 0x00 0x00 0x05 + +# CHECK: get r0, rfsl6 +0x6c 0x00 0x00 0x06 + +# CHECK: get r0, rfsl7 +0x6c 0x00 0x00 0x07 + +# CHECK: get r0, rfsl8 +0x6c 0x00 0x00 0x08 + +# CHECK: get r0, rfsl9 +0x6c 0x00 0x00 0x09 + +# CHECK: get r0, rfsl10 +0x6c 0x00 0x00 0x0a + +# CHECK: get r0, rfsl11 +0x6c 0x00 0x00 0x0b + +# CHECK: get r0, rfsl12 +0x6c 0x00 0x00 0x0c + +# CHECK: get r0, rfsl13 +0x6c 0x00 0x00 0x0d + +# CHECK: get r0, rfsl14 +0x6c 0x00 0x00 0x0e + +# CHECK: get r0, rfsl15 +0x6c 0x00 0x00 0x0f diff --git a/test/MC/Disassembler/MBlaze/mblaze_imm.txt b/test/MC/Disassembler/MBlaze/mblaze_imm.txt new file mode 100644 index 0000000..3833ea8 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_imm.txt @@ -0,0 +1,121 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# IMM instruction processing +################################################################################ + +# CHECK: addi r0, r0, 0 +0x20 0x00 0x00 0x00 + +# CHECK: addi r0, r0, 1 +0x20 0x00 0x00 0x01 + +# CHECK: addi r0, r0, 2 +0x20 0x00 0x00 0x02 + +# CHECK: addi r0, r0, 4 +0x20 0x00 0x00 0x04 + +# CHECK: addi r0, r0, 8 +0x20 0x00 0x00 0x08 + +# CHECK: addi r0, r0, 16 +0x20 0x00 0x00 0x10 + +# CHECK: addi r0, r0, 32 +0x20 0x00 0x00 0x20 + +# CHECK: addi r0, r0, 64 +0x20 0x00 0x00 0x40 + +# CHECK: addi r0, r0, 128 +0x20 0x00 0x00 0x80 + +# CHECK: addi r0, r0, 256 +0x20 0x00 0x01 0x00 + +# CHECK: addi r0, r0, 512 +0x20 0x00 0x02 0x00 + +# CHECK: addi r0, r0, 1024 +0x20 0x00 0x04 0x00 + +# CHECK: addi r0, r0, 2048 +0x20 0x00 0x08 0x00 + +# CHECK: addi r0, r0, 4096 +0x20 0x00 0x10 0x00 + +# CHECK: addi r0, r0, 8192 +0x20 0x00 0x20 0x00 + +# CHECK: addi r0, r0, 16384 +0x20 0x00 0x40 0x00 + +# CHECK: imm 0 +# CHECK: addi r0, r0, -32768 +0xb0 0x00 0x00 0x00 0x20 0x00 0x80 0x00 + +# CHECK: imm 1 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x01 0x20 0x00 0x00 0x00 + +# CHECK: imm 2 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x02 0x20 0x00 0x00 0x00 + +# CHECK: imm 4 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x04 0x20 0x00 0x00 0x00 + +# CHECK: imm 8 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x08 0x20 0x00 0x00 0x00 + +# CHECK: imm 16 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x10 0x20 0x00 0x00 0x00 + +# CHECK: imm 32 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x20 0x20 0x00 0x00 0x00 + +# CHECK: imm 64 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x40 0x20 0x00 0x00 0x00 + +# CHECK: imm 128 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x80 0x20 0x00 0x00 0x00 + +# CHECK: imm 256 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x01 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 512 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x02 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 1024 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x04 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 2048 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x08 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 4096 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x10 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 8192 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x20 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 16384 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x40 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm -32768 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x80 0x00 0x20 0x00 0x00 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_memory.txt b/test/MC/Disassembler/MBlaze/mblaze_memory.txt new file mode 100644 index 0000000..584d61c --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_memory.txt @@ -0,0 +1,65 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Memory instructions +################################################################################ + +# CHECK: lbu r1, r2, r3 +0xc0 0x22 0x18 0x00 + +# CHECK: lbur r1, r2, r3 +0xc0 0x22 0x1a 0x00 + +# CHECK: lbui r1, r2, 28 +0xe0 0x22 0x00 0x1c + +# CHECK: lhu r1, r2, r3 +0xc4 0x22 0x18 0x00 + +# CHECK: lhur r1, r2, r3 +0xc4 0x22 0x1a 0x00 + +# CHECK: lhui r1, r2, 28 +0xe4 0x22 0x00 0x1c + +# CHECK: lw r1, r2, r3 +0xc8 0x22 0x18 0x00 + +# CHECK: lwr r1, r2, r3 +0xc8 0x22 0x1a 0x00 + +# CHECK: lwi r1, r2, 28 +0xe8 0x22 0x00 0x1c + +# CHECK: lwx r1, r2, r3 +0xc8 0x22 0x1c 0x00 + +# CHECK: sb r1, r2, r3 +0xd0 0x22 0x18 0x00 + +# CHECK: sbr r1, r2, r3 +0xd0 0x22 0x1a 0x00 + +# CHECK: sbi r1, r2, 28 +0xf0 0x22 0x00 0x1c + +# CHECK: sh r1, r2, r3 +0xd4 0x22 0x18 0x00 + +# CHECK: shr r1, r2, r3 +0xd4 0x22 0x1a 0x00 + +# CHECK: shi r1, r2, 28 +0xf4 0x22 0x00 0x1c + +# CHECK: sw r1, r2, r3 +0xd8 0x22 0x18 0x00 + +# CHECK: swr r1, r2, r3 +0xd8 0x22 0x1a 0x00 + +# CHECK: swi r1, r2, 28 +0xf8 0x22 0x00 0x1c + +# CHECK: swx r1, r2, r3 +0xd8 0x22 0x1c 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_operands.txt b/test/MC/Disassembler/MBlaze/mblaze_operands.txt new file mode 100644 index 0000000..f0304b1 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_operands.txt @@ -0,0 +1,197 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Operands disassembly +################################################################################ + +# CHECK: add r0, r0, r0 +0x00 0x00 0x00 0x00 + +# CHECK: add r1, r1, r1 +0x00 0x21 0x08 0x00 + +# CHECK: add r2, r2, r2 +0x00 0x42 0x10 0x00 + +# CHECK: add r3, r3, r3 +0x00 0x63 0x18 0x00 + +# CHECK: add r4, r4, r4 +0x00 0x84 0x20 0x00 + +# CHECK: add r5, r5, r5 +0x00 0xa5 0x28 0x00 + +# CHECK: add r6, r6, r6 +0x00 0xc6 0x30 0x00 + +# CHECK: add r7, r7, r7 +0x00 0xe7 0x38 0x00 + +# CHECK: add r8, r8, r8 +0x01 0x08 0x40 0x00 + +# CHECK: add r9, r9, r9 +0x01 0x29 0x48 0x00 + +# CHECK: add r10, r10, r10 +0x01 0x4a 0x50 0x00 + +# CHECK: add r11, r11, r11 +0x01 0x6b 0x58 0x00 + +# CHECK: add r12, r12, r12 +0x01 0x8c 0x60 0x00 + +# CHECK: add r13, r13, r13 +0x01 0xad 0x68 0x00 + +# CHECK: add r14, r14, r14 +0x01 0xce 0x70 0x00 + +# CHECK: add r15, r15, r15 +0x01 0xef 0x78 0x00 + +# CHECK: add r16, r16, r16 +0x02 0x10 0x80 0x00 + +# CHECK: add r17, r17, r17 +0x02 0x31 0x88 0x00 + +# CHECK: add r18, r18, r18 +0x02 0x52 0x90 0x00 + +# CHECK: add r19, r19, r19 +0x02 0x73 0x98 0x00 + +# CHECK: add r20, r20, r20 +0x02 0x94 0xa0 0x00 + +# CHECK: add r21, r21, r21 +0x02 0xb5 0xa8 0x00 + +# CHECK: add r22, r22, r22 +0x02 0xd6 0xb0 0x00 + +# CHECK: add r23, r23, r23 +0x02 0xf7 0xb8 0x00 + +# CHECK: add r24, r24, r24 +0x03 0x18 0xc0 0x00 + +# CHECK: add r25, r25, r25 +0x03 0x39 0xc8 0x00 + +# CHECK: add r26, r26, r26 +0x03 0x5a 0xd0 0x00 + +# CHECK: add r27, r27, r27 +0x03 0x7b 0xd8 0x00 + +# CHECK: add r28, r28, r28 +0x03 0x9c 0xe0 0x00 + +# CHECK: add r29, r29, r29 +0x03 0xbd 0xe8 0x00 + +# CHECK: add r30, r30, r30 +0x03 0xde 0xf0 0x00 + +# CHECK: add r31, r31, r31 +0x03 0xff 0xf8 0x00 + +# CHECK: addi r0, r0, 0 +0x20 0x00 0x00 0x00 + +# CHECK: addi r0, r0, 1 +0x20 0x00 0x00 0x01 + +# CHECK: addi r0, r0, 2 +0x20 0x00 0x00 0x02 + +# CHECK: addi r0, r0, 4 +0x20 0x00 0x00 0x04 + +# CHECK: addi r0, r0, 8 +0x20 0x00 0x00 0x08 + +# CHECK: addi r0, r0, 16 +0x20 0x00 0x00 0x10 + +# CHECK: addi r0, r0, 32 +0x20 0x00 0x00 0x20 + +# CHECK: addi r0, r0, 64 +0x20 0x00 0x00 0x40 + +# CHECK: addi r0, r0, 128 +0x20 0x00 0x00 0x80 + +# CHECK: addi r0, r0, 256 +0x20 0x00 0x01 0x00 + +# CHECK: addi r0, r0, 512 +0x20 0x00 0x02 0x00 + +# CHECK: addi r0, r0, 1024 +0x20 0x00 0x04 0x00 + +# CHECK: addi r0, r0, 2048 +0x20 0x00 0x08 0x00 + +# CHECK: addi r0, r0, 4096 +0x20 0x00 0x10 0x00 + +# CHECK: addi r0, r0, 8192 +0x20 0x00 0x20 0x00 + +# CHECK: addi r0, r0, 16384 +0x20 0x00 0x40 0x00 + +# CHECK: addi r0, r0, -1 +0x20 0x00 0xff 0xff + +# CHECK: addi r0, r0, -2 +0x20 0x00 0xff 0xfe + +# CHECK: addi r0, r0, -4 +0x20 0x00 0xff 0xfc + +# CHECK: addi r0, r0, -8 +0x20 0x00 0xff 0xf8 + +# CHECK: addi r0, r0, -16 +0x20 0x00 0xff 0xf0 + +# CHECK: addi r0, r0, -32 +0x20 0x00 0xff 0xe0 + +# CHECK: addi r0, r0, -64 +0x20 0x00 0xff 0xc0 + +# CHECK: addi r0, r0, -128 +0x20 0x00 0xff 0x80 + +# CHECK: addi r0, r0, -256 +0x20 0x00 0xff 0x00 + +# CHECK: addi r0, r0, -512 +0x20 0x00 0xfe 0x00 + +# CHECK: addi r0, r0, -1024 +0x20 0x00 0xfc 0x00 + +# CHECK: addi r0, r0, -2048 +0x20 0x00 0xf8 0x00 + +# CHECK: addi r0, r0, -4096 +0x20 0x00 0xf0 0x00 + +# CHECK: addi r0, r0, -8192 +0x20 0x00 0xe0 0x00 + +# CHECK: addi r0, r0, -16384 +0x20 0x00 0xc0 0x00 + +# CHECK: addi r0, r0, -32768 +0x20 0x00 0x80 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_pattern.txt b/test/MC/Disassembler/MBlaze/mblaze_pattern.txt new file mode 100644 index 0000000..1268378 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_pattern.txt @@ -0,0 +1,14 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Pattern instructions +################################################################################ + +# CHECK: pcmpbf r0, r1, r2 +0x80 0x01 0x14 0x00 + +# CHECK: pcmpne r0, r1, r2 +0x8c 0x01 0x14 0x00 + +# CHECK: pcmpeq r0, r1, r2 +0x88 0x01 0x14 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_shift.txt b/test/MC/Disassembler/MBlaze/mblaze_shift.txt new file mode 100644 index 0000000..2783ffc --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_shift.txt @@ -0,0 +1,29 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Shift instructions +################################################################################ + +# CHECK: bsrl r1, r2, r3 +0x44 0x22 0x18 0x00 + +# CHECK: bsra r1, r2, r3 +0x44 0x22 0x1a 0x00 + +# CHECK: bsll r1, r2, r3 +0x44 0x22 0x1c 0x00 + +# CHECK: bsrli r1, r2, 0 +0x64 0x22 0x00 0x00 + +# CHECK: bsrai r1, r2, 0 +0x64 0x22 0x02 0x00 + +# CHECK: bslli r1, r2, 0 +0x64 0x22 0x04 0x00 + +# CHECK: sra r1, r2 +0x90 0x22 0x00 0x01 + +# CHECK: srl r1, r2 +0x90 0x22 0x00 0x41 diff --git a/test/MC/Disassembler/MBlaze/mblaze_special.txt b/test/MC/Disassembler/MBlaze/mblaze_special.txt new file mode 100644 index 0000000..a808cc9 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_special.txt @@ -0,0 +1,105 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Special instructions +################################################################################ + +# CHECK: mfs r0, rpc +0x94 0x00 0x80 0x00 + +# CHECK: msrclr r0, 0 +0x94 0x11 0x00 0x00 + +# CHECK: msrset r0, 0 +0x94 0x10 0x00 0x00 + +# CHECK: mts rpc, r0 +0x94 0x00 0xc0 0x00 + +# CHECK: wdc r0, r1 +0x90 0x00 0x08 0x64 + +# CHECK: wdc.clear r0, r1 +0x90 0x00 0x08 0x66 + +# CHECK: wdc.flush r0, r1 +0x90 0x00 0x08 0x74 + +# CHECK: wic r0, r1 +0x90 0x00 0x08 0x68 + +################################################################################ +# Special registers +################################################################################ + +# CHECK: mfs r1, rpc +0x94 0x20 0x80 0x00 + +# CHECK: mfs r1, rmsr +0x94 0x20 0x80 0x01 + +# CHECK: mfs r1, rear +0x94 0x20 0x80 0x03 + +# CHECK: mfs r1, resr +0x94 0x20 0x80 0x05 + +# CHECK: mfs r1, rfsr +0x94 0x20 0x80 0x07 + +# CHECK: mfs r1, rbtr +0x94 0x20 0x80 0x0b + +# CHECK: mfs r1, redr +0x94 0x20 0x80 0x0d + +# CHECK: mfs r1, rpid +0x94 0x20 0x90 0x00 + +# CHECK: mfs r1, rzpr +0x94 0x20 0x90 0x01 + +# CHECK: mfs r1, rtlbx +0x94 0x20 0x90 0x02 + +# CHECK: mfs r1, rtlbhi +0x94 0x20 0x90 0x04 + +# CHECK: mfs r1, rtlblo +0x94 0x20 0x90 0x03 + +# CHECK: mfs r1, rpvr0 +0x94 0x20 0xa0 0x00 + +# CHECK: mfs r1, rpvr1 +0x94 0x20 0xa0 0x01 + +# CHECK: mfs r1, rpvr2 +0x94 0x20 0xa0 0x02 + +# CHECK: mfs r1, rpvr3 +0x94 0x20 0xa0 0x03 + +# CHECK: mfs r1, rpvr4 +0x94 0x20 0xa0 0x04 + +# CHECK: mfs r1, rpvr5 +0x94 0x20 0xa0 0x05 + +# CHECK: mfs r1, rpvr6 +0x94 0x20 0xa0 0x06 + +# CHECK: mfs r1, rpvr7 +0x94 0x20 0xa0 0x07 + +# CHECK: mfs r1, rpvr8 +0x94 0x20 0xa0 0x08 + +# CHECK: mfs r1, rpvr9 +0x94 0x20 0xa0 0x09 + +# CHECK: mfs r1, rpvr10 +0x94 0x20 0xa0 0x0a + +# CHECK: mfs r1, rpvr11 +0x94 0x20 0xa0 0x0b diff --git a/test/MC/Disassembler/MBlaze/mblaze_typea.txt b/test/MC/Disassembler/MBlaze/mblaze_typea.txt new file mode 100644 index 0000000..ce99950 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_typea.txt @@ -0,0 +1,74 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# TYPE A instructions +################################################################################ + +# CHECK: add r1, r2, r3 +0x00 0x22 0x18 0x00 + +# CHECK: addc r1, r2, r3 +0x08 0x22 0x18 0x00 + +# CHECK: addk r1, r2, r3 +0x10 0x22 0x18 0x00 + +# CHECK: addkc r1, r2, r3 +0x18 0x22 0x18 0x00 + +# CHECK: and r1, r2, r3 +0x84 0x22 0x18 0x00 + +# CHECK: andn r1, r2, r3 +0x8c 0x22 0x18 0x00 + +# CHECK: cmp r1, r2, r3 +0x14 0x22 0x18 0x01 + +# CHECK: cmpu r1, r2, r3 +0x14 0x22 0x18 0x03 + +# CHECK: idiv r1, r2, r3 +0x48 0x22 0x18 0x00 + +# CHECK: idivu r1, r2, r3 +0x48 0x22 0x18 0x02 + +# CHECK: mul r1, r2, r3 +0x40 0x22 0x18 0x00 + +# CHECK: mulh r1, r2, r3 +0x40 0x22 0x18 0x01 + +# CHECK: mulhu r1, r2, r3 +0x40 0x22 0x18 0x03 + +# CHECK: mulhsu r1, r2, r3 +0x40 0x22 0x18 0x02 + +# CHECK: or r1, r2, r3 +0x80 0x22 0x18 0x00 + +# CHECK: rsub r1, r2, r3 +0x04 0x22 0x18 0x00 + +# CHECK: rsubc r1, r2, r3 +0x0c 0x22 0x18 0x00 + +# CHECK: rsubk r1, r2, r3 +0x14 0x22 0x18 0x00 + +# CHECK: rsubkc r1, r2, r3 +0x1c 0x22 0x18 0x00 + +# CHECK: sext16 r1, r2 +0x90 0x22 0x00 0x61 + +# CHECK: sext8 r1, r2 +0x90 0x22 0x00 0x60 + +# CHECK: xor r1, r2, r3 +0x88 0x22 0x18 0x00 + +# CHECK: or r0, r0, r0 +0x80 0x00 0x00 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_typeb.txt b/test/MC/Disassembler/MBlaze/mblaze_typeb.txt new file mode 100644 index 0000000..99782ac --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_typeb.txt @@ -0,0 +1,56 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# TYPE B instructions +################################################################################ + +# CHECK: addi r1, r2, 15 +0x20 0x22 0x00 0x0f + +# CHECK: addic r1, r2, 15 +0x28 0x22 0x00 0x0f + +# CHECK: addik r1, r2, 15 +0x30 0x22 0x00 0x0f + +# CHECK: addikc r1, r2, 15 +0x38 0x22 0x00 0x0f + +# CHECK: andi r1, r2, 15 +0xa4 0x22 0x00 0x0f + +# CHECK: andni r1, r2, 15 +0xac 0x22 0x00 0x0f + +# CHECK: muli r1, r2, 15 +0x60 0x22 0x00 0x0f + +# CHECK: ori r1, r2, 15 +0xa0 0x22 0x00 0x0f + +# CHECK: rsubi r1, r2, 15 +0x24 0x22 0x00 0x0f + +# CHECK: rsubic r1, r2, 15 +0x2c 0x22 0x00 0x0f + +# CHECK: rsubik r1, r2, 15 +0x34 0x22 0x00 0x0f + +# CHECK: rsubikc r1, r2, 15 +0x3c 0x22 0x00 0x0f + +# CHECK: rtbd r15, 15 +0xb6 0x4f 0x00 0x0f + +# CHECK: rted r15, 15 +0xb6 0x8f 0x00 0x0f + +# CHECK: rtid r15, 15 +0xb6 0x2f 0x00 0x0f + +# CHECK: rtsd r15, 15 +0xb6 0x0f 0x00 0x0f + +# CHECK: xori r1, r2, 15 +0xa8 0x22 0x00 0x0f diff --git a/test/MC/Disassembler/X86/enhanced.txt b/test/MC/Disassembler/X86/enhanced.txt new file mode 100644 index 0000000..fc69499 --- /dev/null +++ b/test/MC/Disassembler/X86/enhanced.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc --edis %s -triple=x86_64-apple-darwin9 |& FileCheck %s + +# CHECK: [o:jne][w: ][0-p:-][0-l:10=10] <br> 0:[RIP/111](pc)=18446744073709551606 +0x0f 0x85 0xf6 0xff 0xff 0xff +# CHECK: [o:movq][w: ][1-r:%gs=r63][1-p::][1-l:8=8][p:,][w: ][0-r:%rcx=r108] <mov> 0:[RCX/108]=0 1:[GS/63]=8 +0x65 0x48 0x8b 0x0c 0x25 0x08 0x00 0x00 0x00 diff --git a/test/MC/Disassembler/X86/truncated-input.txt b/test/MC/Disassembler/X86/truncated-input.txt new file mode 100644 index 0000000..34cf038 --- /dev/null +++ b/test/MC/Disassembler/X86/truncated-input.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 |& FileCheck %s + +# CHECK: warning +0x00 diff --git a/test/MC/ELF/abs.s b/test/MC/ELF/abs.s index d7fa0c0..c598b11 100644 --- a/test/MC/ELF/abs.s +++ b/test/MC/ELF/abs.s @@ -12,5 +12,5 @@ // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x0000fff1) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) diff --git a/test/MC/ELF/alias-reloc.s b/test/MC/ELF/alias-reloc.s index 6ad1134..c908c12 100644 --- a/test/MC/ELF/alias-reloc.s +++ b/test/MC/ELF/alias-reloc.s @@ -23,8 +23,8 @@ foo2: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK: # Symbol 0x00000006 @@ -33,8 +33,8 @@ foo2: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000004) -// CHECK-NEXT: ('st_value', 0x00000005) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000005) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK: # Relocation 0x00000000 diff --git a/test/MC/ELF/alias.s b/test/MC/ELF/alias.s index 98ef50b..42d54bc 100644 --- a/test/MC/ELF/alias.s +++ b/test/MC/ELF/alias.s @@ -22,8 +22,8 @@ bar4 = foo4 // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000002 // CHECK-NEXT: (('st_name', 0x0000001d) # 'bar4' @@ -31,8 +31,8 @@ bar4 = foo4 // CHECK-NEXT: ('st_type', 0x00000002) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000003 // CHECK-NEXT: (('st_name', 0x00000001) # 'foo' @@ -40,8 +40,8 @@ bar4 = foo4 // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000004 // CHECK-NEXT: (('st_name', 0x0000000e) # 'foo3' @@ -49,8 +49,8 @@ bar4 = foo4 // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000005 // CHECK-NEXT: (('st_name', 0x00000018) # 'foo4' @@ -58,8 +58,8 @@ bar4 = foo4 // CHECK-NEXT: ('st_type', 0x00000002) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000006 // CHECK-NEXT: (('st_name', 0x00000000) # '' @@ -73,13 +73,13 @@ bar4 = foo4 // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK: # Symbol 0x0000000a // CHECK-NEXT: (('st_name', 0x00000009) # 'bar2' // CHECK-NEXT: ('st_bind', 0x00000001) // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) diff --git a/test/MC/ELF/bad-section.s b/test/MC/ELF/bad-section.s new file mode 100644 index 0000000..73d89ce --- /dev/null +++ b/test/MC/ELF/bad-section.s @@ -0,0 +1,9 @@ +// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o /dev/null 2>%t +// RUN: FileCheck --input-file=%t %s + +// CHECK: error: unexpected token in directive +// CHECK: .section "foo"-bar + +// test that we don't accept this, as gas doesn't. + +.section "foo"-bar diff --git a/test/MC/ELF/basic-elf-32.s b/test/MC/ELF/basic-elf-32.s new file mode 100644 index 0000000..fa97da4 --- /dev/null +++ b/test/MC/ELF/basic-elf-32.s @@ -0,0 +1,78 @@ +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .text + .globl main + .align 16, 0x90 + .type main,@function +main: # @main +# BB#0: + subl $4, %esp + movl $.L.str1, (%esp) + calll puts + movl $.L.str2, (%esp) + calll puts + xorl %eax, %eax + addl $4, %esp + ret +.Ltmp0: + .size main, .Ltmp0-main + + .type .L.str1,@object # @.str1 + .section .rodata.str1.1,"aMS",@progbits,1 +.L.str1: + .asciz "Hello" + .size .L.str1, 6 + + .type .L.str2,@object # @.str2 +.L.str2: + .asciz "World!" + .size .L.str2, 7 + + .section .note.GNU-stack,"",@progbits + +// CHECK: ('e_indent[EI_CLASS]', 0x00000001) +// CHECK: ('e_indent[EI_DATA]', 0x00000001) +// CHECK: ('e_indent[EI_VERSION]', 0x00000001) +// CHECK: ('_sections', [ +// CHECK: # Section 0 +// CHECK: (('sh_name', 0x00000000) # '' + +// CHECK: # '.text' + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: # 'main' +// CHECK: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000002) + +// CHECK: # 'puts' +// CHECK: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) + +// CHECK: # '.rel.text' + +// CHECK: ('_relocations', [ +// CHECK: # Relocation 0x00000000 +// CHECK: (('r_offset', 0x00000006) +// CHECK: ('r_type', 0x00000001) +// CHECK: ), +// CHECK: # Relocation 0x00000001 +// CHECK: (('r_offset', 0x0000000b) +// CHECK: ('r_type', 0x00000002) +// CHECK: ), +// CHECK: # Relocation 0x00000002 +// CHECK: (('r_offset', 0x00000012) +// CHECK: ('r_type', 0x00000001) +// CHECK: ), +// CHECK: # Relocation 0x00000003 +// CHECK: (('r_offset', 0x00000017) +// CHECK: ('r_type', 0x00000002) +// CHECK: ), +// CHECK: ]) diff --git a/test/MC/ELF/basic-elf-64.s b/test/MC/ELF/basic-elf-64.s new file mode 100644 index 0000000..7fc40b7 --- /dev/null +++ b/test/MC/ELF/basic-elf-64.s @@ -0,0 +1,82 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .text + .globl main + .align 16, 0x90 + .type main,@function +main: # @main +# BB#0: + subq $8, %rsp + movl $.L.str1, %edi + callq puts + movl $.L.str2, %edi + callq puts + xorl %eax, %eax + addq $8, %rsp + ret +.Ltmp0: + .size main, .Ltmp0-main + + .type .L.str1,@object # @.str1 + .section .rodata.str1.1,"aMS",@progbits,1 +.L.str1: + .asciz "Hello" + .size .L.str1, 6 + + .type .L.str2,@object # @.str2 +.L.str2: + .asciz "World!" + .size .L.str2, 7 + + .section .note.GNU-stack,"",@progbits + +// CHECK: ('e_indent[EI_CLASS]', 0x00000002) +// CHECK: ('e_indent[EI_DATA]', 0x00000001) +// CHECK: ('e_indent[EI_VERSION]', 0x00000001) +// CHECK: ('_sections', [ +// CHECK: # Section 0 +// CHECK: (('sh_name', 0x00000000) # '' + +// CHECK: # '.text' + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: # 'main' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000002) + +// CHECK: # 'puts' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) + +// CHECK: # '.rela.text' + +// CHECK: ('_relocations', [ +// CHECK: # Relocation 0x00000000 +// CHECK: (('r_offset', 0x00000005) +// CHECK: ('r_type', 0x0000000a) +// CHECK: ('r_addend', 0x00000000) +// CHECK: ), +// CHECK: # Relocation 0x00000001 +// CHECK: (('r_offset', 0x0000000a) +// CHECK: ('r_type', 0x00000002) +// CHECK: ('r_addend', 0xfffffffc) +// CHECK: ), +// CHECK: # Relocation 0x00000002 +// CHECK: (('r_offset', 0x0000000f) +// CHECK: ('r_type', 0x0000000a) +// CHECK: ('r_addend', 0x00000006) +// CHECK: ), +// CHECK: # Relocation 0x00000003 +// CHECK: (('r_offset', 0x00000014) +// CHECK: ('r_type', 0x00000002) +// CHECK: ('r_addend', 0xfffffffc) +// CHECK: ), +// CHECK: ]) diff --git a/test/MC/ELF/basic-elf.ll b/test/MC/ELF/basic-elf.ll deleted file mode 100644 index f478b32..0000000 --- a/test/MC/ELF/basic-elf.ll +++ /dev/null @@ -1,111 +0,0 @@ -; RUN: llc -filetype=obj -mtriple i686-pc-linux-gnu %s -o - | elf-dump | FileCheck -check-prefix=32 %s -; RUN: llc -filetype=obj -mtriple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck -check-prefix=64 %s - -@.str1 = private constant [6 x i8] c"Hello\00" -@.str2 = private constant [7 x i8] c"World!\00" - -define i32 @main() nounwind { - %1 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) - %2 = call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @.str2, i32 0, i32 0)) - ret i32 0 -} - -declare i32 @puts(i8* nocapture) nounwind - -; 32: ('e_indent[EI_CLASS]', 0x00000001) -; 32: ('e_indent[EI_DATA]', 0x00000001) -; 32: ('e_indent[EI_VERSION]', 0x00000001) -; 32: ('_sections', [ -; 32: # Section 0 -; 32: (('sh_name', 0x00000000) # '' - -; 32: # '.text' - -; 32: ('st_bind', 0x00000000) -; 32: ('st_type', 0x00000003) - -; 32: ('st_bind', 0x00000000) -; 32: ('st_type', 0x00000003) - -; 32: ('st_bind', 0x00000000) -; 32: ('st_type', 0x00000003) - -; 32: # 'main' -; 32: ('st_bind', 0x00000001) -; 32-NEXT: ('st_type', 0x00000002) - -; 32: # 'puts' -; 32: ('st_bind', 0x00000001) -; 32-NEXT: ('st_type', 0x00000000) - -; 32: # '.rel.text' - -; 32: ('_relocations', [ -; 32: # Relocation 0x00000000 -; 32: (('r_offset', 0x00000006) -; 32: ('r_type', 0x00000001) -; 32: ), -; 32: # Relocation 0x00000001 -; 32: (('r_offset', 0x0000000b) -; 32: ('r_type', 0x00000002) -; 32: ), -; 32: # Relocation 0x00000002 -; 32: (('r_offset', 0x00000012) -; 32: ('r_type', 0x00000001) -; 32: ), -; 32: # Relocation 0x00000003 -; 32: (('r_offset', 0x00000017) -; 32: ('r_type', 0x00000002) -; 32: ), -; 32: ]) - -; 64: ('e_indent[EI_CLASS]', 0x00000002) -; 64: ('e_indent[EI_DATA]', 0x00000001) -; 64: ('e_indent[EI_VERSION]', 0x00000001) -; 64: ('_sections', [ -; 64: # Section 0 -; 64: (('sh_name', 0x00000000) # '' - -; 64: # '.text' - -; 64: ('st_bind', 0x00000000) -; 64: ('st_type', 0x00000003) - -; 64: ('st_bind', 0x00000000) -; 64: ('st_type', 0x00000003) - -; 64: ('st_bind', 0x00000000) -; 64: ('st_type', 0x00000003) - -; 64: # 'main' -; 64-NEXT: ('st_bind', 0x00000001) -; 64-NEXT: ('st_type', 0x00000002) - -; 64: # 'puts' -; 64-NEXT: ('st_bind', 0x00000001) -; 64-NEXT: ('st_type', 0x00000000) - -; 64: # '.rela.text' - -; 64: ('_relocations', [ -; 64: # Relocation 0x00000000 -; 64: (('r_offset', 0x00000005) -; 64: ('r_type', 0x0000000a) -; 64: ('r_addend', 0x00000000) -; 64: ), -; 64: # Relocation 0x00000001 -; 64: (('r_offset', 0x0000000a) -; 64: ('r_type', 0x00000002) -; 64: ('r_addend', 0xfffffffc) -; 64: ), -; 64: # Relocation 0x00000002 -; 64: (('r_offset', 0x0000000f) -; 64: ('r_type', 0x0000000a) -; 64: ('r_addend', 0x00000006) -; 64: ), -; 64: # Relocation 0x00000003 -; 64: (('r_offset', 0x00000014) -; 64: ('r_type', 0x00000002) -; 64: ('r_addend', 0xfffffffc) -; 64: ), -; 64: ]) diff --git a/test/MC/ELF/bracket-exprs.s b/test/MC/ELF/bracket-exprs.s new file mode 100644 index 0000000..96f9f9a --- /dev/null +++ b/test/MC/ELF/bracket-exprs.s @@ -0,0 +1,15 @@ +// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +// CHECK: .byte 1 +.if [~0 >> 1] == -1 +.byte 1 +.else +.byte 2 +.endif + +// CHECK: .byte 3 +.if 4 * [4 + (3 + [2 * 2] + 1)] == 48 +.byte 3 +.else +.byte 4 +.endif diff --git a/test/MC/ELF/bracket.s b/test/MC/ELF/bracket.s new file mode 100644 index 0000000..702e309 --- /dev/null +++ b/test/MC/ELF/bracket.s @@ -0,0 +1,8 @@ +// RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t1 > %t2 +// RUN: FileCheck < %t1 %s + +// CHECK: error: expected ']' in brackets expression +.size x, [.-x) + +// CHECK: error: expected ')' in parentheses expression +.size y, (.-y] diff --git a/test/MC/ELF/call-abs.s b/test/MC/ELF/call-abs.s new file mode 100644 index 0000000..885c2d1 --- /dev/null +++ b/test/MC/ELF/call-abs.s @@ -0,0 +1,24 @@ +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .text + .globl f + .type f,@function +f: # @f +# BB#0: # %entry + subl $4, %esp + calll 42 + incl %eax + addl $4, %esp + ret +.Ltmp0: + .size f, .Ltmp0-f + + .section .note.GNU-stack,"",@progbits + +// CHECK: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000004) +// CHECK-NEXT: ('r_sym', 0x00000000) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/ELF/cfi-advance-loc2.s b/test/MC/ELF/cfi-advance-loc2.s new file mode 100644 index 0000000..3ffdd6c --- /dev/null +++ b/test/MC/ELF/cfi-advance-loc2.s @@ -0,0 +1,45 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// test that this produces a correctly encoded cfi_advance_loc2 + +f: + .cfi_startproc + nop + .zero 255, 0x90 + .cfi_def_cfa_offset 8 + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000148) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 01010000 00030001 0e080000') +// CHECK-NEXT: ), + + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000258) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-def-cfa-offset.s b/test/MC/ELF/cfi-def-cfa-offset.s new file mode 100644 index 0000000..efefb87 --- /dev/null +++ b/test/MC/ELF/cfi-def-cfa-offset.s @@ -0,0 +1,46 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + subq $8, %rsp + .cfi_def_cfa_offset 16 + nop + addq $8, %rsp + .cfi_def_cfa_offset 8 + ret + .cfi_endproc + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 0a000000 00440e10 450e0800') +// CHECK-NEXT: ), + +// CHECK: # Section 0x00000008 +// CHECK-NEXT: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000160) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-def-cfa-register.s b/test/MC/ELF/cfi-def-cfa-register.s new file mode 100644 index 0000000..3df2021 --- /dev/null +++ b/test/MC/ELF/cfi-def-cfa-register.s @@ -0,0 +1,41 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_def_cfa_register 6 + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410d06 00000000') +// CHECK-NEXT: ), + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000158) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-def-cfa.s b/test/MC/ELF/cfi-def-cfa.s new file mode 100644 index 0000000..1ad427b --- /dev/null +++ b/test/MC/ELF/cfi-def-cfa.s @@ -0,0 +1,42 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_def_cfa 7, 8 + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410c07 08000000') +// CHECK-NEXT: ), + + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000158) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-offset.s b/test/MC/ELF/cfi-offset.s new file mode 100644 index 0000000..2f7e797 --- /dev/null +++ b/test/MC/ELF/cfi-offset.s @@ -0,0 +1,42 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_offset %ebp, -16 + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00418602 00000000') +// CHECK-NEXT: ), + + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000158) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-remember.s b/test/MC/ELF/cfi-remember.s new file mode 100644 index 0000000..b5b3803 --- /dev/null +++ b/test/MC/ELF/cfi-remember.s @@ -0,0 +1,45 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_remember_state + nop + .cfi_restore_state + nop + .cfi_endproc + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 03000000 00410a41 0b000000') +// CHECK-NEXT: ), + +// CHECK: # Section 0x00000008 +// CHECK-NEXT: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000158) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-zero-addr-delta.s b/test/MC/ELF/cfi-zero-addr-delta.s new file mode 100644 index 0000000..5585e29 --- /dev/null +++ b/test/MC/ELF/cfi-zero-addr-delta.s @@ -0,0 +1,48 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we don't produce a DW_CFA_advance_loc 0 + +f: + .cfi_startproc + nop + .cfi_def_cfa_offset 16 + nop + .cfi_remember_state + .cfi_def_cfa_offset 8 + nop + .cfi_restore_state + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000038) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 1c000000 1c000000 00000000 04000000 00410e10 410a0e08 410b0000 00000000') +// CHECK-NEXT: ), + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000160) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi.s b/test/MC/ELF/cfi.s new file mode 100644 index 0000000..93fd2e7 --- /dev/null +++ b/test/MC/ELF/cfi.s @@ -0,0 +1,674 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f1: + .cfi_startproc + .cfi_lsda 0x3, bar + nop + .cfi_endproc + +f2: + .cfi_startproc + .cfi_personality 0x00, foo + .cfi_lsda 0x3, bar + nop + .cfi_endproc + +f3: + .cfi_startproc + .cfi_lsda 0x3, bar + nop + .cfi_endproc + +f4: + .cfi_startproc + .cfi_personality 0x00, foo + .cfi_lsda 0x2, bar + nop + .cfi_endproc + +f5: + .cfi_startproc + .cfi_personality 0x02, foo + nop + .cfi_endproc + +f6: + .cfi_startproc + .cfi_personality 0x03, foo + nop + .cfi_endproc + +f7: + .cfi_startproc + .cfi_personality 0x04, foo + nop + .cfi_endproc + +f8: + .cfi_startproc + .cfi_personality 0x0a, foo + nop + .cfi_endproc + +f9: + .cfi_startproc + .cfi_personality 0x0b, foo + nop + .cfi_endproc + +f10: + .cfi_startproc + .cfi_personality 0x0c, foo + nop + .cfi_endproc + +f11: + .cfi_startproc + .cfi_personality 0x08, foo + nop + .cfi_endproc + +f12: + .cfi_startproc + .cfi_personality 0x10, foo + nop + .cfi_endproc + +f13: + .cfi_startproc + .cfi_personality 0x12, foo + nop + .cfi_endproc + +f14: + .cfi_startproc + .cfi_personality 0x13, foo + nop + .cfi_endproc + +f15: + .cfi_startproc + .cfi_personality 0x14, foo + nop + .cfi_endproc + +f16: + .cfi_startproc + .cfi_personality 0x1a, foo + nop + .cfi_endproc + +f17: + .cfi_startproc + .cfi_personality 0x1b, foo + nop + .cfi_endproc + +f18: + .cfi_startproc + .cfi_personality 0x1c, foo + nop + .cfi_endproc + +f19: + .cfi_startproc + .cfi_personality 0x18, foo + nop + .cfi_endproc + +f20: + .cfi_startproc + .cfi_personality 0x80, foo + nop + .cfi_endproc + +f21: + .cfi_startproc + .cfi_personality 0x82, foo + nop + .cfi_endproc + +f22: + .cfi_startproc + .cfi_personality 0x83, foo + nop + .cfi_endproc + +f23: + .cfi_startproc + .cfi_personality 0x84, foo + nop + .cfi_endproc + +f24: + .cfi_startproc + .cfi_personality 0x8a, foo + nop + .cfi_endproc + +f25: + .cfi_startproc + .cfi_personality 0x8b, foo + nop + .cfi_endproc + +f26: + .cfi_startproc + .cfi_personality 0x8c, foo + nop + .cfi_endproc + +f27: + .cfi_startproc + .cfi_personality 0x88, foo + nop + .cfi_endproc + +f28: + .cfi_startproc + .cfi_personality 0x90, foo + nop + .cfi_endproc + +f29: + .cfi_startproc + .cfi_personality 0x92, foo + nop + .cfi_endproc + +f30: + .cfi_startproc + .cfi_personality 0x93, foo + nop + .cfi_endproc + +f31: + .cfi_startproc + .cfi_personality 0x94, foo + nop + .cfi_endproc + +f32: + .cfi_startproc + .cfi_personality 0x9a, foo + nop + .cfi_endproc + +f33: + .cfi_startproc + .cfi_personality 0x9b, foo + nop + .cfi_endproc + +f34: + .cfi_startproc + .cfi_personality 0x9c, foo + nop + .cfi_endproc + +f36: + .cfi_startproc + .cfi_personality 0x98, foo + nop + .cfi_endproc + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000068) +// CHECK-NEXT: ('sh_size', 0x000006c8) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a4c52 00017810 02031b0c 07089001 14000000 1c000000 00000000 01000000 04000000 00000000 20000000 00000000 017a504c 52000178 100b0000 00000000 00000003 1b0c0708 90010000 14000000 28000000 00000000 01000000 04000000 00000000 14000000 70000000 00000000 01000000 04000000 00000000 20000000 00000000 017a504c 52000178 100b0000 00000000 00000002 1b0c0708 90010000 10000000 28000000 00000000 01000000 02000000 18000000 00000000 017a5052 00017810 04020000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06030000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a040000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 040a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 060b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a0c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a080000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a100000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 04120000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06130000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a140000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 041a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 061b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a1c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a180000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a800000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 04820000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06830000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a840000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 048a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 068b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a8c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a880000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a900000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 04920000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06930000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a940000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 049a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 069b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a9c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a980000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000') +// CHECK-NEXT: ), + +// CHECK: # Section 0x00000008 +// CHECK-NEXT: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000bf8) +// CHECK-NEXT: ('sh_size', 0x000006c0) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', 0x00000029) +// CHECK-NEXT: ('r_sym', 0x00000028) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000002 +// CHECK-NEXT: (('r_offset', 0x00000043) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000003 +// CHECK-NEXT: (('r_offset', 0x0000005c) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000001) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000004 +// CHECK-NEXT: (('r_offset', 0x00000065) +// CHECK-NEXT: ('r_sym', 0x00000028) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000005 +// CHECK-NEXT: (('r_offset', 0x00000074) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000002) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000006 +// CHECK-NEXT: (('r_offset', 0x0000007d) +// CHECK-NEXT: ('r_sym', 0x00000028) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000007 +// CHECK-NEXT: (('r_offset', 0x00000097) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000008 +// CHECK-NEXT: (('r_offset', 0x000000b0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000003) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000009 +// CHECK-NEXT: (('r_offset', 0x000000b9) +// CHECK-NEXT: ('r_sym', 0x00000028) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000a +// CHECK-NEXT: (('r_offset', 0x000000ce) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000b +// CHECK-NEXT: (('r_offset', 0x000000e0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000004) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000c +// CHECK-NEXT: (('r_offset', 0x000000fe) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000d +// CHECK-NEXT: (('r_offset', 0x00000110) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000005) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000e +// CHECK-NEXT: (('r_offset', 0x0000012e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000f +// CHECK-NEXT: (('r_offset', 0x00000144) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000006) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000010 +// CHECK-NEXT: (('r_offset', 0x00000162) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000011 +// CHECK-NEXT: (('r_offset', 0x00000174) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000007) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000012 +// CHECK-NEXT: (('r_offset', 0x00000192) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000013 +// CHECK-NEXT: (('r_offset', 0x000001a4) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000008) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000014 +// CHECK-NEXT: (('r_offset', 0x000001c2) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000015 +// CHECK-NEXT: (('r_offset', 0x000001d8) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000009) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000016 +// CHECK-NEXT: (('r_offset', 0x000001f6) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000017 +// CHECK-NEXT: (('r_offset', 0x0000020c) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000a) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000018 +// CHECK-NEXT: (('r_offset', 0x0000022a) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000019 +// CHECK-NEXT: (('r_offset', 0x00000240) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000b) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001a +// CHECK-NEXT: (('r_offset', 0x0000025e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000d) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001b +// CHECK-NEXT: (('r_offset', 0x00000270) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000c) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001c +// CHECK-NEXT: (('r_offset', 0x0000028e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001d +// CHECK-NEXT: (('r_offset', 0x000002a0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000d) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001e +// CHECK-NEXT: (('r_offset', 0x000002be) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001f +// CHECK-NEXT: (('r_offset', 0x000002d4) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000e) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000020 +// CHECK-NEXT: (('r_offset', 0x000002f2) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000d) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000021 +// CHECK-NEXT: (('r_offset', 0x00000304) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000f) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000022 +// CHECK-NEXT: (('r_offset', 0x00000322) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000023 +// CHECK-NEXT: (('r_offset', 0x00000334) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000010) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000024 +// CHECK-NEXT: (('r_offset', 0x00000352) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000025 +// CHECK-NEXT: (('r_offset', 0x00000368) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000011) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000026 +// CHECK-NEXT: (('r_offset', 0x00000386) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000027 +// CHECK-NEXT: (('r_offset', 0x0000039c) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000012) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000028 +// CHECK-NEXT: (('r_offset', 0x000003ba) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000029 +// CHECK-NEXT: (('r_offset', 0x000003d0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000013) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002a +// CHECK-NEXT: (('r_offset', 0x000003ee) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002b +// CHECK-NEXT: (('r_offset', 0x00000400) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000014) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002c +// CHECK-NEXT: (('r_offset', 0x0000041e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002d +// CHECK-NEXT: (('r_offset', 0x00000430) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000015) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002e +// CHECK-NEXT: (('r_offset', 0x0000044e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002f +// CHECK-NEXT: (('r_offset', 0x00000464) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000016) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000030 +// CHECK-NEXT: (('r_offset', 0x00000482) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000031 +// CHECK-NEXT: (('r_offset', 0x00000494) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000017) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000032 +// CHECK-NEXT: (('r_offset', 0x000004b2) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000033 +// CHECK-NEXT: (('r_offset', 0x000004c4) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000018) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000034 +// CHECK-NEXT: (('r_offset', 0x000004e2) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000035 +// CHECK-NEXT: (('r_offset', 0x000004f8) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000019) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000036 +// CHECK-NEXT: (('r_offset', 0x00000516) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000037 +// CHECK-NEXT: (('r_offset', 0x0000052c) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001a) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000038 +// CHECK-NEXT: (('r_offset', 0x0000054a) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000039 +// CHECK-NEXT: (('r_offset', 0x00000560) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001b) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003a +// CHECK-NEXT: (('r_offset', 0x0000057e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000d) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003b +// CHECK-NEXT: (('r_offset', 0x00000590) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001c) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003c +// CHECK-NEXT: (('r_offset', 0x000005ae) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003d +// CHECK-NEXT: (('r_offset', 0x000005c0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001d) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003e +// CHECK-NEXT: (('r_offset', 0x000005de) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003f +// CHECK-NEXT: (('r_offset', 0x000005f4) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001e) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000040 +// CHECK-NEXT: (('r_offset', 0x00000612) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000d) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000041 +// CHECK-NEXT: (('r_offset', 0x00000624) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001f) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000042 +// CHECK-NEXT: (('r_offset', 0x00000642) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000043 +// CHECK-NEXT: (('r_offset', 0x00000654) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000020) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000044 +// CHECK-NEXT: (('r_offset', 0x00000672) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000045 +// CHECK-NEXT: (('r_offset', 0x00000688) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000021) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000046 +// CHECK-NEXT: (('r_offset', 0x000006a6) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000047 +// CHECK-NEXT: (('r_offset', 0x000006bc) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000022) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/comdat.s b/test/MC/ELF/comdat.s index 745dfbb..0f1164e 100644 --- a/test/MC/ELF/comdat.s +++ b/test/MC/ELF/comdat.s @@ -48,8 +48,8 @@ // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000007) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000002 // CHECK-NEXT: (('st_name', 0x00000004) # 'g2' @@ -57,8 +57,8 @@ // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000002) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK: # Symbol 0x0000000d @@ -67,8 +67,8 @@ // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), diff --git a/test/MC/ELF/common.s b/test/MC/ELF/common.s index 0ffa6f4..16b677b 100644 --- a/test/MC/ELF/common.s +++ b/test/MC/ELF/common.s @@ -13,8 +13,8 @@ // CHECK-NEXT: ('st_type', 0x00000001) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000001) // Same as common1, but with directives in a different order. @@ -27,8 +27,8 @@ // CHECK-NEXT: ('st_type', 0x00000001) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', -// CHECK-NEXT: ('st_value', 0x00000001) -// CHECK-NEXT: ('st_size', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000001) +// CHECK-NEXT: ('st_size', 0x0000000000000001) .local common6 .comm common6,8,16 @@ -39,8 +39,8 @@ // CHECK-NEXT: ('st_type', 0x00000001) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000003) -// CHECK-NEXT: ('st_value', 0x00000010) -// CHECK-NEXT: ('st_size', 0x00000008) +// CHECK-NEXT: ('st_value', 0x0000000000000010) +// CHECK-NEXT: ('st_size', 0x0000000000000008) // CHECK-NEXT: ), // Test that without an explicit .local we produce a global. @@ -52,8 +52,8 @@ // CHECK-NEXT: ('st_type', 0x00000001) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x0000fff2) -// CHECK-NEXT: ('st_value', 0x00000004) -// CHECK-NEXT: ('st_size', 0x00000004) +// CHECK-NEXT: ('st_value', 0x0000000000000004) +// CHECK-NEXT: ('st_size', 0x0000000000000004) // Test that without an explicit .local we produce a global, even if the first @@ -72,8 +72,8 @@ foo: // CHECK-NEXT: ('st_type', 0x00000001) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x0000fff2) -// CHECK-NEXT: ('st_value', 0x00000010) -// CHECK-NEXT: ('st_size', 0x00000028) +// CHECK-NEXT: ('st_value', 0x0000000000000010) +// CHECK-NEXT: ('st_size', 0x0000000000000028) .comm common5,4,4 @@ -83,6 +83,6 @@ foo: // CHECK-NEXT: ('st_type', 0x00000001) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x0000fff2) -// CHECK-NEXT: ('st_value', 0x00000004) -// CHECK-NEXT: ('st_size', 0x00000004) +// CHECK-NEXT: ('st_value', 0x0000000000000004) +// CHECK-NEXT: ('st_size', 0x0000000000000004) // CHECK-NEXT: ), diff --git a/test/MC/ELF/empty-dwarf-lines.s b/test/MC/ELF/empty-dwarf-lines.s new file mode 100644 index 0000000..0f791ae --- /dev/null +++ b/test/MC/ELF/empty-dwarf-lines.s @@ -0,0 +1,21 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that the dwarf debug_line section contains no line directives. + + .file 1 "test.c" + .globl c +c: + .asciz "hi\n" + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.debug_line' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000044) +// CHECK-NEXT: ('sh_size', 0x00000027) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/entsize.ll b/test/MC/ELF/entsize.ll index 62683af..21179df 100644 --- a/test/MC/ELF/entsize.ll +++ b/test/MC/ELF/entsize.ll @@ -2,10 +2,10 @@ ; Test that constant mergeable strings have sh_entsize set. -@.str1 = private constant [6 x i8] c"tring\00" -@.str2 = private constant [7 x i8] c"String\00" -@.c8a = private constant [1 x i64] [i64 42] -@.c8b = private constant [1 x i64] [i64 42] +@.str1 = private unnamed_addr constant [6 x i8] c"tring\00" +@.str2 = private unnamed_addr constant [7 x i8] c"String\00" +@.c8a = private unnamed_addr constant [1 x i64] [i64 42] +@.c8b = private unnamed_addr constant [1 x i64] [i64 42] define i32 @main() nounwind { %1 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) diff --git a/test/MC/ELF/file.s b/test/MC/ELF/file.s index 8dd72a7..d8ccbe6 100644 --- a/test/MC/ELF/file.s +++ b/test/MC/ELF/file.s @@ -10,8 +10,8 @@ foa: // CHECK-NEXT: ('st_type', 0x00000004) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x0000fff1) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000002 // CHECK-NEXT: (('st_name', 0x00000005) # 'foa' @@ -19,5 +19,5 @@ foa: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) diff --git a/test/MC/ELF/local-reloc.s b/test/MC/ELF/local-reloc.s index d275646..c2b4771 100644 --- a/test/MC/ELF/local-reloc.s +++ b/test/MC/ELF/local-reloc.s @@ -17,8 +17,8 @@ foo: // CHECK-NEXT: ('st_type', 0x00000003) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // Relocation refers to symbol number 2 // CHECK: ('_relocations', [ diff --git a/test/MC/ELF/n_bytes.s b/test/MC/ELF/n_bytes.s new file mode 100644 index 0000000..59d67bf --- /dev/null +++ b/test/MC/ELF/n_bytes.s @@ -0,0 +1,20 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + + .2byte 42, 1, 2, 3 + .4byte 42, 1, 2, 3 + .8byte 42, 1, 2, 3 + .int 42, 1, 2, 3 + +// CHECK: # Section 0x00000001 +// CHECK-NEXT: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000048) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '2a000100 02000300 2a000000 01000000 02000000 03000000 2a000000 00000000 01000000 00000000 02000000 00000000 03000000 00000000 2a000000 01000000 02000000 03000000') +// CHECK-NEXT: ), diff --git a/test/MC/ELF/no-fixup.s b/test/MC/ELF/no-fixup.s new file mode 100644 index 0000000..6e719bc --- /dev/null +++ b/test/MC/ELF/no-fixup.s @@ -0,0 +1,16 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t -stats 2>%t.out +// RUN: FileCheck --input-file=%t.out %s + +// Test that we create no fixups for this file since "a" and "b" are in the +// same fragment. + +// CHECK: assembler - Number of assembler layout and relaxation steps +// CHECK-NEXT: assembler - Number of emitted assembler fragments +// CHECK-NEXT: assembler - Number of emitted object file bytes +// CHECK-NEXT: assembler - Number of fragment layouts +// CHECK-NEXT: mcexpr - Number of MCExpr evaluations + +a: + nop +b: + .long b - a diff --git a/test/MC/ELF/noexec.s b/test/MC/ELF/noexec.s new file mode 100644 index 0000000..87b6f3a --- /dev/null +++ b/test/MC/ELF/noexec.s @@ -0,0 +1,24 @@ +// RUN: llvm-mc -mc-no-exec-stack -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.note.GNU-stack' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), + +// CHECK: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000004) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/org.s b/test/MC/ELF/org.s new file mode 100644 index 0000000..c073fa5 --- /dev/null +++ b/test/MC/ELF/org.s @@ -0,0 +1,13 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .zero 4 +foo: + .zero 4 + .org foo+16 + +// CHECK: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', +// CHECK-NEXT: ('sh_flags', +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset' +// CHECK-NEXT: ('sh_size', 0x00000014) diff --git a/test/MC/ELF/pic-diff.s b/test/MC/ELF/pic-diff.s index b47c413..d1fc909 100644 --- a/test/MC/ELF/pic-diff.s +++ b/test/MC/ELF/pic-diff.s @@ -6,8 +6,8 @@ // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK: ('_relocations', [ diff --git a/test/MC/ELF/pr9292.s b/test/MC/ELF/pr9292.s new file mode 100644 index 0000000..a198fed --- /dev/null +++ b/test/MC/ELF/pr9292.s @@ -0,0 +1,26 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that both foo and bar are undefined. + +.globl foo +.globl bar +mov %eax,bar + + +// CHECK: (('st_name', 0x00000005) # 'bar' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/relax.s b/test/MC/ELF/relax.s index 48b9c4e..2c0e285 100644 --- a/test/MC/ELF/relax.s +++ b/test/MC/ELF/relax.s @@ -1,38 +1,27 @@ // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s -// Test that we do a relaxation for foo but not for bar. Relaxing foo is -// probably not necessary, but matches what gnu as does. - -// Also test that the relaxation done for foo uses the symbol, not section and -// offset. +// Test that we do not relax these. bar: .globl foo foo: + .set zed,foo + jmp bar jmp foo + jmp zed // CHECK: ('sh_name', 0x00000001) # '.text' // CHECK-NEXT: ('sh_type', 0x00000001) // CHECK-NEXT: ('sh_flags', 0x00000006) // CHECK-NEXT: ('sh_addr', 0x00000000) // CHECK-NEXT: ('sh_offset', 0x00000040) -// CHECK-NEXT: ('sh_size', 0x00000007) +// CHECK-NEXT: ('sh_size', 0x00000006) // CHECK-NEXT: ('sh_link', 0x00000000) // CHECK-NEXT: ('sh_info', 0x00000000) // CHECK-NEXT: ('sh_addralign', 0x00000004) // CHECK-NEXT: ('sh_entsize', 0x00000000) -// CHECK-NEXT: ('_section_data', 'ebfee900 000000') +// CHECK-NEXT: ('_section_data', 'ebfeebfc ebfa') -// CHECK: # Symbol 0x00000005 +// CHECK: # Symbol 0x00000006 // CHECK-NEXT: (('st_name', 0x00000005) # 'foo' - -// CHECK: .rela.text -// CHECK: ('_relocations', [ -// CHECK-NEXT: Relocation 0x00000000 -// CHECK-NEXT: (('r_offset', 0x00000003) -// CHECK-NEXT: ('r_sym', 0x00000005) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0xfffffffc) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) diff --git a/test/MC/ELF/relocation-386.s b/test/MC/ELF/relocation-386.s index c390323..f106f89 100644 --- a/test/MC/ELF/relocation-386.s +++ b/test/MC/ELF/relocation-386.s @@ -1,7 +1,7 @@ // RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck %s -// Test that we produce the correct relocation types and that the relocation -// to .Lfoo uses the symbol and not the section. +// Test that we produce the correct relocation types and that the relocations +// correctly point to the section or the symbol. // Section 3 is bss // CHECK: # Section 0x00000003 @@ -10,8 +10,18 @@ // CHECK: # Symbol 0x00000001 // CHECK-NEXT: (('st_name', 0x00000005) # '.Lfoo' -// Symbol 6 is section 3 -// CHECK: # Symbol 0x00000006 +// Symbol 4 is zed +// CHECK: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000035) # 'zed' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000004) + +// Symbol 7 is section 3 +// CHECK: # Symbol 0x00000007 // CHECK-NEXT: (('st_name', 0x00000000) # '' // CHECK-NEXT: ('st_value', 0x00000000) // CHECK-NEXT: ('st_size', 0x00000000) @@ -36,10 +46,10 @@ // CHECK-NEXT: ('r_type', 0x0000000a) // CHECK-NEXT: ), -// Relocation 3 (bar3@GOTOFF) is done with symbol 6 (bss) +// Relocation 3 (bar3@GOTOFF) is done with symbol 7 (bss) // CHECK-NEXT: # Relocation 0x00000003 // CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', 0x00000006 +// CHECK-NEXT: ('r_sym', 0x00000007 // CHECK-NEXT: ('r_type', // CHECK-NEXT: ), @@ -53,51 +63,123 @@ // Relocation 5 (foo@TLSGD) is of type R_386_TLS_GD // CHECK-NEXT: # Relocation 0x00000005 // CHECK-NEXT: (('r_offset', 0x00000020) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000012) // CHECK-NEXT: ), // Relocation 6 ($foo@TPOFF) is of type R_386_TLS_LE_32 // CHECK-NEXT: # Relocation 0x00000006 // CHECK-NEXT: (('r_offset', 0x00000025) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000022) // CHECK-NEXT: ), // Relocation 7 (foo@INDNTPOFF) is of type R_386_TLS_IE // CHECK-NEXT: # Relocation 0x00000007 // CHECK-NEXT: (('r_offset', 0x0000002b) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x0000000f) // CHECK-NEXT: ), // Relocation 8 (foo@NTPOFF) is of type R_386_TLS_LE // CHECK-NEXT: # Relocation 0x00000008 // CHECK-NEXT: (('r_offset', 0x00000031) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000011) // CHECK-NEXT: ), // Relocation 9 (foo@GOTNTPOFF) is of type R_386_TLS_GOTIE // CHECK-NEXT: # Relocation 0x00000009 // CHECK-NEXT: (('r_offset', 0x00000037) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000010) // CHECK-NEXT: ), // Relocation 10 (foo@TLSLDM) is of type R_386_TLS_LDM // CHECK-NEXT: # Relocation 0x0000000a // CHECK-NEXT: (('r_offset', 0x0000003d) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000013) // CHECK-NEXT: ), // Relocation 11 (foo@DTPOFF) is of type R_386_TLS_LDO_32 // CHECK-NEXT: # Relocation 0x0000000b // CHECK-NEXT: (('r_offset', 0x00000043) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) +// CHECK-NEXT: ('r_type', 0x00000020) +// CHECK-NEXT: ), +// Relocation 12 (calll 4096) is of type R_386_PC32 +// CHECK-NEXT: # Relocation 0x0000000c +// CHECK-NEXT: (('r_offset', 0x00000048) +// CHECK-NEXT: ('r_sym', 0x00000000) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ), +// Relocation 13 (zed@GOT) is of type R_386_GOT32 and uses the symbol +// CHECK-NEXT: # Relocation 0x0000000d +// CHECK-NEXT: (('r_offset', 0x0000004e) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000003) +// CHECK-NEXT: ), +// Relocation 14 (zed@GOTOFF) is of type R_386_GOTOFF and uses the symbol +// CHECK-NEXT: # Relocation 0x0000000e +// CHECK-NEXT: (('r_offset', 0x00000054) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000009) +// CHECK-NEXT: ), +// Relocation 15 (zed@INDNTPOFF) is of type R_386_TLS_IE and uses the symbol +// CHECK-NEXT: # Relocation 0x0000000f +// CHECK-NEXT: (('r_offset', 0x0000005a) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x0000000f) +// CHECK-NEXT: ), +// Relocation 16 (zed@NTPOFF) is of type R_386_TLS_LE and uses the symbol +// CHECK-NEXT: # Relocation 0x00000010 +// CHECK-NEXT: (('r_offset', 0x00000060) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000011) +// CHECK-NEXT: ), +// Relocation 17 (zed@GOTNTPOFF) is of type R_386_TLS_GOTIE and uses the symbol +// CHECK-NEXT: # Relocation 0x00000011 +// CHECK-NEXT: (('r_offset', 0x00000066) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000010) +// CHECK-NEXT: ), +// Relocation 18 (zed@PLT) is of type R_386_PLT32 and uses the symbol +// CHECK-NEXT: # Relocation 0x00000012 +// CHECK-NEXT: (('r_offset', 0x0000006b) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000004) +// CHECK-NEXT: ), +// Relocation 19 (zed@TLSGD) is of type R_386_TLS_GD and uses the symbol +// CHECK-NEXT: # Relocation 0x00000013 +// CHECK-NEXT: (('r_offset', 0x00000071) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000012) +// CHECK-NEXT: ), +// Relocation 20 (zed@TLSLDM) is of type R_386_TLS_LDM and uses the symbol +// CHECK-NEXT: # Relocation 0x00000014 +// CHECK-NEXT: (('r_offset', 0x00000077) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000013) +// CHECK-NEXT: ), +// Relocation 21 (zed@TPOFF) is of type R_386_TLS_LE_32 and uses the symbol +// CHECK-NEXT:# Relocation 0x00000015 +// CHECK-NEXT: (('r_offset', 0x0000007d) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000022) +// CHECK-NEXT: ), +// Relocation 22 (zed@DTPOFF) is of type R_386_TLS_LDO_32 and uses the symbol +// CHECK-NEXT: Relocation 0x00000016 +// CHECK-NEXT: (('r_offset', 0x00000083) +// CHECK-NEXT: ('r_sym', 0x00000004) // CHECK-NEXT: ('r_type', 0x00000020) // CHECK-NEXT: ), +// Relocation 23 ($bar) is of type R_386_32 and uses the section +// CHECK-NEXT: Relocation 0x00000017 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ), .text bar: @@ -122,6 +204,22 @@ bar2: addl foo@GOTNTPOFF(%ebx), %ecx leal foo@TLSLDM(%ebx), %eax leal foo@DTPOFF(%eax), %edx + calll 4096 + movl zed@GOT(%eax), %eax + movl zed@GOTOFF(%eax), %eax + movl zed@INDNTPOFF(%eax), %eax + movl zed@NTPOFF(%eax), %eax + movl zed@GOTNTPOFF(%eax), %eax + call zed@PLT + movl zed@TLSGD(%eax), %eax + movl zed@TLSLDM(%eax), %eax + movl zed@TPOFF(%eax), %eax + movl zed@DTPOFF(%eax), %eax + pushl $bar + + .section zedsec,"awT",@progbits +zed: + .long 0 .section .rodata.str1.16,"aMS",@progbits,1 .Lfoo: diff --git a/test/MC/ELF/relocation-pc.s b/test/MC/ELF/relocation-pc.s new file mode 100644 index 0000000..58c5f41 --- /dev/null +++ b/test/MC/ELF/relocation-pc.s @@ -0,0 +1,33 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we produce the correct relocation. + + loope 0 # R_X86_64_PC8 + jmp -256 # R_X86_64_PC32 + +// CHECK: # Section 0x00000007 +// CHECK-NEXT: (('sh_name', 0x0000002c) # '.rela.text' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x000000e8) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000005) +// CHECK-NEXT: ('sh_info', 0x00000001) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000001) +// CHECK-NEXT: ('r_sym', 0x00000000) +// CHECK-NEXT: ('r_type', 0x0000000f) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', 0x00000003) +// CHECK-NEXT: ('r_sym', 0x00000000) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/relocation.s b/test/MC/ELF/relocation.s index 8d38b86..dabe721 100644 --- a/test/MC/ELF/relocation.s +++ b/test/MC/ELF/relocation.s @@ -13,7 +13,11 @@ bar: leaq foo@TLSGD(%rip), %rax # R_X86_64_TLSGD leaq foo@TPOFF(%rax), %rax # R_X86_64_TPOFF32 leaq foo@TLSLD(%rip), %rdi # R_X86_64_TLSLD - leaq foo@DTPOFF(%rax), %rcx # R_X86_64_DTPOFF32 + leaq foo@dtpoff(%rax), %rcx # R_X86_64_DTPOFF32 + pushq $bar + movq foo(%rip), %rdx + leaq foo-bar(%r14),%r14 + // CHECK: # Section 0x00000001 // CHECK: (('sh_name', 0x00000001) # '.text' @@ -21,7 +25,7 @@ bar: // CHECK: # Symbol 0x00000002 // CHECK: (('st_name', 0x00000000) # '' // CHECK: ('st_bind', 0x00000000) -// CHECK ('st_type', 0x00000003) +// CHECK: ('st_type', 0x00000003) // CHECK: ('st_other', 0x00000000) // CHECK: ('st_shndx', 0x00000001) @@ -90,3 +94,21 @@ bar: // CHECK-NEXT: ('r_sym', 0x00000006) // CHECK-NEXT: ('r_type', 0x00000015) // CHECK-NEXT: ('r_addend', 0x00000000) + +// CHECK: # Relocation 0x0000000b +// CHECK-NEXT: (('r_offset', 0x0000004e) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x0000000b) +// CHECK-NEXT: ('r_addend', 0x00000000) + +// CHECK: # Relocation 0x0000000c +// CHECK-NEXT: (('r_offset', 0x00000055) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0xfffffffc) + +// CHECK: # Relocation 0x0000000d +// CHECK-NEXT: (('r_offset', 0x0000005c) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000005c) diff --git a/test/MC/ELF/rename.s b/test/MC/ELF/rename.s index 290fff6..3606560 100644 --- a/test/MC/ELF/rename.s +++ b/test/MC/ELF/rename.s @@ -35,8 +35,8 @@ defined3: // CHECK-NEXT: ('st_type', 0x00000003) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // The relocation uses symbol 2 // CHECK: # Relocation 0x00000000 diff --git a/test/MC/ELF/section-quoting.s b/test/MC/ELF/section-quoting.s new file mode 100644 index 0000000..3751e72 --- /dev/null +++ b/test/MC/ELF/section-quoting.s @@ -0,0 +1,10 @@ +// RUN: llvm-mc -triple x86_64-pc-linux-gnu %s -o - | FileCheck %s + +// Test that we handle the strings like gas +.section bar-"foo" +.section "foo" +.section "foo bar" + +// CHECK: .section "bar-\"foo\"" +// CHECK: .section foo +// CHECK: .section "foo bar" diff --git a/test/MC/ELF/section.s b/test/MC/ELF/section.s index f3700ca..861dc4f 100644 --- a/test/MC/ELF/section.s +++ b/test/MC/ELF/section.s @@ -12,11 +12,12 @@ // CHECK: ('sh_name', 0x00000033) # '.note.GNU-' // CHECK: ('sh_name', 0x0000003e) # '-.note.GNU' -// Test that the dafults are used +// Test that the defaults are used .section .init .section .fini .section .rodata +.section zed, "" // CHECK: (('sh_name', 0x00000049) # '.init' // CHECK-NEXT: ('sh_type', 0x00000001) @@ -53,9 +54,57 @@ // CHECK-NEXT: ('sh_addralign', 0x00000001) // CHECK-NEXT: ('sh_entsize', 0x00000000) // CHECK-NEXT: ), +// CHECK-NEXT: # Section 0x0000000d +// CHECK-NEXT: (('sh_name', 0x0000005d) # 'zed' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), + +.section .note.test,"",@note +// CHECK: (('sh_name', 0x00000061) # '.note.test' +// CHECK-NEXT: ('sh_type', 0x00000007) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), // Test that we can parse these foo: bar: .section .text.foo,"axG",@progbits,foo,comdat .section .text.bar,"axMG",@progbits,42,bar,comdat + +// Test that the default values are not used + +.section .eh_frame,"a",@unwind + +// CHECK: (('sh_name', 0x00000080) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x70000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), + +// Test that we handle the strings like gas +.section bar-"foo" +.section "foo" + +// CHECK: ('sh_name', 0x0000008a) # 'bar-"foo"' +// CHECK: ('sh_name', 0x00000094) # 'foo' diff --git a/test/MC/ELF/set.s b/test/MC/ELF/set.s index a782bed..69d6c91 100644 --- a/test/MC/ELF/set.s +++ b/test/MC/ELF/set.s @@ -1,5 +1,18 @@ // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// Test that we emit the correct value. + +.set kernbase,0xffffffff80000000 + +// CHECK: (('st_name', 0x00000001) # 'kernbase' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x0000fff1) +// CHECK-NEXT: ('st_value', 0xffffffff80000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + // Test that we accept .set of a symbol after it has been used in a statement. jmp foo @@ -11,11 +24,11 @@ .set foo2,bar2 // Test that there is an undefined reference to bar -// CHECK: (('st_name', 0x00000001) # 'bar' +// CHECK: (('st_name', 0x0000000a) # 'bar' // CHECK-NEXT: ('st_bind', 0x00000001) // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), diff --git a/test/MC/ELF/size.s b/test/MC/ELF/size.s deleted file mode 100644 index ceb9486..0000000 --- a/test/MC/ELF/size.s +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s - -// Mostly a test that this doesn't crash anymore. - -// CHECK: # Symbol 0x00000004 -// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' -// CHECK-NEXT: ('st_bind', 0x00000001) - - .size foo, .Lbar-foo - .long foo diff --git a/test/MC/ELF/symref.s b/test/MC/ELF/symref.s index f1563e5..b99e71b 100644 --- a/test/MC/ELF/symref.s +++ b/test/MC/ELF/symref.s @@ -28,8 +28,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000002 // CHECK-NEXT: (('st_name', 0x00000025) # 'bar3@@zed' @@ -37,8 +37,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000003 // CHECK-NEXT: (('st_name', 0x0000002f) # 'bar5@@zed' @@ -46,8 +46,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000004 // CHECK-NEXT: (('st_name', 0x00000001) # 'defined1' @@ -55,8 +55,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000005 // CHECK-NEXT: (('st_name', 0x0000000a) # 'defined2' @@ -64,8 +64,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000006 // CHECK-NEXT: (('st_name', 0x00000000) # '' @@ -73,8 +73,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000003) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000007 // CHECK-NEXT: (('st_name', 0x00000000) # '' @@ -82,8 +82,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000003) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000002) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000008 // CHECK-NEXT: (('st_name', 0x00000000) # '' @@ -91,8 +91,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000003) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000003) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000009 // CHECK-NEXT: (('st_name', 0x0000004a) # 'g1@@zed' @@ -100,8 +100,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000014) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000014) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x0000000a // CHECK-NEXT: (('st_name', 0x00000042) # 'global1' @@ -109,8 +109,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000014) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000014) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x0000000b // CHECK-NEXT: (('st_name', 0x0000001c) # 'bar2@zed' @@ -118,8 +118,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x0000000c // CHECK-NEXT: (('st_name', 0x00000039) # 'bar6@zed' @@ -127,8 +127,8 @@ global1: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT:]) diff --git a/test/MC/ELF/tls-i386.s b/test/MC/ELF/tls-i386.s new file mode 100644 index 0000000..459d4cc --- /dev/null +++ b/test/MC/ELF/tls-i386.s @@ -0,0 +1,64 @@ +// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that all symbols are of type STT_TLS. + + movl foo1@NTPOFF(%eax), %eax + movl foo2@GOTNTPOFF(%eax), %eax + movl foo3@TLSGD(%eax), %eax + movl foo4@TLSLDM(%eax), %eax + movl foo5@TPOFF(%eax), %eax + movl foo6@DTPOFF(%eax), %eax + +// CHECK: (('st_name', 0x00000001) # 'foo1' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000006) # 'foo2' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x0000000b) # 'foo3' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x00000010) # 'foo4' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x00000015) # 'foo5' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000a +// CHECK-NEXT: (('st_name', 0x0000001a) # 'foo6' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/tls.s b/test/MC/ELF/tls.s index 395c270..2517a5b 100644 --- a/test/MC/ELF/tls.s +++ b/test/MC/ELF/tls.s @@ -1,15 +1,48 @@ // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s -// Test that foobar is of type STT_TLS. +// Test that all symbols are of type STT_TLS. + + leaq foo1@TLSGD(%rip), %rdi + leaq foo2@GOTTPOFF(%rip), %rdi + leaq foo3@TLSLD(%rip), %rdi .section .zed,"awT",@progbits foobar: .long 43 -// CHECK: (('st_name', 0x00000001) # 'foobar' +// CHECK: (('st_name', 0x00000010) # 'foobar' // CHECK-NEXT: ('st_bind', 0x00000000) // CHECK-NEXT: ('st_type', 0x00000006) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000004) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + +// CHECK: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo1' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x00000006) # 'foo2' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x0000000b) # 'foo3' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/type.s b/test/MC/ELF/type.s index a2d0787..4b98c02 100644 --- a/test/MC/ELF/type.s +++ b/test/MC/ELF/type.s @@ -18,8 +18,8 @@ bar: // CHECK-NEXT: ('st_type', 0x00000001) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000005 // CHECK-NEXT: (('st_name', 0x00000001) # 'foo' @@ -27,6 +27,6 @@ bar: // CHECK-NEXT: ('st_type', 0x00000002) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), diff --git a/test/MC/ELF/undef.s b/test/MC/ELF/undef.s index cdef5e4..fc3a2d2 100644 --- a/test/MC/ELF/undef.s +++ b/test/MC/ELF/undef.s @@ -40,7 +40,7 @@ // CHECK-NEXT: ('st_type', 0x00000001) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: ]) diff --git a/test/MC/ELF/weak-relocation.s b/test/MC/ELF/weak-relocation.s new file mode 100644 index 0000000..ef331d7 --- /dev/null +++ b/test/MC/ELF/weak-relocation.s @@ -0,0 +1,15 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that weak symbols always produce relocations + + .weak foo +foo: +bar: + call foo + +//CHECK: # Relocation 0x00000000 +//CHECK-NEXT: (('r_offset', 0x00000001) +//CHECK-NEXT: ('r_sym', 0x00000005) +//CHECK-NEXT: ('r_type', 0x00000002) +//CHECK-NEXT: ('r_addend', 0xfffffffc) +//CHECK-NEXT: ), diff --git a/test/MC/ELF/weak.s b/test/MC/ELF/weak.s index f1a66b5..67e9b18 100644 --- a/test/MC/ELF/weak.s +++ b/test/MC/ELF/weak.s @@ -15,8 +15,8 @@ bar: //CHECK-NEXT: ('st_type', 0x00000000) //CHECK-NEXT: ('st_other', 0x00000000) //CHECK-NEXT: ('st_shndx', 0x00000001) -//CHECK-NEXT: ('st_value', 0x00000004) -//CHECK-NEXT: ('st_size', 0x00000000) +//CHECK-NEXT: ('st_value', 0x0000000000000004) +//CHECK-NEXT: ('st_size', 0x0000000000000000) //CHECK-NEXT: ), //CHECK-NEXT: # Symbol 0x00000005 //CHECK: (('st_name', 0x00000001) # 'foo' @@ -24,7 +24,7 @@ bar: //CHECK-NEXT: ('st_type', 0x00000000) //CHECK-NEXT: ('st_other', 0x00000000) //CHECK-NEXT: ('st_shndx', 0x00000000) -//CHECK-NEXT: ('st_value', 0x00000000) -//CHECK-NEXT: ('st_size', 0x00000000) +//CHECK-NEXT: ('st_value', 0x0000000000000000) +//CHECK-NEXT: ('st_size', 0x0000000000000000) //CHECK-NEXT: ), //CHECK-NEXT: ]) diff --git a/test/MC/ELF/weakref-reloc.s b/test/MC/ELF/weakref-reloc.s index 580d754..c7cd764 100644 --- a/test/MC/ELF/weakref-reloc.s +++ b/test/MC/ELF/weakref-reloc.s @@ -13,8 +13,8 @@ // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000005 // CHECK-NEXT: (('st_name', 0x00000001) # 'foo' @@ -22,8 +22,8 @@ // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000006 // CHECK-NEXT: (('st_name', 0x00000005) # 'zed' @@ -31,8 +31,8 @@ // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK: # Relocation 0x00000000 diff --git a/test/MC/ELF/weakref.s b/test/MC/ELF/weakref.s index 212e2c3..aea10d1 100644 --- a/test/MC/ELF/weakref.s +++ b/test/MC/ELF/weakref.s @@ -75,8 +75,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000001 // CHECK-NEXT: (('st_name', 0x00000015) # 'bar6' @@ -84,8 +84,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000018) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000018) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000002 // CHECK-NEXT: (('st_name', 0x0000001a) # 'bar7' @@ -93,8 +93,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000018) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000018) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000003 // CHECK-NEXT: (('st_name', 0x0000001f) # 'bar8' @@ -102,8 +102,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x0000001c) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x000000000000001c) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000004 // CHECK-NEXT: (('st_name', 0x00000024) # 'bar9' @@ -111,8 +111,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000020) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000020) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000005 // CHECK-NEXT: (('st_name', 0x00000000) # '' @@ -120,8 +120,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000003) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000006 // CHECK-NEXT: (('st_name', 0x00000000) # '' @@ -129,8 +129,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000003) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000002) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000007 // CHECK-NEXT: (('st_name', 0x00000000) # '' @@ -138,8 +138,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000003) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000003) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000008 // CHECK-NEXT: (('st_name', 0x00000029) # 'bar10' @@ -147,8 +147,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000028) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000028) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000009 // CHECK-NEXT: (('st_name', 0x0000002f) # 'bar11' @@ -156,8 +156,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000030) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000030) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x0000000a // CHECK-NEXT: (('st_name', 0x00000035) # 'bar12' @@ -165,8 +165,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000030) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000030) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x0000000b // CHECK-NEXT: (('st_name', 0x0000003b) # 'bar13' @@ -174,8 +174,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000034) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000034) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x0000000c // CHECK-NEXT: (('st_name', 0x00000041) # 'bar14' @@ -183,8 +183,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000038) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000038) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x0000000d // CHECK-NEXT: (('st_name', 0x00000047) # 'bar15' @@ -192,8 +192,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000001) -// CHECK-NEXT: ('st_value', 0x00000040) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000040) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x0000000e // CHECK-NEXT: (('st_name', 0x00000001) # 'bar2' @@ -201,8 +201,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x0000000f // CHECK-NEXT: (('st_name', 0x00000006) # 'bar3' @@ -210,8 +210,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000010 // CHECK-NEXT: (('st_name', 0x0000000b) # 'bar4' @@ -219,8 +219,8 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 0x00000011 // CHECK-NEXT: (('st_name', 0x00000010) # 'bar5' @@ -228,7 +228,7 @@ bar15: // CHECK-NEXT: ('st_type', 0x00000000) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), // CHECK-NEXT: ]) diff --git a/test/MC/MBlaze/mblaze_special.s b/test/MC/MBlaze/mblaze_special.s index 739caf4..c55ec27 100644 --- a/test/MC/MBlaze/mblaze_special.s +++ b/test/MC/MBlaze/mblaze_special.s @@ -1,7 +1,7 @@ # RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s -# Test to ensure that all FPU instructions can be parsed by the -# assembly parser correctly. +# Test to ensure that all special instructions and special registers can be +# parsed by the assembly parser correctly. # TYPE A: OPCODE RD RA RB FLAGS # BINARY: 011011 00000 00000 00000 00000000000 @@ -9,7 +9,7 @@ # CHECK: mfs # BINARY: 100101 00000 00000 10000 00000000000 # CHECK: encoding: [0x94,0x00,0x80,0x00] - mfs r0, 0x0 + mfs r0, rpc # CHECK: msrclr # BINARY: 100101 00000 100010 000000000000000 @@ -24,7 +24,7 @@ # CHECK: mts # BINARY: 100101 00000 00000 11 00000000000000 # CHECK: encoding: [0x94,0x00,0xc0,0x00] - mts 0x0 , r0 + mts rpc, r0 # CHECK: wdc # BINARY: 100100 00000 00000 00001 00001100100 @@ -45,3 +45,123 @@ # BINARY: 100100 00000 00000 00001 00001101000 # CHECK: encoding: [0x90,0x00,0x08,0x68] wic r0, r1 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000000 +# CHECK: encoding: [0x94,0x20,0x80,0x00] + mfs r1, rpc + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000001 +# CHECK: encoding: [0x94,0x20,0x80,0x01] + mfs r1, rmsr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000011 +# CHECK: encoding: [0x94,0x20,0x80,0x03] + mfs r1, rear + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000101 +# CHECK: encoding: [0x94,0x20,0x80,0x05] + mfs r1, resr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000111 +# CHECK: encoding: [0x94,0x20,0x80,0x07] + mfs r1, rfsr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000001011 +# CHECK: encoding: [0x94,0x20,0x80,0x0b] + mfs r1, rbtr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000001101 +# CHECK: encoding: [0x94,0x20,0x80,0x0d] + mfs r1, redr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000000 +# CHECK: encoding: [0x94,0x20,0x90,0x00] + mfs r1, rpid + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000001 +# CHECK: encoding: [0x94,0x20,0x90,0x01] + mfs r1, rzpr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000010 +# CHECK: encoding: [0x94,0x20,0x90,0x02] + mfs r1, rtlbx + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000100 +# CHECK: encoding: [0x94,0x20,0x90,0x04] + mfs r1, rtlbhi + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000011 +# CHECK: encoding: [0x94,0x20,0x90,0x03] + mfs r1, rtlblo + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000000 +# CHECK: encoding: [0x94,0x20,0xa0,0x00] + mfs r1, rpvr0 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000001 +# CHECK: encoding: [0x94,0x20,0xa0,0x01] + mfs r1, rpvr1 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000010 +# CHECK: encoding: [0x94,0x20,0xa0,0x02] + mfs r1, rpvr2 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000011 +# CHECK: encoding: [0x94,0x20,0xa0,0x03] + mfs r1, rpvr3 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000100 +# CHECK: encoding: [0x94,0x20,0xa0,0x04] + mfs r1, rpvr4 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000101 +# CHECK: encoding: [0x94,0x20,0xa0,0x05] + mfs r1, rpvr5 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000110 +# CHECK: encoding: [0x94,0x20,0xa0,0x06] + mfs r1, rpvr6 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000111 +# CHECK: encoding: [0x94,0x20,0xa0,0x07] + mfs r1, rpvr7 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000001000 +# CHECK: encoding: [0x94,0x20,0xa0,0x08] + mfs r1, rpvr8 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000001001 +# CHECK: encoding: [0x94,0x20,0xa0,0x09] + mfs r1, rpvr9 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000001010 +# CHECK: encoding: [0x94,0x20,0xa0,0x0a] + mfs r1, rpvr10 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000001011 +# CHECK: encoding: [0x94,0x20,0xa0,0x0b] + mfs r1, rpvr11 diff --git a/test/MC/MachO/absolutize.s b/test/MC/MachO/absolutize.s index f61b921..39571dd 100644 --- a/test/MC/MachO/absolutize.s +++ b/test/MC/MachO/absolutize.s @@ -50,7 +50,7 @@ Ldata_expr_2 = Ldata_d - Ldata_c // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/comm-1.s b/test/MC/MachO/comm-1.s index e979fb1..5ffa979 100644 --- a/test/MC/MachO/comm-1.s +++ b/test/MC/MachO/comm-1.s @@ -10,7 +10,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 228) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/darwin-complex-difference.s b/test/MC/MachO/darwin-complex-difference.s new file mode 100644 index 0000000..e66bd09 --- /dev/null +++ b/test/MC/MachO/darwin-complex-difference.s @@ -0,0 +1,129 @@ +// RUN: llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o %t.o +// RUN: macho-dump --dump-section-data < %t.o > %t.dump +// RUN: FileCheck < %t.dump %s + +_a: +L0: + .long 1 +L1: + .long 2 + .long _c - _d + 4 + .long (_c - L0) - (_d - L1) // == (_c - _d) + (L1 - L0) + // == (_c - _d + 4) +_c: + .long 0 +_d: + .long 0 + +// CHECK: ('cputype', 16777223) +// CHECK: ('cpusubtype', 3) +// CHECK: ('filetype', 1) +// CHECK: ('num_load_commands', 3) +// CHECK: ('load_commands_size', 256) +// CHECK: ('flag', 0) +// CHECK: ('reserved', 0) +// CHECK: ('load_commands', [ +// CHECK: # Load Command 0 +// CHECK: (('command', 25) +// CHECK: ('size', 152) +// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('vm_addr', 0) +// CHECK: ('vm_size', 24) +// CHECK: ('file_offset', 288) +// CHECK: ('file_size', 24) +// CHECK: ('maxprot', 7) +// CHECK: ('initprot', 7) +// CHECK: ('num_sections', 1) +// CHECK: ('flags', 0) +// CHECK: ('sections', [ +// CHECK: # Section 0 +// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('address', 0) +// CHECK: ('size', 24) +// CHECK: ('offset', 288) +// CHECK: ('alignment', 0) +// CHECK: ('reloc_offset', 312) +// CHECK: ('num_reloc', 4) +// CHECK: ('flags', 0x80000000) +// CHECK: ('reserved1', 0) +// CHECK: ('reserved2', 0) +// CHECK: ('reserved3', 0) +// CHECK: ), +// CHECK: ('_relocations', [ +// CHECK: # Relocation 0 +// CHECK: (('word-0', 0xc), +// CHECK: ('word-1', 0x5c000002)), +// CHECK: # Relocation 1 +// CHECK: (('word-0', 0xc), +// CHECK: ('word-1', 0xc000001)), +// CHECK: # Relocation 2 +// CHECK: (('word-0', 0x8), +// CHECK: ('word-1', 0x5c000002)), +// CHECK: # Relocation 3 +// CHECK: (('word-0', 0x8), +// CHECK: ('word-1', 0xc000001)), +// CHECK: ]) +// CHECK: ('_section_data', '01000000 02000000 04000000 04000000 00000000 00000000') +// CHECK: ]) +// CHECK: ), +// CHECK: # Load Command 1 +// CHECK: (('command', 2) +// CHECK: ('size', 24) +// CHECK: ('symoff', 344) +// CHECK: ('nsyms', 3) +// CHECK: ('stroff', 392) +// CHECK: ('strsize', 12) +// CHECK: ('_string_data', '\x00_a\x00_c\x00_d\x00\x00\x00') +// CHECK: ('_symbols', [ +// CHECK: # Symbol 0 +// CHECK: (('n_strx', 1) +// CHECK: ('n_type', 0xe) +// CHECK: ('n_sect', 1) +// CHECK: ('n_desc', 0) +// CHECK: ('n_value', 0) +// CHECK: ('_string', '_a') +// CHECK: ), +// CHECK: # Symbol 1 +// CHECK: (('n_strx', 4) +// CHECK: ('n_type', 0xe) +// CHECK: ('n_sect', 1) +// CHECK: ('n_desc', 0) +// CHECK: ('n_value', 16) +// CHECK: ('_string', '_c') +// CHECK: ), +// CHECK: # Symbol 2 +// CHECK: (('n_strx', 7) +// CHECK: ('n_type', 0xe) +// CHECK: ('n_sect', 1) +// CHECK: ('n_desc', 0) +// CHECK: ('n_value', 20) +// CHECK: ('_string', '_d') +// CHECK: ), +// CHECK: ]) +// CHECK: ), +// CHECK: # Load Command 2 +// CHECK: (('command', 11) +// CHECK: ('size', 80) +// CHECK: ('ilocalsym', 0) +// CHECK: ('nlocalsym', 3) +// CHECK: ('iextdefsym', 3) +// CHECK: ('nextdefsym', 0) +// CHECK: ('iundefsym', 3) +// CHECK: ('nundefsym', 0) +// CHECK: ('tocoff', 0) +// CHECK: ('ntoc', 0) +// CHECK: ('modtaboff', 0) +// CHECK: ('nmodtab', 0) +// CHECK: ('extrefsymoff', 0) +// CHECK: ('nextrefsyms', 0) +// CHECK: ('indirectsymoff', 0) +// CHECK: ('nindirectsyms', 0) +// CHECK: ('extreloff', 0) +// CHECK: ('nextrel', 0) +// CHECK: ('locreloff', 0) +// CHECK: ('nlocrel', 0) +// CHECK: ('_indirect_symbols', [ +// CHECK: ]) +// CHECK: ), +// CHECK: ]) diff --git a/test/MC/MachO/darwin-x86_64-diff-relocs.s b/test/MC/MachO/darwin-x86_64-diff-relocs.s index 38fa074..449d2f5 100644 --- a/test/MC/MachO/darwin-x86_64-diff-relocs.s +++ b/test/MC/MachO/darwin-x86_64-diff-relocs.s @@ -120,7 +120,7 @@ L3: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/darwin-x86_64-reloc-offsets.s b/test/MC/MachO/darwin-x86_64-reloc-offsets.s index 276e67d..f748064 100644 --- a/test/MC/MachO/darwin-x86_64-reloc-offsets.s +++ b/test/MC/MachO/darwin-x86_64-reloc-offsets.s @@ -117,7 +117,7 @@ L1: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/darwin-x86_64-reloc.s b/test/MC/MachO/darwin-x86_64-reloc.s index 2baaa19..83c0de7 100644 --- a/test/MC/MachO/darwin-x86_64-reloc.s +++ b/test/MC/MachO/darwin-x86_64-reloc.s @@ -90,7 +90,7 @@ L6: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 496) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/diff-with-two-sections.s b/test/MC/MachO/diff-with-two-sections.s new file mode 100644 index 0000000..b5e0988 --- /dev/null +++ b/test/MC/MachO/diff-with-two-sections.s @@ -0,0 +1,64 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + + .section __TEXT,__text,regular,pure_instructions +Leh_func_begin0: + .section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support +Ltmp3: +Ltmp4 = Leh_func_begin0-Ltmp3 + .long Ltmp4 + +// CHECK: ('cputype', 7) +// CHECK-NEXT: ('cpusubtype', 3) +// CHECK-NEXT: ('filetype', 1) +// CHECK-NEXT: ('num_load_commands', 1) +// CHECK-NEXT: ('load_commands_size', 192) +// CHECK-NEXT: ('flag', 0) +// CHECK-NEXT: ('load_commands', [ +// CHECK-NEXT: # Load Command 0 +// CHECK-NEXT: (('command', 1) +// CHECK-NEXT: ('size', 192) +// CHECK-NEXT: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('vm_addr', 0) +// CHECK-NEXT: ('vm_size', 4) +// CHECK-NEXT: ('file_offset', 220) +// CHECK-NEXT: ('file_size', 4) +// CHECK-NEXT: ('maxprot', 7) +// CHECK-NEXT: ('initprot', 7) +// CHECK-NEXT: ('num_sections', 2) +// CHECK-NEXT: ('flags', 0) +// CHECK-NEXT: ('sections', [ +// CHECK-NEXT: # Section 0 +// CHECK-NEXT: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 0) +// CHECK-NEXT: ('offset', 220) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x80000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '') +// CHECK-NEXT: # Section 1 +// CHECK-NEXT: (('section_name', '__eh_frame\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 4) +// CHECK-NEXT: ('offset', 220) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x6800000b) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '00000000') +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/MachO/direction_labels.s b/test/MC/MachO/direction_labels.s index 182d51b..e224ed3 100644 --- a/test/MC/MachO/direction_labels.s +++ b/test/MC/MachO/direction_labels.s @@ -14,7 +14,7 @@ direction_labels: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 228) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/empty-dwarf-lines.s b/test/MC/MachO/empty-dwarf-lines.s new file mode 100644 index 0000000..4bdc16b --- /dev/null +++ b/test/MC/MachO/empty-dwarf-lines.s @@ -0,0 +1,25 @@ +// RUN: llvm-mc -triple x86_64-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s + +// This tests that when producing files for darwin9 or older we make sure +// that debug_line sections are of a minimum size to avoid the linker bug +// described in PR8715. + + .section __DATA,__data + .file 1 "test.c" + .globl _c ## @c +_c: + .asciz "hi\n" + +// CHECK: (('section_name', '__debug_line\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__DWARF\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 4) +// CHECK-NEXT: ('size', 44) +// CHECK-NEXT: ('offset', 452) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x2000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ('reserved3', 0) +// CHECK-NEXT: ), diff --git a/test/MC/MachO/indirect-symbols.s b/test/MC/MachO/indirect-symbols.s index 4a771e9..90fd231 100644 --- a/test/MC/MachO/indirect-symbols.s +++ b/test/MC/MachO/indirect-symbols.s @@ -23,7 +23,7 @@ _e: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/lcomm-attributes.s b/test/MC/MachO/lcomm-attributes.s index 2685395..1e95924 100644 --- a/test/MC/MachO/lcomm-attributes.s +++ b/test/MC/MachO/lcomm-attributes.s @@ -17,7 +17,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/loc.s b/test/MC/MachO/loc.s new file mode 100644 index 0000000..6e7faa3 --- /dev/null +++ b/test/MC/MachO/loc.s @@ -0,0 +1,25 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + + .file 1 "foo" + .loc 1 64 0 + nop + +// CHECK: # Section 1 +// CHECK-NEXT: (('section_name', '__debug_line\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__DWARF\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 1) +// CHECK-NEXT: ('size', 51) +// CHECK-NEXT: ('offset', 221) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 272) +// CHECK-NEXT: ('num_reloc', 1) +// CHECK-NEXT: ('flags', 0x2000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('word-0', 0x27), +// CHECK-NEXT: ('word-1', 0x4000001)), +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '2f000000 02001a00 00000101 fb0e0d00 01010101 00000001 00000100 666f6f00 00000000 00050200 00000003 3f010201 000101') diff --git a/test/MC/MachO/pcrel-to-other-section.s b/test/MC/MachO/pcrel-to-other-section.s new file mode 100644 index 0000000..22a7822 --- /dev/null +++ b/test/MC/MachO/pcrel-to-other-section.s @@ -0,0 +1,107 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + +nop + .section __TEXT,__StaticInit,regular,pure_instructions + calll foo + +// CHECK: ('cputype', 7) +// CHECK-NEXT: ('cpusubtype', 3) +// CHECK-NEXT: ('filetype', 1) +// CHECK-NEXT: ('num_load_commands', 3) +// CHECK-NEXT: ('load_commands_size', 296) +// CHECK-NEXT: ('flag', 0) +// CHECK-NEXT: ('load_commands', [ +// CHECK-NEXT: # Load Command 0 +// CHECK-NEXT: (('command', 1) +// CHECK-NEXT: ('size', 192) +// CHECK-NEXT: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('vm_addr', 0) +// CHECK-NEXT: ('vm_size', 6) +// CHECK-NEXT: ('file_offset', 324) +// CHECK-NEXT: ('file_size', 6) +// CHECK-NEXT: ('maxprot', 7) +// CHECK-NEXT: ('initprot', 7) +// CHECK-NEXT: ('num_sections', 2) +// CHECK-NEXT: ('flags', 0) +// CHECK-NEXT: ('sections', [ +// CHECK-NEXT: # Section 0 +// CHECK-NEXT: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 1) +// CHECK-NEXT: ('offset', 324) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x80000400) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '90') +// CHECK-NEXT: # Section 1 +// CHECK-NEXT: (('section_name', '__StaticInit\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 1) +// CHECK-NEXT: ('size', 5) +// CHECK-NEXT: ('offset', 325) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 332) +// CHECK-NEXT: ('num_reloc', 1) +// CHECK-NEXT: ('flags', 0x80000400) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('word-0', 0x1), +// CHECK-NEXT: ('word-1', 0xd000000)), +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', 'e8faffff ff') +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 1 +// CHECK-NEXT: (('command', 2) +// CHECK-NEXT: ('size', 24) +// CHECK-NEXT: ('symoff', 340) +// CHECK-NEXT: ('nsyms', 1) +// CHECK-NEXT: ('stroff', 352) +// CHECK-NEXT: ('strsize', 8) +// CHECK-NEXT: ('_string_data', '\x00foo\x00\x00\x00\x00') +// CHECK-NEXT: ('_symbols', [ +// CHECK-NEXT: # Symbol 0 +// CHECK-NEXT: (('n_strx', 1) +// CHECK-NEXT: ('n_type', 0x1) +// CHECK-NEXT: ('n_sect', 0) +// CHECK-NEXT: ('n_desc', 0) +// CHECK-NEXT: ('n_value', 0) +// CHECK-NEXT: ('_string', 'foo') +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 2 +// CHECK-NEXT: (('command', 11) +// CHECK-NEXT: ('size', 80) +// CHECK-NEXT: ('ilocalsym', 0) +// CHECK-NEXT: ('nlocalsym', 0) +// CHECK-NEXT: ('iextdefsym', 0) +// CHECK-NEXT: ('nextdefsym', 0) +// CHECK-NEXT: ('iundefsym', 0) +// CHECK-NEXT: ('nundefsym', 1) +// CHECK-NEXT: ('tocoff', 0) +// CHECK-NEXT: ('ntoc', 0) +// CHECK-NEXT: ('modtaboff', 0) +// CHECK-NEXT: ('nmodtab', 0) +// CHECK-NEXT: ('extrefsymoff', 0) +// CHECK-NEXT: ('nextrefsyms', 0) +// CHECK-NEXT: ('indirectsymoff', 0) +// CHECK-NEXT: ('nindirectsyms', 0) +// CHECK-NEXT: ('extreloff', 0) +// CHECK-NEXT: ('nextrel', 0) +// CHECK-NEXT: ('locreloff', 0) +// CHECK-NEXT: ('nlocrel', 0) +// CHECK-NEXT: ('_indirect_symbols', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/MachO/reloc.s b/test/MC/MachO/reloc.s index b9520aa..f6a3446 100644 --- a/test/MC/MachO/reloc.s +++ b/test/MC/MachO/reloc.s @@ -56,7 +56,7 @@ _f1: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/section-align-1.s b/test/MC/MachO/section-align-1.s index 6a5e247..360c0a8 100644 --- a/test/MC/MachO/section-align-1.s +++ b/test/MC/MachO/section-align-1.s @@ -9,7 +9,7 @@ name: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 228) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/section-align-2.s b/test/MC/MachO/section-align-2.s index e070473..e0d7b8d 100644 --- a/test/MC/MachO/section-align-2.s +++ b/test/MC/MachO/section-align-2.s @@ -17,7 +17,7 @@ baz: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/string-table.s b/test/MC/MachO/string-table.s index 821f678..179528e 100644 --- a/test/MC/MachO/string-table.s +++ b/test/MC/MachO/string-table.s @@ -5,7 +5,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 228) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/symbol-diff.s b/test/MC/MachO/symbol-diff.s new file mode 100644 index 0000000..1483df1 --- /dev/null +++ b/test/MC/MachO/symbol-diff.s @@ -0,0 +1,122 @@ +// RUN: llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s +_g: +LFB2: + .section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support +_g.eh: + .quad LFB2-. + +// CHECK: ('cputype', 16777223) +// CHECK-NEXT: ('cpusubtype', 3) +// CHECK-NEXT: ('filetype', 1) +// CHECK-NEXT: ('num_load_commands', 3) +// CHECK-NEXT: ('load_commands_size', 336) +// CHECK-NEXT: ('flag', 0) +// CHECK-NEXT: ('reserved', 0) +// CHECK-NEXT: ('load_commands', [ +// CHECK-NEXT: # Load Command 0 +// CHECK-NEXT: (('command', 25) +// CHECK-NEXT: ('size', 232) +// CHECK-NEXT: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('vm_addr', 0) +// CHECK-NEXT: ('vm_size', 8) +// CHECK-NEXT: ('file_offset', 368) +// CHECK-NEXT: ('file_size', 8) +// CHECK-NEXT: ('maxprot', 7) +// CHECK-NEXT: ('initprot', 7) +// CHECK-NEXT: ('num_sections', 2) +// CHECK-NEXT: ('flags', 0) +// CHECK-NEXT: ('sections', [ +// CHECK-NEXT: # Section 0 +// CHECK-NEXT: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 0) +// CHECK-NEXT: ('offset', 368) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x80000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ('reserved3', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '') +// CHECK-NEXT: # Section 1 +// CHECK-NEXT: (('section_name', '__eh_frame\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 8) +// CHECK-NEXT: ('offset', 368) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 376) +// CHECK-NEXT: ('num_reloc', 2) +// CHECK-NEXT: ('flags', 0x6800000b) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ('reserved3', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('word-0', 0x0), +// CHECK-NEXT: ('word-1', 0x5e000001)), +// CHECK-NEXT: # Relocation 1 +// CHECK-NEXT: (('word-0', 0x0), +// CHECK-NEXT: ('word-1', 0xe000000)), +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '00000000 00000000') +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 1 +// CHECK-NEXT: (('command', 2) +// CHECK-NEXT: ('size', 24) +// CHECK-NEXT: ('symoff', 392) +// CHECK-NEXT: ('nsyms', 2) +// CHECK-NEXT: ('stroff', 424) +// CHECK-NEXT: ('strsize', 12) +// CHECK-NEXT: ('_string_data', '\x00_g\x00_g.eh\x00\x00\x00') +// CHECK-NEXT: ('_symbols', [ +// CHECK-NEXT: # Symbol 0 +// CHECK-NEXT: (('n_strx', 1) +// CHECK-NEXT: ('n_type', 0xe) +// CHECK-NEXT: ('n_sect', 1) +// CHECK-NEXT: ('n_desc', 0) +// CHECK-NEXT: ('n_value', 0) +// CHECK-NEXT: ('_string', '_g') +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 1 +// CHECK-NEXT: (('n_strx', 4) +// CHECK-NEXT: ('n_type', 0xe) +// CHECK-NEXT: ('n_sect', 2) +// CHECK-NEXT: ('n_desc', 0) +// CHECK-NEXT: ('n_value', 0) +// CHECK-NEXT: ('_string', '_g.eh') +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 2 +// CHECK-NEXT: (('command', 11) +// CHECK-NEXT: ('size', 80) +// CHECK-NEXT: ('ilocalsym', 0) +// CHECK-NEXT: ('nlocalsym', 2) +// CHECK-NEXT: ('iextdefsym', 2) +// CHECK-NEXT: ('nextdefsym', 0) +// CHECK-NEXT: ('iundefsym', 2) +// CHECK-NEXT: ('nundefsym', 0) +// CHECK-NEXT: ('tocoff', 0) +// CHECK-NEXT: ('ntoc', 0) +// CHECK-NEXT: ('modtaboff', 0) +// CHECK-NEXT: ('nmodtab', 0) +// CHECK-NEXT: ('extrefsymoff', 0) +// CHECK-NEXT: ('nextrefsyms', 0) +// CHECK-NEXT: ('indirectsymoff', 0) +// CHECK-NEXT: ('nindirectsyms', 0) +// CHECK-NEXT: ('extreloff', 0) +// CHECK-NEXT: ('nextrel', 0) +// CHECK-NEXT: ('locreloff', 0) +// CHECK-NEXT: ('nlocrel', 0) +// CHECK-NEXT: ('_indirect_symbols', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT:]) diff --git a/test/MC/MachO/symbol-flags.s b/test/MC/MachO/symbol-flags.s index 705fa39..7a4f8e4 100644 --- a/test/MC/MachO/symbol-flags.s +++ b/test/MC/MachO/symbol-flags.s @@ -49,6 +49,9 @@ sym_private_ext_C: .no_dead_strip sym_no_dead_strip_A +sym_symbol_resolver_A: + .symbol_resolver sym_symbol_resolver_A + .reference sym_ref_A .desc sym_ref_A, 1 .desc sym_ref_A, 0x1234 @@ -59,7 +62,7 @@ sym_desc_flags: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ @@ -112,10 +115,10 @@ sym_desc_flags: // CHECK: (('command', 2) // CHECK: ('size', 24) // CHECK: ('symoff', 324) -// CHECK: ('nsyms', 23) -// CHECK: ('stroff', 600) -// CHECK: ('strsize', 368) -// CHECK: ('_string_data', '\x00sym_ref_A\x00sym_ref_def_D\x00sym_ref_def_E\x00sym_weak_ref_A\x00sym_weak_def_A\x00sym_weak_def_B\x00sym_weak_def_C\x00sym_lazy_ref_A\x00sym_lazy_ref_D\x00sym_lazy_ref_E\x00sym_private_ext_A\x00sym_private_ext_B\x00sym_private_ext_C\x00sym_private_ext_D\x00sym_private_ext_E\x00sym_no_dead_strip_A\x00sym_ref_def_A\x00sym_ref_def_C\x00sym_weak_ref_def_A\x00sym_weak_ref_def_B\x00sym_lazy_ref_B\x00sym_lazy_ref_C\x00sym_desc_flags\x00\x00\x00\x00') +// CHECK: ('nsyms', 24) +// CHECK: ('stroff', 612) +// CHECK: ('strsize', 388) +// CHECK: ('_string_data', '\x00sym_ref_A\x00sym_ref_def_D\x00sym_ref_def_E\x00sym_weak_ref_A\x00sym_weak_def_A\x00sym_weak_def_B\x00sym_weak_def_C\x00sym_lazy_ref_A\x00sym_lazy_ref_D\x00sym_lazy_ref_E\x00sym_private_ext_A\x00sym_private_ext_B\x00sym_private_ext_C\x00sym_private_ext_D\x00sym_private_ext_E\x00sym_no_dead_strip_A\x00sym_ref_def_A\x00sym_ref_def_C\x00sym_weak_ref_def_A\x00sym_weak_ref_def_B\x00sym_lazy_ref_B\x00sym_lazy_ref_C\x00sym_symbol_resolver_A\x00sym_desc_flags\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 // CHECK: (('n_strx', 254) @@ -169,11 +172,19 @@ sym_desc_flags: // CHECK: (('n_strx', 350) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) +// CHECK: ('n_desc', 256) +// CHECK: ('n_value', 0) +// CHECK: ('_string', 'sym_symbol_resolver_A') +// CHECK: ), +// CHECK: # Symbol 7 +// CHECK: (('n_strx', 372) +// CHECK: ('n_type', 0xe) +// CHECK: ('n_sect', 2) // CHECK: ('n_desc', 64) // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_desc_flags') // CHECK: ), -// CHECK: # Symbol 7 +// CHECK: # Symbol 8 // CHECK: (('n_strx', 162) // CHECK: ('n_type', 0x1f) // CHECK: ('n_sect', 2) @@ -181,7 +192,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_B') // CHECK: ), -// CHECK: # Symbol 8 +// CHECK: # Symbol 9 // CHECK: (('n_strx', 180) // CHECK: ('n_type', 0x1f) // CHECK: ('n_sect', 2) @@ -189,7 +200,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_C') // CHECK: ), -// CHECK: # Symbol 9 +// CHECK: # Symbol 10 // CHECK: (('n_strx', 54) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) @@ -197,7 +208,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_weak_def_A') // CHECK: ), -// CHECK: # Symbol 10 +// CHECK: # Symbol 11 // CHECK: (('n_strx', 69) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) @@ -205,7 +216,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_weak_def_B') // CHECK: ), -// CHECK: # Symbol 11 +// CHECK: # Symbol 12 // CHECK: (('n_strx', 84) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) @@ -213,7 +224,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_weak_def_C') // CHECK: ), -// CHECK: # Symbol 12 +// CHECK: # Symbol 13 // CHECK: (('n_strx', 99) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -221,7 +232,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_lazy_ref_A') // CHECK: ), -// CHECK: # Symbol 13 +// CHECK: # Symbol 14 // CHECK: (('n_strx', 114) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -229,7 +240,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_lazy_ref_D') // CHECK: ), -// CHECK: # Symbol 14 +// CHECK: # Symbol 15 // CHECK: (('n_strx', 129) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -237,7 +248,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_lazy_ref_E') // CHECK: ), -// CHECK: # Symbol 15 +// CHECK: # Symbol 16 // CHECK: (('n_strx', 234) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -245,7 +256,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_no_dead_strip_A') // CHECK: ), -// CHECK: # Symbol 16 +// CHECK: # Symbol 17 // CHECK: (('n_strx', 144) // CHECK: ('n_type', 0x11) // CHECK: ('n_sect', 0) @@ -253,7 +264,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_A') // CHECK: ), -// CHECK: # Symbol 17 +// CHECK: # Symbol 18 // CHECK: (('n_strx', 198) // CHECK: ('n_type', 0x11) // CHECK: ('n_sect', 0) @@ -261,7 +272,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_D') // CHECK: ), -// CHECK: # Symbol 18 +// CHECK: # Symbol 19 // CHECK: (('n_strx', 216) // CHECK: ('n_type', 0x11) // CHECK: ('n_sect', 0) @@ -269,7 +280,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_E') // CHECK: ), -// CHECK: # Symbol 19 +// CHECK: # Symbol 20 // CHECK: (('n_strx', 1) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -277,7 +288,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_ref_A') // CHECK: ), -// CHECK: # Symbol 20 +// CHECK: # Symbol 21 // CHECK: (('n_strx', 11) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -285,7 +296,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_ref_def_D') // CHECK: ), -// CHECK: # Symbol 21 +// CHECK: # Symbol 22 // CHECK: (('n_strx', 25) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -293,7 +304,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_ref_def_E') // CHECK: ), -// CHECK: # Symbol 22 +// CHECK: # Symbol 23 // CHECK: (('n_strx', 39) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -307,10 +318,10 @@ sym_desc_flags: // CHECK: (('command', 11) // CHECK: ('size', 80) // CHECK: ('ilocalsym', 0) -// CHECK: ('nlocalsym', 7) -// CHECK: ('iextdefsym', 7) +// CHECK: ('nlocalsym', 8) +// CHECK: ('iextdefsym', 8) // CHECK: ('nextdefsym', 5) -// CHECK: ('iundefsym', 12) +// CHECK: ('iundefsym', 13) // CHECK: ('nundefsym', 11) // CHECK: ('tocoff', 0) // CHECK: ('ntoc', 0) diff --git a/test/MC/MachO/symbol-indirect.s b/test/MC/MachO/symbol-indirect.s index 461291a..2412970 100644 --- a/test/MC/MachO/symbol-indirect.s +++ b/test/MC/MachO/symbol-indirect.s @@ -72,7 +72,7 @@ sym_nlp_G: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/symbols-1.s b/test/MC/MachO/symbols-1.s index 623e528..cf05afa 100644 --- a/test/MC/MachO/symbols-1.s +++ b/test/MC/MachO/symbols-1.s @@ -20,7 +20,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('cputype', 7) // CHECK-X86_32: ('cpusubtype', 3) // CHECK-X86_32: ('filetype', 1) -// CHECK-X86_32: ('num_load_commands', 1) +// CHECK-X86_32: ('num_load_commands', 3) // CHECK-X86_32: ('load_commands_size', 228) // CHECK-X86_32: ('flag', 0) // CHECK-X86_32: ('load_commands', [ @@ -164,7 +164,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('cputype', 16777223) // CHECK-X86_64: ('cpusubtype', 3) // CHECK-X86_64: ('filetype', 1) -// CHECK-X86_64: ('num_load_commands', 1) +// CHECK-X86_64: ('num_load_commands', 3) // CHECK-X86_64: ('load_commands_size', 256) // CHECK-X86_64: ('flag', 0) // CHECK-X86_64: ('reserved', 0) diff --git a/test/MC/MachO/tbss.s b/test/MC/MachO/tbss.s index a96cb6b..8eae142 100644 --- a/test/MC/MachO/tbss.s +++ b/test/MC/MachO/tbss.s @@ -6,7 +6,7 @@ // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/tdata.s b/test/MC/MachO/tdata.s index 41ec0bd..4829ca7 100644 --- a/test/MC/MachO/tdata.s +++ b/test/MC/MachO/tdata.s @@ -6,7 +6,7 @@ _a$tlv$init: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/tls.s b/test/MC/MachO/tls.s index f8b1b0b..44b61be 100644 --- a/test/MC/MachO/tls.s +++ b/test/MC/MachO/tls.s @@ -48,7 +48,7 @@ _b: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 496) // CHECK: ('flag', 8192) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/tlv-reloc.s b/test/MC/MachO/tlv-reloc.s index 1fa5738..d111241 100644 --- a/test/MC/MachO/tlv-reloc.s +++ b/test/MC/MachO/tlv-reloc.s @@ -24,7 +24,7 @@ _foo: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 416) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/tlv.s b/test/MC/MachO/tlv.s index 28e3c91..0fe028e 100644 --- a/test/MC/MachO/tlv.s +++ b/test/MC/MachO/tlv.s @@ -10,7 +10,7 @@ _a: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/values.s b/test/MC/MachO/values.s index 2a472ab..9611599 100644 --- a/test/MC/MachO/values.s +++ b/test/MC/MachO/values.s @@ -20,7 +20,7 @@ data_def_ext: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/weakdef.s b/test/MC/MachO/weakdef.s new file mode 100644 index 0000000..494079d --- /dev/null +++ b/test/MC/MachO/weakdef.s @@ -0,0 +1,141 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + + .section __DATA,__datacoal_nt,coalesced + .section __TEXT,__const_coal,coalesced + .globl __ZTS3optIbE ## @_ZTS3optIbE + .weak_definition __ZTS3optIbE +__ZTS3optIbE: + + + .section __DATA,__datacoal_nt,coalesced + .globl __ZTI3optIbE ## @_ZTI3optIbE + .weak_definition __ZTI3optIbE + +__ZTI3optIbE: + .long __ZTS3optIbE + +// CHECK: ('cputype', 7) +// CHECK-NEXT: ('cpusubtype', 3) +// CHECK-NEXT: ('filetype', 1) +// CHECK-NEXT: ('num_load_commands', 3) +// CHECK-NEXT: ('load_commands_size', 364) +// CHECK-NEXT: ('flag', 0) +// CHECK-NEXT: ('load_commands', [ +// CHECK-NEXT: # Load Command 0 +// CHECK-NEXT: (('command', 1) +// CHECK-NEXT: ('size', 260) +// CHECK-NEXT: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('vm_addr', 0) +// CHECK-NEXT: ('vm_size', 4) +// CHECK-NEXT: ('file_offset', 392) +// CHECK-NEXT: ('file_size', 4) +// CHECK-NEXT: ('maxprot', 7) +// CHECK-NEXT: ('initprot', 7) +// CHECK-NEXT: ('num_sections', 3) +// CHECK-NEXT: ('flags', 0) +// CHECK-NEXT: ('sections', [ +// CHECK-NEXT: # Section 0 +// CHECK-NEXT: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 0) +// CHECK-NEXT: ('offset', 392) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x80000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '') +// CHECK-NEXT: # Section 1 +// CHECK-NEXT: (('section_name', '__datacoal_nt\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 4) +// CHECK-NEXT: ('offset', 392) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 396) +// CHECK-NEXT: ('num_reloc', 1) +// CHECK-NEXT: ('flags', 0xb) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('word-0', 0x0), +// CHECK-NEXT: ('word-1', 0xc000001)), +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '00000000') +// CHECK-NEXT: # Section 2 +// CHECK-NEXT: (('section_name', '__const_coal\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 4) +// CHECK-NEXT: ('size', 0) +// CHECK-NEXT: ('offset', 396) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0xb) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '') +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 1 +// CHECK-NEXT: (('command', 2) +// CHECK-NEXT: ('size', 24) +// CHECK-NEXT: ('symoff', 404) +// CHECK-NEXT: ('nsyms', 2) +// CHECK-NEXT: ('stroff', 428) +// CHECK-NEXT: ('strsize', 28) +// CHECK-NEXT: ('_string_data', '\x00__ZTS3optIbE\x00__ZTI3optIbE\x00\x00') +// CHECK-NEXT: ('_symbols', [ +// CHECK-NEXT: # Symbol 0 +// CHECK-NEXT: (('n_strx', 14) +// CHECK-NEXT: ('n_type', 0xf) +// CHECK-NEXT: ('n_sect', 2) +// CHECK-NEXT: ('n_desc', 128) +// CHECK-NEXT: ('n_value', 0) +// CHECK-NEXT: ('_string', '__ZTI3optIbE') +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 1 +// CHECK-NEXT: (('n_strx', 1) +// CHECK-NEXT: ('n_type', 0xf) +// CHECK-NEXT: ('n_sect', 3) +// CHECK-NEXT: ('n_desc', 128) +// CHECK-NEXT: ('n_value', 4) +// CHECK-NEXT: ('_string', '__ZTS3optIbE') +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 2 +// CHECK-NEXT: (('command', 11) +// CHECK-NEXT: ('size', 80) +// CHECK-NEXT: ('ilocalsym', 0) +// CHECK-NEXT: ('nlocalsym', 0) +// CHECK-NEXT: ('iextdefsym', 0) +// CHECK-NEXT: ('nextdefsym', 2) +// CHECK-NEXT: ('iundefsym', 2) +// CHECK-NEXT: ('nundefsym', 0) +// CHECK-NEXT: ('tocoff', 0) +// CHECK-NEXT: ('ntoc', 0) +// CHECK-NEXT: ('modtaboff', 0) +// CHECK-NEXT: ('nmodtab', 0) +// CHECK-NEXT: ('extrefsymoff', 0) +// CHECK-NEXT: ('nextrefsyms', 0) +// CHECK-NEXT: ('indirectsymoff', 0) +// CHECK-NEXT: ('nindirectsyms', 0) +// CHECK-NEXT: ('extreloff', 0) +// CHECK-NEXT: ('nextrel', 0) +// CHECK-NEXT: ('locreloff', 0) +// CHECK-NEXT: ('nlocrel', 0) +// CHECK-NEXT: ('_indirect_symbols', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/MachO/x86_32-optimal_nop.s b/test/MC/MachO/x86_32-optimal_nop.s index 09c541f..2475140 100644 --- a/test/MC/MachO/x86_32-optimal_nop.s +++ b/test/MC/MachO/x86_32-optimal_nop.s @@ -160,7 +160,7 @@ f0: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ @@ -192,7 +192,7 @@ f0: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', 'c390c300 00000000 00000000 00000000 c3c36690 c3000000 00000000 00000000 c30f1f00 c3000000 00000000 00000000 c3c3c3c3 0f1f4000 c3000000 00000000 c3c3c30f 1f440000 c3000000 00000000 c3c3660f 1f440000 c3000000 00000000 c30f1f80 00000000 c3000000 00000000 c3c3c3c3 c3c3c3c3 c3000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c366662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 660f1f44 0000660f 1f440000 c3000000 00000000 00000000 00000000 c3c3c366 0f1f4400 000f1f80 00000000 c3000000 00000000 00000000 00000000 c3c30f1f 80000000 000f1f80 00000000 c3000000 00000000 00000000 00000000 c30f1f80 00000000 0f1f8400 00000000 c3') +// CHECK: ('_section_data', 'c390c300 00000000 00000000 00000000 c3c36690 c3000000 00000000 00000000 c30f1f00 c3000000 00000000 00000000 c3c3c3c3 0f1f4000 c3000000 00000000 c3c3c30f 1f440000 c3000000 00000000 c3c3660f 1f440000 c3000000 00000000 c30f1f80 00000000 c3000000 00000000 c3c3c3c3 c3c3c3c3 c3000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c366662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 6666662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c366 6666662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c36666 6666662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3666666 6666662e 0f1f8400 00000000 c3') // CHECK: # Section 1 // CHECK: (('section_name', '__const\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') diff --git a/test/MC/MachO/x86_32-symbols.s b/test/MC/MachO/x86_32-symbols.s index 629ba7d..35ada35 100644 --- a/test/MC/MachO/x86_32-symbols.s +++ b/test/MC/MachO/x86_32-symbols.s @@ -124,7 +124,7 @@ D39: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 2608) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/x86_64-symbols.s b/test/MC/MachO/x86_64-symbols.s index c5c39a6..804cee8 100644 --- a/test/MC/MachO/x86_64-symbols.s +++ b/test/MC/MachO/x86_64-symbols.s @@ -124,7 +124,7 @@ D38: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 2656) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/zerofill-1.s b/test/MC/MachO/zerofill-1.s index a175d4c..805a786 100644 --- a/test/MC/MachO/zerofill-1.s +++ b/test/MC/MachO/zerofill-1.s @@ -11,7 +11,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/zerofill-2.s b/test/MC/MachO/zerofill-2.s index e76de84..16577e4 100644 --- a/test/MC/MachO/zerofill-2.s +++ b/test/MC/MachO/zerofill-2.s @@ -8,7 +8,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/zerofill-3.s b/test/MC/MachO/zerofill-3.s index e7f4c7b..cc81fa8 100644 --- a/test/MC/MachO/zerofill-3.s +++ b/test/MC/MachO/zerofill-3.s @@ -22,7 +22,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/zerofill-5.s b/test/MC/MachO/zerofill-5.s index 3ee3ac2..91f251b 100644 --- a/test/MC/MachO/zerofill-5.s +++ b/test/MC/MachO/zerofill-5.s @@ -9,7 +9,7 @@ // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/X86/x86-32-coverage.s b/test/MC/X86/x86-32-coverage.s index ea30e8d..4ec9fcd 100644 --- a/test/MC/X86/x86-32-coverage.s +++ b/test/MC/X86/x86-32-coverage.s @@ -267,6 +267,9 @@ // CHECK: leave leave +// CHECK: leave + leavel + // CHECK: seto %bl seto %bl @@ -3330,6 +3333,10 @@ // CHECK: encoding: [0xc9] leave +// CHECK: leave +// CHECK: encoding: [0xc9] + leavel + // CHECK: seto %bl // CHECK: encoding: [0x0f,0x90,0xc3] seto %bl diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s index f4adb5f..9dba652 100644 --- a/test/MC/X86/x86-32.s +++ b/test/MC/X86/x86-32.s @@ -15,9 +15,15 @@ monitor // CHECK: monitor // CHECK: encoding: [0x0f,0x01,0xc8] + monitor %eax, %ecx, %edx +// CHECK: monitor +// CHECK: encoding: [0x0f,0x01,0xc8] mwait // CHECK: mwait // CHECK: encoding: [0x0f,0x01,0xc9] + mwait %eax, %ecx +// CHECK: mwait +// CHECK: encoding: [0x0f,0x01,0xc9] vmcall // CHECK: vmcall @@ -543,7 +549,10 @@ popfl setng %bl setnle %bl - +// PR8686 + setneb %cl // CHECK: setne %cl + setcb %bl // CHECK: setb %bl + setnaeb %bl // CHECK: setb %bl // CHECK: lcalll $31438, $31438 @@ -799,3 +808,19 @@ pshufw $90, %mm4, %mm0 // CHECK: ud2b // CHECK: encoding: [0x0f,0xb9] ud2b + +// CHECK: loope 0 +// CHECK: encoding: [0xe1,A] + loopz 0 + +// CHECK: loopne 0 +// CHECK: encoding: [0xe0,A] + loopnz 0 + +// CHECK: strw +// CHECK: encoding: [0x66,0x0f,0x00,0xc8] + str %ax + +// CHECK: strl +// CHECK: encoding: [0x0f,0x00,0xc8] + str %eax diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s index b8b093c..fe056be 100644 --- a/test/MC/X86/x86-64.s +++ b/test/MC/X86/x86-64.s @@ -2,6 +2,18 @@ // RUN: FileCheck < %t %s // RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s + monitor +// CHECK: monitor +// CHECK: encoding: [0x0f,0x01,0xc8] + monitor %rax, %rcx, %rdx +// CHECK: monitor +// CHECK: encoding: [0x0f,0x01,0xc8] + mwait +// CHECK: mwait +// CHECK: encoding: [0x0f,0x01,0xc9] + mwait %rax, %rcx +// CHECK: mwait +// CHECK: encoding: [0x0f,0x01,0xc9] // Suffix inference: @@ -229,13 +241,32 @@ inl %dx // PR8114 // CHECK: outb %al, %dx +// CHECK: outb %al, %dx +// CHECK: outw %ax, %dx // CHECK: outw %ax, %dx // CHECK: outl %eax, %dx +// CHECK: outl %eax, %dx -out %al, (%dx) -out %ax, (%dx) -outl %eax, (%dx) +out %al, (%dx) +outb %al, (%dx) +out %ax, (%dx) +outw %ax, (%dx) +out %eax, (%dx) +outl %eax, (%dx) + +// CHECK: inb %dx, %al +// CHECK: inb %dx, %al +// CHECK: inw %dx, %ax +// CHECK: inw %dx, %ax +// CHECK: inl %dx, %eax +// CHECK: inl %dx, %eax +in (%dx), %al +inb (%dx), %al +in (%dx), %ax +inw (%dx), %ax +in (%dx), %eax +inl (%dx), %eax // rdar://8431422 @@ -504,6 +535,10 @@ fdivrp %st(1), %st(0) // CHECK: encoding: [0xde,0xf9] fsubrp %ST(0), %ST(1) // CHECK: encoding: [0xde,0xe9] fsubrp %ST(1), %ST(0) // CHECK: encoding: [0xde,0xe9] +// also PR8861 +fdivp %st(0), %st(1) // CHECK: encoding: [0xde,0xf1] +fdivp %st(1), %st(0) // CHECK: encoding: [0xde,0xf1] + movl foo(%rip), %eax // CHECK: movl foo(%rip), %eax @@ -632,6 +667,10 @@ movl 0, %eax // CHECK: movl 0, %eax # encoding: [0x8b,0x04,0x25,0x00,0x00,0x00 // CHECK: encoding: [0x75,A] jnz 0 +// PR9264 +btl $1, 0 // CHECK: btl $1, 0 # encoding: [0x0f,0xba,0x24,0x25,0x00,0x00,0x00,0x00,0x01] +bt $1, 0 // CHECK: btl $1, 0 # encoding: [0x0f,0xba,0x24,0x25,0x00,0x00,0x00,0x00,0x01] + // rdar://8017515 btq $0x01,%rdx // CHECK: btq $1, %rdx @@ -738,6 +777,11 @@ lock incl 1(%rsp) // CHECK: lock // CHECK: incl 1(%rsp) +// rdar://8741045 +lock/incl 1(%rsp) +// CHECK: lock +// CHECK: incl 1(%rsp) + // rdar://8033482 rep movsl // CHECK: rep @@ -902,3 +946,46 @@ mov %gs, (%rsi) // CHECK: movl %gs, (%rsi) # encoding: [0x8c,0x2e] idiv 0x7eed,%eax idiv 0xbabecafe,%eax idiv 0x12345678,%eax + +// PR8524 +movd %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8] +movd %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb] +movq %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8] +movq %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb] + +rex64 // CHECK: rex64 # encoding: [0x48] +data16 // CHECK: data16 # encoding: [0x66] + +// PR8855 +movq 18446744073709551615,%rbx // CHECK: movq -1, %rbx + +// PR8946 +movdqu %xmm0, %xmm1 // CHECK: movdqu %xmm0, %xmm1 # encoding: [0xf3,0x0f,0x6f,0xc8] + +// PR8935 +xgetbv // CHECK: xgetbv # encoding: [0x0f,0x01,0xd0] +xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1] + +// CHECK: loope 0 +// CHECK: encoding: [0xe1,A] + loopz 0 + +// CHECK: loopne 0 +// CHECK: encoding: [0xe0,A] + loopnz 0 + +// CHECK: strw +// CHECK: encoding: [0x66,0x0f,0x00,0xc8] + str %ax + +// CHECK: strl +// CHECK: encoding: [0x0f,0x00,0xc8] + str %eax + +// CHECK: strw +// CHECK: encoding: [0x66,0x0f,0x00,0xc8] + str %ax + +// CHECK: strq +// CHECK: encoding: [0x48,0x0f,0x00,0xc8] + str %rax diff --git a/test/MC/X86/x86_64-encoding.s b/test/MC/X86/x86_64-encoding.s index f45b0a2..756da4d 100644 --- a/test/MC/X86/x86_64-encoding.s +++ b/test/MC/X86/x86_64-encoding.s @@ -140,3 +140,18 @@ pshufb CPI1_0(%rip), %xmm1 // CHECK: encoding: [0x48,0x8b,0x04,0xe1] movq (%rcx,%riz,8), %rax +// CHECK: fxsaveq (%rax) +// CHECK: encoding: [0x48,0x0f,0xae,0x00] + fxsaveq (%rax) + +// CHECK: fxrstorq (%rax) +// CHECK: encoding: [0x48,0x0f,0xae,0x08] + fxrstorq (%rax) + +// CHECK: leave +// CHECK: encoding: [0xc9] + leave + +// CHECK: leave +// CHECK: encoding: [0xc9] + leaveq diff --git a/test/Makefile b/test/Makefile index 87f21cf..b37bbfc 100644 --- a/test/Makefile +++ b/test/Makefile @@ -64,7 +64,7 @@ LIT_ALL_TESTSUITES += $(PROJ_OBJ_DIR)/../tools/clang/test # Force creation of Clang's lit.site.cfg. clang-lit-site-cfg: FORCE - $(MAKE) -C $(PROJ_OBJ_DIR)/../tools/clang/test lit.site.cfg + $(MAKE) -C $(PROJ_OBJ_DIR)/../tools/clang/test lit.site.cfg Unit/lit.site.cfg extra-lit-site-cfgs:: clang-lit-site-cfg endif endif @@ -143,6 +143,7 @@ site.exp: FORCE @echo 'set llvmgcc_langs "$(LLVMGCC_LANGS)"' >> site.tmp @echo 'set llvmtoolsdir "$(ToolDir)"' >>site.tmp @echo 'set llvmlibsdir "$(LibDir)"' >>site.tmp + @echo 'set llvmshlibdir "$(SharedLibDir)"' >>site.tmp @echo 'set llvm_bindings "$(BINDINGS_TO_BUILD)"' >> site.tmp @echo 'set srcroot "$(LLVM_SRC_ROOT)"' >>site.tmp @echo 'set objroot "$(LLVM_OBJ_ROOT)"' >>site.tmp @@ -162,6 +163,7 @@ site.exp: FORCE @echo 'set grep "$(GREP)"' >>site.tmp @echo 'set gas "$(GAS)"' >>site.tmp @echo 'set llvmdsymutil "$(DSYMUTIL)"' >>site.tmp + @echo 'set emitir "$(LLVMCC_EMITIR_FLAG)"' >>site.tmp @echo '## All variables above are generated by configure. Do Not Edit ## ' >>site.tmp @test ! -f site.exp || \ sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp @@ -175,6 +177,7 @@ lit.site.cfg: site.exp -e "s#@LLVM_BINARY_DIR@#$(LLVM_OBJ_ROOT)#g" \ -e "s#@LLVM_TOOLS_DIR@#$(ToolDir)#g" \ -e "s#@LLVMGCCDIR@#$(LLVMGCCDIR)#g" \ + -e "s#@ENABLE_SHARED@#$(ENABLE_SHARED)#g" \ $(PROJ_SRC_DIR)/lit.site.cfg.in > $@ Unit/lit.site.cfg: $(PROJ_OBJ_DIR)/Unit/.dir FORCE @@ -185,6 +188,7 @@ Unit/lit.site.cfg: $(PROJ_OBJ_DIR)/Unit/.dir FORCE -e "s#@LLVMGCCDIR@#$(LLVMGCCDIR)#g" \ -e "s#@LLVM_BUILD_MODE@#$(BuildMode)#g" \ -e "s#@ENABLE_SHARED@#$(ENABLE_SHARED)#g" \ + -e "s#@SHLIBDIR@#$(SharedLibDir)#g" \ -e "s#@SHLIBPATH_VAR@#$(SHLIBPATH_VAR)#g" \ $(PROJ_SRC_DIR)/Unit/lit.site.cfg.in > $@ diff --git a/test/Object/TestObjectFiles/trivial-object-test.coff-i386 b/test/Object/TestObjectFiles/trivial-object-test.coff-i386 Binary files differnew file mode 100644 index 0000000..8cfd994 --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.coff-i386 diff --git a/test/Object/TestObjectFiles/trivial-object-test.coff-x86-64 b/test/Object/TestObjectFiles/trivial-object-test.coff-x86-64 Binary files differnew file mode 100644 index 0000000..0775914 --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.coff-x86-64 diff --git a/test/Object/TestObjectFiles/trivial-object-test.elf-i386 b/test/Object/TestObjectFiles/trivial-object-test.elf-i386 Binary files differnew file mode 100644 index 0000000..1a0ea40 --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.elf-i386 diff --git a/test/Object/TestObjectFiles/trivial-object-test.elf-x86-64 b/test/Object/TestObjectFiles/trivial-object-test.elf-x86-64 Binary files differnew file mode 100644 index 0000000..889f5d9 --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.elf-x86-64 diff --git a/test/Object/TestObjectFiles/trivial-object-test.macho-i386 b/test/Object/TestObjectFiles/trivial-object-test.macho-i386 Binary files differnew file mode 100644 index 0000000..099bd1e --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.macho-i386 diff --git a/test/Object/TestObjectFiles/trivial-object-test.macho-x86-64 b/test/Object/TestObjectFiles/trivial-object-test.macho-x86-64 Binary files differnew file mode 100644 index 0000000..93eeb5d --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.macho-x86-64 diff --git a/test/Object/dg.exp b/test/Object/dg.exp new file mode 100644 index 0000000..be82c51 --- /dev/null +++ b/test/Object/dg.exp @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{test}]] diff --git a/test/Object/nm-trivial-object.test-broken b/test/Object/nm-trivial-object.test-broken new file mode 100644 index 0000000..6de1780 --- /dev/null +++ b/test/Object/nm-trivial-object.test-broken @@ -0,0 +1,19 @@ +RUN: llvm-nm %p/TestObjectFiles/trivial-object-test.coff-i386 \ +RUN: | FileCheck %s -check-prefix COFF +RUN: llvm-nm %p/TestObjectFiles/trivial-object-test.coff-x86-64 \ +RUN: | FileCheck %s -check-prefix COFF +RUN: llvm-nm %p/TestObjectFiles/trivial-object-test.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF +RUN: llvm-nm %p/TestObjectFiles/trivial-object-test.elf-x86-64 \ +RUN: | FileCheck %s -check-prefix ELF + +COFF: 00000000 d .data +COFF: 00000000 t .text +COFF: 00000000 d L{{_?}}.str +COFF: U {{_?}}SomeOtherFunction +COFF: 00000000 T {{_?}}main +COFF: U {{_?}}puts + +ELF: U SomeOtherFunction +ELF: 00000000 T main +ELF: U puts diff --git a/test/Object/objdump-trivial-object.test-broken b/test/Object/objdump-trivial-object.test-broken new file mode 100644 index 0000000..c4855fd --- /dev/null +++ b/test/Object/objdump-trivial-object.test-broken @@ -0,0 +1,54 @@ +RUN: llvm-objdump -d %p/TestObjectFiles/trivial-object-test.coff-i386 \ +RUN: | FileCheck %s -check-prefix COFF-i386 +RUN: llvm-objdump -d %p/TestObjectFiles/trivial-object-test.coff-x86-64 \ +RUN: | FileCheck %s -check-prefix COFF-x86-64 +RUN: llvm-objdump -d %p/TestObjectFiles/trivial-object-test.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF-i386 +RUN: llvm-objdump -d %p/TestObjectFiles/trivial-object-test.elf-x86-64 \ +RUN: | FileCheck %s -check-prefix ELF-x86-64 + +COFF-i386: file format COFF-i386 +COFF-i386: Disassembly of section .text: +COFF-i386: 0: 83 ec 0c subl $12, %esp +COFF-i386: 3: c7 44 24 08 00 00 00 00 movl $0, 8(%esp) +COFF-i386: b: c7 04 24 00 00 00 00 movl $0, (%esp) +COFF-i386: 12: e8 00 00 00 00 calll 0 +COFF-i386: 17: e8 00 00 00 00 calll 0 +COFF-i386: 1c: 8b 44 24 08 movl 8(%esp), %eax +COFF-i386: 20: 83 c4 0c addl $12, %esp +COFF-i386: 23: c3 ret + +COFF-x86-64: file format COFF-x86-64 +COFF-x86-64: Disassembly of section .text: +COFF-x86-64: 0: 48 83 ec 28 subq $40, %rsp +COFF-x86-64: 4: c7 44 24 24 00 00 00 00 movl $0, 36(%rsp) +COFF-x86-64: c: 48 8d 0d 00 00 00 00 leaq (%rip), %rcx +COFF-x86-64: 13: e8 00 00 00 00 callq 0 +COFF-x86-64: 18: e8 00 00 00 00 callq 0 +COFF-x86-64: 1d: 8b 44 24 24 movl 36(%rsp), %eax +COFF-x86-64: 21: 48 83 c4 28 addq $40, %rsp +COFF-x86-64: 25: c3 ret + + +ELF-i386: file format ELF32-i386 +ELF-i386: Disassembly of section .text: +ELF-i386: 0: 83 ec 0c subl $12, %esp +ELF-i386: 3: c7 44 24 08 00 00 00 00 movl $0, 8(%esp) +ELF-i386: b: c7 04 24 00 00 00 00 movl $0, (%esp) +ELF-i386: 12: e8 fc ff ff ff calll -4 +ELF-i386: 17: e8 fc ff ff ff calll -4 +ELF-i386: 1c: 8b 44 24 08 movl 8(%esp), %eax +ELF-i386: 20: 83 c4 0c addl $12, %esp +ELF-i386: 23: c3 ret + +ELF-x86-64: file format ELF64-x86-64 +ELF-x86-64: Disassembly of section .text: +ELF-x86-64: 0: 48 83 ec 08 subq $8, %rsp +ELF-x86-64: 4: c7 44 24 04 00 00 00 00 movl $0, 4(%rsp) +ELF-x86-64: c: bf 00 00 00 00 movl $0, %edi +ELF-x86-64: 11: e8 00 00 00 00 callq 0 +ELF-x86-64: 16: 30 c0 xorb %al, %al +ELF-x86-64: 18: e8 00 00 00 00 callq 0 +ELF-x86-64: 1d: 8b 44 24 04 movl 4(%rsp), %eax +ELF-x86-64: 21: 48 83 c4 08 addq $8, %rsp +ELF-x86-64: 25: c3 ret diff --git a/test/Other/close-stderr.ll b/test/Other/close-stderr.ll index b6dc1b2..40a01cc 100644 --- a/test/Other/close-stderr.ll +++ b/test/Other/close-stderr.ll @@ -5,6 +5,7 @@ ; CHECK: {{^1$}} ; CHECK: {{^0$}} ; XFAIL: vg_leak +; REQUIRES: shell ; Test that the error handling when writing to stderr fails exits the ; program cleanly rather than aborting. diff --git a/test/Scripts/elf-dump b/test/Scripts/elf-dump index 784533c..76cdbf9 100755 --- a/test/Scripts/elf-dump +++ b/test/Scripts/elf-dump @@ -97,8 +97,11 @@ class Section: print " ])" elif dumpdata: f.seek(self.sh_offset) - data = f.read(self.sh_size) - print " ('_section_data', '%s')" % common_dump.dataToHex(data) + if self.sh_type != 8: # != SHT_NOBITS + data = f.read(self.sh_size) + print " ('_section_data', '%s')" % common_dump.dataToHex(data) + else: + print " ('_section_data', '')" print " )," def dumpSymtab(f, section, strtab): @@ -118,8 +121,8 @@ def dumpSymtab(f, section, strtab): print " ('st_other', %s)" % common_dump.HexDump(f.read8()) print " ('st_shndx', %s)" % common_dump.HexDump(f.read16()) if f.is64Bit: - print " ('st_value', %s)" % common_dump.HexDump(f.read64()) - print " ('st_size', %s)" % common_dump.HexDump(f.read64()) + print " ('st_value', %s)" % common_dump.HexDump(f.read64(), 64) + print " ('st_size', %s)" % common_dump.HexDump(f.read64(), 64) print " )," def dumpRel(f, section, dumprela = False): diff --git a/test/Scripts/macho-dump b/test/Scripts/macho-dumpx index 8c9fa59..71e06d8 100755 --- a/test/Scripts/macho-dump +++ b/test/Scripts/macho-dumpx @@ -82,7 +82,7 @@ def dumpmacho(path, opts): print "('filetype', %r)" % filetype numLoadCommands = f.read32() - print "('num_load_commands', %r)" % filetype + print "('num_load_commands', %r)" % numLoadCommands loadCommandsSize = f.read32() print "('load_commands_size', %r)" % loadCommandsSize diff --git a/test/Scripts/macho-dump.bat b/test/Scripts/macho-dumpx.bat index 81484f6..81484f6 100644 --- a/test/Scripts/macho-dump.bat +++ b/test/Scripts/macho-dumpx.bat diff --git a/test/TableGen/ListManip.td b/test/TableGen/ListManip.td index 55fb5ea..6b1e491 100644 --- a/test/TableGen/ListManip.td +++ b/test/TableGen/ListManip.td @@ -7,6 +7,6 @@ class Bli<string _t> } class Bla<list<Bli> _bli> -: Bli<!car(_bli).t> +: Bli<!head(_bli).t> { } diff --git a/test/TableGen/Slice.td b/test/TableGen/Slice.td index 22bf7fb..13d9da2 100644 --- a/test/TableGen/Slice.td +++ b/test/TableGen/Slice.td @@ -66,19 +66,19 @@ def not : SDNode; multiclass scalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> { def SSrr : Inst<opcode, (outs FR32:$dst), (ins FR32:$src), !strconcat(asmstr, "\t$dst, $src"), - !if(!null(patterns),[]<dag>,patterns[0])>; + !if(!empty(patterns),[]<dag>,patterns[0])>; def SSrm : Inst<opcode, (outs FR32:$dst), (ins FR32:$src), !strconcat(asmstr, "\t$dst, $src"), - !if(!null(patterns),[]<dag>,!if(!null(!cdr(patterns)),patterns[0],patterns[1]))>; + !if(!empty(patterns),[]<dag>,!if(!empty(!tail(patterns)),patterns[0],patterns[1]))>; } multiclass vscalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> { def V#NAME#SSrr : Inst<opcode, (outs FR32:$dst), (ins FR32:$src), !strconcat(asmstr, "\t$dst, $src"), - !if(!null(patterns),[]<dag>,patterns[0])>; + !if(!empty(patterns),[]<dag>,patterns[0])>; def V#NAME#SSrm : Inst<opcode, (outs FR32:$dst), (ins FR32:$src), !strconcat(asmstr, "\t$dst, $src"), - !if(!null(patterns),[]<dag>,!if(!null(!cdr(patterns)),patterns[0],patterns[1]))>; + !if(!empty(patterns),[]<dag>,!if(!empty(!tail(patterns)),patterns[0],patterns[1]))>; } multiclass myscalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> : diff --git a/test/TableGen/if.td b/test/TableGen/if.td index 0bac0ba..c4d953e 100644 --- a/test/TableGen/if.td +++ b/test/TableGen/if.td @@ -1,20 +1,44 @@ -// RUN: tblgen %s | grep {\\\[1, 2, 3\\\]} | count 4 -// RUN: tblgen %s | grep {\\\[4, 5, 6\\\]} | count 2 +// RUN: tblgen %s | FileCheck %s // XFAIL: vg_leak +// Support for an `!if' operator as part of a `let' statement. +// CHECK: class C +// CHECK-NEXT: bits<16> n = { ?, ?, ?, ?, ?, ?, ?, !if({ C:x{2} }, 0, 1), !if({ C:x{2} }, 1, 1), !if({ C:x{2} }, 0, 0), !if({ C:x{1} }, C:y{3}, 0), !if({ C:x{1} }, C:y{2}, 1), !if({ C:x{0} }, C:y{3}, C:z), !if({ C:x{0} }, C:y{2}, C:y{2}), !if({ C:x{0} }, C:y{1}, C:y{1}), !if({ C:x{0} }, C:y{0}, C:y{0}) }; +class C<bits<3> x, bits<4> y, bit z> { + bits<16> n; + + let n{8-6} = !if(x{2}, 0b010, 0b110); + let n{5-4} = !if(x{1}, y{3-2}, {0, 1}); + let n{3-0} = !if(x{0}, y{3-0}, {z, y{2}, y{1}, y{0}}); +} + +// CHECK: def One +// CHECK-NEXT: list<int> first = [1, 2, 3]; +// CHECK-NEXT: list<int> rest = [1, 2, 3]; + +// CHECK: def OneB +// CHECK-NEXT: list<int> vals = [1, 2, 3]; + +// CHECK: def Two +// CHECK-NEXT: list<int> first = [1, 2, 3]; +// CHECK-NEXT: list<int> rest = [4, 5, 6]; + +// CHECK: def TwoB +// CHECK-NEXT: list<int> vals = [4, 5, 6]; + class A<list<list<int>> vals> { list<int> first = vals[0]; - list<int> rest = !if(!null(!cdr(vals)), vals[0], vals[1]); + list<int> rest = !if(!empty(!tail(vals)), vals[0], vals[1]); } def One : A<[[1,2,3]]>; -def Two : A<[[1,2,3],[4,5,6]]>; +def Two : A<[[1,2,3], [4,5,6]]>; class B<list<int> v> { list<int> vals = v; } -class BB<list<list<int>> vals> : B<!if(!null(!cdr(vals)), vals[0], vals[1])>; +class BB<list<list<int>> vals> : B<!if(!empty(!tail(vals)), vals[0], vals[1])>; class BBB<list<list<int>> vals> : BB<vals>; def OneB : BBB<[[1,2,3]]>; diff --git a/test/TableGen/lisp.td b/test/TableGen/lisp.td index b521e04..bbed869 100644 --- a/test/TableGen/lisp.td +++ b/test/TableGen/lisp.td @@ -15,7 +15,7 @@ class CDR<list<string> r, int n> { } class NameList<list<string> Names> : - List<Names>, CAR<!car(Names)>, CDR<!cdr(Names), !null(!cdr(Names))>; + List<Names>, CAR<!head(Names)>, CDR<!tail(Names), !empty(!tail(Names))>; def Three : NameList<["Tom", "Dick", "Harry"]>; diff --git a/test/Transforms/ArgumentPromotion/crash.ll b/test/Transforms/ArgumentPromotion/crash.ll index e2d3d4d..fed002a 100644 --- a/test/Transforms/ArgumentPromotion/crash.ll +++ b/test/Transforms/ArgumentPromotion/crash.ll @@ -36,3 +36,24 @@ entry: ret i1 undef } + +; PR8932 - infinite promotion. +%0 = type { %0* } + +define i32 @test2(i32 %a) { +init: + %0 = alloca %0 + %1 = alloca %0 + %2 = call i32 @"clay_assign(Chain, Chain)"(%0* %0, %0* %1) + ret i32 0 +} + +define internal i32 @"clay_assign(Chain, Chain)"(%0* %c, %0* %d) { +init: + %0 = getelementptr %0* %d, i32 0, i32 0 + %1 = load %0** %0 + %2 = getelementptr %0* %c, i32 0, i32 0 + %3 = load %0** %2 + %4 = call i32 @"clay_assign(Chain, Chain)"(%0* %3, %0* %1) + ret i32 0 +} diff --git a/test/Transforms/CodeGenPrepare/basic.ll b/test/Transforms/CodeGenPrepare/basic.ll new file mode 100644 index 0000000..3b1fca3 --- /dev/null +++ b/test/Transforms/CodeGenPrepare/basic.ll @@ -0,0 +1,29 @@ +; RUN: opt -codegenprepare %s -S -o - | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; CHECK: @test1 +; objectsize should fold to a constant, which causes the branch to fold to an +; uncond branch. +; rdar://8785296 +define i32 @test1(i8* %ptr) nounwind ssp noredzone align 2 { +entry: + %0 = tail call i64 @llvm.objectsize.i64(i8* %ptr, i1 false) + %1 = icmp ugt i64 %0, 3 + br i1 %1, label %T, label %trap + +; CHECK: entry: +; HECK-NEXT: ret i32 4 + +trap: ; preds = %0, %entry + tail call void @llvm.trap() noreturn nounwind + unreachable + +T: + ret i32 4 +} + +declare i64 @llvm.objectsize.i64(i8*, i1) nounwind readonly + +declare void @llvm.trap() nounwind diff --git a/test/Transforms/ConstProp/basictest.ll b/test/Transforms/ConstProp/basictest.ll index 14580c1..df57fb6 100644 --- a/test/Transforms/ConstProp/basictest.ll +++ b/test/Transforms/ConstProp/basictest.ll @@ -31,3 +31,12 @@ bb: ; CHECK: @test2 ; CHECK: ret i1 true } + +define i1 @TNAN() { +; CHECK: @TNAN +; CHECK: ret i1 true + %A = fcmp uno double 0x7FF8000000000000, 1.000000e+00 + %B = fcmp uno double 1.230000e+02, 1.000000e+00 + %C = or i1 %A, %B + ret i1 %C +} diff --git a/test/Transforms/ConstProp/calls.ll b/test/Transforms/ConstProp/calls.ll index 3c266fe..82d7324 100644 --- a/test/Transforms/ConstProp/calls.ll +++ b/test/Transforms/ConstProp/calls.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -constprop -S | not grep call +; RUN: opt < %s -constprop -S | FileCheck %s declare double @cos(double) @@ -8,23 +8,49 @@ declare double @tan(double) declare double @sqrt(double) -declare i1 @llvm.isunordered.f64(double, double) - define double @T() { - %A = call double @cos( double 0.000000e+00 ) ; <double> [#uses=1] - %B = call double @sin( double 0.000000e+00 ) ; <double> [#uses=1] - %a = fadd double %A, %B ; <double> [#uses=1] - %C = call double @tan( double 0.000000e+00 ) ; <double> [#uses=1] - %b = fadd double %a, %C ; <double> [#uses=1] - %D = call double @sqrt( double 4.000000e+00 ) ; <double> [#uses=1] - %c = fadd double %b, %D ; <double> [#uses=1] - ret double %c +; CHECK: @T +; CHECK-NOT: call +; CHECK: ret + %A = call double @cos(double 0.000000e+00) + %B = call double @sin(double 0.000000e+00) + %a = fadd double %A, %B + %C = call double @tan(double 0.000000e+00) + %b = fadd double %a, %C + %D = call double @sqrt(double 4.000000e+00) + %c = fadd double %b, %D + ret double %c } -define i1 @TNAN() { - %A = fcmp uno double 0x7FF8000000000000, 1.000000e+00 ; <i1> [#uses=1] - %B = fcmp uno double 1.230000e+02, 1.000000e+00 ; <i1> [#uses=1] - %C = or i1 %A, %B ; <i1> [#uses=1] - ret i1 %C +define i1 @test_sse_cvt() nounwind readnone { +; CHECK: @test_sse_cvt +; CHECK-NOT: call +; CHECK: ret i1 true +entry: + %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind + %i1 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind + %i2 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind + %i3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind + %i4 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 1.75, double undef>) nounwind + %i5 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> <double 1.75, double undef>) nounwind + %i6 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> <double 1.75, double undef>) nounwind + %i7 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> <double 1.75, double undef>) nounwind + %sum11 = add i32 %i0, %i1 + %sum12 = add i32 %i4, %i5 + %sum1 = add i32 %sum11, %sum12 + %sum21 = add i64 %i2, %i3 + %sum22 = add i64 %i6, %i7 + %sum2 = add i64 %sum21, %sum22 + %sum1.sext = sext i32 %sum1 to i64 + %b = icmp eq i64 %sum1.sext, %sum2 + ret i1 %b } +declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone +declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone +declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone +declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone +declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone +declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone +declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone +declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone diff --git a/test/Transforms/ConstProp/constant-expr.ll b/test/Transforms/ConstProp/constant-expr.ll index 556ed1f..1088fa6 100644 --- a/test/Transforms/ConstProp/constant-expr.ll +++ b/test/Transforms/ConstProp/constant-expr.ll @@ -65,3 +65,47 @@ ; No check line. This used to crash llvm-as. @T6 = global <2 x i1> fcmp ole (<2 x float> fdiv (<2 x float> undef, <2 x float> <float 1.000000e+00, float 1.000000e+00>), <2 x float> zeroinitializer) + + +; PR9011 + +@pr9011_1 = constant <4 x i32> zext (<4 x i8> zeroinitializer to <4 x i32>) +; CHECK: pr9011_1 = constant <4 x i32> zeroinitializer +@pr9011_2 = constant <4 x i32> sext (<4 x i8> zeroinitializer to <4 x i32>) +; CHECK: pr9011_2 = constant <4 x i32> zeroinitializer +@pr9011_3 = constant <4 x i32> bitcast (<16 x i8> zeroinitializer to <4 x i32>) +; CHECK: pr9011_3 = constant <4 x i32> zeroinitializer +@pr9011_4 = constant <4 x float> uitofp (<4 x i8> zeroinitializer to <4 x float>) +; CHECK: pr9011_4 = constant <4 x float> zeroinitializer +@pr9011_5 = constant <4 x float> sitofp (<4 x i8> zeroinitializer to <4 x float>) +; CHECK: pr9011_5 = constant <4 x float> zeroinitializer +@pr9011_6 = constant <4 x i32> fptosi (<4 x float> zeroinitializer to <4 x i32>) +; CHECK: pr9011_6 = constant <4 x i32> zeroinitializer +@pr9011_7 = constant <4 x i32> fptoui (<4 x float> zeroinitializer to <4 x i32>) +; CHECK: pr9011_7 = constant <4 x i32> zeroinitializer +@pr9011_8 = constant <4 x float> fptrunc (<4 x double> zeroinitializer to <4 x float>) +; CHECK: pr9011_8 = constant <4 x float> zeroinitializer +@pr9011_9 = constant <4 x double> fpext (<4 x float> zeroinitializer to <4 x double>) +; CHECK: pr9011_9 = constant <4 x double> zeroinitializer + +@pr9011_10 = constant <4 x double> bitcast (i256 0 to <4 x double>) +; CHECK: pr9011_10 = constant <4 x double> zeroinitializer +@pr9011_11 = constant <4 x float> bitcast (i128 0 to <4 x float>) +; CHECK: pr9011_11 = constant <4 x float> zeroinitializer +@pr9011_12 = constant <4 x i32> bitcast (i128 0 to <4 x i32>) +; CHECK: pr9011_12 = constant <4 x i32> zeroinitializer +@pr9011_13 = constant i256 bitcast (<4 x double> zeroinitializer to i256) +; CHECK: pr9011_13 = constant i256 0 +@pr9011_14 = constant i128 bitcast (<4 x float> zeroinitializer to i128) +; CHECK: pr9011_14 = constant i128 0 +@pr9011_15 = constant i128 bitcast (<4 x i32> zeroinitializer to i128) +; CHECK: pr9011_15 = constant i128 0 + +@select = internal constant + i32 select (i1 icmp ult (i32 ptrtoint (i8* @X to i32), + i32 ptrtoint (i8* @Y to i32)), + i32 select (i1 icmp ult (i32 ptrtoint (i8* @X to i32), + i32 ptrtoint (i8* @Y to i32)), + i32 10, i32 20), + i32 30) +; CHECK: select = internal constant i32 select {{.*}} i32 10, i32 30 diff --git a/test/Transforms/ConstProp/extractvalue.ll b/test/Transforms/ConstProp/extractvalue.ll new file mode 100644 index 0000000..32d5291 --- /dev/null +++ b/test/Transforms/ConstProp/extractvalue.ll @@ -0,0 +1,68 @@ +; RUN: opt < %s -constprop -S | FileCheck %s + +%struct = type { i32, [4 x i8] } +%array = type [3 x %struct] + +define i32 @test1() { + %A = extractvalue %struct { i32 2, [4 x i8] c"foo\00" }, 0 + ret i32 %A +; CHECK: @test1 +; CHECK: ret i32 2 +} + +define i8 @test2() { + %A = extractvalue %struct { i32 2, [4 x i8] c"foo\00" }, 1, 2 + ret i8 %A +; CHECK: @test2 +; CHECK: ret i8 111 +} + +define i32 @test3() { + %A = extractvalue %array [ %struct { i32 0, [4 x i8] c"aaaa" }, %struct { i32 1, [4 x i8] c"bbbb" }, %struct { i32 2, [4 x i8] c"cccc" } ], 1, 0 + ret i32 %A +; CHECK: @test3 +; CHECK: ret i32 1 +} + +define i32 @zeroinitializer-test1() { + %A = extractvalue %struct zeroinitializer, 0 + ret i32 %A +; CHECK: @zeroinitializer-test1 +; CHECK: ret i32 0 +} + +define i8 @zeroinitializer-test2() { + %A = extractvalue %struct zeroinitializer, 1, 2 + ret i8 %A +; CHECK: @zeroinitializer-test2 +; CHECK: ret i8 0 +} + +define i32 @zeroinitializer-test3() { + %A = extractvalue %array zeroinitializer, 1, 0 + ret i32 %A +; CHECK: @zeroinitializer-test3 +; CHECK: ret i32 0 +} + +define i32 @undef-test1() { + %A = extractvalue %struct undef, 0 + ret i32 %A +; CHECK: @undef-test1 +; CHECK: ret i32 undef +} + +define i8 @undef-test2() { + %A = extractvalue %struct undef, 1, 2 + ret i8 %A +; CHECK: @undef-test2 +; CHECK: ret i8 undef +} + +define i32 @undef-test3() { + %A = extractvalue %array undef, 1, 0 + ret i32 %A +; CHECK: @undef-test3 +; CHECK: ret i32 undef +} + diff --git a/test/Transforms/ConstProp/insertvalue.ll b/test/Transforms/ConstProp/insertvalue.ll new file mode 100644 index 0000000..f0eb553 --- /dev/null +++ b/test/Transforms/ConstProp/insertvalue.ll @@ -0,0 +1,68 @@ +; RUN: opt < %s -constprop -S | FileCheck %s + +%struct = type { i32, [4 x i8] } +%array = type [3 x %struct] + +define %struct @test1() { + %A = insertvalue %struct { i32 2, [4 x i8] c"foo\00" }, i32 1, 0 + ret %struct %A +; CHECK: @test1 +; CHECK: ret %struct { i32 1, [4 x i8] c"foo\00" } +} + +define %struct @test2() { + %A = insertvalue %struct { i32 2, [4 x i8] c"foo\00" }, i8 1, 1, 2 + ret %struct %A +; CHECK: @test2 +; CHECK: ret %struct { i32 2, [4 x i8] c"fo\01\00" } +} + +define %array @test3() { + %A = insertvalue %array [ %struct { i32 0, [4 x i8] c"aaaa" }, %struct { i32 1, [4 x i8] c"bbbb" }, %struct { i32 2, [4 x i8] c"cccc" } ], i32 -1, 1, 0 + ret %array %A +; CHECK: @test3 +; CHECK:ret %array [%struct { i32 0, [4 x i8] c"aaaa" }, %struct { i32 -1, [4 x i8] c"bbbb" }, %struct { i32 2, [4 x i8] c"cccc" }] +} + +define %struct @zeroinitializer-test1() { + %A = insertvalue %struct zeroinitializer, i32 1, 0 + ret %struct %A +; CHECK: @zeroinitializer-test1 +; CHECK: ret %struct { i32 1, [4 x i8] zeroinitializer } +} + +define %struct @zeroinitializer-test2() { + %A = insertvalue %struct zeroinitializer, i8 1, 1, 2 + ret %struct %A +; CHECK: @zeroinitializer-test2 +; CHECK: ret %struct { i32 0, [4 x i8] c"\00\00\01\00" } +} + +define %array @zeroinitializer-test3() { + %A = insertvalue %array zeroinitializer, i32 1, 1, 0 + ret %array %A +; CHECK: @zeroinitializer-test3 +; CHECK: ret %array [%struct zeroinitializer, %struct { i32 1, [4 x i8] zeroinitializer }, %struct zeroinitializer] +} + +define %struct @undef-test1() { + %A = insertvalue %struct undef, i32 1, 0 + ret %struct %A +; CHECK: @undef-test1 +; CHECK: ret %struct { i32 1, [4 x i8] undef } +} + +define %struct @undef-test2() { + %A = insertvalue %struct undef, i8 0, 1, 2 + ret %struct %A +; CHECK: @undef-test2 +; CHECK: ret %struct { i32 undef, [4 x i8] [i8 undef, i8 undef, i8 0, i8 undef] } +} + +define %array @undef-test3() { + %A = insertvalue %array undef, i32 0, 1, 0 + ret %array %A +; CHECK: @undef-test3 +; CHECK: ret %array [%struct undef, %struct { i32 0, [4 x i8] undef }, %struct undef] +} + diff --git a/test/Transforms/ConstProp/loads.ll b/test/Transforms/ConstProp/loads.ll index 9fbba2b..74d80aa 100644 --- a/test/Transforms/ConstProp/loads.ll +++ b/test/Transforms/ConstProp/loads.ll @@ -120,3 +120,20 @@ define i1 @test13() { ; CHECK: @test13 ; CHECK: ret i1 false } + +@g6 = constant [2 x i8*] [i8* inttoptr (i64 1 to i8*), i8* inttoptr (i64 2 to i8*)] +define i64 @test14() nounwind { +entry: + %tmp = load i64* bitcast ([2 x i8*]* @g6 to i64*) + ret i64 %tmp +; CHECK: @test14 +; CHECK: ret i64 1 +} + +define i64 @test15() nounwind { +entry: + %tmp = load i64* bitcast (i8** getelementptr inbounds ([2 x i8*]* @g6, i32 0, i64 1) to i64*) + ret i64 %tmp +; CHECK: @test15 +; CHECK: ret i64 2 +} diff --git a/test/Transforms/ConstProp/logicaltest.ll b/test/Transforms/ConstProp/logicaltest.ll index 7a90a71..c74296a 100644 --- a/test/Transforms/ConstProp/logicaltest.ll +++ b/test/Transforms/ConstProp/logicaltest.ll @@ -1,7 +1,7 @@ ; Ensure constant propogation of logical instructions is working correctly. -; RUN: opt < %s -constprop -die -S | \ -; RUN: not egrep {and|or|xor} +; RUN: opt < %s -constprop -die -S | FileCheck %s +; CHECK-NOT: {{and|or|xor}} define i32 @test1() { %R = and i32 4, 1234 ; <i32> [#uses=1] diff --git a/test/Transforms/ConstantMerge/2011-01-15-EitherOrder.ll b/test/Transforms/ConstantMerge/2011-01-15-EitherOrder.ll new file mode 100644 index 0000000..f561daf --- /dev/null +++ b/test/Transforms/ConstantMerge/2011-01-15-EitherOrder.ll @@ -0,0 +1,18 @@ +; RUN: opt -constmerge %s -S -o - | FileCheck %s +; PR8978 + +declare i32 @zed(%struct.foobar*, %struct.foobar*) + +%struct.foobar = type { i32 } +; CHECK: bar.d +@bar.d = unnamed_addr constant %struct.foobar zeroinitializer, align 4 +; CHECK-NOT: foo.d +@foo.d = internal constant %struct.foobar zeroinitializer, align 4 +define i32 @main() nounwind ssp { +entry: +; CHECK: bar.d + %call2 = tail call i32 @zed(%struct.foobar* @foo.d, %struct.foobar* @bar.d) +nounwind + ret i32 0 +} + diff --git a/test/Transforms/ConstantMerge/merge-both.ll b/test/Transforms/ConstantMerge/merge-both.ll new file mode 100644 index 0000000..0282f46 --- /dev/null +++ b/test/Transforms/ConstantMerge/merge-both.ll @@ -0,0 +1,26 @@ +; RUN: opt -constmerge %s -S -o - | FileCheck %s +; Test that in one run var3 is merged into var2 and var1 into var4. + +declare void @zed(%struct.foobar*, %struct.foobar*) + +%struct.foobar = type { i32 } + +@var1 = internal constant %struct.foobar { i32 2 } +@var2 = unnamed_addr constant %struct.foobar { i32 2 } +@var3 = internal constant %struct.foobar { i32 2 } +@var4 = unnamed_addr constant %struct.foobar { i32 2 } + +; CHECK: %struct.foobar = type { i32 } +; CHECK-NOT: @ +; CHECK: @var2 = constant %struct.foobar { i32 2 } +; CHECK-NEXT: @var4 = constant %struct.foobar { i32 2 } +; CHECK-NOT: @ +; CHECK: declare void @zed(%struct.foobar*, %struct.foobar*) + +define i32 @main() { +entry: + call void @zed(%struct.foobar* @var1, %struct.foobar* @var2) + call void @zed(%struct.foobar* @var3, %struct.foobar* @var4) + ret i32 0 +} + diff --git a/test/Transforms/ConstantMerge/unnamed-addr.ll b/test/Transforms/ConstantMerge/unnamed-addr.ll new file mode 100644 index 0000000..2410083 --- /dev/null +++ b/test/Transforms/ConstantMerge/unnamed-addr.ll @@ -0,0 +1,40 @@ +; RUN: opt -constmerge %s -S -o - | FileCheck %s +; Test which corresponding x and y are merged and that unnamed_addr +; is correctly set. + +declare void @zed(%struct.foobar*, %struct.foobar*) + +%struct.foobar = type { i32 } + +@test1.x = internal constant %struct.foobar { i32 1 } +@test1.y = constant %struct.foobar { i32 1 } + +@test2.x = internal constant %struct.foobar { i32 2 } +@test2.y = unnamed_addr constant %struct.foobar { i32 2 } + +@test3.x = internal unnamed_addr constant %struct.foobar { i32 3 } +@test3.y = constant %struct.foobar { i32 3 } + +@test4.x = internal unnamed_addr constant %struct.foobar { i32 4 } +@test4.y = unnamed_addr constant %struct.foobar { i32 4 } + + +; CHECK: %struct.foobar = type { i32 } +; CHECK-NOT: @ +; CHECK: @test1.x = internal constant %struct.foobar { i32 1 } +; CHECK-NEXT: @test1.y = constant %struct.foobar { i32 1 } +; CHECK-NEXT: @test2.y = constant %struct.foobar { i32 2 } +; CHECK-NEXT: @test3.y = constant %struct.foobar { i32 3 } +; CHECK-NEXT: @test4.y = unnamed_addr constant %struct.foobar { i32 4 } +; CHECK-NOT: @ +; CHECK: declare void @zed(%struct.foobar*, %struct.foobar*) + +define i32 @main() { +entry: + call void @zed(%struct.foobar* @test1.x, %struct.foobar* @test1.y) + call void @zed(%struct.foobar* @test2.x, %struct.foobar* @test2.y) + call void @zed(%struct.foobar* @test3.x, %struct.foobar* @test3.y) + call void @zed(%struct.foobar* @test4.x, %struct.foobar* @test4.y) + ret i32 0 +} + diff --git a/test/Transforms/CorrelatedValuePropagation/crash.ll b/test/Transforms/CorrelatedValuePropagation/crash.ll index 8636788..80c43d0 100644 --- a/test/Transforms/CorrelatedValuePropagation/crash.ll +++ b/test/Transforms/CorrelatedValuePropagation/crash.ll @@ -18,3 +18,20 @@ for.cond.us.us: ; preds = %for.cond.us.us for.end: ; preds = %for.cond.us, %for.cond.us.us, %entry ret void } + +; PR 8790 +define void @test2() nounwind ssp { +entry: + br label %func_29.exit + +sdf.exit.i: + %l_44.1.mux.i = select i1 %tobool5.not.i, i8 %l_44.1.mux.i, i8 1 + br label %srf.exit.i + +srf.exit.i: + %tobool5.not.i = icmp ne i8 undef, 0 + br i1 %tobool5.not.i, label %sdf.exit.i, label %func_29.exit + +func_29.exit: + ret void +} diff --git a/test/Transforms/CorrelatedValuePropagation/non-null.ll b/test/Transforms/CorrelatedValuePropagation/non-null.ll new file mode 100644 index 0000000..b14abd8 --- /dev/null +++ b/test/Transforms/CorrelatedValuePropagation/non-null.ll @@ -0,0 +1,103 @@ +; RUN: opt < %s -correlated-propagation -S | FileCheck %s + +define void @test1(i8* %ptr) { +; CHECK: test1 + %A = load i8* %ptr + br label %bb +bb: + icmp ne i8* %ptr, null +; CHECK-NOT: icmp + ret void +} + +define void @test2(i8* %ptr) { +; CHECK: test2 + store i8 0, i8* %ptr + br label %bb +bb: + icmp ne i8* %ptr, null +; CHECK-NOT: icmp + ret void +} + +define void @test3() { +; CHECK: test3 + %ptr = alloca i8 + br label %bb +bb: + icmp ne i8* %ptr, null +; CHECK-NOT: icmp + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) +define void @test4(i8* %dest, i8* %src) { +; CHECK: test4 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 1, i32 1, i1 false) + br label %bb +bb: + icmp ne i8* %dest, null + icmp ne i8* %src, null +; CHECK-NOT: icmp + ret void +} + +declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) +define void @test5(i8* %dest, i8* %src) { +; CHECK: test5 + call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 1, i32 1, i1 false) + br label %bb +bb: + icmp ne i8* %dest, null + icmp ne i8* %src, null +; CHECK-NOT: icmp + ret void +} + +declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i32, i1) +define void @test6(i8* %dest) { +; CHECK: test6 + call void @llvm.memset.p0i8.i32(i8* %dest, i8 255, i32 1, i32 1, i1 false) + br label %bb +bb: + icmp ne i8* %dest, null +; CHECK-NOT: icmp + ret void +} + +define void @test7(i8* %dest, i8* %src, i32 %len) { +; CHECK: test7 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i32 1, i1 false) + br label %bb +bb: + %KEEP1 = icmp ne i8* %dest, null +; CHECK: KEEP1 + %KEEP2 = icmp ne i8* %src, null +; CHECK: KEEP2 + ret void +} + +declare void @llvm.memcpy.p1i8.p1i8.i32(i8 addrspace(1) *, i8 addrspace(1) *, i32, i32, i1) +define void @test8(i8 addrspace(1) * %dest, i8 addrspace(1) * %src) { +; CHECK: test8 + call void @llvm.memcpy.p1i8.p1i8.i32(i8 addrspace(1) * %dest, i8 addrspace(1) * %src, i32 1, i32 1, i1 false) + br label %bb +bb: + %KEEP1 = icmp ne i8 addrspace(1) * %dest, null +; CHECK: KEEP1 + %KEEP2 = icmp ne i8 addrspace(1) * %src, null +; CHECK: KEEP2 + ret void +} + +define void @test9(i8* %dest, i8* %src) { +; CHECK: test9 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 1, i32 1, i1 true) + br label %bb +bb: + %KEEP1 = icmp ne i8* %dest, null +; CHECK: KEEP1 + %KEEP2 = icmp ne i8* %src, null +; CHECK: KEEP2 + ret void +} diff --git a/test/Transforms/DeadArgElim/deadexternal.ll b/test/Transforms/DeadArgElim/deadexternal.ll index 7256b93..8409261 100644 --- a/test/Transforms/DeadArgElim/deadexternal.ll +++ b/test/Transforms/DeadArgElim/deadexternal.ll @@ -1,5 +1,4 @@ ; RUN: opt -deadargelim -S %s | FileCheck %s -; XFAIL: * define void @test(i32) { ret void @@ -11,3 +10,43 @@ define void @foo() { ; CHECK: @foo ; CHECK: i32 undef } + +define void @f(i32 %X) { +entry: + tail call void @sideeffect() nounwind + ret void +} + +declare void @sideeffect() + +define void @g(i32 %n) { +entry: + %add = add nsw i32 %n, 1 +; CHECK: tail call void @f(i32 undef) + tail call void @f(i32 %add) + ret void +} + +define void @h() { +entry: + %i = alloca i32, align 4 + volatile store i32 10, i32* %i, align 4 +; CHECK: %tmp = volatile load i32* %i, align 4 +; CHECK-next: call void @f(i32 undef) + %tmp = volatile load i32* %i, align 4 + call void @f(i32 %tmp) + ret void +} + +; Check that callers are not transformed for weak definitions. +define weak i32 @weak_f(i32 %x) nounwind { +entry: + ret i32 0 +} +define void @weak_f_caller() nounwind { +entry: +; CHECK: call i32 @weak_f(i32 10) + %call = tail call i32 @weak_f(i32 10) + ret void +} + diff --git a/test/Transforms/DeadStoreElimination/2004-11-28-LiveStoreDeleted.ll b/test/Transforms/DeadStoreElimination/2004-11-28-LiveStoreDeleted.ll deleted file mode 100644 index d1a9dd8..0000000 --- a/test/Transforms/DeadStoreElimination/2004-11-28-LiveStoreDeleted.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: opt < %s -dse -scalarrepl -instcombine | \ -; RUN: llvm-dis | not grep {ret i32 undef} - -define i32 @test(double %__x) { - %__u = alloca { [3 x i32] } ; <{ [3 x i32] }*> [#uses=2] - %tmp.1 = bitcast { [3 x i32] }* %__u to double* ; <double*> [#uses=1] - store double %__x, double* %tmp.1 - %tmp.4 = getelementptr { [3 x i32] }* %__u, i32 0, i32 0, i32 1 ; <i32*> [#uses=1] - %tmp.5 = load i32* %tmp.4 ; <i32> [#uses=1] - %tmp.6 = icmp slt i32 %tmp.5, 0 ; <i1> [#uses=1] - %tmp.7 = zext i1 %tmp.6 to i32 ; <i32> [#uses=1] - ret i32 %tmp.7 -} - diff --git a/test/Transforms/DeadStoreElimination/2004-12-28-PartialStore.ll b/test/Transforms/DeadStoreElimination/2004-12-28-PartialStore.ll deleted file mode 100644 index cae2a6f..0000000 --- a/test/Transforms/DeadStoreElimination/2004-12-28-PartialStore.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: opt < %s -dse -S | \ -; RUN: grep {store i32 1234567} - -; Do not delete stores that are only partially killed. - -define i32 @test() { - %V = alloca i32 ; <i32*> [#uses=3] - store i32 1234567, i32* %V - %V2 = bitcast i32* %V to i8* ; <i8*> [#uses=1] - store i8 0, i8* %V2 - %X = load i32* %V ; <i32> [#uses=1] - ret i32 %X -} diff --git a/test/Transforms/DeadStoreElimination/2005-11-30-vaarg.ll b/test/Transforms/DeadStoreElimination/2005-11-30-vaarg.ll deleted file mode 100644 index 147ec84..0000000 --- a/test/Transforms/DeadStoreElimination/2005-11-30-vaarg.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: opt < %s -dse -S | grep store - -define double @foo(i8* %X) { - %X_addr = alloca i8* ; <i8**> [#uses=2] - store i8* %X, i8** %X_addr - %tmp.0 = va_arg i8** %X_addr, double ; <double> [#uses=1] - ret double %tmp.0 -} - diff --git a/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll b/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll deleted file mode 100644 index 0b08306..0000000 --- a/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll +++ /dev/null @@ -1,1113 +0,0 @@ -; RUN: opt < %s -globalsmodref-aa -dse -disable-output -target datalayout = "E-p:32:32" -target triple = "powerpc-apple-darwin8" - %struct.ECacheType = type { i32, i32, i32 } - %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } - %struct.QTType = type { i8, i8, i16, i32, i32, i32 } - %struct.TType = type { i8, i8, i8, i8, i16, i32, i32, i32 } - %struct._RuneEntry = type { i32, i32, i32, i32* } - %struct._RuneLocale = type { [8 x i8], [32 x i8], i32 (i8*, i32, i8**)*, i32 (i32, i8*, i32, i8**)*, i32, [256 x i32], [256 x i32], [256 x i32], %struct._RuneRange, %struct._RuneRange, %struct._RuneRange, i8*, i32 } - %struct._RuneRange = type { i32, %struct._RuneEntry* } - %struct.__sFILEX = type opaque - %struct.__sbuf = type { i8*, i32 } - %struct.move_s = type { i32, i32, i32, i32, i32, i32 } - %struct.move_x = type { i32, i32, i32, i32 } - %struct.node_t = type { i8, i8, i8, i8, i32, i32, %struct.node_t**, %struct.node_t*, %struct.move_s } - %struct.see_data = type { i32, i32 } -@rook_o.2925 = internal global [4 x i32] [ i32 12, i32 -12, i32 1, i32 -1 ] ; <[4 x i32]*> [#uses=0] -@bishop_o.2926 = internal global [4 x i32] [ i32 11, i32 -11, i32 13, i32 -13 ] ; <[4 x i32]*> [#uses=0] -@knight_o.2927 = internal global [8 x i32] [ i32 10, i32 -10, i32 14, i32 -14, i32 23, i32 -23, i32 25, i32 -25 ] ; <[8 x i32]*> [#uses=0] -@board = internal global [144 x i32] zeroinitializer ; <[144 x i32]*> [#uses=0] -@holding = internal global [2 x [16 x i32]] zeroinitializer ; <[2 x [16 x i32]]*> [#uses=0] -@hold_hash = internal global i32 0 ; <i32*> [#uses=0] -@white_hand_eval = internal global i32 0 ; <i32*> [#uses=0] -@black_hand_eval = internal global i32 0 ; <i32*> [#uses=0] -@num_holding = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=0] -@zobrist = internal global [14 x [144 x i32]] zeroinitializer ; <[14 x [144 x i32]]*> [#uses=0] -@Variant = internal global i32 0 ; <i32*> [#uses=7] -@userealholdings.b = internal global i1 false ; <i1*> [#uses=1] -@realholdings = internal global [255 x i8] zeroinitializer ; <[255 x i8]*> [#uses=0] -@comp_color = internal global i32 0 ; <i32*> [#uses=0] -@C.97.3177 = internal global [13 x i32] [ i32 0, i32 2, i32 1, i32 4, i32 3, i32 0, i32 0, i32 8, i32 7, i32 10, i32 9, i32 12, i32 11 ] ; <[13 x i32]*> [#uses=0] -@str = internal global [30 x i8] c"%s:%u: failed assertion `%s'\0A\00" ; <[30 x i8]*> [#uses=0] -@str.upgrd.1 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/crazy.c\00" ; <[81 x i8]*> [#uses=0] -@str.upgrd.2 = internal global [32 x i8] c"piece > frame && piece < npiece\00" ; <[32 x i8]*> [#uses=0] -@C.101.3190 = internal global [13 x i32] [ i32 0, i32 2, i32 1, i32 2, i32 1, i32 0, i32 0, i32 2, i32 1, i32 2, i32 1, i32 2, i32 1 ] ; <[13 x i32]*> [#uses=0] -@hand_value = internal global [13 x i32] [ i32 0, i32 100, i32 -100, i32 210, i32 -210, i32 0, i32 0, i32 250, i32 -250, i32 450, i32 -450, i32 230, i32 -230 ] ; <[13 x i32]*> [#uses=0] -@material = internal global [14 x i32] zeroinitializer ; <[14 x i32]*> [#uses=0] -@Material = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.3 = internal global [23 x i8] c"holding[who][what] > 0\00" ; <[23 x i8]*> [#uses=0] -@str.upgrd.4 = internal global [24 x i8] c"holding[who][what] < 20\00" ; <[24 x i8]*> [#uses=0] -@fifty = internal global i32 0 ; <i32*> [#uses=0] -@move_number = internal global i32 0 ; <i32*> [#uses=1] -@ply = internal global i32 0 ; <i32*> [#uses=2] -@hash_history = internal global [600 x i32] zeroinitializer ; <[600 x i32]*> [#uses=1] -@hash = internal global i32 0 ; <i32*> [#uses=1] -@ECacheSize.b = internal global i1 false ; <i1*> [#uses=1] -@ECache = internal global %struct.ECacheType* null ; <%struct.ECacheType**> [#uses=1] -@ECacheProbes = internal global i32 0 ; <i32*> [#uses=1] -@ECacheHits = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.5 = internal global [34 x i8] c"Out of memory allocating ECache.\0A\00" ; <[34 x i8]*> [#uses=0] -@rankoffsets.2930 = internal global [8 x i32] [ i32 110, i32 98, i32 86, i32 74, i32 62, i32 50, i32 38, i32 26 ] ; <[8 x i32]*> [#uses=0] -@white_castled = internal global i32 0 ; <i32*> [#uses=0] -@black_castled = internal global i32 0 ; <i32*> [#uses=0] -@book_ply = internal global i32 0 ; <i32*> [#uses=0] -@bking_loc = internal global i32 0 ; <i32*> [#uses=1] -@wking_loc = internal global i32 0 ; <i32*> [#uses=1] -@white_to_move = internal global i32 0 ; <i32*> [#uses=3] -@moved = internal global [144 x i32] zeroinitializer ; <[144 x i32]*> [#uses=0] -@ep_square = internal global i32 0 ; <i32*> [#uses=0] -@_DefaultRuneLocale = external global %struct._RuneLocale ; <%struct._RuneLocale*> [#uses=0] -@str.upgrd.6 = internal global [3 x i8] c"bm\00" ; <[3 x i8]*> [#uses=0] -@str1 = internal global [3 x i8] c"am\00" ; <[3 x i8]*> [#uses=0] -@str1.upgrd.7 = internal global [34 x i8] c"No best-move or avoid-move found!\00" ; <[34 x i8]*> [#uses=0] -@str.upgrd.8 = internal global [25 x i8] c"\0AName of EPD testsuite: \00" ; <[25 x i8]*> [#uses=0] -@__sF = external global [0 x %struct.FILE] ; <[0 x %struct.FILE]*> [#uses=0] -@str.upgrd.9 = internal global [21 x i8] c"\0ATime per move (s): \00" ; <[21 x i8]*> [#uses=0] -@str.upgrd.10 = internal global [2 x i8] c"\0A\00" ; <[2 x i8]*> [#uses=0] -@str2 = internal global [2 x i8] c"r\00" ; <[2 x i8]*> [#uses=0] -@root_to_move = internal global i32 0 ; <i32*> [#uses=1] -@forcedwin.b = internal global i1 false ; <i1*> [#uses=2] -@fixed_time = internal global i32 0 ; <i32*> [#uses=1] -@nodes = internal global i32 0 ; <i32*> [#uses=1] -@qnodes = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.11 = internal global [29 x i8] c"\0ANodes: %i (%0.2f%% qnodes)\0A\00" ; <[29 x i8]*> [#uses=0] -@str.upgrd.12 = internal global [54 x i8] c"ECacheProbes : %u ECacheHits : %u HitRate : %f%%\0A\00" ; <[54 x i8]*> [#uses=0] -@TTStores = internal global i32 0 ; <i32*> [#uses=1] -@TTProbes = internal global i32 0 ; <i32*> [#uses=1] -@TTHits = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.13 = internal global [60 x i8] c"TTStores : %u TTProbes : %u TTHits : %u HitRate : %f%%\0A\00" ; <[60 x i8]*> [#uses=0] -@NTries = internal global i32 0 ; <i32*> [#uses=1] -@NCuts = internal global i32 0 ; <i32*> [#uses=1] -@TExt = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.14 = internal global [51 x i8] c"NTries : %u NCuts : %u CutRate : %f%% TExt: %u\0A\00" ; <[51 x i8]*> [#uses=0] -@ext_check = internal global i32 0 ; <i32*> [#uses=1] -@razor_drop = internal global i32 0 ; <i32*> [#uses=1] -@razor_material = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.15 = internal global [61 x i8] c"Check extensions: %u Razor drops : %u Razor Material : %u\0A\00" ; <[61 x i8]*> [#uses=0] -@FHF = internal global i32 0 ; <i32*> [#uses=1] -@FH = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.16 = internal global [22 x i8] c"Move ordering : %f%%\0A\00" ; <[22 x i8]*> [#uses=0] -@maxposdiff = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.17 = internal global [47 x i8] c"Material score: %d Eval : %d MaxPosDiff: %d\0A\00" ; <[47 x i8]*> [#uses=0] -@str.upgrd.18 = internal global [17 x i8] c"Solution found.\0A\00" ; <[17 x i8]*> [#uses=0] -@str3 = internal global [21 x i8] c"Solution not found.\0A\00" ; <[21 x i8]*> [#uses=0] -@str.upgrd.19 = internal global [15 x i8] c"Solved: %d/%d\0A\00" ; <[15 x i8]*> [#uses=0] -@str.upgrd.20 = internal global [9 x i8] c"EPD: %s\0A\00" ; <[9 x i8]*> [#uses=0] -@str4 = internal global [21 x i8] c"Searching to %d ply\0A\00" ; <[21 x i8]*> [#uses=0] -@maxdepth = internal global i32 0 ; <i32*> [#uses=0] -@std_material = internal global [14 x i32] [ i32 0, i32 100, i32 -100, i32 310, i32 -310, i32 4000, i32 -4000, i32 500, i32 -500, i32 900, i32 -900, i32 325, i32 -325, i32 0 ] ; <[14 x i32]*> [#uses=0] -@zh_material = internal global [14 x i32] [ i32 0, i32 100, i32 -100, i32 210, i32 -210, i32 4000, i32 -4000, i32 250, i32 -250, i32 450, i32 -450, i32 230, i32 -230, i32 0 ] ; <[14 x i32]*> [#uses=0] -@suicide_material = internal global [14 x i32] [ i32 0, i32 15, i32 -15, i32 150, i32 -150, i32 500, i32 -500, i32 150, i32 -150, i32 50, i32 -50, i32 0, i32 0, i32 0 ] ; <[14 x i32]*> [#uses=0] -@losers_material = internal global [14 x i32] [ i32 0, i32 80, i32 -80, i32 320, i32 -320, i32 1000, i32 -1000, i32 350, i32 -350, i32 400, i32 -400, i32 270, i32 -270, i32 0 ] ; <[14 x i32]*> [#uses=0] -@Xfile = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@Xrank = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 0, i32 0, i32 0, i32 0, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 0, i32 0, i32 0, i32 0, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 0, i32 0, i32 0, i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@Xdiagl = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 0, i32 0, i32 0, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 0, i32 0, i32 0, i32 0, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 0, i32 0, i32 0, i32 0, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 0, i32 0, i32 0, i32 0, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 0, i32 0, i32 0, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@Xdiagr = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 0, i32 0, i32 0, i32 0, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 0, i32 0, i32 0, i32 0, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 0, i32 0, i32 0, i32 0, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 0, i32 0, i32 0, i32 0, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 0, i32 0, i32 0, i32 0, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@sqcolor = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@pcsqbishop = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 10, i32 5, i32 10, i32 10, i32 5, i32 10, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 5, i32 6, i32 15, i32 15, i32 6, i32 5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 3, i32 15, i32 10, i32 10, i32 15, i32 3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 3, i32 15, i32 10, i32 10, i32 15, i32 3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 5, i32 6, i32 15, i32 15, i32 6, i32 5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 10, i32 5, i32 10, i32 10, i32 5, i32 10, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_knight = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 25, i32 25, i32 25, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 35, i32 35, i32 35, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 10, i32 25, i32 20, i32 25, i32 25, i32 10, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 20, i32 20, i32 20, i32 20, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -35, i32 -10, i32 -10, i32 -10, i32 -10, i32 -35, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_knight = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -35, i32 -10, i32 -10, i32 -10, i32 -10, i32 -35, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 20, i32 20, i32 20, i32 20, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 10, i32 25, i32 20, i32 25, i32 25, i32 10, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 35, i32 35, i32 35, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 25, i32 25, i32 25, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 25, i32 35, i32 5, i32 5, i32 50, i32 45, i32 30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 7, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 14, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 20, i32 20, i32 10, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 12, i32 18, i32 18, i32 27, i32 27, i32 18, i32 18, i32 18, i32 0, i32 0, i32 0, i32 0, i32 25, i32 30, i32 30, i32 35, i32 35, i32 35, i32 30, i32 25, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 30, i32 30, i32 30, i32 35, i32 35, i32 35, i32 30, i32 25, i32 0, i32 0, i32 0, i32 0, i32 12, i32 18, i32 18, i32 27, i32 27, i32 18, i32 18, i32 18, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 20, i32 20, i32 10, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 14, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 7, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 25, i32 35, i32 5, i32 5, i32 50, i32 45, i32 30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -100, i32 7, i32 4, i32 0, i32 10, i32 4, i32 7, i32 -100, i32 0, i32 0, i32 0, i32 0, i32 -250, i32 -200, i32 -150, i32 -100, i32 -100, i32 -150, i32 -200, i32 -250, i32 0, i32 0, i32 0, i32 0, i32 -350, i32 -300, i32 -300, i32 -250, i32 -250, i32 -300, i32 -300, i32 -350, i32 0, i32 0, i32 0, i32 0, i32 -400, i32 -400, i32 -400, i32 -350, i32 -350, i32 -400, i32 -400, i32 -400, i32 0, i32 0, i32 0, i32 0, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 0, i32 0, i32 0, i32 0, i32 -400, i32 -400, i32 -400, i32 -350, i32 -350, i32 -400, i32 -400, i32 -400, i32 0, i32 0, i32 0, i32 0, i32 -350, i32 -300, i32 -300, i32 -250, i32 -250, i32 -300, i32 -300, i32 -350, i32 0, i32 0, i32 0, i32 0, i32 -250, i32 -200, i32 -150, i32 -100, i32 -100, i32 -150, i32 -200, i32 -250, i32 0, i32 0, i32 0, i32 0, i32 -100, i32 7, i32 4, i32 0, i32 10, i32 4, i32 7, i32 -100, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_queen = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 5, i32 5, i32 10, i32 10, i32 5, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 0, i32 0, i32 0, i32 0, i32 -60, i32 -40, i32 -40, i32 -60, i32 -60, i32 -40, i32 -40, i32 -60, i32 0, i32 0, i32 0, i32 0, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_queen = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 0, i32 0, i32 0, i32 0, i32 -60, i32 -40, i32 -40, i32 -60, i32 -60, i32 -40, i32 -40, i32 -60, i32 0, i32 0, i32 0, i32 0, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 5, i32 5, i32 10, i32 10, i32 5, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_rook = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 25, i32 25, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -30, i32 -30, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_rook = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -30, i32 -30, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 25, i32 25, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@upscale = internal global [64 x i32] [ i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117 ] ; <[64 x i32]*> [#uses=0] -@pre_p_tropism = internal global [9 x i32] [ i32 9999, i32 40, i32 20, i32 10, i32 3, i32 1, i32 1, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@pre_r_tropism = internal global [9 x i32] [ i32 9999, i32 50, i32 40, i32 15, i32 5, i32 1, i32 1, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@pre_n_tropism = internal global [9 x i32] [ i32 9999, i32 50, i32 70, i32 35, i32 10, i32 2, i32 1, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@pre_q_tropism = internal global [9 x i32] [ i32 9999, i32 100, i32 60, i32 20, i32 5, i32 2, i32 0, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@pre_b_tropism = internal global [9 x i32] [ i32 9999, i32 50, i32 25, i32 15, i32 5, i32 2, i32 2, i32 2, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@rookdistance = internal global [144 x [144 x i32]] zeroinitializer ; <[144 x [144 x i32]]*> [#uses=0] -@distance = internal global [144 x [144 x i32]] zeroinitializer ; <[144 x [144 x i32]]*> [#uses=0] -@p_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@b_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@n_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@r_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@q_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@cfg_devscale.b = internal global i1 false ; <i1*> [#uses=0] -@pieces = internal global [62 x i32] zeroinitializer ; <[62 x i32]*> [#uses=0] -@piece_count = internal global i32 0 ; <i32*> [#uses=1] -@cfg_smarteval.b = internal global i1 false ; <i1*> [#uses=0] -@lcentral = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 30, i32 30, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 30, i32 30, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@str3.upgrd.21 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/leval.c\00" ; <[81 x i8]*> [#uses=0] -@str5 = internal global [21 x i8] c"(i > 0) && (i < 145)\00" ; <[21 x i8]*> [#uses=0] -@kingcap.b = internal global i1 false ; <i1*> [#uses=0] -@numb_moves = internal global i32 0 ; <i32*> [#uses=2] -@genfor = internal global %struct.move_s* null ; <%struct.move_s**> [#uses=0] -@captures = internal global i32 0 ; <i32*> [#uses=1] -@fcaptures.b = internal global i1 false ; <i1*> [#uses=0] -@gfrom = internal global i32 0 ; <i32*> [#uses=0] -@Giveaway.b = internal global i1 false ; <i1*> [#uses=0] -@path_x = internal global [300 x %struct.move_x] zeroinitializer ; <[300 x %struct.move_x]*> [#uses=0] -@str7 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/moves.c\00" ; <[81 x i8]*> [#uses=0] -@str8 = internal global [15 x i8] c"find_slot < 63\00" ; <[15 x i8]*> [#uses=0] -@is_promoted = internal global [62 x i32] zeroinitializer ; <[62 x i32]*> [#uses=0] -@squares = internal global [144 x i32] zeroinitializer ; <[144 x i32]*> [#uses=0] -@str.upgrd.22 = internal global [38 x i8] c"promoted > frame && promoted < npiece\00" ; <[38 x i8]*> [#uses=0] -@str1.upgrd.23 = internal global [38 x i8] c"promoted < npiece && promoted > frame\00" ; <[38 x i8]*> [#uses=0] -@evalRoutines = internal global [7 x i32 (i32, i32)*] [ i32 (i32, i32)* @ErrorIt, i32 (i32, i32)* @Pawn, i32 (i32, i32)* @Knight, i32 (i32, i32)* @King, i32 (i32, i32)* @Rook, i32 (i32, i32)* @Queen, i32 (i32, i32)* @Bishop ] ; <[7 x i32 (i32, i32)*]*> [#uses=0] -@sbishop = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 8, i32 5, i32 5, i32 5, i32 5, i32 8, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 3, i32 3, i32 5, i32 5, i32 3, i32 3, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 2, i32 5, i32 4, i32 4, i32 5, i32 2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 2, i32 5, i32 4, i32 4, i32 5, i32 2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 3, i32 3, i32 5, i32 5, i32 3, i32 3, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 8, i32 5, i32 5, i32 5, i32 5, i32 8, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@sknight = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 5, i32 5, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 10, i32 10, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 10, i32 10, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 5, i32 5, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@swhite_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 10, i32 10, i32 3, i32 2, i32 1, i32 0, i32 0, i32 0, i32 0, i32 2, i32 4, i32 6, i32 12, i32 12, i32 6, i32 4, i32 2, i32 0, i32 0, i32 0, i32 0, i32 3, i32 6, i32 9, i32 14, i32 14, i32 9, i32 6, i32 3, i32 0, i32 0, i32 0, i32 0, i32 10, i32 12, i32 14, i32 16, i32 16, i32 14, i32 12, i32 10, i32 0, i32 0, i32 0, i32 0, i32 20, i32 22, i32 24, i32 26, i32 26, i32 24, i32 22, i32 20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@sblack_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 20, i32 22, i32 24, i32 26, i32 26, i32 24, i32 22, i32 20, i32 0, i32 0, i32 0, i32 0, i32 10, i32 12, i32 14, i32 16, i32 16, i32 14, i32 12, i32 10, i32 0, i32 0, i32 0, i32 0, i32 3, i32 6, i32 9, i32 14, i32 14, i32 9, i32 6, i32 3, i32 0, i32 0, i32 0, i32 0, i32 2, i32 4, i32 6, i32 12, i32 12, i32 6, i32 4, i32 2, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 10, i32 10, i32 3, i32 2, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@swhite_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 14, i32 0, i32 0, i32 0, i32 9, i32 14, i32 2, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 -5, i32 -6, i32 -6, i32 -6, i32 -6, i32 -5, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -8, i32 -8, i32 -8, i32 -8, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -8, i32 -8, i32 -13, i32 -13, i32 -13, i32 -13, i32 -8, i32 -8, i32 0, i32 0, i32 0, i32 0, i32 -13, i32 -13, i32 -21, i32 -21, i32 -21, i32 -21, i32 -13, i32 -13, i32 0, i32 0, i32 0, i32 0, i32 -21, i32 -21, i32 -34, i32 -34, i32 -34, i32 -34, i32 -21, i32 -21, i32 0, i32 0, i32 0, i32 0, i32 -34, i32 -34, i32 -55, i32 -55, i32 -55, i32 -55, i32 -34, i32 -34, i32 0, i32 0, i32 0, i32 0, i32 -55, i32 -55, i32 -89, i32 -89, i32 -89, i32 -89, i32 -55, i32 -55, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@sblack_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -55, i32 -55, i32 -89, i32 -89, i32 -89, i32 -89, i32 -55, i32 -55, i32 0, i32 0, i32 0, i32 0, i32 -34, i32 -34, i32 -55, i32 -55, i32 -55, i32 -55, i32 -34, i32 -34, i32 0, i32 0, i32 0, i32 0, i32 -21, i32 -21, i32 -34, i32 -34, i32 -34, i32 -34, i32 -21, i32 -21, i32 0, i32 0, i32 0, i32 0, i32 -13, i32 -13, i32 -21, i32 -21, i32 -21, i32 -21, i32 -13, i32 -13, i32 0, i32 0, i32 0, i32 0, i32 -8, i32 -8, i32 -13, i32 -13, i32 -13, i32 -13, i32 -8, i32 -8, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -8, i32 -8, i32 -8, i32 -8, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 -5, i32 -6, i32 -6, i32 -6, i32 -6, i32 -5, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 2, i32 14, i32 0, i32 0, i32 0, i32 9, i32 14, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@send_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -3, i32 -1, i32 0, i32 0, i32 -1, i32 -3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 -1, i32 10, i32 25, i32 25, i32 25, i32 25, i32 10, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 25, i32 50, i32 50, i32 25, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 25, i32 50, i32 50, i32 25, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -1, i32 10, i32 25, i32 25, i32 25, i32 25, i32 10, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -3, i32 -1, i32 0, i32 0, i32 -1, i32 -3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@srev_rank = internal global [9 x i32] [ i32 0, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1 ] ; <[9 x i32]*> [#uses=0] -@std_p_tropism = internal global [8 x i32] [ i32 9999, i32 15, i32 10, i32 7, i32 2, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0] -@std_own_p_tropism = internal global [8 x i32] [ i32 9999, i32 30, i32 10, i32 2, i32 0, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0] -@std_r_tropism = internal global [16 x i32] [ i32 9999, i32 0, i32 15, i32 5, i32 2, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[16 x i32]*> [#uses=0] -@std_n_tropism = internal global [8 x i32] [ i32 9999, i32 14, i32 9, i32 6, i32 1, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0] -@std_q_tropism = internal global [8 x i32] [ i32 9999, i32 200, i32 50, i32 15, i32 3, i32 2, i32 1, i32 0 ] ; <[8 x i32]*> [#uses=0] -@std_b_tropism = internal global [8 x i32] [ i32 9999, i32 12, i32 7, i32 5, i32 0, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0] -@phase = internal global i32 0 ; <i32*> [#uses=1] -@dir.3001 = internal global [4 x i32] [ i32 -13, i32 -11, i32 11, i32 13 ] ; <[4 x i32]*> [#uses=0] -@dir.3021 = internal global [4 x i32] [ i32 -1, i32 1, i32 12, i32 -12 ] ; <[4 x i32]*> [#uses=0] -@king_locs = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=0] -@square_d1.3081 = internal global [2 x i32] [ i32 29, i32 113 ] ; <[2 x i32]*> [#uses=0] -@wmat = internal global i32 0 ; <i32*> [#uses=0] -@bmat = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.24 = internal global [35 x i8] c"Illegal piece detected sq=%i c=%i\0A\00" ; <[35 x i8]*> [#uses=0] -@str10 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/neval.c\00" ; <[81 x i8]*> [#uses=0] -@std_hand_value = internal global [13 x i32] [ i32 0, i32 100, i32 -100, i32 210, i32 -210, i32 0, i32 0, i32 250, i32 -250, i32 450, i32 -450, i32 230, i32 -230 ] ; <[13 x i32]*> [#uses=0] -@xb_mode = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.25 = internal global [69 x i8] c"tellics ptell Hello! I am Sjeng and hope you enjoy playing with me.\0A\00" ; <[69 x i8]*> [#uses=0] -@str.upgrd.26 = internal global [76 x i8] c"tellics ptell For help on some commands that I understand, ptell me 'help'\0A\00" ; <[76 x i8]*> [#uses=0] -@str12 = internal global [3 x i8] c"%s\00" ; <[3 x i8]*> [#uses=0] -@my_partner = internal global [256 x i8] zeroinitializer ; <[256 x i8]*> [#uses=0] -@str13 = internal global [25 x i8] c"tellics set f5 bughouse\0A\00" ; <[25 x i8]*> [#uses=0] -@str.upgrd.27 = internal global [16 x i8] c"tellics unseek\0A\00" ; <[16 x i8]*> [#uses=0] -@str.upgrd.28 = internal global [20 x i8] c"tellics set f5 1=1\0A\00" ; <[20 x i8]*> [#uses=0] -@str.upgrd.29 = internal global [80 x i8] c"is...uh...what did you say?\0A\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" ; <[80 x i8]*> [#uses=0] -@str.upgrd.30 = internal global [5 x i8] c"help\00" ; <[5 x i8]*> [#uses=0] -@str.upgrd.31 = internal global [147 x i8] c"tellics ptell Commands that I understand are : sit, go, fast, slow, abort, flag, +/++/+++/-/--/---{p,n,b,r,q,d,h,trades}, x, dead, formula, help.\0A\00" ; <[147 x i8]*> [#uses=0] -@str.upgrd.32 = internal global [6 x i8] c"sorry\00" ; <[6 x i8]*> [#uses=0] -@str.upgrd.33 = internal global [59 x i8] c"tellics ptell Sorry, but I'm not playing a bughouse game.\0A\00" ; <[59 x i8]*> [#uses=0] -@str.upgrd.34 = internal global [4 x i8] c"sit\00" ; <[4 x i8]*> [#uses=0] -@str.upgrd.35 = internal global [56 x i8] c"tellics ptell Ok, I sit next move. Tell me when to go.\0A\00" ; <[56 x i8]*> [#uses=0] -@must_sit.b = internal global i1 false ; <i1*> [#uses=0] -@str114 = internal global [3 x i8] c"go\00" ; <[3 x i8]*> [#uses=0] -@str2.upgrd.36 = internal global [5 x i8] c"move\00" ; <[5 x i8]*> [#uses=0] -@str.upgrd.37 = internal global [31 x i8] c"tellics ptell Ok, I'm moving.\0A\00" ; <[31 x i8]*> [#uses=0] -@str3.upgrd.38 = internal global [5 x i8] c"fast\00" ; <[5 x i8]*> [#uses=0] -@str4.upgrd.39 = internal global [5 x i8] c"time\00" ; <[5 x i8]*> [#uses=0] -@str15 = internal global [35 x i8] c"tellics ptell Ok, I'm going FAST!\0A\00" ; <[35 x i8]*> [#uses=0] -@go_fast.b = internal global i1 false ; <i1*> [#uses=0] -@str5.upgrd.40 = internal global [5 x i8] c"slow\00" ; <[5 x i8]*> [#uses=0] -@str16 = internal global [36 x i8] c"tellics ptell Ok, moving normally.\0A\00" ; <[36 x i8]*> [#uses=0] -@str6 = internal global [6 x i8] c"abort\00" ; <[6 x i8]*> [#uses=0] -@str7.upgrd.41 = internal global [35 x i8] c"tellics ptell Requesting abort...\0A\00" ; <[35 x i8]*> [#uses=0] -@str17 = internal global [15 x i8] c"tellics abort\0A\00" ; <[15 x i8]*> [#uses=0] -@str8.upgrd.42 = internal global [5 x i8] c"flag\00" ; <[5 x i8]*> [#uses=0] -@str.upgrd.43 = internal global [27 x i8] c"tellics ptell Flagging...\0A\00" ; <[27 x i8]*> [#uses=0] -@str.upgrd.44 = internal global [14 x i8] c"tellics flag\0A\00" ; <[14 x i8]*> [#uses=0] -@str18 = internal global [2 x i8] c"+\00" ; <[2 x i8]*> [#uses=0] -@str9 = internal global [6 x i8] c"trade\00" ; <[6 x i8]*> [#uses=0] -@str10.upgrd.45 = internal global [35 x i8] c"tellics ptell Ok, trading is GOOD\0A\00" ; <[35 x i8]*> [#uses=0] -@str11 = internal global [4 x i8] c"+++\00" ; <[4 x i8]*> [#uses=0] -@str12.upgrd.46 = internal global [6 x i8] c"mates\00" ; <[6 x i8]*> [#uses=0] -@str13.upgrd.47 = internal global [3 x i8] c"++\00" ; <[3 x i8]*> [#uses=0] -@str.upgrd.48 = internal global [49 x i8] c"is VERY good (ptell me 'x' to play normal again)\00" ; <[49 x i8]*> [#uses=0] -@str.upgrd.49 = internal global [44 x i8] c"is good (ptell me 'x' to play normal again)\00" ; <[44 x i8]*> [#uses=0] -@str19 = internal global [29 x i8] c"tellics ptell Ok, Knight %s\0A\00" ; <[29 x i8]*> [#uses=0] -@str14 = internal global [29 x i8] c"tellics ptell Ok, Bishop %s\0A\00" ; <[29 x i8]*> [#uses=0] -@str15.upgrd.50 = internal global [27 x i8] c"tellics ptell Ok, Rook %s\0A\00" ; <[27 x i8]*> [#uses=0] -@str.upgrd.51 = internal global [28 x i8] c"tellics ptell Ok, Queen %s\0A\00" ; <[28 x i8]*> [#uses=0] -@str16.upgrd.52 = internal global [27 x i8] c"tellics ptell Ok, Pawn %s\0A\00" ; <[27 x i8]*> [#uses=0] -@str17.upgrd.53 = internal global [31 x i8] c"tellics ptell Ok, Diagonal %s\0A\00" ; <[31 x i8]*> [#uses=0] -@str18.upgrd.54 = internal global [28 x i8] c"tellics ptell Ok, Heavy %s\0A\00" ; <[28 x i8]*> [#uses=0] -@str20 = internal global [34 x i8] c"tellics ptell Ok, trading is BAD\0A\00" ; <[34 x i8]*> [#uses=0] -@str20.upgrd.55 = internal global [4 x i8] c"---\00" ; <[4 x i8]*> [#uses=0] -@str.upgrd.56 = internal global [53 x i8] c"mates you (ptell me 'x' when it no longer mates you)\00" ; <[53 x i8]*> [#uses=0] -@str21 = internal global [3 x i8] c"--\00" ; <[3 x i8]*> [#uses=0] -@str.upgrd.57 = internal global [52 x i8] c"is VERY bad (ptell me 'x' when it is no longer bad)\00" ; <[52 x i8]*> [#uses=0] -@str21.upgrd.58 = internal global [47 x i8] c"is bad (ptell me 'x' when it is no longer bad)\00" ; <[47 x i8]*> [#uses=0] -@str23 = internal global [16 x i8] c"mate me anymore\00" ; <[16 x i8]*> [#uses=0] -@str24 = internal global [6 x i8] c"never\00" ; <[6 x i8]*> [#uses=0] -@str25 = internal global [5 x i8] c"mind\00" ; <[5 x i8]*> [#uses=0] -@str22 = internal global [9 x i8] c"ptell me\00" ; <[9 x i8]*> [#uses=0] -@str.upgrd.59 = internal global [55 x i8] c"tellics ptell Ok, reverting to STANDARD piece values!\0A\00" ; <[55 x i8]*> [#uses=0] -@partnerdead.b = internal global i1 false ; <i1*> [#uses=0] -@piecedead.b = internal global i1 false ; <i1*> [#uses=0] -@str.upgrd.60 = internal global [26 x i8] c"i'll have to sit...(dead)\00" ; <[26 x i8]*> [#uses=0] -@str27 = internal global [5 x i8] c"dead\00" ; <[5 x i8]*> [#uses=0] -@str28 = internal global [27 x i8] c"i'll have to sit...(piece)\00" ; <[27 x i8]*> [#uses=0] -@str29 = internal global [3 x i8] c"ok\00" ; <[3 x i8]*> [#uses=0] -@str30 = internal global [3 x i8] c"hi\00" ; <[3 x i8]*> [#uses=0] -@str31 = internal global [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=0] -@str32 = internal global [26 x i8] c"tellics ptell Greetings.\0A\00" ; <[26 x i8]*> [#uses=0] -@str.upgrd.61 = internal global [8 x i8] c"formula\00" ; <[8 x i8]*> [#uses=0] -@str.upgrd.62 = internal global [87 x i8] c"tellics ptell Setting formula, if you are still interrupted, complain to my operator.\0A\00" ; <[87 x i8]*> [#uses=0] -@str33 = internal global [59 x i8] c"tellics ptell Sorry, but I don't understand that command.\0A\00" ; <[59 x i8]*> [#uses=0] -@pawnmated.3298 = internal global i32 0 ; <i32*> [#uses=0] -@knightmated.3299 = internal global i32 0 ; <i32*> [#uses=0] -@bishopmated.3300 = internal global i32 0 ; <i32*> [#uses=0] -@rookmated.3301 = internal global i32 0 ; <i32*> [#uses=0] -@queenmated.3302 = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.63 = internal global [41 x i8] c"tellics ptell p doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str34 = internal global [41 x i8] c"tellics ptell n doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str35 = internal global [41 x i8] c"tellics ptell b doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str36 = internal global [41 x i8] c"tellics ptell r doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str37 = internal global [41 x i8] c"tellics ptell q doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str38 = internal global [20 x i8] c"tellics ptell ---p\0A\00" ; <[20 x i8]*> [#uses=0] -@str39 = internal global [20 x i8] c"tellics ptell ---n\0A\00" ; <[20 x i8]*> [#uses=0] -@str40 = internal global [20 x i8] c"tellics ptell ---b\0A\00" ; <[20 x i8]*> [#uses=0] -@str41 = internal global [20 x i8] c"tellics ptell ---r\0A\00" ; <[20 x i8]*> [#uses=0] -@str42 = internal global [20 x i8] c"tellics ptell ---q\0A\00" ; <[20 x i8]*> [#uses=0] -@str23.upgrd.64 = internal global [17 x i8] c"tellics ptell x\0A\00" ; <[17 x i8]*> [#uses=0] -@str.upgrd.65 = internal global [18 x i8] c"tellics ptell go\0A\00" ; <[18 x i8]*> [#uses=0] -@bufftop = internal global i32 0 ; <i32*> [#uses=2] -@membuff = internal global i8* null ; <i8**> [#uses=3] -@maxply = internal global i32 0 ; <i32*> [#uses=1] -@forwards = internal global i32 0 ; <i32*> [#uses=1] -@nodecount = internal global i32 0 ; <i32*> [#uses=1] -@frees = internal global i32 0 ; <i32*> [#uses=0] -@PBSize.b = internal global i1 false ; <i1*> [#uses=1] -@alllosers.b = internal global i1 false ; <i1*> [#uses=1] -@rootlosers = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=1] -@pn_move = internal global %struct.move_s zeroinitializer ; <%struct.move_s*> [#uses=7] -@iters = internal global i32 0 ; <i32*> [#uses=1] -@kibitzed.b = internal global i1 false ; <i1*> [#uses=0] -@str24.upgrd.66 = internal global [28 x i8] c"tellics kibitz Forced win!\0A\00" ; <[28 x i8]*> [#uses=0] -@str25.upgrd.67 = internal global [34 x i8] c"tellics kibitz Forced win! (alt)\0A\00" ; <[34 x i8]*> [#uses=0] -@pn_time = internal global i32 0 ; <i32*> [#uses=1] -@post = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.68 = internal global [94 x i8] c"tellics whisper proof %d, disproof %d, %d losers, highest depth %d, primary %d, secondary %d\0A\00" ; <[94 x i8]*> [#uses=0] -@str26 = internal global [30 x i8] c"tellics whisper Forced reply\0A\00" ; <[30 x i8]*> [#uses=0] -@str27.upgrd.69 = internal global [60 x i8] c"P: %d D: %d N: %d S: %d Mem: %2.2fM Iters: %d MaxDepth: %d\0A\00" ; <[60 x i8]*> [#uses=0] -@str.upgrd.70 = internal global [90 x i8] c"tellics whisper proof %d, disproof %d, %d nodes, %d forwards, %d iters, highest depth %d\0A\00" ; <[90 x i8]*> [#uses=0] -@str.upgrd.71 = internal global [11 x i8] c"Time : %f\0A\00" ; <[11 x i8]*> [#uses=0] -@str28.upgrd.72 = internal global [23 x i8] c"This position is WON.\0A\00" ; <[23 x i8]*> [#uses=0] -@str29.upgrd.73 = internal global [5 x i8] c"PV: \00" ; <[5 x i8]*> [#uses=0] -@str30.upgrd.74 = internal global [4 x i8] c"%s \00" ; <[4 x i8]*> [#uses=0] -@str31.upgrd.75 = internal global [2 x i8] c" \00" ; <[2 x i8]*> [#uses=0] -@str32.upgrd.76 = internal global [41 x i8] c"\0Atellics kibitz Forced win in %d moves.\0A\00" ; <[41 x i8]*> [#uses=0] -@str33.upgrd.77 = internal global [20 x i8] c"\0A1-0 {White mates}\0A\00" ; <[20 x i8]*> [#uses=0] -@result = internal global i32 0 ; <i32*> [#uses=4] -@str1.upgrd.78 = internal global [20 x i8] c"\0A0-1 {Black mates}\0A\00" ; <[20 x i8]*> [#uses=0] -@str35.upgrd.79 = internal global [24 x i8] c"This position is LOST.\0A\00" ; <[24 x i8]*> [#uses=0] -@str36.upgrd.80 = internal global [27 x i8] c"This position is UNKNOWN.\0A\00" ; <[27 x i8]*> [#uses=0] -@str37.upgrd.81 = internal global [47 x i8] c"P: %d D: %d N: %d S: %d Mem: %2.2fM Iters: %d\0A\00" ; <[47 x i8]*> [#uses=0] -@s_threat.b = internal global i1 false ; <i1*> [#uses=0] -@TTSize.b = internal global i1 false ; <i1*> [#uses=3] -@cfg_razordrop.b = internal global i1 false ; <i1*> [#uses=0] -@cfg_futprune.b = internal global i1 false ; <i1*> [#uses=0] -@cfg_onerep.b = internal global i1 false ; <i1*> [#uses=0] -@setcode = internal global [30 x i8] zeroinitializer ; <[30 x i8]*> [#uses=0] -@str38.upgrd.82 = internal global [3 x i8] c"%u\00" ; <[3 x i8]*> [#uses=0] -@searching_pv.b = internal global i1 false ; <i1*> [#uses=0] -@pv = internal global [300 x [300 x %struct.move_s]] zeroinitializer ; <[300 x [300 x %struct.move_s]]*> [#uses=0] -@i_depth = internal global i32 0 ; <i32*> [#uses=0] -@history_h = internal global [144 x [144 x i32]] zeroinitializer ; <[144 x [144 x i32]]*> [#uses=0] -@killer1 = internal global [300 x %struct.move_s] zeroinitializer ; <[300 x %struct.move_s]*> [#uses=0] -@killer2 = internal global [300 x %struct.move_s] zeroinitializer ; <[300 x %struct.move_s]*> [#uses=0] -@killer3 = internal global [300 x %struct.move_s] zeroinitializer ; <[300 x %struct.move_s]*> [#uses=0] -@rootnodecount = internal global [512 x i32] zeroinitializer ; <[512 x i32]*> [#uses=0] -@raw_nodes = internal global i32 0 ; <i32*> [#uses=0] -@pv_length = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@time_exit.b = internal global i1 false ; <i1*> [#uses=0] -@time_for_move = internal global i32 0 ; <i32*> [#uses=3] -@failed = internal global i32 0 ; <i32*> [#uses=0] -@extendedtime.b = internal global i1 false ; <i1*> [#uses=1] -@time_left = internal global i32 0 ; <i32*> [#uses=0] -@str39.upgrd.83 = internal global [38 x i8] c"Extended from %d to %d, time left %d\0A\00" ; <[38 x i8]*> [#uses=0] -@checks = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@singular = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@recaps = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@ext_onerep = internal global i32 0 ; <i32*> [#uses=1] -@FULL = internal global i32 0 ; <i32*> [#uses=1] -@PVS = internal global i32 0 ; <i32*> [#uses=1] -@PVSF = internal global i32 0 ; <i32*> [#uses=1] -@killer_scores = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@killer_scores2 = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@killer_scores3 = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@time_failure.b = internal global i1 false ; <i1*> [#uses=0] -@cur_score = internal global i32 0 ; <i32*> [#uses=0] -@legals = internal global i32 0 ; <i32*> [#uses=3] -@movetotal = internal global i32 0 ; <i32*> [#uses=0] -@searching_move = internal global [20 x i8] zeroinitializer ; <[20 x i8]*> [#uses=0] -@is_pondering.b = internal global i1 false ; <i1*> [#uses=6] -@true_i_depth = internal global i8 0 ; <i8*> [#uses=1] -@is_analyzing.b = internal global i1 false ; <i1*> [#uses=0] -@inc = internal global i32 0 ; <i32*> [#uses=1] -@time_cushion = internal global i32 0 ; <i32*> [#uses=2] -@str40.upgrd.84 = internal global [16 x i8] c"Opening phase.\0A\00" ; <[16 x i8]*> [#uses=1] -@str.upgrd.85 = internal global [19 x i8] c"Middlegame phase.\0A\00" ; <[19 x i8]*> [#uses=1] -@str1.upgrd.86 = internal global [16 x i8] c"Endgame phase.\0A\00" ; <[16 x i8]*> [#uses=1] -@str43 = internal global [20 x i8] c"Time for move : %d\0A\00" ; <[20 x i8]*> [#uses=1] -@postpv = internal global [256 x i8] zeroinitializer ; <[256 x i8]*> [#uses=0] -@str44 = internal global [49 x i8] c"tellics whisper %d restart(s), ended up with %s\0A\00" ; <[49 x i8]*> [#uses=0] -@moves_to_tc = internal global i32 0 ; <i32*> [#uses=0] -@str45 = internal global [27 x i8] c"tellics kibitz Mate in %d\0A\00" ; <[27 x i8]*> [#uses=0] -@str46 = internal global [52 x i8] c"tellics ptell Mate in %d, give him no more pieces.\0A\00" ; <[52 x i8]*> [#uses=0] -@tradefreely.b = internal global i1 false ; <i1*> [#uses=0] -@str.upgrd.87 = internal global [37 x i8] c"tellics ptell You can trade freely.\0A\00" ; <[37 x i8]*> [#uses=0] -@str47 = internal global [25 x i8] c"tellics ptell ---trades\0A\00" ; <[25 x i8]*> [#uses=0] -@str2.upgrd.88 = internal global [49 x i8] c"tellics kibitz Both players dead...resigning...\0A\00" ; <[49 x i8]*> [#uses=0] -@str3.upgrd.89 = internal global [16 x i8] c"tellics resign\0A\00" ; <[16 x i8]*> [#uses=0] -@str48 = internal global [81 x i8] c"tellics ptell I am forcedly mated (dead). Tell me 'go' to start moving into it.\0A\00" ; <[81 x i8]*> [#uses=0] -@str.upgrd.90 = internal global [62 x i8] c"tellics ptell I'll have to sit...(lose piece that mates you)\0A\00" ; <[62 x i8]*> [#uses=0] -@see_num_attackers = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=0] -@see_attackers = internal global [2 x [16 x %struct.see_data]] zeroinitializer ; <[2 x [16 x %struct.see_data]]*> [#uses=0] -@scentral = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 2, i32 15, i32 15, i32 15, i32 15, i32 2, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 7, i32 15, i32 25, i32 25, i32 15, i32 7, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 7, i32 15, i32 25, i32 25, i32 15, i32 7, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 2, i32 15, i32 15, i32 15, i32 15, i32 2, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@str51 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/seval.c\00" ; <[81 x i8]*> [#uses=0] -@divider = internal global [50 x i8] c"-------------------------------------------------\00" ; <[50 x i8]*> [#uses=0] -@min_per_game = internal global i32 0 ; <i32*> [#uses=0] -@opp_rating = internal global i32 0 ; <i32*> [#uses=0] -@my_rating = internal global i32 0 ; <i32*> [#uses=0] -@str53 = internal global [15 x i8] c"SPEC Workload\0A\00" ; <[15 x i8]*> [#uses=0] -@opening_history = internal global [256 x i8] zeroinitializer ; <[256 x i8]*> [#uses=0] -@str60 = internal global [81 x i8] c"Material score: %d Eval : %d MaxPosDiff: %d White hand: %d Black hand : %d\0A\00" ; <[81 x i8]*> [#uses=0] -@str61 = internal global [26 x i8] c"Hash : %X HoldHash : %X\0A\00" ; <[26 x i8]*> [#uses=0] -@str62 = internal global [9 x i8] c"move %s\0A\00" ; <[9 x i8]*> [#uses=0] -@str63 = internal global [5 x i8] c"\0A%s\0A\00" ; <[5 x i8]*> [#uses=0] -@str64 = internal global [19 x i8] c"0-1 {Black Mates}\0A\00" ; <[19 x i8]*> [#uses=0] -@str1.upgrd.91 = internal global [19 x i8] c"1-0 {White Mates}\0A\00" ; <[19 x i8]*> [#uses=0] -@str65 = internal global [27 x i8] c"1/2-1/2 {Fifty move rule}\0A\00" ; <[27 x i8]*> [#uses=0] -@str2.upgrd.92 = internal global [29 x i8] c"1/2-1/2 {3 fold repetition}\0A\00" ; <[29 x i8]*> [#uses=0] -@str66 = internal global [16 x i8] c"1/2-1/2 {Draw}\0A\00" ; <[16 x i8]*> [#uses=0] -@str68 = internal global [8 x i8] c"Sjeng: \00" ; <[8 x i8]*> [#uses=0] -@str69 = internal global [18 x i8] c"Illegal move: %s\0A\00" ; <[18 x i8]*> [#uses=0] -@str3.upgrd.93 = internal global [9 x i8] c"setboard\00" ; <[9 x i8]*> [#uses=0] -@str470 = internal global [5 x i8] c"quit\00" ; <[5 x i8]*> [#uses=0] -@str571 = internal global [5 x i8] c"exit\00" ; <[5 x i8]*> [#uses=0] -@str6.upgrd.94 = internal global [8 x i8] c"diagram\00" ; <[8 x i8]*> [#uses=0] -@str7.upgrd.95 = internal global [2 x i8] c"d\00" ; <[2 x i8]*> [#uses=0] -@str72 = internal global [6 x i8] c"perft\00" ; <[6 x i8]*> [#uses=0] -@str73 = internal global [3 x i8] c"%d\00" ; <[3 x i8]*> [#uses=0] -@str74 = internal global [28 x i8] c"Raw nodes for depth %d: %i\0A\00" ; <[28 x i8]*> [#uses=0] -@str.upgrd.96 = internal global [13 x i8] c"Time : %.2f\0A\00" ; <[13 x i8]*> [#uses=0] -@str75 = internal global [4 x i8] c"new\00" ; <[4 x i8]*> [#uses=0] -@str.upgrd.97 = internal global [40 x i8] c"tellics set 1 Sjeng SPEC 1.0 (SPEC/%s)\0A\00" ; <[40 x i8]*> [#uses=0] -@str.upgrd.98 = internal global [7 x i8] c"xboard\00" ; <[7 x i8]*> [#uses=0] -@str8.upgrd.99 = internal global [6 x i8] c"nodes\00" ; <[6 x i8]*> [#uses=0] -@str77 = internal global [38 x i8] c"Number of nodes: %i (%0.2f%% qnodes)\0A\00" ; <[38 x i8]*> [#uses=0] -@str9.upgrd.100 = internal global [5 x i8] c"post\00" ; <[5 x i8]*> [#uses=0] -@str10.upgrd.101 = internal global [7 x i8] c"nopost\00" ; <[7 x i8]*> [#uses=0] -@str11.upgrd.102 = internal global [7 x i8] c"random\00" ; <[7 x i8]*> [#uses=0] -@str12.upgrd.103 = internal global [5 x i8] c"hard\00" ; <[5 x i8]*> [#uses=0] -@str13.upgrd.104 = internal global [5 x i8] c"easy\00" ; <[5 x i8]*> [#uses=0] -@str14.upgrd.105 = internal global [2 x i8] c"?\00" ; <[2 x i8]*> [#uses=0] -@str15.upgrd.106 = internal global [6 x i8] c"white\00" ; <[6 x i8]*> [#uses=0] -@str16.upgrd.107 = internal global [6 x i8] c"black\00" ; <[6 x i8]*> [#uses=0] -@str17.upgrd.108 = internal global [6 x i8] c"force\00" ; <[6 x i8]*> [#uses=0] -@str18.upgrd.109 = internal global [5 x i8] c"eval\00" ; <[5 x i8]*> [#uses=0] -@str.upgrd.110 = internal global [10 x i8] c"Eval: %d\0A\00" ; <[10 x i8]*> [#uses=0] -@str2178 = internal global [3 x i8] c"%i\00" ; <[3 x i8]*> [#uses=0] -@str22.upgrd.111 = internal global [5 x i8] c"otim\00" ; <[5 x i8]*> [#uses=0] -@opp_time = internal global i32 0 ; <i32*> [#uses=0] -@str23.upgrd.112 = internal global [6 x i8] c"level\00" ; <[6 x i8]*> [#uses=0] -@str.upgrd.113 = internal global [12 x i8] c"%i %i:%i %i\00" ; <[12 x i8]*> [#uses=0] -@sec_per_game = internal global i32 0 ; <i32*> [#uses=0] -@str24.upgrd.114 = internal global [9 x i8] c"%i %i %i\00" ; <[9 x i8]*> [#uses=0] -@str25.upgrd.115 = internal global [7 x i8] c"rating\00" ; <[7 x i8]*> [#uses=0] -@str26.upgrd.116 = internal global [6 x i8] c"%i %i\00" ; <[6 x i8]*> [#uses=0] -@str27.upgrd.117 = internal global [8 x i8] c"holding\00" ; <[8 x i8]*> [#uses=0] -@str28.upgrd.118 = internal global [8 x i8] c"variant\00" ; <[8 x i8]*> [#uses=0] -@str29.upgrd.119 = internal global [7 x i8] c"normal\00" ; <[7 x i8]*> [#uses=0] -@str79 = internal global [11 x i8] c"crazyhouse\00" ; <[11 x i8]*> [#uses=0] -@str30.upgrd.120 = internal global [9 x i8] c"bughouse\00" ; <[9 x i8]*> [#uses=0] -@str31.upgrd.121 = internal global [8 x i8] c"suicide\00" ; <[8 x i8]*> [#uses=0] -@str32.upgrd.122 = internal global [9 x i8] c"giveaway\00" ; <[9 x i8]*> [#uses=0] -@str33.upgrd.123 = internal global [7 x i8] c"losers\00" ; <[7 x i8]*> [#uses=0] -@str34.upgrd.124 = internal global [8 x i8] c"analyze\00" ; <[8 x i8]*> [#uses=0] -@str35.upgrd.125 = internal global [5 x i8] c"undo\00" ; <[5 x i8]*> [#uses=0] -@str36.upgrd.126 = internal global [18 x i8] c"Move number : %d\0A\00" ; <[18 x i8]*> [#uses=0] -@str37.upgrd.127 = internal global [7 x i8] c"remove\00" ; <[7 x i8]*> [#uses=0] -@str38.upgrd.128 = internal global [5 x i8] c"edit\00" ; <[5 x i8]*> [#uses=0] -@str41.upgrd.129 = internal global [2 x i8] c"#\00" ; <[2 x i8]*> [#uses=0] -@str42.upgrd.130 = internal global [8 x i8] c"partner\00" ; <[8 x i8]*> [#uses=0] -@str43.upgrd.131 = internal global [9 x i8] c"$partner\00" ; <[9 x i8]*> [#uses=0] -@str44.upgrd.132 = internal global [6 x i8] c"ptell\00" ; <[6 x i8]*> [#uses=0] -@str45.upgrd.133 = internal global [5 x i8] c"test\00" ; <[5 x i8]*> [#uses=0] -@str46.upgrd.134 = internal global [3 x i8] c"st\00" ; <[3 x i8]*> [#uses=0] -@str47.upgrd.135 = internal global [7 x i8] c"result\00" ; <[7 x i8]*> [#uses=0] -@str48.upgrd.136 = internal global [6 x i8] c"prove\00" ; <[6 x i8]*> [#uses=0] -@str49 = internal global [26 x i8] c"\0AMax time to search (s): \00" ; <[26 x i8]*> [#uses=0] -@str50 = internal global [5 x i8] c"ping\00" ; <[5 x i8]*> [#uses=0] -@str51.upgrd.137 = internal global [9 x i8] c"pong %d\0A\00" ; <[9 x i8]*> [#uses=0] -@str52 = internal global [6 x i8] c"fritz\00" ; <[6 x i8]*> [#uses=0] -@str53.upgrd.138 = internal global [6 x i8] c"reset\00" ; <[6 x i8]*> [#uses=0] -@str54 = internal global [3 x i8] c"sd\00" ; <[3 x i8]*> [#uses=0] -@str55 = internal global [26 x i8] c"New max depth set to: %d\0A\00" ; <[26 x i8]*> [#uses=0] -@str56 = internal global [5 x i8] c"auto\00" ; <[5 x i8]*> [#uses=0] -@str57 = internal global [9 x i8] c"protover\00" ; <[9 x i8]*> [#uses=0] -@str.upgrd.139 = internal global [63 x i8] c"feature ping=0 setboard=1 playother=0 san=0 usermove=0 time=1\0A\00" ; <[63 x i8]*> [#uses=0] -@str80 = internal global [53 x i8] c"feature draw=0 sigint=0 sigterm=0 reuse=1 analyze=0\0A\00" ; <[53 x i8]*> [#uses=0] -@str.upgrd.140 = internal global [33 x i8] c"feature myname=\22Sjeng SPEC 1.0\22\0A\00" ; <[33 x i8]*> [#uses=0] -@str.upgrd.141 = internal global [71 x i8] c"feature variants=\22normal,bughouse,crazyhouse,suicide,giveaway,losers\22\0A\00" ; <[71 x i8]*> [#uses=0] -@str.upgrd.142 = internal global [46 x i8] c"feature colors=1 ics=0 name=0 pause=0 done=1\0A\00" ; <[46 x i8]*> [#uses=0] -@str58 = internal global [9 x i8] c"accepted\00" ; <[9 x i8]*> [#uses=0] -@str59 = internal global [9 x i8] c"rejected\00" ; <[9 x i8]*> [#uses=0] -@str.upgrd.143 = internal global [65 x i8] c"Interface does not support a required feature...expect trouble.\0A\00" ; <[65 x i8]*> [#uses=0] -@str61.upgrd.144 = internal global [6 x i8] c"\0A%s\0A\0A\00" ; <[6 x i8]*> [#uses=0] -@str81 = internal global [41 x i8] c"diagram/d: toggle diagram display\0A\00" ; <[41 x i8]*> [#uses=0] -@str82 = internal global [34 x i8] c"exit/quit: terminate Sjeng\0A\00" ; <[34 x i8]*> [#uses=0] -@str62.upgrd.145 = internal global [51 x i8] c"go: make Sjeng play the side to move\0A\00" ; <[51 x i8]*> [#uses=0] -@str83 = internal global [35 x i8] c"new: start a new game\0A\00" ; <[35 x i8]*> [#uses=0] -@str84 = internal global [55 x i8] c"level <x>: the xboard style command to set time\0A\00" ; <[55 x i8]*> [#uses=0] -@str85 = internal global [49 x i8] c" <x> should be in the form: <a> <b> <c> where:\0A\00" ; <[49 x i8]*> [#uses=0] -@str63.upgrd.146 = internal global [49 x i8] c" a -> moves to TC (0 if using an ICS style TC)\0A\00" ; <[49 x i8]*> [#uses=0] -@str86 = internal global [25 x i8] c" b -> minutes per game\0A\00" ; <[25 x i8]*> [#uses=0] -@str64.upgrd.147 = internal global [29 x i8] c" c -> increment in seconds\0A\00" ; <[29 x i8]*> [#uses=0] -@str65.upgrd.148 = internal global [55 x i8] c"nodes: outputs the number of nodes searched\0A\00" ; <[55 x i8]*> [#uses=0] -@str87 = internal global [47 x i8] c"perft <x>: compute raw nodes to depth x\0A\00" ; <[47 x i8]*> [#uses=0] -@str.upgrd.149 = internal global [42 x i8] c"post: toggles thinking output\0A\00" ; <[42 x i8]*> [#uses=0] -@str.upgrd.150 = internal global [45 x i8] c"xboard: put Sjeng into xboard mode\0A\00" ; <[45 x i8]*> [#uses=0] -@str.upgrd.151 = internal global [39 x i8] c"test: run an EPD testsuite\0A\00" ; <[39 x i8]*> [#uses=0] -@str88 = internal global [52 x i8] c"speed: test movegen and evaluation speed\0A\00" ; <[52 x i8]*> [#uses=0] -@str89 = internal global [59 x i8] c"proof: try to prove or disprove the current pos\0A\00" ; <[59 x i8]*> [#uses=0] -@str90 = internal global [44 x i8] c"sd <x>: limit thinking to depth x\0A\00" ; <[44 x i8]*> [#uses=0] -@str66.upgrd.152 = internal global [51 x i8] c"st <x>: limit thinking to x centiseconds\0A\00" ; <[51 x i8]*> [#uses=0] -@str67 = internal global [54 x i8] c"setboard <FEN>: set board to a specified FEN string\0A\00" ; <[54 x i8]*> [#uses=0] -@str68.upgrd.153 = internal global [38 x i8] c"undo: back up a half move\0A\00" ; <[38 x i8]*> [#uses=0] -@str69.upgrd.154 = internal global [38 x i8] c"remove: back up a full move\0A\00" ; <[38 x i8]*> [#uses=0] -@str70 = internal global [42 x i8] c"force: disable computer moving\0A\00" ; <[42 x i8]*> [#uses=0] -@str71 = internal global [44 x i8] c"auto: computer plays both sides\0A\00" ; <[44 x i8]*> [#uses=0] -@DP_TTable = internal global %struct.TType* null ; <%struct.TType**> [#uses=1] -@AS_TTable = internal global %struct.TType* null ; <%struct.TType**> [#uses=1] -@QS_TTable = internal global %struct.QTType* null ; <%struct.QTType**> [#uses=1] -@str93 = internal global [38 x i8] c"Out of memory allocating hashtables.\0A\00" ; <[38 x i8]*> [#uses=0] -@type_to_char.3058 = internal global [14 x i32] [ i32 70, i32 80, i32 80, i32 78, i32 78, i32 75, i32 75, i32 82, i32 82, i32 81, i32 81, i32 66, i32 66, i32 69 ] ; <[14 x i32]*> [#uses=0] -@str94 = internal global [8 x i8] c"%c@%c%d\00" ; <[8 x i8]*> [#uses=0] -@str95 = internal global [5 x i8] c"%c%d\00" ; <[5 x i8]*> [#uses=0] -@str1.upgrd.155 = internal global [8 x i8] c"%c%d=%c\00" ; <[8 x i8]*> [#uses=0] -@str2.upgrd.156 = internal global [8 x i8] c"%cx%c%d\00" ; <[8 x i8]*> [#uses=0] -@str96 = internal global [11 x i8] c"%cx%c%d=%c\00" ; <[11 x i8]*> [#uses=0] -@str97 = internal global [4 x i8] c"O-O\00" ; <[4 x i8]*> [#uses=0] -@str98 = internal global [6 x i8] c"O-O-O\00" ; <[6 x i8]*> [#uses=0] -@str99 = internal global [9 x i8] c"%c%c%c%d\00" ; <[9 x i8]*> [#uses=0] -@str3100 = internal global [9 x i8] c"%c%d%c%d\00" ; <[9 x i8]*> [#uses=0] -@str101 = internal global [10 x i8] c"%c%cx%c%d\00" ; <[10 x i8]*> [#uses=0] -@str4.upgrd.157 = internal global [10 x i8] c"%c%dx%c%d\00" ; <[10 x i8]*> [#uses=0] -@str102 = internal global [7 x i8] c"%c%c%d\00" ; <[7 x i8]*> [#uses=0] -@str5103 = internal global [5 x i8] c"illg\00" ; <[5 x i8]*> [#uses=0] -@type_to_char.3190 = internal global [14 x i32] [ i32 70, i32 80, i32 112, i32 78, i32 110, i32 75, i32 107, i32 82, i32 114, i32 81, i32 113, i32 66, i32 98, i32 69 ] ; <[14 x i32]*> [#uses=0] -@str7.upgrd.158 = internal global [10 x i8] c"%c%d%c%dn\00" ; <[10 x i8]*> [#uses=0] -@str8.upgrd.159 = internal global [10 x i8] c"%c%d%c%dr\00" ; <[10 x i8]*> [#uses=0] -@str9.upgrd.160 = internal global [10 x i8] c"%c%d%c%db\00" ; <[10 x i8]*> [#uses=0] -@str10.upgrd.161 = internal global [10 x i8] c"%c%d%c%dk\00" ; <[10 x i8]*> [#uses=0] -@str11.upgrd.162 = internal global [10 x i8] c"%c%d%c%dq\00" ; <[10 x i8]*> [#uses=0] -@C.88.3251 = internal global [14 x i8*] [ i8* getelementptr ([3 x i8]* @str105, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str12106, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str13107, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str141, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str152, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str163, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str174, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str185, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str19108, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str206, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str21109, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str227, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str238, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str249, i32 0, i32 0) ] ; <[14 x i8*]*> [#uses=0] -@str105 = internal global [3 x i8] c"!!\00" ; <[3 x i8]*> [#uses=1] -@str12106 = internal global [3 x i8] c" P\00" ; <[3 x i8]*> [#uses=1] -@str13107 = internal global [3 x i8] c"*P\00" ; <[3 x i8]*> [#uses=1] -@str141 = internal global [3 x i8] c" N\00" ; <[3 x i8]*> [#uses=1] -@str152 = internal global [3 x i8] c"*N\00" ; <[3 x i8]*> [#uses=1] -@str163 = internal global [3 x i8] c" K\00" ; <[3 x i8]*> [#uses=1] -@str174 = internal global [3 x i8] c"*K\00" ; <[3 x i8]*> [#uses=1] -@str185 = internal global [3 x i8] c" R\00" ; <[3 x i8]*> [#uses=1] -@str19108 = internal global [3 x i8] c"*R\00" ; <[3 x i8]*> [#uses=1] -@str206 = internal global [3 x i8] c" Q\00" ; <[3 x i8]*> [#uses=1] -@str21109 = internal global [3 x i8] c"*Q\00" ; <[3 x i8]*> [#uses=1] -@str227 = internal global [3 x i8] c" B\00" ; <[3 x i8]*> [#uses=1] -@str238 = internal global [3 x i8] c"*B\00" ; <[3 x i8]*> [#uses=1] -@str249 = internal global [3 x i8] c" \00" ; <[3 x i8]*> [#uses=1] -@str110 = internal global [42 x i8] c"+----+----+----+----+----+----+----+----+\00" ; <[42 x i8]*> [#uses=0] -@str25.upgrd.163 = internal global [6 x i8] c" %s\0A\00" ; <[6 x i8]*> [#uses=0] -@str26.upgrd.164 = internal global [5 x i8] c"%d |\00" ; <[5 x i8]*> [#uses=0] -@str27.upgrd.165 = internal global [6 x i8] c" %s |\00" ; <[6 x i8]*> [#uses=0] -@str28.upgrd.166 = internal global [7 x i8] c"\0A %s\0A\00" ; <[7 x i8]*> [#uses=0] -@str111 = internal global [45 x i8] c"\0A a b c d e f g h\0A\0A\00" ; <[45 x i8]*> [#uses=0] -@str29.upgrd.167 = internal global [45 x i8] c"\0A h g f e d c b a\0A\0A\00" ; <[45 x i8]*> [#uses=0] -@str33.upgrd.168 = internal global [2 x i8] c"<\00" ; <[2 x i8]*> [#uses=0] -@str34.upgrd.169 = internal global [3 x i8] c"> \00" ; <[3 x i8]*> [#uses=0] -@str114.upgrd.170 = internal global [18 x i8] c"%2i %7i %5i %8i \00" ; <[18 x i8]*> [#uses=0] -@str115 = internal global [20 x i8] c"%2i %c%1i.%02i %9i \00" ; <[20 x i8]*> [#uses=0] -@str39.upgrd.171 = internal global [5 x i8] c"%s !\00" ; <[5 x i8]*> [#uses=0] -@str40.upgrd.172 = internal global [6 x i8] c"%s !!\00" ; <[6 x i8]*> [#uses=0] -@str41.upgrd.173 = internal global [6 x i8] c"%s ??\00" ; <[6 x i8]*> [#uses=0] -@str124 = internal global [71 x i8] c"\0ASjeng version SPEC 1.0, Copyright (C) 2000-2005 Gian-Carlo Pascutto\0A\0A\00" ; <[71 x i8]*> [#uses=0] -@state = internal global [625 x i32] zeroinitializer ; <[625 x i32]*> [#uses=0] - -declare fastcc i32 @calc_attackers(i32, i32) - -declare fastcc i32 @is_attacked(i32, i32) - -declare fastcc void @ProcessHoldings(i8*) - -declare void @llvm.memset.i32(i8*, i8, i32, i32) - -declare i8* @strncpy(i8*, i8*, i32) - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -declare void @__eprintf(i8*, i8*, i32, i8*) - -declare fastcc void @addHolding(i32, i32) - -declare fastcc void @removeHolding(i32, i32) - -declare fastcc void @DropremoveHolding(i32, i32) - -declare i32 @printf(i8*, ...) - -declare fastcc i32 @is_draw() - -declare void @exit(i32) - -declare fastcc void @setup_epd_line(i8*) - -declare i32 @atoi(i8*) - -declare fastcc void @reset_piece_square() - -declare fastcc void @initialize_hash() - -declare i32 @__maskrune(i32, i32) - -declare fastcc void @comp_to_san(i64, i64, i64, i8*) - -declare i8* @strstr(i8*, i8*) - -declare i32 @atol(i8*) - -declare %struct.FILE* @fopen(i8*, i8*) - -declare fastcc void @display_board(i32) - -define internal void @think(%struct.move_s* sret %agg.result) { -entry: - %output.i = alloca [8 x i8], align 8 ; <[8 x i8]*> [#uses=0] - %comp_move = alloca %struct.move_s, align 16 ; <%struct.move_s*> [#uses=7] - %temp_move = alloca %struct.move_s, align 16 ; <%struct.move_s*> [#uses=6] - %moves = alloca [512 x %struct.move_s], align 16 ; <[512 x %struct.move_s]*> [#uses=7] - %output = alloca [8 x i8], align 8 ; <[8 x i8]*> [#uses=1] - store i1 false, i1* @userealholdings.b - %tmp = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0 ; <%struct.move_s*> [#uses=3] - %tmp362 = getelementptr %struct.move_s* %comp_move, i32 0, i32 0 ; <i32*> [#uses=0] - %tmp365 = getelementptr %struct.move_s* %comp_move, i32 0, i32 1 ; <i32*> [#uses=0] - %tmp368 = getelementptr %struct.move_s* %comp_move, i32 0, i32 2 ; <i32*> [#uses=0] - %tmp371 = getelementptr %struct.move_s* %comp_move, i32 0, i32 3 ; <i32*> [#uses=0] - %tmp374 = getelementptr %struct.move_s* %comp_move, i32 0, i32 4 ; <i32*> [#uses=0] - %tmp377 = getelementptr %struct.move_s* %comp_move, i32 0, i32 5 ; <i32*> [#uses=0] - %tmp.upgrd.174 = bitcast %struct.move_s* %comp_move to { i64, i64, i64 }* ; <{ i64, i64, i64 }*> [#uses=3] - %tmp.upgrd.175 = getelementptr { i64, i64, i64 }* %tmp.upgrd.174, i32 0, i32 0 ; <i64*> [#uses=0] - %tmp829 = getelementptr { i64, i64, i64 }* %tmp.upgrd.174, i32 0, i32 1 ; <i64*> [#uses=0] - %tmp832 = getelementptr { i64, i64, i64 }* %tmp.upgrd.174, i32 0, i32 2 ; <i64*> [#uses=0] - %output.upgrd.176 = getelementptr [8 x i8]* %output, i32 0, i32 0 ; <i8*> [#uses=0] - %tmp573 = getelementptr %struct.move_s* %temp_move, i32 0, i32 0 ; <i32*> [#uses=0] - %tmp576 = getelementptr %struct.move_s* %temp_move, i32 0, i32 1 ; <i32*> [#uses=0] - %tmp579 = getelementptr %struct.move_s* %temp_move, i32 0, i32 2 ; <i32*> [#uses=0] - %tmp582 = getelementptr %struct.move_s* %temp_move, i32 0, i32 3 ; <i32*> [#uses=0] - %tmp585 = getelementptr %struct.move_s* %temp_move, i32 0, i32 4 ; <i32*> [#uses=0] - %tmp588 = getelementptr %struct.move_s* %temp_move, i32 0, i32 5 ; <i32*> [#uses=0] - %pn_restart.0.ph = bitcast i32 0 to i32 ; <i32> [#uses=2] - %tmp21362 = icmp eq i32 0, 0 ; <i1> [#uses=2] - %tmp216 = sitofp i32 %pn_restart.0.ph to float ; <float> [#uses=1] - %tmp216.upgrd.177 = fpext float %tmp216 to double ; <double> [#uses=1] - %tmp217 = fadd double %tmp216.upgrd.177, 1.000000e+00 ; <double> [#uses=1] - %tmp835 = icmp sgt i32 %pn_restart.0.ph, 9 ; <i1> [#uses=0] - store i32 0, i32* @nodes - store i32 0, i32* @qnodes - store i32 1, i32* @ply - store i32 0, i32* @ECacheProbes - store i32 0, i32* @ECacheHits - store i32 0, i32* @TTProbes - store i32 0, i32* @TTHits - store i32 0, i32* @TTStores - store i32 0, i32* @NCuts - store i32 0, i32* @NTries - store i32 0, i32* @TExt - store i32 0, i32* @FH - store i32 0, i32* @FHF - store i32 0, i32* @PVS - store i32 0, i32* @FULL - store i32 0, i32* @PVSF - store i32 0, i32* @ext_check - store i32 0, i32* @ext_onerep - store i32 0, i32* @razor_drop - store i32 0, i32* @razor_material - store i1 false, i1* @extendedtime.b - store i1 false, i1* @forcedwin.b - store i32 200, i32* @maxposdiff - store i8 0, i8* @true_i_depth - store i32 0, i32* @legals - %tmp48 = load i32* @Variant ; <i32> [#uses=1] - %tmp49 = icmp eq i32 %tmp48, 4 ; <i1> [#uses=1] - %storemerge = zext i1 %tmp49 to i32 ; <i32> [#uses=1] - store i32 %storemerge, i32* @captures - call fastcc void @gen( %struct.move_s* %tmp ) - %tmp53 = load i32* @numb_moves ; <i32> [#uses=1] - %tmp.i = load i32* @Variant ; <i32> [#uses=1] - %tmp.i.upgrd.178 = icmp eq i32 %tmp.i, 3 ; <i1> [#uses=1] - br i1 %tmp.i.upgrd.178, label %in_check.exit, label %cond_next.i - -cond_next.i: ; preds = %entry - %tmp2.i5 = load i32* @white_to_move ; <i32> [#uses=1] - %tmp3.i = icmp eq i32 %tmp2.i5, 1 ; <i1> [#uses=0] - ret void - -in_check.exit: ; preds = %entry - %tmp7637 = icmp sgt i32 %tmp53, 0 ; <i1> [#uses=1] - br i1 %tmp7637, label %cond_true77, label %bb80 - -cond_true77: ; preds = %in_check.exit - %l.1.0 = bitcast i32 0 to i32 ; <i32> [#uses=2] - call fastcc void @make( %struct.move_s* %tmp, i32 %l.1.0 ) - %tmp61 = call fastcc i32 @check_legal( %struct.move_s* %tmp, i32 %l.1.0, i32 0 ) ; <i32> [#uses=1] - %tmp62 = icmp eq i32 %tmp61, 0 ; <i1> [#uses=0] - ret void - -bb80: ; preds = %in_check.exit - %tmp81 = load i32* @Variant ; <i32> [#uses=1] - %tmp82 = icmp eq i32 %tmp81, 4 ; <i1> [#uses=1] - br i1 %tmp82, label %cond_true83, label %cond_next118 - -cond_true83: ; preds = %bb80 - %tmp84 = load i32* @legals ; <i32> [#uses=1] - %tmp85 = icmp eq i32 %tmp84, 0 ; <i1> [#uses=0] - ret void - -cond_next118: ; preds = %bb80 - %tmp119 = load i32* @Variant ; <i32> [#uses=1] - %tmp120 = icmp eq i32 %tmp119, 1 ; <i1> [#uses=1] - br i1 %tmp120, label %cond_next176, label %cond_true121 - -cond_true121: ; preds = %cond_next118 - %tmp122.b = load i1* @is_pondering.b ; <i1> [#uses=1] - br i1 %tmp122.b, label %cond_next176, label %cond_true124 - -cond_true124: ; preds = %cond_true121 - %tmp125 = load i32* @legals ; <i32> [#uses=1] - %tmp126 = icmp eq i32 %tmp125, 1 ; <i1> [#uses=1] - br i1 %tmp126, label %cond_true127, label %cond_next176 - -cond_true127: ; preds = %cond_true124 - %tmp128 = load i32* @inc ; <i32> [#uses=1] - %tmp129 = mul i32 %tmp128, 100 ; <i32> [#uses=1] - %tmp130 = load i32* @time_cushion ; <i32> [#uses=1] - %tmp131 = add i32 %tmp129, %tmp130 ; <i32> [#uses=1] - store i32 %tmp131, i32* @time_cushion - %tmp134 = getelementptr %struct.move_s* %agg.result, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp135 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp136 = load i32* %tmp135 ; <i32> [#uses=1] - store i32 %tmp136, i32* %tmp134 - %tmp137 = getelementptr %struct.move_s* %agg.result, i32 0, i32 1 ; <i32*> [#uses=1] - %tmp138 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 1 ; <i32*> [#uses=1] - %tmp139 = load i32* %tmp138 ; <i32> [#uses=1] - store i32 %tmp139, i32* %tmp137 - %tmp140 = getelementptr %struct.move_s* %agg.result, i32 0, i32 2 ; <i32*> [#uses=1] - %tmp141 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 2 ; <i32*> [#uses=1] - %tmp142 = load i32* %tmp141 ; <i32> [#uses=1] - store i32 %tmp142, i32* %tmp140 - %tmp143 = getelementptr %struct.move_s* %agg.result, i32 0, i32 3 ; <i32*> [#uses=1] - %tmp144 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 3 ; <i32*> [#uses=1] - %tmp145 = load i32* %tmp144 ; <i32> [#uses=1] - store i32 %tmp145, i32* %tmp143 - %tmp146 = getelementptr %struct.move_s* %agg.result, i32 0, i32 4 ; <i32*> [#uses=1] - %tmp147 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 4 ; <i32*> [#uses=1] - %tmp148 = load i32* %tmp147 ; <i32> [#uses=1] - store i32 %tmp148, i32* %tmp146 - %tmp149 = getelementptr %struct.move_s* %agg.result, i32 0, i32 5 ; <i32*> [#uses=1] - %tmp150 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 5 ; <i32*> [#uses=1] - %tmp151 = load i32* %tmp150 ; <i32> [#uses=1] - store i32 %tmp151, i32* %tmp149 - ret void - -cond_next176: ; preds = %cond_true124, %cond_true121, %cond_next118 - call fastcc void @check_phase( ) - %tmp177 = load i32* @phase ; <i32> [#uses=1] - switch i32 %tmp177, label %bb187 [ - i32 0, label %bb178 - i32 1, label %bb180 - i32 2, label %bb183 - ] - -bb178: ; preds = %cond_next176 - %tmp179 = call i32 (i8*, ...)* @printf( i8* getelementptr ([16 x i8]* @str40.upgrd.84, i32 0, i64 0) ) ; <i32> [#uses=0] - %tmp18854.b = load i1* @is_pondering.b ; <i1> [#uses=1] - br i1 %tmp18854.b, label %cond_false210, label %cond_true190 - -bb180: ; preds = %cond_next176 - %tmp182 = call i32 (i8*, ...)* @printf( i8* getelementptr ([19 x i8]* @str.upgrd.85, i32 0, i64 0) ) ; <i32> [#uses=0] - %tmp18856.b = load i1* @is_pondering.b ; <i1> [#uses=0] - ret void - -bb183: ; preds = %cond_next176 - %tmp185 = call i32 (i8*, ...)* @printf( i8* getelementptr ([16 x i8]* @str1.upgrd.86, i32 0, i64 0) ) ; <i32> [#uses=0] - %tmp18858.b = load i1* @is_pondering.b ; <i1> [#uses=0] - ret void - -bb187: ; preds = %cond_next176 - %tmp188.b = load i1* @is_pondering.b ; <i1> [#uses=0] - ret void - -cond_true190: ; preds = %bb178 - %tmp191 = load i32* @fixed_time ; <i32> [#uses=1] - %tmp192 = icmp eq i32 %tmp191, 0 ; <i1> [#uses=0] - ret void - -cond_false210: ; preds = %bb178 - store i32 999999, i32* @time_for_move - br i1 %tmp21362, label %cond_true226.critedge, label %bb287.critedge - -cond_true226.critedge: ; preds = %cond_false210 - %tmp223.c = call i32 (i8*, ...)* @printf( i8* getelementptr ([20 x i8]* @str43, i32 0, i64 0), i32 999999 ) ; <i32> [#uses=0] - %tmp.i.upgrd.179 = load %struct.TType** @DP_TTable ; <%struct.TType*> [#uses=1] - %tmp.i7.b = load i1* @TTSize.b ; <i1> [#uses=1] - %tmp1.i = select i1 %tmp.i7.b, i32 60000000, i32 0 ; <i32> [#uses=1] - %tmp.i.sb = getelementptr %struct.TType* %tmp.i.upgrd.179, i32 0, i32 0 ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %tmp.i.sb, i8 0, i32 %tmp1.i, i32 4 ) - %tmp2.i = load %struct.TType** @AS_TTable ; <%struct.TType*> [#uses=1] - %tmp3.i8.b = load i1* @TTSize.b ; <i1> [#uses=1] - %tmp4.i = select i1 %tmp3.i8.b, i32 60000000, i32 0 ; <i32> [#uses=1] - %tmp2.i.upgrd.180 = getelementptr %struct.TType* %tmp2.i, i32 0, i32 0 ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %tmp2.i.upgrd.180, i8 0, i32 %tmp4.i, i32 4 ) - %tmp.i.QTT = load %struct.QTType** @QS_TTable ; <%struct.QTType*> [#uses=1] - %tmp5.i9.b = load i1* @TTSize.b ; <i1> [#uses=1] - %tmp6.i10 = select i1 %tmp5.i9.b, i32 48000000, i32 0 ; <i32> [#uses=1] - %tmp7.i = getelementptr %struct.QTType* %tmp.i.QTT, i32 0, i32 0 ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %tmp7.i, i8 0, i32 %tmp6.i10, i32 4 ) - %tmp.i.ECache = load %struct.ECacheType** @ECache ; <%struct.ECacheType*> [#uses=1] - %tmp.i14.b = load i1* @ECacheSize.b ; <i1> [#uses=1] - %tmp1.i16 = select i1 %tmp.i14.b, i32 12000000, i32 0 ; <i32> [#uses=1] - %tmp.i17 = bitcast %struct.ECacheType* %tmp.i.ECache to i8* ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %tmp.i17, i8 0, i32 %tmp1.i16, i32 4 ) - call void @llvm.memset.i32( i8* bitcast ([300 x i32]* @rootlosers to i8*), i8 0, i32 1200, i32 4 ) - %tmp234.b = load i1* @is_pondering.b ; <i1> [#uses=1] - br i1 %tmp234.b, label %bb263, label %cond_next238 - -cond_next238: ; preds = %cond_true226.critedge - %tmp239 = load i32* @Variant ; <i32> [#uses=2] - switch i32 %tmp239, label %bb263 [ - i32 3, label %bb249 - i32 4, label %bb249 - ] - -bb249: ; preds = %cond_next238, %cond_next238 - %tmp250 = load i32* @piece_count ; <i32> [#uses=1] - %tmp251 = icmp sgt i32 %tmp250, 3 ; <i1> [#uses=1] - %tmp240.not = icmp ne i32 %tmp239, 3 ; <i1> [#uses=1] - %brmerge = or i1 %tmp251, %tmp240.not ; <i1> [#uses=1] - br i1 %brmerge, label %bb260, label %bb263 - -bb260: ; preds = %bb249 - %tmp261 = load i32* @time_for_move ; <i32> [#uses=1] - %tmp261.upgrd.181 = sitofp i32 %tmp261 to float ; <float> [#uses=1] - %tmp261.upgrd.182 = fpext float %tmp261.upgrd.181 to double ; <double> [#uses=1] - %tmp262 = fdiv double %tmp261.upgrd.182, 3.000000e+00 ; <double> [#uses=1] - %tmp262.upgrd.183 = fptosi double %tmp262 to i32 ; <i32> [#uses=1] - store i32 %tmp262.upgrd.183, i32* @pn_time - %tmp1.b.i = load i1* @PBSize.b ; <i1> [#uses=1] - %tmp1.i1 = select i1 %tmp1.b.i, i32 200000, i32 0 ; <i32> [#uses=1] - %tmp.i2 = call i8* @calloc( i32 %tmp1.i1, i32 44 ) ; <i8*> [#uses=1] - %tmp.i.ub = bitcast i8* %tmp.i2 to i8* ; <i8*> [#uses=1] - store i8* %tmp.i.ub, i8** @membuff - %tmp2.i3 = call i8* @calloc( i32 1, i32 44 ) ; <i8*> [#uses=3] - %tmp2.i.upgrd.184 = bitcast i8* %tmp2.i3 to %struct.node_t* ; <%struct.node_t*> [#uses=6] - %tmp.i.move_s = getelementptr [512 x %struct.move_s]* null, i32 0, i32 0 ; <%struct.move_s*> [#uses=3] - call fastcc void @gen( %struct.move_s* %tmp.i.move_s ) - %tmp3.i4 = load i32* @numb_moves ; <i32> [#uses=4] - %tmp3.i5 = bitcast i32 %tmp3.i4 to i32 ; <i32> [#uses=0] - store i1 false, i1* @alllosers.b - call void @llvm.memset.i32( i8* bitcast ([300 x i32]* @rootlosers to i8*), i8 0, i32 1200, i32 4 ) - %nodesspent.i = bitcast [512 x i32]* null to i8* ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %nodesspent.i, i8 0, i32 2048, i32 16 ) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 0) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 1) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 2) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 3) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 4) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 5) - %tmp.i.i = load i32* @Variant ; <i32> [#uses=1] - %tmp.i.i.upgrd.185 = icmp eq i32 %tmp.i.i, 3 ; <i1> [#uses=1] - br i1 %tmp.i.i.upgrd.185, label %in_check.exit.i, label %cond_next.i.i - -cond_next.i.i: ; preds = %bb260 - %tmp2.i.i = load i32* @white_to_move ; <i32> [#uses=1] - %tmp3.i.i = icmp eq i32 %tmp2.i.i, 1 ; <i1> [#uses=1] - br i1 %tmp3.i.i, label %cond_true4.i.i, label %cond_false12.i.i - -cond_true4.i.i: ; preds = %cond_next.i.i - %tmp5.i.i = load i32* @wking_loc ; <i32> [#uses=1] - %tmp6.i.i = call fastcc i32 @is_attacked( i32 %tmp5.i.i, i32 0 ) ; <i32> [#uses=1] - %not.tmp7.i.i = icmp ne i32 %tmp6.i.i, 0 ; <i1> [#uses=1] - %tmp217.i = zext i1 %not.tmp7.i.i to i32 ; <i32> [#uses=1] - %tmp4219.i = icmp sgt i32 %tmp3.i4, 0 ; <i1> [#uses=1] - br i1 %tmp4219.i, label %cond_true43.i, label %bb46.i - -cond_false12.i.i: ; preds = %cond_next.i.i - %tmp13.i.i = load i32* @bking_loc ; <i32> [#uses=1] - %tmp14.i.i = call fastcc i32 @is_attacked( i32 %tmp13.i.i, i32 1 ) ; <i32> [#uses=1] - %not.tmp15.i.i = icmp ne i32 %tmp14.i.i, 0 ; <i1> [#uses=1] - %tmp2120.i = zext i1 %not.tmp15.i.i to i32 ; <i32> [#uses=1] - %tmp4222.i = icmp sgt i32 %tmp3.i4, 0 ; <i1> [#uses=1] - br i1 %tmp4222.i, label %cond_true43.i, label %bb46.i - -in_check.exit.i: ; preds = %bb260 - %tmp4224.i = icmp sgt i32 %tmp3.i4, 0 ; <i1> [#uses=0] - ret void - -cond_true43.i: ; preds = %cond_false12.i.i, %cond_true4.i.i - %tmp21.0.ph.i = phi i32 [ %tmp217.i, %cond_true4.i.i ], [ %tmp2120.i, %cond_false12.i.i ] ; <i32> [#uses=1] - %i.0.0.i = bitcast i32 0 to i32 ; <i32> [#uses=2] - call fastcc void @make( %struct.move_s* %tmp.i.move_s, i32 %i.0.0.i ) - %tmp27.i = call fastcc i32 @check_legal( %struct.move_s* %tmp.i.move_s, i32 %i.0.0.i, i32 %tmp21.0.ph.i ) ; <i32> [#uses=1] - %tmp.i6 = icmp eq i32 %tmp27.i, 0 ; <i1> [#uses=0] - ret void - -bb46.i: ; preds = %cond_false12.i.i, %cond_true4.i.i - %tmp48.i = icmp eq i32 0, 0 ; <i1> [#uses=1] - br i1 %tmp48.i, label %cond_true49.i, label %cond_next53.i - -cond_true49.i: ; preds = %bb46.i - store i32 0, i32* @bufftop - %tmp50.i = load i8** @membuff ; <i8*> [#uses=1] - free i8* %tmp50.i - free i8* %tmp2.i3 - ret void - -cond_next53.i: ; preds = %bb46.i - store i32 1, i32* @nodecount - store i32 0, i32* @iters - store i32 0, i32* @maxply - store i32 0, i32* @forwards - %tmp54.i = load i32* @move_number ; <i32> [#uses=1] - %tmp55.i = load i32* @ply ; <i32> [#uses=1] - %tmp56.i = add i32 %tmp54.i, -1 ; <i32> [#uses=1] - %tmp57.i = add i32 %tmp56.i, %tmp55.i ; <i32> [#uses=1] - %tmp58.i = load i32* @hash ; <i32> [#uses=1] - %tmp.i.upgrd.186 = getelementptr [600 x i32]* @hash_history, i32 0, i32 %tmp57.i ; <i32*> [#uses=1] - store i32 %tmp58.i, i32* %tmp.i.upgrd.186 - %tmp59.i = load i32* @white_to_move ; <i32> [#uses=1] - %tmp60.i = icmp eq i32 %tmp59.i, 0 ; <i1> [#uses=1] - %tmp60.i.upgrd.187 = zext i1 %tmp60.i to i32 ; <i32> [#uses=1] - store i32 %tmp60.i.upgrd.187, i32* @root_to_move - %tmp.i4.i = load i32* @Variant ; <i32> [#uses=2] - %tmp.i5.i = icmp eq i32 %tmp.i4.i, 3 ; <i1> [#uses=1] - br i1 %tmp.i5.i, label %cond_true.i.i, label %cond_false.i.i - -cond_true.i.i: ; preds = %cond_next53.i - call fastcc void @suicide_pn_eval( %struct.node_t* %tmp2.i.upgrd.184 ) - %tmp6328.i = getelementptr %struct.node_t* %tmp2.i.upgrd.184, i32 0, i32 0 ; <i8*> [#uses=1] - %tmp29.i = load i8* %tmp6328.i ; <i8> [#uses=1] - %tmp6430.i = icmp eq i8 %tmp29.i, 1 ; <i1> [#uses=0] - ret void - -cond_false.i.i: ; preds = %cond_next53.i - %tmp2.i.i.upgrd.188 = icmp eq i32 %tmp.i4.i, 4 ; <i1> [#uses=1] - %tmp63.i = getelementptr %struct.node_t* %tmp2.i.upgrd.184, i32 0, i32 0 ; <i8*> [#uses=2] - br i1 %tmp2.i.i.upgrd.188, label %cond_true3.i.i, label %cond_false5.i.i - -cond_true3.i.i: ; preds = %cond_false.i.i - call fastcc void @losers_pn_eval( %struct.node_t* %tmp2.i.upgrd.184 ) - %tmp31.i = load i8* %tmp63.i ; <i8> [#uses=1] - %tmp6432.i = icmp eq i8 %tmp31.i, 1 ; <i1> [#uses=1] - br i1 %tmp6432.i, label %bb75.i, label %cond_next67.i - -cond_false5.i.i: ; preds = %cond_false.i.i - call fastcc void @std_pn_eval( %struct.node_t* %tmp2.i.upgrd.184 ) - %tmp.i.upgrd.189 = load i8* %tmp63.i ; <i8> [#uses=1] - %tmp64.i = icmp eq i8 %tmp.i.upgrd.189, 1 ; <i1> [#uses=0] - ret void - -cond_next67.i: ; preds = %cond_true3.i.i - %tmp69.i = getelementptr %struct.node_t* %tmp2.i.upgrd.184, i32 0, i32 0 ; <i8*> [#uses=1] - %tmp70.i = load i8* %tmp69.i ; <i8> [#uses=1] - %tmp71.i = icmp eq i8 %tmp70.i, 0 ; <i1> [#uses=0] - ret void - -bb75.i: ; preds = %cond_true3.i.i - store i32 0, i32* @bufftop - %tmp76.i = load i8** @membuff ; <i8*> [#uses=1] - free i8* %tmp76.i - free i8* %tmp2.i3 - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 0) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 1) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 2) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 3) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 4) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 5) - %tmp28869 = load i32* @result ; <i32> [#uses=1] - %tmp28970 = icmp eq i32 %tmp28869, 0 ; <i1> [#uses=1] - br i1 %tmp28970, label %cond_next337, label %cond_true290 - -bb263: ; preds = %bb249, %cond_next238, %cond_true226.critedge - br i1 %tmp21362, label %cond_true266, label %bb287 - -cond_true266: ; preds = %bb263 - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 0) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 1) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 2) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 3) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 4) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 5) - %tmp28871 = load i32* @result ; <i32> [#uses=1] - %tmp28972 = icmp eq i32 %tmp28871, 0 ; <i1> [#uses=0] - ret void - -bb287.critedge: ; preds = %cond_false210 - %tmp218.c = fdiv double 1.999998e+06, %tmp217 ; <double> [#uses=1] - %tmp218.c.upgrd.190 = fptosi double %tmp218.c to i32 ; <i32> [#uses=2] - store i32 %tmp218.c.upgrd.190, i32* @time_for_move - %tmp22367.c = call i32 (i8*, ...)* @printf( i8* getelementptr ([20 x i8]* @str43, i32 0, i64 0), i32 %tmp218.c.upgrd.190 ) ; <i32> [#uses=0] - ret void - -bb287: ; preds = %bb263 - %tmp288 = load i32* @result ; <i32> [#uses=1] - %tmp289 = icmp eq i32 %tmp288, 0 ; <i1> [#uses=0] - ret void - -cond_true290: ; preds = %bb75.i - %tmp292 = load i32* getelementptr (%struct.move_s* @pn_move, i32 0, i32 1) ; <i32> [#uses=1] - %tmp295 = icmp eq i32 %tmp292, 0 ; <i1> [#uses=0] - ret void - -cond_next337: ; preds = %bb75.i - %tmp338.b = load i1* @forcedwin.b ; <i1> [#uses=1] - br i1 %tmp338.b, label %bb348, label %cond_next342 - -cond_next342: ; preds = %cond_next337 - %tmp343 = load i32* @result ; <i32> [#uses=1] - %tmp344 = icmp eq i32 %tmp343, 0 ; <i1> [#uses=0] - ret void - -bb348: ; preds = %cond_next337 - %tmp350 = load i32* getelementptr (%struct.move_s* @pn_move, i32 0, i32 1) ; <i32> [#uses=1] - %tmp353 = icmp eq i32 %tmp350, 0 ; <i1> [#uses=0] - ret void -} - -declare fastcc i32 @eval(i32, i32) - -declare i8* @fgets(i8*, i32, %struct.FILE*) - -declare i32 @fclose(%struct.FILE*) - -declare fastcc i32 @losers_eval() - -declare fastcc i32 @l_bishop_mobility(i32) - -declare fastcc i32 @l_rook_mobility(i32) - -declare fastcc i32 @check_legal(%struct.move_s*, i32, i32) - -declare fastcc void @gen(%struct.move_s*) - -declare fastcc void @push_pawn(i32, i32) - -declare fastcc void @push_knighT(i32) - -declare fastcc void @push_slidE(i32) - -declare fastcc void @push_king(i32) - -declare fastcc i32 @f_in_check(%struct.move_s*, i32) - -declare fastcc void @make(%struct.move_s*, i32) - -declare fastcc void @add_capture(i32, i32, i32) - -declare fastcc void @unmake(%struct.move_s*, i32) - -declare i32 @ErrorIt(i32, i32) - -declare i32 @Pawn(i32, i32) - -declare i32 @Knight(i32, i32) - -declare i32 @King(i32, i32) - -declare i32 @Rook(i32, i32) - -declare i32 @Queen(i32, i32) - -declare i32 @Bishop(i32, i32) - -declare fastcc void @check_phase() - -declare fastcc i32 @bishop_mobility(i32) - -declare fastcc i32 @rook_mobility(i32) - -declare i32 @sscanf(i8*, i8*, ...) - -declare i32 @strncmp(i8*, i8*, i32) - -declare i8* @strchr(i8*, i32) - -declare fastcc void @CheckBadFlow(i32) - -declare fastcc void @suicide_pn_eval(%struct.node_t*) - -declare fastcc void @losers_pn_eval(%struct.node_t*) - -declare fastcc void @std_pn_eval(%struct.node_t*) - -declare fastcc %struct.node_t* @select_most_proving(%struct.node_t*) - -declare fastcc void @set_proof_and_disproof_numbers(%struct.node_t*) - -declare fastcc void @StoreTT(i32, i32, i32, i32, i32, i32) - -declare fastcc void @develop_node(%struct.node_t*) - -declare fastcc void @update_ancestors(%struct.node_t*) - -declare i8* @calloc(i32, i32) - -declare fastcc void @comp_to_coord(i64, i64, i64, i8*) - -declare i8* @strcat(i8*, i8*) - -declare i32 @sprintf(i8*, i8*, ...) - -declare fastcc void @order_moves(%struct.move_s*, i32*, i32*, i32, i32) - -declare fastcc i32 @see(i32, i32, i32) - -declare fastcc void @perft(i32) - -declare fastcc i32 @qsearch(i32, i32, i32) - -declare fastcc i32 @allocate_time() - -declare fastcc void @QStoreTT(i32, i32, i32, i32) - -declare fastcc i32 @search(i32, i32, i32, i32) - -declare fastcc i32 @ProbeTT(i32*, i32, i32*, i32*, i32*, i32) - -declare void @search_root(%struct.move_s* sret , i32, i32, i32) - -declare fastcc void @post_fh_thinking(i32, %struct.move_s*) - -declare fastcc void @post_thinking(i32) - -declare i32 @fprintf(%struct.FILE*, i8*, ...) - -declare fastcc i32 @s_bishop_mobility(i32) - -declare fastcc i32 @s_rook_mobility(i32) - -declare fastcc i32 @suicide_mid_eval() - -declare i32 @main(i32, i8**) - -declare fastcc void @init_game() - -declare void @setbuf(%struct.FILE*, i8*) - -declare i8* @strcpy(i8*, i8*) - -declare i32 @__tolower(i32) - -declare i32 @strcmp(i8*, i8*) - -declare void (i32)* @signal(i32, void (i32)*) - -declare fastcc void @hash_extract_pv(i32, i8*) - -declare double @difftime(i32, i32) - -declare i32 @getc(%struct.FILE*) - -declare i32 @strlen(i8*) - -declare i32 @fwrite(i8*, i32, i32, %struct.FILE*) diff --git a/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll b/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll deleted file mode 100644 index 3675548..0000000 --- a/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: opt < %s -basicaa -dse -S | not grep tmp5 -; PR2599 -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" - -define void @foo({ i32, i32 }* %x) nounwind { -entry: - %tmp4 = getelementptr { i32, i32 }* %x, i32 0, i32 0 ; <i32*> [#uses=2] - %tmp5 = load i32* %tmp4, align 4 ; <i32> [#uses=1] - %tmp7 = getelementptr { i32, i32 }* %x, i32 0, i32 1 ; <i32*> [#uses=2] - %tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1] - %tmp17 = sub i32 0, %tmp8 ; <i32> [#uses=1] - store i32 %tmp5, i32* %tmp4, align 4 - store i32 %tmp17, i32* %tmp7, align 4 - ret void -} diff --git a/test/Transforms/DeadStoreElimination/2008-11-28-MemDepUpdate.ll b/test/Transforms/DeadStoreElimination/2008-11-28-MemDepUpdate.ll deleted file mode 100644 index 5958c6c..0000000 --- a/test/Transforms/DeadStoreElimination/2008-11-28-MemDepUpdate.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: opt < %s -dse | llvm-dis -; PR3141 - %struct.ada__tags__dispatch_table = type { [1 x i32] } - %struct.f393a00_1__object = type { %struct.ada__tags__dispatch_table*, i8 } - %struct.f393a00_2__windmill = type { %struct.f393a00_1__object, i16 } - -define void @f393a00_2__swap(%struct.f393a00_2__windmill* %a, %struct.f393a00_2__windmill* %b) { -entry: - %t = alloca %struct.f393a00_2__windmill ; <%struct.f393a00_2__windmill*> [#uses=1] - %0 = getelementptr %struct.f393a00_2__windmill* %t, i32 0, i32 0, i32 0 ; <%struct.ada__tags__dispatch_table**> [#uses=1] - %1 = load %struct.ada__tags__dispatch_table** null, align 4 ; <%struct.ada__tags__dispatch_table*> [#uses=1] - %2 = load %struct.ada__tags__dispatch_table** %0, align 8 ; <%struct.ada__tags__dispatch_table*> [#uses=1] - store %struct.ada__tags__dispatch_table* %2, %struct.ada__tags__dispatch_table** null, align 4 - store %struct.ada__tags__dispatch_table* %1, %struct.ada__tags__dispatch_table** null, align 4 - ret void -} diff --git a/test/Transforms/DeadStoreElimination/2008-11-29-OffEndOfBlock.ll b/test/Transforms/DeadStoreElimination/2008-11-29-OffEndOfBlock.ll deleted file mode 100644 index c320a3e..0000000 --- a/test/Transforms/DeadStoreElimination/2008-11-29-OffEndOfBlock.ll +++ /dev/null @@ -1,27 +0,0 @@ -; RUN: opt < %s -dse | llvm-dis - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin7" - %struct.cab_archive = type { i32, i16, i16, i16, i16, i8, %struct.cab_folder*, %struct.cab_file* } - %struct.cab_file = type { i32, i16, i64, i8*, i32, i32, i32, %struct.cab_folder*, %struct.cab_file*, %struct.cab_archive*, %struct.cab_state* } - %struct.cab_folder = type { i16, i16, %struct.cab_archive*, i64, %struct.cab_folder* } - %struct.cab_state = type { i8*, i8*, [38912 x i8], i16, i16, i8*, i16 } - %struct.lzx_stream = type { i32, i32, i8, i64, i64, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, [84 x i8], [720 x i8], [314 x i8], [72 x i8], [104 x i16], [5408 x i16], [4596 x i16], [144 x i16], [51 x i32], [51 x i8], [32768 x i8], %struct.cab_file*, i32 (%struct.cab_file*, i8*, i32)* } - -declare fastcc i32 @lzx_read_lens(%struct.lzx_stream*, i8*, i32, i32) nounwind - -define i32 @lzx_decompress(%struct.lzx_stream* %lzx, i64 %out_bytes) nounwind { -bb13: ; preds = %entry - %0 = getelementptr %struct.lzx_stream* %lzx, i32 0, i32 25 ; <i8**> [#uses=2] - %1 = getelementptr %struct.lzx_stream* %lzx, i32 0, i32 26 ; <i8**> [#uses=2] - %2 = getelementptr %struct.lzx_stream* %lzx, i32 0, i32 29 ; <i32*> [#uses=0] - br label %bb14 - -bb14: ; preds = %bb13 - %3 = load i8** %0, align 4 ; <i8*> [#uses=1] - %4 = load i8** %1, align 4 ; <i8*> [#uses=1] - store i8* %3, i8** %0, align 4 - store i8* %4, i8** %1, align 4 - %5 = call fastcc i32 @lzx_read_lens(%struct.lzx_stream* %lzx, i8* null, i32 256, i32 0) nounwind ; <i32> [#uses=0] - unreachable -} diff --git a/test/Transforms/DeadStoreElimination/2009-11-10-Trampoline.ll b/test/Transforms/DeadStoreElimination/2009-11-10-Trampoline.ll deleted file mode 100644 index 9a943b4..0000000 --- a/test/Transforms/DeadStoreElimination/2009-11-10-Trampoline.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: opt -S -dse < %s | FileCheck %s - -declare i8* @llvm.init.trampoline(i8*, i8*, i8*) - -declare void @f() - -define void @unused_trampoline() { -; CHECK: @unused_trampoline - %storage = alloca [10 x i8], align 16 ; <[10 x i8]*> [#uses=1] -; CHECK-NOT: alloca - %cast = getelementptr [10 x i8]* %storage, i32 0, i32 0 ; <i8*> [#uses=1] - %tramp = call i8* @llvm.init.trampoline( i8* %cast, i8* bitcast (void ()* @f to i8*), i8* null ) ; <i8*> [#uses=1] -; CHECK-NOT: trampoline - ret void -; CHECK: ret void -} diff --git a/test/Transforms/DeadStoreElimination/PartialStore.ll b/test/Transforms/DeadStoreElimination/PartialStore.ll index c97d481..7ac1e08 100644 --- a/test/Transforms/DeadStoreElimination/PartialStore.ll +++ b/test/Transforms/DeadStoreElimination/PartialStore.ll @@ -1,14 +1,71 @@ -; RUN: opt < %s -basicaa -dse -S | \ -; RUN: not grep {store i8} +; RUN: opt < %s -basicaa -dse -S | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" + ; Ensure that the dead store is deleted in this case. It is wholely ; overwritten by the second store. -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" -define i32 @test() { - %V = alloca i32 ; <i32*> [#uses=3] +define void @test1(i32 *%V) { %V2 = bitcast i32* %V to i8* ; <i8*> [#uses=1] store i8 0, i8* %V2 store i32 1234567, i32* %V - %X = load i32* %V ; <i32> [#uses=1] - ret i32 %X + ret void +; CHECK: @test1 +; CHECK-NEXT: store i32 1234567 +} + +; Note that we could do better by merging the two stores into one. +define void @test2(i32* %P) { +; CHECK: @test2 + store i32 0, i32* %P +; CHECK: store i32 + %Q = bitcast i32* %P to i16* + store i16 1, i16* %Q +; CHECK: store i16 + ret void +} + + +define i32 @test3(double %__x) { +; CHECK: @test3 +; CHECK: store double + %__u = alloca { [3 x i32] } + %tmp.1 = bitcast { [3 x i32] }* %__u to double* + store double %__x, double* %tmp.1 + %tmp.4 = getelementptr { [3 x i32] }* %__u, i32 0, i32 0, i32 1 + %tmp.5 = load i32* %tmp.4 + %tmp.6 = icmp slt i32 %tmp.5, 0 + %tmp.7 = zext i1 %tmp.6 to i32 + ret i32 %tmp.7 +} + +; PR6043 +define void @test4(i8* %P) { +; CHECK: @test4 +; CHECK-NEXT: bitcast +; CHECK-NEXT: store double + + store i8 19, i8* %P ;; dead + %A = getelementptr i8* %P, i32 3 + + store i8 42, i8* %A ;; dead + + %Q = bitcast i8* %P to double* + store double 0.0, double* %Q + ret void } +; PR8657 +declare void @test5a(i32*) +define void @test5(i32 %i) nounwind ssp { + %A = alloca i32 + %B = bitcast i32* %A to i8* + %C = getelementptr i8* %B, i32 %i + store i8 10, i8* %C ;; Dead store to variable index. + store i32 20, i32* %A + + call void @test5a(i32* %A) + ret void +; CHECK: @test5( +; CHECK-NEXT: alloca +; CHECK-NEXT: store i32 20 +; CHECK-NEXT: call void @test5a +} diff --git a/test/Transforms/DeadStoreElimination/alloca.ll b/test/Transforms/DeadStoreElimination/alloca.ll deleted file mode 100644 index b6818eb..0000000 --- a/test/Transforms/DeadStoreElimination/alloca.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: opt < %s -dse -S | not grep DEAD - -define void @test(i32* %Q) { - %P = alloca i32 ; <i32*> [#uses=1] - %DEAD = load i32* %Q ; <i32> [#uses=1] - store i32 %DEAD, i32* %P - ret void -} - diff --git a/test/Transforms/DeadStoreElimination/byval.ll b/test/Transforms/DeadStoreElimination/byval.ll deleted file mode 100644 index fa651b1..0000000 --- a/test/Transforms/DeadStoreElimination/byval.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: opt < %s -dse -S | not grep store - -%struct.x = type { i32, i32, i32, i32 } - -define i32 @foo(%struct.x* byval %a) nounwind { -entry: - %tmp2 = getelementptr %struct.x* %a, i32 0, i32 0 - store i32 1, i32* %tmp2, align 4 - ret i32 1 -} diff --git a/test/Transforms/DeadStoreElimination/context-sensitive.ll b/test/Transforms/DeadStoreElimination/context-sensitive.ll deleted file mode 100644 index 071d7e1..0000000 --- a/test/Transforms/DeadStoreElimination/context-sensitive.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: opt < %s -basicaa -dse -S | not grep DEAD -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" - -declare void @ext() - -define i32* @caller() { - %P = malloc i32 ; <i32*> [#uses=4] - %DEAD = load i32* %P ; <i32> [#uses=1] - %DEAD2 = add i32 %DEAD, 1 ; <i32> [#uses=1] - store i32 %DEAD2, i32* %P - call void @ext( ) - store i32 0, i32* %P - ret i32* %P -} - diff --git a/test/Transforms/DeadStoreElimination/crash.ll b/test/Transforms/DeadStoreElimination/crash.ll index 5aac877..bb279cd 100644 --- a/test/Transforms/DeadStoreElimination/crash.ll +++ b/test/Transforms/DeadStoreElimination/crash.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -dse -S +; RUN: opt < %s -basicaa -dse -S target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin10.0" @@ -55,3 +55,20 @@ dead: store i32 4, i32* %Q2 br label %dead } + + +; PR3141 +%struct.ada__tags__dispatch_table = type { [1 x i32] } +%struct.f393a00_1__object = type { %struct.ada__tags__dispatch_table*, i8 } +%struct.f393a00_2__windmill = type { %struct.f393a00_1__object, i16 } + +define void @test4(%struct.f393a00_2__windmill* %a, %struct.f393a00_2__windmill* %b) { +entry: + %t = alloca %struct.f393a00_2__windmill ; <%struct.f393a00_2__windmill*> [#uses=1] + %0 = getelementptr %struct.f393a00_2__windmill* %t, i32 0, i32 0, i32 0 ; <%struct.ada__tags__dispatch_table**> [#uses=1] + %1 = load %struct.ada__tags__dispatch_table** null, align 4 ; <%struct.ada__tags__dispatch_table*> [#uses=1] + %2 = load %struct.ada__tags__dispatch_table** %0, align 8 ; <%struct.ada__tags__dispatch_table*> [#uses=1] + store %struct.ada__tags__dispatch_table* %2, %struct.ada__tags__dispatch_table** null, align 4 + store %struct.ada__tags__dispatch_table* %1, %struct.ada__tags__dispatch_table** null, align 4 + ret void +} diff --git a/test/Transforms/DeadStoreElimination/memcpy.ll b/test/Transforms/DeadStoreElimination/memcpy.ll deleted file mode 100644 index 8d99631..0000000 --- a/test/Transforms/DeadStoreElimination/memcpy.ll +++ /dev/null @@ -1,52 +0,0 @@ -; RUN: opt < %s -dse -S | not grep alloca -; ModuleID = 'placeholder.adb' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i686-pc-linux-gnu" - %struct.placeholder__T5b = type { i32, [1 x i32] } - %struct.placeholder__an_interval___PAD = type { %struct.placeholder__interval, [4 x i32] } - %struct.placeholder__interval = type { i32, i32 } - %struct.placeholder__s__s__the_interval___PAD = type { %struct.placeholder__interval } - -define void @_ada_placeholder() nounwind { -entry: - %an_interval = alloca %struct.placeholder__an_interval___PAD ; <%struct.placeholder__an_interval___PAD*> [#uses=3] - %tmp34 = bitcast %struct.placeholder__an_interval___PAD* %an_interval to %struct.placeholder__T5b* ; <%struct.placeholder__T5b*> [#uses=1] - %tmp5 = getelementptr %struct.placeholder__an_interval___PAD* %an_interval, i32 0, i32 0, i32 0 ; <i32*> [#uses=2] - store i32 1, i32* %tmp5, align 8 - %tmp10 = getelementptr %struct.placeholder__T5b* %tmp34, i32 0, i32 1, i32 0 ; <i32*> [#uses=1] - store i32 1, i32* %tmp10, align 4 - %tmp82 = load i32* %tmp5, align 8 ; <i32> [#uses=5] - %tmp83 = icmp slt i32 %tmp82, 6 ; <i1> [#uses=1] - %min84 = select i1 %tmp83, i32 %tmp82, i32 5 ; <i32> [#uses=3] - %tmp85 = icmp sgt i32 %min84, -1 ; <i1> [#uses=2] - %min84.cast193 = zext i32 %min84 to i64 ; <i64> [#uses=1] - %min84.cast193.op = shl i64 %min84.cast193, 33 ; <i64> [#uses=1] - %tmp104 = icmp sgt i32 %tmp82, -1 ; <i1> [#uses=2] - %tmp103.cast192 = zext i32 %tmp82 to i64 ; <i64> [#uses=1] - %tmp103.cast192.op = shl i64 %tmp103.cast192, 33 ; <i64> [#uses=1] - %min84.cast193.op.op = ashr i64 %min84.cast193.op, 28 ; <i64> [#uses=1] - %sextr121 = select i1 %tmp85, i64 %min84.cast193.op.op, i64 0 ; <i64> [#uses=2] - %tmp103.cast192.op.op = ashr i64 %tmp103.cast192.op, 28 ; <i64> [#uses=1] - %sextr123 = select i1 %tmp104, i64 %tmp103.cast192.op.op, i64 0 ; <i64> [#uses=2] - %tmp124 = icmp sle i64 %sextr121, %sextr123 ; <i1> [#uses=1] - %min125 = select i1 %tmp124, i64 %sextr121, i64 %sextr123 ; <i64> [#uses=1] - %sextr131194 = and i64 %min125, 34359738336 ; <i64> [#uses=1] - %tmp134 = add i64 %sextr131194, 63 ; <i64> [#uses=1] - lshr i64 %tmp134, 3 ; <i64>:0 [#uses=1] - %tmp150188.shrunk = trunc i64 %0 to i32 ; <i32> [#uses=1] - %tmp159 = and i32 %tmp150188.shrunk, -4 ; <i32> [#uses=1] - %tmp161 = alloca i8, i32 %tmp159 ; <i8*> [#uses=1] - %min167.op = shl i32 %min84, 2 ; <i32> [#uses=1] - %tmp170 = select i1 %tmp85, i32 %min167.op, i32 0 ; <i32> [#uses=2] - %tmp173.op = shl i32 %tmp82, 2 ; <i32> [#uses=1] - %tmp176 = select i1 %tmp104, i32 %tmp173.op, i32 0 ; <i32> [#uses=2] - %tmp177 = icmp sle i32 %tmp170, %tmp176 ; <i1> [#uses=1] - %min178 = select i1 %tmp177, i32 %tmp170, i32 %tmp176 ; <i32> [#uses=1] - %tmp179 = add i32 %min178, 7 ; <i32> [#uses=1] - %tmp180 = and i32 %tmp179, -4 ; <i32> [#uses=1] - %tmp183185 = bitcast %struct.placeholder__an_interval___PAD* %an_interval to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %tmp161, i8* %tmp183185, i32 %tmp180, i32 4 ) - ret void -} - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind diff --git a/test/Transforms/DeadStoreElimination/partial-overwrite.ll b/test/Transforms/DeadStoreElimination/partial-overwrite.ll deleted file mode 100644 index 048d464..0000000 --- a/test/Transforms/DeadStoreElimination/partial-overwrite.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: opt -dse -S %s | FileCheck %s -; Note that we could do better by merging the two stores into one. - -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-unknown-linux-gnu" - -define void @test(i32* %P) { - store i32 0, i32* %P -; CHECK: store i32 - %Q = bitcast i32* %P to i16* - store i16 1, i16* %Q -; CHECK: store i16 - ret void -} diff --git a/test/Transforms/DeadStoreElimination/simple.ll b/test/Transforms/DeadStoreElimination/simple.ll index d3f5c61..a61eac9 100644 --- a/test/Transforms/DeadStoreElimination/simple.ll +++ b/test/Transforms/DeadStoreElimination/simple.ll @@ -1,10 +1,238 @@ -; RUN: opt < %s -basicaa -dse -S | not grep DEAD +; RUN: opt < %s -basicaa -dse -S | FileCheck %s target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" -define void @test(i32* %Q, i32* %P) { - %DEAD = load i32* %Q ; <i32> [#uses=1] +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind +declare void @llvm.memset.i64(i8*, i8, i64, i32) +declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) +declare i8* @llvm.init.trampoline(i8*, i8*, i8*) + +define void @test1(i32* %Q, i32* %P) { + %DEAD = load i32* %Q store i32 %DEAD, i32* %P store i32 0, i32* %P ret void +; CHECK: @test1 +; CHECK-NEXT: store i32 0, i32* %P +; CHECK-NEXT: ret void +} + +; PR8576 - Should delete store of 10 even though p/q are may aliases. +define void @test2(i32 *%p, i32 *%q) { + store i32 10, i32* %p, align 4 + store i32 20, i32* %q, align 4 + store i32 30, i32* %p, align 4 + ret void +; CHECK: @test2 +; CHECK-NEXT: store i32 20 +} + + +; PR8677 +@g = global i32 1 + +define i32 @test3(i32* %g_addr) nounwind { +; CHECK: @test3 +; CHECK: load i32* %g_addr + %g_value = load i32* %g_addr, align 4 + store i32 -1, i32* @g, align 4 + store i32 %g_value, i32* %g_addr, align 4 + %tmp3 = load i32* @g, align 4 + ret i32 %tmp3 +} + + +define void @test4(i32* %Q) { + %a = load i32* %Q + volatile store i32 %a, i32* %Q + ret void +; CHECK: @test4 +; CHECK-NEXT: load i32 +; CHECK-NEXT: volatile store +; CHECK-NEXT: ret void +} + +define void @test5(i32* %Q) { + %a = volatile load i32* %Q + store i32 %a, i32* %Q + ret void +; CHECK: @test5 +; CHECK-NEXT: volatile load +; CHECK-NEXT: ret void +} + +; Should delete store of 10 even though memset is a may-store to P (P and Q may +; alias). +define void @test6(i32 *%p, i8 *%q) { + store i32 10, i32* %p, align 4 ;; dead. + call void @llvm.memset.i64(i8* %q, i8 42, i64 900, i32 1) + store i32 30, i32* %p, align 4 + ret void +; CHECK: @test6 +; CHECK-NEXT: call void @llvm.memset +} + +; Should delete store of 10 even though memcpy is a may-store to P (P and Q may +; alias). +define void @test7(i32 *%p, i8 *%q, i8* noalias %r) { + store i32 10, i32* %p, align 4 ;; dead. + call void @llvm.memcpy.i64(i8* %q, i8* %r, i64 900, i32 1) + store i32 30, i32* %p, align 4 + ret void +; CHECK: @test7 +; CHECK-NEXT: call void @llvm.memcpy +} + +; Do not delete stores that are only partially killed. +define i32 @test8() { + %V = alloca i32 + store i32 1234567, i32* %V + %V2 = bitcast i32* %V to i8* + store i8 0, i8* %V2 + %X = load i32* %V + ret i32 %X + +; CHECK: @test8 +; CHECK: store i32 1234567 +} + + +; Test for byval handling. +%struct.x = type { i32, i32, i32, i32 } +define void @test9(%struct.x* byval %a) nounwind { + %tmp2 = getelementptr %struct.x* %a, i32 0, i32 0 + store i32 1, i32* %tmp2, align 4 + ret void +; CHECK: @test9 +; CHECK-NEXT: ret void +} + +; va_arg has fuzzy dependence, the store shouldn't be zapped. +define double @test10(i8* %X) { + %X_addr = alloca i8* + store i8* %X, i8** %X_addr + %tmp.0 = va_arg i8** %X_addr, double + ret double %tmp.0 +; CHECK: @test10 +; CHECK: store +} + + +; DSE should delete the dead trampoline. +declare void @test11f() +define void @test11() { +; CHECK: @test11 + %storage = alloca [10 x i8], align 16 ; <[10 x i8]*> [#uses=1] +; CHECK-NOT: alloca + %cast = getelementptr [10 x i8]* %storage, i32 0, i32 0 ; <i8*> [#uses=1] + %tramp = call i8* @llvm.init.trampoline( i8* %cast, i8* bitcast (void ()* @test11f to i8*), i8* null ) ; <i8*> [#uses=1] +; CHECK-NOT: trampoline + ret void +; CHECK: ret void +} + + +; PR2599 - load -> store to same address. +define void @test12({ i32, i32 }* %x) nounwind { + %tmp4 = getelementptr { i32, i32 }* %x, i32 0, i32 0 + %tmp5 = load i32* %tmp4, align 4 + %tmp7 = getelementptr { i32, i32 }* %x, i32 0, i32 1 + %tmp8 = load i32* %tmp7, align 4 + %tmp17 = sub i32 0, %tmp8 + store i32 %tmp5, i32* %tmp4, align 4 + store i32 %tmp17, i32* %tmp7, align 4 + ret void +; CHECK: @test12 +; CHECK-NOT: tmp5 +; CHECK: ret void +} + + +; %P doesn't escape, the DEAD instructions should be removed. +declare void @test13f() +define i32* @test13() { + %p = tail call i8* @malloc(i32 4) + %P = bitcast i8* %p to i32* + %DEAD = load i32* %P + %DEAD2 = add i32 %DEAD, 1 + store i32 %DEAD2, i32* %P + call void @test13f( ) + store i32 0, i32* %P + ret i32* %P +; CHECK: @test13() +; CHECK-NEXT: malloc +; CHECK-NEXT: bitcast +; CHECK-NEXT: call void +} + +declare noalias i8* @malloc(i32) + + + +define void @test14(i32* %Q) { + %P = alloca i32 + %DEAD = load i32* %Q + store i32 %DEAD, i32* %P + ret void + +; CHECK: @test14 +; CHECK-NEXT: ret void } + +; PR8701 + +;; Fully dead overwrite of memcpy. +define void @test15(i8* %P, i8* %Q) nounwind ssp { + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + ret void +; CHECK: @test15 +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} + +;; Full overwrite of smaller memcpy. +define void @test16(i8* %P, i8* %Q) nounwind ssp { + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 8, i32 1) + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + ret void +; CHECK: @test16 +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} + +;; Overwrite of memset by memcpy. +define void @test17(i8* %P, i8* noalias %Q) nounwind ssp { + tail call void @llvm.memset.i64(i8* %P, i8 42, i64 8, i32 1) + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + ret void +; CHECK: @test17 +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} + +; Should not delete the volatile memset. +define void @test17v(i8* %P, i8* %Q) nounwind ssp { + tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i32 1, i1 true) + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) + ret void +; CHECK: @test17v +; CHECK-NEXT: call void @llvm.memset +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} + +; PR8728 +; Do not delete instruction where possible situation is: +; A = B +; A = A +define void @test18(i8* %P, i8* %Q, i8* %R) nounwind ssp { + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + tail call void @llvm.memcpy.i64(i8* %P, i8* %R, i64 12, i32 1) + ret void +; CHECK: @test18 +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} diff --git a/test/Transforms/DeadStoreElimination/volatile-load.ll b/test/Transforms/DeadStoreElimination/volatile-load.ll deleted file mode 100644 index 59a1129..0000000 --- a/test/Transforms/DeadStoreElimination/volatile-load.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: opt < %s -dse -S | grep {volatile load} - -@g_1 = global i32 0 - -define void @foo() nounwind { - %t = volatile load i32* @g_1 - ret void -} diff --git a/test/Transforms/EarlyCSE/basic.ll b/test/Transforms/EarlyCSE/basic.ll new file mode 100644 index 0000000..e3c75f9 --- /dev/null +++ b/test/Transforms/EarlyCSE/basic.ll @@ -0,0 +1,121 @@ +; RUN: opt < %s -S -early-cse | FileCheck %s + + +; CHECK: @test1 +define void @test1(i8 %V, i32 *%P) { + %A = bitcast i64 42 to double ;; dead + %B = add i32 4, 19 ;; constant folds + store i32 %B, i32* %P + ; CHECK-NEXT: store i32 23, i32* %P + + %C = zext i8 %V to i32 + %D = zext i8 %V to i32 ;; CSE + volatile store i32 %C, i32* %P + volatile store i32 %D, i32* %P + ; CHECK-NEXT: %C = zext i8 %V to i32 + ; CHECK-NEXT: volatile store i32 %C + ; CHECK-NEXT: volatile store i32 %C + + %E = add i32 %C, %C + %F = add i32 %C, %C + volatile store i32 %E, i32* %P + volatile store i32 %F, i32* %P + ; CHECK-NEXT: %E = add i32 %C, %C + ; CHECK-NEXT: volatile store i32 %E + ; CHECK-NEXT: volatile store i32 %E + + %G = add nuw i32 %C, %C ;; not a CSE with E + volatile store i32 %G, i32* %P + ; CHECK-NEXT: %G = add nuw i32 %C, %C + ; CHECK-NEXT: volatile store i32 %G + ret void +} + + +;; Simple load value numbering. +; CHECK: @test2 +define i32 @test2(i32 *%P) { + %V1 = load i32* %P + %V2 = load i32* %P + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: ret i32 0 +} + +;; Cross block load value numbering. +; CHECK: @test3 +define i32 @test3(i32 *%P, i1 %Cond) { + %V1 = load i32* %P + br i1 %Cond, label %T, label %F +T: + store i32 4, i32* %P + ret i32 42 +F: + %V2 = load i32* %P + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: F: + ; CHECK: ret i32 0 +} + +;; Cross block load value numbering stops when stores happen. +; CHECK: @test4 +define i32 @test4(i32 *%P, i1 %Cond) { + %V1 = load i32* %P + br i1 %Cond, label %T, label %F +T: + ret i32 42 +F: + ; Clobbers V1 + store i32 42, i32* %P + + %V2 = load i32* %P + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: F: + ; CHECK: ret i32 %Diff +} + +declare i32 @func(i32 *%P) readonly + +;; Simple call CSE'ing. +; CHECK: @test5 +define i32 @test5(i32 *%P) { + %V1 = call i32 @func(i32* %P) + %V2 = call i32 @func(i32* %P) + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: ret i32 0 +} + +;; Trivial Store->load forwarding +; CHECK: @test6 +define i32 @test6(i32 *%P) { + store i32 42, i32* %P + %V1 = load i32* %P + ret i32 %V1 + ; CHECK: ret i32 42 +} + +;; Trivial dead store elimination. +; CHECK: @test7 +define void @test7(i32 *%P) { + store i32 42, i32* %P + store i32 45, i32* %P + ret void + ; CHECK-NEXT: store i32 45 + ; CHECK-NEXT: ret void +} + +;; Readnone functions aren't invalidated by stores. +; CHECK: @test8 +define i32 @test8(i32 *%P) { + %V1 = call i32 @func(i32* %P) readnone + store i32 4, i32* %P + %V2 = call i32 @func(i32* %P) readnone + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: ret i32 0 +} + + diff --git a/test/Transforms/EarlyCSE/dg.exp b/test/Transforms/EarlyCSE/dg.exp new file mode 100644 index 0000000..de42dad --- /dev/null +++ b/test/Transforms/EarlyCSE/dg.exp @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.ll]] diff --git a/test/Transforms/GVN/condprop.ll b/test/Transforms/GVN/condprop.ll index f7bcacd..be6c349 100644 --- a/test/Transforms/GVN/condprop.ll +++ b/test/Transforms/GVN/condprop.ll @@ -1,52 +1,55 @@ -; RUN: opt < %s -basicaa -gvn -S | grep {br i1 false} +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s @a = external global i32 ; <i32*> [#uses=7] +; CHECK: @foo define i32 @foo() nounwind { entry: - %0 = load i32* @a, align 4 ; <i32> [#uses=1] - %1 = icmp eq i32 %0, 4 ; <i1> [#uses=1] + %0 = load i32* @a, align 4 + %1 = icmp eq i32 %0, 4 br i1 %1, label %bb, label %bb1 bb: ; preds = %entry br label %bb8 bb1: ; preds = %entry - %2 = load i32* @a, align 4 ; <i32> [#uses=1] - %3 = icmp eq i32 %2, 5 ; <i1> [#uses=1] + %2 = load i32* @a, align 4 + %3 = icmp eq i32 %2, 5 br i1 %3, label %bb2, label %bb3 bb2: ; preds = %bb1 br label %bb8 bb3: ; preds = %bb1 - %4 = load i32* @a, align 4 ; <i32> [#uses=1] - %5 = icmp eq i32 %4, 4 ; <i1> [#uses=1] + %4 = load i32* @a, align 4 + %5 = icmp eq i32 %4, 4 +; CHECK: br i1 false, label %bb4, label %bb5 br i1 %5, label %bb4, label %bb5 bb4: ; preds = %bb3 - %6 = load i32* @a, align 4 ; <i32> [#uses=1] - %7 = add i32 %6, 5 ; <i32> [#uses=1] + %6 = load i32* @a, align 4 + %7 = add i32 %6, 5 br label %bb8 bb5: ; preds = %bb3 - %8 = load i32* @a, align 4 ; <i32> [#uses=1] - %9 = icmp eq i32 %8, 5 ; <i1> [#uses=1] + %8 = load i32* @a, align 4 + %9 = icmp eq i32 %8, 5 +; CHECK: br i1 false, label %bb6, label %bb7 br i1 %9, label %bb6, label %bb7 bb6: ; preds = %bb5 - %10 = load i32* @a, align 4 ; <i32> [#uses=1] - %11 = add i32 %10, 4 ; <i32> [#uses=1] + %10 = load i32* @a, align 4 + %11 = add i32 %10, 4 br label %bb8 bb7: ; preds = %bb5 - %12 = load i32* @a, align 4 ; <i32> [#uses=1] + %12 = load i32* @a, align 4 br label %bb8 bb8: ; preds = %bb7, %bb6, %bb4, %bb2, %bb - %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] ; <i32> [#uses=1] + %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] br label %return return: ; preds = %bb8 ret i32 %.0 -} +}
\ No newline at end of file diff --git a/test/Transforms/GVN/phi-translate.ll b/test/Transforms/GVN/phi-translate.ll new file mode 100644 index 0000000..f10537e --- /dev/null +++ b/test/Transforms/GVN/phi-translate.ll @@ -0,0 +1,31 @@ +; RUN: opt -basicaa -gvn -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +; CHECK: @foo +; CHECK: entry.end_crit_edge: +; CHECK: %n.pre = load i32* %q.phi.trans.insert +; CHECK: then: +; CHECK: store i32 %z +; CHECK: end: +; CHECK: %n = phi i32 [ %n.pre, %entry.end_crit_edge ], [ %z, %then ] +; CHECK: ret i32 %n + +@G = external global [100 x i32] +define i32 @foo(i32 %x, i32 %z) { +entry: + %tobool = icmp eq i32 %x, 0 + br i1 %tobool, label %end, label %then + +then: + %i = sext i32 %x to i64 + %p = getelementptr [100 x i32]* @G, i64 0, i64 %i + store i32 %z, i32* %p + br label %end + +end: + %j = sext i32 %x to i64 + %q = getelementptr [100 x i32]* @G, i64 0, i64 %j + %n = load i32* %q + ret i32 %n +} diff --git a/test/Transforms/GVN/preserve-tbaa.ll b/test/Transforms/GVN/preserve-tbaa.ll new file mode 100644 index 0000000..2fcfc47 --- /dev/null +++ b/test/Transforms/GVN/preserve-tbaa.ll @@ -0,0 +1,28 @@ +; RUN: opt -tbaa -basicaa -gvn -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +; GVN should preserve the TBAA tag on loads when doing PRE. + +; CHECK: @test +; CHECK: %tmp33.pre = load i16* undef, align 2, !tbaa !0 +; CHECK: br label %for.body +define void @test() nounwind { +entry: + br i1 undef, label %bb.nph, label %for.end + +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %for.body, %bb.nph + %tmp33 = load i16* undef, align 2, !tbaa !0 + store i16 undef, i16* undef, align 2, !tbaa !0 + br i1 false, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +} + +!0 = metadata !{metadata !"short", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll b/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll index cfc9f30..5b06fea 100644 --- a/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll +++ b/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll @@ -2,9 +2,9 @@ ; alignments. Elements 0 and 2 must be 16-byte aligned, and element ; 1 must be at least 8 byte aligned (but could be more). -; RUN: opt < %s -globalopt -S | grep {@G.0 = internal global .*align 16} -; RUN: opt < %s -globalopt -S | grep {@G.1 = internal global .*align 8} -; RUN: opt < %s -globalopt -S | grep {@G.2 = internal global .*align 16} +; RUN: opt < %s -globalopt -S | grep {@G.0 = internal unnamed_addr global .*align 16} +; RUN: opt < %s -globalopt -S | grep {@G.1 = internal unnamed_addr global .*align 8} +; RUN: opt < %s -globalopt -S | grep {@G.2 = internal unnamed_addr global .*align 16} ; rdar://5891920 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll b/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll index e024fc2..d645ce4 100644 --- a/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll +++ b/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -globalopt -S | grep {@X = internal global i32} +; RUN: opt < %s -globalopt -S | grep {@X = internal unnamed_addr global i32} target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin7" @X = internal global i32* null ; <i32**> [#uses=2] diff --git a/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll b/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll index c43565a..b73f62b 100644 --- a/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll +++ b/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll @@ -8,7 +8,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-apple-darwin10.0" @TOP = internal global i64* null ; <i64**> [#uses=2] -; CHECK: @TOP = internal global i64* null +; CHECK: @TOP = internal unnamed_addr global i64* null @channelColumns = internal global i64 0 ; <i64*> [#uses=2] ; Derived from @DescribeChannel() in yacr2 diff --git a/test/Transforms/GlobalOpt/crash.ll b/test/Transforms/GlobalOpt/crash.ll index bb1fc84..9da5a5e 100644 --- a/test/Transforms/GlobalOpt/crash.ll +++ b/test/Transforms/GlobalOpt/crash.ll @@ -55,3 +55,12 @@ entry: ret void } + + + +@data8 = internal global [8000 x i8] zeroinitializer, align 16 +define void @memset_with_strange_user() ssp { + call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds ([8000 x i8]* @data8, i64 0, i64 0), i8 undef, i64 ptrtoint (i8* getelementptr ([8000 x i8]* @data8, i64 1, i64 sub (i64 0, i64 ptrtoint ([8000 x i8]* @data8 to i64))) to i64), i32 16, i1 false) + ret void +} +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/Transforms/GlobalOpt/ctor-list-opt-constexpr.ll b/test/Transforms/GlobalOpt/ctor-list-opt-constexpr.ll new file mode 100644 index 0000000..204f979 --- /dev/null +++ b/test/Transforms/GlobalOpt/ctor-list-opt-constexpr.ll @@ -0,0 +1,23 @@ +; RUN: opt -globalopt %s -S | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +%0 = type { i32, void ()* } +%struct.foo = type { i32* } + +@G = global i32 0, align 4 +@H = global i32 0, align 4 +@X = global %struct.foo zeroinitializer, align 8 +@llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @init }] + +; PR8710 - GlobalOpt shouldn't change the global's initializer to have this +; arbitrary constant expression, the code generator can't handle it. +define internal void @init() { +entry: + %tmp = getelementptr inbounds %struct.foo* @X, i32 0, i32 0 + store i32* inttoptr (i64 sdiv (i64 ptrtoint (i32* @G to i64), i64 ptrtoint (i32* @H to i64)) to i32*), i32** %tmp, align 8 + ret void +} + +; CHECK: @init +; CHECK: store i32* diff --git a/test/Transforms/GlobalOpt/ctor-list-opt.ll b/test/Transforms/GlobalOpt/ctor-list-opt.ll index 7e90bc1..542c786 100644 --- a/test/Transforms/GlobalOpt/ctor-list-opt.ll +++ b/test/Transforms/GlobalOpt/ctor-list-opt.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -globalopt -S | not grep CTOR -@llvm.global_ctors = appending global [10 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR2 }, { i32, void ()* } { i32 65535, void ()* @CTOR3 }, { i32, void ()* } { i32 65535, void ()* @CTOR4 }, { i32, void ()* } { i32 65535, void ()* @CTOR5 }, { i32, void ()* } { i32 65535, void ()* @CTOR6 }, { i32, void ()* } { i32 65535, void ()* @CTOR7 }, { i32, void ()* } { i32 65535, void ()* @CTOR8 }, { i32, void ()* } { i32 2147483647, void ()* null } ] ; <[10 x { i32, void ()* }]*> [#uses=0] +@llvm.global_ctors = appending global [11 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR2 }, { i32, void ()* } { i32 65535, void ()* @CTOR3 }, { i32, void ()* } { i32 65535, void ()* @CTOR4 }, { i32, void ()* } { i32 65535, void ()* @CTOR5 }, { i32, void ()* } { i32 65535, void ()* @CTOR6 }, { i32, void ()* } { i32 65535, void ()* @CTOR7 }, { i32, void ()* } { i32 65535, void ()* @CTOR8 }, { i32, void ()* } { i32 65535, void ()* @CTOR9 }, { i32, void ()* } { i32 2147483647, void ()* null } ] ; <[10 x { i32, void ()* }]*> [#uses=0] @G = global i32 0 ; <i32*> [#uses=1] @G2 = global i32 0 ; <i32*> [#uses=1] @G3 = global i32 -123 ; <i32*> [#uses=2] @@ -83,3 +83,18 @@ define i1 @accessor() { %V = load i1* @CTORGV ; <i1> [#uses=1] ret i1 %V } + +%struct.A = type { i32 } +%struct.B = type { i32 (...)**, i8*, [4 x i8] } +@GV1 = global %struct.B zeroinitializer, align 8 +@GV2 = constant [3 x i8*] [i8* inttoptr (i64 16 to i8*), i8* null, i8* bitcast ({ i8*, i8*, i32, i32, i8*, i64 }* null to i8*)] +; CHECK-NOT: CTOR9 +define internal void @CTOR9() { +entry: + %0 = bitcast %struct.B* @GV1 to i8* + %1 = getelementptr inbounds i8* %0, i64 16 + %2 = bitcast i8* %1 to %struct.A* + %3 = bitcast %struct.B* @GV1 to i8*** + store i8** getelementptr inbounds ([3 x i8*]* @GV2, i64 1, i64 0), i8*** %3 + ret void +} diff --git a/test/Transforms/GlobalOpt/globalsra-unknown-index.ll b/test/Transforms/GlobalOpt/globalsra-unknown-index.ll index 9397a12..1e0db6a 100644 --- a/test/Transforms/GlobalOpt/globalsra-unknown-index.ll +++ b/test/Transforms/GlobalOpt/globalsra-unknown-index.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -globalopt -S > %t -; RUN: grep {@Y = internal global \\\[3 x \[%\]struct.X\\\] zeroinitializer} %t +; RUN: grep {@Y = internal unnamed_addr global \\\[3 x \[%\]struct.X\\\] zeroinitializer} %t ; RUN: grep load %t | count 6 ; RUN: grep {add i32 \[%\]a, \[%\]b} %t | count 3 diff --git a/test/Transforms/GlobalOpt/memcpy.ll b/test/Transforms/GlobalOpt/memcpy.ll index 335f5ec..8f063a2 100644 --- a/test/Transforms/GlobalOpt/memcpy.ll +++ b/test/Transforms/GlobalOpt/memcpy.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -globalopt -S | \ -; RUN: grep {G1 = internal constant} +; RUN: grep {G1 = internal unnamed_addr constant} @G1 = internal global [58 x i8] c"asdlfkajsdlfkajsd;lfkajds;lfkjasd;flkajsd;lkfja;sdlkfjasd\00" ; <[58 x i8]*> [#uses=1] diff --git a/test/Transforms/GlobalOpt/unnamed-addr.ll b/test/Transforms/GlobalOpt/unnamed-addr.ll new file mode 100644 index 0000000..be02821 --- /dev/null +++ b/test/Transforms/GlobalOpt/unnamed-addr.ll @@ -0,0 +1,54 @@ +; RUN: opt %s -globalopt -S | FileCheck %s + +@a = internal global i32 0, align 4 +@b = internal global i32 0, align 4 +@c = internal global i32 0, align 4 +@d = internal constant [4 x i8] c"foo\00", align 1 + +; CHECK: @a = internal global i32 0, align 4 +; CHECK: @b = internal global i32 0, align 4 +; CHECK: @c = internal unnamed_addr global i32 0, align 4 +; CHECK: @d = internal unnamed_addr constant [4 x i8] c"foo\00", align 1 + +define i1 @bah(i64 %i) nounwind readonly optsize ssp { +entry: + %arrayidx4 = getelementptr inbounds [4 x i8]* @d, i64 0, i64 %i + %tmp5 = load i8* %arrayidx4, align 1 + %cmp = icmp eq i8 %tmp5, 42 + ret i1 %cmp +} + +define void @baz(i32 %x) { +entry: + store i32 %x, i32* @a, align 4 + store i32 %x, i32* @b, align 4 + store i32 %x, i32* @c, align 4 + ret void +} + +define i32 @foo(i32* %x) nounwind readnone optsize ssp { +entry: + %cmp = icmp eq i32* %x, @a + %conv = zext i1 %cmp to i32 + ret i32 %conv +} + +define i32 @bar() { +entry: + switch i64 ptrtoint (i32* @b to i64), label %sw.epilog [ + i64 1, label %return + i64 0, label %return + ] + +sw.epilog: + ret i32 0 + +return: + ret i32 1 +} + +define i32 @zed() { +entry: + %tmp1 = load i32* @c, align 4 + ret i32 %tmp1 +} diff --git a/test/Transforms/Inline/basictest.ll b/test/Transforms/Inline/basictest.ll index 6531b9e..609a3d4 100644 --- a/test/Transforms/Inline/basictest.ll +++ b/test/Transforms/Inline/basictest.ll @@ -43,5 +43,5 @@ define i32 @test2(i1 %cond) { ; CHECK: @test2( ; CHECK-NOT: = alloca -; CHECK: ret i32 42 +; CHECK: ret i32 } diff --git a/test/Transforms/Inline/byval.ll b/test/Transforms/Inline/byval.ll index c3552f6..e601faf 100644 --- a/test/Transforms/Inline/byval.ll +++ b/test/Transforms/Inline/byval.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -inline -S | grep {llvm.memcpy} +; RUN: opt < %s -inline -S | FileCheck %s ; Inlining a byval struct should cause an explicit copy into an alloca. @@ -16,7 +16,7 @@ entry: declare i32 @printf(i8*, ...) nounwind -define i32 @main() nounwind { +define i32 @test1() nounwind { entry: %S = alloca %struct.ss ; <%struct.ss*> [#uses=4] %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] @@ -25,4 +25,82 @@ entry: store i64 2, i64* %tmp4, align 4 call void @f( %struct.ss* byval %S ) nounwind ret i32 0 +; CHECK: @test1() +; CHECK: %S1 = alloca %struct.ss +; CHECK: %S = alloca %struct.ss +; CHECK: call void @llvm.memcpy +; CHECK: ret i32 0 } + +; Inlining a byval struct should NOT cause an explicit copy +; into an alloca if the function is readonly + +define internal i32 @f2(%struct.ss* byval %b) nounwind readonly { +entry: + %tmp = getelementptr %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2] + %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1] + %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1] + ret i32 %tmp2 +} + +define i32 @test2() nounwind { +entry: + %S = alloca %struct.ss ; <%struct.ss*> [#uses=4] + %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp1, align 8 + %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1] + store i64 2, i64* %tmp4, align 4 + %X = call i32 @f2( %struct.ss* byval %S ) nounwind + ret i32 %X +; CHECK: @test2() +; CHECK: %S = alloca %struct.ss +; CHECK-NOT: call void @llvm.memcpy +; CHECK: ret i32 +} + + +; Inlining a byval with an explicit alignment needs to use *at least* that +; alignment on the generated alloca. +; PR8769 +declare void @g3(%struct.ss* %p) + +define internal void @f3(%struct.ss* byval align 64 %b) nounwind { + call void @g3(%struct.ss* %b) ;; Could make alignment assumptions! + ret void +} + +define void @test3() nounwind { +entry: + %S = alloca %struct.ss, align 1 ;; May not be aligned. + call void @f3( %struct.ss* byval align 64 %S) nounwind + ret void +; CHECK: @test3() +; CHECK: %S1 = alloca %struct.ss, align 64 +; CHECK: %S = alloca %struct.ss +; CHECK: call void @llvm.memcpy +; CHECK: call void @g3(%struct.ss* %S1) +; CHECK: ret void +} + + +; Inlining a byval struct should NOT cause an explicit copy +; into an alloca if the function is readonly, but should increase an alloca's +; alignment to satisfy an explicit alignment request. + +define internal i32 @f4(%struct.ss* byval align 64 %b) nounwind readonly { + call void @g3(%struct.ss* %b) + ret i32 4 +} + +define i32 @test4() nounwind { +entry: + %S = alloca %struct.ss, align 2 ; <%struct.ss*> [#uses=4] + %X = call i32 @f4( %struct.ss* byval align 64 %S ) nounwind + ret i32 %X +; CHECK: @test4() +; CHECK: %S = alloca %struct.ss, align 64 +; CHECK-NOT: call void @llvm.memcpy +; CHECK: call void @g3 +; CHECK: ret i32 4 +} + diff --git a/test/Transforms/Inline/byval2.ll b/test/Transforms/Inline/byval2.ll deleted file mode 100644 index a7ab77c..0000000 --- a/test/Transforms/Inline/byval2.ll +++ /dev/null @@ -1,28 +0,0 @@ -; RUN: opt < %s -inline -S | not grep {llvm.memcpy} - -; Inlining a byval struct should NOT cause an explicit copy -; into an alloca if the function is readonly - - %struct.ss = type { i32, i64 } -@.str = internal constant [10 x i8] c"%d, %lld\0A\00" ; <[10 x i8]*> [#uses=1] - -define internal i32 @f(%struct.ss* byval %b) nounwind readonly { -entry: - %tmp = getelementptr %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2] - %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1] - %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1] - ret i32 %tmp2 -} - -declare i32 @printf(i8*, ...) nounwind - -define i32 @main() nounwind { -entry: - %S = alloca %struct.ss ; <%struct.ss*> [#uses=4] - %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] - store i32 1, i32* %tmp1, align 8 - %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1] - store i64 2, i64* %tmp4, align 4 - %X = call i32 @f( %struct.ss* byval %S ) nounwind - ret i32 %X -} diff --git a/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll b/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll index 6d22754..c02d33c 100644 --- a/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll +++ b/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll @@ -1,7 +1,6 @@ ; This testcase can be simplified by "realizing" that alloca can never return ; null. -; RUN: opt < %s -instcombine -simplifycfg | \ -; RUN: llvm-dis | not grep br +; RUN: opt < %s -instcombine -simplifycfg -S | not grep br declare i32 @bitmap_clear(...) diff --git a/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll b/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll deleted file mode 100644 index fdb8fd9..0000000 --- a/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: opt < %s -instcombine -S | FileCheck %s -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" - -declare void @free(i8*) - -define void @test(i32* %X) { - call void (...)* bitcast (void (i8*)* @free to void (...)*)( i32* %X ) ; <i32>:1 [#uses=0] -; CHECK: %tmp = bitcast i32* %X to i8* -; CHECK: call void @free(i8* %tmp) - ret void -; CHECK: ret void -} diff --git a/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll b/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll index c337ea7..baaafef 100644 --- a/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll +++ b/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll @@ -6,7 +6,7 @@ define i64 @test(i64 %X) { %Y = shl i64 %X, 16 ; <i64> [#uses=1] ; CHECK: %Y = shl i64 %X, 16 %Z = ashr i64 %Y, 16 ; <i64> [#uses=1] -; CHECK: %Z = ashr i64 %Y, 16 +; CHECK: %Z = ashr exact i64 %Y, 16 ret i64 %Z ; CHECK: ret i64 %Z } diff --git a/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll b/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll index 5bcb543..807efcf 100644 --- a/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll +++ b/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll @@ -1,7 +1,6 @@ ; PR1271 ; RUN: opt < %s -instcombine -S | \ -; RUN: grep {ashr i32 %.mp137, 2} -; END. +; RUN: grep {ashr exact i32 %.mp137, 2} target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-pc-linux-gnu" diff --git a/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll b/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll index b2774d6..43af190 100644 --- a/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll +++ b/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll @@ -1,34 +1,67 @@ -; RUN: opt < %s -instcombine -S > %t -; RUN: grep urem %t | count 3 -; RUN: grep srem %t | count 1 -; RUN: grep sub %t | count 2 -; RUN: grep add %t | count 1 +; RUN: opt < %s -instcombine -S | FileCheck %s ; PR3103 define i8 @test1(i8 %x, i8 %y) { +; CHECK: @test1 %A = udiv i8 %x, %y +; CHECK-NEXT: urem %B = mul i8 %A, %y %C = sub i8 %x, %B ret i8 %C +; CHECK-NEXT: ret } define i8 @test2(i8 %x, i8 %y) { +; CHECK: @test2 %A = sdiv i8 %x, %y +; CHECK-NEXT: srem %B = mul i8 %A, %y %C = sub i8 %x, %B ret i8 %C +; CHECK-NEXT: ret } define i8 @test3(i8 %x, i8 %y) { +; CHECK: @test3 %A = udiv i8 %x, %y +; CHECK-NEXT: urem %B = mul i8 %A, %y %C = sub i8 %B, %x +; CHECK-NEXT: sub ret i8 %C +; CHECK-NEXT: ret } define i8 @test4(i8 %x) { +; CHECK: @test4 %A = udiv i8 %x, 3 +; CHECK-NEXT: urem %B = mul i8 %A, -3 +; CHECK-NEXT: sub %C = sub i8 %x, %B +; CHECK-NEXT: add ret i8 %C +; CHECK-NEXT: ret +} + +define i32 @test5(i32 %x, i32 %y) { +; CHECK: @test5 +; (((X / Y) * Y) / Y) -> X / Y + %div = sdiv i32 %x, %y +; CHECK-NEXT: sdiv + %mul = mul i32 %div, %y + %r = sdiv i32 %mul, %y + ret i32 %r +; CHECK-NEXT: ret +} + +define i32 @test6(i32 %x, i32 %y) { +; CHECK: @test6 +; (((X / Y) * Y) / Y) -> X / Y + %div = udiv i32 %x, %y +; CHECK-NEXT: udiv + %mul = mul i32 %div, %y + %r = udiv i32 %mul, %y + ret i32 %r +; CHECK-NEXT: ret } diff --git a/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll b/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll index d74c70e..441d5f9 100644 --- a/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll +++ b/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll @@ -1,20 +1,46 @@ ; RUN: opt -instcombine -S < %s | FileCheck %s -; <rdar://problem/8606771> +; <rdar://problem/8606771> +; CHECK: @main define i32 @main(i32 %argc) nounwind ssp { entry: %tmp3151 = trunc i32 %argc to i8 +; CHECK: %tmp3162 = shl i8 %tmp3151, 5 +; CHECK: and i8 %tmp3162, 64 +; CHECK-NOT: shl +; CHECK-NOT: shr %tmp3161 = or i8 %tmp3151, -17 %tmp3162 = and i8 %tmp3151, 122 %tmp3163 = xor i8 %tmp3162, -17 %tmp4114 = shl i8 %tmp3163, 6 %tmp4115 = xor i8 %tmp4114, %tmp3163 %tmp4120 = xor i8 %tmp3161, %tmp4115 -; CHECK: lshr i8 %tmp4115, 1 -; CHECK-NOT: shl i8 %tmp4126, 6 %tmp4126 = lshr i8 %tmp4120, 7 %tmp4127 = mul i8 %tmp4126, 64 %tmp4086 = zext i8 %tmp4127 to i32 ; CHECK: ret i32 ret i32 %tmp4086 } + +; rdar://8739316 +; CHECK: @foo +define i8 @foo(i8 %arg, i8 %arg1) nounwind { +bb: + %tmp = shl i8 %arg, 7 + %tmp2 = and i8 %arg1, 84 + %tmp3 = and i8 %arg1, -118 + %tmp4 = and i8 %arg1, 33 + %tmp5 = sub i8 -88, %tmp2 + %tmp6 = and i8 %tmp5, 84 + %tmp7 = or i8 %tmp4, %tmp6 + %tmp8 = xor i8 %tmp, %tmp3 + %tmp9 = or i8 %tmp7, %tmp8 + %tmp10 = lshr i8 %tmp8, 7 + %tmp11 = shl i8 %tmp10, 5 + +; CHECK: %0 = lshr i8 %tmp8, 2 +; CHECK: %tmp11 = and i8 %0, 32 + + %tmp12 = xor i8 %tmp11, %tmp9 + ret i8 %tmp12 +} diff --git a/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll b/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll new file mode 100644 index 0000000..720365c --- /dev/null +++ b/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll @@ -0,0 +1,17 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" + +define {}* @foo({}* %x, i32 %n) { +; CHECK: @foo +; CHECK-NOT: getelementptr + %p = getelementptr {}* %x, i32 %n + ret {}* %p +} + +define i8* @bar(i64 %n, {{}, [0 x {[0 x i8]}]}* %p) { +; CHECK: @bar + %g = getelementptr {{}, [0 x {[0 x i8]}]}* %p, i64 %n, i32 1, i64 %n, i32 0, i64 %n +; CHECK: %p, i64 0, i32 1, i64 0, i32 0, i64 %n + ret i8* %g +} diff --git a/test/Transforms/InstCombine/2010-11-23-Distributed.ll b/test/Transforms/InstCombine/2010-11-23-Distributed.ll new file mode 100644 index 0000000..4f8e8dc --- /dev/null +++ b/test/Transforms/InstCombine/2010-11-23-Distributed.ll @@ -0,0 +1,23 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +define i32 @foo(i32 %x, i32 %y) { +; CHECK: @foo + %add = add nsw i32 %y, %x + %mul = mul nsw i32 %add, %y + %square = mul nsw i32 %y, %y + %res = sub i32 %mul, %square + ret i32 %res +; CHECK-NEXT: mul i32 %x, %y +; CHECK-NEXT: ret i32 +} + +define i1 @bar(i64 %x, i64 %y) { +; CHECK: @bar + %a = and i64 %y, %x +; CHECK: and +; CHECK-NOT: and + %not = xor i64 %a, -1 + %b = and i64 %y, %not + %r = icmp eq i64 %b, 0 + ret i1 %r +; CHECK: ret i1 +} diff --git a/test/Transforms/InstCombine/2011-02-14-InfLoop.ll b/test/Transforms/InstCombine/2011-02-14-InfLoop.ll new file mode 100644 index 0000000..6d8a7dd --- /dev/null +++ b/test/Transforms/InstCombine/2011-02-14-InfLoop.ll @@ -0,0 +1,19 @@ +; This testcase causes an infinite loop in the instruction combiner, +; because it changes a pattern and the original pattern is almost +; identical to the newly-generated pattern. +; RUN: opt < %s -instcombine -disable-output + +;PR PR9216 + +target triple = "x86_64-unknown-linux-gnu" + +define <4 x float> @m_387(i8* noalias nocapture %A, i8* nocapture %B, <4 x i1> %C) nounwind { +entry: + %movcsext20 = sext <4 x i1> %C to <4 x i32> + %tmp2389 = xor <4 x i32> %movcsext20, <i32 -1, i32 -1, i32 -1, i32 -1> + %movcand25 = and <4 x i32> %tmp2389, <i32 undef, i32 undef, i32 undef, i32 -1> + %movcor26 = or <4 x i32> %movcand25, zeroinitializer + %L2 = bitcast <4 x i32> %movcor26 to <4 x float> + %L3 = shufflevector <4 x float> zeroinitializer, <4 x float> %L2, <4 x i32> <i32 0, i32 1, i32 2, i32 7> + ret <4 x float> %L3 +} diff --git a/test/Transforms/InstCombine/2011-02-16-InsertelementHang.ll b/test/Transforms/InstCombine/2011-02-16-InsertelementHang.ll new file mode 100644 index 0000000..2f6034e --- /dev/null +++ b/test/Transforms/InstCombine/2011-02-16-InsertelementHang.ll @@ -0,0 +1,11 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +; PR9218 + +%vec2x2 = type { <2 x double>, <2 x double> } + +define %vec2x2 @split(double) nounwind alwaysinline { +; CHECK: @split +; CHECK: ret %vec2x2 undef + %vba = insertelement <2 x double> undef, double %0, i32 2 + ret <2 x double> %vba, <2 x double> %vba +} diff --git a/test/Transforms/InstCombine/add.ll b/test/Transforms/InstCombine/add.ll index 4719809..a316d06 100644 --- a/test/Transforms/InstCombine/add.ll +++ b/test/Transforms/InstCombine/add.ll @@ -275,3 +275,27 @@ define i32 @test36(i32 %a) { %q = and i32 %z, 1 ; always zero ret i32 %q } + +define i1 @test37(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %a, %b + %cmp = icmp eq i32 %add, %a + ret i1 %cmp +} + +define i1 @test38(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %a, %b + %cmp = icmp eq i32 %add, %b + ret i1 %cmp +} + +define i1 @test39(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %b, %a + %cmp = icmp eq i32 %add, %a + ret i1 %cmp +} + +define i1 @test40(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %b, %a + %cmp = icmp eq i32 %add, %b + ret i1 %cmp +} diff --git a/test/Transforms/InstCombine/add2.ll b/test/Transforms/InstCombine/add2.ll index 1cbdd3a..c5109c5 100644 --- a/test/Transforms/InstCombine/add2.ll +++ b/test/Transforms/InstCombine/add2.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -instcombine -S | not grep add +; RUN: opt < %s -instcombine -S | FileCheck %s define i64 @test1(i64 %A, i32 %B) { %tmp12 = zext i32 %B to i64 @@ -6,19 +6,38 @@ define i64 @test1(i64 %A, i32 %B) { %tmp5 = add i64 %tmp3, %A %tmp6 = and i64 %tmp5, 123 ret i64 %tmp6 +; CHECK: @test1 +; CHECK-NEXT: and i64 %A, 123 +; CHECK-NEXT: ret i64 } -define i32 @test3(i32 %A) { +define i32 @test2(i32 %A) { %B = and i32 %A, 7 %C = and i32 %A, 32 %F = add i32 %B, %C ret i32 %F +; CHECK: @test2 +; CHECK-NEXT: and i32 %A, 39 +; CHECK-NEXT: ret i32 } -define i32 @test4(i32 %A) { +define i32 @test3(i32 %A) { %B = and i32 %A, 128 %C = lshr i32 %A, 30 %F = add i32 %B, %C ret i32 %F +; CHECK: @test3 +; CHECK-NEXT: and +; CHECK-NEXT: lshr +; CHECK-NEXT: or i32 %B, %C +; CHECK-NEXT: ret i32 +} + +define i32 @test4(i32 %A) { + %B = add nuw i32 %A, %A + ret i32 %B +; CHECK: @test4 +; CHECK-NEXT: %B = shl nuw i32 %A, 1 +; CHECK-NEXT: ret i32 %B } diff --git a/test/Transforms/InstCombine/and2.ll b/test/Transforms/InstCombine/and2.ll index d898ea3..a888152 100644 --- a/test/Transforms/InstCombine/and2.ll +++ b/test/Transforms/InstCombine/and2.ll @@ -26,3 +26,12 @@ define i32 @test3(i32 %X, i32 %Y) { ; CHECK-NEXT: and i32 %X, %Y ; CHECK-NEXT: ret } + +define i1 @test4(i32 %X) { + %a = icmp ult i32 %X, 31 + %b = icmp slt i32 %X, 0 + %c = and i1 %a, %b + ret i1 %c +; CHECK: @test4 +; CHECK-NEXT: ret i1 false +} diff --git a/test/Transforms/InstCombine/bitcast-vec-uniform.ll b/test/Transforms/InstCombine/bitcast-vec-uniform.ll new file mode 100644 index 0000000..5975f1e --- /dev/null +++ b/test/Transforms/InstCombine/bitcast-vec-uniform.ll @@ -0,0 +1,70 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +; CHECK: @a +; CHECK-NOT: bitcast +; CHECK: ret +define <4 x i32> @a(<1 x i64> %y) { + %c = bitcast <2 x i64> <i64 0, i64 0> to <4 x i32> + ret <4 x i32> %c +} + +; CHECK: @b +; CHECK-NOT: bitcast +; CHECK: ret + +define <4 x i32> @b(<1 x i64> %y) { + %c = bitcast <2 x i64> <i64 -1, i64 -1> to <4 x i32> + ret <4 x i32> %c +} + +; CHECK: @foo +; CHECK-NOT: bitcast +; CHECK: ret + +; from MultiSource/Benchmarks/Bullet +define <2 x float> @foo() { + %cast = bitcast i64 -1 to <2 x float> + ret <2 x float> %cast +} + + +; CHECK: @foo2 +; CHECK-NOT: bitcast +; CHECK: ret +define <2 x double> @foo2() { + %cast = bitcast i128 -1 to <2 x double> + ret <2 x double> %cast +} + +; CHECK: @foo3 +; CHECK-NOT: bitcast +; CHECK: ret +define <1 x float> @foo3() { + %cast = bitcast i32 -1 to <1 x float> + ret <1 x float> %cast +} + +; CHECK: @foo4 +; CHECK-NOT: bitcast +; CHECK: ret +define float @foo4() { + %cast = bitcast <1 x i32 ><i32 -1> to float + ret float %cast +} + +; CHECK: @foo5 +; CHECK-NOT: bitcast +; CHECK: ret +define double @foo5() { + %cast = bitcast <2 x i32 ><i32 -1, i32 -1> to double + ret double %cast +} + + +; CHECK: @foo6 +; CHECK-NOT: bitcast +; CHECK: ret +define <2 x double> @foo6() { + %cast = bitcast <4 x i32><i32 -1, i32 -1, i32 -1, i32 -1> to <2 x double> + ret <2 x double> %cast +} diff --git a/test/Transforms/InstCombine/call.ll b/test/Transforms/InstCombine/call.ll index c256724..2ef8dc0 100644 --- a/test/Transforms/InstCombine/call.ll +++ b/test/Transforms/InstCombine/call.ll @@ -32,7 +32,7 @@ define i32 @test2(i32 %A) { ; Resolving this should insert a cast from sbyte to int, following the C ; promotion rules. -declare void @test3a(i8, ...) +define void @test3a(i8, ...) {unreachable } define void @test3(i8 %A, i8 %B) { call void bitcast (void (i8, ...)* @test3a to void (i8, i8)*)( i8 %A, i8 %B @@ -116,3 +116,17 @@ try.handler: ; preds = %entry ; CHECK: @test8() { ; CHECK-NEXT: invoke void @test8a() + + +; Don't turn this into a direct call, because test9x is just a prototype and +; doing so will make it varargs. +; rdar://9038601 +declare i8* @test9x(i8*, i8*, ...) noredzone +define i8* @test9(i8* %arg, i8* %tmp3) nounwind ssp noredzone { +entry: + %call = call i8* bitcast (i8* (i8*, i8*, ...)* @test9x to i8* (i8*, i8*)*)(i8* %arg, i8* %tmp3) noredzone + ret i8* %call +; CHECK: @test9( +; CHECK: call i8* bitcast +} + diff --git a/test/Transforms/InstCombine/cast.ll b/test/Transforms/InstCombine/cast.ll index 7547877..bc5e365 100644 --- a/test/Transforms/InstCombine/cast.ll +++ b/test/Transforms/InstCombine/cast.ll @@ -452,7 +452,7 @@ define i64 @test48(i8 %A, i8 %a) { ; CHECK: @test48 ; CHECK-NEXT: %b = zext i8 %a to i64 ; CHECK-NEXT: %B = zext i8 %A to i64 -; CHECK-NEXT: %C = shl i64 %B, 8 +; CHECK-NEXT: %C = shl nuw nsw i64 %B, 8 ; CHECK-NEXT: %D = or i64 %C, %b ; CHECK-NEXT: ret i64 %D } @@ -464,7 +464,7 @@ define i64 @test49(i64 %A) { ret i64 %D ; CHECK: @test49 ; CHECK-NEXT: %C = shl i64 %A, 32 -; CHECK-NEXT: ashr i64 %C, 32 +; CHECK-NEXT: ashr exact i64 %C, 32 ; CHECK-NEXT: %D = or i64 {{.*}}, 1 ; CHECK-NEXT: ret i64 %D } @@ -478,8 +478,8 @@ define i64 @test50(i64 %A) { ; CHECK: @test50 ; CHECK-NEXT: shl i64 %A, 30 ; CHECK-NEXT: add i64 {{.*}}, -4294967296 -; CHECK-NEXT: %E = ashr i64 {{.*}}, 32 -; CHECK-NEXT: ret i64 %E +; CHECK-NEXT: %sext = ashr i64 {{.*}}, 32 +; CHECK-NEXT: ret i64 %sext } define i64 @test51(i64 %A, i1 %cond) { diff --git a/test/Transforms/InstCombine/constant-fold-gep.ll b/test/Transforms/InstCombine/constant-fold-gep.ll index 4be1a9c..c679226 100644 --- a/test/Transforms/InstCombine/constant-fold-gep.ll +++ b/test/Transforms/InstCombine/constant-fold-gep.ll @@ -53,3 +53,22 @@ define void @frob() { store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 19), align 8 ret void } + + +; PR8883 - Constant fold exotic gep subtract +; CHECK: @test2 +@X = global [1000 x i8] zeroinitializer, align 16 + +define i64 @test2() { +entry: + %A = bitcast i8* getelementptr inbounds ([1000 x i8]* @X, i64 1, i64 0) to i8* + %B = bitcast i8* getelementptr inbounds ([1000 x i8]* @X, i64 0, i64 0) to i8* + + %B2 = ptrtoint i8* %B to i64 + %C = sub i64 0, %B2 + %D = getelementptr i8* %A, i64 %C + %E = ptrtoint i8* %D to i64 + + ret i64 %E + ; CHECK: ret i64 1000 +} diff --git a/test/Transforms/InstCombine/crash.ll b/test/Transforms/InstCombine/crash.ll index a600af0..e17774d 100644 --- a/test/Transforms/InstCombine/crash.ll +++ b/test/Transforms/InstCombine/crash.ll @@ -285,3 +285,88 @@ entry: store i32 %19, i32* undef, align 8 unreachable } + + +; PR8807 +declare i32 @test14f(i8* (i8*)*) nounwind + +define void @test14() nounwind readnone { +entry: + %tmp = bitcast i32 (i8* (i8*)*)* @test14f to i32 (i32*)* + %call10 = call i32 %tmp(i32* byval undef) + ret void +} + + +; PR8896 +@g_54 = external global [7 x i16] + +define void @test15(i32* %p_92) nounwind { +entry: +%0 = load i32* %p_92, align 4 +%1 = icmp ne i32 %0, 0 +%2 = zext i1 %1 to i32 +%3 = call i32 @func_14() nounwind +%4 = trunc i32 %3 to i16 +%5 = sext i16 %4 to i32 +%6 = trunc i32 %5 to i16 +br i1 undef, label %"3", label %"5" + +"3": ; preds = %entry +%7 = sext i16 %6 to i32 +%8 = ashr i32 %7, -1649554541 +%9 = trunc i32 %8 to i16 +br label %"5" + +"5": ; preds = %"3", %entry +%10 = phi i16 [ %9, %"3" ], [ %6, %entry ] +%11 = sext i16 %10 to i32 +%12 = xor i32 %2, %11 +%13 = sext i32 %12 to i64 +%14 = icmp ne i64 %13, 0 +br i1 %14, label %return, label %"7" + +"7": ; preds = %"5" +ret void + +return: ; preds = %"5" +ret void +} + +declare i32 @func_14() + + +define double @test16(i32 %a) nounwind { + %cmp = icmp slt i32 %a, 2 + %select = select i1 %cmp, double 2.000000e+00, double 3.141592e+00 + ret double %select +} + + +; PR8983 +%struct.basic_ios = type { i8 } + +define %struct.basic_ios *@test17() ssp { +entry: + %add.ptr.i = getelementptr i8* null, i64 undef + %0 = bitcast i8* %add.ptr.i to %struct.basic_ios* + ret %struct.basic_ios* %0 +} + +; PR9013 +define void @test18() nounwind ssp { +entry: + br label %for.cond + +for.cond: ; preds = %for.inc, %entry + %l_197.0 = phi i32 [ 0, %entry ], [ %sub.i, %for.inc ] + br label %for.inc + +for.inc: ; preds = %for.cond + %conv = and i32 %l_197.0, 255 + %sub.i = add nsw i32 %conv, -1 + br label %for.cond + +return: ; No predecessors! + ret void +} diff --git a/test/Transforms/InstCombine/div-cmp-overflow.ll b/test/Transforms/InstCombine/div-cmp-overflow.ll deleted file mode 100644 index 6f63adc..0000000 --- a/test/Transforms/InstCombine/div-cmp-overflow.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep sdiv -; PR2740 - -define i1 @func_75(i32 %i2) nounwind { - %i3 = sdiv i32 %i2, -1328634635 - %i4 = icmp eq i32 %i3, -1 - ret i1 %i4 -} diff --git a/test/Transforms/InstCombine/exact-sdiv.ll b/test/Transforms/InstCombine/exact-sdiv.ll deleted file mode 100644 index e567754..0000000 --- a/test/Transforms/InstCombine/exact-sdiv.ll +++ /dev/null @@ -1,52 +0,0 @@ -; RUN: opt < %s -instcombine -S | FileCheck %s - -; CHECK: define i32 @foo -; CHECK: sdiv i32 %x, 8 -define i32 @foo(i32 %x) { - %y = sdiv i32 %x, 8 - ret i32 %y -} - -; CHECK: define i32 @bar -; CHECK: ashr i32 %x, 3 -define i32 @bar(i32 %x) { - %y = sdiv exact i32 %x, 8 - ret i32 %y -} - -; CHECK: i32 @a0 -; CHECK: %y = srem i32 %x, 3 -; CHECK: %z = sub i32 %x, %y -; CHECK: ret i32 %z -define i32 @a0(i32 %x) { - %y = sdiv i32 %x, 3 - %z = mul i32 %y, 3 - ret i32 %z -} - -; CHECK: i32 @b0 -; CHECK: ret i32 %x -define i32 @b0(i32 %x) { - %y = sdiv exact i32 %x, 3 - %z = mul i32 %y, 3 - ret i32 %z -} - -; CHECK: i32 @a1 -; CHECK: %y = srem i32 %x, 3 -; CHECK: %z = sub i32 %y, %x -; CHECK: ret i32 %z -define i32 @a1(i32 %x) { - %y = sdiv i32 %x, 3 - %z = mul i32 %y, -3 - ret i32 %z -} - -; CHECK: i32 @b1 -; CHECK: %z = sub i32 0, %x -; CHECK: ret i32 %z -define i32 @b1(i32 %x) { - %y = sdiv exact i32 %x, 3 - %z = mul i32 %y, -3 - ret i32 %z -} diff --git a/test/Transforms/InstCombine/exact.ll b/test/Transforms/InstCombine/exact.ll new file mode 100644 index 0000000..58f8b5d --- /dev/null +++ b/test/Transforms/InstCombine/exact.ll @@ -0,0 +1,154 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +; CHECK: @sdiv1 +; CHECK: sdiv i32 %x, 8 +define i32 @sdiv1(i32 %x) { + %y = sdiv i32 %x, 8 + ret i32 %y +} + +; CHECK: @sdiv2 +; CHECK: ashr exact i32 %x, 3 +define i32 @sdiv2(i32 %x) { + %y = sdiv exact i32 %x, 8 + ret i32 %y +} + +; CHECK: @sdiv3 +; CHECK: %y = srem i32 %x, 3 +; CHECK: %z = sub i32 %x, %y +; CHECK: ret i32 %z +define i32 @sdiv3(i32 %x) { + %y = sdiv i32 %x, 3 + %z = mul i32 %y, 3 + ret i32 %z +} + +; CHECK: @sdiv4 +; CHECK: ret i32 %x +define i32 @sdiv4(i32 %x) { + %y = sdiv exact i32 %x, 3 + %z = mul i32 %y, 3 + ret i32 %z +} + +; CHECK: i32 @sdiv5 +; CHECK: %y = srem i32 %x, 3 +; CHECK: %z = sub i32 %y, %x +; CHECK: ret i32 %z +define i32 @sdiv5(i32 %x) { + %y = sdiv i32 %x, 3 + %z = mul i32 %y, -3 + ret i32 %z +} + +; CHECK: @sdiv6 +; CHECK: %z = sub i32 0, %x +; CHECK: ret i32 %z +define i32 @sdiv6(i32 %x) { + %y = sdiv exact i32 %x, 3 + %z = mul i32 %y, -3 + ret i32 %z +} + +; CHECK: @udiv1 +; CHECK: ret i32 %x +define i32 @udiv1(i32 %x, i32 %w) { + %y = udiv exact i32 %x, %w + %z = mul i32 %y, %w + ret i32 %z +} + +; CHECK: @udiv2 +; CHECK: %z = lshr exact i32 %x, %w +; CHECK: ret i32 %z +define i32 @udiv2(i32 %x, i32 %w) { + %y = shl i32 1, %w + %z = udiv exact i32 %x, %y + ret i32 %z +} + +; CHECK: @ashr1 +; CHECK: %B = ashr exact i64 %A, 2 +; CHECK: ret i64 %B +define i64 @ashr1(i64 %X) nounwind { + %A = shl i64 %X, 8 + %B = ashr i64 %A, 2 ; X/4 + ret i64 %B +} + +; PR9120 +; CHECK: @ashr_icmp1 +; CHECK: %B = icmp eq i64 %X, 0 +; CHECK: ret i1 %B +define i1 @ashr_icmp1(i64 %X) nounwind { + %A = ashr exact i64 %X, 2 ; X/4 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @ashr_icmp2 +; CHECK: %Z = icmp slt i64 %X, 16 +; CHECK: ret i1 %Z +define i1 @ashr_icmp2(i64 %X) nounwind { + %Y = ashr exact i64 %X, 2 ; x / 4 + %Z = icmp slt i64 %Y, 4 ; x < 16 + ret i1 %Z +} + +; CHECK: @udiv_icmp1 +; CHECK: icmp ne i64 %X, 0 +define i1 @udiv_icmp1(i64 %X) nounwind { + %A = udiv exact i64 %X, 5 ; X/5 + %B = icmp ne i64 %A, 0 + ret i1 %B +} + +; CHECK: @sdiv_icmp1 +; CHECK: icmp eq i64 %X, 0 +define i1 @sdiv_icmp1(i64 %X) nounwind { + %A = sdiv exact i64 %X, 5 ; X/5 == 0 --> x == 0 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @sdiv_icmp2 +; CHECK: icmp eq i64 %X, 5 +define i1 @sdiv_icmp2(i64 %X) nounwind { + %A = sdiv exact i64 %X, 5 ; X/5 == 1 --> x == 5 + %B = icmp eq i64 %A, 1 + ret i1 %B +} + +; CHECK: @sdiv_icmp3 +; CHECK: icmp eq i64 %X, -5 +define i1 @sdiv_icmp3(i64 %X) nounwind { + %A = sdiv exact i64 %X, 5 ; X/5 == -1 --> x == -5 + %B = icmp eq i64 %A, -1 + ret i1 %B +} + +; CHECK: @sdiv_icmp4 +; CHECK: icmp eq i64 %X, 0 +define i1 @sdiv_icmp4(i64 %X) nounwind { + %A = sdiv exact i64 %X, -5 ; X/-5 == 0 --> x == 0 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @sdiv_icmp5 +; CHECK: icmp eq i64 %X, -5 +define i1 @sdiv_icmp5(i64 %X) nounwind { + %A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == -5 + %B = icmp eq i64 %A, 1 + ret i1 %B +} + +; CHECK: @sdiv_icmp6 +; CHECK: icmp eq i64 %X, 5 +define i1 @sdiv_icmp6(i64 %X) nounwind { + %A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == 5 + %B = icmp eq i64 %A, -1 + ret i1 %B +} + diff --git a/test/Transforms/InstCombine/extractvalue.ll b/test/Transforms/InstCombine/extractvalue.ll index 875f860..64edc18 100644 --- a/test/Transforms/InstCombine/extractvalue.ll +++ b/test/Transforms/InstCombine/extractvalue.ll @@ -1,13 +1,16 @@ -; RUN: opt < %s -instcombine -S | not grep extractvalue +; RUN: opt < %s -instcombine -S | FileCheck %s -; Instcombine should fold various combinations of insertvalue and extractvalue -; together declare void @bar({i32, i32} %a) +declare i32 @baz(i32 %a) -define i32 @foo() { +; CHECK: define i32 @foo +; CHECK-NOT: extractvalue +define i32 @foo(i32 %a, i32 %b) { +; Instcombine should fold various combinations of insertvalue and extractvalue +; together ; Build a simple struct and pull values out again - %s1.1 = insertvalue {i32, i32} undef, i32 0, 0 - %s1 = insertvalue {i32, i32} %s1.1, i32 1, 1 + %s1.1 = insertvalue {i32, i32} undef, i32 %a, 0 + %s1 = insertvalue {i32, i32} %s1.1, i32 %b, 1 %v1 = extractvalue {i32, i32} %s1, 0 %v2 = extractvalue {i32, i32} %s1, 1 @@ -36,3 +39,69 @@ define i32 @foo() { ret i32 %v5 } +; CHECK: define i32 @extract2gep +; CHECK-NEXT: [[GEP:%[a-z0-9]+]] = getelementptr inbounds {{.*}}* %pair, i32 0, i32 1 +; CHECK-NEXT: [[LOAD:%[A-Za-z0-9]+]] = load i32* [[GEP]] +; CHECK-NEXT: store +; CHECK-NEXT: br label %loop +; CHECK-NOT: extractvalue +; CHECK: call {{.*}}(i32 [[LOAD]]) +; CHECK-NOT: extractvalue +; CHECK: ret i32 [[LOAD]] +define i32 @extract2gep({i32, i32}* %pair, i32* %P) { + ; The load + extractvalue should be converted + ; to an inbounds gep + smaller load. + ; The new load should be in the same spot as the old load. + %L = load {i32, i32}* %pair + store i32 0, i32* %P + br label %loop + +loop: + %E = extractvalue {i32, i32} %L, 1 + %C = call i32 @baz(i32 %E) + store i32 %C, i32* %P + %cond = icmp eq i32 %C, 0 + br i1 %cond, label %end, label %loop + +end: + ret i32 %E +} + +; CHECK: define i32 @doubleextract2gep +; CHECK-NEXT: [[GEP:%[a-z0-9]+]] = getelementptr inbounds {{.*}}* %arg, i32 0, i32 1, i32 1 +; CHECK-NEXT: [[LOAD:%[A-Za-z0-9]+]] = load i32* [[GEP]] +; CHECK-NEXT: ret i32 [[LOAD]] +define i32 @doubleextract2gep({i32, {i32, i32}}* %arg) { + ; The load + extractvalues should be converted + ; to a 3-index inbounds gep + smaller load. + %L = load {i32, {i32, i32}}* %arg + %E1 = extractvalue {i32, {i32, i32}} %L, 1 + %E2 = extractvalue {i32, i32} %E1, 1 + ret i32 %E2 +} + +; CHECK: define i32 @nogep-multiuse +; CHECK-NEXT: load {{.*}} %pair +; CHECK-NEXT: extractvalue +; CHECK-NEXT: extractvalue +; CHECK-NEXT: add +; CHECK-NEXT: ret +define i32 @nogep-multiuse({i32, i32}* %pair) { + ; The load should be left unchanged since both parts are needed. + %L = volatile load {i32, i32}* %pair + %LHS = extractvalue {i32, i32} %L, 0 + %RHS = extractvalue {i32, i32} %L, 1 + %R = add i32 %LHS, %RHS + ret i32 %R +} + +; CHECK: define i32 @nogep-volatile +; CHECK-NEXT: volatile load {{.*}} %pair +; CHECK-NEXT: extractvalue +; CHECK-NEXT: ret +define i32 @nogep-volatile({i32, i32}* %pair) { + ; The volatile load should be left unchanged. + %L = volatile load {i32, i32}* %pair + %E = extractvalue {i32, i32} %L, 1 + ret i32 %E +} diff --git a/test/Transforms/InstCombine/fold-vector-select.ll b/test/Transforms/InstCombine/fold-vector-select.ll new file mode 100644 index 0000000..3f22522 --- /dev/null +++ b/test/Transforms/InstCombine/fold-vector-select.ll @@ -0,0 +1,13 @@ +; RUN: opt < %s -instcombine -S | not grep select + +define void @foo(<4 x i32> *%A, <4 x i32> *%B, <4 x i32> *%C, <4 x i32> *%D) { + %r = select <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> <i32 1, i32 2, i32 3, i32 4>, <4 x i32> zeroinitializer + %g = select <4 x i1> <i1 false, i1 false, i1 false, i1 false>, <4 x i32> zeroinitializer, <4 x i32> <i32 3, i32 6, i32 9, i32 1> + %b = select <4 x i1> <i1 false, i1 true, i1 false, i1 true>, <4 x i32> zeroinitializer, <4 x i32> <i32 7, i32 1, i32 4, i32 9> + %a = select <4 x i1> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> <i32 3, i32 2, i32 8, i32 5> + store <4 x i32> %r, <4 x i32>* %A + store <4 x i32> %g, <4 x i32>* %B + store <4 x i32> %b, <4 x i32>* %C + store <4 x i32> %a, <4 x i32>* %D + ret void +} diff --git a/test/Transforms/InstCombine/icmp.ll b/test/Transforms/InstCombine/icmp.ll index 802957f..63f7631 100644 --- a/test/Transforms/InstCombine/icmp.ll +++ b/test/Transforms/InstCombine/icmp.ll @@ -1,5 +1,8 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s +target datalayout = +"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" + define i32 @test1(i32 %X) { entry: icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] @@ -154,3 +157,321 @@ entry: ; CHECK: @test16 ; CHECK: ret i1 undef } + +define i1 @test17(i32 %x) nounwind { + %shl = shl i32 1, %x + %and = and i32 %shl, 8 + %cmp = icmp eq i32 %and, 0 + ret i1 %cmp +; CHECK: @test17 +; CHECK-NEXT: %cmp = icmp ne i32 %x, 3 +} + + +define i1 @test18(i32 %x) nounwind { + %sh = lshr i32 8, %x + %and = and i32 %sh, 1 + %cmp = icmp eq i32 %and, 0 + ret i1 %cmp +; CHECK: @test18 +; CHECK-NEXT: %cmp = icmp ne i32 %x, 3 +} + +define i1 @test19(i32 %x) nounwind { + %shl = shl i32 1, %x + %and = and i32 %shl, 8 + %cmp = icmp eq i32 %and, 8 + ret i1 %cmp +; CHECK: @test19 +; CHECK-NEXT: %cmp = icmp eq i32 %x, 3 +} + +define i1 @test20(i32 %x) nounwind { + %shl = shl i32 1, %x + %and = and i32 %shl, 8 + %cmp = icmp ne i32 %and, 0 + ret i1 %cmp +; CHECK: @test20 +; CHECK-NEXT: %cmp = icmp eq i32 %x, 3 +} + +define i1 @test21(i8 %x, i8 %y) { +; CHECK: @test21 +; CHECK-NOT: or i8 +; CHECK: icmp ugt + %A = or i8 %x, 1 + %B = icmp ugt i8 %A, 3 + ret i1 %B +} + +define i1 @test22(i8 %x, i8 %y) { +; CHECK: @test22 +; CHECK-NOT: or i8 +; CHECK: icmp ult + %A = or i8 %x, 1 + %B = icmp ult i8 %A, 4 + ret i1 %B +} + +; PR2740 +; CHECK: @test23 +; CHECK: icmp sgt i32 %x, 1328634634 +define i1 @test23(i32 %x) nounwind { + %i3 = sdiv i32 %x, -1328634635 + %i4 = icmp eq i32 %i3, -1 + ret i1 %i4 +} + +@X = global [1000 x i32] zeroinitializer + +; PR8882 +; CHECK: @test24 +; CHECK: %cmp = icmp eq i64 %i, 1000 +; CHECK: ret i1 %cmp +define i1 @test24(i64 %i) { + %p1 = getelementptr inbounds i32* getelementptr inbounds ([1000 x i32]* @X, i64 0, i64 0), i64 %i + %cmp = icmp eq i32* %p1, getelementptr inbounds ([1000 x i32]* @X, i64 1, i64 0) + ret i1 %cmp +} + +; CHECK: @test25 +; X + Z > Y + Z -> X > Y if there is no overflow. +; CHECK: %c = icmp sgt i32 %x, %y +; CHECK: ret i1 %c +define i1 @test25(i32 %x, i32 %y, i32 %z) { + %lhs = add nsw i32 %x, %z + %rhs = add nsw i32 %y, %z + %c = icmp sgt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test26 +; X + Z > Y + Z -> X > Y if there is no overflow. +; CHECK: %c = icmp ugt i32 %x, %y +; CHECK: ret i1 %c +define i1 @test26(i32 %x, i32 %y, i32 %z) { + %lhs = add nuw i32 %x, %z + %rhs = add nuw i32 %y, %z + %c = icmp ugt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test27 +; X - Z > Y - Z -> X > Y if there is no overflow. +; CHECK: %c = icmp sgt i32 %x, %y +; CHECK: ret i1 %c +define i1 @test27(i32 %x, i32 %y, i32 %z) { + %lhs = sub nsw i32 %x, %z + %rhs = sub nsw i32 %y, %z + %c = icmp sgt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test28 +; X - Z > Y - Z -> X > Y if there is no overflow. +; CHECK: %c = icmp ugt i32 %x, %y +; CHECK: ret i1 %c +define i1 @test28(i32 %x, i32 %y, i32 %z) { + %lhs = sub nuw i32 %x, %z + %rhs = sub nuw i32 %y, %z + %c = icmp ugt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test29 +; X + Y > X -> Y > 0 if there is no overflow. +; CHECK: %c = icmp sgt i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test29(i32 %x, i32 %y) { + %lhs = add nsw i32 %x, %y + %c = icmp sgt i32 %lhs, %x + ret i1 %c +} + +; CHECK: @test30 +; X + Y > X -> Y > 0 if there is no overflow. +; CHECK: %c = icmp ne i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test30(i32 %x, i32 %y) { + %lhs = add nuw i32 %x, %y + %c = icmp ugt i32 %lhs, %x + ret i1 %c +} + +; CHECK: @test31 +; X > X + Y -> 0 > Y if there is no overflow. +; CHECK: %c = icmp slt i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test31(i32 %x, i32 %y) { + %rhs = add nsw i32 %x, %y + %c = icmp sgt i32 %x, %rhs + ret i1 %c +} + +; CHECK: @test32 +; X > X + Y -> 0 > Y if there is no overflow. +; CHECK: ret i1 false +define i1 @test32(i32 %x, i32 %y) { + %rhs = add nuw i32 %x, %y + %c = icmp ugt i32 %x, %rhs + ret i1 %c +} + +; CHECK: @test33 +; X - Y > X -> 0 > Y if there is no overflow. +; CHECK: %c = icmp slt i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test33(i32 %x, i32 %y) { + %lhs = sub nsw i32 %x, %y + %c = icmp sgt i32 %lhs, %x + ret i1 %c +} + +; CHECK: @test34 +; X - Y > X -> 0 > Y if there is no overflow. +; CHECK: ret i1 false +define i1 @test34(i32 %x, i32 %y) { + %lhs = sub nuw i32 %x, %y + %c = icmp ugt i32 %lhs, %x + ret i1 %c +} + +; CHECK: @test35 +; X > X - Y -> Y > 0 if there is no overflow. +; CHECK: %c = icmp sgt i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test35(i32 %x, i32 %y) { + %rhs = sub nsw i32 %x, %y + %c = icmp sgt i32 %x, %rhs + ret i1 %c +} + +; CHECK: @test36 +; X > X - Y -> Y > 0 if there is no overflow. +; CHECK: %c = icmp ne i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test36(i32 %x, i32 %y) { + %rhs = sub nuw i32 %x, %y + %c = icmp ugt i32 %x, %rhs + ret i1 %c +} + +; CHECK: @test37 +; X - Y > X - Z -> Z > Y if there is no overflow. +; CHECK: %c = icmp sgt i32 %z, %y +; CHECK: ret i1 %c +define i1 @test37(i32 %x, i32 %y, i32 %z) { + %lhs = sub nsw i32 %x, %y + %rhs = sub nsw i32 %x, %z + %c = icmp sgt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test38 +; X - Y > X - Z -> Z > Y if there is no overflow. +; CHECK: %c = icmp ugt i32 %z, %y +; CHECK: ret i1 %c +define i1 @test38(i32 %x, i32 %y, i32 %z) { + %lhs = sub nuw i32 %x, %y + %rhs = sub nuw i32 %x, %z + %c = icmp ugt i32 %lhs, %rhs + ret i1 %c +} + +; PR9343 #1 +; CHECK: @test39 +; CHECK %B = icmp eq i32 %X, 0 +define i1 @test39(i32 %X, i32 %Y) { + %A = ashr exact i32 %X, %Y + %B = icmp eq i32 %A, 0 + ret i1 %B +} + +; CHECK: @test40 +; CHECK: %B = icmp ne i32 %X, 0 +define i1 @test40(i32 %X, i32 %Y) { + %A = lshr exact i32 %X, %Y + %B = icmp ne i32 %A, 0 + ret i1 %B +} + +; PR9343 #3 +; CHECK: @test41 +; CHECK: ret i1 true +define i1 @test41(i32 %X, i32 %Y) { + %A = urem i32 %X, %Y + %B = icmp ugt i32 %Y, %A + ret i1 %B +} + +; CHECK: @test42 +; CHECK: %B = icmp sgt i32 %Y, -1 +define i1 @test42(i32 %X, i32 %Y) { + %A = srem i32 %X, %Y + %B = icmp slt i32 %A, %Y + ret i1 %B +} + +; CHECK: @test43 +; CHECK: %B = icmp slt i32 %Y, 0 +define i1 @test43(i32 %X, i32 %Y) { + %A = srem i32 %X, %Y + %B = icmp slt i32 %Y, %A + ret i1 %B +} + +; CHECK: @test44 +; CHECK: %B = icmp sgt i32 %Y, -1 +define i1 @test44(i32 %X, i32 %Y) { + %A = srem i32 %X, %Y + %B = icmp slt i32 %A, %Y + ret i1 %B +} + +; CHECK: @test45 +; CHECK: %B = icmp slt i32 %Y, 0 +define i1 @test45(i32 %X, i32 %Y) { + %A = srem i32 %X, %Y + %B = icmp slt i32 %Y, %A + ret i1 %B +} + +; PR9343 #4 +; CHECK: @test46 +; CHECK: %C = icmp ult i32 %X, %Y +define i1 @test46(i32 %X, i32 %Y, i32 %Z) { + %A = ashr exact i32 %X, %Z + %B = ashr exact i32 %Y, %Z + %C = icmp ult i32 %A, %B + ret i1 %C +} + +; PR9343 #5 +; CHECK: @test47 +; CHECK: %C = icmp ugt i32 %X, %Y +define i1 @test47(i32 %X, i32 %Y, i32 %Z) { + %A = ashr exact i32 %X, %Z + %B = ashr exact i32 %Y, %Z + %C = icmp ugt i32 %A, %B + ret i1 %C +} + +; PR9343 #8 +; CHECK: @test48 +; CHECK: %C = icmp eq i32 %X, %Y +define i1 @test48(i32 %X, i32 %Y, i32 %Z) { + %A = sdiv exact i32 %X, %Z + %B = sdiv exact i32 %Y, %Z + %C = icmp eq i32 %A, %B + ret i1 %C +} + +; PR8469 +; CHECK: @test49 +; CHECK: ret <2 x i1> <i1 true, i1 true> +define <2 x i1> @test49(<2 x i32> %tmp3) { +entry: + %tmp11 = and <2 x i32> %tmp3, <i32 3, i32 3> + %cmp = icmp ult <2 x i32> %tmp11, <i32 4, i32 4> + ret <2 x i1> %cmp +} diff --git a/test/Transforms/InstCombine/intrinsics.ll b/test/Transforms/InstCombine/intrinsics.ll index d672d8c..50e7f1f 100644 --- a/test/Transforms/InstCombine/intrinsics.ll +++ b/test/Transforms/InstCombine/intrinsics.ll @@ -71,6 +71,25 @@ define i8 @uaddtest5(i8 %A, i1* %overflowPtr) { ; CHECK: ret i8 %A } +define i1 @uaddtest6(i8 %A, i8 %B) { + %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 -4) + %z = extractvalue %overflow.result %x, 1 + ret i1 %z +; CHECK: @uaddtest6 +; CHECK-NEXT: %z = icmp ugt i8 %A, 3 +; CHECK-NEXT: ret i1 %z +} + +define i8 @uaddtest7(i8 %A, i8 %B) { + %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B) + %z = extractvalue %overflow.result %x, 0 + ret i8 %z +; CHECK: @uaddtest7 +; CHECK-NEXT: %z = add i8 %A, %B +; CHECK-NEXT: ret i8 %z +} + + define i8 @umultest1(i8 %A, i1* %overflowPtr) { %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 0, i8 %A) %y = extractvalue %overflow.result %x, 0 diff --git a/test/Transforms/InstCombine/memset2.ll b/test/Transforms/InstCombine/memset2.ll new file mode 100644 index 0000000..87639f0 --- /dev/null +++ b/test/Transforms/InstCombine/memset2.ll @@ -0,0 +1,15 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +; Test to check that instcombine doesn't drop the address space when optimizing +; memset. +%struct.Moves = type { [9 x i8], i8, i8, i8, [5 x i8] } + +define i32 @test(%struct.Moves addrspace(1)* nocapture %moves) { +entry: +; CHECK: bitcast i8 addrspace(1)* %gep to i64 addrspace(1)* + %gep = getelementptr inbounds %struct.Moves addrspace(1)* %moves, i32 1, i32 0, i32 9 + call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %gep, i8 0, i64 8, i32 1, i1 false) + ret i32 0 +} + +declare void @llvm.memset.p1i8.i64(i8addrspace(1)* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/Transforms/InstCombine/nsw.ll b/test/Transforms/InstCombine/nsw.ll index 821cebe..681bdc2 100644 --- a/test/Transforms/InstCombine/nsw.ll +++ b/test/Transforms/InstCombine/nsw.ll @@ -1,20 +1,39 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s -; CHECK: define i32 @foo -; %y = sub i32 0, %x -; %z = sdiv i32 %y, 337 -; ret i32 %y -define i32 @foo(i32 %x) { +; CHECK: @sub1 +; CHECK: %y = sub i32 0, %x +; CHECK: %z = sdiv i32 %y, 337 +; CHECK: ret i32 %z +define i32 @sub1(i32 %x) { %y = sub i32 0, %x %z = sdiv i32 %y, 337 - ret i32 %y + ret i32 %z } -; CHECK: define i32 @bar -; %y = sdiv i32 %x, -337 -; ret i32 %y -define i32 @bar(i32 %x) { +; CHECK: @sub2 +; CHECK: %z = sdiv i32 %x, -337 +; CHECK: ret i32 %z +define i32 @sub2(i32 %x) { %y = sub nsw i32 0, %x %z = sdiv i32 %y, 337 - ret i32 %y + ret i32 %z +} + +; CHECK: @shl_icmp +; CHECK: %B = icmp eq i64 %X, 0 +; CHECK: ret i1 %B +define i1 @shl_icmp(i64 %X) nounwind { + %A = shl nuw i64 %X, 2 ; X/4 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @shl1 +; CHECK: %B = shl nuw nsw i64 %A, 8 +; CHECK: ret i64 %B +define i64 @shl1(i64 %X, i64* %P) nounwind { + %A = and i64 %X, 312 + store i64 %A, i64* %P ; multiple uses of A. + %B = shl i64 %A, 8 + ret i64 %B } diff --git a/test/Transforms/InstCombine/objsize.ll b/test/Transforms/InstCombine/objsize.ll index 664701b..043525b 100644 --- a/test/Transforms/InstCombine/objsize.ll +++ b/test/Transforms/InstCombine/objsize.ll @@ -150,3 +150,13 @@ declare i8* @__memset_chk(i8*, i32, i32, i32) nounwind declare noalias i8* @malloc(i32) nounwind declare i32 @llvm.objectsize.i32(i8*, i1) nounwind readonly + +define i32 @test7() { +; CHECK: @test7 + %alloc = call noalias i8* @malloc(i32 48) nounwind + %gep = getelementptr inbounds i8* %alloc, i32 16 + %objsize = call i32 @llvm.objectsize.i32(i8* %gep, i1 false) nounwind readonly +; CHECK-NEXT: ret i32 32 + ret i32 %objsize +} + diff --git a/test/Transforms/InstCombine/or-fcmp.ll b/test/Transforms/InstCombine/or-fcmp.ll index 9692bfc..09a3c99 100644 --- a/test/Transforms/InstCombine/or-fcmp.ll +++ b/test/Transforms/InstCombine/or-fcmp.ll @@ -1,34 +1,58 @@ -; RUN: opt < %s -instcombine -S | grep fcmp | count 3 -; RUN: opt < %s -instcombine -S | grep ret | grep 1 +; RUN: opt < %s -instcombine -S | FileCheck %s +; CHECK: @t1 define zeroext i8 @t1(float %x, float %y) nounwind { %a = fcmp ueq float %x, %y ; <i1> [#uses=1] %b = fcmp uno float %x, %y ; <i1> [#uses=1] %c = or i1 %a, %b +; CHECK-NOT: fcmp uno +; CHECK: fcmp ueq %retval = zext i1 %c to i8 ret i8 %retval } +; CHECK: @t2 define zeroext i8 @t2(float %x, float %y) nounwind { %a = fcmp olt float %x, %y ; <i1> [#uses=1] %b = fcmp oeq float %x, %y ; <i1> [#uses=1] +; CHECK-NOT: fcmp olt +; CHECK-NOT: fcmp oeq +; CHECK: fcmp ole %c = or i1 %a, %b %retval = zext i1 %c to i8 ret i8 %retval } +; CHECK: @t3 define zeroext i8 @t3(float %x, float %y) nounwind { %a = fcmp ult float %x, %y ; <i1> [#uses=1] %b = fcmp uge float %x, %y ; <i1> [#uses=1] %c = or i1 %a, %b %retval = zext i1 %c to i8 +; CHECK: ret i8 1 ret i8 %retval } +; CHECK: @t4 define zeroext i8 @t4(float %x, float %y) nounwind { %a = fcmp ult float %x, %y ; <i1> [#uses=1] %b = fcmp ugt float %x, %y ; <i1> [#uses=1] %c = or i1 %a, %b +; CHECK-NOT: fcmp ult +; CHECK-NOT: fcmp ugt +; CHECK: fcmp une + %retval = zext i1 %c to i8 + ret i8 %retval +} + +; CHECK: @t5 +define zeroext i8 @t5(float %x, float %y) nounwind { + %a = fcmp olt float %x, %y ; <i1> [#uses=1] + %b = fcmp oge float %x, %y ; <i1> [#uses=1] + %c = or i1 %a, %b +; CHECK-NOT: fcmp olt +; CHECK-NOT: fcmp oge +; CHECK: fcmp ord %retval = zext i1 %c to i8 ret i8 %retval } diff --git a/test/Transforms/InstCombine/or-xor.ll b/test/Transforms/InstCombine/or-xor.ll new file mode 100644 index 0000000..f496dd4 --- /dev/null +++ b/test/Transforms/InstCombine/or-xor.ll @@ -0,0 +1,94 @@ +; RUN: opt -S -instcombine < %s | FileCheck %s + +define i32 @test1(i32 %x, i32 %y) nounwind { + %or = or i32 %x, %y + %not = xor i32 %or, -1 + %z = or i32 %x, %not + ret i32 %z +; CHECK: @test1 +; CHECK-NEXT: %y.not = xor i32 %y, -1 +; CHECK-NEXT: %z = or i32 %y.not, %x +; CHECK-NEXT: ret i32 %z +} + +define i32 @test2(i32 %x, i32 %y) nounwind { + %or = or i32 %x, %y + %not = xor i32 %or, -1 + %z = or i32 %y, %not + ret i32 %z +; CHECK: @test2 +; CHECK-NEXT: %x.not = xor i32 %x, -1 +; CHECK-NEXT: %z = or i32 %x.not, %y +; CHECK-NEXT: ret i32 %z +} + +define i32 @test3(i32 %x, i32 %y) nounwind { + %xor = xor i32 %x, %y + %not = xor i32 %xor, -1 + %z = or i32 %x, %not + ret i32 %z +; CHECK: @test3 +; CHECK-NEXT: %y.not = xor i32 %y, -1 +; CHECK-NEXT: %z = or i32 %y.not, %x +; CHECK-NEXT: ret i32 %z +} + +define i32 @test4(i32 %x, i32 %y) nounwind { + %xor = xor i32 %x, %y + %not = xor i32 %xor, -1 + %z = or i32 %y, %not + ret i32 %z +; CHECK: @test4 +; CHECK-NEXT: %x.not = xor i32 %x, -1 +; CHECK-NEXT: %z = or i32 %x.not, %y +; CHECK-NEXT: ret i32 %z +} + +define i32 @test5(i32 %x, i32 %y) nounwind { + %and = and i32 %x, %y + %not = xor i32 %and, -1 + %z = or i32 %x, %not + ret i32 %z +; CHECK: @test5 +; CHECK-NEXT: ret i32 -1 +} + +define i32 @test6(i32 %x, i32 %y) nounwind { + %and = and i32 %x, %y + %not = xor i32 %and, -1 + %z = or i32 %y, %not + ret i32 %z +; CHECK: @test6 +; CHECK-NEXT: ret i32 -1 +} + +define i32 @test7(i32 %x, i32 %y) nounwind { + %xor = xor i32 %x, %y + %z = or i32 %y, %xor + ret i32 %z +; CHECK: @test7 +; CHECK-NEXT: %z = or i32 %x, %y +; CHECK-NEXT: ret i32 %z +} + +define i32 @test8(i32 %x, i32 %y) nounwind { + %not = xor i32 %y, -1 + %xor = xor i32 %x, %not + %z = or i32 %y, %xor + ret i32 %z +; CHECK: @test8 +; CHECK-NEXT: %x.not = xor i32 %x, -1 +; CHECK-NEXT: %z = or i32 %x.not, %y +; CHECK-NEXT: ret i32 %z +} + +define i32 @test9(i32 %x, i32 %y) nounwind { + %not = xor i32 %x, -1 + %xor = xor i32 %not, %y + %z = or i32 %x, %xor + ret i32 %z +; CHECK: @test9 +; CHECK-NEXT: %y.not = xor i32 %y, -1 +; CHECK-NEXT: %z = or i32 %y.not, %x +; CHECK-NEXT: ret i32 %z +} diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll index 500cad2..f82f9fa 100644 --- a/test/Transforms/InstCombine/or.ll +++ b/test/Transforms/InstCombine/or.ll @@ -376,3 +376,17 @@ define i32 @test35(i32 %a, i32 %b) { ; CHECK-NEXT: or i32 %a, %b ; CHECK-NEXT: or i32 %1, 1135 } + +define i1 @test36(i32 %x) { + %cmp1 = icmp eq i32 %x, 23 + %cmp2 = icmp eq i32 %x, 24 + %ret1 = or i1 %cmp1, %cmp2 + %cmp3 = icmp eq i32 %x, 25 + %ret2 = or i1 %ret1, %cmp3 + ret i1 %ret2 +; CHECK: @test36 +; CHECK-NEXT: %x.off = add i32 %x, -23 +; CHECK-NEXT: icmp ult i32 %x.off, 3 +; CHECK-NEXT: ret i1 +} + diff --git a/test/Transforms/InstCombine/overflow.ll b/test/Transforms/InstCombine/overflow.ll new file mode 100644 index 0000000..9123283 --- /dev/null +++ b/test/Transforms/InstCombine/overflow.ll @@ -0,0 +1,133 @@ +; RUN: opt -S -instcombine < %s | FileCheck %s +; <rdar://problem/8558713> + +declare void @throwAnExceptionOrWhatever() + +; CHECK: @test1 +define i32 @test1(i32 %a, i32 %b) nounwind ssp { +entry: +; CHECK-NOT: sext + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %add = add nsw i64 %conv2, %conv + %add.off = add i64 %add, 2147483648 +; CHECK: llvm.sadd.with.overflow.i32 + %0 = icmp ugt i64 %add.off, 4294967295 + br i1 %0, label %if.then, label %if.end + +if.then: + tail call void @throwAnExceptionOrWhatever() nounwind + br label %if.end + +if.end: +; CHECK-NOT: trunc + %conv9 = trunc i64 %add to i32 +; CHECK: ret i32 + ret i32 %conv9 +} + +; CHECK: @test2 +; This form should not be promoted for two reasons: 1) it is unprofitable to +; promote it since the add.off instruction has another use, and 2) it is unsafe +; because the add-with-off makes the high bits of the original add live. +define i32 @test2(i32 %a, i32 %b, i64* %P) nounwind ssp { +entry: + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %add = add nsw i64 %conv2, %conv + %add.off = add i64 %add, 2147483648 + + store i64 %add.off, i64* %P + +; CHECK-NOT: llvm.sadd.with.overflow + %0 = icmp ugt i64 %add.off, 4294967295 + br i1 %0, label %if.then, label %if.end + +if.then: + tail call void @throwAnExceptionOrWhatever() nounwind + br label %if.end + +if.end: + %conv9 = trunc i64 %add to i32 +; CHECK: ret i32 + ret i32 %conv9 +} + +; CHECK: test3 +; PR8816 +; This is illegal to transform because the high bits of the original add are +; live out. +define i64 @test3(i32 %a, i32 %b) nounwind ssp { +entry: + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %add = add nsw i64 %conv2, %conv + %add.off = add i64 %add, 2147483648 +; CHECK-NOT: llvm.sadd.with.overflow + %0 = icmp ugt i64 %add.off, 4294967295 + br i1 %0, label %if.then, label %if.end + +if.then: + tail call void @throwAnExceptionOrWhatever() nounwind + br label %if.end + +if.end: + ret i64 %add +; CHECK: ret i64 +} + +; CHECK: @test4 +; Should be able to form an i8 sadd computed in an i32. +define zeroext i8 @test4(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %conv = sext i8 %a to i32 + %conv2 = sext i8 %b to i32 + %add = add nsw i32 %conv2, %conv + %add4 = add nsw i32 %add, 128 + %cmp = icmp ugt i32 %add4, 255 + br i1 %cmp, label %if.then, label %if.end +; CHECK: llvm.sadd.with.overflow.i8 +if.then: ; preds = %entry + tail call void @throwAnExceptionOrWhatever() nounwind + unreachable + +if.end: ; preds = %entry + %conv7 = trunc i32 %add to i8 + ret i8 %conv7 +; CHECK: ret i8 +} + +; CHECK: @test5 +; CHECK: llvm.uadd.with.overflow +; CHECK: ret i64 +define i64 @test5(i64 %a, i64 %b) nounwind ssp { +entry: + %add = add i64 %b, %a + %cmp = icmp ult i64 %add, %a + %Q = select i1 %cmp, i64 %b, i64 42 + ret i64 %Q +} + +; CHECK: @test6 +; CHECK: llvm.uadd.with.overflow +; CHECK: ret i64 +define i64 @test6(i64 %a, i64 %b) nounwind ssp { +entry: + %add = add i64 %b, %a + %cmp = icmp ult i64 %add, %b + %Q = select i1 %cmp, i64 %b, i64 42 + ret i64 %Q +} + +; CHECK: @test7 +; CHECK: llvm.uadd.with.overflow +; CHECK: ret i64 +define i64 @test7(i64 %a, i64 %b) nounwind ssp { +entry: + %add = add i64 %b, %a + %cmp = icmp ugt i64 %b, %add + %Q = select i1 %cmp, i64 %b, i64 42 + ret i64 %Q +} + + diff --git a/test/Transforms/InstCombine/phi.ll b/test/Transforms/InstCombine/phi.ll index c3e034f..62c6a63 100644 --- a/test/Transforms/InstCombine/phi.ll +++ b/test/Transforms/InstCombine/phi.ll @@ -125,7 +125,7 @@ Exit: ; preds = %Loop define i32* @test8({ i32, i32 } *%A, i1 %b) { BB0: - %X = getelementptr { i32, i32 } *%A, i32 0, i32 1 + %X = getelementptr inbounds { i32, i32 } *%A, i32 0, i32 1 br i1 %b, label %BB1, label %BB2 BB1: @@ -139,7 +139,7 @@ BB2: ; CHECK: @test8 ; CHECK-NOT: phi ; CHECK: BB2: -; CHECK-NEXT: %B = getelementptr +; CHECK-NEXT: %B = getelementptr %0 ; CHECK-NEXT: ret i32* %B } @@ -488,3 +488,59 @@ ret: ; CHECK: @test21 ; CHECK: ret i1 false } + +define void @test22() { +; CHECK: @test22 +entry: + br label %loop +loop: + %phi = phi i32 [ 0, %entry ], [ %y, %loop ] + %y = add i32 %phi, 1 + %o = or i32 %y, %phi + %e = icmp eq i32 %o, %y + br i1 %e, label %loop, label %ret +; CHECK: br i1 %e +ret: + ret void +} + +define i32 @test23(i32 %A, i1 %b, i32 * %P) { +BB0: + br label %Loop + +Loop: ; preds = %Loop, %BB0 + ; PHI has same value always. + %B = phi i32 [ %A, %BB0 ], [ 42, %Loop ] + %D = add i32 %B, 19 + store i32 %D, i32* %P + br i1 %b, label %Loop, label %Exit + +Exit: ; preds = %Loop + %E = add i32 %B, 19 + ret i32 %E +; CHECK: @test23 +; CHECK: %phitmp = add i32 %A, 19 +; CHECK: Loop: +; CHECK-NEXT: %B = phi i32 [ %phitmp, %BB0 ], [ 61, %Loop ] +; CHECK: Exit: +; CHECK-NEXT: ret i32 %B +} + +define i32 @test24(i32 %A, i1 %cond) { +BB0: + %X = add nuw nsw i32 %A, 1 + br i1 %cond, label %BB1, label %BB2 + +BB1: + %Y = add nuw i32 %A, 1 + br label %BB2 + +BB2: + %C = phi i32 [ %X, %BB0 ], [ %Y, %BB1 ] + ret i32 %C +; CHECK: @test24 +; CHECK-NOT: phi +; CHECK: BB2: +; CHECK-NEXT: %C = add nuw i32 %A, 1 +; CHECK-NEXT: ret i32 %C +} diff --git a/test/Transforms/InstCombine/pr8547.ll b/test/Transforms/InstCombine/pr8547.ll index f26035c..485f4d9 100644 --- a/test/Transforms/InstCombine/pr8547.ll +++ b/test/Transforms/InstCombine/pr8547.ll @@ -15,7 +15,7 @@ for.cond: ; preds = %for.cond, %codeRepl store i32 %storemerge, i32* @g_2, align 4 %shl = shl i32 %storemerge, 30 %conv2 = lshr i32 %shl, 24 -; CHECK: %0 = shl i32 %storemerge, 6 +; CHECK: %0 = shl nuw nsw i32 %storemerge, 6 ; CHECK: %conv2 = and i32 %0, 64 %tobool = icmp eq i32 %conv2, 0 br i1 %tobool, label %for.cond, label %codeRepl2 diff --git a/test/Transforms/InstCombine/rem.ll b/test/Transforms/InstCombine/rem.ll index bac248e..b421b7c 100644 --- a/test/Transforms/InstCombine/rem.ll +++ b/test/Transforms/InstCombine/rem.ll @@ -81,3 +81,8 @@ define i32 @test12(i32 %i) { %tmp.5 = srem i32 %tmp.1, 2 ret i32 %tmp.5 } + +define i32 @test13(i32 %i) { + %x = srem i32 %i, %i + ret i32 %x +} diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll index 120d158..ba9d99c 100644 --- a/test/Transforms/InstCombine/select.ll +++ b/test/Transforms/InstCombine/select.ll @@ -223,6 +223,81 @@ define i32 @test15d(i32 %X) { ; CHECK: ret i32 %t1 } +;; (a & 128) ? 256 : 0 +define i32 @test15e(i32 %X) { + %t1 = and i32 %X, 128 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 256, i32 0 + ret i32 %t3 +; CHECK: @test15e +; CHECK: %t1 = shl i32 %X, 1 +; CHECK: and i32 %t1, 256 +; CHECK: ret i32 +} + +;; (a & 128) ? 0 : 256 +define i32 @test15f(i32 %X) { + %t1 = and i32 %X, 128 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 0, i32 256 + ret i32 %t3 +; CHECK: @test15f +; CHECK: %t1 = shl i32 %X, 1 +; CHECK: and i32 %t1, 256 +; CHECK: xor i32 %{{.*}}, 256 +; CHECK: ret i32 +} + +;; (a & 8) ? -1 : -9 +define i32 @test15g(i32 %X) { + %t1 = and i32 %X, 8 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 -1, i32 -9 + ret i32 %t3 +; CHECK: @test15g +; CHECK-NEXT: %1 = or i32 %X, -9 +; CHECK-NEXT: ret i32 %1 +} + +;; (a & 8) ? -9 : -1 +define i32 @test15h(i32 %X) { + %t1 = and i32 %X, 8 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 -9, i32 -1 + ret i32 %t3 +; CHECK: @test15h +; CHECK-NEXT: %1 = or i32 %X, -9 +; CHECK-NEXT: %2 = xor i32 %1, 8 +; CHECK-NEXT: ret i32 %2 +} + +;; (a & 2) ? 577 : 1089 +define i32 @test15i(i32 %X) { + %t1 = and i32 %X, 2 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 577, i32 1089 + ret i32 %t3 +; CHECK: @test15i +; CHECK-NEXT: %t1 = shl i32 %X, 8 +; CHECK-NEXT: %1 = and i32 %t1, 512 +; CHECK-NEXT: %2 = xor i32 %1, 512 +; CHECK-NEXT: %3 = add i32 %2, 577 +; CHECK-NEXT: ret i32 %3 +} + +;; (a & 2) ? 1089 : 577 +define i32 @test15j(i32 %X) { + %t1 = and i32 %X, 2 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 1089, i32 577 + ret i32 %t3 +; CHECK: @test15j +; CHECK-NEXT: %t1 = shl i32 %X, 8 +; CHECK-NEXT: %1 = and i32 %t1, 512 +; CHECK-NEXT: %2 = add i32 %1, 577 +; CHECK-NEXT: ret i32 %2 +} + define i32 @test16(i1 %C, i32* %P) { %P2 = select i1 %C, i32* %P, i32* null %V = load i32* %P2 @@ -506,6 +581,136 @@ define i32 @test41(i1 %cond, i32 %x, i32 %y) { %r = and i32 %x, %s ret i32 %r ; CHECK: @test41 -; CHECK: %r = and i32 %x, %y -; CHECK: ret i32 %r +; CHECK-NEXT: and i32 %x, %y +; CHECK-NEXT: ret i32 +} + +define i32 @test42(i32 %x, i32 %y) { + %b = add i32 %y, -1 + %cond = icmp eq i32 %x, 0 + %c = select i1 %cond, i32 %b, i32 %y + ret i32 %c +; CHECK: @test42 +; CHECK-NEXT: %cond = icmp eq i32 %x, 0 +; CHECK-NEXT: %b = sext i1 %cond to i32 +; CHECK-NEXT: %c = add i32 %b, %y +; CHECK-NEXT: ret i32 %c +} + +define i64 @test43(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonnegative = icmp sgt i32 %a, -1 + %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 0 + ret i64 %max +; CHECK: @test43 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonnegative = icmp slt i64 %a_ext, 0 +; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 0, i64 %a_ext +; CHECK-NEXT: ret i64 %max +} + +define i64 @test44(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonpositive = icmp slt i32 %a, 1 + %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 0 + ret i64 %min +; CHECK: @test44 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp sgt i64 %a_ext, 0 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 0, i64 %a_ext +; CHECK-NEXT: ret i64 %min +} +define i64 @test45(i32 %a) nounwind { + %a_ext = zext i32 %a to i64 + %is_a_nonnegative = icmp ugt i32 %a, 2 + %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3 + ret i64 %max +; CHECK: @test45 +; CHECK-NEXT: %a_ext = zext i32 %a to i64 +; CHECK-NEXT: %is_a_nonnegative = icmp ult i64 %a_ext, 3 +; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext +; CHECK-NEXT: ret i64 %max +} + +define i64 @test46(i32 %a) nounwind { + %a_ext = zext i32 %a to i64 + %is_a_nonpositive = icmp ult i32 %a, 3 + %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 + ret i64 %min +; CHECK: @test46 +; CHECK-NEXT: %a_ext = zext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext +; CHECK-NEXT: ret i64 %min +} +define i64 @test47(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonnegative = icmp ugt i32 %a, 2 + %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3 + ret i64 %max +; CHECK: @test47 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonnegative = icmp ult i64 %a_ext, 3 +; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext +; CHECK-NEXT: ret i64 %max +} + +define i64 @test48(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonpositive = icmp ult i32 %a, 3 + %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 + ret i64 %min +; CHECK: @test48 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext +; CHECK-NEXT: ret i64 %min +} + +define i64 @test49(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonpositive = icmp ult i32 %a, 3 + %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext + ret i64 %min +; CHECK: @test49 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 +; CHECK-NEXT: ret i64 %min +} +define i64 @test50(i32 %a) nounwind { + %is_a_nonpositive = icmp ult i32 %a, 3 + %a_ext = sext i32 %a to i64 + %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext + ret i64 %min +; CHECK: @test50 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 +; CHECK-NEXT: ret i64 %min +} + +; PR8994 + +; This select instruction can't be eliminated because trying to do so would +; change the number of vector elements. This used to assert. +define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) { +; CHECK: @test51 + %select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp +; CHECK: select <3 x i1> + %tmp2 = bitcast <3 x i16> %select to i48 + ret i48 %tmp2 +} + +; PR8575 + +define i32 @test52(i32 %n, i32 %m) nounwind { +; CHECK: @test52 + %cmp = icmp sgt i32 %n, %m + %. = select i1 %cmp, i32 1, i32 3 + %add = add nsw i32 %., 3 + %storemerge = select i1 %cmp, i32 %., i32 %add +; CHECK: select i1 %cmp, i32 1, i32 6 + ret i32 %storemerge } + diff --git a/test/Transforms/InstCombine/sext.ll b/test/Transforms/InstCombine/sext.ll index 6deee1f..60669b7 100644 --- a/test/Transforms/InstCombine/sext.ll +++ b/test/Transforms/InstCombine/sext.ll @@ -110,7 +110,7 @@ entry: ret i32 %b ; CHECK: @test10 ; CHECK: shl i32 %i, 30 -; CHECK-NEXT: ashr i32 +; CHECK-NEXT: ashr exact i32 ; CHECK-NEXT: ret i32 } diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll index 871e9fe..7fab1d2 100644 --- a/test/Transforms/InstCombine/shift.ll +++ b/test/Transforms/InstCombine/shift.ll @@ -35,18 +35,32 @@ define i32 @test4(i8 %A) { define i32 @test5(i32 %A) { ; CHECK: @test5 -; CHECK: ret i32 0 +; CHECK: ret i32 undef %B = lshr i32 %A, 32 ;; shift all bits out ret i32 %B } define i32 @test5a(i32 %A) { ; CHECK: @test5a -; CHECK: ret i32 0 +; CHECK: ret i32 undef %B = shl i32 %A, 32 ;; shift all bits out ret i32 %B } +define i32 @test5b() { +; CHECK: @test5b +; CHECK: ret i32 -1 + %B = ashr i32 undef, 2 ;; top two bits must be equal, so not undef + ret i32 %B +} + +define i32 @test5b2(i32 %A) { +; CHECK: @test5b2 +; CHECK: ret i32 -1 + %B = ashr i32 undef, %A ;; top %A bits must be equal, so not undef + ret i32 %B +} + define i32 @test6(i32 %A) { ; CHECK: @test6 ; CHECK-NEXT: mul i32 %A, 6 @@ -437,7 +451,37 @@ entry: ret i64 %tmp46 ; CHECK: @test37 -; CHECK: %tmp23 = shl i128 %tmp22, 32 +; CHECK: %tmp23 = shl nuw nsw i128 %tmp22, 32 ; CHECK: %ins = or i128 %tmp23, %A ; CHECK: %tmp46 = trunc i128 %ins to i64 } + +define i32 @test38(i32 %x) nounwind readnone { + %rem = srem i32 %x, 32 + %shl = shl i32 1, %rem + ret i32 %shl +; CHECK: @test38 +; CHECK-NEXT: and i32 %x, 31 +; CHECK-NEXT: shl i32 1 +; CHECK-NEXT: ret i32 +} + +; <rdar://problem/8756731> +; CHECK: @test39 +define i8 @test39(i32 %a0) { +entry: + %tmp4 = trunc i32 %a0 to i8 +; CHECK: and i8 %tmp49, 64 + %tmp5 = shl i8 %tmp4, 5 + %tmp48 = and i8 %tmp5, 32 + %tmp49 = lshr i8 %tmp48, 5 + %tmp50 = mul i8 %tmp49, 64 + %tmp51 = xor i8 %tmp50, %tmp5 +; CHECK: and i8 %0, 16 + %tmp52 = and i8 %tmp51, -128 + %tmp53 = lshr i8 %tmp52, 7 + %tmp54 = mul i8 %tmp53, 16 + %tmp55 = xor i8 %tmp54, %tmp51 +; CHECK: ret i8 %tmp551 + ret i8 %tmp55 +} diff --git a/test/Transforms/InstCombine/signext.ll b/test/Transforms/InstCombine/signext.ll index 49384d6..ecee983 100644 --- a/test/Transforms/InstCombine/signext.ll +++ b/test/Transforms/InstCombine/signext.ll @@ -9,7 +9,7 @@ define i32 @test1(i32 %x) { ret i32 %tmp.3 ; CHECK: @test1 ; CHECK: %sext = shl i32 %x, 16 -; CHECK: %tmp.3 = ashr i32 %sext, 16 +; CHECK: %tmp.3 = ashr exact i32 %sext, 16 ; CHECK: ret i32 %tmp.3 } @@ -20,7 +20,7 @@ define i32 @test2(i32 %x) { ret i32 %tmp.3 ; CHECK: @test2 ; CHECK: %sext = shl i32 %x, 16 -; CHECK: %tmp.3 = ashr i32 %sext, 16 +; CHECK: %tmp.3 = ashr exact i32 %sext, 16 ; CHECK: ret i32 %tmp.3 } @@ -51,7 +51,7 @@ define i32 @test5(i32 %x) { ret i32 %tmp.3 ; CHECK: @test5 ; CHECK: %sext = shl i32 %x, 24 -; CHECK: %tmp.3 = ashr i32 %sext, 24 +; CHECK: %tmp.3 = ashr exact i32 %sext, 24 ; CHECK: ret i32 %tmp.3 } @@ -61,7 +61,7 @@ define i32 @test6(i32 %x) { ret i32 %tmp.4 ; CHECK: @test6 ; CHECK: %tmp.2 = shl i32 %x, 16 -; CHECK: %tmp.4 = ashr i32 %tmp.2, 16 +; CHECK: %tmp.4 = ashr exact i32 %tmp.2, 16 ; CHECK: ret i32 %tmp.4 } @@ -82,6 +82,6 @@ entry: %sub = add i32 %xor, -67108864 ; <i32> [#uses=1] ret i32 %sub ; CHECK: @test8 -; CHECK: %sub = ashr i32 %x, 5 -; CHECK: ret i32 %sub +; CHECK: %shr = ashr i32 %x, 5 +; CHECK: ret i32 %shr } diff --git a/test/Transforms/InstCombine/sub.ll b/test/Transforms/InstCombine/sub.ll index 29bd7be..9656a7e 100644 --- a/test/Transforms/InstCombine/sub.ll +++ b/test/Transforms/InstCombine/sub.ll @@ -40,7 +40,7 @@ define i32 @test5(i32 %A, i32 %B, i32 %C) { %E = sub i32 %A, %D ret i32 %E ; CHECK: @test5 -; CHECK: %D = sub i32 %C, %B +; CHECK: %D1 = sub i32 %C, %B ; CHECK: %E = add ; CHECK: ret i32 %E } @@ -209,7 +209,7 @@ define i1 @test22(i32 %a, i32 %b) zeroext nounwind { %tmp5 = icmp eq i32 %tmp2, %tmp4 ret i1 %tmp5 ; CHECK: @test22 -; CHECK: %tmp5 = icmp eq i32 %a, %b +; CHECK: %tmp5 = icmp eq i32 %b, %a ; CHECK: ret i1 %tmp5 } @@ -256,7 +256,7 @@ define i64 @test24b(i8* %P, i64 %A){ %G = sub i64 %C, ptrtoint ([42 x i16]* @Arr to i64) ret i64 %G ; CHECK: @test24b -; CHECK-NEXT: shl i64 %A, 1 +; CHECK-NEXT: shl nuw i64 %A, 1 ; CHECK-NEXT: ret i64 } @@ -267,7 +267,7 @@ define i64 @test25(i8* %P, i64 %A){ %G = sub i64 %C, ptrtoint (i16* getelementptr ([42 x i16]* @Arr, i64 1, i64 0) to i64) ret i64 %G ; CHECK: @test25 -; CHECK-NEXT: shl i64 %A, 1 +; CHECK-NEXT: shl nuw i64 %A, 1 ; CHECK-NEXT: add i64 {{.*}}, -84 ; CHECK-NEXT: ret i64 } @@ -281,3 +281,23 @@ define i32 @test26(i32 %x) { ; CHECK-NEXT: ret i32 } +define i32 @test27(i32 %x, i32 %y) { + %mul = mul i32 %y, -8 + %sub = sub i32 %x, %mul + ret i32 %sub +; CHECK: @test27 +; CHECK-NEXT: shl i32 %y, 3 +; CHECK-NEXT: add i32 +; CHECK-NEXT: ret i32 +} + +define i32 @test28(i32 %x, i32 %y, i32 %z) { + %neg = sub i32 0, %z + %mul = mul i32 %neg, %y + %sub = sub i32 %x, %mul + ret i32 %sub +; CHECK: @test28 +; CHECK-NEXT: mul i32 %z, %y +; CHECK-NEXT: add i32 +; CHECK-NEXT: ret i32 +} diff --git a/test/Transforms/InstCombine/trunc.ll b/test/Transforms/InstCombine/trunc.ll index f98bfd9..6ec342a 100644 --- a/test/Transforms/InstCombine/trunc.ll +++ b/test/Transforms/InstCombine/trunc.ll @@ -24,7 +24,7 @@ define i64 @test2(i64 %a) { ret i64 %d ; CHECK: @test2 ; CHECK: shl i64 %a, 36 -; CHECK: %d = ashr i64 {{.*}}, 36 +; CHECK: %d = ashr exact i64 {{.*}}, 36 ; CHECK: ret i64 %d } define i64 @test3(i64 %a) { @@ -92,8 +92,28 @@ define i64 @test8(i32 %A, i32 %B) { ; CHECK: @test8 ; CHECK: %tmp38 = zext i32 %A to i64 ; CHECK: %tmp32 = zext i32 %B to i64 -; CHECK: %tmp33 = shl i64 %tmp32, 32 +; CHECK: %tmp33 = shl nuw i64 %tmp32, 32 ; CHECK: %ins35 = or i64 %tmp33, %tmp38 ; CHECK: ret i64 %ins35 } +define i8 @test9(i32 %X) { + %Y = and i32 %X, 42 + %Z = trunc i32 %Y to i8 + ret i8 %Z +; CHECK: @test9 +; CHECK: trunc +; CHECK: and +; CHECK: ret +} + +; rdar://8808586 +define i8 @test10(i32 %X) { + %Y = trunc i32 %X to i8 + %Z = and i8 %Y, 42 + ret i8 %Z +; CHECK: @test10 +; CHECK: trunc +; CHECK: and +; CHECK: ret +} diff --git a/test/Transforms/InstCombine/vec_demanded_elts-2.ll b/test/Transforms/InstCombine/vec_demanded_elts-2.ll deleted file mode 100644 index 4159361..0000000 --- a/test/Transforms/InstCombine/vec_demanded_elts-2.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep extractelement - -define void @get_image() nounwind { -entry: - %0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1] - %1 = trunc i32 %0 to i8 ; <i8> [#uses=1] - %tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1] - %tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1] - %2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1] - br i1 %2, label %bb2, label %bb3 - -bb2: ; preds = %entry - br label %bb3 - -bb3: ; preds = %bb2, %entry - unreachable -} - -declare i32 @fgetc(i8*) diff --git a/test/Transforms/InstCombine/vec_demanded_elts-3.ll b/test/Transforms/InstCombine/vec_demanded_elts-3.ll deleted file mode 100644 index 62e4370..0000000 --- a/test/Transforms/InstCombine/vec_demanded_elts-3.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep load -; PR4340 - -define void @vac(<4 x float>* nocapture %a) nounwind { -entry: - %tmp1 = load <4 x float>* %a ; <<4 x float>> [#uses=1] - %vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1] - %vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1] - %vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1] - %vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1] - store <4 x float> %vecins8, <4 x float>* %a - ret void -} - diff --git a/test/Transforms/InstCombine/vec_demanded_elts.ll b/test/Transforms/InstCombine/vec_demanded_elts.ll index 2009a77..9f308aa 100644 --- a/test/Transforms/InstCombine/vec_demanded_elts.ll +++ b/test/Transforms/InstCombine/vec_demanded_elts.ll @@ -1,17 +1,13 @@ -; RUN: opt < %s -instcombine -S | \ -; RUN: grep {fadd float} -; RUN: opt < %s -instcombine -S | \ -; RUN: grep {fmul float} -; RUN: opt < %s -instcombine -S | \ -; RUN: not grep {insertelement.*0.00} -; RUN: opt < %s -instcombine -S | \ -; RUN: not grep {call.*llvm.x86.sse.mul} -; RUN: opt < %s -instcombine -S | \ -; RUN: not grep {call.*llvm.x86.sse.sub} -; END. +; RUN: opt < %s -instcombine -S | FileCheck %s define i16 @test1(float %f) { entry: +; CHECK: @test1 +; CHECK: fmul float +; CHECK-NOT: insertelement {{.*}} 0.00 +; CHECK-NOT: call {{.*}} @llvm.x86.sse.mul +; CHECK-NOT: call {{.*}} @llvm.x86.sse.sub +; CHECK: ret %tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1] %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1] %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1] @@ -26,16 +22,104 @@ entry: } define i32 @test2(float %f) { - %tmp5 = fmul float %f, %f - %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0 - %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1 - %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 - %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 - %tmp19 = bitcast <4 x float> %tmp12 to <4 x i32> - %tmp21 = extractelement <4 x i32> %tmp19, i32 0 - ret i32 %tmp21 +; CHECK: @test2 +; CHECK-NOT: insertelement +; CHECK-NOT: extractelement +; CHECK: ret + %tmp5 = fmul float %f, %f + %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0 + %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1 + %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 + %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 + %tmp19 = bitcast <4 x float> %tmp12 to <4 x i32> + %tmp21 = extractelement <4 x i32> %tmp19, i32 0 + ret i32 %tmp21 } +define i64 @test3(float %f, double %d) { +; CHECK: @test3 +; CHECK-NOT: insertelement {{.*}} 0.00 +; CHECK: ret +entry: + %v00 = insertelement <4 x float> undef, float %f, i32 0 + %v01 = insertelement <4 x float> %v00, float 0.000000e+00, i32 1 + %v02 = insertelement <4 x float> %v01, float 0.000000e+00, i32 2 + %v03 = insertelement <4 x float> %v02, float 0.000000e+00, i32 3 + %tmp0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %v03) + %v10 = insertelement <4 x float> undef, float %f, i32 0 + %v11 = insertelement <4 x float> %v10, float 0.000000e+00, i32 1 + %v12 = insertelement <4 x float> %v11, float 0.000000e+00, i32 2 + %v13 = insertelement <4 x float> %v12, float 0.000000e+00, i32 3 + %tmp1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %v13) + %v20 = insertelement <4 x float> undef, float %f, i32 0 + %v21 = insertelement <4 x float> %v20, float 0.000000e+00, i32 1 + %v22 = insertelement <4 x float> %v21, float 0.000000e+00, i32 2 + %v23 = insertelement <4 x float> %v22, float 0.000000e+00, i32 3 + %tmp2 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %v23) + %v30 = insertelement <4 x float> undef, float %f, i32 0 + %v31 = insertelement <4 x float> %v30, float 0.000000e+00, i32 1 + %v32 = insertelement <4 x float> %v31, float 0.000000e+00, i32 2 + %v33 = insertelement <4 x float> %v32, float 0.000000e+00, i32 3 + %tmp3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %v33) + %v40 = insertelement <2 x double> undef, double %d, i32 0 + %v41 = insertelement <2 x double> %v40, double 0.000000e+00, i32 1 + %tmp4 = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %v41) + %v50 = insertelement <2 x double> undef, double %d, i32 0 + %v51 = insertelement <2 x double> %v50, double 0.000000e+00, i32 1 + %tmp5 = tail call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %v51) + %v60 = insertelement <2 x double> undef, double %d, i32 0 + %v61 = insertelement <2 x double> %v60, double 0.000000e+00, i32 1 + %tmp6 = tail call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %v61) + %v70 = insertelement <2 x double> undef, double %d, i32 0 + %v71 = insertelement <2 x double> %v70, double 0.000000e+00, i32 1 + %tmp7 = tail call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %v71) + %tmp8 = add i32 %tmp0, %tmp2 + %tmp9 = add i32 %tmp4, %tmp6 + %tmp10 = add i32 %tmp8, %tmp9 + %tmp11 = sext i32 %tmp10 to i64 + %tmp12 = add i64 %tmp1, %tmp3 + %tmp13 = add i64 %tmp5, %tmp7 + %tmp14 = add i64 %tmp12, %tmp13 + %tmp15 = add i64 %tmp11, %tmp14 + ret i64 %tmp15 +} + +define void @get_image() nounwind { +; CHECK: @get_image +; CHECK-NOT: extractelement +; CHECK: unreachable +entry: + %0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1] + %1 = trunc i32 %0 to i8 ; <i8> [#uses=1] + %tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1] + %tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1] + %2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1] + br i1 %2, label %bb2, label %bb3 + +bb2: ; preds = %entry + br label %bb3 + +bb3: ; preds = %bb2, %entry + unreachable +} + +; PR4340 +define void @vac(<4 x float>* nocapture %a) nounwind { +; CHECK: @vac +; CHECK-NOT: load +; CHECK: ret +entry: + %tmp1 = load <4 x float>* %a ; <<4 x float>> [#uses=1] + %vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1] + %vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1] + %vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1] + %vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1] + store <4 x float> %vecins8, <4 x float>* %a + ret void +} + +declare i32 @fgetc(i8*) + declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) @@ -44,4 +128,11 @@ declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) +declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) +declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) +declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) +declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) +declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) +declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) +declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) diff --git a/test/Transforms/InstCombine/vec_sext.ll b/test/Transforms/InstCombine/vec_sext.ll new file mode 100644 index 0000000..d7ab96b --- /dev/null +++ b/test/Transforms/InstCombine/vec_sext.ll @@ -0,0 +1,22 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +define <4 x i32> @psignd_3(<4 x i32> %a, <4 x i32> %b) nounwind ssp { +entry: + %cmp = icmp slt <4 x i32> %b, zeroinitializer + %sext = sext <4 x i1> %cmp to <4 x i32> + %sub = sub nsw <4 x i32> zeroinitializer, %a + %0 = icmp slt <4 x i32> %sext, zeroinitializer + %sext3 = sext <4 x i1> %0 to <4 x i32> + %1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1> + %2 = and <4 x i32> %a, %1 + %3 = and <4 x i32> %sext3, %sub + %cond = or <4 x i32> %2, %3 + ret <4 x i32> %cond + +; CHECK: ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31> +; CHECK: sub nsw <4 x i32> zeroinitializer, %a +; CHECK: xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1> +; CHECK: and <4 x i32> %a, %0 +; CHECK: and <4 x i32> %b.lobit, %sub +; CHECK: or <4 x i32> %1, %2 +} diff --git a/test/Transforms/InstCombine/vector-casts.ll b/test/Transforms/InstCombine/vector-casts.ll index 24bd04d..e931dc7 100644 --- a/test/Transforms/InstCombine/vector-casts.ll +++ b/test/Transforms/InstCombine/vector-casts.ll @@ -121,3 +121,31 @@ define <2 x double> @fc(<2 x double> %t) { %b = sitofp <2 x i64> %a to <2 x double> ret <2 x double> %b } + +; PR9228 +; This was a crasher, so no CHECK statements. +define <4 x float> @f(i32 %a) nounwind alwaysinline { +; CHECK: @f +entry: + %dim = insertelement <4 x i32> undef, i32 %a, i32 0 + %dim30 = insertelement <4 x i32> %dim, i32 %a, i32 1 + %dim31 = insertelement <4 x i32> %dim30, i32 %a, i32 2 + %dim32 = insertelement <4 x i32> %dim31, i32 %a, i32 3 + + %offset_ptr = getelementptr <4 x float>* null, i32 1 + %offset_int = ptrtoint <4 x float>* %offset_ptr to i64 + %sizeof32 = trunc i64 %offset_int to i32 + + %smearinsert33 = insertelement <4 x i32> undef, i32 %sizeof32, i32 0 + %smearinsert34 = insertelement <4 x i32> %smearinsert33, i32 %sizeof32, i32 1 + %smearinsert35 = insertelement <4 x i32> %smearinsert34, i32 %sizeof32, i32 2 + %smearinsert36 = insertelement <4 x i32> %smearinsert35, i32 %sizeof32, i32 3 + + %delta_scale = mul <4 x i32> %dim32, %smearinsert36 + %offset_delta = add <4 x i32> zeroinitializer, %delta_scale + + %offset_varying_delta = add <4 x i32> %offset_delta, undef + + ret <4 x float> undef +} + diff --git a/test/Transforms/InstSimplify/2010-12-20-Boolean.ll b/test/Transforms/InstSimplify/2010-12-20-Boolean.ll new file mode 100644 index 0000000..3aa1bd6 --- /dev/null +++ b/test/Transforms/InstSimplify/2010-12-20-Boolean.ll @@ -0,0 +1,29 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define i1 @add(i1 %x) { +; CHECK: @add + %z = add i1 %x, %x + ret i1 %z +; CHECK: ret i1 false +} + +define i1 @sub(i1 %x) { +; CHECK: @sub + %z = sub i1 false, %x + ret i1 %z +; CHECK: ret i1 %x +} + +define i1 @mul(i1 %x) { +; CHECK: @mul + %z = mul i1 %x, %x + ret i1 %z +; CHECK: ret i1 %x +} + +define i1 @ne(i1 %x) { +; CHECK: @ne + %z = icmp ne i1 %x, 0 + ret i1 %z +; CHECK: ret i1 %x +} diff --git a/test/Transforms/InstSimplify/2010-12-20-Distribute.ll b/test/Transforms/InstSimplify/2010-12-20-Distribute.ll new file mode 100644 index 0000000..d20abd6 --- /dev/null +++ b/test/Transforms/InstSimplify/2010-12-20-Distribute.ll @@ -0,0 +1,62 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define i32 @factorize(i32 %x, i32 %y) { +; CHECK: @factorize +; (X | 1) & (X | 2) -> X | (1 & 2) -> X + %l = or i32 %x, 1 + %r = or i32 %x, 2 + %z = and i32 %l, %r + ret i32 %z +; CHECK: ret i32 %x +} + +define i32 @factorize2(i32 %x) { +; CHECK: @factorize2 +; 3*X - 2*X -> X + %l = mul i32 3, %x + %r = mul i32 2, %x + %z = sub i32 %l, %r + ret i32 %z +; CHECK: ret i32 %x +} + +define i32 @factorize3(i32 %x, i32 %a, i32 %b) { +; CHECK: @factorize3 +; (X | (A|B)) & (X | B) -> X | ((A|B) & B) -> X | B + %aORb = or i32 %a, %b + %l = or i32 %x, %aORb + %r = or i32 %x, %b + %z = and i32 %l, %r + ret i32 %z +; CHECK: ret i32 %r +} + +define i32 @factorize4(i32 %x, i32 %y) { +; CHECK: @factorize4 + %sh = shl i32 %y, 1 + %ml = mul i32 %sh, %x + %mr = mul i32 %x, %y + %s = sub i32 %ml, %mr + ret i32 %s +; CHECK: ret i32 %mr +} + +define i32 @factorize5(i32 %x, i32 %y) { +; CHECK: @factorize5 + %sh = mul i32 %y, 2 + %ml = mul i32 %sh, %x + %mr = mul i32 %x, %y + %s = sub i32 %ml, %mr + ret i32 %s +; CHECK: ret i32 %mr +} + +define i32 @expand(i32 %x) { +; CHECK: @expand +; ((X & 1) | 2) & 1 -> ((X & 1) & 1) | (2 & 1) -> (X & 1) | 0 -> X & 1 + %a = and i32 %x, 1 + %b = or i32 %a, 2 + %c = and i32 %b, 1 + ret i32 %c +; CHECK: ret i32 %a +} diff --git a/test/Transforms/InstSimplify/2011-01-14-Thread.ll b/test/Transforms/InstSimplify/2011-01-14-Thread.ll new file mode 100644 index 0000000..8fc4dc5 --- /dev/null +++ b/test/Transforms/InstSimplify/2011-01-14-Thread.ll @@ -0,0 +1,9 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define i32 @shift_select(i1 %cond) { +; CHECK: @shift_select + %s = select i1 %cond, i32 0, i32 1 + %r = lshr i32 %s, 1 + ret i32 %r +; CHECK: ret i32 0 +} diff --git a/test/Transforms/InstSimplify/2011-02-01-Vector.ll b/test/Transforms/InstSimplify/2011-02-01-Vector.ll new file mode 100644 index 0000000..3039a66 --- /dev/null +++ b/test/Transforms/InstSimplify/2011-02-01-Vector.ll @@ -0,0 +1,8 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define <2 x i32> @sdiv(<2 x i32> %x) { +; CHECK: @sdiv + %div = sdiv <2 x i32> %x, <i32 1, i32 1> + ret <2 x i32> %div +; CHECK: ret <2 x i32> %x +} diff --git a/test/Transforms/InstSimplify/compare.ll b/test/Transforms/InstSimplify/compare.ll new file mode 100644 index 0000000..7174e7f --- /dev/null +++ b/test/Transforms/InstSimplify/compare.ll @@ -0,0 +1,295 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s +target datalayout = "p:32:32" + +define i1 @ptrtoint() { +; CHECK: @ptrtoint + %a = alloca i8 + %tmp = ptrtoint i8* %a to i32 + %r = icmp eq i32 %tmp, 0 + ret i1 %r +; CHECK: ret i1 false +} + +define i1 @zext(i32 %x) { +; CHECK: @zext + %e1 = zext i32 %x to i64 + %e2 = zext i32 %x to i64 + %r = icmp eq i64 %e1, %e2 + ret i1 %r +; CHECK: ret i1 true +} + +define i1 @zext2(i1 %x) { +; CHECK: @zext2 + %e = zext i1 %x to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 %x +} + +define i1 @zext3() { +; CHECK: @zext3 + %e = zext i1 1 to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @sext(i32 %x) { +; CHECK: @sext + %e1 = sext i32 %x to i64 + %e2 = sext i32 %x to i64 + %r = icmp eq i64 %e1, %e2 + ret i1 %r +; CHECK: ret i1 true +} + +define i1 @sext2(i1 %x) { +; CHECK: @sext2 + %e = sext i1 %x to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 %x +} + +define i1 @sext3() { +; CHECK: @sext3 + %e = sext i1 1 to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @add(i32 %x, i32 %y) { +; CHECK: @add + %l = lshr i32 %x, 1 + %q = lshr i32 %y, 1 + %r = or i32 %q, 1 + %s = add i32 %l, %r + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @add2(i8 %x, i8 %y) { +; CHECK: @add2 + %l = or i8 %x, 128 + %r = or i8 %y, 129 + %s = add i8 %l, %r + %c = icmp eq i8 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @add3(i8 %x, i8 %y) { +; CHECK: @add3 + %l = zext i8 %x to i32 + %r = zext i8 %y to i32 + %s = add i32 %l, %r + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 %c +} + +define i1 @add4(i32 %x, i32 %y) { +; CHECK: @add4 + %z = add nsw i32 %y, 1 + %s1 = add nsw i32 %x, %y + %s2 = add nsw i32 %x, %z + %c = icmp slt i32 %s1, %s2 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @add5(i32 %x, i32 %y) { +; CHECK: @add5 + %z = add nuw i32 %y, 1 + %s1 = add nuw i32 %x, %z + %s2 = add nuw i32 %x, %y + %c = icmp ugt i32 %s1, %s2 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @addpowtwo(i32 %x, i32 %y) { +; CHECK: @addpowtwo + %l = lshr i32 %x, 1 + %r = shl i32 1, %y + %s = add i32 %l, %r + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @or(i32 %x) { +; CHECK: @or + %o = or i32 %x, 1 + %c = icmp eq i32 %o, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @shl(i32 %x) { +; CHECK: @shl + %s = shl i32 1, %x + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @lshr1(i32 %x) { +; CHECK: @lshr1 + %s = lshr i32 -1, %x + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @lshr2(i32 %x) { +; CHECK: @lshr2 + %s = lshr i32 %x, 30 + %c = icmp ugt i32 %s, 8 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @ashr1(i32 %x) { +; CHECK: @ashr1 + %s = ashr i32 -1, %x + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @ashr2(i32 %x) { +; CHECK: @ashr2 + %s = ashr i32 %x, 30 + %c = icmp slt i32 %s, -5 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @select1(i1 %cond) { +; CHECK: @select1 + %s = select i1 %cond, i32 1, i32 0 + %c = icmp eq i32 %s, 1 + ret i1 %c +; CHECK: ret i1 %cond +} + +define i1 @select2(i1 %cond) { +; CHECK: @select2 + %x = zext i1 %cond to i32 + %s = select i1 %cond, i32 %x, i32 0 + %c = icmp ne i32 %s, 0 + ret i1 %c +; CHECK: ret i1 %cond +} + +define i1 @select3(i1 %cond) { +; CHECK: @select3 + %x = zext i1 %cond to i32 + %s = select i1 %cond, i32 1, i32 %x + %c = icmp ne i32 %s, 0 + ret i1 %c +; CHECK: ret i1 %cond +} + +define i1 @select4(i1 %cond) { +; CHECK: @select4 + %invert = xor i1 %cond, 1 + %s = select i1 %invert, i32 0, i32 1 + %c = icmp ne i32 %s, 0 + ret i1 %c +; CHECK: ret i1 %cond +} + +define i1 @urem1(i32 %X, i32 %Y) { +; CHECK: @urem1 + %A = urem i32 %X, %Y + %B = icmp ult i32 %A, %Y + ret i1 %B +; CHECK: ret i1 true +} + +define i1 @urem2(i32 %X, i32 %Y) { +; CHECK: @urem2 + %A = urem i32 %X, %Y + %B = icmp eq i32 %A, %Y + ret i1 %B +; CHECK ret i1 false +} + +define i1 @urem3(i32 %X) { +; CHECK: @urem3 + %A = urem i32 %X, 10 + %B = icmp ult i32 %A, 15 + ret i1 %B +; CHECK: ret i1 true +} + +define i1 @urem4(i32 %X) { +; CHECK: @urem4 + %A = urem i32 %X, 15 + %B = icmp ult i32 %A, 10 + ret i1 %B +; CHECK: ret i1 %B +} + +define i1 @urem5(i16 %X, i32 %Y) { +; CHECK: @urem5 + %A = zext i16 %X to i32 + %B = urem i32 %A, %Y + %C = icmp slt i32 %B, %Y + ret i1 %C +; CHECK: ret i1 true +} + +define i1 @srem1(i32 %X) { +; CHECK: @srem1 + %A = srem i32 %X, -5 + %B = icmp sgt i32 %A, 5 + ret i1 %B +; CHECK: ret i1 false +} + +define i1 @udiv1(i32 %X) { +; CHECK: @udiv1 + %A = udiv i32 %X, 1000000 + %B = icmp ult i32 %A, 5000 + ret i1 %B +; CHECK: ret i1 true +} + +define i1 @udiv2(i32 %X, i32 %Y, i32 %Z) { +; CHECK: @udiv2 + %A = udiv exact i32 10, %Z + %B = udiv exact i32 20, %Z + %C = icmp ult i32 %A, %B + ret i1 %C +; CHECK: ret i1 true +} + +define i1 @sdiv1(i32 %X) { +; CHECK: @sdiv1 + %A = sdiv i32 %X, 1000000 + %B = icmp slt i32 %A, 3000 + ret i1 %B +; CHECK: ret i1 true +} + +define i1 @or1(i32 %X) { +; CHECK: @or1 + %A = or i32 %X, 62 + %B = icmp ult i32 %A, 50 + ret i1 %B +; CHECK: ret i1 false +} + +define i1 @and1(i32 %X) { +; CHECK: @and1 + %A = and i32 %X, 62 + %B = icmp ugt i32 %A, 70 + ret i1 %B +; CHECK: ret i1 false +} diff --git a/test/Transforms/PartialSpecialize/dg.exp b/test/Transforms/InstSimplify/dg.exp index f200589..f200589 100644 --- a/test/Transforms/PartialSpecialize/dg.exp +++ b/test/Transforms/InstSimplify/dg.exp diff --git a/test/Transforms/InstSimplify/exact-nsw-nuw.ll b/test/Transforms/InstSimplify/exact-nsw-nuw.ll new file mode 100644 index 0000000..f3a804e --- /dev/null +++ b/test/Transforms/InstSimplify/exact-nsw-nuw.ll @@ -0,0 +1,44 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +; PR8862 + +; CHECK: @shift1 +; CHECK: ret i32 %A +define i32 @shift1(i32 %A, i32 %B) { + %C = lshr exact i32 %A, %B + %D = shl nuw i32 %C, %B + ret i32 %D +} + +; CHECK: @shift2 +; CHECK: lshr +; CHECK: ret i32 %D +define i32 @shift2(i32 %A, i32 %B) { + %C = lshr i32 %A, %B + %D = shl nuw i32 %C, %B + ret i32 %D +} + +; CHECK: @shift3 +; CHECK: ret i32 %A +define i32 @shift3(i32 %A, i32 %B) { + %C = ashr exact i32 %A, %B + %D = shl nuw i32 %C, %B + ret i32 %D +} + +; CHECK: @shift4 +; CHECK: ret i32 %A +define i32 @shift4(i32 %A, i32 %B) { + %C = shl nuw i32 %A, %B + %D = lshr i32 %C, %B + ret i32 %D +} + +; CHECK: @shift5 +; CHECK: ret i32 %A +define i32 @shift5(i32 %A, i32 %B) { + %C = shl nsw i32 %A, %B + %D = ashr i32 %C, %B + ret i32 %D +} diff --git a/test/Transforms/InstSimplify/fdiv.ll b/test/Transforms/InstSimplify/fdiv.ll new file mode 100644 index 0000000..9d85154 --- /dev/null +++ b/test/Transforms/InstSimplify/fdiv.ll @@ -0,0 +1,17 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define double @fdiv_of_undef(double %X) { +; CHECK: @fdiv_of_undef +; undef / X -> undef + %r = fdiv double undef, %X + ret double %r +; CHECK: ret double undef +} + +define double @fdiv_by_undef(double %X) { +; CHECK: @fdiv_by_undef +; X / undef -> undef + %r = fdiv double %X, undef + ret double %r +; CHECK: ret double undef +} diff --git a/test/Transforms/InstSimplify/reassociate.ll b/test/Transforms/InstSimplify/reassociate.ll new file mode 100644 index 0000000..3c8169e --- /dev/null +++ b/test/Transforms/InstSimplify/reassociate.ll @@ -0,0 +1,186 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define i32 @add1(i32 %x) { +; CHECK: @add1 +; (X + -1) + 1 -> X + %l = add i32 %x, -1 + %r = add i32 %l, 1 + ret i32 %r +; CHECK: ret i32 %x +} + +define i32 @and1(i32 %x, i32 %y) { +; CHECK: @and1 +; (X & Y) & X -> X & Y + %l = and i32 %x, %y + %r = and i32 %l, %x + ret i32 %r +; CHECK: ret i32 %l +} + +define i32 @and2(i32 %x, i32 %y) { +; CHECK: @and2 +; X & (X & Y) -> X & Y + %r = and i32 %x, %y + %l = and i32 %x, %r + ret i32 %l +; CHECK: ret i32 %r +} + +define i32 @or1(i32 %x, i32 %y) { +; CHECK: @or1 +; (X | Y) | X -> X | Y + %l = or i32 %x, %y + %r = or i32 %l, %x + ret i32 %r +; CHECK: ret i32 %l +} + +define i32 @or2(i32 %x, i32 %y) { +; CHECK: @or2 +; X | (X | Y) -> X | Y + %r = or i32 %x, %y + %l = or i32 %x, %r + ret i32 %l +; CHECK: ret i32 %r +} + +define i32 @xor1(i32 %x, i32 %y) { +; CHECK: @xor1 +; (X ^ Y) ^ X = Y + %l = xor i32 %x, %y + %r = xor i32 %l, %x + ret i32 %r +; CHECK: ret i32 %y +} + +define i32 @xor2(i32 %x, i32 %y) { +; CHECK: @xor2 +; X ^ (X ^ Y) = Y + %r = xor i32 %x, %y + %l = xor i32 %x, %r + ret i32 %l +; CHECK: ret i32 %y +} + +define i32 @sub1(i32 %x, i32 %y) { +; CHECK: @sub1 + %d = sub i32 %x, %y + %r = sub i32 %x, %d + ret i32 %r +; CHECK: ret i32 %y +} + +define i32 @sub2(i32 %x) { +; CHECK: @sub2 +; X - (X + 1) -> -1 + %xp1 = add i32 %x, 1 + %r = sub i32 %x, %xp1 + ret i32 %r +; CHECK: ret i32 -1 +} + +define i32 @sub3(i32 %x, i32 %y) { +; CHECK: @sub3 +; ((X + 1) + Y) - (Y + 1) -> X + %xp1 = add i32 %x, 1 + %lhs = add i32 %xp1, %y + %rhs = add i32 %y, 1 + %r = sub i32 %lhs, %rhs + ret i32 %r +; CHECK: ret i32 %x +} + +define i32 @sdiv1(i32 %x, i32 %y) { +; CHECK: @sdiv1 +; (no overflow X * Y) / Y -> X + %mul = mul nsw i32 %x, %y + %r = sdiv i32 %mul, %y + ret i32 %r +; CHECK: ret i32 %x +} + +define i32 @sdiv2(i32 %x, i32 %y) { +; CHECK: @sdiv2 +; (((X / Y) * Y) / Y) -> X / Y + %div = sdiv i32 %x, %y + %mul = mul i32 %div, %y + %r = sdiv i32 %mul, %y + ret i32 %r +; CHECK: ret i32 %div +} + +define i32 @sdiv3(i32 %x, i32 %y) { +; CHECK: @sdiv3 +; (X rem Y) / Y -> 0 + %rem = srem i32 %x, %y + %div = sdiv i32 %rem, %y + ret i32 %div +; CHECK: ret i32 0 +} + +define i32 @sdiv4(i32 %x, i32 %y) { +; CHECK: @sdiv4 +; (X / Y) * Y -> X if the division is exact + %div = sdiv exact i32 %x, %y + %mul = mul i32 %div, %y + ret i32 %mul +; CHECK: ret i32 %x +} + +define i32 @sdiv5(i32 %x, i32 %y) { +; CHECK: @sdiv5 +; Y * (X / Y) -> X if the division is exact + %div = sdiv exact i32 %x, %y + %mul = mul i32 %y, %div + ret i32 %mul +; CHECK: ret i32 %x +} + + +define i32 @udiv1(i32 %x, i32 %y) { +; CHECK: @udiv1 +; (no overflow X * Y) / Y -> X + %mul = mul nuw i32 %x, %y + %r = udiv i32 %mul, %y + ret i32 %r +; CHECK: ret i32 %x +} + +define i32 @udiv2(i32 %x, i32 %y) { +; CHECK: @udiv2 +; (((X / Y) * Y) / Y) -> X / Y + %div = udiv i32 %x, %y + %mul = mul i32 %div, %y + %r = udiv i32 %mul, %y + ret i32 %r +; CHECK: ret i32 %div +} + +define i32 @udiv3(i32 %x, i32 %y) { +; CHECK: @udiv3 +; (X rem Y) / Y -> 0 + %rem = urem i32 %x, %y + %div = udiv i32 %rem, %y + ret i32 %div +; CHECK: ret i32 0 +} + +define i32 @udiv4(i32 %x, i32 %y) { +; CHECK: @udiv4 +; (X / Y) * Y -> X if the division is exact + %div = udiv exact i32 %x, %y + %mul = mul i32 %div, %y + ret i32 %mul +; CHECK: ret i32 %x +} + +define i32 @udiv5(i32 %x, i32 %y) { +; CHECK: @udiv5 +; Y * (X / Y) -> X if the division is exact + %div = udiv exact i32 %x, %y + %mul = mul i32 %y, %div + ret i32 %mul +; CHECK: ret i32 %x +} + diff --git a/test/Transforms/JumpThreading/and-and-cond.ll b/test/Transforms/JumpThreading/and-and-cond.ll index e6db9ee..765d940 100644 --- a/test/Transforms/JumpThreading/and-and-cond.ll +++ b/test/Transforms/JumpThreading/and-and-cond.ll @@ -1,14 +1,14 @@ -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1} -; There should be no uncond branches left. -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label} +; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | FileCheck %s declare i32 @f1() declare i32 @f2() declare void @f3() define i32 @test(i1 %cond, i1 %cond2, i1 %cond3) { +; CHECK: test br i1 %cond, label %T1, label %F1 +; CHECK-NOT: T1: T1: %v1 = call i32 @f1() br label %Merge @@ -18,6 +18,10 @@ F1: br label %Merge Merge: +; CHECK: Merge: +; CHECK: %v1 = call i32 @f1() +; CHECK-NEXT: %D = and i1 %cond2, %cond3 +; CHECK-NEXT: br i1 %D %A = phi i1 [true, %T1], [false, %F1] %B = phi i32 [%v1, %T1], [%v2, %F1] %C = and i1 %A, %cond2 diff --git a/test/Transforms/JumpThreading/and-cond.ll b/test/Transforms/JumpThreading/and-cond.ll index 58dbec7..0159bb3 100644 --- a/test/Transforms/JumpThreading/and-cond.ll +++ b/test/Transforms/JumpThreading/and-cond.ll @@ -1,14 +1,14 @@ -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1} -; There should be no uncond branches left. -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label} +; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | FileCheck %s declare i32 @f1() declare i32 @f2() declare void @f3() define i32 @test(i1 %cond, i1 %cond2) { +; CHECK: test br i1 %cond, label %T1, label %F1 +; CHECK-NOT: T1 T1: %v1 = call i32 @f1() br label %Merge @@ -18,6 +18,9 @@ F1: br label %Merge Merge: +; CHECK: Merge: +; CHECK: %v1 = call i32 @f1() +; CHECK-NEXT: br i1 %cond2 %A = phi i1 [true, %T1], [false, %F1] %B = phi i32 [%v1, %T1], [%v2, %F1] %C = and i1 %A, %cond2 diff --git a/test/Transforms/JumpThreading/degenerate-phi.ll b/test/Transforms/JumpThreading/degenerate-phi.ll new file mode 100644 index 0000000..35d9fde --- /dev/null +++ b/test/Transforms/JumpThreading/degenerate-phi.ll @@ -0,0 +1,24 @@ +; RUN: opt -jump-threading -disable-output %s +; PR9112 + +; This is actually a test for value tracking. Jump threading produces +; "%phi = phi i16" when it removes all edges leading to %unreachable. +; The .ll parser won't let us write that directly since it's invalid code. + +define void @func() nounwind { +entry: + br label %bb + +bb: + br label %bb + +unreachable: + %phi = phi i16 [ %add, %unreachable ], [ 0, %next ] + %add = add i16 0, %phi + %cmp = icmp slt i16 %phi, 0 + br i1 %cmp, label %unreachable, label %next + +next: + br label %unreachable +} + diff --git a/test/Transforms/JumpThreading/indirectbr.ll b/test/Transforms/JumpThreading/indirectbr.ll new file mode 100644 index 0000000..141277f --- /dev/null +++ b/test/Transforms/JumpThreading/indirectbr.ll @@ -0,0 +1,94 @@ +; RUN: opt -S < %s -jump-threading | FileCheck %s + +; Keep block addresses alive. +@addresses = constant [4 x i8*] [ + i8* blockaddress(@test1, %L1), i8* blockaddress(@test1, %L2), + i8* blockaddress(@test2, %L1), i8* blockaddress(@test2, %L2) +] + +declare void @bar() +declare void @baz() + + + +; Check basic jump threading for indirectbr instructions. + +; CHECK: void @test1 +; CHECK: br i1 %tobool, label %L1, label %indirectgoto +; CHECK-NOT: if.else: +; CHECK: L1: +; CHECK: indirectbr i8* %address, [label %L1, label %L2] +define void @test1(i32 %i, i8* %address) nounwind { +entry: + %rem = srem i32 %i, 2 + %tobool = icmp ne i32 %rem, 0 + br i1 %tobool, label %indirectgoto, label %if.else + +if.else: ; preds = %entry + br label %indirectgoto + +L1: ; preds = %indirectgoto + call void @bar() + ret void + +L2: ; preds = %indirectgoto + call void @baz() + ret void + +indirectgoto: ; preds = %if.else, %entry + %indirect.goto.dest = phi i8* [ %address, %if.else ], [ blockaddress(@test1, %L1), %entry ] + indirectbr i8* %indirect.goto.dest, [label %L1, label %L2] +} + + +; Check constant folding of indirectbr + +; CHECK: void @test2 +; CHECK: entry: +; CHECK-NEXT: br label %L1 +; CHECK: L1: +; CHECK-NEXT: call void @bar +; CHECK-NEXT: ret void +define void @test2() nounwind { +entry: + indirectbr i8* blockaddress(@test2, %L1), [label %L1, label %L2] + +L1: ; preds = %indirectgoto + call void @bar() + ret void + +L2: ; preds = %indirectgoto + call void @baz() + ret void +} + + +; PR4151 +; Don't merge address-taken blocks. +@.str = private unnamed_addr constant [4 x i8] c"%p\0A\00" + +; CHECK: @test3 +; CHECK: __here: +; CHECK: blockaddress(@test3, %__here) +; CHECK: __here1: +; CHECK: blockaddress(@test3, %__here1) +; CHECK: __here3: +; CHECK: blockaddress(@test3, %__here3) +define void @test3() nounwind ssp noredzone { +entry: + br label %__here + +__here: ; preds = %entry + %call = call i32 (...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i64 ptrtoint (i8* blockaddress(@test3, %__here) to i64)) nounwind noredzone + br label %__here1 + +__here1: ; preds = %__here + %call2 = call i32 (...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i64 ptrtoint (i8* blockaddress(@test3, %__here1) to i64)) nounwind noredzone + br label %__here3 + +__here3: ; preds = %__here1 + %call4 = call i32 (...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i64 ptrtoint (i8* blockaddress(@test3, %__here3) to i64)) nounwind noredzone + ret void +} + +declare i32 @printf(...) noredzone diff --git a/test/Transforms/JumpThreading/select.ll b/test/Transforms/JumpThreading/select.ll new file mode 100644 index 0000000..8a81857 --- /dev/null +++ b/test/Transforms/JumpThreading/select.ll @@ -0,0 +1,123 @@ +; RUN: opt -S -jump-threading < %s | FileCheck %s + +declare void @foo() +declare void @bar() +declare void @baz() +declare void @quux() + + +; Jump threading of branch with select as condition. +; Mostly theoretical since instruction combining simplifies all selects of +; booleans where at least one operand is true/false/undef. + +; CHECK: @test_br +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L1, +define void @test_br(i1 %cond, i1 %value) nounwind { +entry: + br i1 %cond, label %L0, label %L3 +L0: + %expr = select i1 %cond, i1 true, i1 %value + br i1 %expr, label %L1, label %L2 + +L1: + call void @foo() + ret void +L2: + call void @bar() + ret void +L3: + call void @baz() + br label %L0 +} + + +; Jump threading of switch with select as condition. + +; CHECK: @test_switch +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L1, +define void @test_switch(i1 %cond, i8 %value) nounwind { +entry: + br i1 %cond, label %L0, label %L4 +L0: + %expr = select i1 %cond, i8 1, i8 %value + switch i8 %expr, label %L3 [i8 1, label %L1 i8 2, label %L2] + +L1: + call void @foo() + ret void +L2: + call void @bar() + ret void +L3: + call void @baz() + ret void +L4: + call void @quux() + br label %L0 +} + +; Make sure the blocks in the indirectbr test aren't trivially removable as +; successors by taking their addresses. +@anchor = constant [3 x i8*] [ + i8* blockaddress(@test_indirectbr, %L1), + i8* blockaddress(@test_indirectbr, %L2), + i8* blockaddress(@test_indirectbr, %L3) +] + + +; Jump threading of indirectbr with select as address. + +; CHECK: @test_indirectbr +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L1, label %L3 +define void @test_indirectbr(i1 %cond, i8* %address) nounwind { +entry: + br i1 %cond, label %L0, label %L3 +L0: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@test_indirectbr, %L1), i8* %address + indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3] + +L1: + call void @foo() + ret void +L2: + call void @bar() + ret void +L3: + call void @baz() + ret void +} + + +; A more complicated case: the condition is a select based on a comparison. + +; CHECK: @test_switch_cmp +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L0, label %[[THREADED:[A-Za-z.0-9]+]] +; CHECK: [[THREADED]]: +; CHECK-NEXT: call void @quux +; CHECK-NEXT: br label %L1 +define void @test_switch_cmp(i1 %cond, i32 %val, i8 %value) nounwind { +entry: + br i1 %cond, label %L0, label %L4 +L0: + %val.phi = phi i32 [%val, %entry], [-1, %L4] + %cmp = icmp slt i32 %val.phi, 0 + %expr = select i1 %cmp, i8 1, i8 %value + switch i8 %expr, label %L3 [i8 1, label %L1 i8 2, label %L2] + +L1: + call void @foo() + ret void +L2: + call void @bar() + ret void +L3: + call void @baz() + ret void +L4: + call void @quux() + br label %L0 +} diff --git a/test/Transforms/JumpThreading/thread-loads.ll b/test/Transforms/JumpThreading/thread-loads.ll index 96ba701..cce23ea 100644 --- a/test/Transforms/JumpThreading/thread-loads.ll +++ b/test/Transforms/JumpThreading/thread-loads.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -jump-threading -simplifycfg -S | grep {ret i32 1} +; RUN: opt < %s -jump-threading -S | FileCheck %s ; rdar://6402033 ; Test that we can thread through the block with the partially redundant load (%2). @@ -6,12 +6,16 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 target triple = "i386-apple-darwin7" define i32 @foo(i32* %P) nounwind { +; CHECK: foo entry: %0 = tail call i32 (...)* @f1() nounwind ; <i32> [#uses=1] %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] br i1 %1, label %bb1, label %bb bb: ; preds = %entry +; CHECK: bb1.thread: +; CHECK: store +; CHECK: br label %bb3 store i32 42, i32* %P, align 4 br label %bb1 @@ -26,6 +30,9 @@ bb2: ; preds = %bb1 ret i32 %res.0 bb3: ; preds = %bb1 +; CHECK: bb3: +; CHECK: %res.01 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ] +; CHECK: ret i32 %res.01 ret i32 %res.0 } diff --git a/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll b/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll index 5381c88..7a80f80 100644 --- a/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll +++ b/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll @@ -1,6 +1,6 @@ -; RUN: opt < %s -loopsimplify -lcssa -S | \ +; RUN: opt < %s -loop-simplify -lcssa -S | \ ; RUN: grep {%%SJE.0.0.lcssa = phi .struct.SetJmpMapEntry} -; RUN: opt < %s -loopsimplify -lcssa -S | \ +; RUN: opt < %s -loop-simplify -lcssa -S | \ ; RUN: grep {%%SJE.0.0.lcssa1 = phi .struct.SetJmpMapEntry} %struct.SetJmpMapEntry = type { i8*, i32, %struct.SetJmpMapEntry* } diff --git a/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll b/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll index 4782bd1..4559e31 100644 --- a/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll +++ b/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll @@ -1,6 +1,6 @@ ; Exit blocks need to be updated for all nested loops... -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define i32 @yyparse() { bb0: diff --git a/test/Transforms/LICM/crash.ll b/test/Transforms/LICM/crash.ll index 88be5c4..ff7fa0b 100644 --- a/test/Transforms/LICM/crash.ll +++ b/test/Transforms/LICM/crash.ll @@ -59,3 +59,16 @@ for.end: ; preds = %for.cond, %entry } declare i32* @test3helper(i32*) + + +; PR8602 +@g_47 = external global i32, align 4 + +define void @test4() noreturn nounwind { + br label %1 + +; <label>:1 ; preds = %1, %0 + volatile store i32* @g_47, i32** undef, align 8 + store i32 undef, i32* @g_47, align 4 + br label %1 +} diff --git a/test/Transforms/LICM/scalar_promote.ll b/test/Transforms/LICM/scalar_promote.ll index 67ad5bc..d8acdc1 100644 --- a/test/Transforms/LICM/scalar_promote.ll +++ b/test/Transforms/LICM/scalar_promote.ll @@ -118,3 +118,33 @@ exit: ret void } +define void @test5(i32 %i, i32** noalias %P2) { +Entry: + br label %Loop +; CHECK: @test5 +; CHECK: Entry: +; CHECK-NEXT: load i32* @X +; CHECK-NEXT: br label %Loop + + +Loop: ; preds = %Loop, %0 + %j = phi i32 [ 0, %Entry ], [ %Next, %Loop ] ; <i32> [#uses=1] + %x = load i32* @X ; <i32> [#uses=1] + %x2 = add i32 %x, 1 ; <i32> [#uses=1] + store i32 %x2, i32* @X + + volatile store i32* @X, i32** %P2 + + %Next = add i32 %j, 1 ; <i32> [#uses=2] + %cond = icmp eq i32 %Next, 0 ; <i1> [#uses=1] + br i1 %cond, label %Out, label %Loop + +Out: + ret void +; CHECK: Out: +; CHECK-NEXT: store i32 %x2, i32* @X +; CHECK-NEXT: ret void + +} + + diff --git a/test/Transforms/LoopDeletion/multiple-exits.ll b/test/Transforms/LoopDeletion/multiple-exits.ll new file mode 100644 index 0000000..6af413b --- /dev/null +++ b/test/Transforms/LoopDeletion/multiple-exits.ll @@ -0,0 +1,26 @@ +; RUN: opt < %s -loop-deletion -S | FileCheck %s + +; Checks whether dead loops with multiple exits can be eliminated + +; CHECK: entry: +; CHECK-NEXT: br label %return + +; CHECK: return: +; CHECK-NEXT: ret void + +define void @foo(i64 %n, i64 %m) nounwind { +entry: + br label %bb + +bb: + %x.0 = phi i64 [ 0, %entry ], [ %t0, %bb2 ] + %t0 = add i64 %x.0, 1 + %t1 = icmp slt i64 %x.0, %n + br i1 %t1, label %bb2, label %return +bb2: + %t2 = icmp slt i64 %x.0, %m + br i1 %t1, label %bb, label %return + +return: + ret void +} diff --git a/test/Transforms/LoopIdiom/basic.ll b/test/Transforms/LoopIdiom/basic.ll new file mode 100644 index 0000000..485114c --- /dev/null +++ b/test/Transforms/LoopIdiom/basic.ll @@ -0,0 +1,349 @@ +; RUN: opt -basicaa -loop-idiom < %s -S | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +define void @test1(i8* %Base, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + store i8 0, i8* %I.0.014, align 1 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test1 +; CHECK: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 %Size, i32 1, i1 false) +; CHECK-NOT: store +} + +; This is a loop that was rotated but where the blocks weren't merged. This +; shouldn't perturb us. +define void @test1a(i8* %Base, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body.cont ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + store i8 0, i8* %I.0.014, align 1 + %indvar.next = add i64 %indvar, 1 + br label %for.body.cont +for.body.cont: + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test1a +; CHECK: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 %Size, i32 1, i1 false) +; CHECK-NOT: store +} + + +define void @test2(i32* %Base, i64 %Size) nounwind ssp { +entry: + %cmp10 = icmp eq i64 %Size, 0 + br i1 %cmp10, label %for.end, label %for.body + +for.body: ; preds = %entry, %for.body + %i.011 = phi i64 [ %inc, %for.body ], [ 0, %entry ] + %add.ptr.i = getelementptr i32* %Base, i64 %i.011 + store i32 16843009, i32* %add.ptr.i, align 4 + %inc = add nsw i64 %i.011, 1 + %exitcond = icmp eq i64 %inc, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test2 +; CHECK: br i1 %cmp10, +; CHECK: %tmp = mul i64 %Size, 4 +; CHECK: call void @llvm.memset.p0i8.i64(i8* %Base1, i8 1, i64 %tmp, i32 4, i1 false) +; CHECK-NOT: store +} + +; This is a case where there is an extra may-aliased store in the loop, we can't +; promote the memset. +define void @test3(i32* %Base, i64 %Size, i8 *%MayAlias) nounwind ssp { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %i.011 = phi i64 [ %inc, %for.body ], [ 0, %entry ] + %add.ptr.i = getelementptr i32* %Base, i64 %i.011 + store i32 16843009, i32* %add.ptr.i, align 4 + + store i8 42, i8* %MayAlias + %inc = add nsw i64 %i.011, 1 + %exitcond = icmp eq i64 %inc, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %entry + ret void +; CHECK: @test3 +; CHECK-NOT: memset +; CHECK: ret void +} + + +;; TODO: We should be able to promote this memset. Not yet though. +define void @test4(i8* %Base) nounwind ssp { +bb.nph: ; preds = %entry + %Base100 = getelementptr i8* %Base, i64 1000 + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + store i8 0, i8* %I.0.014, align 1 + + ;; Store beyond the range memset, should be safe to promote. + store i8 42, i8* %Base100 + + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 100 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK-TODO: @test4 +; CHECK-TODO: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 100, i32 1, i1 false) +; CHECK-TODO-NOT: store +} + +; This can't be promoted: the memset is a store of a loop variant value. +define void @test5(i8* %Base, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + + %V = trunc i64 %indvar to i8 + store i8 %V, i8* %I.0.014, align 1 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test5 +; CHECK-NOT: memset +; CHECK: ret void +} + + +;; memcpy formation +define void @test6(i64 %Size) nounwind ssp { +bb.nph: + %Base = alloca i8, i32 10000 + %Dest = alloca i8, i32 10000 + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + %DestI = getelementptr i8* %Dest, i64 %indvar + %V = load i8* %I.0.014, align 1 + store i8 %V, i8* %DestI, align 1 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test6 +; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %Dest, i8* %Base, i64 %Size, i32 1, i1 false) +; CHECK-NOT: store +; CHECK: ret void +} + + +; This is a loop that was rotated but where the blocks weren't merged. This +; shouldn't perturb us. +define void @test7(i8* %Base, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body.cont ] + br label %for.body.cont +for.body.cont: + %I.0.014 = getelementptr i8* %Base, i64 %indvar + store i8 0, i8* %I.0.014, align 1 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test7 +; CHECK: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 %Size, i32 1, i1 false) +; CHECK-NOT: store +} + +; This is a loop should not be transformed, it only executes one iteration. +define void @test8(i64* %Ptr, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %PI = getelementptr i64* %Ptr, i64 %indvar + store i64 0, i64 *%PI + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 1 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test8 +; CHECK: store i64 0, i64* %PI +} + +declare i8* @external(i8*) + +;; This cannot be transformed into a memcpy, because the read-from location is +;; mutated by the loop. +define void @test9(i64 %Size) nounwind ssp { +bb.nph: + %Base = alloca i8, i32 10000 + %Dest = alloca i8, i32 10000 + + %BaseAlias = call i8* @external(i8* %Base) + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + %DestI = getelementptr i8* %Dest, i64 %indvar + %V = load i8* %I.0.014, align 1 + store i8 %V, i8* %DestI, align 1 + + ;; This store can clobber the input. + store i8 4, i8* %BaseAlias + + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test9 +; CHECK-NOT: llvm.memcpy +; CHECK: ret void +} + +; Two dimensional nested loop should be promoted to one big memset. +define void @test10(i8* %X) nounwind ssp { +entry: + br label %bb.nph + +bb.nph: ; preds = %entry, %for.inc10 + %i.04 = phi i32 [ 0, %entry ], [ %inc12, %for.inc10 ] + br label %for.body5 + +for.body5: ; preds = %for.body5, %bb.nph + %j.02 = phi i32 [ 0, %bb.nph ], [ %inc, %for.body5 ] + %mul = mul nsw i32 %i.04, 100 + %add = add nsw i32 %j.02, %mul + %idxprom = sext i32 %add to i64 + %arrayidx = getelementptr inbounds i8* %X, i64 %idxprom + store i8 0, i8* %arrayidx, align 1 + %inc = add nsw i32 %j.02, 1 + %cmp4 = icmp eq i32 %inc, 100 + br i1 %cmp4, label %for.inc10, label %for.body5 + +for.inc10: ; preds = %for.body5 + %inc12 = add nsw i32 %i.04, 1 + %cmp = icmp eq i32 %inc12, 100 + br i1 %cmp, label %for.end13, label %bb.nph + +for.end13: ; preds = %for.inc10 + ret void +; CHECK: @test10 +; CHECK: entry: +; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* %X, i8 0, i64 10000, i32 1, i1 false) +; CHECK-NOT: store +; CHECK: ret void +} + +; On darwin10 (which is the triple in this .ll file) this loop can be turned +; into a memset_pattern call. +; rdar://9009151 +define void @test11_pattern(i32* nocapture %P) nounwind ssp { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.body ] + %arrayidx = getelementptr i32* %P, i64 %indvar + store i32 1, i32* %arrayidx, align 4 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 10000 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +; CHECK: @test11_pattern +; CHECK-NEXT: entry: +; CHECK-NEXT: bitcast +; CHECK-NEXT: memset_pattern +; CHECK-NOT: store +; CHECK: ret void +} + +; Store of null should turn into memset of zero. +define void @test12(i32** nocapture %P) nounwind ssp { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.body ] + %arrayidx = getelementptr i32** %P, i64 %indvar + store i32* null, i32** %arrayidx, align 4 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 10000 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +; CHECK: @test12 +; CHECK-NEXT: entry: +; CHECK-NEXT: bitcast +; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* %P1, i8 0, i64 80000, i32 4, i1 false) +; CHECK-NOT: store +; CHECK: ret void +} + +@G = global i32 5 + +; This store-of-address loop can be turned into a memset_pattern call. +; rdar://9009151 +define void @test13_pattern(i32** nocapture %P) nounwind ssp { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.body ] + %arrayidx = getelementptr i32** %P, i64 %indvar + store i32* @G, i32** %arrayidx, align 4 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 10000 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +; CHECK: @test13_pattern +; CHECK-NEXT: entry: +; CHECK-NEXT: bitcast +; CHECK-NEXT: memset_pattern +; CHECK-NOT: store +; CHECK: ret void +} diff --git a/test/Transforms/LoopIdiom/dg.exp b/test/Transforms/LoopIdiom/dg.exp new file mode 100644 index 0000000..f200589 --- /dev/null +++ b/test/Transforms/LoopIdiom/dg.exp @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]] diff --git a/test/Transforms/LoopRotate/LRCrash-1.ll b/test/Transforms/LoopRotate/LRCrash-1.ll deleted file mode 100644 index f16dd04..0000000 --- a/test/Transforms/LoopRotate/LRCrash-1.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output - - %struct.relation = type { [4 x i16], i32, [4 x i16], i32, i32 } - -define void @findAllPairs() { -entry: - br i1 false, label %bb139, label %bb10.i44 -bb10.i44: ; preds = %entry - ret void -bb127: ; preds = %bb139 - br label %bb139 -bb139: ; preds = %bb127, %entry - br i1 false, label %bb127, label %bb142 -bb142: ; preds = %bb139 - %r91.0.lcssa = phi %struct.relation* [ null, %bb139 ] ; <%struct.relation*> [#uses=0] - ret void -} - diff --git a/test/Transforms/LoopRotate/LRCrash-2.ll b/test/Transforms/LoopRotate/LRCrash-2.ll deleted file mode 100644 index 0a10989..0000000 --- a/test/Transforms/LoopRotate/LRCrash-2.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output - -define void @findAllPairs() { -entry: - br i1 false, label %bb139, label %cond_true -cond_true: ; preds = %entry - ret void -bb90: ; preds = %bb139 - br i1 false, label %bb136, label %cond_next121 -cond_next121: ; preds = %bb90 - br i1 false, label %bb136, label %bb127 -bb127: ; preds = %cond_next121 - br label %bb136 -bb136: ; preds = %bb127, %cond_next121, %bb90 - %changes.1 = phi i32 [ %changes.2, %bb90 ], [ %changes.2, %cond_next121 ], [ 1, %bb127 ] ; <i32> [#uses=1] - br label %bb139 -bb139: ; preds = %bb136, %entry - %changes.2 = phi i32 [ %changes.1, %bb136 ], [ 0, %entry ] ; <i32> [#uses=3] - br i1 false, label %bb90, label %bb142 -bb142: ; preds = %bb139 - %changes.2.lcssa = phi i32 [ %changes.2, %bb139 ] ; <i32> [#uses=0] - ret void -} - diff --git a/test/Transforms/LoopRotate/LRCrash-3.ll b/test/Transforms/LoopRotate/LRCrash-3.ll deleted file mode 100644 index 79f21fb..0000000 --- a/test/Transforms/LoopRotate/LRCrash-3.ll +++ /dev/null @@ -1,29 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output - -define void @_ZN9Classfile4readEv() { -entry: - br i1 false, label %cond_false485, label %bb405 -bb405: ; preds = %entry - ret void -cond_false485: ; preds = %entry - br label %bb830 -bb511: ; preds = %bb830 - br i1 false, label %bb816, label %bb830 -cond_next667: ; preds = %bb816 - br i1 false, label %cond_next695, label %bb680 -bb676: ; preds = %bb680 - br label %bb680 -bb680: ; preds = %bb676, %cond_next667 - %iftmp.68.0 = zext i1 false to i8 ; <i8> [#uses=1] - br i1 false, label %bb676, label %cond_next695 -cond_next695: ; preds = %bb680, %cond_next667 - %iftmp.68.2 = phi i8 [ %iftmp.68.0, %bb680 ], [ undef, %cond_next667 ] ; <i8> [#uses=0] - ret void -bb816: ; preds = %bb816, %bb511 - br i1 false, label %cond_next667, label %bb816 -bb830: ; preds = %bb511, %cond_false485 - br i1 false, label %bb511, label %bb835 -bb835: ; preds = %bb830 - ret void -} - diff --git a/test/Transforms/LoopRotate/LRCrash-4.ll b/test/Transforms/LoopRotate/LRCrash-4.ll deleted file mode 100644 index 7d35c16..0000000 --- a/test/Transforms/LoopRotate/LRCrash-4.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output - -define void @InterpretSEIMessage(i8* %msg) { -entry: - br label %bb15 -bb6: ; preds = %bb15 - %gep.upgrd.1 = zext i32 %offset.1 to i64 ; <i64> [#uses=1] - %tmp11 = getelementptr i8* %msg, i64 %gep.upgrd.1 ; <i8*> [#uses=0] - br label %bb15 -bb15: ; preds = %bb6, %entry - %offset.1 = add i32 0, 1 ; <i32> [#uses=2] - br i1 false, label %bb6, label %bb17 -bb17: ; preds = %bb15 - %offset.1.lcssa = phi i32 [ %offset.1, %bb15 ] ; <i32> [#uses=0] - %payload_type.1.lcssa = phi i32 [ 0, %bb15 ] ; <i32> [#uses=0] - ret void -} - diff --git a/test/Transforms/LoopRotate/LRCrash-5.ll b/test/Transforms/LoopRotate/LRCrash-5.ll deleted file mode 100644 index 6643cc1..0000000 --- a/test/Transforms/LoopRotate/LRCrash-5.ll +++ /dev/null @@ -1,26 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-apple-darwin9" - %struct.NSArray = type { %struct.NSObject } - %struct.NSObject = type { %struct.objc_class* } - %struct.NSRange = type { i64, i64 } - %struct._message_ref_t = type { %struct.NSObject* (%struct.NSObject*, %struct._message_ref_t*, ...)*, %struct.objc_selector* } - %struct.objc_class = type opaque - %struct.objc_selector = type opaque -@"\01L_OBJC_MESSAGE_REF_26" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=1] - -define %struct.NSArray* @"-[NSString(DocSetPrivateAddition) _dsa_stringAsPathComponent]"(%struct.NSArray* %self, %struct._message_ref_t* %_cmd) { -entry: - br label %bb116 - -bb116: ; preds = %bb131, %entry - %tmp123 = call %struct.NSRange null( %struct.NSObject* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_26", %struct.NSArray* null ) ; <%struct.NSRange> [#uses=1] - br i1 false, label %bb141, label %bb131 - -bb131: ; preds = %bb116 - %mrv_gr125 = getresult %struct.NSRange %tmp123, 1 ; <i64> [#uses=0] - br label %bb116 - -bb141: ; preds = %bb116 - ret %struct.NSArray* null -} diff --git a/test/Transforms/LoopRotate/crash.ll b/test/Transforms/LoopRotate/crash.ll new file mode 100644 index 0000000..9dc9862 --- /dev/null +++ b/test/Transforms/LoopRotate/crash.ll @@ -0,0 +1,139 @@ +; RUN: opt -loop-rotate %s -disable-output -verify-dom-info -verify-loop-info + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; PR8955 - Rotating an outer loop that has a condbr for a latch block. +define void @test1() nounwind ssp { +entry: + br label %lbl_283 + +lbl_283: ; preds = %if.end, %entry + br i1 undef, label %if.else, label %if.then + +if.then: ; preds = %lbl_283 + br i1 undef, label %if.end, label %for.condthread-pre-split + +for.condthread-pre-split: ; preds = %if.then + br label %for.cond + +for.cond: ; preds = %for.cond, %for.condthread-pre-split + br i1 undef, label %lbl_281, label %for.cond + +lbl_281: ; preds = %if.end, %for.cond + br label %if.end + +if.end: ; preds = %lbl_281, %if.then + br i1 undef, label %lbl_283, label %lbl_281 + +if.else: ; preds = %lbl_283 + ret void +} + + %struct.relation = type { [4 x i16], i32, [4 x i16], i32, i32 } + +define void @test2() { +entry: + br i1 false, label %bb139, label %bb10.i44 +bb10.i44: ; preds = %entry + ret void +bb127: ; preds = %bb139 + br label %bb139 +bb139: ; preds = %bb127, %entry + br i1 false, label %bb127, label %bb142 +bb142: ; preds = %bb139 + %r91.0.lcssa = phi %struct.relation* [ null, %bb139 ] ; <%struct.relation*> [#uses=0] + ret void +} + + +define void @test3() { +entry: + br i1 false, label %bb139, label %cond_true +cond_true: ; preds = %entry + ret void +bb90: ; preds = %bb139 + br i1 false, label %bb136, label %cond_next121 +cond_next121: ; preds = %bb90 + br i1 false, label %bb136, label %bb127 +bb127: ; preds = %cond_next121 + br label %bb136 +bb136: ; preds = %bb127, %cond_next121, %bb90 + %changes.1 = phi i32 [ %changes.2, %bb90 ], [ %changes.2, %cond_next121 ], [ 1, %bb127 ] ; <i32> [#uses=1] + br label %bb139 +bb139: ; preds = %bb136, %entry + %changes.2 = phi i32 [ %changes.1, %bb136 ], [ 0, %entry ] ; <i32> [#uses=3] + br i1 false, label %bb90, label %bb142 +bb142: ; preds = %bb139 + %changes.2.lcssa = phi i32 [ %changes.2, %bb139 ] ; <i32> [#uses=0] + ret void +} + +define void @test4() { +entry: + br i1 false, label %cond_false485, label %bb405 +bb405: ; preds = %entry + ret void +cond_false485: ; preds = %entry + br label %bb830 +bb511: ; preds = %bb830 + br i1 false, label %bb816, label %bb830 +cond_next667: ; preds = %bb816 + br i1 false, label %cond_next695, label %bb680 +bb676: ; preds = %bb680 + br label %bb680 +bb680: ; preds = %bb676, %cond_next667 + %iftmp.68.0 = zext i1 false to i8 ; <i8> [#uses=1] + br i1 false, label %bb676, label %cond_next695 +cond_next695: ; preds = %bb680, %cond_next667 + %iftmp.68.2 = phi i8 [ %iftmp.68.0, %bb680 ], [ undef, %cond_next667 ] ; <i8> [#uses=0] + ret void +bb816: ; preds = %bb816, %bb511 + br i1 false, label %cond_next667, label %bb816 +bb830: ; preds = %bb511, %cond_false485 + br i1 false, label %bb511, label %bb835 +bb835: ; preds = %bb830 + ret void +} + + %struct.NSArray = type { %struct.NSObject } + %struct.NSObject = type { %struct.objc_class* } + %struct.NSRange = type { i64, i64 } + %struct._message_ref_t = type { %struct.NSObject* (%struct.NSObject*, %struct._message_ref_t*, ...)*, %struct.objc_selector* } + %struct.objc_class = type opaque + %struct.objc_selector = type opaque +@"\01L_OBJC_MESSAGE_REF_26" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=1] + +define %struct.NSArray* @test5(%struct.NSArray* %self, %struct._message_ref_t* %_cmd) { +entry: + br label %bb116 + +bb116: ; preds = %bb131, %entry + %tmp123 = call %struct.NSRange null( %struct.NSObject* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_26", %struct.NSArray* null ) ; <%struct.NSRange> [#uses=1] + br i1 false, label %bb141, label %bb131 + +bb131: ; preds = %bb116 + %mrv_gr125 = getresult %struct.NSRange %tmp123, 1 ; <i64> [#uses=0] + br label %bb116 + +bb141: ; preds = %bb116 + ret %struct.NSArray* null +} + +define void @test6(i8* %msg) { +entry: + br label %bb15 +bb6: ; preds = %bb15 + %gep.upgrd.1 = zext i32 %offset.1 to i64 ; <i64> [#uses=1] + %tmp11 = getelementptr i8* %msg, i64 %gep.upgrd.1 ; <i8*> [#uses=0] + br label %bb15 +bb15: ; preds = %bb6, %entry + %offset.1 = add i32 0, 1 ; <i32> [#uses=2] + br i1 false, label %bb6, label %bb17 +bb17: ; preds = %bb15 + %offset.1.lcssa = phi i32 [ %offset.1, %bb15 ] ; <i32> [#uses=0] + %payload_type.1.lcssa = phi i32 [ 0, %bb15 ] ; <i32> [#uses=0] + ret void +} + + diff --git a/test/Transforms/LoopRotate/dbgvalue.ll b/test/Transforms/LoopRotate/dbgvalue.ll new file mode 100644 index 0000000..9287178 --- /dev/null +++ b/test/Transforms/LoopRotate/dbgvalue.ll @@ -0,0 +1,59 @@ +; RUN: opt -S -loop-rotate %s | FileCheck %s + +; CHECK: entry +; CHECK-NEXT: call void @llvm.dbg.value(metadata !{i32 %x} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +define i32 @tak(i32 %x, i32 %y, i32 %z) nounwind ssp { +entry: + br label %tailrecurse + +tailrecurse: ; preds = %if.then, %entry + %x.tr = phi i32 [ %x, %entry ], [ %call, %if.then ] + %y.tr = phi i32 [ %y, %entry ], [ %call9, %if.then ] + %z.tr = phi i32 [ %z, %entry ], [ %call14, %if.then ] + tail call void @llvm.dbg.value(metadata !{i32 %x.tr}, i64 0, metadata !6), !dbg !7 + tail call void @llvm.dbg.value(metadata !{i32 %y.tr}, i64 0, metadata !8), !dbg !9 + tail call void @llvm.dbg.value(metadata !{i32 %z.tr}, i64 0, metadata !10), !dbg !11 + %cmp = icmp slt i32 %y.tr, %x.tr, !dbg !12 + br i1 %cmp, label %if.then, label %if.end, !dbg !12 + +if.then: ; preds = %tailrecurse + %sub = sub nsw i32 %x.tr, 1, !dbg !14 + %call = tail call i32 @tak(i32 %sub, i32 %y.tr, i32 %z.tr), !dbg !14 + %sub6 = sub nsw i32 %y.tr, 1, !dbg !14 + %call9 = tail call i32 @tak(i32 %sub6, i32 %z.tr, i32 %x.tr), !dbg !14 + %sub11 = sub nsw i32 %z.tr, 1, !dbg !14 + %call14 = tail call i32 @tak(i32 %sub11, i32 %x.tr, i32 %y.tr), !dbg !14 + br label %tailrecurse + +if.end: ; preds = %tailrecurse + br label %return, !dbg !16 + +return: ; preds = %if.end + ret i32 %z.tr, !dbg !17 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"tak", metadata !"tak", metadata !"", metadata !1, i32 32, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i32 (i32, i32, i32)* @tak} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/Volumes/Lalgate/cj/llvm/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame/recursive.c", metadata !"/Volumes/Lalgate/cj/D/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/Volumes/Lalgate/cj/llvm/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame/recursive.c", metadata !"/Volumes/Lalgate/cj/D/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame", metadata !"clang version 2.9 (trunk 125492)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 590081, metadata !0, metadata !"x", metadata !1, i32 32, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!7 = metadata !{i32 32, i32 13, metadata !0, null} +!8 = metadata !{i32 590081, metadata !0, metadata !"y", metadata !1, i32 32, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!9 = metadata !{i32 32, i32 20, metadata !0, null} +!10 = metadata !{i32 590081, metadata !0, metadata !"z", metadata !1, i32 32, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!11 = metadata !{i32 32, i32 27, metadata !0, null} +!12 = metadata !{i32 33, i32 3, metadata !13, null} +!13 = metadata !{i32 589835, metadata !0, i32 32, i32 30, metadata !1, i32 6} ; [ DW_TAG_lexical_block ] +!14 = metadata !{i32 34, i32 5, metadata !15, null} +!15 = metadata !{i32 589835, metadata !13, i32 33, i32 14, metadata !1, i32 7} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 36, i32 3, metadata !13, null} +!17 = metadata !{i32 37, i32 1, metadata !13, null} diff --git a/test/Transforms/LoopRotate/phi-duplicate.ll b/test/Transforms/LoopRotate/phi-duplicate.ll index 5403e72..7372830 100644 --- a/test/Transforms/LoopRotate/phi-duplicate.ll +++ b/test/Transforms/LoopRotate/phi-duplicate.ll @@ -28,20 +28,13 @@ for.end: ; preds = %for.cond ret void } -; Should only end up with one phi. Also, the original for.cond block should -; be moved to the end of the loop so that the new loop header pleasantly -; ends up at the top. - +; Should only end up with one phi. ; CHECK: define void @test ; CHECK-NEXT: entry: -; CHECK-NEXT: icmp slt i64 -; CHECK-NEXT: br i1 -; CHECK-NOT: : -; CHECK: bb.nph: ; CHECK-NEXT: br label %for.body -; CHECK-NOT: : ; CHECK: for.body: -; CHECK-NEXT: %j.02 = phi i64 -; CHECK-NOT: phi -; CHECK: ret void -; CHECK-NEXT: } +; CHECK-NEXT: %j.01 = phi i64 +; CHECK-NOT: br +; CHECK: br i1 %cmp, label %for.body, label %for.end +; CHECK: for.end: +; CHECK-NEXT: ret void diff --git a/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll b/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll index bf862f6..66bf1a0 100644 --- a/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll +++ b/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll @@ -1,7 +1,7 @@ ; This testcase exposed a problem with the loop identification pass (LoopInfo). ; Basically, it was incorrectly calculating the loop nesting information. ; -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define i32 @yylex() { br label %loopentry.0 diff --git a/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll b/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll index cd9749b..2b2afae 100644 --- a/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll +++ b/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll @@ -2,7 +2,7 @@ ; inserted for the "fail" loop, but the exit block of a loop is not updated ; to be the preheader instead of the exit loop itself. -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define i32 @re_match_2() { br label %loopentry.1 loopentry.1: ; preds = %endif.82, %0 diff --git a/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll b/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll index a5d0ba7..aae8476 100644 --- a/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll +++ b/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -verify -licm -disable-output +; RUN: opt < %s -loop-simplify -verify -licm -disable-output define void @.subst_48() { entry: diff --git a/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll b/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll index dc5c313..3e7661e 100644 --- a/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll +++ b/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -licm -disable-output +; RUN: opt < %s -loop-simplify -licm -disable-output define void @main() { entry: br i1 false, label %Out, label %loop diff --git a/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll b/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll index 721f9b3..c293837 100644 --- a/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll +++ b/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -licm -disable-output +; RUN: opt < %s -loop-simplify -licm -disable-output ; This is PR306 diff --git a/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll b/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll index cbdfe8b..c522ec9 100644 --- a/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll +++ b/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -disable-output +; RUN: opt < %s -loop-simplify -disable-output define void @test() { loopentry.0: diff --git a/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll b/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll index 4fe6e21..5818808 100644 --- a/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll +++ b/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -scalarrepl -loopsimplify -licm -disable-output -verify-dom-info -verify-loop-info +; RUN: opt < %s -scalarrepl -loop-simplify -licm -disable-output -verify-dom-info -verify-loop-info define void @inflate() { entry: diff --git a/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll b/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll index 10202dc..e73fff1 100644 --- a/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll +++ b/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -disable-output +; RUN: opt < %s -loop-simplify -disable-output ; PR1752 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32" target triple = "i686-pc-mingw32" diff --git a/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll b/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll index 2a1ee7d..f179da2 100644 --- a/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll +++ b/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -domfrontier -loopsimplify -domfrontier -verify-dom-info -analyze +; RUN: opt < %s -domfrontier -loop-simplify -domfrontier -verify-dom-info -analyze define void @a() nounwind { diff --git a/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll b/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll new file mode 100644 index 0000000..00f520b --- /dev/null +++ b/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll @@ -0,0 +1,43 @@ +; RUN: opt < %s -loop-simplify -S +; PR8702 +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-freebsd9.0" + +declare void @foo(i32 %x) + +define fastcc void @inm_merge() nounwind { +entry: + br label %for.cond + +for.cond: ; preds = %while.cond36.i, %entry + br i1 undef, label %do.body, label %for.body + +for.body: ; preds = %for.cond + br i1 undef, label %while.cond36.i, label %if.end44 + +if.end44: ; preds = %for.body + %call49 = call fastcc i32 @inm_get_source() + br i1 undef, label %if.end54, label %for.cond64 + +if.end54: ; preds = %if.end44 + br label %while.cond36.i + +while.cond36.i: ; preds = %if.end54, %for.body + br label %for.cond + +for.cond64: ; preds = %if.end88, %for.cond64, %if.end44 + %error.161 = phi i32 [ %error.161, %for.cond64 ], [ %error.161, %if.end88 ], [ %call49, %if.end44 ] + call void @foo(i32 %error.161) + br i1 undef, label %for.cond64, label %if.end88 + +if.end88: ; preds = %for.cond64 + br i1 undef, label %for.cond64, label %if.end98 + +if.end98: ; preds = %if.end88 + unreachable + +do.body: ; preds = %for.cond + unreachable +} + +declare fastcc i32 @inm_get_source() nounwind diff --git a/test/Transforms/LoopSimplify/basictest.ll b/test/Transforms/LoopSimplify/basictest.ll index 4241d8a..6b31848 100644 --- a/test/Transforms/LoopSimplify/basictest.ll +++ b/test/Transforms/LoopSimplify/basictest.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify ; This function should get a preheader inserted before BB3, that is jumped ; to by BB1 & BB2 diff --git a/test/Transforms/LoopSimplify/hardertest.ll b/test/Transforms/LoopSimplify/hardertest.ll index e0a7f81..1ccb396 100644 --- a/test/Transforms/LoopSimplify/hardertest.ll +++ b/test/Transforms/LoopSimplify/hardertest.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define void @foo(i1 %C) { br i1 %C, label %T, label %F diff --git a/test/Transforms/LoopSimplify/indirectbr-backedge.ll b/test/Transforms/LoopSimplify/indirectbr-backedge.ll index ca6e47f..7eabc09 100644 --- a/test/Transforms/LoopSimplify/indirectbr-backedge.ll +++ b/test/Transforms/LoopSimplify/indirectbr-backedge.ll @@ -1,4 +1,4 @@ -; RUN: opt -loopsimplify -S < %s | FileCheck %s +; RUN: opt -loop-simplify -S < %s | FileCheck %s ; LoopSimplify shouldn't split loop backedges that use indirectbr. diff --git a/test/Transforms/LoopSimplify/indirectbr.ll b/test/Transforms/LoopSimplify/indirectbr.ll index 2e4549d..9814d4a 100644 --- a/test/Transforms/LoopSimplify/indirectbr.ll +++ b/test/Transforms/LoopSimplify/indirectbr.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -lcssa -verify-loop-info -verify-dom-info -S \ +; RUN: opt < %s -loop-simplify -lcssa -verify-loop-info -verify-dom-info -S \ ; RUN: | grep -F {indirectbr i8* %x, \[label %L0, label %L1\]} \ ; RUN: | count 6 diff --git a/test/Transforms/LoopSimplify/merge-exits.ll b/test/Transforms/LoopSimplify/merge-exits.ll index 0e15f08..93a2247 100644 --- a/test/Transforms/LoopSimplify/merge-exits.ll +++ b/test/Transforms/LoopSimplify/merge-exits.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info > %t +; RUN: opt < %s -loop-simplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info > %t ; RUN: not grep sext %t ; RUN: grep {phi i64} %t | count 1 diff --git a/test/Transforms/LoopSimplify/phi-node-simplify.ll b/test/Transforms/LoopSimplify/phi-node-simplify.ll index 5e957cc..8eb63d9 100644 --- a/test/Transforms/LoopSimplify/phi-node-simplify.ll +++ b/test/Transforms/LoopSimplify/phi-node-simplify.ll @@ -1,5 +1,5 @@ ; Loop Simplify should turn phi nodes like X = phi [X, Y] into just Y, eliminating them. -; RUN: opt < %s -loopsimplify -S | grep phi | count 6 +; RUN: opt < %s -loop-simplify -S | grep phi | count 6 @A = weak global [3000000 x i32] zeroinitializer ; <[3000000 x i32]*> [#uses=1] @B = weak global [20000 x i32] zeroinitializer ; <[20000 x i32]*> [#uses=1] diff --git a/test/Transforms/LoopSimplify/unreachable-loop-pred.ll b/test/Transforms/LoopSimplify/unreachable-loop-pred.ll index faaaf97..76b7bb2 100644 --- a/test/Transforms/LoopSimplify/unreachable-loop-pred.ll +++ b/test/Transforms/LoopSimplify/unreachable-loop-pred.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -loopsimplify -disable-output -verify-loop-info -verify-dom-info < %s +; RUN: opt -S -loop-simplify -disable-output -verify-loop-info -verify-dom-info < %s ; PR5235 ; When loopsimplify inserts a preheader for this loop, it should add the new diff --git a/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll b/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll new file mode 100644 index 0000000..7982fbc --- /dev/null +++ b/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll @@ -0,0 +1,32 @@ +; RUN: opt < %s -loop-reduce -verify +target triple = "x86_64-apple-darwin10" + +define void @myquicksort(i8* %a) nounwind ssp { +entry: + br i1 undef, label %loop1, label %return + +loop1: ; preds = %bb13.loopexit, %entry + %indvar419 = phi i64 [ %indvar.next420, %loop2.exit ], [ 0, %entry ] + %tmp474 = shl i64 %indvar419, 2 + %tmp484 = add i64 %tmp474, 4 + br label %loop2 + +loop2: ; preds = %loop1, %loop2.backedge + %indvar414 = phi i64 [ %indvar.next415, %loop2.backedge ], [ 0, %loop1 ] + %tmp473 = mul i64 %indvar414, -4 + %tmp485 = add i64 %tmp484, %tmp473 + %storemerge4 = getelementptr i8* %a, i64 %tmp485 + %0 = icmp ugt i8* %storemerge4, %a + br i1 false, label %loop2.exit, label %loop2.backedge + +loop2.backedge: ; preds = %loop2 + %indvar.next415 = add i64 %indvar414, 1 + br label %loop2 + +loop2.exit: ; preds = %loop2 + %indvar.next420 = add i64 %indvar419, 1 + br i1 undef, label %loop1, label %return + +return: ; preds = %loop2.exit, %entry + ret void +} diff --git a/test/Transforms/LoopStrengthReduce/pr2570.ll b/test/Transforms/LoopStrengthReduce/pr2570.ll index aafd24e..80efb9f 100644 --- a/test/Transforms/LoopStrengthReduce/pr2570.ll +++ b/test/Transforms/LoopStrengthReduce/pr2570.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-reduce -S | grep {phi\\>} | count 10 +; RUN: opt < %s -loop-reduce -S | grep {phi\\>} | count 8 ; PR2570 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll b/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll index a26346b..374f46d 100644 --- a/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll +++ b/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-unroll -loopsimplify -disable-output +; RUN: opt < %s -loop-unroll -loop-simplify -disable-output define void @print_board() { entry: diff --git a/test/Transforms/LoopUnroll/basic.ll b/test/Transforms/LoopUnroll/basic.ll new file mode 100644 index 0000000..eeb3e9a --- /dev/null +++ b/test/Transforms/LoopUnroll/basic.ll @@ -0,0 +1,24 @@ +; RUN: opt < %s -loop-unroll -S | FileCheck %s + + +; This should not unroll since the address of the loop header is taken. + +; CHECK: @test1 +; CHECK: store i8* blockaddress(@test1, %l1), i8** %P +; CHECK: l1: +; CHECK-NEXT: phi i32 +; rdar://8287027 +define i32 @test1(i8** %P) nounwind ssp { +entry: + store i8* blockaddress(@test1, %l1), i8** %P + br label %l1 + +l1: ; preds = %l1, %entry + %x.0 = phi i32 [ 0, %entry ], [ %inc, %l1 ] + %inc = add nsw i32 %x.0, 1 + %exitcond = icmp eq i32 %inc, 3 + br i1 %exitcond, label %l2, label %l1 + +l2: ; preds = %l1 + ret i32 0 +} diff --git a/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll b/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll new file mode 100644 index 0000000..a976d18 --- /dev/null +++ b/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll @@ -0,0 +1,28 @@ +; RUN: opt < %s -loop-unswitch +; PR8622 +@g_38 = external global i32, align 4 + +define void @func_67(i32 %p_68.coerce) nounwind { +entry: + br i1 true, label %for.end12, label %bb.nph + +bb.nph: ; preds = %entry + %g_38.promoted = load i32* @g_38 + br label %for.body + +for.body: ; preds = %for.cond, %bb.nph + %tobool.i = icmp eq i32 %p_68.coerce, 1 + %xor4.i = xor i32 %p_68.coerce, 1 + %call1 = select i1 %tobool.i, i32 0, i32 %xor4.i + br label %for.cond + +for.cond: ; preds = %for.body + br i1 true, label %for.cond.for.end12_crit_edge, label %for.body + +for.cond.for.end12_crit_edge: ; preds = %for.cond + store i32 %call1, i32* @g_38 + br label %for.end12 + +for.end12: ; preds = %for.cond.for.end12_crit_edge, %entry + ret void +} diff --git a/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll b/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll deleted file mode 100644 index 4fec169..0000000 --- a/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: opt < %s -memcpyopt -S | grep {call.*memcpy.*agg.result} - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin8" -@x = external global { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1] - -define void @foo({ x86_fp80, x86_fp80 }* noalias sret %agg.result) nounwind { -entry: - %x.0 = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1] - %x.01 = bitcast { x86_fp80, x86_fp80 }* %x.0 to i8* ; <i8*> [#uses=2] - call void @llvm.memcpy.i32( i8* %x.01, i8* bitcast ({ x86_fp80, x86_fp80 }* @x to i8*), i32 32, i32 16 ) - %agg.result2 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %agg.result2, i8* %x.01, i32 32, i32 16 ) - ret void -} - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind diff --git a/test/Transforms/MemCpyOpt/align.ll b/test/Transforms/MemCpyOpt/align.ll index b0ae5f4..b1f900d 100644 --- a/test/Transforms/MemCpyOpt/align.ll +++ b/test/Transforms/MemCpyOpt/align.ll @@ -2,9 +2,9 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" ; The resulting memset is only 4-byte aligned, despite containing -; a 16-byte alignmed store in the middle. +; a 16-byte aligned store in the middle. -; CHECK: call void @llvm.memset.p0i8.i64(i8* %a01, i8 0, i64 16, i32 4, i1 false) +; CHECK: call void @llvm.memset.p0i8.i64(i8* {{.*}}, i8 0, i64 16, i32 4, i1 false) define void @foo(i32* %p) { %a0 = getelementptr i32* %p, i64 0 diff --git a/test/Transforms/MemCpyOpt/crash.ll b/test/Transforms/MemCpyOpt/crash.ll index bf5b234..cc3a6b0 100644 --- a/test/Transforms/MemCpyOpt/crash.ll +++ b/test/Transforms/MemCpyOpt/crash.ll @@ -1,5 +1,4 @@ -; RUN: opt < %s -memcpyopt -disable-output -; PR4882 +; RUN: opt < %s -basicaa -memcpyopt -disable-output target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "armv7-eabi" @@ -7,7 +6,8 @@ target triple = "armv7-eabi" %struct.qw = type { [4 x float] } %struct.bar = type { %struct.qw, %struct.qw, %struct.qw, %struct.qw, %struct.qw, float, float} -define arm_aapcs_vfpcc void @test1(%struct.bar* %this) { +; PR4882 +define void @test1(%struct.bar* %this) { entry: %0 = getelementptr inbounds %struct.bar* %this, i32 0, i32 0, i32 0, i32 0 store float 0.000000e+00, float* %0, align 4 @@ -43,3 +43,16 @@ entry: store float 0.000000e+00, float* %15, align 4 unreachable } + +; PR8753 + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, +i1) nounwind + +define void @test2(i32 %cmd) nounwind { + call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* undef, i64 20, i32 1, i1 +false) nounwind + call void @llvm.memcpy.p0i8.p0i8.i64(i8* null, i8* undef, i64 20, i32 1, i1 +false) nounwind + ret void +} diff --git a/test/Transforms/MemCpyOpt/form-memset.ll b/test/Transforms/MemCpyOpt/form-memset.ll index eb8dbe3..1ac97e9 100644 --- a/test/Transforms/MemCpyOpt/form-memset.ll +++ b/test/Transforms/MemCpyOpt/form-memset.ll @@ -1,12 +1,11 @@ -; RUN: opt < %s -memcpyopt -S | not grep store -; RUN: opt < %s -memcpyopt -S | grep {call.*llvm.memset} +; RUN: opt < %s -memcpyopt -S | FileCheck %s ; All the stores in this example should be merged into a single memset. target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" -define void @foo(i8 signext %c) nounwind { +define void @test1(i8 signext %c) nounwind { entry: %x = alloca [19 x i8] ; <[19 x i8]*> [#uses=20] %tmp = getelementptr [19 x i8]* %x, i32 0, i32 0 ; <i8*> [#uses=1] @@ -47,9 +46,177 @@ entry: store i8 %c, i8* %tmp69, align 1 %tmp73 = getelementptr [19 x i8]* %x, i32 0, i32 18 ; <i8*> [#uses=1] store i8 %c, i8* %tmp73, align 1 - %tmp76 = call i32 (...)* @bar( [19 x i8]* %x ) nounwind ; <i32> [#uses=0] + %tmp76 = call i32 (...)* @bar( [19 x i8]* %x ) nounwind ret void +; CHECK: @test1 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64 +; CHECK-NOT: store +; CHECK: ret } declare i32 @bar(...) + + %struct.MV = type { i16, i16 } + +define void @test2() nounwind { +entry: + %ref_idx = alloca [8 x i8] ; <[8 x i8]*> [#uses=8] + %left_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17] + %up_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17] + %tmp20 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 7 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp20, align 1 + %tmp23 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 6 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp23, align 1 + %tmp26 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 5 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp26, align 1 + %tmp29 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 4 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp29, align 1 + %tmp32 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 3 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp32, align 1 + %tmp35 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 2 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp35, align 1 + %tmp38 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 1 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp38, align 1 + %tmp41 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 0 ; <i8*> [#uses=2] + store i8 -1, i8* %tmp41, align 1 + %tmp43 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp43, align 2 + %tmp46 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp46, align 2 + %tmp57 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp57, align 2 + %tmp60 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp60, align 2 + %tmp71 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp71, align 2 + %tmp74 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp74, align 2 + %tmp85 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp85, align 2 + %tmp88 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp88, align 2 + %tmp99 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp99, align 2 + %tmp102 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp102, align 2 + %tmp113 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp113, align 2 + %tmp116 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp116, align 2 + %tmp127 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp127, align 2 + %tmp130 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp130, align 2 + %tmp141 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp141, align 8 + %tmp144 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp144, align 2 + %tmp148 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp148, align 2 + %tmp151 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp151, align 2 + %tmp162 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp162, align 2 + %tmp165 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp165, align 2 + %tmp176 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp176, align 2 + %tmp179 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp179, align 2 + %tmp190 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp190, align 2 + %tmp193 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp193, align 2 + %tmp204 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp204, align 2 + %tmp207 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp207, align 2 + %tmp218 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp218, align 2 + %tmp221 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp221, align 2 + %tmp232 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp232, align 2 + %tmp235 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp235, align 2 + %tmp246 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp246, align 8 + %tmp249 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp249, align 2 + %up_mvd252 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1] + %left_mvd253 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1] + call void @foo( %struct.MV* %up_mvd252, %struct.MV* %left_mvd253, i8* %tmp41 ) nounwind + ret void + +; CHECK: @test2 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %tmp41, i8 -1, i64 8, i32 1, i1 false) +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 32, i32 8, i1 false) +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 32, i32 8, i1 false) +; CHECK-NOT: store +; CHECK: ret +} + +declare void @foo(%struct.MV*, %struct.MV*, i8*) + + +; Store followed by memset. +define void @test3(i32* nocapture %P) nounwind ssp { +entry: + %arrayidx = getelementptr inbounds i32* %P, i64 1 + store i32 0, i32* %arrayidx, align 4 + %add.ptr = getelementptr inbounds i32* %P, i64 2 + %0 = bitcast i32* %add.ptr to i8* + tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 11, i32 1, i1 false) + ret void +; CHECK: @test3 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 15, i32 4, i1 false) +} + +; store followed by memset, different offset scenario +define void @test4(i32* nocapture %P) nounwind ssp { +entry: + store i32 0, i32* %P, align 4 + %add.ptr = getelementptr inbounds i32* %P, i64 1 + %0 = bitcast i32* %add.ptr to i8* + tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 11, i32 1, i1 false) + ret void +; CHECK: @test4 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 15, i32 4, i1 false) +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind + +; Memset followed by store. +define void @test5(i32* nocapture %P) nounwind ssp { +entry: + %add.ptr = getelementptr inbounds i32* %P, i64 2 + %0 = bitcast i32* %add.ptr to i8* + tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 11, i32 1, i1 false) + %arrayidx = getelementptr inbounds i32* %P, i64 1 + store i32 0, i32* %arrayidx, align 4 + ret void +; CHECK: @test5 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 15, i32 4, i1 false) +} + +;; Memset followed by memset. +define void @test6(i32* nocapture %P) nounwind ssp { +entry: + %0 = bitcast i32* %P to i8* + tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 12, i32 1, i1 false) + %add.ptr = getelementptr inbounds i32* %P, i64 3 + %1 = bitcast i32* %add.ptr to i8* + tail call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 12, i32 1, i1 false) + ret void +; CHECK: @test6 +; CHECK: call void @llvm.memset.p0i8.i64(i8* %2, i8 0, i64 24, i32 1, i1 false) +} + diff --git a/test/Transforms/MemCpyOpt/form-memset2.ll b/test/Transforms/MemCpyOpt/form-memset2.ll deleted file mode 100644 index c90af9c..0000000 --- a/test/Transforms/MemCpyOpt/form-memset2.ll +++ /dev/null @@ -1,99 +0,0 @@ -; RUN: opt < %s -memcpyopt -S | not grep store -; RUN: opt < %s -memcpyopt -S | grep {call.*llvm.memset} | count 3 - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin8" - %struct.MV = type { i16, i16 } - -define i32 @t() nounwind { -entry: - %ref_idx = alloca [8 x i8] ; <[8 x i8]*> [#uses=8] - %left_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17] - %up_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17] - %tmp20 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 7 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp20, align 1 - %tmp23 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 6 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp23, align 1 - %tmp26 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 5 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp26, align 1 - %tmp29 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 4 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp29, align 1 - %tmp32 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 3 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp32, align 1 - %tmp35 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 2 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp35, align 1 - %tmp38 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 1 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp38, align 1 - %tmp41 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 0 ; <i8*> [#uses=2] - store i8 -1, i8* %tmp41, align 1 - %tmp43 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp43, align 2 - %tmp46 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp46, align 2 - %tmp57 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp57, align 2 - %tmp60 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp60, align 2 - %tmp71 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp71, align 2 - %tmp74 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp74, align 2 - %tmp85 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp85, align 2 - %tmp88 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp88, align 2 - %tmp99 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp99, align 2 - %tmp102 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp102, align 2 - %tmp113 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp113, align 2 - %tmp116 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp116, align 2 - %tmp127 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp127, align 2 - %tmp130 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp130, align 2 - %tmp141 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp141, align 8 - %tmp144 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp144, align 2 - %tmp148 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp148, align 2 - %tmp151 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp151, align 2 - %tmp162 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp162, align 2 - %tmp165 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp165, align 2 - %tmp176 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp176, align 2 - %tmp179 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp179, align 2 - %tmp190 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp190, align 2 - %tmp193 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp193, align 2 - %tmp204 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp204, align 2 - %tmp207 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp207, align 2 - %tmp218 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp218, align 2 - %tmp221 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp221, align 2 - %tmp232 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp232, align 2 - %tmp235 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp235, align 2 - %tmp246 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp246, align 8 - %tmp249 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp249, align 2 - %up_mvd252 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1] - %left_mvd253 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1] - call void @foo( %struct.MV* %up_mvd252, %struct.MV* %left_mvd253, i8* %tmp41 ) nounwind - ret i32 undef -} - -declare void @foo(%struct.MV*, %struct.MV*, i8*) diff --git a/test/Transforms/MemCpyOpt/memcpy-to-memset.ll b/test/Transforms/MemCpyOpt/memcpy-to-memset.ll new file mode 100644 index 0000000..b18d176 --- /dev/null +++ b/test/Transforms/MemCpyOpt/memcpy-to-memset.ll @@ -0,0 +1,19 @@ +; RUN: opt -memcpyopt -S < %s | FileCheck %s + +@cst = internal constant [3 x i32] [i32 -1, i32 -1, i32 -1], align 4 + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind +declare void @foo(i32*) nounwind + +define void @test1() nounwind { + %arr = alloca [3 x i32], align 4 + %arr_i8 = bitcast [3 x i32]* %arr to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %arr_i8, i8* bitcast ([3 x i32]* @cst to i8*), i64 12, i32 4, i1 false) + %arraydecay = getelementptr inbounds [3 x i32]* %arr, i64 0, i64 0 + call void @foo(i32* %arraydecay) nounwind + ret void +; CHECK: @test1 +; CHECK: call void @llvm.memset +; CHECK-NOT: call void @llvm.memcpy +; CHECK: ret void +} diff --git a/test/Transforms/MemCpyOpt/memcpy.ll b/test/Transforms/MemCpyOpt/memcpy.ll index e4cd0ef..b387d32 100644 --- a/test/Transforms/MemCpyOpt/memcpy.ll +++ b/test/Transforms/MemCpyOpt/memcpy.ll @@ -1,9 +1,9 @@ -; RUN: opt < %s -basicaa -memcpyopt -dse -S | grep {call.*memcpy} | count 1 +; RUN: opt < %s -basicaa -memcpyopt -dse -S | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9" -define void @ccosl({ x86_fp80, x86_fp80 }* sret %agg.result, x86_fp80 %z.0, x86_fp80 %z.1) nounwind { +define void @test1({ x86_fp80, x86_fp80 }* sret %agg.result, x86_fp80 %z.0, x86_fp80 %z.1) nounwind { entry: %tmp2 = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1] %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 ; <{ x86_fp80, x86_fp80 }*> [#uses=2] @@ -14,9 +14,98 @@ entry: call void @llvm.memcpy.i32( i8* %tmp219, i8* %memtmp20, i32 32, i32 16 ) %agg.result21 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; <i8*> [#uses=1] call void @llvm.memcpy.i32( i8* %agg.result21, i8* %tmp219, i32 32, i32 16 ) + +; Check that one of the memcpy's are removed. +;; FIXME: PR 8643 We should be able to eliminate the last memcpy here. + +; CHECK: @test1 +; CHECK: call void @ccoshl +; CHECK: call void @llvm.memcpy +; CHECK-NOT: llvm.memcpy +; CHECK: ret void ret void } declare void @ccoshl({ x86_fp80, x86_fp80 }* sret , x86_fp80, x86_fp80) nounwind declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind + + +; The intermediate alloca and one of the memcpy's should be eliminated, the +; other should be related with a memmove. +define void @test2(i8* %P, i8* %Q) nounwind { + %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 + %R = bitcast { x86_fp80, x86_fp80 }* %memtmp to i8* + call void @llvm.memcpy.i32( i8* %R, i8* %P, i32 32, i32 16 ) + call void @llvm.memcpy.i32( i8* %Q, i8* %R, i32 32, i32 16 ) + ret void + +; CHECK: @test2 +; CHECK-NEXT: call void @llvm.memmove{{.*}}(i8* %Q, i8* %P +; CHECK-NEXT: ret void +} + + + + +@x = external global { x86_fp80, x86_fp80 } + +define void @test3({ x86_fp80, x86_fp80 }* noalias sret %agg.result) nounwind { + %x.0 = alloca { x86_fp80, x86_fp80 } + %x.01 = bitcast { x86_fp80, x86_fp80 }* %x.0 to i8* + call void @llvm.memcpy.i32( i8* %x.01, i8* bitcast ({ x86_fp80, x86_fp80 }* @x to i8*), i32 32, i32 16 ) + %agg.result2 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* + call void @llvm.memcpy.i32( i8* %agg.result2, i8* %x.01, i32 32, i32 16 ) + ret void +; CHECK: @test3 +; CHECK-NEXT: %agg.result2 = bitcast +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret void +} + + +; PR8644 +define void @test4(i8 *%P) { + %A = alloca {i32, i32} + %a = bitcast {i32, i32}* %A to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %P, i64 8, i32 4, i1 false) + call void @test4a(i8* byval align 1 %a) + ret void +; CHECK: @test4 +; CHECK-NEXT: call void @test4a( +} + +declare void @test4a(i8* byval align 1) +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +%struct.S = type { i128, [4 x i8]} + +@sS = external global %struct.S, align 16 + +declare void @test5a(%struct.S* byval align 16) nounwind ssp + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +; rdar://8713376 - This memcpy can't be eliminated. +define i32 @test5(i32 %x) nounwind ssp { +entry: + %y = alloca %struct.S, align 16 + %tmp = bitcast %struct.S* %y to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp, i8* bitcast (%struct.S* @sS to i8*), i64 32, i32 16, i1 false) + %a = getelementptr %struct.S* %y, i64 0, i32 1, i64 0 + store i8 4, i8* %a + call void @test5a(%struct.S* byval align 16 %y) + ret i32 0 + ; CHECK: @test5( + ; CHECK: store i8 4 + ; CHECK: call void @test5a(%struct.S* byval align 16 %y) +} + +;; Noop memcpy should be zapped. +define void @test6(i8 *%P) { + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %P, i64 8, i32 4, i1 false) + ret void +; CHECK: @test6 +; CHECK-NEXT: ret void +} + diff --git a/test/Transforms/MemCpyOpt/smaller.ll b/test/Transforms/MemCpyOpt/smaller.ll new file mode 100644 index 0000000..1d35582 --- /dev/null +++ b/test/Transforms/MemCpyOpt/smaller.ll @@ -0,0 +1,28 @@ +; RUN: opt -memcpyopt -S < %s | FileCheck %s +; rdar://8875553 + +; Memcpyopt shouldn't optimize the second memcpy using the first +; because the first has a smaller size. + +; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.s* @cell, i32 0, i32 0, i32 0), i32 16, i32 4, i1 false) + +target datalayout = "e-p:32:32:32" + +%struct.s = type { [11 x i8], i32 } + +@.str = private constant [11 x i8] c"0123456789\00" +@cell = external global %struct.s + +declare void @check(%struct.s* byval %p) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind + +define void @foo() nounwind { +entry: + %agg.tmp = alloca %struct.s, align 4 + store i32 99, i32* getelementptr inbounds (%struct.s* @cell, i32 0, i32 1), align 4 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.s* @cell, i32 0, i32 0, i32 0), i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i32 11, i32 1, i1 false) + %tmp = getelementptr inbounds %struct.s* %agg.tmp, i32 0, i32 0, i32 0 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.s* @cell, i32 0, i32 0, i32 0), i32 16, i32 4, i1 false) + call void @check(%struct.s* byval %agg.tmp) + ret void +} diff --git a/test/Transforms/MemCpyOpt/sret.ll b/test/Transforms/MemCpyOpt/sret.ll index d35ab91..ddfd0fd 100644 --- a/test/Transforms/MemCpyOpt/sret.ll +++ b/test/Transforms/MemCpyOpt/sret.ll @@ -3,7 +3,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9" -define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 }* byval %z) nounwind { +define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 }* byval align 8 %z) nounwind { entry: %iz = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=3] %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 ; <{ x86_fp80, x86_fp80 }*> [#uses=2] @@ -16,7 +16,7 @@ entry: %tmp8 = load x86_fp80* %tmp7, align 16 ; <x86_fp80> [#uses=1] store x86_fp80 %tmp3, x86_fp80* %real, align 16 store x86_fp80 %tmp8, x86_fp80* %tmp4, align 16 - call void @ccoshl( { x86_fp80, x86_fp80 }* noalias sret %memtmp, { x86_fp80, x86_fp80 }* byval %iz ) nounwind + call void @ccoshl( { x86_fp80, x86_fp80 }* noalias sret %memtmp, { x86_fp80, x86_fp80 }* byval align 8 %iz ) nounwind %memtmp14 = bitcast { x86_fp80, x86_fp80 }* %memtmp to i8* ; <i8*> [#uses=1] %agg.result15 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; <i8*> [#uses=1] call void @llvm.memcpy.i32( i8* %agg.result15, i8* %memtmp14, i32 32, i32 16 ) diff --git a/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll b/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll new file mode 100644 index 0000000..201903e --- /dev/null +++ b/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll @@ -0,0 +1,276 @@ +; RUN: opt -mergefunc %s -disable-output +; This used to crash. + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-pc-linux-gnu" + +%"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" } +%"struct.kc::impl_CexpressionDQ" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_CexpressionDQ"* } +%"struct.kc::impl_Ctext" = type { %"struct.kc::impl_Ccode_option", i32, %"struct.kc::impl_casestring__Str"*, %"struct.kc::impl_Ctext_elem"*, %"struct.kc::impl_Ctext"* } +%"struct.kc::impl_Ctext_elem" = type { %"struct.kc::impl_abstract_phylum", i32, %"struct.kc::impl_casestring__Str"* } +%"struct.kc::impl_ID" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_casestring__Str"*, i32, %"struct.kc::impl_casestring__Str"* } +%"struct.kc::impl_abstract_phylum" = type { i32 (...)** } +%"struct.kc::impl_ac_abstract_declarator_AcAbsdeclDirdecl" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_Ccode_option"* } +%"struct.kc::impl_casestring__Str" = type { %"struct.kc::impl_abstract_phylum", i8* } +%"struct.kc::impl_elem_patternrepresentation" = type { %"struct.kc::impl_abstract_phylum", i32, %"struct.kc::impl_casestring__Str"*, %"struct.kc::impl_ID"* } +%"struct.kc::impl_fileline" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_casestring__Str"*, i32 } +%"struct.kc::impl_fileline_FileLine" = type { %"struct.kc::impl_fileline" } +%"struct.kc::impl_outmostpatterns" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_elem_patternrepresentation"*, %"struct.kc::impl_outmostpatterns"* } +%"struct.kc::impl_withcaseinfo_Withcaseinfo" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_outmostpatterns"*, %"struct.kc::impl_outmostpatterns"*, %"struct.kc::impl_Ctext"* } + +@_ZTVN2kc13impl_filelineE = external constant [13 x i32 (...)*], align 32 +@.str = external constant [1 x i8], align 1 +@_ZTVN2kc22impl_fileline_FileLineE = external constant [13 x i32 (...)*], align 32 + +define void @_ZN2kc22impl_fileline_FileLineC2EPNS_20impl_casestring__StrEi(%"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_casestring__Str"* %_file, i32 %_line) align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline_FileLine"*, align 4 + %_file_addr = alloca %"struct.kc::impl_casestring__Str"*, align 4 + %_line_addr = alloca i32, align 4 + %save_filt.150 = alloca i32 + %save_eptr.149 = alloca i8* + %iftmp.99 = alloca %"struct.kc::impl_casestring__Str"* + %eh_exception = alloca i8* + %eh_selector = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_fileline_FileLine"** %this_addr + store %"struct.kc::impl_casestring__Str"* %_file, %"struct.kc::impl_casestring__Str"** %_file_addr + store i32 %_line, i32* %_line_addr + %0 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %0, i32 0, i32 0 + call void @_ZN2kc13impl_filelineC2Ev() nounwind + %2 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %3 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %2, i32 0, i32 0 + %4 = getelementptr inbounds %"struct.kc::impl_fileline"* %3, i32 0, i32 0 + %5 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %4, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc22impl_fileline_FileLineE, i32 0, i32 2), i32 (...)*** %5, align 4 + %6 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + %7 = icmp eq %"struct.kc::impl_casestring__Str"* %6, null + br i1 %7, label %bb, label %bb1 + +bb: ; preds = %entry + %8 = invoke %"struct.kc::impl_casestring__Str"* @_ZN2kc12mkcasestringEPKci() + to label %invcont unwind label %lpad + +invcont: ; preds = %bb + store %"struct.kc::impl_casestring__Str"* %8, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb1: ; preds = %entry + %9 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + store %"struct.kc::impl_casestring__Str"* %9, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb2: ; preds = %bb1, %invcont + %10 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %11 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %10, i32 0, i32 0 + %12 = getelementptr inbounds %"struct.kc::impl_fileline"* %11, i32 0, i32 1 + %13 = load %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + store %"struct.kc::impl_casestring__Str"* %13, %"struct.kc::impl_casestring__Str"** %12, align 4 + %14 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %15 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %14, i32 0, i32 0 + %16 = getelementptr inbounds %"struct.kc::impl_fileline"* %15, i32 0, i32 2 + %17 = load i32* %_line_addr, align 4 + store i32 %17, i32* %16, align 4 + ret void + +lpad: ; preds = %bb + %eh_ptr = call i8* @llvm.eh.exception() + store i8* %eh_ptr, i8** %eh_exception + %eh_ptr4 = load i8** %eh_exception + %eh_select5 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr4, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 0) + store i32 %eh_select5, i32* %eh_selector + %eh_select = load i32* %eh_selector + store i32 %eh_select, i32* %save_filt.150, align 4 + %eh_value = load i8** %eh_exception + store i8* %eh_value, i8** %save_eptr.149, align 4 + %18 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %19 = bitcast %"struct.kc::impl_fileline_FileLine"* %18 to %"struct.kc::impl_fileline"* + call void @_ZN2kc13impl_filelineD2Ev(%"struct.kc::impl_fileline"* %19) nounwind + %20 = load i8** %save_eptr.149, align 4 + store i8* %20, i8** %eh_exception, align 4 + %21 = load i32* %save_filt.150, align 4 + store i32 %21, i32* %eh_selector, align 4 + %eh_ptr6 = load i8** %eh_exception + call void @_Unwind_Resume_or_Rethrow() + unreachable +} + +declare void @_ZN2kc13impl_filelineC2Ev() nounwind align 2 + +define void @_ZN2kc13impl_filelineD1Ev(%"struct.kc::impl_fileline"* %this) nounwind align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline"*, align 4 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline"* %this, %"struct.kc::impl_fileline"** %this_addr + %0 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline"* %0, i32 0, i32 0 + %2 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %1, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc13impl_filelineE, i32 0, i32 2), i32 (...)*** %2, align 4 + %3 = trunc i32 0 to i8 + %toBool = icmp ne i8 %3, 0 + br i1 %toBool, label %bb1, label %return + +bb1: ; preds = %entry + %4 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %5 = bitcast %"struct.kc::impl_fileline"* %4 to i8* + call void @_ZdlPv() nounwind + br label %return + +return: ; preds = %bb1, %entry + ret void +} + +declare void @_ZdlPv() nounwind + +define void @_ZN2kc13impl_filelineD2Ev(%"struct.kc::impl_fileline"* %this) nounwind align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline"*, align 4 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline"* %this, %"struct.kc::impl_fileline"** %this_addr + %0 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline"* %0, i32 0, i32 0 + %2 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %1, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc13impl_filelineE, i32 0, i32 2), i32 (...)*** %2, align 4 + %3 = trunc i32 0 to i8 + %toBool = icmp ne i8 %3, 0 + br i1 %toBool, label %bb1, label %return + +bb1: ; preds = %entry + %4 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %5 = bitcast %"struct.kc::impl_fileline"* %4 to i8* + call void @_ZdlPv() nounwind + br label %return + +return: ; preds = %bb1, %entry + ret void +} + +define void @_ZN2kc22impl_fileline_FileLineC1EPNS_20impl_casestring__StrEi(%"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_casestring__Str"* %_file, i32 %_line) align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline_FileLine"*, align 4 + %_file_addr = alloca %"struct.kc::impl_casestring__Str"*, align 4 + %_line_addr = alloca i32, align 4 + %save_filt.148 = alloca i32 + %save_eptr.147 = alloca i8* + %iftmp.99 = alloca %"struct.kc::impl_casestring__Str"* + %eh_exception = alloca i8* + %eh_selector = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_fileline_FileLine"** %this_addr + store %"struct.kc::impl_casestring__Str"* %_file, %"struct.kc::impl_casestring__Str"** %_file_addr + store i32 %_line, i32* %_line_addr + %0 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %0, i32 0, i32 0 + call void @_ZN2kc13impl_filelineC2Ev() nounwind + %2 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %3 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %2, i32 0, i32 0 + %4 = getelementptr inbounds %"struct.kc::impl_fileline"* %3, i32 0, i32 0 + %5 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %4, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc22impl_fileline_FileLineE, i32 0, i32 2), i32 (...)*** %5, align 4 + %6 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + %7 = icmp eq %"struct.kc::impl_casestring__Str"* %6, null + br i1 %7, label %bb, label %bb1 + +bb: ; preds = %entry + %8 = invoke %"struct.kc::impl_casestring__Str"* @_ZN2kc12mkcasestringEPKci() + to label %invcont unwind label %lpad + +invcont: ; preds = %bb + store %"struct.kc::impl_casestring__Str"* %8, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb1: ; preds = %entry + %9 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + store %"struct.kc::impl_casestring__Str"* %9, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb2: ; preds = %bb1, %invcont + %10 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %11 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %10, i32 0, i32 0 + %12 = getelementptr inbounds %"struct.kc::impl_fileline"* %11, i32 0, i32 1 + %13 = load %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + store %"struct.kc::impl_casestring__Str"* %13, %"struct.kc::impl_casestring__Str"** %12, align 4 + %14 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %15 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %14, i32 0, i32 0 + %16 = getelementptr inbounds %"struct.kc::impl_fileline"* %15, i32 0, i32 2 + %17 = load i32* %_line_addr, align 4 + store i32 %17, i32* %16, align 4 + ret void + +lpad: ; preds = %bb + %eh_ptr = call i8* @llvm.eh.exception() + store i8* %eh_ptr, i8** %eh_exception + %eh_ptr4 = load i8** %eh_exception + %eh_select5 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr4, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 0) + store i32 %eh_select5, i32* %eh_selector + %eh_select = load i32* %eh_selector + store i32 %eh_select, i32* %save_filt.148, align 4 + %eh_value = load i8** %eh_exception + store i8* %eh_value, i8** %save_eptr.147, align 4 + %18 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %19 = bitcast %"struct.kc::impl_fileline_FileLine"* %18 to %"struct.kc::impl_fileline"* + call void @_ZN2kc13impl_filelineD2Ev(%"struct.kc::impl_fileline"* %19) nounwind + %20 = load i8** %save_eptr.147, align 4 + store i8* %20, i8** %eh_exception, align 4 + %21 = load i32* %save_filt.148, align 4 + store i32 %21, i32* %eh_selector, align 4 + %eh_ptr6 = load i8** %eh_exception + call void @_Unwind_Resume_or_Rethrow() + unreachable +} + +declare i8* @llvm.eh.exception() nounwind readonly + +declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind + +declare i32 @__gxx_personality_v0(...) + +declare void @_Unwind_Resume_or_Rethrow() + +define void @_ZN2kc21printer_functor_classC2Ev(%"struct.kc::impl_abstract_phylum"* %this) nounwind align 2 { +entry: + unreachable +} + +define %"struct.kc::impl_Ccode_option"* @_ZN2kc11phylum_castIPNS_17impl_withcaseinfoES1_EET_PT0_(%"struct.kc::impl_Ccode_option"* %t) nounwind { +entry: + ret %"struct.kc::impl_Ccode_option"* null +} + +define %"struct.kc::impl_abstract_phylum"* @_ZNK2kc43impl_ac_direct_declarator_AcDirectDeclProto9subphylumEi(%"struct.kc::impl_ac_abstract_declarator_AcAbsdeclDirdecl"* %this, i32 %no) nounwind align 2 { +entry: + ret %"struct.kc::impl_abstract_phylum"* undef +} + +define void @_ZN2kc30impl_withcaseinfo_WithcaseinfoD0Ev(%"struct.kc::impl_withcaseinfo_Withcaseinfo"* %this) nounwind align 2 { +entry: + unreachable +} + +define void @_ZN2kc30impl_withcaseinfo_WithcaseinfoC1EPNS_26impl_patternrepresentationES2_PNS_10impl_CtextE(%"struct.kc::impl_withcaseinfo_Withcaseinfo"* %this, %"struct.kc::impl_outmostpatterns"* %_patternrepresentation_1, %"struct.kc::impl_outmostpatterns"* %_patternrepresentation_2, %"struct.kc::impl_Ctext"* %_Ctext_1) nounwind align 2 { +entry: + unreachable +} + +define void @_ZN2kc21impl_rewriteviewsinfoC2EPNS_20impl_rewriteviewinfoEPS0_(%"struct.kc::impl_CexpressionDQ"* %this, %"struct.kc::impl_Ccode_option"* %p1, %"struct.kc::impl_CexpressionDQ"* %p2) nounwind align 2 { +entry: + unreachable +} + +define %"struct.kc::impl_Ctext_elem"* @_ZN2kc11phylum_castIPNS_9impl_termENS_20impl_abstract_phylumEEET_PT0_(%"struct.kc::impl_abstract_phylum"* %t) nounwind { +entry: + unreachable +} + +define void @_ZN2kc27impl_ac_parameter_type_listD2Ev(%"struct.kc::impl_Ccode_option"* %this) nounwind align 2 { +entry: + ret void +} + +define void @_ZN2kc21impl_ac_operator_nameD2Ev(%"struct.kc::impl_Ctext_elem"* %this) nounwind align 2 { +entry: + ret void +} + +declare %"struct.kc::impl_casestring__Str"* @_ZN2kc12mkcasestringEPKci() diff --git a/test/Transforms/MergeFunc/fold-weak.ll b/test/Transforms/MergeFunc/fold-weak.ll index e124731..23e4d33 100644 --- a/test/Transforms/MergeFunc/fold-weak.ll +++ b/test/Transforms/MergeFunc/fold-weak.ll @@ -1,6 +1,10 @@ ; RUN: opt < %s -mergefunc -S > %t ; RUN: grep {define weak} %t | count 2 ; RUN: grep {call} %t | count 2 +; XFAIL: * + +; This test is off for a bit as we change this particular sort of folding to +; only apply on ELF systems and not Mach-O systems. define weak i32 @sum(i32 %x, i32 %y) { %sum = add i32 %x, %y diff --git a/test/Transforms/MergeFunc/vector.ll b/test/Transforms/MergeFunc/vector.ll new file mode 100644 index 0000000..6954fce --- /dev/null +++ b/test/Transforms/MergeFunc/vector.ll @@ -0,0 +1,76 @@ +; RUN: opt -mergefunc -stats -disable-output < %s |& grep {functions merged} + +; This test is checks whether we can merge +; vector<intptr_t>::push_back(0) +; and +; vector<void *>::push_back(0) +; . + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +%0 = type { i32, void ()* } +%1 = type { i64, i1 } +%"class.std::vector" = type { [24 x i8] } + +@vi = global %"class.std::vector" zeroinitializer, align 8 +@__dso_handle = external unnamed_addr global i8* +@vp = global %"class.std::vector" zeroinitializer, align 8 +@llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @_GLOBAL__I_a }] + +define linkonce_odr void @_ZNSt6vectorIlSaIlEED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 { +entry: + %tmp2.i.i = bitcast %"class.std::vector"* %this to i64** + %tmp3.i.i = load i64** %tmp2.i.i, align 8, !tbaa !0 + %tobool.i.i.i = icmp eq i64* %tmp3.i.i, null + br i1 %tobool.i.i.i, label %_ZNSt6vectorIlSaIlEED2Ev.exit, label %if.then.i.i.i + +if.then.i.i.i: ; preds = %entry + %0 = bitcast i64* %tmp3.i.i to i8* + tail call void @_ZdlPv(i8* %0) nounwind + ret void + +_ZNSt6vectorIlSaIlEED2Ev.exit: ; preds = %entry + ret void +} + +declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) + +define linkonce_odr void @_ZNSt6vectorIPvSaIS0_EED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 { +entry: + %tmp2.i.i = bitcast %"class.std::vector"* %this to i8*** + %tmp3.i.i = load i8*** %tmp2.i.i, align 8, !tbaa !0 + %tobool.i.i.i = icmp eq i8** %tmp3.i.i, null + br i1 %tobool.i.i.i, label %_ZNSt6vectorIPvSaIS0_EED2Ev.exit, label %if.then.i.i.i + +if.then.i.i.i: ; preds = %entry + %0 = bitcast i8** %tmp3.i.i to i8* + tail call void @_ZdlPv(i8* %0) nounwind + ret void + +_ZNSt6vectorIPvSaIS0_EED2Ev.exit: ; preds = %entry + ret void +} + +declare void @_Z1fv() + +declare void @_ZNSt6vectorIPvSaIS0_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS0_S2_EERKS0_(%"class.std::vector"* nocapture %this, i8** %__position.coerce, i8** nocapture %__x) align 2 + +declare void @_ZdlPv(i8*) nounwind + +declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +declare void @_ZSt17__throw_bad_allocv() noreturn + +declare noalias i8* @_Znwm(i64) + +declare void @_ZNSt6vectorIlSaIlEE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPlS1_EERKl(%"class.std::vector"* nocapture %this, i64* %__position.coerce, i64* nocapture %__x) align 2 + +declare void @_GLOBAL__I_a() + +declare %1 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone + +!0 = metadata !{metadata !"any pointer", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} +!3 = metadata !{metadata !"long", metadata !1} diff --git a/test/Transforms/PartialSpecialize/heuristics.ll b/test/Transforms/PartialSpecialize/heuristics.ll deleted file mode 100644 index 5ccf9ad..0000000 --- a/test/Transforms/PartialSpecialize/heuristics.ll +++ /dev/null @@ -1,49 +0,0 @@ -; If there are not enough callsites for a particular specialization to -; justify its existence, the specialization shouldn't be created. -; -; RUN: opt -S -partialspecialization -disable-inlining %s | FileCheck %s -declare void @callback1() -declare void @callback2() - -declare void @othercall() - -define internal void @UseCallback(void()* %pCallback) { - call void %pCallback() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - call void @othercall() - ret void -} - -define void @foo(void()* %pNonConstCallback) -{ -Entry: -; CHECK: Entry -; CHECK-NOT: call void @UseCallback(void ()* @callback1) -; CHECK: call void @UseCallback(void ()* @callback2) -; CHECK-NEXT: call void @UseCallback(void ()* @callback2) -; CHECK-NEXT: ret void - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback2) - call void @UseCallback(void()* @callback2) - - ret void -} diff --git a/test/Transforms/PartialSpecialize/two-specializations.ll b/test/Transforms/PartialSpecialize/two-specializations.ll deleted file mode 100644 index bc3da22..0000000 --- a/test/Transforms/PartialSpecialize/two-specializations.ll +++ /dev/null @@ -1,37 +0,0 @@ -; If there are two specializations of a function, make sure each callsite -; calls the right one. -; -; RUN: opt -S -partialspecialization -disable-inlining %s | opt -S -inline | FileCheck %s -check-prefix=CORRECT -; RUN: opt -S -partialspecialization -disable-inlining %s | FileCheck %s -declare void @callback1() -declare void @callback2() - -define internal void @UseCallback(void()* %pCallback) { - call void %pCallback() - ret void -} - -define void @foo(void()* %pNonConstCallback) -{ -Entry: -; CORRECT: Entry -; CORRECT-NEXT: call void @callback1() -; CORRECT-NEXT: call void @callback1() -; CORRECT-NEXT: call void @callback2() -; CORRECT-NEXT: call void %pNonConstCallback() -; CORRECT-NEXT: call void @callback1() -; CORRECT-NEXT: call void @callback2() -; CORRECT-NEXT: call void @callback2() -; CHECK: Entry -; CHECK-NOT: call void @UseCallback(void ()* @callback1) -; CHECK-NOT: call void @UseCallback(void ()* @callback2) -; CHECK: ret void - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback2) - call void @UseCallback(void()* %pNonConstCallback) - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback2) - call void @UseCallback(void()* @callback2) - ret void -} diff --git a/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll b/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll new file mode 100644 index 0000000..e6c76b3 --- /dev/null +++ b/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll @@ -0,0 +1,35 @@ +; RUN: opt < %s -reassociate +; PR9039 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-gnu-linux" + +%ada__tags__T15s = type void () + +define void @exp_averages_intraday__deviation() { +entry: + %0 = load i32* undef, align 4 + %1 = shl i32 %0, 2 + %2 = add nsw i32 undef, %1 + %3 = add nsw i32 %2, undef + %4 = mul nsw i32 %0, 12 + %5 = add nsw i32 %3, %4 + %6 = add nsw i32 %5, %4 + %7 = add nsw i32 %6, undef + br i1 false, label %"4", label %"12" + +"4": ; preds = %entry + br i1 undef, label %"5", label %"8" + +"5": ; preds = %"4" + unreachable + +"8": ; preds = %"4" + %8 = getelementptr inbounds i8* undef, i32 %6 + br i1 undef, label %"13", label %"12" + +"12": ; preds = %"8", %entry + ret void + +"13": ; preds = %"8" + ret void +} diff --git a/test/Transforms/Reassociate/optional-flags.ll b/test/Transforms/Reassociate/optional-flags.ll new file mode 100644 index 0000000..40f7d5b --- /dev/null +++ b/test/Transforms/Reassociate/optional-flags.ll @@ -0,0 +1,29 @@ +; RUN: opt -S -reassociate < %s | FileCheck %s +; rdar://8944681 + +; Reassociate should clear optional flags like nsw when reassociating. + +; CHECK: @test0 +; CHECK: %y = add i64 %b, %a +; CHECK: %z = add i64 %y, %c +define i64 @test0(i64 %a, i64 %b, i64 %c) { + %y = add nsw i64 %c, %b + %z = add i64 %y, %a + ret i64 %z +} + +; CHECK: @test1 +; CHECK: %y = add i64 %b, %a +; CHECK: %z = add i64 %y, %c +define i64 @test1(i64 %a, i64 %b, i64 %c) { + %y = add i64 %c, %b + %z = add nsw i64 %y, %a + ret i64 %z +} + +; PR9215 +; CHECK: %s = add nsw i32 %y, %x +define i32 @test2(i32 %x, i32 %y) { + %s = add nsw i32 %x, %y + ret i32 %s +} diff --git a/test/Transforms/ScalarRepl/2003-05-30-InvalidIndices.ll b/test/Transforms/ScalarRepl/2003-05-30-InvalidIndices.ll deleted file mode 100644 index b147ec9..0000000 --- a/test/Transforms/ScalarRepl/2003-05-30-InvalidIndices.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: opt < %s -scalarrepl - -define void @main() { - %E = alloca { { i32, float, double, i64 }, { i32, float, double, i64 } } ; <{ { i32, float, double, i64 }, { i32, float, double, i64 } }*> [#uses=1] - %tmp.151 = getelementptr { { i32, float, double, i64 }, { i32, float, double, i64 } }* %E, i64 0, i32 1, i32 3 ; <i64*> [#uses=0] - ret void -} - diff --git a/test/Transforms/ScalarRepl/2003-05-30-MultiLevel.ll b/test/Transforms/ScalarRepl/2003-05-30-MultiLevel.ll deleted file mode 100644 index 89c0b05..0000000 --- a/test/Transforms/ScalarRepl/2003-05-30-MultiLevel.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: opt < %s -scalarrepl - -define i32 @test() { - %X = alloca { [4 x i32] } ; <{ [4 x i32] }*> [#uses=1] - %Y = getelementptr { [4 x i32] }* %X, i64 0, i32 0, i64 2 ; <i32*> [#uses=2] - store i32 4, i32* %Y - %Z = load i32* %Y ; <i32> [#uses=1] - ret i32 %Z -} - diff --git a/test/Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll b/test/Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll deleted file mode 100644 index ea23c31..0000000 --- a/test/Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll +++ /dev/null @@ -1,28 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output - -target datalayout = "E-p:32:32" - %struct.rtx_def = type { [2 x i8], i32, [1 x %union.rtunion_def] } - %union.rtunion_def = type { i32 } - -define void @find_reloads() { -entry: - %c_addr.i = alloca i8 ; <i8*> [#uses=1] - switch i32 0, label %return [ - i32 36, label %label.7 - i32 34, label %label.7 - i32 41, label %label.5 - ] -label.5: ; preds = %entry - ret void -label.7: ; preds = %entry, %entry - br i1 false, label %then.4, label %switchexit.0 -then.4: ; preds = %label.7 - %tmp.0.i = bitcast i8* %c_addr.i to i32* ; <i32*> [#uses=1] - store i32 44, i32* %tmp.0.i - ret void -switchexit.0: ; preds = %label.7 - ret void -return: ; preds = %entry - ret void -} - diff --git a/test/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll b/test/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll deleted file mode 100644 index 03c7452..0000000 --- a/test/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output - -target datalayout = "E-p:32:32" - -define i32 @test(i64 %L) { - %X = alloca i32 ; <i32*> [#uses=2] - %Y = bitcast i32* %X to i64* ; <i64*> [#uses=1] - store i64 0, i64* %Y - %Z = load i32* %X ; <i32> [#uses=1] - ret i32 %Z -} - diff --git a/test/Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll b/test/Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll deleted file mode 100644 index 63840f1..0000000 --- a/test/Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output - -define void @output_toc() { -entry: - %buf = alloca [256 x i8], align 16 ; <[256 x i8]*> [#uses=1] - %name = alloca i8*, align 4 ; <i8**> [#uses=1] - %real_name = alloca i8*, align 4 ; <i8**> [#uses=0] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - %buf.upgrd.1 = bitcast [256 x i8]* %buf to i8* ; <i8*> [#uses=1] - store i8* %buf.upgrd.1, i8** %name - call void @abort( ) - unreachable -return: ; No predecessors! - ret void -} - -declare void @abort() - diff --git a/test/Transforms/ScalarRepl/2006-10-23-PointerUnionCrash.ll b/test/Transforms/ScalarRepl/2006-10-23-PointerUnionCrash.ll deleted file mode 100644 index dcd7e53..0000000 --- a/test/Transforms/ScalarRepl/2006-10-23-PointerUnionCrash.ll +++ /dev/null @@ -1,57 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output -; END. -target datalayout = "e-p:32:32" -target triple = "i686-apple-darwin8.7.2" - -define void @glgProcessColor() { -entry: - %source_ptr = alloca i8*, align 4 ; <i8**> [#uses=2] - br i1 false, label %bb1357, label %cond_next583 -cond_next583: ; preds = %entry - ret void -bb1357: ; preds = %entry - br i1 false, label %bb1365, label %bb27055 -bb1365: ; preds = %bb1357 - switch i32 0, label %cond_next10377 [ - i32 0, label %bb4679 - i32 1, label %bb4679 - i32 2, label %bb4679 - i32 3, label %bb4679 - i32 4, label %bb5115 - i32 5, label %bb6651 - i32 6, label %bb7147 - i32 7, label %bb8683 - i32 8, label %bb9131 - i32 9, label %bb9875 - i32 10, label %bb4679 - i32 11, label %bb4859 - i32 12, label %bb4679 - i32 16, label %bb10249 - ] -bb4679: ; preds = %bb1365, %bb1365, %bb1365, %bb1365, %bb1365, %bb1365 - ret void -bb4859: ; preds = %bb1365 - ret void -bb5115: ; preds = %bb1365 - ret void -bb6651: ; preds = %bb1365 - ret void -bb7147: ; preds = %bb1365 - ret void -bb8683: ; preds = %bb1365 - ret void -bb9131: ; preds = %bb1365 - ret void -bb9875: ; preds = %bb1365 - %source_ptr9884 = bitcast i8** %source_ptr to i8** ; <i8**> [#uses=1] - %tmp9885 = load i8** %source_ptr9884 ; <i8*> [#uses=0] - ret void -bb10249: ; preds = %bb1365 - %source_ptr10257 = bitcast i8** %source_ptr to i16** ; <i16**> [#uses=1] - %tmp10258 = load i16** %source_ptr10257 ; <i16*> [#uses=0] - ret void -cond_next10377: ; preds = %bb1365 - ret void -bb27055: ; preds = %bb1357 - ret void -} diff --git a/test/Transforms/ScalarRepl/2006-12-11-SROA-Crash.ll b/test/Transforms/ScalarRepl/2006-12-11-SROA-Crash.ll deleted file mode 100644 index 2606203..0000000 --- a/test/Transforms/ScalarRepl/2006-12-11-SROA-Crash.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output -; PR1045 - -target datalayout = "e-p:32:32" -target triple = "i686-pc-linux-gnu" - %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>" = type { %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"* } - %"struct.__gnu_cxx::bitmap_allocator<char>" = type { i8 } - %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block" = type { [8 x i8] } - -define void @_ZN9__gnu_cxx16bitmap_allocatorIwE27_M_deallocate_single_objectEPw() { -entry: - %this_addr.i = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"**> [#uses=3] - %tmp = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>", align 4 ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] - store %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp, %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i - %tmp.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] - %tmp.i.upgrd.1 = bitcast %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp.i to %"struct.__gnu_cxx::bitmap_allocator<char>"* ; <%"struct.__gnu_cxx::bitmap_allocator<char>"*> [#uses=0] - %tmp1.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] - %tmp.i.upgrd.2 = getelementptr %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp1.i, i32 0, i32 0 ; <%"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"**> [#uses=0] - unreachable -} diff --git a/test/Transforms/ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll b/test/Transforms/ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll deleted file mode 100644 index bd49106..0000000 --- a/test/Transforms/ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll +++ /dev/null @@ -1,44 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" -target triple = "arm-apple-darwin8" - %struct.CGPoint = type { float, float } - %struct.aal_big_range_t = type { i32, i32 } - %struct.aal_callback_t = type { i8* (i8*, i32)*, void (i8*, i8*)* } - %struct.aal_edge_pool_t = type { %struct.aal_edge_pool_t*, i32, i32, [0 x %struct.aal_edge_t] } - %struct.aal_edge_t = type { %struct.CGPoint, %struct.CGPoint, i32 } - %struct.aal_range_t = type { i16, i16 } - %struct.aal_span_pool_t = type { %struct.aal_span_pool_t*, [341 x %struct.aal_span_t] } - %struct.aal_span_t = type { %struct.aal_span_t*, %struct.aal_big_range_t } - %struct.aal_spanarray_t = type { [2 x %struct.aal_range_t] } - %struct.aal_spanbucket_t = type { i16, [2 x i8], %struct.anon } - %struct.aal_state_t = type { %struct.CGPoint, %struct.CGPoint, %struct.CGPoint, i32, float, float, float, float, %struct.CGPoint, %struct.CGPoint, float, float, float, float, i32, i32, i32, i32, float, float, i8*, i32, i32, %struct.aal_edge_pool_t*, %struct.aal_edge_pool_t*, i8*, %struct.aal_callback_t*, i32, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_pool_t*, i8, float, i8, i32 } - %struct.anon = type { %struct.aal_spanarray_t } - - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -define fastcc void @aal_insert_span() { -entry: - %SB = alloca %struct.aal_spanbucket_t, align 4 ; <%struct.aal_spanbucket_t*> [#uses=2] - br i1 false, label %cond_true, label %cond_next79 - -cond_true: ; preds = %entry - br i1 false, label %cond_next, label %cond_next114.i - -cond_next114.i: ; preds = %cond_true - ret void - -cond_next: ; preds = %cond_true - %SB19 = bitcast %struct.aal_spanbucket_t* %SB to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %SB19, i8* null, i32 12, i32 0 ) - br i1 false, label %cond_next34, label %cond_next79 - -cond_next34: ; preds = %cond_next - %i.2.reload22 = load i32* null ; <i32> [#uses=1] - %tmp51 = getelementptr %struct.aal_spanbucket_t* %SB, i32 0, i32 2, i32 0, i32 0, i32 %i.2.reload22, i32 1 ; <i16*> [#uses=0] - ret void - -cond_next79: ; preds = %cond_next, %entry - ret void -} diff --git a/test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll b/test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll deleted file mode 100644 index 62f7d19d..0000000 --- a/test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: opt < %s -scalarrepl | llvm-dis -; PR3304 - - %struct.c37304a__vrec = type { i8, %struct.c37304a__vrec___disc___XVN } - %struct.c37304a__vrec___disc___XVN = type { -%struct.c37304a__vrec___disc___XVN___O } - %struct.c37304a__vrec___disc___XVN___O = type { } - -define void @_ada_c37304a() { -entry: - %v = alloca %struct.c37304a__vrec - %0 = getelementptr %struct.c37304a__vrec* %v, i32 0, i32 0 - store i8 8, i8* %0, align 1 - unreachable -} diff --git a/test/Transforms/ScalarRepl/2009-04-21-ZeroLengthMemSet.ll b/test/Transforms/ScalarRepl/2009-04-21-ZeroLengthMemSet.ll deleted file mode 100644 index c5ebf8e..0000000 --- a/test/Transforms/ScalarRepl/2009-04-21-ZeroLengthMemSet.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: opt < %s -scalarrepl | llvm-dis -; rdar://6808691 -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "x86_64-apple-darwin9.0" - type <{ i32, i16, i8, i8, i64, i64, i16, [0 x i16] }> - -define i32 @foo() { -entry: - %.compoundliteral = alloca %0 - %tmp228 = getelementptr %0* %.compoundliteral, i32 0, i32 7 - %tmp229 = bitcast [0 x i16]* %tmp228 to i8* - call void @llvm.memset.i64(i8* %tmp229, i8 0, i64 0, i32 2) - unreachable -} - -declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind diff --git a/test/Transforms/ScalarRepl/2009-05-08-I1Crash.ll b/test/Transforms/ScalarRepl/2009-05-08-I1Crash.ll deleted file mode 100644 index aa3487b..0000000 --- a/test/Transforms/ScalarRepl/2009-05-08-I1Crash.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: opt < %s -scalarrepl | llvm-dis -; PR4146 - - %wrapper = type { i1 } - -define void @f() { -entry: - %w = alloca %wrapper, align 8 ; <%wrapper*> [#uses=1] - %0 = getelementptr %wrapper* %w, i64 0, i32 0 ; <i1*> - store i1 true, i1* %0 - ret void -} diff --git a/test/Transforms/ScalarRepl/2009-06-01-BitcastIntPadding.ll b/test/Transforms/ScalarRepl/2009-06-01-BitcastIntPadding.ll deleted file mode 100644 index cecbdd4..0000000 --- a/test/Transforms/ScalarRepl/2009-06-01-BitcastIntPadding.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: opt < %s -scalarrepl -; PR4286 - -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "x86_64-undermydesk-freebsd8.0" - %struct.singlebool = type <{ i8 }> - -define zeroext i8 @doit() nounwind { -entry: - %a = alloca %struct.singlebool, align 1 ; <%struct.singlebool*> [#uses=2] - %storetmp.i = bitcast %struct.singlebool* %a to i1* ; <i1*> [#uses=1] - store i1 true, i1* %storetmp.i - %tmp = getelementptr %struct.singlebool* %a, i64 0, i32 0 ; <i8*> [#uses=1] - %tmp1 = load i8* %tmp ; <i8> [#uses=1] - ret i8 %tmp1 -} - diff --git a/test/Transforms/ScalarRepl/2009-08-16-VLA.ll b/test/Transforms/ScalarRepl/2009-08-16-VLA.ll deleted file mode 100644 index d69af11..0000000 --- a/test/Transforms/ScalarRepl/2009-08-16-VLA.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-opt - - %struct.Item = type { [4 x i16], %struct.rule* } - %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 } - %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* } - %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* } - %struct.list = type { i8*, %struct.list* } - %struct.stateMap = type { i8*, %struct.plank*, i32, i16* } - %struct.plank = type { i8*, %struct.list*, i32 } - %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] } - %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* } - %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** } - %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* } - %struct.Index_Map = type { i32, %struct.item_set** } - %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* } - %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** } - -define void @addHP_2_0() { -bb4.i: - %0 = malloc [0 x %struct.Item] ; <[0 x %struct.Item]*> [#uses=1] - %.sub.i.c.i = getelementptr [0 x %struct.Item]* %0, i32 0, i32 0 ; <%struct.Item*> [#uses=0] - unreachable -} diff --git a/test/Transforms/ScalarRepl/basictest.ll b/test/Transforms/ScalarRepl/basictest.ll index a26b62d..9676873 100644 --- a/test/Transforms/ScalarRepl/basictest.ll +++ b/test/Transforms/ScalarRepl/basictest.ll @@ -1,11 +1,30 @@ -; RUN: opt < %s -scalarrepl -mem2reg -S | not grep alloca +; RUN: opt < %s -scalarrepl -S | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -define i32 @test() { +define i32 @test1() { %X = alloca { i32, float } ; <{ i32, float }*> [#uses=1] %Y = getelementptr { i32, float }* %X, i64 0, i32 0 ; <i32*> [#uses=2] store i32 0, i32* %Y %Z = load i32* %Y ; <i32> [#uses=1] ret i32 %Z +; CHECK: @test1 +; CHECK-NOT: alloca +; CHECK: ret i32 0 +} + +; PR8980 +define i64 @test2(i64 %X) { + %A = alloca [8 x i8] + %B = bitcast [8 x i8]* %A to i64* + + store i64 %X, i64* %B + br label %L2 + +L2: + %Z = load i64* %B ; <i32> [#uses=1] + ret i64 %Z +; CHECK: @test2 +; CHECK-NOT: alloca +; CHECK: ret i64 %X } diff --git a/test/Transforms/ScalarRepl/copy-aggregate.ll b/test/Transforms/ScalarRepl/copy-aggregate.ll index 2992413..997da4b 100644 --- a/test/Transforms/ScalarRepl/copy-aggregate.ll +++ b/test/Transforms/ScalarRepl/copy-aggregate.ll @@ -1,9 +1,11 @@ -; RUN: opt < %s -scalarrepl -S | not grep alloca +; RUN: opt < %s -scalarrepl -S | FileCheck %s ; PR3290 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" ;; Store of integer to whole alloca struct. define i32 @test1(i64 %V) nounwind { +; CHECK: test1 +; CHECK-NOT: alloca %X = alloca {{i32, i32}} %Y = bitcast {{i32,i32}}* %X to i64* store i64 %V, i64* %Y @@ -18,6 +20,8 @@ define i32 @test1(i64 %V) nounwind { ;; Store of integer to whole struct/array alloca. define float @test2(i128 %V) nounwind { +; CHECK: test2 +; CHECK-NOT: alloca %X = alloca {[4 x float]} %Y = bitcast {[4 x float]}* %X to i128* store i128 %V, i128* %Y @@ -32,6 +36,8 @@ define float @test2(i128 %V) nounwind { ;; Load of whole alloca struct as integer define i64 @test3(i32 %a, i32 %b) nounwind { +; CHECK: test3 +; CHECK-NOT: alloca %X = alloca {{i32, i32}} %A = getelementptr {{i32,i32}}* %X, i32 0, i32 0, i32 0 @@ -46,6 +52,8 @@ define i64 @test3(i32 %a, i32 %b) nounwind { ;; load of integer from whole struct/array alloca. define i128 @test4(float %a, float %b) nounwind { +; CHECK: test4 +; CHECK-NOT: alloca %X = alloca {[4 x float]} %A = getelementptr {[4 x float]}* %X, i32 0, i32 0, i32 0 %B = getelementptr {[4 x float]}* %X, i32 0, i32 0, i32 3 @@ -56,3 +64,45 @@ define i128 @test4(float %a, float %b) nounwind { %V = load i128* %Y ret i128 %V } + +;; If the elements of a struct or array alloca contain padding, SROA can still +;; split up the alloca as long as there is no padding between the elements. +%padded = type { i16, i8 } +%arr = type [4 x %padded] +define void @test5(%arr* %p, %arr* %q) { +entry: +; CHECK: test5 +; CHECK-NOT: i128 + %var = alloca %arr, align 4 + %vari8 = bitcast %arr* %var to i8* + %pi8 = bitcast %arr* %p to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %vari8, i8* %pi8, i32 16, i32 4, i1 false) + %qi8 = bitcast %arr* %q to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %qi8, i8* %vari8, i32 16, i32 4, i1 false) + ret void +} + +;; Check that an array alloca can be split up when it is also accessed with +;; a load or store as a homogeneous structure with the same element type and +;; number of elements as the array. +%homogeneous = type { <8 x i16>, <8 x i16>, <8 x i16> } +%wrapped_array = type { [3 x <8 x i16>] } +define void @test6(i8* %p, %wrapped_array* %arr) { +entry: +; CHECK: test6 +; CHECK: store <8 x i16> +; CHECK: store <8 x i16> +; CHECK: store <8 x i16> + %var = alloca %wrapped_array, align 16 + %res = call %homogeneous @test6callee(i8* %p) + %varcast = bitcast %wrapped_array* %var to %homogeneous* + store %homogeneous %res, %homogeneous* %varcast + %tmp1 = bitcast %wrapped_array* %arr to i8* + %tmp2 = bitcast %wrapped_array* %var to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp1, i8* %tmp2, i32 48, i32 16, i1 false) + ret void +} + +declare %homogeneous @test6callee(i8* nocapture) nounwind + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/Transforms/ScalarRepl/crash.ll b/test/Transforms/ScalarRepl/crash.ll new file mode 100644 index 0000000..7b62f09 --- /dev/null +++ b/test/Transforms/ScalarRepl/crash.ll @@ -0,0 +1,260 @@ +; RUN: opt -scalarrepl %s -disable-output +; RUN: opt -scalarrepl-ssa %s -disable-output + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; PR9017 +define void @test1() nounwind readnone ssp { +entry: + %l_72 = alloca i32*, align 8 + unreachable + +for.cond: ; preds = %for.cond + %tmp1.i = load i32** %l_72, align 8 + store i32* %tmp1.i, i32** %l_72, align 8 + br label %for.cond + +if.end: ; No predecessors! + ret void +} + + +define void @test2() { + %E = alloca { { i32, float, double, i64 }, { i32, float, double, i64 } } ; <{ { i32, float, double, i64 }, { i32, float, double, i64 } }*> [#uses=1] + %tmp.151 = getelementptr { { i32, float, double, i64 }, { i32, float, double, i64 } }* %E, i64 0, i32 1, i32 3 ; <i64*> [#uses=0] + ret void +} + +define i32 @test3() { + %X = alloca { [4 x i32] } ; <{ [4 x i32] }*> [#uses=1] + %Y = getelementptr { [4 x i32] }* %X, i64 0, i32 0, i64 2 ; <i32*> [#uses=2] + store i32 4, i32* %Y + %Z = load i32* %Y ; <i32> [#uses=1] + ret i32 %Z +} + + +%struct.rtx_def = type { [2 x i8], i32, [1 x %union.rtunion_def] } +%union.rtunion_def = type { i32 } + +define void @test4() { +entry: + %c_addr.i = alloca i8 ; <i8*> [#uses=1] + switch i32 0, label %return [ + i32 36, label %label.7 + i32 34, label %label.7 + i32 41, label %label.5 + ] +label.5: ; preds = %entry + ret void +label.7: ; preds = %entry, %entry + br i1 false, label %then.4, label %switchexit.0 +then.4: ; preds = %label.7 + %tmp.0.i = bitcast i8* %c_addr.i to i32* ; <i32*> [#uses=1] + store i32 44, i32* %tmp.0.i + ret void +switchexit.0: ; preds = %label.7 + ret void +return: ; preds = %entry + ret void +} + + +define void @test5() { +entry: + %source_ptr = alloca i8*, align 4 ; <i8**> [#uses=2] + br i1 false, label %bb1357, label %cond_next583 +cond_next583: ; preds = %entry + ret void +bb1357: ; preds = %entry + br i1 false, label %bb1365, label %bb27055 +bb1365: ; preds = %bb1357 + switch i32 0, label %cond_next10377 [ + i32 0, label %bb4679 + i32 1, label %bb4679 + i32 2, label %bb4679 + i32 3, label %bb4679 + i32 4, label %bb5115 + i32 5, label %bb6651 + i32 6, label %bb7147 + i32 7, label %bb8683 + i32 8, label %bb9131 + i32 9, label %bb9875 + i32 10, label %bb4679 + i32 11, label %bb4859 + i32 12, label %bb4679 + i32 16, label %bb10249 + ] +bb4679: ; preds = %bb1365, %bb1365, %bb1365, %bb1365, %bb1365, %bb1365 + ret void +bb4859: ; preds = %bb1365 + ret void +bb5115: ; preds = %bb1365 + ret void +bb6651: ; preds = %bb1365 + ret void +bb7147: ; preds = %bb1365 + ret void +bb8683: ; preds = %bb1365 + ret void +bb9131: ; preds = %bb1365 + ret void +bb9875: ; preds = %bb1365 + %source_ptr9884 = bitcast i8** %source_ptr to i8** ; <i8**> [#uses=1] + %tmp9885 = load i8** %source_ptr9884 ; <i8*> [#uses=0] + ret void +bb10249: ; preds = %bb1365 + %source_ptr10257 = bitcast i8** %source_ptr to i16** ; <i16**> [#uses=1] + %tmp10258 = load i16** %source_ptr10257 ; <i16*> [#uses=0] + ret void +cond_next10377: ; preds = %bb1365 + ret void +bb27055: ; preds = %bb1357 + ret void +} + + + %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>" = type { %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"* } + %"struct.__gnu_cxx::bitmap_allocator<char>" = type { i8 } + %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block" = type { [8 x i8] } + +; PR1045 +define void @test6() { +entry: + %this_addr.i = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"**> [#uses=3] + %tmp = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>", align 4 ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] + store %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp, %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i + %tmp.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] + %tmp.i.upgrd.1 = bitcast %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp.i to %"struct.__gnu_cxx::bitmap_allocator<char>"* ; <%"struct.__gnu_cxx::bitmap_allocator<char>"*> [#uses=0] + %tmp1.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] + %tmp.i.upgrd.2 = getelementptr %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp1.i, i32 0, i32 0 ; <%"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"**> [#uses=0] + unreachable +} + + %struct.CGPoint = type { float, float } + %struct.aal_big_range_t = type { i32, i32 } %struct.aal_callback_t = type { i8* (i8*, i32)*, void (i8*, i8*)* } %struct.aal_edge_pool_t = type { %struct.aal_edge_pool_t*, i32, i32, [0 x %struct.aal_edge_t] } %struct.aal_edge_t = type { %struct.CGPoint, %struct.CGPoint, i32 } + %struct.aal_range_t = type { i16, i16 } + %struct.aal_span_pool_t = type { %struct.aal_span_pool_t*, [341 x %struct.aal_span_t] } + %struct.aal_span_t = type { %struct.aal_span_t*, %struct.aal_big_range_t } + %struct.aal_spanarray_t = type { [2 x %struct.aal_range_t] } + %struct.aal_spanbucket_t = type { i16, [2 x i8], %struct.anon } + %struct.aal_state_t = type { %struct.CGPoint, %struct.CGPoint, %struct.CGPoint, i32, float, float, float, float, %struct.CGPoint, %struct.CGPoint, float, float, float, float, i32, i32, i32, i32, float, float, i8*, i32, i32, %struct.aal_edge_pool_t*, %struct.aal_edge_pool_t*, i8*, %struct.aal_callback_t*, i32, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_pool_t*, i8, float, i8, i32 } + %struct.anon = type { %struct.aal_spanarray_t } + + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +define fastcc void @test7() { +entry: + %SB = alloca %struct.aal_spanbucket_t, align 4 ; <%struct.aal_spanbucket_t*> [#uses=2] + br i1 false, label %cond_true, label %cond_next79 + +cond_true: ; preds = %entry + br i1 false, label %cond_next, label %cond_next114.i + +cond_next114.i: ; preds = %cond_true + ret void + +cond_next: ; preds = %cond_true + %SB19 = bitcast %struct.aal_spanbucket_t* %SB to i8* ; <i8*> [#uses=1] + call void @llvm.memcpy.i32( i8* %SB19, i8* null, i32 12, i32 0 ) + br i1 false, label %cond_next34, label %cond_next79 + +cond_next34: ; preds = %cond_next + %i.2.reload22 = load i32* null ; <i32> [#uses=1] + %tmp51 = getelementptr %struct.aal_spanbucket_t* %SB, i32 0, i32 2, i32 0, i32 0, i32 %i.2.reload22, i32 1 + ; <i16*> [#uses=0] + ret void + +cond_next79: ; preds = %cond_next, %entry + ret void +} + + + %struct.c37304a__vrec = type { i8, %struct.c37304a__vrec___disc___XVN } + %struct.c37304a__vrec___disc___XVN = type { +%struct.c37304a__vrec___disc___XVN___O } + %struct.c37304a__vrec___disc___XVN___O = type { } + +; PR3304 +define void @test8() { +entry: + %v = alloca %struct.c37304a__vrec + %0 = getelementptr %struct.c37304a__vrec* %v, i32 0, i32 0 + store i8 8, i8* %0, align 1 + unreachable +} + + + +; rdar://6808691 - ZeroLengthMemSet + type <{ i32, i16, i8, i8, i64, i64, i16, [0 x i16] }> + +define i32 @test9() { +entry: + %.compoundliteral = alloca %0 + %tmp228 = getelementptr %0* %.compoundliteral, i32 0, i32 7 + %tmp229 = bitcast [0 x i16]* %tmp228 to i8* + call void @llvm.memset.i64(i8* %tmp229, i8 0, i64 0, i32 2) + unreachable +} + +declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind + + +; PR4146 - i1 handling +%wrapper = type { i1 } +define void @test10() { +entry: + %w = alloca %wrapper, align 8 ; <%wrapper*> [#uses=1] + %0 = getelementptr %wrapper* %w, i64 0, i32 0 ; <i1*> + store i1 true, i1* %0 + ret void +} + + + %struct.singlebool = type <{ i8 }> +; PR4286 +define zeroext i8 @test11() nounwind { +entry: + %a = alloca %struct.singlebool, align 1 ; <%struct.singlebool*> [#uses=2] + %storetmp.i = bitcast %struct.singlebool* %a to i1* ; <i1*> [#uses=1] + store i1 true, i1* %storetmp.i + %tmp = getelementptr %struct.singlebool* %a, i64 0, i32 0 ; <i8*> [#uses=1] + %tmp1 = load i8* %tmp ; <i8> [#uses=1] + ret i8 %tmp1 +} + + + %struct.Item = type { [4 x i16], %struct.rule* } + %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 } + %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* } + %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* } + %struct.list = type { i8*, %struct.list* } + %struct.stateMap = type { i8*, %struct.plank*, i32, i16* } + %struct.plank = type { i8*, %struct.list*, i32 } + %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] } + %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* } + %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** } + %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* } + %struct.Index_Map = type { i32, %struct.item_set** } + %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* } + %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** } + +; VLAs. +define void @test12() { +bb4.i: + %0 = malloc [0 x %struct.Item] ; <[0 x %struct.Item]*> [#uses=1] + %.sub.i.c.i = getelementptr [0 x %struct.Item]* %0, i32 0, i32 0 ; <%struct.Item*> [#uses=0] + unreachable +} + +; PR8680 +define void @test13() nounwind { +entry: + %memtmp = alloca i32, align 4 + %0 = bitcast i32* %memtmp to void ()* + call void %0() nounwind + ret void +} diff --git a/test/Transforms/ScalarRepl/memcpy-from-global.ll b/test/Transforms/ScalarRepl/memcpy-from-global.ll index 8152785..5b25864 100644 --- a/test/Transforms/ScalarRepl/memcpy-from-global.ll +++ b/test/Transforms/ScalarRepl/memcpy-from-global.ll @@ -1,12 +1,19 @@ -; RUN: opt < %s -scalarrepl -S | not grep {call.*memcpy} +; RUN: opt < %s -scalarrepl -S | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" @C.0.1248 = internal constant [128 x float] [ float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 ], align 32 ; <[128 x float]*> [#uses=1] -define float @grad4(i32 %hash, float %x, float %y, float %z, float %w) { +define float @test1(i32 %hash, float %x, float %y, float %z, float %w) { entry: %lookupTable = alloca [128 x float], align 16 ; <[128 x float]*> [#uses=5] %lookupTable1 = bitcast [128 x float]* %lookupTable to i8* ; <i8*> [#uses=1] call void @llvm.memcpy.i32( i8* %lookupTable1, i8* bitcast ([128 x float]* @C.0.1248 to i8*), i32 512, i32 16 ) + +; CHECK: @test1 +; CHECK-NOT: alloca +; CHECK-NOT: call{{.*}}@llvm.memcpy +; CHECK: %lookupTable1 = bitcast [128 x float]* @C.0.1248 to i8* +; CHECK-NOT: call{{.*}}@llvm.memcpy + %tmp3 = shl i32 %hash, 2 ; <i32> [#uses=1] %tmp5 = and i32 %tmp3, 124 ; <i32> [#uses=4] %tmp753 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp5 ; <float*> [#uses=1] @@ -32,3 +39,58 @@ entry: } declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + + + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +%T = type { i8, [123 x i8] } + +@G = constant %T {i8 1, [123 x i8] zeroinitializer } + +define void @test2() { + %A = alloca %T + %B = alloca %T + %a = bitcast %T* %A to i8* + %b = bitcast %T* %B to i8* + +; CHECK: @test2 + +; %A alloca is deleted +; CHECK-NEXT: %B = alloca %T + +; use @G instead of %A +; CHECK-NEXT: %a = bitcast %T* @G to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b, i8* %a, i64 124, i32 4, i1 false) + call void @bar(i8* %b) + ret void +} + +declare void @bar(i8*) + + +;; Should be able to eliminate the alloca. +define void @test3() { + %A = alloca %T + %a = bitcast %T* %A to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) + call void @bar(i8* %a) readonly +; CHECK: @test3 +; CHECK-NEXT: %a = bitcast %T* @G to i8* +; CHECK-NEXT: call void @bar(i8* %a) + ret void +} + +define void @test4() { + %A = alloca %T + %a = bitcast %T* %A to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) + call void @baz(i8* byval %a) +; CHECK: @test4 +; CHECK-NEXT: %a = bitcast %T* @G to i8* +; CHECK-NEXT: call void @baz(i8* byval %a) + ret void +} + +declare void @baz(i8* byval) diff --git a/test/Transforms/ScalarRepl/phi-select.ll b/test/Transforms/ScalarRepl/phi-select.ll new file mode 100644 index 0000000..fa3972d --- /dev/null +++ b/test/Transforms/ScalarRepl/phi-select.ll @@ -0,0 +1,153 @@ +; RUN: opt %s -scalarrepl -S | FileCheck %s +; Test promotion of allocas that have phis and select users. +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.2" + +%struct.X = type { i32 } +%PairTy = type {i32, i32} + +; CHECK: @test1 +; CHECK: %a.0 = alloca i32 +; CHECK: %b.0 = alloca i32 +define i32 @test1(i32 %x) nounwind readnone ssp { +entry: + %a = alloca %struct.X, align 8 ; <%struct.X*> [#uses=2] + %b = alloca %struct.X, align 8 ; <%struct.X*> [#uses=2] + %0 = getelementptr inbounds %struct.X* %a, i64 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %0, align 8 + %1 = getelementptr inbounds %struct.X* %b, i64 0, i32 0 ; <i32*> [#uses=1] + store i32 2, i32* %1, align 8 + %2 = icmp eq i32 %x, 0 ; <i1> [#uses=1] + %p.0 = select i1 %2, %struct.X* %b, %struct.X* %a ; <%struct.X*> [#uses=1] + %3 = getelementptr inbounds %struct.X* %p.0, i64 0, i32 0 ; <i32*> [#uses=1] + %4 = load i32* %3, align 8 ; <i32> [#uses=1] + ret i32 %4 +} + +; CHECK: @test2 +; CHECK: %X.ld = phi i32 [ 1, %entry ], [ 2, %T ] +; CHECK-NEXT: ret i32 %X.ld +define i32 @test2(i1 %c) { +entry: + %A = alloca {i32, i32} + %B = getelementptr {i32, i32}* %A, i32 0, i32 0 + store i32 1, i32* %B + br i1 %c, label %T, label %F +T: + %C = getelementptr {i32, i32}* %A, i32 0, i32 1 + store i32 2, i32* %C + br label %F +F: + %X = phi i32* [%B, %entry], [%C, %T] + %Q = load i32* %X + ret i32 %Q +} + +; CHECK: @test3 +; CHECK-NEXT: %Q = select i1 %c, i32 1, i32 2 +; CHECK-NEXT: ret i32 %Q +; rdar://8904039 +define i32 @test3(i1 %c) { + %A = alloca {i32, i32} + %B = getelementptr {i32, i32}* %A, i32 0, i32 0 + store i32 1, i32* %B + %C = getelementptr {i32, i32}* %A, i32 0, i32 1 + store i32 2, i32* %C + + %X = select i1 %c, i32* %B, i32* %C + %Q = load i32* %X + ret i32 %Q +} + +;; We can't scalarize this, a use of the select is not an element access. +define i64 @test4(i1 %c) { +entry: + %A = alloca %PairTy + ; CHECK: @test4 + ; CHECK: %A = alloca %PairTy + %B = getelementptr {i32, i32}* %A, i32 0, i32 0 + store i32 1, i32* %B + %C = getelementptr {i32, i32}* %A, i32 0, i32 1 + store i32 2, i32* %B + + %X = select i1 %c, i32* %B, i32* %C + %Y = bitcast i32* %X to i64* + %Q = load i64* %Y + ret i64 %Q +} + + +;; +;; Tests for promoting allocas used by selects. +;; rdar://7339113 +;; + +define i32 @test5(i32 *%P) nounwind readnone ssp { +entry: + %b = alloca i32, align 8 + store i32 2, i32* %b, align 8 + + ;; Select on constant condition should be folded. + %p.0 = select i1 false, i32* %b, i32* %P + store i32 123, i32* %p.0 + + %r = load i32* %b, align 8 + ret i32 %r + +; CHECK: @test5 +; CHECK: store i32 123, i32* %P +; CHECK: ret i32 2 +} + +define i32 @test6(i32 %x, i1 %c) nounwind readnone ssp { + %a = alloca i32, align 8 + %b = alloca i32, align 8 + store i32 1, i32* %a, align 8 + store i32 2, i32* %b, align 8 + %p.0 = select i1 %c, i32* %b, i32* %a + %r = load i32* %p.0, align 8 + ret i32 %r +; CHECK: @test6 +; CHECK-NEXT: %r = select i1 %c, i32 2, i32 1 +; CHECK-NEXT: ret i32 %r +} + +; Verify that the loads happen where the loads are, not where the select is. +define i32 @test7(i32 %x, i1 %c) nounwind readnone ssp { + %a = alloca i32, align 8 + %b = alloca i32, align 8 + store i32 1, i32* %a + store i32 2, i32* %b + %p.0 = select i1 %c, i32* %b, i32* %a + + store i32 0, i32* %a + + %r = load i32* %p.0, align 8 + ret i32 %r +; CHECK: @test7 +; CHECK-NOT: alloca i32 +; CHECK: %r = select i1 %c, i32 2, i32 0 +; CHECK: ret i32 %r +} + +;; Promote allocs that are PHI'd together by moving the loads. +define i32 @test8(i32 %x) nounwind readnone ssp { +; CHECK: @test8 +; CHECK-NOT: load i32 +; CHECK-NOT: store i32 +; CHECK: %p.0.ld = phi i32 [ 2, %entry ], [ 1, %T ] +; CHECK-NEXT: ret i32 %p.0.ld +entry: + %a = alloca i32, align 8 + %b = alloca i32, align 8 + store i32 1, i32* %a, align 8 + store i32 2, i32* %b, align 8 + %c = icmp eq i32 %x, 0 + br i1 %c, label %T, label %Cont +T: + br label %Cont +Cont: + %p.0 = phi i32* [%b, %entry],[%a, %T] + %r = load i32* %p.0, align 8 + ret i32 %r +} diff --git a/test/Transforms/ScalarRepl/vector_promote.ll b/test/Transforms/ScalarRepl/vector_promote.ll index fe55426..37cb49f 100644 --- a/test/Transforms/ScalarRepl/vector_promote.ll +++ b/test/Transforms/ScalarRepl/vector_promote.ll @@ -87,8 +87,6 @@ define i32 @test5(float %X) { ;; should turn into bitcast. } -;; should not turn into <1 x i64> - It is a banned MMX datatype. -;; rdar://8380055 define i64 @test6(<2 x float> %X) { %X_addr = alloca <2 x float> store <2 x float> %X, <2 x float>* %X_addr @@ -96,7 +94,7 @@ define i64 @test6(<2 x float> %X) { %tmp = load i64* %P ret i64 %tmp ; CHECK: @test6 -; CHECK-NEXT: bitcast <2 x float> %X to i64 -; CHECK-NEXT: ret i64 +; CHECK: bitcast <2 x float> %X to <1 x i64> +; CHECK: ret i64 } diff --git a/test/Transforms/SimplifyCFG/MagicPointer.ll b/test/Transforms/SimplifyCFG/MagicPointer.ll index 54e5b14..93b9a27 100644 --- a/test/Transforms/SimplifyCFG/MagicPointer.ll +++ b/test/Transforms/SimplifyCFG/MagicPointer.ll @@ -8,7 +8,6 @@ ; CHECK: i64 2, label ; CHECK: i64 3, label ; CHECK: i64 4, label -; CHECK-NOT: br ; CHECK: } target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" diff --git a/test/Transforms/SimplifyCFG/PhiBlockMerge.ll b/test/Transforms/SimplifyCFG/PhiBlockMerge.ll index a648efd..c28d0ba 100644 --- a/test/Transforms/SimplifyCFG/PhiBlockMerge.ll +++ b/test/Transforms/SimplifyCFG/PhiBlockMerge.ll @@ -1,12 +1,14 @@ ; Test merging of blocks that only have PHI nodes in them ; -; RUN: opt < %s -simplifycfg -S | not grep N: +; RUN: opt < %s -simplifycfg -S | FileCheck %s ; define i32 @test(i1 %a, i1 %b) { -; <label>:0 +; CHECK: br i1 %a br i1 %a, label %M, label %O O: ; preds = %0 +; CHECK: select i1 %b, i32 0, i32 1 +; CHECK-NOT: phi br i1 %b, label %N, label %Q Q: ; preds = %O br label %N @@ -15,6 +17,7 @@ N: ; preds = %Q, %O %Wp = phi i32 [ 0, %O ], [ 1, %Q ] ; <i32> [#uses=1] br label %M M: ; preds = %N, %0 +; CHECK: %W = phi i32 %W = phi i32 [ %Wp, %N ], [ 2, %0 ] ; <i32> [#uses=1] %R = add i32 %W, 1 ; <i32> [#uses=1] ret i32 %R diff --git a/test/Transforms/SimplifyCFG/PhiEliminate.ll b/test/Transforms/SimplifyCFG/PhiEliminate.ll index 73cf466..d5ce9a7 100644 --- a/test/Transforms/SimplifyCFG/PhiEliminate.ll +++ b/test/Transforms/SimplifyCFG/PhiEliminate.ll @@ -11,20 +11,6 @@ declare void @use(i1) declare void @use.upgrd.1(i32) -define void @test2(i1 %c, i1 %d, i32 %V, i32 %V2) { -; <label>:0 - br i1 %d, label %X, label %F -X: ; preds = %0 - br i1 %c, label %T, label %F -T: ; preds = %X - br label %F -F: ; preds = %T, %X, %0 - %B1 = phi i1 [ true, %0 ], [ false, %T ], [ false, %X ] ; <i1> [#uses=1] - %I7 = phi i32 [ %V, %0 ], [ %V2, %T ], [ %V2, %X ] ; <i32> [#uses=1] - call void @use( i1 %B1 ) - call void @use.upgrd.1( i32 %I7 ) - ret void -} define void @test(i1 %c, i32 %V, i32 %V2) { ; <label>:0 diff --git a/test/Transforms/SimplifyCFG/basictest.ll b/test/Transforms/SimplifyCFG/basictest.ll index 7315ff6..052e106 100644 --- a/test/Transforms/SimplifyCFG/basictest.ll +++ b/test/Transforms/SimplifyCFG/basictest.ll @@ -3,8 +3,7 @@ ; RUN: opt < %s -simplifycfg -S | FileCheck %s define void @test1() { - br label %BB1 -BB1: ; preds = %0 + br label %1 ret void ; CHECK: @test1 ; CHECK-NEXT: ret void @@ -12,7 +11,6 @@ BB1: ; preds = %0 define void @test2() { ret void -BB1: ; No predecessors! ret void ; CHECK: @test2 ; CHECK-NEXT: ret void @@ -20,35 +18,22 @@ BB1: ; No predecessors! } define void @test3(i1 %T) { - br i1 %T, label %BB1, label %BB1 -BB1: ; preds = %0, %0 + br i1 %T, label %1, label %1 ret void ; CHECK: @test3 ; CHECK-NEXT: ret void } -define void @test4() { - br label %return -return: - ret void -; CHECK: @test4 -; CHECK-NEXT: ret void -} -@test4g = global i8* blockaddress(@test4, %return) - - ; PR5795 define void @test5(i32 %A) { switch i32 %A, label %return [ - i32 2, label %bb - i32 10, label %bb1 + i32 2, label %1 + i32 10, label %2 ] -bb: ; preds = %entry ret void -bb1: ; preds = %entry ret void return: ; preds = %entry diff --git a/test/Transforms/SimplifyCFG/indirectbr.ll b/test/Transforms/SimplifyCFG/indirectbr.ll index de4f5b6..7fb4def 100644 --- a/test/Transforms/SimplifyCFG/indirectbr.ll +++ b/test/Transforms/SimplifyCFG/indirectbr.ll @@ -62,3 +62,121 @@ entry: BB0: ret void } + + +; Make sure the blocks in the next few tests aren't trivially removable as +; successors by taking their addresses. + +@anchor = constant [13 x i8*] [ + i8* blockaddress(@indbrtest3, %L1), i8* blockaddress(@indbrtest3, %L2), i8* blockaddress(@indbrtest3, %L3), + i8* blockaddress(@indbrtest4, %L1), i8* blockaddress(@indbrtest4, %L2), i8* blockaddress(@indbrtest4, %L3), + i8* blockaddress(@indbrtest5, %L1), i8* blockaddress(@indbrtest5, %L2), i8* blockaddress(@indbrtest5, %L3), i8* blockaddress(@indbrtest5, %L4), + i8* blockaddress(@indbrtest6, %L1), i8* blockaddress(@indbrtest6, %L2), i8* blockaddress(@indbrtest6, %L3) +] + +; SimplifyCFG should turn the indirectbr into a conditional branch on the +; condition of the select. + +; CHECK: @indbrtest3 +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L1, label %L2 +; CHECK-NOT: indirectbr +; CHECK-NOT: br +; CHECK-NOT: L3: +define void @indbrtest3(i1 %cond, i8* %address) nounwind { +entry: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest3, %L1), i8* blockaddress(@indbrtest3, %L2) + indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3] + +L1: + call void @A() + ret void +L2: + call void @C() + ret void +L3: + call void @foo() + ret void +} + +; SimplifyCFG should turn the indirectbr into an unconditional branch to the +; only possible destination. +; As in @indbrtest1, it should really remove the branch entirely, but it doesn't +; because it's in the entry block. + +; CHECK: @indbrtest4 +; CHECK-NEXT: entry: +; CHECK-NEXT: br label %L1 +define void @indbrtest4(i1 %cond) nounwind { +entry: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest4, %L1), i8* blockaddress(@indbrtest4, %L1) + indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3] + +L1: + call void @A() + ret void +L2: + call void @C() + ret void +L3: + call void @foo() + ret void +} + +; SimplifyCFG should turn the indirectbr into an unreachable because neither +; destination is listed as a successor. + +; CHECK: @indbrtest5 +; CHECK-NEXT: entry: +; CHECK-NEXT: unreachable +; CHECK-NEXT: } +define void @indbrtest5(i1 %cond, i8* %anchor) nounwind { +entry: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest5, %L1), i8* blockaddress(@indbrtest5, %L2) +; This needs to have more than one successor for this test, otherwise it gets +; replaced with an unconditional branch to the single successor. + indirectbr i8* %indirect.goto.dest, [label %L3, label %L4] + +L1: + call void @A() + ret void +L2: + call void @C() + ret void +L3: + call void @foo() + ret void +L4: + call void @foo() + +; This keeps blockaddresses not otherwise listed as successors from being zapped +; before SimplifyCFG even looks at the indirectbr. + indirectbr i8* %anchor, [label %L1, label %L2] +} + +; The same as above, except the selected addresses are equal. + +; CHECK: @indbrtest6 +; CHECK-NEXT: entry: +; CHECK-NEXT: unreachable +; CHECK-NEXT: } +define void @indbrtest6(i1 %cond, i8* %anchor) nounwind { +entry: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest6, %L1), i8* blockaddress(@indbrtest6, %L1) +; This needs to have more than one successor for this test, otherwise it gets +; replaced with an unconditional branch to the single successor. + indirectbr i8* %indirect.goto.dest, [label %L2, label %L3] + +L1: + call void @A() + ret void +L2: + call void @C() + ret void +L3: + call void @foo() + +; This keeps blockaddresses not otherwise listed as successors from being zapped +; before SimplifyCFG even looks at the indirectbr. + indirectbr i8* %anchor, [label %L1, label %L2] +} diff --git a/test/Transforms/SimplifyCFG/invoke_unwind.ll b/test/Transforms/SimplifyCFG/invoke_unwind.ll index bbd779b..73faa95 100644 --- a/test/Transforms/SimplifyCFG/invoke_unwind.ll +++ b/test/Transforms/SimplifyCFG/invoke_unwind.ll @@ -9,10 +9,9 @@ define i32 @test1() { ; CHECK-NEXT: call void @bar() ; CHECK-NEXT: ret i32 0 invoke void @bar( ) - to label %Ok unwind label %Rethrow -Ok: ; preds = %0 + to label %1 unwind label %Rethrow ret i32 0 -Rethrow: ; preds = %0 +Rethrow: unwind } diff --git a/test/Transforms/SimplifyCFG/select-gep.ll b/test/Transforms/SimplifyCFG/select-gep.ll new file mode 100644 index 0000000..009f05e --- /dev/null +++ b/test/Transforms/SimplifyCFG/select-gep.ll @@ -0,0 +1,40 @@ +; RUN: opt -S -simplifycfg %s | FileCheck %s + +define i8* @test1(i8* %x, i64 %y) nounwind { +entry: + %tmp1 = load i8* %x, align 1 + %cmp = icmp eq i8 %tmp1, 47 + br i1 %cmp, label %if.then, label %if.end + +if.then: + %incdec.ptr = getelementptr inbounds i8* %x, i64 %y + br label %if.end + +if.end: + %x.addr = phi i8* [ %incdec.ptr, %if.then ], [ %x, %entry ] + ret i8* %x.addr + +; CHECK: @test1 +; CHECK-NOT: select +; CHECK: ret i8* %x.addr +} + +%ST = type { i8, i8 } + +define i8* @test2(%ST* %x, i8* %y) nounwind { +entry: + %cmp = icmp eq %ST* %x, null + br i1 %cmp, label %if.then, label %if.end + +if.then: + %incdec.ptr = getelementptr %ST* %x, i32 0, i32 1 + br label %if.end + +if.end: + %x.addr = phi i8* [ %incdec.ptr, %if.then ], [ %y, %entry ] + ret i8* %x.addr + +; CHECK: @test2 +; CHECK: %x.addr = select i1 %cmp, i8* %incdec.ptr, i8* %y +; CHECK: ret i8* %x.addr +} diff --git a/test/Transforms/SimplifyCFG/switch-on-const-select.ll b/test/Transforms/SimplifyCFG/switch-on-const-select.ll new file mode 100644 index 0000000..5494a65 --- /dev/null +++ b/test/Transforms/SimplifyCFG/switch-on-const-select.ll @@ -0,0 +1,138 @@ +; RUN: opt < %s -simplifycfg -S | FileCheck %s + +; Test basic folding to a conditional branch. +define i32 @foo(i64 %x, i64 %y) nounwind { +; CHECK: @foo +entry: + %eq = icmp eq i64 %x, %y + br i1 %eq, label %b, label %switch +switch: + %lt = icmp slt i64 %x, %y +; CHECK: br i1 %lt, label %a, label %b + %qux = select i1 %lt, i32 0, i32 2 + switch i32 %qux, label %bees [ + i32 0, label %a + i32 1, label %b + i32 2, label %b + ] +a: + tail call void @bees.a() nounwind + ret i32 1 +; CHECK: b: +; CHECK-NEXT: %retval = phi i32 [ 0, %switch ], [ 2, %entry ] +b: + %retval = phi i32 [0, %switch], [0, %switch], [2, %entry] + tail call void @bees.b() nounwind + ret i32 %retval +; CHECK-NOT: bees: +bees: + tail call void @llvm.trap() nounwind + unreachable +} + +; Test basic folding to an unconditional branch. +define i32 @bar(i64 %x, i64 %y) nounwind { +; CHECK: @bar +entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: tail call void @bees.a() nounwind +; CHECK-NEXT: ret i32 0 + %lt = icmp slt i64 %x, %y + %qux = select i1 %lt, i32 0, i32 2 + switch i32 %qux, label %bees [ + i32 0, label %a + i32 1, label %b + i32 2, label %a + ] +a: + %retval = phi i32 [0, %entry], [0, %entry], [1, %b] + tail call void @bees.a() nounwind + ret i32 0 +b: + tail call void @bees.b() nounwind + br label %a +bees: + tail call void @llvm.trap() nounwind + unreachable +} + +; Test the edge case where both values from the select are the default case. +define void @bazz(i64 %x, i64 %y) nounwind { +; CHECK: @bazz +entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: tail call void @bees.b() nounwind +; CHECK-NEXT: ret void + %lt = icmp slt i64 %x, %y + %qux = select i1 %lt, i32 10, i32 12 + switch i32 %qux, label %b [ + i32 0, label %a + i32 1, label %bees + i32 2, label %bees + ] +a: + tail call void @bees.a() nounwind + ret void +b: + tail call void @bees.b() nounwind + ret void +bees: + tail call void @llvm.trap() + unreachable +} + +; Test the edge case where both values from the select are equal. +define void @quux(i64 %x, i64 %y) nounwind { +; CHECK: @quux +entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: tail call void @bees.a() nounwind +; CHECK-NEXT: ret void + %lt = icmp slt i64 %x, %y + %qux = select i1 %lt, i32 0, i32 0 + switch i32 %qux, label %b [ + i32 0, label %a + i32 1, label %bees + i32 2, label %bees + ] +a: + tail call void @bees.a() nounwind + ret void +b: + tail call void @bees.b() nounwind + ret void +bees: + tail call void @llvm.trap() + unreachable +} + +; A final test, for phi node munging. +define i32 @xyzzy(i64 %x, i64 %y) { +; CHECK: @xyzzy +entry: + %eq = icmp eq i64 %x, %y + br i1 %eq, label %r, label %cont +cont: +; CHECK: %lt = icmp slt i64 %x, %y + %lt = icmp slt i64 %x, %y +; CHECK-NEXT: br i1 %lt, label %a, label %r + %qux = select i1 %lt, i32 0, i32 2 + switch i32 %qux, label %bees [ + i32 0, label %a + i32 1, label %r + i32 2, label %r + ] +r: + %val = phi i32 [0, %entry], [1, %cont], [1, %cont] + ret i32 %val +a: + ret i32 -1 +; CHECK-NOT: bees: +bees: + tail call void @llvm.trap() + unreachable +} + +declare void @llvm.trap() nounwind noreturn +declare void @bees.a() nounwind +declare void @bees.b() nounwind diff --git a/test/Transforms/SimplifyCFG/switch-to-icmp.ll b/test/Transforms/SimplifyCFG/switch-to-icmp.ll new file mode 100644 index 0000000..414f847 --- /dev/null +++ b/test/Transforms/SimplifyCFG/switch-to-icmp.ll @@ -0,0 +1,39 @@ +; RUN: opt -S -simplifycfg < %s | FileCheck %s + +define zeroext i1 @test1(i32 %x) nounwind readnone ssp noredzone { +entry: + switch i32 %x, label %lor.rhs [ + i32 2, label %lor.end + i32 1, label %lor.end + i32 3, label %lor.end + ] + +lor.rhs: + br label %lor.end + +lor.end: + %0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ] + ret i1 %0 + +; CHECK: @test1 +; CHECK: %x.off = add i32 %x, -1 +; CHECK: %switch = icmp ult i32 %x.off, 3 +} + +define zeroext i1 @test2(i32 %x) nounwind readnone ssp noredzone { +entry: + switch i32 %x, label %lor.rhs [ + i32 0, label %lor.end + i32 1, label %lor.end + ] + +lor.rhs: + br label %lor.end + +lor.end: + %0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ] + ret i1 %0 + +; CHECK: @test2 +; CHECK: %switch = icmp ult i32 %x, 2 +} diff --git a/test/Transforms/SimplifyCFG/switch_create.ll b/test/Transforms/SimplifyCFG/switch_create.ll index 9b3aaf7..546cc75 100644 --- a/test/Transforms/SimplifyCFG/switch_create.ll +++ b/test/Transforms/SimplifyCFG/switch_create.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -simplifycfg -S | not grep br +; RUN: opt < %s -simplifycfg -S | FileCheck %s declare void @foo1() @@ -15,6 +15,11 @@ T: ; preds = %0 F: ; preds = %0 call void @foo2( ) ret void +; CHECK: @test1 +; CHECK: switch i32 %V, label %F [ +; CHECK: i32 17, label %T +; CHECK: i32 4, label %T +; CHECK: ] } define void @test2(i32 %V) { @@ -28,6 +33,11 @@ T: ; preds = %0 F: ; preds = %0 call void @foo2( ) ret void +; CHECK: @test2 +; CHECK: switch i32 %V, label %T [ +; CHECK: i32 17, label %F +; CHECK: i32 4, label %F +; CHECK: ] } define void @test3(i32 %V) { @@ -42,6 +52,430 @@ T: ; preds = %N, %0 F: ; preds = %N call void @foo2( ) ret void + +; CHECK: @test3 +; CHECK: switch i32 %V, label %F [ +; CHECK: i32 4, label %T +; CHECK: i32 17, label %T +; CHECK: ] } + +define i32 @test4(i8 zeroext %c) nounwind ssp noredzone { +entry: + %cmp = icmp eq i8 %c, 62 + br i1 %cmp, label %lor.end, label %lor.lhs.false + +lor.lhs.false: ; preds = %entry + %cmp4 = icmp eq i8 %c, 34 + br i1 %cmp4, label %lor.end, label %lor.rhs + +lor.rhs: ; preds = %lor.lhs.false + %cmp8 = icmp eq i8 %c, 92 + br label %lor.end + +lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry + %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp8, %lor.rhs ] + %lor.ext = zext i1 %0 to i32 + ret i32 %lor.ext + +; CHECK: @test4 +; CHECK: switch i8 %c, label %lor.rhs [ +; CHECK: i8 62, label %lor.end +; CHECK: i8 34, label %lor.end +; CHECK: i8 92, label %lor.end +; CHECK: ] +} + +define i32 @test5(i8 zeroext %c) nounwind ssp noredzone { +entry: + switch i8 %c, label %lor.rhs [ + i8 62, label %lor.end + i8 34, label %lor.end + i8 92, label %lor.end + ] + +lor.rhs: ; preds = %entry + %V = icmp eq i8 %c, 92 + br label %lor.end + +lor.end: ; preds = %entry, %entry, %entry, %lor.rhs + %0 = phi i1 [ true, %entry ], [ %V, %lor.rhs ], [ true, %entry ], [ true, %entry ] + %lor.ext = zext i1 %0 to i32 + ret i32 %lor.ext +; CHECK: @test5 +; CHECK: switch i8 %c, label %lor.rhs [ +; CHECK: i8 62, label %lor.end +; CHECK: i8 34, label %lor.end +; CHECK: i8 92, label %lor.end +; CHECK: ] +} + + +define i1 @test6({ i32, i32 }* %I) { +entry: + %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1] + %tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6] + %tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1] + br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0 +shortcirc_next.0: ; preds = %entry + %tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1] + br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1 +shortcirc_next.1: ; preds = %shortcirc_next.0 + %tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1] + br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2 +shortcirc_next.2: ; preds = %shortcirc_next.1 + %tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1] + br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3 +shortcirc_next.3: ; preds = %shortcirc_next.2 + %tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1] + br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4 +shortcirc_next.4: ; preds = %shortcirc_next.3 + %tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1] + br label %UnifiedReturnBlock +shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry + br label %UnifiedReturnBlock +UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4 + %UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1] + ret i1 %UnifiedRetVal + +; CHECK: @test6 +; CHECK: %tmp.2.i.off = add i32 %tmp.2.i, -14 +; CHECK: %switch = icmp ult i32 %tmp.2.i.off, 6 +} + +define void @test7(i8 zeroext %c, i32 %x) nounwind ssp noredzone { +entry: + %cmp = icmp ult i32 %x, 32 + %cmp4 = icmp eq i8 %c, 97 + %or.cond = or i1 %cmp, %cmp4 + %cmp9 = icmp eq i8 %c, 99 + %or.cond11 = or i1 %or.cond, %cmp9 + br i1 %or.cond11, label %if.then, label %if.end + +if.then: ; preds = %entry + tail call void @foo1() nounwind noredzone + ret void + +if.end: ; preds = %entry + ret void + +; CHECK: @test7 +; CHECK: %cmp = icmp ult i32 %x, 32 +; CHECK: br i1 %cmp, label %if.then, label %switch.early.test +; CHECK: switch.early.test: +; CHECK: switch i8 %c, label %if.end [ +; CHECK: i8 99, label %if.then +; CHECK: i8 97, label %if.then +; CHECK: ] +} + +define i32 @test8(i8 zeroext %c, i32 %x, i1 %C) nounwind ssp noredzone { +entry: + br i1 %C, label %N, label %if.then +N: + %cmp = icmp ult i32 %x, 32 + %cmp4 = icmp eq i8 %c, 97 + %or.cond = or i1 %cmp, %cmp4 + %cmp9 = icmp eq i8 %c, 99 + %or.cond11 = or i1 %or.cond, %cmp9 + br i1 %or.cond11, label %if.then, label %if.end + +if.then: ; preds = %entry + %A = phi i32 [0, %entry], [42, %N] + tail call void @foo1() nounwind noredzone + ret i32 %A + +if.end: ; preds = %entry + ret i32 0 + +; CHECK: @test8 +; CHECK: switch.early.test: +; CHECK: switch i8 %c, label %if.end [ +; CHECK: i8 99, label %if.then +; CHECK: i8 97, label %if.then +; CHECK: ] +; CHECK: %A = phi i32 [ 0, %entry ], [ 42, %switch.early.test ], [ 42, %N ], [ 42, %switch.early.test ] +} + +;; This is "Example 7" from http://blog.regehr.org/archives/320 +define i32 @test9(i8 zeroext %c) nounwind ssp noredzone { +entry: + %cmp = icmp ult i8 %c, 33 + br i1 %cmp, label %lor.end, label %lor.lhs.false + +lor.lhs.false: ; preds = %entry + %cmp4 = icmp eq i8 %c, 46 + br i1 %cmp4, label %lor.end, label %lor.lhs.false6 + +lor.lhs.false6: ; preds = %lor.lhs.false + %cmp9 = icmp eq i8 %c, 44 + br i1 %cmp9, label %lor.end, label %lor.lhs.false11 + +lor.lhs.false11: ; preds = %lor.lhs.false6 + %cmp14 = icmp eq i8 %c, 58 + br i1 %cmp14, label %lor.end, label %lor.lhs.false16 + +lor.lhs.false16: ; preds = %lor.lhs.false11 + %cmp19 = icmp eq i8 %c, 59 + br i1 %cmp19, label %lor.end, label %lor.lhs.false21 + +lor.lhs.false21: ; preds = %lor.lhs.false16 + %cmp24 = icmp eq i8 %c, 60 + br i1 %cmp24, label %lor.end, label %lor.lhs.false26 + +lor.lhs.false26: ; preds = %lor.lhs.false21 + %cmp29 = icmp eq i8 %c, 62 + br i1 %cmp29, label %lor.end, label %lor.lhs.false31 + +lor.lhs.false31: ; preds = %lor.lhs.false26 + %cmp34 = icmp eq i8 %c, 34 + br i1 %cmp34, label %lor.end, label %lor.lhs.false36 + +lor.lhs.false36: ; preds = %lor.lhs.false31 + %cmp39 = icmp eq i8 %c, 92 + br i1 %cmp39, label %lor.end, label %lor.rhs + +lor.rhs: ; preds = %lor.lhs.false36 + %cmp43 = icmp eq i8 %c, 39 + br label %lor.end + +lor.end: ; preds = %lor.rhs, %lor.lhs.false36, %lor.lhs.false31, %lor.lhs.false26, %lor.lhs.false21, %lor.lhs.false16, %lor.lhs.false11, %lor.lhs.false6, %lor.lhs.false, %entry + %0 = phi i1 [ true, %lor.lhs.false36 ], [ true, %lor.lhs.false31 ], [ true, %lor.lhs.false26 ], [ true, %lor.lhs.false21 ], [ true, %lor.lhs.false16 ], [ true, %lor.lhs.false11 ], [ true, %lor.lhs.false6 ], [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp43, %lor.rhs ] + %conv46 = zext i1 %0 to i32 + ret i32 %conv46 + +; CHECK: @test9 +; CHECK: %cmp = icmp ult i8 %c, 33 +; CHECK: br i1 %cmp, label %lor.end, label %switch.early.test + +; CHECK: switch.early.test: +; CHECK: switch i8 %c, label %lor.rhs [ +; CHECK: i8 92, label %lor.end +; CHECK: i8 62, label %lor.end +; CHECK: i8 60, label %lor.end +; CHECK: i8 59, label %lor.end +; CHECK: i8 58, label %lor.end +; CHECK: i8 46, label %lor.end +; CHECK: i8 44, label %lor.end +; CHECK: i8 34, label %lor.end +; CHECK: i8 39, label %lor.end +; CHECK: ] +} + +define i32 @test10(i32 %mode, i1 %Cond) { + %A = icmp ne i32 %mode, 0 + %B = icmp ne i32 %mode, 51 + %C = and i1 %A, %B + %D = and i1 %C, %Cond + br i1 %D, label %T, label %F +T: + ret i32 123 +F: + ret i32 324 + +; CHECK: @test10 +; CHECK: br i1 %Cond, label %switch.early.test, label %F +; CHECK:switch.early.test: +; CHECK: switch i32 %mode, label %T [ +; CHECK: i32 51, label %F +; CHECK: i32 0, label %F +; CHECK: ] +} + +; PR8780 +define i32 @test11(i32 %bar) nounwind { +entry: + %cmp = icmp eq i32 %bar, 4 + %cmp2 = icmp eq i32 %bar, 35 + %or.cond = or i1 %cmp, %cmp2 + %cmp5 = icmp eq i32 %bar, 53 + %or.cond1 = or i1 %or.cond, %cmp5 + %cmp8 = icmp eq i32 %bar, 24 + %or.cond2 = or i1 %or.cond1, %cmp8 + %cmp11 = icmp eq i32 %bar, 23 + %or.cond3 = or i1 %or.cond2, %cmp11 + %cmp14 = icmp eq i32 %bar, 55 + %or.cond4 = or i1 %or.cond3, %cmp14 + %cmp17 = icmp eq i32 %bar, 12 + %or.cond5 = or i1 %or.cond4, %cmp17 + %cmp20 = icmp eq i32 %bar, 35 + %or.cond6 = or i1 %or.cond5, %cmp20 + br i1 %or.cond6, label %if.then, label %if.end + +if.then: ; preds = %entry + br label %return + +if.end: ; preds = %entry + br label %return + +return: ; preds = %if.end, %if.then + %retval.0 = phi i32 [ 1, %if.then ], [ 0, %if.end ] + ret i32 %retval.0 + +; CHECK: @test11 +; CHECK: switch i32 %bar, label %if.end [ +; CHECK: i32 55, label %return +; CHECK: i32 53, label %return +; CHECK: i32 35, label %return +; CHECK: i32 24, label %return +; CHECK: i32 23, label %return +; CHECK: i32 12, label %return +; CHECK: i32 4, label %return +; CHECK: ] +} + +define void @test12() nounwind { +entry: + br label %bb49.us.us + +bb49.us.us: + %A = icmp eq i32 undef, undef + br i1 %A, label %bb55.us.us, label %malformed + +bb48.us.us: + %B = icmp ugt i32 undef, undef + br i1 %B, label %bb55.us.us, label %bb49.us.us + +bb55.us.us: + br label %bb48.us.us + +malformed: + ret void +; CHECK: @test12 + +} + +; test13 - handle switch formation with ult. +define void @test13(i32 %x) nounwind ssp noredzone { +entry: + %cmp = icmp ult i32 %x, 2 + br i1 %cmp, label %if.then, label %lor.lhs.false3 + +lor.lhs.false3: ; preds = %lor.lhs.false + %cmp5 = icmp eq i32 %x, 3 + br i1 %cmp5, label %if.then, label %lor.lhs.false6 + +lor.lhs.false6: ; preds = %lor.lhs.false3 + %cmp8 = icmp eq i32 %x, 4 + br i1 %cmp8, label %if.then, label %lor.lhs.false9 + +lor.lhs.false9: ; preds = %lor.lhs.false6 + %cmp11 = icmp eq i32 %x, 6 + br i1 %cmp11, label %if.then, label %if.end + +if.then: ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry + call void @foo1() noredzone + br label %if.end + +if.end: ; preds = %if.then, %lor.lhs.false9 + ret void +; CHECK: @test13 +; CHECK: switch i32 %x, label %if.end [ +; CHECK: i32 6, label %if.then +; CHECK: i32 4, label %if.then +; CHECK: i32 3, label %if.then +; CHECK: i32 1, label %if.then +; CHECK: i32 0, label %if.then +; CHECK: ] +} + +; test14 - handle switch formation with ult. +define void @test14(i32 %x) nounwind ssp noredzone { +entry: + %cmp = icmp ugt i32 %x, 2 + br i1 %cmp, label %lor.lhs.false3, label %if.then + +lor.lhs.false3: ; preds = %lor.lhs.false + %cmp5 = icmp ne i32 %x, 3 + br i1 %cmp5, label %lor.lhs.false6, label %if.then + +lor.lhs.false6: ; preds = %lor.lhs.false3 + %cmp8 = icmp ne i32 %x, 4 + br i1 %cmp8, label %lor.lhs.false9, label %if.then + +lor.lhs.false9: ; preds = %lor.lhs.false6 + %cmp11 = icmp ne i32 %x, 6 + br i1 %cmp11, label %if.end, label %if.then + +if.then: ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry + call void @foo1() noredzone + br label %if.end + +if.end: ; preds = %if.then, %lor.lhs.false9 + ret void +; CHECK: @test14 +; CHECK: switch i32 %x, label %if.end [ +; CHECK: i32 6, label %if.then +; CHECK: i32 4, label %if.then +; CHECK: i32 3, label %if.then +; CHECK: i32 1, label %if.then +; CHECK: i32 0, label %if.then +; CHECK: ] +} + +; Don't crash on ginormous ranges. +define void @test15(i128 %x) nounwind { + %cmp = icmp ugt i128 %x, 2 + br i1 %cmp, label %if.end, label %lor.false + +lor.false: + %cmp2 = icmp ne i128 %x, 100000000000000000000 + br i1 %cmp2, label %if.end, label %if.then + +if.then: + call void @foo1() noredzone + br label %if.end + +if.end: + ret void + +; CHECK: @test15 +; CHECK-NOT: switch +; CHECK: ret void +} + +; PR8675 +; rdar://5134905 +define zeroext i1 @test16(i32 %x) nounwind { +entry: +; CHECK: @test16 +; CHECK: %x.off = add i32 %x, -1 +; CHECK: %switch = icmp ult i32 %x.off, 3 + %cmp.i = icmp eq i32 %x, 1 + br i1 %cmp.i, label %lor.end, label %lor.lhs.false + +lor.lhs.false: + %cmp.i2 = icmp eq i32 %x, 2 + br i1 %cmp.i2, label %lor.end, label %lor.rhs + +lor.rhs: + %cmp.i1 = icmp eq i32 %x, 3 + br label %lor.end + +lor.end: + %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp.i1, %lor.rhs ] + ret i1 %0 +} + +; Check that we don't turn an icmp into a switch where it's not useful. +define void @test17(i32 %x, i32 %y) { + %cmp = icmp ult i32 %x, 3 + %switch = icmp ult i32 %y, 2 + %or.cond775 = or i1 %cmp, %switch + br i1 %or.cond775, label %lor.lhs.false8, label %return + +lor.lhs.false8: + tail call void @foo1() + ret void + +return: + ret void + +; CHECK: @test17 +; CHECK-NOT: switch.early.test +; CHECK-NOT: switch i32 +; CHECK: ret void +} + diff --git a/test/Transforms/SimplifyCFG/switch_formation.dbg.ll b/test/Transforms/SimplifyCFG/switch_formation.dbg.ll index f1c820e..2723ec6 100644 --- a/test/Transforms/SimplifyCFG/switch_formation.dbg.ll +++ b/test/Transforms/SimplifyCFG/switch_formation.dbg.ll @@ -1,5 +1,4 @@ -; RUN: opt < %s -simplifycfg -S | not grep br - +; RUN: opt < %s -simplifycfg -S | FileCheck %s %llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } @@ -13,7 +12,10 @@ declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind -define i1 @_ZN4llvm11SetCondInst7classofEPKNS_11InstructionE({ i32, i32 }* %I) { +define i1 @t({ i32, i32 }* %I) { +; CHECK: @t +; CHECK: %tmp.2.i.off = add i32 %tmp.2.i, -14 +; CHECK: %switch = icmp ult i32 %tmp.2.i.off, 6 entry: %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1] %tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6] diff --git a/test/Transforms/SimplifyCFG/switch_formation.ll b/test/Transforms/SimplifyCFG/switch_formation.ll deleted file mode 100644 index 787904a..0000000 --- a/test/Transforms/SimplifyCFG/switch_formation.ll +++ /dev/null @@ -1,30 +0,0 @@ -; RUN: opt < %s -simplifycfg -S | not grep br - -define i1 @_ZN4llvm11SetCondInst7classofEPKNS_11InstructionE({ i32, i32 }* %I) { -entry: - %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1] - %tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6] - %tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1] - br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0 -shortcirc_next.0: ; preds = %entry - %tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1] - br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1 -shortcirc_next.1: ; preds = %shortcirc_next.0 - %tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1] - br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2 -shortcirc_next.2: ; preds = %shortcirc_next.1 - %tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1] - br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3 -shortcirc_next.3: ; preds = %shortcirc_next.2 - %tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1] - br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4 -shortcirc_next.4: ; preds = %shortcirc_next.3 - %tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1] - br label %UnifiedReturnBlock -shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry - br label %UnifiedReturnBlock -UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4 - %UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1] - ret i1 %UnifiedRetVal -} - diff --git a/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll b/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll index cb9819c..f8a0c88 100644 --- a/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll +++ b/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll @@ -1,7 +1,7 @@ ; RUN: opt < %s -simplify-libcalls -S > %t ; RUN: grep nocapture %t | count 2 ; RUN: grep null %t | grep nocapture | count 1 -; RUN: grep null %t | grep call | grep readonly | count 1 +; RUN: grep null %t | grep call | not grep readonly ; Test that we add nocapture to the declaration, and to the second call only. diff --git a/test/Transforms/SimplifyLibCalls/FPuts.ll b/test/Transforms/SimplifyLibCalls/FPuts.ll new file mode 100644 index 0000000..1f72ede --- /dev/null +++ b/test/Transforms/SimplifyLibCalls/FPuts.ll @@ -0,0 +1,29 @@ +; Test that the FPutsOptimizer works correctly +; RUN: opt < %s -simplify-libcalls -S | \ +; RUN: not grep {call.*fputs} + +; This transformation requires the pointer size, as it assumes that size_t is +; the size of a pointer. +target datalayout = "-p:64:64:64" + + %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] } + %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 } +@stdout = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=1] +@empty = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] +@len1 = constant [2 x i8] c"A\00" ; <[2 x i8]*> [#uses=1] +@long = constant [7 x i8] c"hello\0A\00" ; <[7 x i8]*> [#uses=1] + +declare i32 @fputs(i8*, %struct._IO_FILE*) + +define i32 @main() { +entry: + %out = load %struct._IO_FILE** @stdout ; <%struct._IO_FILE*> [#uses=3] + %s1 = getelementptr [1 x i8]* @empty, i32 0, i32 0 ; <i8*> [#uses=1] + %s2 = getelementptr [2 x i8]* @len1, i32 0, i32 0 ; <i8*> [#uses=1] + %s3 = getelementptr [7 x i8]* @long, i32 0, i32 0 ; <i8*> [#uses=1] + %a = call i32 @fputs( i8* %s1, %struct._IO_FILE* %out ) ; <i32> [#uses=0] + %b = call i32 @fputs( i8* %s2, %struct._IO_FILE* %out ) ; <i32> [#uses=0] + %c = call i32 @fputs( i8* %s3, %struct._IO_FILE* %out ) ; <i32> [#uses=0] + ret i32 0 +} + diff --git a/test/Transforms/SimplifyLibCalls/Printf.ll b/test/Transforms/SimplifyLibCalls/Printf.ll index 858a09c..caea311 100644 --- a/test/Transforms/SimplifyLibCalls/Printf.ll +++ b/test/Transforms/SimplifyLibCalls/Printf.ll @@ -1,21 +1,36 @@ -; RUN: opt < %s -simplify-libcalls -S | grep putchar -; RUN: opt < %s -simplify-libcalls -S | \ -; RUN: not grep {call.*printf} +; RUN: opt < %s -simplify-libcalls -S -o %t +; RUN: FileCheck < %t %s @str = internal constant [13 x i8] c"hello world\0A\00" ; <[13 x i8]*> [#uses=1] @str1 = internal constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=1] -define void @foo() { +declare i32 @printf(i8*, ...) + +; CHECK: define void @f0 +; CHECK-NOT: printf +; CHECK: } +define void @f0() { entry: %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @str, i32 0, i32 0) ) ; <i32> [#uses=0] ret void } -declare i32 @printf(i8*, ...) - -define void @bar() { +; CHECK: define void @f1 +; CHECK-NOT: printf +; CHECK: } +define void @f1() { entry: %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([2 x i8]* @str1, i32 0, i32 0) ) ; <i32> [#uses=0] ret void } +; Verify that we don't turn this into a putchar call (thus changing the return +; value). +; +; CHECK: define i32 @f2 +; CHECK: printf +; CHECK: } +define i32 @f2() { + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([2 x i8]* @str1, i32 0, i32 0)) + ret i32 %call +} diff --git a/test/Transforms/SimplifyLibCalls/Puts.ll b/test/Transforms/SimplifyLibCalls/Puts.ll index 47a33c2..4843143 100644 --- a/test/Transforms/SimplifyLibCalls/Puts.ll +++ b/test/Transforms/SimplifyLibCalls/Puts.ll @@ -1,29 +1,15 @@ -; Test that the PutsCatOptimizer works correctly -; RUN: opt < %s -simplify-libcalls -S | \ -; RUN: not grep {call.*fputs} +; Test that the PutsOptimizer works correctly +; RUN: opt < %s -simplify-libcalls -S | FileCheck %s -; This transformation requires the pointer size, as it assumes that size_t is -; the size of a pointer. target datalayout = "-p:64:64:64" - %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] } - %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 } -@stdout = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=1] -@empty = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] -@len1 = constant [2 x i8] c"A\00" ; <[2 x i8]*> [#uses=1] -@long = constant [7 x i8] c"hello\0A\00" ; <[7 x i8]*> [#uses=1] +@.str = private constant [1 x i8] zeroinitializer -declare i32 @fputs(i8*, %struct._IO_FILE*) +declare i32 @puts(i8*) -define i32 @main() { +define void @foo() { entry: - %out = load %struct._IO_FILE** @stdout ; <%struct._IO_FILE*> [#uses=3] - %s1 = getelementptr [1 x i8]* @empty, i32 0, i32 0 ; <i8*> [#uses=1] - %s2 = getelementptr [2 x i8]* @len1, i32 0, i32 0 ; <i8*> [#uses=1] - %s3 = getelementptr [7 x i8]* @long, i32 0, i32 0 ; <i8*> [#uses=1] - %a = call i32 @fputs( i8* %s1, %struct._IO_FILE* %out ) ; <i32> [#uses=0] - %b = call i32 @fputs( i8* %s2, %struct._IO_FILE* %out ) ; <i32> [#uses=0] - %c = call i32 @fputs( i8* %s3, %struct._IO_FILE* %out ) ; <i32> [#uses=0] - ret i32 0 +; CHECK: call i32 @putchar(i32 10) + %call = call i32 @puts(i8* getelementptr inbounds ([1 x i8]* @.str, i32 0, i32 0)) + ret void } - diff --git a/test/Transforms/SimplifyLibCalls/StrSpn.ll b/test/Transforms/SimplifyLibCalls/StrSpn.ll index f77f32c..800c190 100644 --- a/test/Transforms/SimplifyLibCalls/StrSpn.ll +++ b/test/Transforms/SimplifyLibCalls/StrSpn.ll @@ -19,7 +19,7 @@ define i64 @testspn(i8* %s1, i8* %s2) { %test4 = call i64 @strspn(i8* %s1, i8* %s2) ; CHECK: call i64 @strspn(i8* %s1, i8* %s2) ret i64 %test3 -; CHECK ret i64 5 +; CHECK: ret i64 5 } declare i64 @strcspn(i8*, i8*) diff --git a/test/Transforms/SimplifyLibCalls/half-powr.ll b/test/Transforms/SimplifyLibCalls/half-powr.ll deleted file mode 100644 index 5d317fe..0000000 --- a/test/Transforms/SimplifyLibCalls/half-powr.ll +++ /dev/null @@ -1,46 +0,0 @@ -; RUN: opt -simplify-libcalls-halfpowr %s -S | FileCheck %s - -define float @__half_powrf4(float %f, float %g) nounwind readnone { -entry: - %0 = fcmp olt float %f, 2.000000e+00 ; <i1> [#uses=1] - br i1 %0, label %bb, label %bb1 - -bb: ; preds = %entry - %1 = fdiv float %f, 3.000000e+00 ; <float> [#uses=1] - br label %bb1 - -bb1: ; preds = %bb, %entry - %f_addr.0 = phi float [ %1, %bb ], [ %f, %entry ] ; <float> [#uses=1] - %2 = fmul float %f_addr.0, %g ; <float> [#uses=1] -; CHECK: fmul float %f_addr -; CHECK: fmul float %f_addr -; CHECK: fmul float %f_addr -; CHECK: fmul float %f_addr - - ret float %2 -} - -define void @foo(float* %p) nounwind { -entry: - %0 = load float* %p, align 4 ; <float> [#uses=1] - %1 = getelementptr float* %p, i32 1 ; <float*> [#uses=1] - %2 = load float* %1, align 4 ; <float> [#uses=1] - %3 = getelementptr float* %p, i32 2 ; <float*> [#uses=1] - %4 = load float* %3, align 4 ; <float> [#uses=1] - %5 = getelementptr float* %p, i32 3 ; <float*> [#uses=1] - %6 = load float* %5, align 4 ; <float> [#uses=1] - %7 = getelementptr float* %p, i32 4 ; <float*> [#uses=1] - %8 = load float* %7, align 4 ; <float> [#uses=1] - %9 = getelementptr float* %p, i32 5 ; <float*> [#uses=1] - %10 = load float* %9, align 4 ; <float> [#uses=1] - %11 = tail call float @__half_powrf4(float %0, float %6) nounwind ; <float> [#uses=1] - %12 = tail call float @__half_powrf4(float %2, float %8) nounwind ; <float> [#uses=1] - %13 = tail call float @__half_powrf4(float %4, float %10) nounwind ; <float> [#uses=1] - %14 = getelementptr float* %p, i32 6 ; <float*> [#uses=1] - store float %11, float* %14, align 4 - %15 = getelementptr float* %p, i32 7 ; <float*> [#uses=1] - store float %12, float* %15, align 4 - %16 = getelementptr float* %p, i32 8 ; <float*> [#uses=1] - store float %13, float* %16, align 4 - ret void -} diff --git a/test/Transforms/SimplifyLibCalls/iprintf.ll b/test/Transforms/SimplifyLibCalls/iprintf.ll new file mode 100644 index 0000000..7f036fe --- /dev/null +++ b/test/Transforms/SimplifyLibCalls/iprintf.ll @@ -0,0 +1,71 @@ +; RUN: opt < %s -simplify-libcalls -S -o %t +; RUN: FileCheck < %t %s +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32" +target triple = "xcore-xmos-elf" + +@.str = internal constant [4 x i8] c"%f\0A\00" ; <[4 x i8]*> [#uses=1] +@.str1 = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1] + +; Verify printf with no floating point arguments is transformed to iprintf +define i32 @f0(i32 %x) nounwind { +entry: +; CHECK: define i32 @f0 +; CHECK: @iprintf +; CHECK: } + %0 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @.str1, i32 0, i32 0), i32 %x) ; <i32> [#uses=0] + ret i32 %0 +} + +; Verify we don't turn this into an iprintf call +define void @f1(double %x) nounwind { +entry: +; CHECK: define void @f1 +; CHECK: @printf +; CHECK: } + %0 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), double %x) nounwind ; <i32> [#uses=0] + ret void +} + +; Verify sprintf with no floating point arguments is transformed to siprintf +define i32 @f2(i8* %p, i32 %x) nounwind { +entry: +; CHECK: define i32 @f2 +; CHECK: @siprintf +; CHECK: } + %0 = tail call i32 (i8*, i8*, ...)* @sprintf(i8 *%p, i8* getelementptr ([4 x i8]* @.str1, i32 0, i32 0), i32 %x) + ret i32 %0 +} + +; Verify we don't turn this into an siprintf call +define i32 @f3(i8* %p, double %x) nounwind { +entry: +; CHECK: define i32 @f3 +; CHECK: @sprintf +; CHECK: } + %0 = tail call i32 (i8*, i8*, ...)* @sprintf(i8 *%p, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), double %x) + ret i32 %0 +} + +; Verify fprintf with no floating point arguments is transformed to fiprintf +define i32 @f4(i8* %p, i32 %x) nounwind { +entry: +; CHECK: define i32 @f4 +; CHECK: @fiprintf +; CHECK: } + %0 = tail call i32 (i8*, i8*, ...)* @fprintf(i8 *%p, i8* getelementptr ([4 x i8]* @.str1, i32 0, i32 0), i32 %x) + ret i32 %0 +} + +; Verify we don't turn this into an fiprintf call +define i32 @f5(i8* %p, double %x) nounwind { +entry: +; CHECK: define i32 @f5 +; CHECK: @fprintf +; CHECK: } + %0 = tail call i32 (i8*, i8*, ...)* @fprintf(i8 *%p, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), double %x) + ret i32 %0 +} + +declare i32 @printf(i8* nocapture, ...) nounwind +declare i32 @sprintf(i8* nocapture, i8* nocapture, ...) nounwind +declare i32 @fprintf(i8* nocapture, i8* nocapture, ...) nounwind diff --git a/test/Transforms/TailCallElim/dup_tail.ll b/test/Transforms/TailCallElim/dup_tail.ll new file mode 100644 index 0000000..9363880 --- /dev/null +++ b/test/Transforms/TailCallElim/dup_tail.ll @@ -0,0 +1,23 @@ +; Duplicate the return into if.end to enable TCE. +; RUN: opt %s -tailcallelim -stats -disable-output |& grep {Number of return duplicated} + +define i32 @fib(i32 %n) nounwind ssp { +entry: + %cmp = icmp slt i32 %n, 2 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + br label %return + +if.end: ; preds = %entry + %sub = add nsw i32 %n, -2 + %call = call i32 @fib(i32 %sub) + %sub3 = add nsw i32 %n, -1 + %call4 = call i32 @fib(i32 %sub3) + %add = add nsw i32 %call, %call4 + br label %return + +return: ; preds = %if.end, %if.then + %retval.0 = phi i32 [ 1, %if.then ], [ %add, %if.end ] + ret i32 %retval.0 +} diff --git a/test/Unit/lit.cfg b/test/Unit/lit.cfg index 5fe0732..3509296 100644 --- a/test/Unit/lit.cfg +++ b/test/Unit/lit.cfg @@ -21,15 +21,21 @@ if llvm_obj_root is not None: llvm_build_mode = getattr(config, 'llvm_build_mode', "Debug") config.test_format = lit.formats.GoogleTest(llvm_build_mode, 'Tests') +# Propagate the temp directory. Windows requires this because it uses \Windows\ +# if none of these are present. +if 'TMP' in os.environ: + config.environment['TMP'] = os.environ['TMP'] +if 'TEMP' in os.environ: + config.environment['TEMP'] = os.environ['TEMP'] + ### # If necessary, point the dynamic loader at libLLVM.so. if config.enable_shared: - libdir = os.path.join(config.llvm_obj_root, config.llvm_build_mode, 'lib') shlibpath = config.environment.get(config.shlibpath_var,'') if shlibpath: - shlibpath = ':' + shlibpath - shlibpath = libdir + shlibpath + shlibpath = os.pathsep + shlibpath + shlibpath = config.shlibdir + shlibpath config.environment[config.shlibpath_var] = shlibpath # Check that the object root is known. diff --git a/test/Unit/lit.site.cfg.in b/test/Unit/lit.site.cfg.in index 51b5bc4..9643507 100644 --- a/test/Unit/lit.site.cfg.in +++ b/test/Unit/lit.site.cfg.in @@ -6,7 +6,17 @@ config.llvm_tools_dir = "@LLVM_TOOLS_DIR@" config.llvmgcc_dir = "@LLVMGCCDIR@" config.llvm_build_mode = "@LLVM_BUILD_MODE@" config.enable_shared = @ENABLE_SHARED@ +config.shlibdir = "@SHLIBDIR@" config.shlibpath_var = "@SHLIBPATH_VAR@" +# Support substitution of the tools_dir and build_mode with user parameters. +# This is used when we can't determine the tool dir at configuration time. +try: + config.llvm_tools_dir = config.llvm_tools_dir % lit.params + config.llvm_build_mode = config.llvm_build_mode % lit.params +except KeyError,e: + key, = e.args + lit.fatal("unable to find %r parameter, use '--param=%s=VALUE'" % (key,key)) + # Let the main config do the real work. lit.load_config(config, "@LLVM_SOURCE_DIR@/test/Unit/lit.cfg") diff --git a/test/lib/llvm.exp b/test/lib/llvm.exp index 19a2729..d92503a 100644 --- a/test/lib/llvm.exp +++ b/test/lib/llvm.exp @@ -47,7 +47,7 @@ proc execOneLine { test PRS outcome lineno line } { # cases. proc substitute { line test tmpFile } { global srcroot objroot srcdir objdir subdir target_triplet - global llvmgcc llvmgxx ocamlopt + global llvmgcc llvmgxx emitir ocamlopt global gccpath gxxpath compile_c compile_cxx link shlibext llvmlibsdir global llvmdsymutil valgrind grep gas bugpoint_topts set path [file join $srcdir $subdir] @@ -60,9 +60,9 @@ proc substitute { line test tmpFile } { #replace %llvmgcc_only with actual path to llvmgcc regsub -all {%llvmgcc_only} $new_line "$llvmgcc" new_line #replace %llvmgcc with actual path to llvmgcc - regsub -all {%llvmgcc} $new_line "$llvmgcc -emit-llvm -w" new_line + regsub -all {%llvmgcc} $new_line "$llvmgcc $emitir -w" new_line #replace %llvmgxx with actual path to llvmg++ - regsub -all {%llvmgxx} $new_line "$llvmgxx -emit-llvm -w" new_line + regsub -all {%llvmgxx} $new_line "$llvmgxx $emitir -w" new_line #replace %compile_cxx with C++ compilation command regsub -all {%compile_cxx} $new_line "$compile_cxx" new_line #replace %compile_c with C compilation command diff --git a/test/lit.cfg b/test/lit.cfg index 3ba4c99..9a2f74c 100644 --- a/test/lit.cfg +++ b/test/lit.cfg @@ -3,6 +3,8 @@ # Configuration file for the 'lit' test runner. import os +import sys +import re # name: The name of this test suite. config.name = 'LLVM' @@ -17,6 +19,18 @@ config.suffixes = [] # test_source_root: The root path where tests are located. config.test_source_root = os.path.dirname(__file__) +# Tweak PATH for Win32 +if sys.platform in ['win32']: + # Seek sane tools in directories and set to $PATH. + path = getattr(config, 'lit_tools_dir', None) + path = lit.getToolsPath(path, + config.environment['PATH'], + ['cmp.exe', 'grep.exe', 'sed.exe']) + if path is not None: + path = os.path.pathsep.join((path, + config.environment['PATH'])) + config.environment['PATH'] = path + # test_exec_root: The root path where tests should be run. llvm_obj_root = getattr(config, 'llvm_obj_root', None) if llvm_obj_root is not None: @@ -25,6 +39,18 @@ if llvm_obj_root is not None: # Tweak the PATH to include the scripts dir, the tools dir, and the llvm-gcc bin # dir (if available). if llvm_obj_root is not None: + # Include llvm-gcc first, as the llvm-gcc binaryies will not appear + # neither in the tools nor in the scripts dir. However it might be + # possible, that some old llvm tools are in the llvm-gcc dir. Adding + # llvm-gcc dir first ensures, that those will always be overwritten + # by the new tools in llvm_tools_dir. So now outdated tools are used + # for testing + llvmgcc_dir = getattr(config, 'llvmgcc_dir', None) + if llvmgcc_dir: + path = os.path.pathsep.join((os.path.join(llvmgcc_dir, 'bin'), + config.environment['PATH'])) + config.environment['PATH'] = path + llvm_src_root = getattr(config, 'llvm_src_root', None) if not llvm_src_root: lit.fatal('No LLVM source root set!') @@ -39,12 +65,6 @@ if llvm_obj_root is not None: path = os.path.pathsep.join((llvm_tools_dir, config.environment['PATH'])) config.environment['PATH'] = path - llvmgcc_dir = getattr(config, 'llvmgcc_dir', None) - if llvmgcc_dir: - path = os.path.pathsep.join((os.path.join(llvmgcc_dir, 'bin'), - config.environment['PATH'])) - config.environment['PATH'] = path - # Propagate 'HOME' through the environment. if 'HOME' in os.environ: config.environment['HOME'] = os.environ['HOME'] @@ -57,6 +77,13 @@ if 'INCLUDE' in os.environ: if 'LIB' in os.environ: config.environment['LIB'] = os.environ['LIB'] +# Propagate the temp directory. Windows requires this because it uses \Windows\ +# if none of these are present. +if 'TMP' in os.environ: + config.environment['TMP'] = os.environ['TMP'] +if 'TEMP' in os.environ: + config.environment['TEMP'] = os.environ['TEMP'] + # Propagate LLVM_SRC_ROOT into the environment. config.environment['LLVM_SRC_ROOT'] = getattr(config, 'llvm_src_root', '') @@ -125,12 +152,13 @@ for line in open(os.path.join(config.llvm_obj_root, 'test', 'site.exp')): # Add substitutions. config.substitutions.append(('%llvmgcc_only', site_exp['llvmgcc'])) -for sub in ['llvmgcc', 'llvmgxx', 'compile_cxx', 'compile_c', +for sub in ['llvmgcc', 'llvmgxx', 'emitir', 'compile_cxx', 'compile_c', 'link', 'shlibext', 'ocamlopt', 'llvmdsymutil', 'llvmlibsdir', + 'llvmshlibdir', 'bugpoint_topts']: if sub in ('llvmgcc', 'llvmgxx'): config.substitutions.append(('%' + sub, - site_exp[sub] + ' -emit-llvm -w')) + site_exp[sub] + ' %emitir -w')) # FIXME: This is a hack to avoid LLVMC tests failing due to a clang driver # warning when passing in "-fexceptions -fno-exceptions". elif sub == 'compile_cxx': @@ -139,6 +167,54 @@ for sub in ['llvmgcc', 'llvmgxx', 'compile_cxx', 'compile_c', else: config.substitutions.append(('%' + sub, site_exp[sub])) +# For each occurrence of an llvm tool name as its own word, replace it +# with the full path to the build directory holding that tool. This +# ensures that we are testing the tools just built and not some random +# tools that might happen to be in the user's PATH. Thus this list +# includes every tool placed in $(LLVM_OBJ_ROOT)/$(BuildMode)/bin +# (llvm_tools_dir in lit parlance). + # Don't match 'bugpoint-' or 'clang-'. + # Don't match '/clang'. +if os.pathsep == ';': + pathext = os.environ.get('PATHEXT', '').split(';') +else: + pathext = [''] +for pattern in [r"\bbugpoint\b(?!-)", r"(?<!/)\bclang\b(?!-)", + r"\bgold\b", + r"\bllc\b", r"\blli\b", + r"\bllvm-ar\b", r"\bllvm-as\b", + r"\bllvm-bcanalyzer\b", r"\bllvm-config\b", + r"\bllvm-diff\b", r"\bllvm-dis\b", + r"\bllvm-extract\b", r"\bllvm-ld\b", + r"\bllvm-link\b", r"\bllvm-mc\b", + r"\bllvm-nm\b", r"\bllvm-prof\b", + r"\bllvm-ranlib\b", r"\bllvm-shlib\b", + r"\bllvm-stub\b", r"\bllvm2cpp\b", + # Don't match '-llvmc'. + r"(?<!-)\bllvmc\b", r"\blto\b", + # Don't match '.opt', '-opt', + # '^opt' or '/opt'. + r"\bmacho-dump\b", r"(?<!\.|-|\^|/)\bopt\b", + r"\btblgen\b", r"\bFileCheck\b", + r"\bFileUpdate\b", r"\bc-index-test\b", + r"\bfpcmp\b", r"\bllvm-PerfectShuffle\b", + # Handle these specially as they are strings searched + # for during testing. + r"\| \bcount\b", r"\| \bnot\b"]: + # Extract the tool name from the pattern. This relies on the tool + # name being surrounded by \b word match operators. If the + # pattern starts with "| ", include it in the string to be + # substituted. + substitution = re.sub(r"^(\\)?((\| )?)\W+b([0-9A-Za-z-_]+)\\b\W*$", + r"\2" + llvm_tools_dir + "/" + r"\4", + pattern) + for ext in pathext: + substitution_ext = substitution + ext + if os.path.exists(substitution_ext): + substitution = substitution_ext + break + config.substitutions.append((pattern, substitution)) + excludes = [] # Provide target_triple for use in XFAIL and XTARGET. @@ -214,3 +290,19 @@ def on_clone(parent, cfg, for_path): lit.error('unable to understand %r:\n%s' % (libPath, lib)) config.on_clone = on_clone + +### Features + +# Shell execution +if sys.platform not in ['win32'] or lit.getBashPath() != '': + config.available_features.add('shell') + +# Loadable module +# FIXME: This should be supplied by Makefile or autoconf. +if sys.platform in ['win32', 'cygwin']: + loadable_module = (config.enable_shared == 1) +else: + loadable_module = True + +if loadable_module: + config.available_features.add('loadable_module') diff --git a/test/lit.site.cfg.in b/test/lit.site.cfg.in index 79b2c60..3588aa6 100644 --- a/test/lit.site.cfg.in +++ b/test/lit.site.cfg.in @@ -4,7 +4,17 @@ config.llvm_src_root = "@LLVM_SOURCE_DIR@" config.llvm_obj_root = "@LLVM_BINARY_DIR@" config.llvm_tools_dir = "@LLVM_TOOLS_DIR@" config.llvmgcc_dir = "@LLVMGCCDIR@" +config.lit_tools_dir = "@LLVM_LIT_TOOLS_DIR@" config.python_executable = "@PYTHON_EXECUTABLE@" +config.enable_shared = @ENABLE_SHARED@ + +# Support substitution of the tools_dir with user parameters. This is +# used when we can't determine the tool dir at configuration time. +try: + config.llvm_tools_dir = config.llvm_tools_dir % lit.params +except KeyError,e: + key, = e.args + lit.fatal("unable to find %r parameter, use '--param=%s=VALUE'" % (key,key)) # Let the main config do the real work. lit.load_config(config, "@LLVM_SOURCE_DIR@/test/lit.cfg") diff --git a/test/site.exp.in b/test/site.exp.in index c760c2c..277d549 100644 --- a/test/site.exp.in +++ b/test/site.exp.in @@ -5,6 +5,7 @@ set TARGETS_TO_BUILD "@TARGETS_TO_BUILD@" set llvmgcc_langs "@LLVMGCC_LANGS@" set llvmtoolsdir "@LLVM_TOOLS_DIR@" set llvmlibsdir "@LLVM_LIBS_DIR@" +set llvmshlibdir "@SHLIBDIR@" set llvm_bindings "@LLVM_BINDINGS@" set srcroot "@LLVM_SOURCE_DIR@" set objroot "@LLVM_BINARY_DIR@" @@ -24,3 +25,4 @@ set valgrind "@VALGRIND@" set grep "@GREP@" set gas "@AS@" set llvmdsymutil "@DSYMUTIL@" +set emitir "@LLVMCC_EMITIR_FLAG@" |