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-rw-r--r--test/CodeGen/MSP430/Inst16mm.ll17
-rw-r--r--test/CodeGen/X86/sse3.ll7
-rw-r--r--test/CodeGen/X86/store_op_load_fold2.ll8
3 files changed, 25 insertions, 7 deletions
diff --git a/test/CodeGen/MSP430/Inst16mm.ll b/test/CodeGen/MSP430/Inst16mm.ll
index 510afe3..2337c2c 100644
--- a/test/CodeGen/MSP430/Inst16mm.ll
+++ b/test/CodeGen/MSP430/Inst16mm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
+; RUN: llc -march=msp430 -combiner-alias-analysis < %s | FileCheck %s
target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
target triple = "msp430-generic-generic"
@foo = common global i16 0, align 2
@@ -52,3 +52,18 @@ define void @xor() nounwind {
ret void
}
+define i16 @mov2() nounwind {
+entry:
+ %retval = alloca i16 ; <i16*> [#uses=3]
+ %x = alloca i32, align 2 ; <i32*> [#uses=1]
+ %y = alloca i32, align 2 ; <i32*> [#uses=1]
+ store i16 0, i16* %retval
+ %tmp = load i32* %y ; <i32> [#uses=1]
+ store i32 %tmp, i32* %x
+ store i16 0, i16* %retval
+ %0 = load i16* %retval ; <i16> [#uses=1]
+ ret i16 %0
+; CHECK: mov2:
+; CHECK: mov.w 0(r1), 4(r1)
+; CHECK: mov.w 2(r1), 6(r1)
+}
diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll
index b2af7c9..921161e 100644
--- a/test/CodeGen/X86/sse3.ll
+++ b/test/CodeGen/X86/sse3.ll
@@ -144,10 +144,9 @@ define void @t9(<4 x float>* %r, <2 x i32>* %A) nounwind {
store <4 x float> %tmp13, <4 x float>* %r
ret void
; X64: t9:
-; X64: movsd (%rsi), %xmm0
-; X64: movaps (%rdi), %xmm1
-; X64: movlhps %xmm0, %xmm1
-; X64: movaps %xmm1, (%rdi)
+; X64: movaps (%rdi), %xmm0
+; X64: movhps (%rsi), %xmm0
+; X64: movaps %xmm0, (%rdi)
; X64: ret
}
diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll
index e862830..46e59e9 100644
--- a/test/CodeGen/X86/store_op_load_fold2.ll
+++ b/test/CodeGen/X86/store_op_load_fold2.ll
@@ -1,5 +1,4 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
-; RUN: grep {and DWORD PTR} | count 2
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s
target datalayout = "e-p:32:32"
%struct.Macroblock = type { i32, i32, i32, i32, i32, [8 x i32], %struct.Macroblock*, %struct.Macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
@@ -16,5 +15,10 @@ cond_true2732.preheader: ; preds = %entry
%tmp2676.us.us = and i64 %tmp2667.us.us, %tmp2675not.us.us ; <i64> [#uses=1]
store i64 %tmp2676.us.us, i64* %tmp2666
ret i32 0
+
+; CHECK: and {{E..}}, DWORD PTR [360]
+; CHECK: and DWORD PTR [356], {{E..}}
+; CHECK: mov DWORD PTR [360], {{E..}}
+
}