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-rw-r--r--test/CodeGen/Mips/o32_cc.ll55
1 files changed, 39 insertions, 16 deletions
diff --git a/test/CodeGen/Mips/o32_cc.ll b/test/CodeGen/Mips/o32_cc.ll
index 8747bee..e28ba6e 100644
--- a/test/CodeGen/Mips/o32_cc.ll
+++ b/test/CodeGen/Mips/o32_cc.ll
@@ -1,9 +1,12 @@
; RUN: llc -march=mipsel < %s | FileCheck %s
+; RUN: llc -march=mipsel -mattr=+fp64 < %s | FileCheck %s
+; RUN: llc -march=mipsel < %s | FileCheck -check-prefix=FP32EL %s
+; RUN: llc -march=mipsel -mattr=+fp64 < %s | FileCheck -check-prefix=FP64EL %s
; $f12, $f14
-; CHECK-LABEL: testlowercall0:
-; CHECK-DAG: ldc1 $f12, %lo
-; CHECK-DAG: ldc1 $f14, %lo
+; FP32EL-LABEL: testlowercall0:
+; FP32EL-DAG: ldc1 $f12, %lo
+; FP32EL-DAG: ldc1 $f14, %lo
define void @testlowercall0() nounwind {
entry:
tail call void @f0(double 5.000000e+00, double 6.000000e+00) nounwind
@@ -25,9 +28,9 @@ entry:
declare void @f1(float, float)
; $f12, $f14
-; CHECK-LABEL: testlowercall2:
-; CHECK-DAG: lwc1 $f12, %lo
-; CHECK-DAG: ldc1 $f14, %lo
+; FP32EL-LABEL: testlowercall2:
+; FP32EL-DAG: lwc1 $f12, %lo
+; FP32EL-DAG: ldc1 $f14, %lo
define void @testlowercall2() nounwind {
entry:
tail call void @f2(float 8.000000e+00, double 6.000000e+00) nounwind
@@ -135,8 +138,12 @@ declare void @f9(i32, i32, i32, float)
; CHECK-LABEL: testlowercall10:
; CHECK-DAG: addiu $4, $zero, 42
; CHECK-DAG: addiu $5, $zero, 73
-; CHECK-DAG: mfc1 $6, $f{{[0-9]+}}
-; CHECK-DAG: mfc1 $7, $f{{[0-9]+}}
+; FP32EL-LABEL: testlowercall10:
+; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
+; FP64EL-LABEL: testlowercall10:
+; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
define void @testlowercall10() nounwind {
entry:
tail call void @f10(i32 42, i32 73, double 2.700000e+01) nounwind
@@ -148,8 +155,12 @@ declare void @f10(i32, i32, double)
; $4, ($6, $7)
; CHECK-LABEL: testlowercall11:
; CHECK-DAG: addiu $4, $zero, 52
-; CHECK-DAG: mfc1 $6, $f{{[0-9]+}}
-; CHECK-DAG: mfc1 $7, $f{{[0-9]+}}
+; FP32EL-LABEL: testlowercall11:
+; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
+; FP64EL-LABEL: testlowercall11:
+; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
define void @testlowercall11() nounwind {
entry:
tail call void @f11(i32 52, double 1.600000e+01) nounwind
@@ -204,8 +215,12 @@ declare void @f14(double, float, float)
; CHECK-LABEL: testlowercall15:
; CHECK-DAG: lwc1 $f12, %lo
; CHECK-DAG: lwc1 $f14, %lo
-; CHECK-DAG: mfc1 $6, $f{{[0-9]+}}
-; CHECK-DAG: mfc1 $7, $f{{[0-9]+}}
+; FP32EL-LABEL: testlowercall15:
+; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
+; FP64EL-LABEL: testlowercall15:
+; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
define void @testlowercall15() nounwind {
entry:
tail call void @f15(float 4.800000e+01, float 3.900000e+01, double 3.700000e+01) nounwind
@@ -260,10 +275,14 @@ declare void @f18(i32, i32, float, i32)
; $4, ($6, $7), stack
; CHECK-LABEL: testlowercall20:
; CHECK-DAG: addiu $4, $zero, 92
-; CHECK-DAG: mfc1 $6, $f{{[0-9]+}}
-; CHECK-DAG: mfc1 $7, $f{{[0-9]+}}
; CHECK-DAG: sw ${{[a-z0-9]+}}, 16($sp)
; CHECK-DAG: sw ${{[a-z0-9]+}}, 20($sp)
+; FP32EL-LABEL: testlowercall20:
+; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
+; FP64EL-LABEL: testlowercall20:
+; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
define void @testlowercall20() nounwind {
entry:
tail call void @f20(i32 92, double 2.600000e+01, double 4.700000e+01) nounwind
@@ -288,8 +307,12 @@ declare void @f21(float, i32)
; CHECK-LABEL: testlowercall22:
; CHECK-DAG: lwc1 $f12, %lo
; CHECK-DAG: addiu $5, $zero, 113
-; CHECK-DAG: mfc1 $6, $f{{[0-9]+}}
-; CHECK-DAG: mfc1 $7, $f{{[0-9]+}}
+; FP32EL-LABEL: testlowercall22:
+; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
+; FP64EL-LABEL: testlowercall22:
+; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
+; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
define void @testlowercall22() nounwind {
entry:
tail call void @f22(float 6.800000e+01, i32 113, double 5.700000e+01) nounwind