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-rw-r--r--utils/TableGen/AsmWriterInst.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/utils/TableGen/AsmWriterInst.h b/utils/TableGen/AsmWriterInst.h
index 6a900b7..a597e6b 100644
--- a/utils/TableGen/AsmWriterInst.h
+++ b/utils/TableGen/AsmWriterInst.h
@@ -53,6 +53,11 @@ namespace llvm {
/// an operand, specified with syntax like ${opname:modifier}.
std::string MiModifier;
+ // PassSubtarget - Pass MCSubtargetInfo to the print method if this is
+ // equal to 1.
+ // FIXME: Remove after all ports are updated.
+ unsigned PassSubtarget;
+
// To make VS STL happy
AsmWriterOperand(OpType op = isLiteralTextOperand):OperandType(op) {}
@@ -64,9 +69,10 @@ namespace llvm {
unsigned _CGIOpNo,
unsigned _MIOpNo,
const std::string &Modifier,
+ unsigned PassSubtarget,
OpType op = isMachineInstrOperand)
: OperandType(op), Str(Printer), CGIOpNo(_CGIOpNo), MIOpNo(_MIOpNo),
- MiModifier(Modifier) {}
+ MiModifier(Modifier), PassSubtarget(PassSubtarget) {}
bool operator!=(const AsmWriterOperand &Other) const {
if (OperandType != Other.OperandType || Str != Other.Str) return true;
@@ -88,7 +94,7 @@ namespace llvm {
const CodeGenInstruction *CGI;
AsmWriterInst(const CodeGenInstruction &CGI,
- unsigned Variant);
+ unsigned Variant, unsigned PassSubtarget);
/// MatchesAllButOneOp - If this instruction is exactly identical to the
/// specified instruction except for one differing operand, return the