aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Get rid of all references to soimm in MipsConstantIslands pass becauseReed Kotler2013-11-051-12/+7
| | | | | | | | | | | | | we don't have such an operand. Suprisingly enough, this is never actually accounted for in the ARM version when determining offset ranges. In both places there is the comment: - // FIXME: Make use full range of soimm values. (soimm = shift operand immediate). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194101 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup getUserOffset. Issues related to inline assembler length andReed Kotler2013-11-051-16/+1
| | | | | | | | alignment will be handled differently than in ARM constant islands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194096 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: permit bare dmb/dsb/isb aliases on Cortex-M0Tim Northover2013-11-052-4/+34
| | | | | | | | Cortex-M0 supports these 32-bit instructions despite being Thumb1 only (mostly). We knew about that but not that the aliases without the default "sy" operand were also permitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194094 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert comments to documentation comments (// -> ///)Dmitri Gribenko2013-11-051-9/+10
| | | | | | | Patch by MathOnNapkins git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194093 91177308-0d34-0410-b5e6-96231b3b80d8
* Use error_code in GVMaterializer.Rafael Espindola2013-11-054-31/+38
| | | | | | They just propagate out the bitcode reader error, so we don't need a new enum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194091 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 Neon Crypto instruction classes AES, SHA, and 3 SHA.Jiangning Liu2013-11-057-5/+468
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194085 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert FindFunctionInStream to return an error_code.Rafael Espindola2013-11-052-5/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194084 91177308-0d34-0410-b5e6-96231b3b80d8
* [objc-arc] Convert the one directional retain/release relation assert to a ↵Michael Gottesman2013-11-052-3/+294
| | | | | | | | | | | | | | | | | conditional check + fail. Due to the previously added overflow checks, we can have a retain/release relation that is one directional. This occurs specifically when we run into an additive overflow causing us to drop state in only one direction. If that occurs, we should bail and not optimize that retain/release instead of asserting. Apologies for the size of the testcase. It is necessary to cause the additive cfg overflow to trigger. rdar://15377890 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194083 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide a test input for optAlp Toker2013-11-051-6/+6
| | | | | | | This was only working previously due to a quirk in the way lit concatenates script commands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194078 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence GCC warning about dropping off a fully covered switch.Benjamin Kramer2013-11-051-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194077 91177308-0d34-0410-b5e6-96231b3b80d8
* [OCaml] (PR16190) Add ValueKinds for ConstantDataSequential and subclassesPeter Zotov2013-11-053-0/+8
| | | | | | Original patch by David Monniaux git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194075 91177308-0d34-0410-b5e6-96231b3b80d8
* [llvm-c] (PR16190) Add LLVMIsA* functions for ConstantDataSequential and ↵Peter Zotov2013-11-051-0/+3
| | | | | | | | subclasses Original patch by David Monniaux git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194074 91177308-0d34-0410-b5e6-96231b3b80d8
* [OCaml] (PR10016) Add a few missing line in OCamlLangImpl2.rstPeter Zotov2013-11-051-0/+3
| | | | | | Original patch by Damien Schoof git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194067 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the word "thumb" from comments. Remove also an incorrectReed Kotler2013-11-051-24/+6
| | | | | | | | command regarding the porting from the ARM version (was an old comment). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194066 91177308-0d34-0410-b5e6-96231b3b80d8
* [OCaml] (PR16318) Add missing argument to Llvm.const_intcastPeter Zotov2013-11-054-5/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194065 91177308-0d34-0410-b5e6-96231b3b80d8
* [OCaml] (PR11717) Make declare_qualified_global respect address argumentPeter Zotov2013-11-052-4/+8
| | | | | | Original patch by Jonathan Ragan-Kelley git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194064 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Disassembler: remove unused bool typedef-nameDavid Majnemer2013-11-051-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194062 91177308-0d34-0410-b5e6-96231b3b80d8
* Suppress OS crash dialog in llvm-rtdyldAlp Toker2013-11-051-0/+5
| | | | | | | All other tools have this -- it's needed to avoid hanging lit on Windows in case of a crash. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194060 91177308-0d34-0410-b5e6-96231b3b80d8
* [OCaml] Properly tag the custom operations of Llvm.llbuilderPeter Zotov2013-11-051-1/+1
| | | | | | All other custom operations tags have LLVM prefix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194058 91177308-0d34-0410-b5e6-96231b3b80d8
* [OCaml] Llvm_linker: do not use external in module interfacePeter Zotov2013-11-051-2/+1
| | | | | | | Workaround for an OCaml bug: http://caml.inria.fr/mantis/view.php?id=4166 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194057 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix r194019 as requested by Eric Christopher.Reed Kotler2013-11-053-13/+1444
| | | | | | | | | | | | | | | | | | | | | | | Submit the basic port of the rest of ARM constant islands code to Mips. Two test cases are added which reflect the next level of functionality: constants getting moved to water areas that are out of range from the initial placement at the end of the function and basic blocks being split to create water when none exists that can be used. There is a bunch of this code that is not complete and has been marked with IN_PROGRESS. I will finish cleaning this all up during the next week or two and submit the rest of the test cases. I have elminated some code for dealing with inline assembly because to me it unecessarily complicates things and some of the newer features of llvm like function attributies and builtin assembler give me better tools to solve the alignment issues created there. Also, for Mips16 I even have the option of not doing constant islands in the present of inline assembler if I chose. When everything has been completed I will summarize the port and notify people that are knowledgable regarding the ARM Constant Islands code so they can review it in it's entirety if they wish. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194053 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix symbol defines in config.h.cmakeAlp Toker2013-11-051-3/+3
| | | | | | | | | These were incorrectly pointing to HAVE_LOG despite being checked for correctly in config-ix.cmake. Patch by James Lyon! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194051 91177308-0d34-0410-b5e6-96231b3b80d8
* Lift alignment restrictions on load folding for a significant portion of AVX ↵Craig Topper2013-11-051-166/+166
| | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194048 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 post-index vector load/store multiple N-element structure ↵Hao Liu2013-11-0511-15/+1425
| | | | | | | | | | | | | class SIMD(lselem-post). Including following 14 instructions: 4 ld1 insts: post-index load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: post-index load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: post-index store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: post-index store multiple N-element structure from sequential N registers (N = 2,3,4). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194043 91177308-0d34-0410-b5e6-96231b3b80d8
* Implemented aarch64 neon intrinsic vcopy_lane with float type.Kevin Qin2013-11-053-88/+194
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194041 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "llvm-cov: Added command-line option to change dir."Yuchen Wu2013-11-052-19/+7
| | | | | | This reverts commit d8acf0078cf363252727acff00f85ae8074f95b3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194040 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Added basic unit test for llvm-cov."Yuchen Wu2013-11-057-169/+0
| | | | | | This reverts commit 9cacd131c22b888303cb88e9a3235b2d7b2f19a1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194039 91177308-0d34-0410-b5e6-96231b3b80d8
* Added basic unit test for llvm-cov.Yuchen Wu2013-11-057-0/+169
| | | | | | | This test compares the output of llvm-cov against a coverage file generated by gcov. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194038 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-cov: Added command-line option to change dir.Yuchen Wu2013-11-052-7/+19
| | | | | | | This will allow for much easier testing when the input files are in a different folder from the test script. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194034 91177308-0d34-0410-b5e6-96231b3b80d8
* Support for reading run counts in llvm-cov.Yuchen Wu2013-11-052-3/+32
| | | | | | | | | | | | This patch enables llvm-cov to correctly output the run count stored in the GCDA file. GCOVProfiling currently does not generate this information, so the GCDA run data had to be hacked on from a GCDA file generated by gcc. This is corrected by a subsequent patch. With the run and program data included, both llvm-cov and gcov produced the same output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194033 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix MSVC build by not putting an error_code directly in a union.Rafael Espindola2013-11-051-6/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194032 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify ErrorOr.Rafael Espindola2013-11-052-252/+5
| | | | | | | | | | | | | | | | ErrorOr had quiet a bit of complexity and indirection to be able to hold a user type with the error. That feature is not used anymore. This patch removes it, it will live in svn history if we ever need it again. If we do need it again, IMHO there is one thing that should be done differently: Holding extra info in the error is not a property a function also returning a value or not. The ability to hold extra info should be in the error type and ErrorOr templated over it so that we don't need the funny looking ErrorOr<void>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194030 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a runtime unrolling parameter to the LoopUnroll pass constructorHal Finkel2013-11-052-7/+12
| | | | | | | | | | | As with the other loop unrolling parameters (the unrolling threshold, partial unrolling, etc.) runtime unrolling can now also be controlled via the constructor. This will be necessary for moving non-trivial unrolling late in the pass manager (after loop vectorization). No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194027 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r194019 to r194021, "Submit the basic port of the rest of ARM ↵NAKAMURA Takumi2013-11-043-1563/+12
| | | | | | | | constant islands code to Mips." It broke -Asserts build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194026 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: remove unnecessary state-tracking during frame lowering.Tim Northover2013-11-046-115/+58
| | | | | | | | | | | | | | | | | | | | | ResolveFrameIndex had what appeared to be a very nasty hack for when the frame-index referred to a callee-saved register. In this case it "adjusted" the offset so that the address was correct if (and only if) the MachineInstr immediately followed the respective push. This "worked" for all forms of GPR & DPR but was only ever used to set the frame pointer itself, and once this was put in a more sensible location the entire state-tracking machinery it relied on became redundant. So I stripped it. The only wrinkle is that "add r7, sp, #0" might theoretically be slower (need an actual ALU slot) compared to "mov r7, sp" so I added a micro-optimisation that also makes emitARMRegUpdate and emitT2RegUpdate also work when NumBytes == 0. No test changes since there shouldn't be any functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194025 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: use default asm operand printing when modifier inapplicableTim Northover2013-11-042-47/+88
| | | | | | | | | | | | If an inline assembly operand has multiple constraints (e.g. "Ir" for immediate or register) and an operand modifier (E.g. "w" for "print register as wN") then we need to decide behaviour when the modifier doesn't apply to the constraint. Previousely produced some combination of an assertion failure and a fatal error. GCC's behaviour appears to be to ignore the modifier and print the operand in the default way. This patch should implement that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194024 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure we don't get a warning from this variable that is only usedReed Kotler2013-11-041-0/+1
| | | | | | | | when compiling with DEBUG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194021 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the test case that goes with the previous submission for constant Reed Kotler2013-11-041-0/+64
| | | | | | | | islands. I forgot to add it to svn on that patch. Ooops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194020 91177308-0d34-0410-b5e6-96231b3b80d8
* Submit the basic port of the rest of ARM constant islands code to Mips. Reed Kotler2013-11-042-12/+1498
| | | | | | | | | | | | | | | | | | | Two test cases are added which reflect the next level of functionality: constants getting moved to water areas that are out of range from the initial placement at the end of the function and basic blocks being split to create water when none exists that can be used. There is a bunch of this code that is not complete and has been marked with IN_PROGRESS. I will finish cleaning this all up during the next week or two and submit the rest of the test cases. I have elminated some code for dealing with inline assembly because to me it unecessarily complicates things and some of the newer features of llvm like function attributies and builtin assembler give me better tools to solve the alignment issues created there. Also, for Mips16 I even have the option of not doing constant islands in the present of inline assembler if I chose. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194019 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead codeShuxin Yang2013-11-041-6/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194017 91177308-0d34-0410-b5e6-96231b3b80d8
* Check for both styles of clobbers, those produced by dragonegg andEric Christopher2013-11-042-20/+41
| | | | | | | | those produced by clang for the inline asm bswap conversion. Modified from a patch by Chris Smowton. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194016 91177308-0d34-0410-b5e6-96231b3b80d8
* SLPVectorizer: Use properlyDominates to satisfy the irreflexivity of a ↵Benjamin Kramer2013-11-041-1/+1
| | | | | | | | strict weak ordering. STL debug mode checks this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194015 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix another constant folding address space place I missed.Matt Arsenault2013-11-042-13/+38
| | | | | | This fixes an assertion failure with a different sized address space. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194014 91177308-0d34-0410-b5e6-96231b3b80d8
* Scalarize select vector arguments when extracted.Matt Arsenault2013-11-043-29/+163
| | | | | | | | When the elements are extracted from a select on vectors or a vector select, do the select on the extracted scalars from the input if there is only one use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194013 91177308-0d34-0410-b5e6-96231b3b80d8
* [docs] Add link to 32-bit ARM ELF supplement.Sean Silva2013-11-041-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194011 91177308-0d34-0410-b5e6-96231b3b80d8
* Use startswith_lower() where possible.Jakub Staszak2013-11-042-9/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194007 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for AVX512 masked vector blend intrinsics.Cameron McInally2013-11-043-18/+92
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194006 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename testing case to use - instead of _.Manman Ren2013-11-041-0/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194001 91177308-0d34-0410-b5e6-96231b3b80d8
* Change BitcodeReader to use error_code instead of bool + string.Rafael Espindola2013-11-044-381/+495
| | | | | | | | In order to create an ObjectFile implementation that uses bitcode files, we need to propagate the bitcode errors to the ObjectFile interface, so we need to convert it to use the same error handling as ObjectFile: error_code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193996 91177308-0d34-0410-b5e6-96231b3b80d8
* Support for microMIPS branch instructions.Zoran Jovanovic2013-11-0417-26/+342
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193992 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2025-01-13 15:17:38 +0000