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* Fix test cases.Akira Hatanaka2012-05-1213-76/+76
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156697 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove MipsEmitGPRestore.cpp.Akira Hatanaka2012-05-123-99/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156696 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete all functions that are no longer needed in MipsFunctionInfo, includingAkira Hatanaka2012-05-122-15/+1
| | | | | | | | | | | the ones that get or set the frame index for the $gp save slot. Remove the piece of code in MipsFunctionInfo::getGlobalBaseReg() which returns GP. This function should always return a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156695 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop reserving register $gp. Do not call isGPFI to check whether a frame objectAkira Hatanaka2012-05-121-8/+1
| | | | | | | is the $gp save slot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156694 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not add the pass which restores $gp after every function call.Akira Hatanaka2012-05-121-9/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156693 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the following changes in MipsISelLowering.cpp:Akira Hatanaka2012-05-121-8/+8
| | | | | | | | | | - Stop creating stack frame objects needed for saving $gp. - Insert a node that copies the global pointer register to register $gp before the call node. This will ensure $gp is valid at the entry of the called function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156692 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the following changes in MipsFrameLowering.cpp:Akira Hatanaka2012-05-121-32/+3
| | | | | | | | | - Stop emitting instructions needed to initialize the global pointer register. - Stop emitting .cprestore directive. - Do not take into account the $gp save slot when computing stack size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156691 91177308-0d34-0410-b5e6-96231b3b80d8
* Speed up computeComposites() by using the new SubReg -> SubIdx map.Jakob Stoklund Olesen2012-05-121-12/+10
| | | | | | | TableGen doesn't need to search through the SubRegs map to find an inverse entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156690 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the following changes in MipsAsmPrinter.cpp:Akira Hatanaka2012-05-126-37/+19
| | | | | | | | | | | - Remove code which lowers pseudo SETGP01. - Fix LowerSETGP01. The first two of the three instructions that are emitted to initialize the global pointer register now use register $2. - Stop emitting .cpload directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156689 91177308-0d34-0410-b5e6-96231b3b80d8
* Hoist simpler checks above llvm::PointerMayBeCaptured. No functional change ↵Chad Rosier2012-05-121-4/+6
| | | | | | intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156687 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't look for empty live ranges in the unions.Jakob Stoklund Olesen2012-05-121-1/+4
| | | | | | | | | Empty live ranges represent undef and still get allocated, but they won't appear in LiveIntervalUnions. Patch by Patrik Hägglund! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156685 91177308-0d34-0410-b5e6-96231b3b80d8
* Insert instructions to the entry basic block which initializes the globalAkira Hatanaka2012-05-123-38/+57
| | | | | | | | | | | | | | | | | | | | pointer register. This is the first of the series of patches which clean up the way global pointer register is used. The patches will make the following improvements: - Make $gp an allocatable temporary register rather than reserving it. - Use a virtual register as the global pointer register and let the register allocator decide which register to assign to it or whether spill/reloads are needed. - Make sure $gp is valid at the entry of a called function, which is necessary for functions using lazy binding. - Remove the need for emitting .cprestore and .cpload directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156671 91177308-0d34-0410-b5e6-96231b3b80d8
* Add doxygen comments.Michael J. Spencer2012-05-111-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156665 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not replace operands of pseudo instructions with register $zero.Akira Hatanaka2012-05-112-1/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156663 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 156658.Chad Rosier2012-05-111-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156662 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Fast-isel doesn't use the expect intrinsic.Chad Rosier2012-05-111-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156658 91177308-0d34-0410-b5e6-96231b3b80d8
* Use regular expression to match register names. Akira Hatanaka2012-05-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156656 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the URL a link instead.Bill Wendling2012-05-111-11/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156655 91177308-0d34-0410-b5e6-96231b3b80d8
* [Support/StringRef] Add find_last_not_of and {r,l,}trim.Michael J. Spencer2012-05-113-0/+76
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156652 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove extraneous ; and the resulting warning.Bill Wendling2012-05-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156649 91177308-0d34-0410-b5e6-96231b3b80d8
* Add mention of Glasgow Haskell Compiler.Bill Wendling2012-05-111-1/+34
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156648 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Add support for selecting @llvm.trap().Chad Rosier2012-05-112-0/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156646 91177308-0d34-0410-b5e6-96231b3b80d8
* Updated instruction table due to addded intrinsics.Brendon Cahoon2012-05-111-1880/+1943
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156644 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove warnings from HexagonVLIWPacketizer.Sirish Pande2012-05-111-3/+3
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* Some release notes for dragonegg.Duncan Sands2012-05-111-6/+19
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* Hexagon constant extender support.Brendon Cahoon2012-05-1117-343/+3700
| | | | | | | Patch by Jyotsna Verma. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156634 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo.Chad Rosier2012-05-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156633 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. ↵Chad Rosier2012-05-112-13/+3
| | | | | | Minor cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156632 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon V5 intrinsics support.Sirish Pande2012-05-114-961/+2613
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156631 91177308-0d34-0410-b5e6-96231b3b80d8
* Defer computation of SuperRegs.Jakob Stoklund Olesen2012-05-112-11/+36
| | | | | | | | Don't compute the SuperRegs list until the sub-register graph is completely finished. This guarantees that the list of super-registers is properly topologically ordered, and has no duplicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156629 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier2012-05-112-4/+38
| | | | | | | | | retval. Hoists check before emitting the call to avoid unnecessary work. rdar://11430407 PR12796 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156628 91177308-0d34-0410-b5e6-96231b3b80d8
* objectsize: add a few more tests and fix a bugNuno Lopes2012-05-112-1/+56
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156625 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Rather then assert (or segfault in a non-asserts build), fall backChad Rosier2012-05-111-2/+4
| | | | | | | | | to selection DAG isel if we're unable to handle a non-double multi-reg retval. rdar://11430407 PR12796 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156622 91177308-0d34-0410-b5e6-96231b3b80d8
* The return type is an unsigned, not a bool.Chad Rosier2012-05-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156621 91177308-0d34-0410-b5e6-96231b3b80d8
* Add space before an open parenthesis in control flow statements.Manman Ren2012-05-111-2/+2
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* Added X86 Atom latencies to X86InstrMMX.td.Preston Gurd2012-05-114-130/+350
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156615 91177308-0d34-0410-b5e6-96231b3b80d8
* PR1255: ConstantRangesSet and CRSBuilder classes moved from include/llvm to ↵Stepan Dyatkovskiy2012-05-112-1/+1
| | | | | | include/llvm/Support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156613 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test/CodeGen/X86/tls-pie.ll.Hans Wennborg2012-05-111-1/+1
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* Implement initial-exec TLS model for 32-bit PIC x86Hans Wennborg2012-05-115-20/+48
| | | | | | | This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong code here (see the update to test/CodeGen/X86/tls-pie.ll). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156611 91177308-0d34-0410-b5e6-96231b3b80d8
* Added the missing bit definition for the 4th bit of the STR (post reg) ↵Silviu Baranga2012-05-114-0/+72
| | | | | | instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156609 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate ↵Silviu Baranga2012-05-113-3/+12
| | | | | | offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156608 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a use after free when the streamer is destroyed. Fixes pr12622.Rafael Espindola2012-05-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156606 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a misleading comment.Akira Hatanaka2012-05-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156603 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Trailing whitespace.Jim Grosbach2012-05-1112-35/+35
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156602 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Trailing whitespace.Jim Grosbach2012-05-118-55/+55
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156601 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a minor logic mistake transforming compares in instcombine. PR12514.Eli Friedman2012-05-112-1/+16
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* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-113-27/+162
| | | | | | | | | | | | | | | | | | | This patch will optimize the following cases: sub r1, r3 | sub r1, imm cmp r3, r1 or cmp r1, r3 | cmp r1, imm bge L1 TO subs r1, r3 bge L1 or ble L1 If the branch instruction can use flag from "sub", then we can replace "sub" with "subs" and eliminate the "cmp" instruction. rdar: 10734411 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156599 91177308-0d34-0410-b5e6-96231b3b80d8
* Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman2012-05-118-2/+55
| | | | | | | but it generates int3 on x86 instead of ud2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156593 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow unique_file to take a mode for file permissions, but defaultEric Christopher2012-05-113-7/+10
| | | | | | | | to user only read/write. Part of rdar://11325849 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156591 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix intendation.Chad Rosier2012-05-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156589 91177308-0d34-0410-b5e6-96231b3b80d8
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