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* Add a debug obj-path option to make it easy to keep the .o produce by LTO.Rafael Espindola2011-02-161-14/+24
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* Remove outdated README entry.Eli Friedman2011-02-161-12/+0
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* Remove outdated README entry.Eli Friedman2011-02-161-16/+0
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* Update README entry.Eli Friedman2011-02-161-13/+6
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* Refactor zero folding slightly. Clean up todo.Eric Christopher2011-02-161-22/+20
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* Gas is very inconsistent about when a relaxation/relocation is needed. DoRafael Espindola2011-02-166-65/+20
| | | | | | the right thing and stop trying to copy it. Fixes PR8944. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125648 91177308-0d34-0410-b5e6-96231b3b80d8
* The change for PR9190 wasn't quite right. We need to avoid making theEric Christopher2011-02-162-2/+53
| | | | | | | | | | | transformation if we can't legally create a build vector of the correct type. Check that we can make the transformation first, and add a TODO to refactor this code with similar cases. Fixes: PR9223 and rdar://9000350 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125631 91177308-0d34-0410-b5e6-96231b3b80d8
* Add testcase for PR9190.Eric Christopher2011-02-161-0/+35
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* Add support for pushsection and popsection. Patch by Joerg Sonnenberger.Rafael Espindola2011-02-1613-66/+226
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* Remove a duplicated check.Evan Cheng2011-02-161-1/+1
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* Some single precision VFP instructions may be executed on NEON pipeline, but ↵Evan Cheng2011-02-162-28/+160
| | | | | | not double precision ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125624 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach PatternMatch that splat vectors could be floating point as well asNick Lewycky2011-02-152-3/+32
| | | | | | | integer. Fixes PR9228! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125613 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for parsing [expr].Roman Divacky2011-02-153-0/+28
| | | | | | | | This is submitted by Joerg Sonnenberger and fixes his PR8685. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125595 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach ARMLoadStoreOptimizer to remove kill flags from merged instructions as ↵Jakob Stoklund Olesen2011-02-151-21/+15
| | | | | | | | | | | | | | | | | | | | | | | | | well. This is necessary to avoid a crash in certain tangled situations where a kill flag is first correctly moved to a merged instruction, and then needs to be moved again: STR %R0, a... STR %R0<kill>, b... First becomes: STR %R0, b... STM a, %R0<kill>, ... and then: STM a, %R0, ... STM b, %R0<kill>, ... We can now remove the kill flag from the merged STM when needed. 8960050. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125591 91177308-0d34-0410-b5e6-96231b3b80d8
* Ignore DBG_VALUE machine instructions while constructing instruction ranges ↵Devang Patel2011-02-152-2/+6
| | | | | | | | | based on location info. Machine instruction range consisting of only DBG_VALUE MIs only contributes consecutive labels in assembly output, which is harmless, and empty scope entry in DebugInfo, which confuses debugger tools. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125577 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a function from PathV2 whose definition is missing.Argyrios Kyrtzidis2011-02-151-0/+6
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* Move DbgInfoPrinter specific utlities inside DbgInfoPrinter.cppDevang Patel2011-02-153-115/+112
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* Print function info. Patch by Minjang Kim.Devang Patel2011-02-152-2/+34
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* Spelling fix: consequtive -> consecutive.Duncan Sands2011-02-159-9/+9
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* When tablegen'ing the clang analyzer checkers:Argyrios Kyrtzidis2011-02-151-27/+62
| | | | | | | | -Use the tablegen class name for the checker class name. -Mark checker packages as hidden/not hidden. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125558 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 9216 - Endless loop in InstCombine pass.Nadav Rotem2011-02-152-1/+24
| | | | | | | | | The pattern "A&(A^B) -> A & ~B" recreated itself because ~B is actually a xor -1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125557 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix thinko. Cmp can be the first instruction in a MBB.Evan Cheng2011-02-151-2/+5
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* Do not forget DebugLoc!Devang Patel2011-02-151-0/+1
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* tidy up a bit.Chris Lattner2011-02-151-7/+9
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* Minor fixes to tutorial, patch by Benjamin Meyer!Chris Lattner2011-02-151-2/+2
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* fix commentsChris Lattner2011-02-151-2/+2
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* convert ConstantVector::get to use ArrayRef.Chris Lattner2011-02-1512-178/+97
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* fix some typos.Chris Lattner2011-02-151-5/+5
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* Remove unused bitvectors that record ARM callee-saved registers.Bob Wilson2011-02-142-23/+0
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* Move more fragments of spill weight calculation into CalcSpillWeights.hJakob Stoklund Olesen2011-02-144-16/+25
| | | | | | | | | | Simplify the spill weight calculation a bit by bypassing getApproximateInstructionCount() and using LiveInterval::getSize() directly. This changes the computed spill weights, but only by a constant factor in each function. It should not affect how spill weights compare against each other, and so it shouldn't affect code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125530 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not hoist @llvm.dbg.value. Here, @llvm.dbg.value is "referring" a value ↵Devang Patel2011-02-142-1/+61
| | | | | | that is modified inside loop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125529 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch llvm to using comdats. For now always use groups with a singleRafael Espindola2011-02-145-28/+18
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* PR9139: Specify ARM/Darwin triple for vector-DAGCombine.ll test.Bob Wilson2011-02-141-2/+2
| | | | | | | The i64_buildvector test in this file relies on the alignment of i64 and f64 types being the same, which is true for Darwin but not AAPCS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125525 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR8854. Track inserted copies to avoid read before write. Sorry, it's ↵Evan Cheng2011-02-141-4/+16
| | | | | | hard to reduce a sensible small test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125523 91177308-0d34-0410-b5e6-96231b3b80d8
* A fail to match coprocessor number and register number must fail instead of ↵Bruno Cardoso Lopes2011-02-141-1/+0
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* Add current binary and source directories to the header search listOscar Fuentes2011-02-141-0/+2
| | | | | | for all compiler invocations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125513 91177308-0d34-0410-b5e6-96231b3b80d8
* revert my ConstantVector patch, it seems to have made the llvm-gccChris Lattner2011-02-1413-99/+180
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* Add the ClangSACheckersEmitter tablegen backend which will be used for the ↵Argyrios Kyrtzidis2011-02-144-0/+233
| | | | | | clang static analyzer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125493 91177308-0d34-0410-b5e6-96231b3b80d8
* Move broken HasCommonSymbols to ELFWriter.cpp.Rafael Espindola2011-02-143-17/+13
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* Fix encoding and add parsing support for the arm/thumb CPS instruction:Bruno Cardoso Lopes2011-02-1416-109/+318
| | | | | | | | | | | | | | - Add custom operand matching for imod and iflags. - Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC from mnemonic. - While adding ".w" as an operand, don't change "Head" to avoid passing the wrong mnemonic to ParseOperand. - Add asm parser tests. - Add disassembler tests just to make sure it can catch all cps versions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125489 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch ConstantVector::get to use ArrayRef instead of a pointer+sizeChris Lattner2011-02-1413-180/+99
| | | | | | | idiom. Change various clients to simplify their code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125487 91177308-0d34-0410-b5e6-96231b3b80d8
* add a new ArrayRef class. This is intended to replace the idiom weChris Lattner2011-02-141-0/+121
| | | | | | | | | | use in many places where we pass a pointer and size to abstract APIs that can take C arrays, std::vector, SmallVector, etc. It is to arrays what StringRef is to strings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125486 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR9210 by implementing some type legalization logic for Chris Lattner2011-02-143-14/+55
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* fix two comment thinkosChris Lattner2011-02-142-2/+2
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* Fix typo in comment.Nick Lewycky2011-02-141-1/+1
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* Add some statistics to StrongPHIElimination.Cameron Zwarich2011-02-141-0/+8
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* Add a statistic to PHIElimination tracking the number of critical edges split.Cameron Zwarich2011-02-141-2/+7
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* missed a headerChris Lattner2011-02-131-0/+7
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* Enhance ComputeMaskedBits to know that aligned frameindexesChris Lattner2011-02-137-76/+106
| | | | | | | | | | | | | | | | | | | have their low bits set to zero. This allows us to optimize out explicit stack alignment code like in stack-align.ll:test4 when it is redundant. Doing this causes the code generator to start turning FI+cst into FI|cst all over the place, which is general goodness (that is the canonical form) except that various pieces of the code generator don't handle OR aggressively. Fix this by introducing a new SelectionDAG::isBaseWithConstantOffset predicate, and using it in places that are looking for ADD(X,CST). The ARM backend in particular was missing a lot of addressing mode folding opportunities around OR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125470 91177308-0d34-0410-b5e6-96231b3b80d8
* Adapt docs to '-loopsimplify -> -loop-simplify' changeTobias Grosser2011-02-131-2/+2
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