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* DISubrange supports unsigned lower/upper array bounds, so let's not fake it i...Devang Patel2011-11-173-6/+43
* quick fix: remove GlobalVariable::GlobalVariable mistakenly commited at r1449...Kostya Serebryany2011-11-171-3/+3
* Fix an overly general check in SimplifyIndvar to handle useless phi cycles.Andrew Trick2011-11-172-2/+31
* fall back to explicit list of allowed linkages when instrumenting globals in ...Kostya Serebryany2011-11-172-2/+11
* Fix bug in RefCountedBase/RefCountedBaseVPTR where the reference count was ac...Ted Kremenek2011-11-171-0/+3
* Add TODO comment.Chad Rosier2011-11-171-0/+2
* Fix SSE/AVX integer comparison patterns to understand that all integer vector...Craig Topper2011-11-171-24/+42
* Dead code.Chad Rosier2011-11-171-14/+0
* When fast iseling a GEP, accumulate the offset rather than emitting a series ofChad Rosier2011-11-172-11/+100
* Remove seemingly unnecessary duplicate VROUND definitions.Craig Topper2011-11-171-80/+4
* x86/windows issues fixed.Chris Lattner2011-11-171-18/+3
* Add support for custom names for library functions in TargetLibraryInfo. Add...Eli Friedman2011-11-176-21/+134
* llvm-build: Attempt to work around a CMake Makefile generator bug that doesn'tDaniel Dunbar2011-11-171-1/+16
* Don't unconditionally set the kill flag.Chad Rosier2011-11-171-1/+1
* Turn on vzeroupper insertion on call boundaries for AVX; it works as far as I...Eli Friedman2011-11-171-1/+1
* build/make/test: Get rid of unused BUGPOINT_TOPTS variable.Daniel Dunbar2011-11-161-5/+0
* Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECT...Eli Friedman2011-11-162-5/+18
* Object/COFF: Support common symbols.Michael J. Spencer2011-11-161-1/+3
* Remove obsolete test.Jim Grosbach2011-11-161-58/+0
* Generalize the fixup info for ARM mode.Jim Grosbach2011-11-162-4/+4
* Update test for r144842.Jim Grosbach2011-11-161-1/+1
* Lower 64-bit constant pool node.Akira Hatanaka2011-11-161-8/+12
* Lower 64-bit block address.Akira Hatanaka2011-11-161-9/+11
* Fix encoding of NOP used for padding in ARM mode .align.Jim Grosbach2011-11-161-1/+1
* Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpoolAkira Hatanaka2011-11-162-7/+24
* 64-bit jump register instruction.Akira Hatanaka2011-11-162-6/+7
* Another missing X86ISD::MOVLPD pattern. rdar://10450317Evan Cheng2011-11-162-0/+19
* ARM assembly parsing for shifted register operands for MOV instruction.Jim Grosbach2011-11-161-0/+2
* Clean up debug printing of ARM shifted operands.Jim Grosbach2011-11-161-9/+6
* Add fast-isel stats to determine who's doing all the work, the Chad Rosier2011-11-161-0/+7
* Fix the stats collection for fast-isel. The failed count was only accountingChad Rosier2011-11-161-5/+18
* There are already problems with building LLVM under VS2005, and it'sChandler Carruth2011-11-163-8/+7
* ARM assmebly two operand forms for LSR, ASR, LSL, ROR register.Jim Grosbach2011-11-161-0/+12
* ARM assembly parsing for RRX mnemonic.Jim Grosbach2011-11-162-1/+16
* Added missing comment about new custom lowering of DEC64Pete Cooper2011-11-161-0/+12
* Disable expensive two-address optimizations at -O0. rdar://10453055Evan Cheng2011-11-163-5/+12
* Check to make sure we can select the instruction before trying to put theChad Rosier2011-11-161-6/+6
* Disable the assertion again. Looks like fastisel is still generating bad kill...Evan Cheng2011-11-161-1/+2
* ARM mode aliases for bitwise instructions w/ register operands.Jim Grosbach2011-11-162-0/+38
* Fix tablegen warning: hasSideEffects is inferred for eh_sjlj_dispatchsetup.Bob Wilson2011-11-161-1/+1
* lib/Target/ARM/CMakeLists.txt: Disable optimization in ARMISelLowering.cpp al...NAKAMURA Takumi2011-11-161-2/+2
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-1646-313/+344
* Record landing pads with a SmallSetVector to avoid multiple entries.Bob Wilson2011-11-161-3/+5
* Fix the execution domain on a bunch of SSE/AVX instructions.Craig Topper2011-11-161-91/+157
* Update the SP in the SjLj jmpbuf whenever it changes. <rdar://problem/10444602>Bob Wilson2011-11-161-3/+21
* Fix ARM SjLj-EH dispatch setup code. <rdar://problem/10444602>Bob Wilson2011-11-164-74/+4
* Remove code to enable execution dependency fix pass on VR256. VR128 is suffic...Craig Topper2011-11-161-9/+3
* Revert r144568 now that r144730 has fixed the fast-isel kill marker bug.Evan Cheng2011-11-161-2/+1
* Fix typo in test.Nick Lewycky2011-11-161-1/+1
* Merge isObjectPointerWithTrustworthySize with getPointerSize. Use it whenNick Lewycky2011-11-162-30/+58
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