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* Don't crash on packed logical opsChris Lattner2006-03-251-3/+6
* Teach BinaryOperator::createNot to work with packed integer typesChris Lattner2006-03-251-2/+9
* Unused function - easier to throw away than fix.Jim Laskey2006-03-251-8/+0
* Cast instruction not inserted into basic block.Jim Laskey2006-03-251-41/+5
* Add a BUILD_VECTOR with unpack and interleave testcase.Evan Cheng2006-03-251-0/+14
* Added missing (any_extend (load ...)) patterns.Evan Cheng2006-03-251-0/+3
* Build arbitrary vector with more than 2 distinct scalar elements with aEvan Cheng2006-03-253-5/+104
* implement a bunch of intrinsicsChris Lattner2006-03-251-3/+34
* Move all Altivec stuff out into a new PPCInstrAltivec.td file.Chris Lattner2006-03-252-239/+298
* Add some basic patterns for other datatypesChris Lattner2006-03-252-10/+12
* add all supported formats to the vector register fileChris Lattner2006-03-251-1/+1
* remove extraneous letsChris Lattner2006-03-251-208/+1
* Add a bunch of simple altivec intrinsicsChris Lattner2006-03-251-1/+36
* Add support for __builtin_altivec_vnmsubfp /vmaddfpChris Lattner2006-03-251-0/+5
* Add support for __builtin_altivec_vnmsubfpChris Lattner2006-03-251-0/+3
* When failing selection for an intrinsic, print this:Chris Lattner2006-03-251-2/+16
* #include Intrinsics.h into all dag iselsChris Lattner2006-03-256-0/+12
* Implement Intrinsic::getNameChris Lattner2006-03-251-0/+11
* Add a programatic interface to intrinsic names.Chris Lattner2006-03-251-0/+5
* Codegen things like:Chris Lattner2006-03-254-2/+123
* New tests for vsplti*Chris Lattner2006-03-251-0/+15
* X86 SSE1 cacheability support ops intrinsicsEvan Cheng2006-03-251-2/+21
* Added SSE cachebility opsEvan Cheng2006-03-251-0/+30
* Instruction encoding bugEvan Cheng2006-03-251-1/+1
* Added a scalar to vector with zero extension testcaseEvan Cheng2006-03-251-0/+21
* Add new intrinsic node definitions for tblgen useChris Lattner2006-03-251-0/+12
* X86 SSE1 SIMD store intrinsics.Evan Cheng2006-03-251-0/+17
* X86 SSE1 SIMD load intrinsics (movhps, movlps, and movups).Evan Cheng2006-03-251-4/+21
* X86 SSE1 conversion operations intrinsics.Evan Cheng2006-03-251-1/+34
* Added 128-bit packed integer subtraction.Evan Cheng2006-03-252-0/+26
* Added CVTTPS2PI.Evan Cheng2006-03-251-0/+8
* Added CVTSS2SI.Evan Cheng2006-03-251-0/+5
* X86 SSE1 comparison intrinsics.Evan Cheng2006-03-251-0/+216
* X86 SSE1 arithmetic and logical operation intrinsics.Evan Cheng2006-03-251-0/+135
* Support for scalar to vector with zero extension.Evan Cheng2006-03-244-51/+118
* Change approach so that we get codegen for free for intrinsics. With this,Chris Lattner2006-03-242-38/+94
* fix inverted conditionalChris Lattner2006-03-241-2/+2
* D'oh - should be even numbered.Jim Laskey2006-03-241-15/+15
* Added LDMXCSREvan Cheng2006-03-241-0/+7
* ldmxcsr is a SSE instruction.Evan Cheng2006-03-241-6/+5
* Added ldmxcsr intrinsic.Evan Cheng2006-03-241-1/+6
* fix 80 column violationsChris Lattner2006-03-241-5/+6
* plug the intrinsics into the patterns for movmsk*Chris Lattner2006-03-241-2/+4
* Parse intrinsics correctly and perform type propagation. This doesn't currentlyChris Lattner2006-03-242-3/+49
* Add dwarf register numbering to register data.Jim Laskey2006-03-246-333/+689
* Add support for dwarf register numbering.Jim Laskey2006-03-241-0/+21
* Hack no more.Jim Laskey2006-03-241-2/+0
* Make sure to initialize the TheDef field!Chris Lattner2006-03-241-0/+1
* add another noteChris Lattner2006-03-241-0/+15
* add a noteChris Lattner2006-03-241-0/+12