index
:
external_llvm.git
replicant-6.0
Unnamed repository; edit this file 'description' to name the repository.
git repository hosting
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
Commit message (
Expand
)
Author
Age
Files
Lines
...
*
Don't crash on packed logical ops
Chris Lattner
2006-03-25
1
-3
/
+6
*
Teach BinaryOperator::createNot to work with packed integer types
Chris Lattner
2006-03-25
1
-2
/
+9
*
Unused function - easier to throw away than fix.
Jim Laskey
2006-03-25
1
-8
/
+0
*
Cast instruction not inserted into basic block.
Jim Laskey
2006-03-25
1
-41
/
+5
*
Add a BUILD_VECTOR with unpack and interleave testcase.
Evan Cheng
2006-03-25
1
-0
/
+14
*
Added missing (any_extend (load ...)) patterns.
Evan Cheng
2006-03-25
1
-0
/
+3
*
Build arbitrary vector with more than 2 distinct scalar elements with a
Evan Cheng
2006-03-25
3
-5
/
+104
*
implement a bunch of intrinsics
Chris Lattner
2006-03-25
1
-3
/
+34
*
Move all Altivec stuff out into a new PPCInstrAltivec.td file.
Chris Lattner
2006-03-25
2
-239
/
+298
*
Add some basic patterns for other datatypes
Chris Lattner
2006-03-25
2
-10
/
+12
*
add all supported formats to the vector register file
Chris Lattner
2006-03-25
1
-1
/
+1
*
remove extraneous lets
Chris Lattner
2006-03-25
1
-208
/
+1
*
Add a bunch of simple altivec intrinsics
Chris Lattner
2006-03-25
1
-1
/
+36
*
Add support for __builtin_altivec_vnmsubfp /vmaddfp
Chris Lattner
2006-03-25
1
-0
/
+5
*
Add support for __builtin_altivec_vnmsubfp
Chris Lattner
2006-03-25
1
-0
/
+3
*
When failing selection for an intrinsic, print this:
Chris Lattner
2006-03-25
1
-2
/
+16
*
#include Intrinsics.h into all dag isels
Chris Lattner
2006-03-25
6
-0
/
+12
*
Implement Intrinsic::getName
Chris Lattner
2006-03-25
1
-0
/
+11
*
Add a programatic interface to intrinsic names.
Chris Lattner
2006-03-25
1
-0
/
+5
*
Codegen things like:
Chris Lattner
2006-03-25
4
-2
/
+123
*
New tests for vsplti*
Chris Lattner
2006-03-25
1
-0
/
+15
*
X86 SSE1 cacheability support ops intrinsics
Evan Cheng
2006-03-25
1
-2
/
+21
*
Added SSE cachebility ops
Evan Cheng
2006-03-25
1
-0
/
+30
*
Instruction encoding bug
Evan Cheng
2006-03-25
1
-1
/
+1
*
Added a scalar to vector with zero extension testcase
Evan Cheng
2006-03-25
1
-0
/
+21
*
Add new intrinsic node definitions for tblgen use
Chris Lattner
2006-03-25
1
-0
/
+12
*
X86 SSE1 SIMD store intrinsics.
Evan Cheng
2006-03-25
1
-0
/
+17
*
X86 SSE1 SIMD load intrinsics (movhps, movlps, and movups).
Evan Cheng
2006-03-25
1
-4
/
+21
*
X86 SSE1 conversion operations intrinsics.
Evan Cheng
2006-03-25
1
-1
/
+34
*
Added 128-bit packed integer subtraction.
Evan Cheng
2006-03-25
2
-0
/
+26
*
Added CVTTPS2PI.
Evan Cheng
2006-03-25
1
-0
/
+8
*
Added CVTSS2SI.
Evan Cheng
2006-03-25
1
-0
/
+5
*
X86 SSE1 comparison intrinsics.
Evan Cheng
2006-03-25
1
-0
/
+216
*
X86 SSE1 arithmetic and logical operation intrinsics.
Evan Cheng
2006-03-25
1
-0
/
+135
*
Support for scalar to vector with zero extension.
Evan Cheng
2006-03-24
4
-51
/
+118
*
Change approach so that we get codegen for free for intrinsics. With this,
Chris Lattner
2006-03-24
2
-38
/
+94
*
fix inverted conditional
Chris Lattner
2006-03-24
1
-2
/
+2
*
D'oh - should be even numbered.
Jim Laskey
2006-03-24
1
-15
/
+15
*
Added LDMXCSR
Evan Cheng
2006-03-24
1
-0
/
+7
*
ldmxcsr is a SSE instruction.
Evan Cheng
2006-03-24
1
-6
/
+5
*
Added ldmxcsr intrinsic.
Evan Cheng
2006-03-24
1
-1
/
+6
*
fix 80 column violations
Chris Lattner
2006-03-24
1
-5
/
+6
*
plug the intrinsics into the patterns for movmsk*
Chris Lattner
2006-03-24
1
-2
/
+4
*
Parse intrinsics correctly and perform type propagation. This doesn't currently
Chris Lattner
2006-03-24
2
-3
/
+49
*
Add dwarf register numbering to register data.
Jim Laskey
2006-03-24
6
-333
/
+689
*
Add support for dwarf register numbering.
Jim Laskey
2006-03-24
1
-0
/
+21
*
Hack no more.
Jim Laskey
2006-03-24
1
-2
/
+0
*
Make sure to initialize the TheDef field!
Chris Lattner
2006-03-24
1
-0
/
+1
*
add another note
Chris Lattner
2006-03-24
1
-0
/
+15
*
add a note
Chris Lattner
2006-03-24
1
-0
/
+12
[prev]
[next]