| Commit message (Expand) | Author | Age | Files | Lines |
* | Update aosp/master llvm for rebase to r233350 | Pirama Arumuga Nainar | 2015-04-09 | 1 | -2/+0 |
* | Update aosp/master LLVM for rebase to r230699. | Stephen Hines | 2015-03-23 | 1 | -3/+20 |
* | Update aosp/master LLVM for rebase to r222494. | Stephen Hines | 2014-12-02 | 1 | -6/+7 |
* | Update LLVM for rebase to r212749. | Stephen Hines | 2014-07-21 | 1 | -0/+37 |
* | Update LLVM for 3.5 rebase (r209712). | Stephen Hines | 2014-05-29 | 1 | -0/+5 |
* | Update to LLVM 3.5a. | Stephen Hines | 2014-04-24 | 1 | -1/+3 |
* | Add addrspacecast instruction. | Matt Arsenault | 2013-11-15 | 1 | -0/+4 |
* | [ARM] Use the load-acquire/store-release instructions optimally in AArch32. | Amara Emerson | 2013-09-26 | 1 | -0/+6 |
* | Add ISD::FROUND for libm round() | Hal Finkel | 2013-08-07 | 1 | -2/+2 |
* | Added encoding prefixes for KNL instructions (EVEX). | Elena Demikhovsky | 2013-07-28 | 1 | -1/+1 |
* | Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. | Jakob Stoklund Olesen | 2013-07-04 | 1 | -12/+0 |
* | Revert r185595-185596 which broke buildbots. | Jakob Stoklund Olesen | 2013-07-04 | 1 | -0/+12 |
* | Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. | Jakob Stoklund Olesen | 2013-07-03 | 1 | -12/+0 |
* | Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE. | Tim Northover | 2013-04-20 | 1 | -8/+0 |
* | Fix PR10475 | Michael Liao | 2013-03-01 | 1 | -2/+4 |
* | Teach SDISel to combine fsin / fcos into a fsincos node if the following | Evan Cheng | 2013-01-29 | 1 | -0/+3 |
* | Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S... | Sylvestre Ledru | 2012-09-27 | 1 | -1/+1 |
* | Fix a typo 'iff' => 'if' | Sylvestre Ledru | 2012-09-27 | 1 | -1/+1 |
* | Add a new optimization pass: Stack Coloring, that merges disjoint static allo... | Nadav Rotem | 2012-09-06 | 1 | -0/+4 |
* | Add SelectionDAG::getTargetIndex. | Jakob Stoklund Olesen | 2012-08-07 | 1 | -0/+5 |
* | Doxygenify the comments of ISD nodes. | Nadav Rotem | 2012-07-23 | 1 | -292/+293 |
* | Typo. Patch by Cameron McInally <cameron.mcinally@nyu.edu>. | Chad Rosier | 2012-06-19 | 1 | -2/+2 |
* | Fix typos found by http://github.com/lyda/misspell-check | Benjamin Kramer | 2012-06-02 | 1 | -1/+1 |
* | Rename @llvm.debugger to @llvm.debugtrap. | Dan Gohman | 2012-05-14 | 1 | -2/+2 |
* | Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(), | Dan Gohman | 2012-05-11 | 1 | -0/+3 |
* | Add a RegisterMaskSDNode class. | Jakob Stoklund Olesen | 2012-01-18 | 1 | -1/+1 |
* | Document the fact that the selection dag changes the vselect condition type | Nadav Rotem | 2012-01-18 | 1 | -0/+3 |
* | Initial CodeGen support for CTTZ/CTLZ where a zero input produces an | Chandler Carruth | 2011-12-13 | 1 | -0/+3 |
* | Remove dead llvm.eh.sjlj.dispatchsetup intrinsic. | Bill Wendling | 2011-11-28 | 1 | -7/+0 |
* | Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented to | Bill Wendling | 2011-10-07 | 1 | -1/+1 |
* | Add codegen support for vector select (in the IR this means a select | Duncan Sands | 2011-09-06 | 1 | -8/+8 |
* | Split the init.trampoline intrinsic, which currently combines GCC's | Duncan Sands | 2011-09-06 | 1 | -8/+13 |
* | Basic x86 code generation for atomic load and store instructions. | Eli Friedman | 2011-08-24 | 1 | -11/+11 |
* | Code generation for 'fence' instruction. | Eli Friedman | 2011-07-27 | 1 | -0/+5 |
* | Add an intrinsic and codegen support for fused multiply-accumulate. The intent | Cameron Zwarich | 2011-07-08 | 1 | -1/+1 |
* | Add one more argument to the prefetch intrinsic to indicate whether it's a data | Bruno Cardoso Lopes | 2011-06-14 | 1 | -1/+2 |
* | Fix comment. | Bill Wendling | 2011-05-11 | 1 | -4/+4 |
* | Fix a ton of comment typos found by codespell. Patch by | Chris Lattner | 2011-04-15 | 1 | -1/+1 |
* | fix thinko :) | Chris Lattner | 2011-02-13 | 1 | -2/+2 |
* | Revisit my fix for PR9028: the issue is that DAGCombine was | Chris Lattner | 2011-02-13 | 1 | -6/+14 |
* | [AVX] Add INSERT_SUBVECTOR and support it on x86. This provides a | David Greene | 2011-01-26 | 1 | -0/+8 |
* | Do not model all INLINEASM instructions as having unmodelled side effects. | Evan Cheng | 2011-01-07 | 1 | -1/+1 |
* | Fix comment. INLINEASM node operand #3 is IsAlignStack bit. | Evan Cheng | 2011-01-07 | 1 | -0/+1 |
* | Change EXTRACT_SUBVECTOR to require a constant index. | Bob Wilson | 2011-01-07 | 1 | -2/+2 |
* | Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. | Wesley Peck | 2010-11-23 | 1 | -6/+6 |
* | Spelling typo fix. s/incput/input/. Thanks, Bob! | Jim Grosbach | 2010-10-19 | 1 | -1/+1 |
* | Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any | Jim Grosbach | 2010-10-19 | 1 | -0/+7 |
* | This is the first step towards refactoring the x86 vector shuffle code. The | Bruno Cardoso Lopes | 2010-08-20 | 1 | -1/+1 |
* | Update comment to remove special case for vector extending loads. An | Bob Wilson | 2010-08-19 | 1 | -5/+2 |
* | When splitting a VAARG, remember its alignment. | Rafael Espindola | 2010-06-26 | 1 | -2/+3 |