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path: root/include/llvm/CodeGen/ScheduleDAGInstrs.h
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* Update aosp/master LLVM for rebase to r235153Pirama Arumuga Nainar2015-05-181-1/+1
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-4/+2
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-6/+7
* Update to LLVM 3.5a.Stephen Hines2014-04-241-6/+27
* Even more spelling fixes for "instruction".Robert Wilhelm2013-09-281-1/+1
* mi-sched: Precompute a PressureDiff for each instruction, adjust for liveness...Andrew Trick2013-08-301-1/+3
* Comment and revise the cyclic critical path code.Andrew Trick2013-08-291-3/+0
* Adds cyclic critical path computation and heuristics, temporarily disabled.Andrew Trick2013-08-231-0/+3
* MI Sched: record local vreg uses.Andrew Trick2013-08-231-1/+12
* Remove unused field.Andrew Trick2013-08-231-4/+0
* mi-sched: Don't call MBB.size() in initSUnits. The driver already has instr c...Andrew Trick2013-08-231-7/+3
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-151-1/+1
* MI Sched: eliminate local vreg copies.Andrew Trick2013-04-241-0/+3
* Comment a strange field in ScheduleDAG.Andrew Trick2013-04-231-0/+4
* Cleanup #includes.Jakub Staszak2013-03-101-4/+1
* Introduce a new data structure, the SparseMultiSet, and changes to the MI sch...Michael Ilseman2013-01-211-46/+9
* Fix include guards so they exactly match file names.Jakub Staszak2013-01-101-2/+2
* Sort the #include lines for the include/... tree with the script.Chandler Carruth2012-12-031-2/+2
* misched: TargetSchedule interface for machine resources.Andrew Trick2012-11-061-0/+7
* misched: Use the TargetSchedModel interface wherever possible.Andrew Trick2012-10-101-5/+3
* misched: Remove LoopDependencies heuristic.Andrew Trick2012-10-091-70/+0
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-181-0/+4
* Revert r164061-r164067. Most of the new subtarget emitter.Andrew Trick2012-09-171-4/+0
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-171-0/+4
* Simplify the computeOperandLatency API.Andrew Trick2012-08-231-13/+12
* Remove unused private fields found by clang's new -Wunused-private-field.Benjamin Kramer2012-06-061-4/+1
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-051-3/+7
* Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer2012-06-021-1/+1
* misched: DAG builder support for tracking register pressure within the curren...Andrew Trick2012-04-241-1/+2
* SparseSet: Add support for key-derived indexes and arbitrary key types.Andrew Trick2012-04-201-6/+2
* misched: Added CanHandleTerminators.Andrew Trick2012-04-131-0/+7
* misched: Add finalizeScheduler to complete the target interface.Andrew Trick2012-04-011-0/+4
* misched interface: rename Begin/End to RegionBegin/RegionEnd since they are n...Andrew Trick2012-03-091-5/+5
* Cleanup VLIWPacketizer to use the updated ScheduleDAGInstrs interface.Andrew Trick2012-03-071-12/+13
* misched prep: Expose the ScheduleDAGInstrs interface so targets mayAndrew Trick2012-03-071-0/+339
* Move ScheduleDAGInstrs.h to be a private header. Front-endsDan Gohman2009-02-061-82/+0
* If a vector is empty, you're not allowed to access anyDuncan Sands2009-01-201-2/+3
* Move a few containers out of ScheduleDAGInstrs::BuildSchedGraphDan Gohman2009-01-151-4/+16
* Rename BuildSchedUnits to BuildSchedGraph, and refactor theDan Gohman2008-12-231-2/+2
* Add an assertion to the ScheduleDAGInstrs class to catch SUnitsDan Gohman2008-12-221-0/+4
* Fix some register-alias-related bugs in the post-RA scheduler livenessDan Gohman2008-12-161-1/+9
* Rewrite the SDep class, and simplify some of the related code.Dan Gohman2008-12-091-16/+0
* Implement ComputeLatency for MachineInstr ScheduleDAGs. FactorDan Gohman2008-11-211-0/+4
* Experimental post-pass scheduling support. Post-pass schedulingDan Gohman2008-11-191-0/+69
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