aboutsummaryrefslogtreecommitdiffstats
path: root/include/llvm/CodeGen
Commit message (Expand)AuthorAgeFilesLines
* misched: remove forceUnitLatencies. Defaults are handled by the default Sched...Andrew Trick2012-10-081-5/+0
* Move TargetData to DataLayout.Micah Villmow2012-10-086-15/+15
* Remove unused MachineInstr constructors that don't take a DebugLoc argument.Craig Topper2012-10-071-16/+1
* Switch MachineTraceMetrics to the new TargetSchedModel interface.Jakob Stoklund Olesen2012-10-041-0/+1
* Revert 165051-165049 while looking into the foreach.m failure inEric Christopher2012-10-031-2/+7
* Remove the SavePoint infrastructure from fast isel, replaceEric Christopher2012-10-021-7/+2
* Fix PR13899Michael Liao2012-10-011-0/+2
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru2012-09-274-5/+5
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-274-5/+5
* Revert r164663 due to buildbot failure.Craig Topper2012-09-261-12/+12
* Add is16BitVector and is32BitVector to MVT and call them from EVT. Matches ot...Craig Topper2012-09-261-9/+14
* Rename virtual table anchors from Anchor() to anchor() for consistency with t...Craig Topper2012-09-261-2/+2
* Mark extended type querying methods as 'readonly' to reduce compile size.Craig Topper2012-09-261-12/+12
* Add in new data types that are used by AMDIL/ANL among others.Micah Villmow2012-09-192-64/+121
* Make MachinePostDominatorTree::DT privateTom Stellard2012-09-181-2/+4
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-182-6/+26
* Merge into undefined lanes under -new-coalescer.Jakob Stoklund Olesen2012-09-171-0/+20
* Revert r164061-r164067. Most of the new subtarget emitter.Andrew Trick2012-09-172-26/+6
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-172-6/+26
* Add a MachinePostDominator passTom Stellard2012-09-171-0/+85
* Mark unimplemented copy constructors and copy assignment operators as LLVM_DE...Craig Topper2012-09-1710-26/+26
* Fix problem when using LiveRangeQuery with block entries.Jakob Stoklund Olesen2012-09-161-1/+3
* Make LiveRangeQuery work for PHIDefs as well.Jakob Stoklund Olesen2012-09-151-0/+6
* comment typoAndrew Trick2012-09-141-1/+1
* TargetSchedModel interface. To be implemented...Andrew Trick2012-09-141-0/+63
* misched: add a hook for custom DAG postprocessing.Andrew Trick2012-09-141-0/+22
* Fix PR11985Michael Liao2012-09-123-5/+13
* Delete dead code.Jakob Stoklund Olesen2012-09-121-11/+0
* Add a function computeRegisterLiveness() to MachineBasicBlock. This uses anal...James Molloy2012-09-121-0/+22
* Add an analyzePhysReg() function to MachineOperandIteratorBase that analyses ...James Molloy2012-09-121-3/+37
* Reorganize MachineScheduler interfaces and publish them in the header.Andrew Trick2012-09-111-0/+218
* TiedTo is an integer, not a bool.Jakob Stoklund Olesen2012-09-061-2/+2
* Allow overlaps between virtreg and physreg live ranges.Jakob Stoklund Olesen2012-09-061-0/+9
* Handle overlapping regunit intervals in LiveIntervals::addKillFlags().Jakob Stoklund Olesen2012-09-061-1/+1
* Add a new optimization pass: Stack Coloring, that merges disjoint static allo...Nadav Rotem2012-09-063-5/+27
* [ms-inline asm] Use the asm dialect from the MI to set the parser dialect.Chad Rosier2012-09-051-1/+3
* Constify SDNodeIterator an stop its only non-const user being cast strippedRoman Divacky2012-09-051-4/+4
* [ms-inline asm] Propagate the asm dialect into the MachineInstr representation.Chad Rosier2012-09-051-0/+2
* Clean up includes.Benjamin Kramer2012-09-051-1/+1
* Actually use the MachineOperand field for isRegTiedToDefOperand().Jakob Stoklund Olesen2012-09-041-2/+16
* Allow tied uses and defs in different orders.Jakob Stoklund Olesen2012-09-042-12/+9
* Add MachineInstr::tieOperands, remove setIsTied().Jakob Stoklund Olesen2012-08-312-8/+13
* Rename hasVolatileMemoryRef() to hasOrderedMemoryRef().Jakob Stoklund Olesen2012-08-291-5/+5
* Add MachineMemOperand::isUnordered().Jakob Stoklund Olesen2012-08-291-0/+9
* Maintain a vaild isTied bit as operands are added and removed.Jakob Stoklund Olesen2012-08-291-0/+12
* Add a MachineOperand::isTied() flag.Jakob Stoklund Olesen2012-08-281-0/+19
* Don't allow TargetFlags on MO_Register MachineOperands.Jakob Stoklund Olesen2012-08-281-8/+19
* Remove extra MayLoad/MayStore flags from atomic_load/store.Jakob Stoklund Olesen2012-08-281-5/+0
* Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith2012-08-241-1/+1
* Fix a stub signature. HeuristicReduce should return a bool.Lang Hames2012-08-231-1/+2
generated by cgit v1.1 at 2024-12-23 17:07:29 +0000