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* Update aosp/master LLVM for rebase to r235153Pirama Arumuga Nainar2015-05-1836-1897/+1753
| | | | | Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7 (cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
* Update aosp/master llvm for rebase to r233350Pirama Arumuga Nainar2015-04-0931-539/+1282
| | | | Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-2363-1863/+6081
| | | | Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-0251-1216/+4112
| | | | Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
* Update LLVM for rebase to r212749.Stephen Hines2014-07-2129-119/+584
| | | | | | | Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-2947-1752/+2561
| | | | Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
* Update to LLVM 3.5a.Stephen Hines2014-04-2466-1061/+9975
| | | | Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
* Merging r196144:Manman Ren2013-12-091-0/+4
| | | | | | | | | | | | | | ------------------------------------------------------------------------ r196144 | mren | 2013-12-02 12:09:52 -0800 (Mon, 02 Dec 2013) | 4 lines Debug Info: Move the constant for Debug Info Version from Dwarf.h to Metadata.h. Suggested by Eric. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196819 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196637:Bill Wendling2013-12-081-1/+9
| | | | | | | | | | | ------------------------------------------------------------------------ r196637 | arsenm | 2013-12-06 18:58:41 -0800 (Fri, 06 Dec 2013) | 1 line Add getBitCastOrAddrSpaceCast ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196707 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195803:Bill Wendling2013-12-011-0/+3
| | | | | | | | | | | ------------------------------------------------------------------------ r195803 | mcrosier | 2013-11-26 17:45:58 -0800 (Tue, 26 Nov 2013) | 1 line [AArch64] Add support for NEON scalar floating-point absolute difference. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195994 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195788:Bill Wendling2013-12-011-0/+4
| | | | | | | | | | | | ------------------------------------------------------------------------ r195788 | mcrosier | 2013-11-26 14:17:37 -0800 (Tue, 26 Nov 2013) | 2 lines [AArch64] Add support for NEON scalar floating-point to integer convert instructions. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195993 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195327:Bill Wendling2013-11-251-9/+0
| | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195327 | apazos | 2013-11-20 23:37:04 -0800 (Wed, 20 Nov 2013) | 6 lines Implemented Neon scalar by element intrinsics. Intrinsics implemented: vqdmull_lane, vqdmulh_lane, vqrdmulh_lane, vqdmlal_lane, vqdmlsl_lane scalar Neon intrinsics. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195611 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.Hao Liu2013-11-181-0/+27
| | | | | | | The functions are like: vst1_s8_x2 ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194990 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix spacing, forward declare order.Matt Arsenault2013-11-181-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194985 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Completely remove support for explicit 'require' methods on theChandler Carruth2013-11-171-31/+6
| | | | | | | AnalysisManager. All this method did was assert something and we have a perfectly good way to trigger that assert from the query path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194947 91177308-0d34-0410-b5e6-96231b3b80d8
* Implemented aarch64 Neon scalar vmulx_lane intrinsicsAna Pazos2013-11-151-2/+3
| | | | | | | | | | | | | | | | Implemented aarch64 Neon scalar vfma_lane intrinsics Implemented aarch64 Neon scalar vfms_lane intrinsics Implemented legacy vmul_n_f64, vmul_lane_f64, vmul_laneq_f64 intrinsics (v1f64 parameter type) using Neon scalar instructions. Implemented legacy vfma_lane_f64, vfms_lane_f64, vfma_laneq_f64, vfms_laneq_f64 intrinsics (v1f64 parameter type) using Neon scalar instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194888 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Fix the scalar NEON ACLE functions so that they return float/doubleChad Rosier2013-11-151-8/+8
| | | | | | rather than the vector equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194853 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX512 unmasked FMA intrinsics and support.Cameron McInally2013-11-151-0/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194824 91177308-0d34-0410-b5e6-96231b3b80d8
* Add addrspacecast instruction.Matt Arsenault2013-11-154-17/+60
| | | | | | Patch by Michele Scandale! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194760 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the header comment of the new pass manager stuff to not claim to beChandler Carruth2013-11-141-1/+1
| | | | | | the legacy stuff. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194689 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64 neon] support poly64 and relevant intrinsic functions.Kevin Qin2013-11-141-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194659 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement aarch64 neon instruction class SIMD misc.Kevin Qin2013-11-141-0/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194656 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 NEON instruction set AdvSIMD (table).Jiangning Liu2013-11-141-0/+45
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194648 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for legacy AArch32 NEON scalar shift by immediateChad Rosier2013-11-131-13/+0
| | | | | | | | instructions. This patch does not include the shift right and accumulate instructions. A number of non-overloaded intrinsics have been remove in favor of their overloaded counterparts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194598 91177308-0d34-0410-b5e6-96231b3b80d8
* Add another (perhaps better) video for Sean's talk. (Thanks Marshall!)Chandler Carruth2013-11-131-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194549 91177308-0d34-0410-b5e6-96231b3b80d8
* Give folks a reference to some material on the fundamental designChandler Carruth2013-11-131-0/+7
| | | | | | | pattern in use here. Addresses review feedback from Sean (thanks!) and others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194541 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce an AnalysisManager which is like a pass manager but with a lotChandler Carruth2013-11-131-12/+294
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | more smarts in it. This is where most of the interesting logic that used to live in the implicit-scheduling-hackery of the old pass manager will live. Like the previous commits, note that this is a very early prototype! I expect substantial changes before this is ready to use. The core of the design is the following: - We have an AnalysisManager which can be used across a series of passes over a module. - The code setting up a pass pipeline registers the analyses available with the manager. - Individual transform passes can check than an analysis manager provides the analyses they require in order to fail-fast. - There is *no* implicit registration or scheduling. - Analysis passes are different from other passes: they produce an analysis result that is cached and made available via the analysis manager. - Cached results are invalidated automatically by the pass managers. - When a transform pass requests an analysis result, either the analysis is run to produce the result or a cached result is provided. There are a few aspects of this design that I *know* will change in subsequent commits: - Currently there is no "preservation" system, that needs to be added. - All of the analysis management should move up to the analysis library. - The analysis management needs to support at least SCC passes. Maybe loop passes. Living in the analysis library will facilitate this. - Need support for analyses which are *both* module and function passes. - Need support for pro-actively running module analyses to have cached results within a function pass manager. - Need a clear design for "immutable" passes. - Need support for requesting cached results when available and not re-running the pass even if that would be necessary. - Need more thorough testing of all of this infrastructure. There are other aspects that I view as open questions I'm hoping to resolve as I iterate a bit on the infrastructure, and especially as I start writing actual passes against this. - Should we have separate management layers for function, module, and SCC analyses? I think "yes", but I'm not yet ready to switch the code. Adding SCC support will likely resolve this definitively. - How should the 'require' functionality work? Should *that* be the only way to request results to ensure that passes always require things? - How should preservation work? - Probably some other things I'm forgetting. =] Look forward to more patches in shorter order now that this is in place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194538 91177308-0d34-0410-b5e6-96231b3b80d8
* Export intrinsics:__builtin_arm_{dmb,dsb} to frontendWeiming Zhao2013-11-121-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194505 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] The shift right/left and insert immediate builtins expect 3Chad Rosier2013-11-111-2/+2
| | | | | | source operands, a vector, an element to insert, and a shift amount. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194406 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar floating-point convert to fixed-point ↵Chad Rosier2013-11-111-0/+12
| | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194394 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Start sketching out the new module and function pass manager.Chandler Carruth2013-11-091-0/+118
| | | | | | | | | | | | | | | | | | This is still just a skeleton. I'm trying to pull together the experimentation I've done into committable chunks, and this is the first coherent one. Others will follow in hopefully short order that move this more toward a useful initial implementation. I still expect the design to continue evolving in small ways as I work through the different requirements and features needed here though. Keep in mind, all of this is off by default. Currently, this mostly exercises the use of a polymorphic smart pointer and templates to hide the polymorphism for the pass manager from the pass implementation. The next step will be more significant, adding the first framework of analysis support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194325 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the old pass manager infrastructure into a legacy namespace andChandler Carruth2013-11-092-0/+581
| | | | | | | | | | | | | | | | | | | give the files a legacy prefix in the right directory. Use forwarding headers in the old locations to paper over the name change for most clients during the transitional period. No functionality changed here! This is just clearing some space to reduce renaming churn later on with a new system. Even when the new stuff starts to go in, it is going to be hidden behind a flag and off-by-default as it is still WIP and under development. This patch is specifically designed so that very little out-of-tree code has to change. I'm going to work as hard as I can to keep that the case. Only direct forward declarations of the PassManager class are impacted by this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194324 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmap] Add AnyReg calling convention support for patchpoint intrinsic.Juergen Ributzka2013-11-081-0/+4
| | | | | | | | | | | | | | The idea of the AnyReg Calling Convention is to provide the call arguments in registers, but not to force them to be placed in a paticular order into a specified set of registers. Instead it is up tp the register allocator to assign any register as it sees fit. The same applies to the return value (if applicable). Differential Revision: http://llvm-reviews.chandlerc.com/D2009 Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194293 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 Neon Crypto instruction classes AES, SHA, and 3 SHA.Jiangning Liu2013-11-051-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194085 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for AVX512 masked vector blend intrinsics.Cameron McInally2013-11-041-3/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194006 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: fixed a typo in builtin nameElena Demikhovsky2013-11-041-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193988 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: added VPCONFLICT instruction and intrinsics,Elena Demikhovsky2013-11-031-0/+28
| | | | | | | added EVEX_KZ to tablegen git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193959 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove linkonce_odr_auto_hide.Rafael Espindola2013-11-011-11/+1
| | | | | | | | | | | | | | | linkonce_odr_auto_hide was in incomplete attempt to implement a way for the linker to hide symbols that are known to be available in every TU and whose addresses are not relevant for a particular DSO. It was redundant in that it all its uses are equivalent to linkonce_odr+unnamed_addr. Unlike those, it has never been connected to clang or llvm's optimizers, so it was effectively dead. Given that nothing produces it, this patch just nukes it (other than the llvm-c enum value). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193865 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar fixed-point convert to floating-point ↵Chad Rosier2013-10-311-0/+11
| | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193816 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new calling convention for WebKit Java Script.Andrew Trick2013-10-311-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193812 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar shift immediate instructions.Chad Rosier2013-10-311-0/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193790 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup: update comments.Manman Ren2013-10-311-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193773 91177308-0d34-0410-b5e6-96231b3b80d8
* Add experimental stackmap intrinsics to definition file and documenation.Andrew Trick2013-10-311-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193767 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable variable arguments support for intrinsics.Andrew Trick2013-10-311-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193766 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX512 unmasked integer broadcast intrinsics and support.Cameron McInally2013-10-311-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193748 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Correct definition of bins[lr] and CHECK-DAG-ize related testsDaniel Sanders2013-10-301-8/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193695 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Added support for matching bmnz, bmnzi, bmz, and bmzi from ↵Daniel Sanders2013-10-301-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | normal IR (i.e. not intrinsics) Also corrected the definition of the intrinsics for these instructions (the result register is also the first operand), and added intrinsics for bsel and bseli to clang (they already existed in the backend). These four operations are mostly equivalent to bsel, and bseli (the difference is which operand is tied to the result). As a result some of the tests changed as described below. bitwise.ll: - bsel.v test adapted so that the mask is unknown at compile-time. This stops it emitting bmnzi.b instead of the intended bsel.v. - The bseli.b test now tests the right thing. Namely the case when one of the values is an uimm8, rather than when the condition is a uimm8 (which is covered by bmnzi.b) compare.ll: - bsel.v tests now (correctly) emits bmnz.v instead of bsel.v because this is the same operation (see MSA.txt). i8.ll - CHECK-DAG-ized test. - bmzi.b test now (correctly) emits equivalent bmnzi.b with swapped operands because this is the same operation (see MSA.txt). - bseli.b still emits bseli.b though because the immediate makes it distinguishable from bmnzi.b. vec.ll: - CHECK-DAG-ized test. - bmz.v tests now (correctly) emits bmnz.v with swapped operands (see MSA.txt). - bsel.v tests now (correctly) emits bmnz.v with swapped operands (see MSA.txt). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193693 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar floating-point compare instructions.Chad Rosier2013-10-301-13/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193691 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor the AVX512 intrinsics. Cluster the intrinsics into the appropriate ↵Cameron McInally2013-10-301-82/+104
| | | | | | vector extension class within the .td file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193690 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. ↵Daniel Sanders2013-10-301-8/+16
| | | | | | | | | | | | | | | | | | | not intrinsics) This required correcting the definition of the bins[lr]i intrinsics because the result is also the first operand. It also required removing the (arbitrary) check for 32-bit immediates in MipsSEDAGToDAGISel::selectVSplat(). Currently using binsli.d with 2 bits set in the mask doesn't select binsli.d because the constant is legalized into a ConstantPool. Similar things can happen with binsri.d with more than 10 bits set in the mask. The resulting code when this happens is correct but not optimal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193687 91177308-0d34-0410-b5e6-96231b3b80d8
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