aboutsummaryrefslogtreecommitdiffstats
path: root/include/llvm/MC/MCRegisterInfo.h
Commit message (Expand)AuthorAgeFilesLines
* Add MCRI::getNumSubRegIndices() and start checking SubRegIndex ranges.Jakob Stoklund Olesen2012-09-111-0/+7
* Give MCRegisterInfo an implementation file.Jakob Stoklund Olesen2012-07-271-55/+3
* Eliminate the large XXXSubRegTable constant arrays.Jakob Stoklund Olesen2012-07-271-13/+32
* Differentially encode all MC register lists.Jakob Stoklund Olesen2012-07-251-34/+20
* Remove the old register list functions from MCRegisterInfo.Jakob Stoklund Olesen2012-06-011-36/+0
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-011-6/+10
* Emit register unit root tables.Jakob Stoklund Olesen2012-05-311-1/+46
* Add MCRegisterInfo::RegListIterator.Jakob Stoklund Olesen2012-05-301-2/+54
* Make DiffListIterator public to unbreak the gcc buildbots.Jakob Stoklund Olesen2012-05-301-1/+1
* Emit register unit lists for each register.Jakob Stoklund Olesen2012-05-291-1/+103
* Compress MCRegisterInfo register name tables.Jakob Stoklund Olesen2012-05-251-5/+8
* TableGen'erate mapping physical registers to encoding values.Jim Grosbach2012-05-151-1/+13
* Implement DwarfLLVMRegPair::operator< without violating asymmetry.Benjamin Kramer2012-04-041-4/+5
* Emit the LLVM<->DWARF register mapping as a sorted table and use binary searc...Benjamin Kramer2012-04-011-26/+52
* Reapply 153764 and 153761 with a fix.Jakob Stoklund Olesen2012-03-301-12/+7
* Revert 153764 and 153761. They broke a --enable-optimized --enable-assertionsRafael Espindola2012-03-301-7/+12
* Compress register lists by sharing suffixes.Jakob Stoklund Olesen2012-03-301-12/+7
* Increase number of allowed registers in register classes to 64k instead of 25...Craig Topper2012-03-061-4/+4
* Revert r152016 and allow overlap, sub, super register tables to be more than ...Craig Topper2012-03-061-3/+3
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-051-1/+1
* MCRegisterInfo-ize getMatchingSuperReg.Jim Grosbach2012-03-051-0/+10
* Shrink and reorder fields in MCRegisterClass to reduce size of static data.Craig Topper2012-03-051-6/+6
* Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce stati...Craig Topper2012-03-051-9/+9
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-4/+4
* Use uint16_t instead of unsigned to store registers in reg classes. Reduces s...Craig Topper2012-03-041-5/+5
* Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it.Benjamin Kramer2012-03-011-0/+10
* Move TargetRegisterInfo::getSubReg() to MCRegisterInfo.Jim Grosbach2012-03-011-1/+15
* Remove 'if' from getSuperRegisters, getSubRegisters, and getOverlaps that wer...Craig Topper2012-02-231-7/+3
* Reorder some members in MCRegisterClass to remove padding on 64-bit builds.Craig Topper2012-02-211-2/+2
* In generated RegisterInfo files, replace a pointer to the end of an array wit...Craig Topper2012-02-211-3/+4
* Merge some tables in generated RegisterInfo file. Store indices into larger t...Craig Topper2012-02-211-9/+21
* Value initialize MCRegisterClasses. Not sure how could miss this during the M...Benjamin Kramer2012-02-081-12/+1
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-2/+2
* Trailing whitespace.Jim Grosbach2011-10-271-3/+3
* Fix a silly off by one.Benjamin Kramer2011-07-231-1/+1
* Add more constness.Benjamin Kramer2011-07-231-2/+2
* Turn the DenseSet in MCRegisterClass into a tblgenerated bit field. This shou...Benjamin Kramer2011-07-231-16/+14
* Teach tblgen to emit MCRegisterClasses.Benjamin Kramer2011-07-221-5/+34
* Sink parts of TargetRegisterClass into MCRegisterClass.Benjamin Kramer2011-07-211-0/+77
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-3/+77
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-1/+1
* Rename TargetRegisterDesc to MCRegisterDescEvan Cheng2011-06-241-2/+2
* - Add MCRegisterInfo registration machinery. Also added x86 registration rout...Evan Cheng2011-06-241-5/+11
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-0/+123