aboutsummaryrefslogtreecommitdiffstats
path: root/include/llvm/MC
Commit message (Collapse)AuthorAgeFilesLines
* Move getOpcodeName from the various target InstPrinters into the superclass ↵Benjamin Kramer2012-04-021-1/+1
| | | | | | | | MCInstPrinter. All implementations used the same code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153866 91177308-0d34-0410-b5e6-96231b3b80d8
* Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ↵Craig Topper2012-04-021-2/+5
| | | | | | getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153860 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit the LLVM<->DWARF register mapping as a sorted table and use binary ↵Benjamin Kramer2012-04-011-26/+52
| | | | | | | | | | | | | | | search to do the lookup. This also avoids emitting the information twice, which led to code bloat. On i386-linux-Release+Asserts with all targets built this change shaves a whopping 1.3 MB off clang. The number is probably exaggerated by recent inliner changes but the methods were already enormous with the old inline cost computation. The DWARF reg -> LLVM reg mapping doesn't seem to have holes in it, so it could be a simple lookup table. I didn't implement that optimization yet to avoid potentially changing functionality. There is still some duplication both in tablegen and the generated code that should be cleaned up eventually. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153837 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply 153764 and 153761 with a fix.Jakob Stoklund Olesen2012-03-301-12/+7
| | | | | | | | | Use an explicit comparator instead of the default. The sets are sorted, but not using the default comparator. Hopefully, this will unbreak the Linux builders. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153772 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 153764 and 153761. They broke a --enable-optimized --enable-assertionsRafael Espindola2012-03-301-7/+12
| | | | | | --enable-expensive-checks build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153771 91177308-0d34-0410-b5e6-96231b3b80d8
* Compress register lists by sharing suffixes.Jakob Stoklund Olesen2012-03-301-12/+7
| | | | | | | | TableGen emits lists of sub-registers, super-registers, and overlaps. Put them all in a single table and use a SequenceToOffsetTable to share suffixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153761 91177308-0d34-0410-b5e6-96231b3b80d8
* Prune some includes and forward declarations.Craig Topper2012-03-2614-29/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153429 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a hook in MCELFObjectTargetWriter to allow targets to sort relocationAkira Hatanaka2012-03-231-0/+29
| | | | | | | | entries in the relocation table before they are written out to the file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153345 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo."Jakob Stoklund Olesen2012-03-151-2/+2
| | | | | | | | We cannot limit the concatenated instruction names to 64K. ARM is already at 32K, and it is easy to imagine a target with more instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152817 91177308-0d34-0410-b5e6-96231b3b80d8
* Shrink and reorder some fields in MCOperandInfo to fit it in 8 bytes to ↵Craig Topper2012-03-111-6/+6
| | | | | | reduce size of static tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152524 91177308-0d34-0410-b5e6-96231b3b80d8
* Use uint16_t to store instruction implicit uses and defs. Reduces static data.Craig Topper2012-03-081-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152301 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit r152202 hopefully fixing the MSVC linker error.Craig Topper2012-03-081-2/+2
| | | | | | | Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152296 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r152202 as it's causing internal buildbot failures.Chad Rosier2012-03-071-2/+2
| | | | | | | | | | | Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152233 91177308-0d34-0410-b5e6-96231b3b80d8
* Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to ↵Craig Topper2012-03-071-2/+2
| | | | | | protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152202 91177308-0d34-0410-b5e6-96231b3b80d8
* Increase number of allowed registers in register classes to 64k instead of ↵Craig Topper2012-03-061-4/+4
| | | | | | 256. Widen register class ID to 16-bits. Widen register size and alignment to be up to 64k bytes instead of 256 bytes. This partially reverts r152019 to be less restrictive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152100 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r152016 and allow overlap, sub, super register tables to be more than ↵Craig Topper2012-03-061-3/+3
| | | | | | 64k entries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152099 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-051-1/+1
| | | | | | | | | With the new composite physical registers to represent arbitrary pairs of DPR registers, we don't need the pseudo-registers anymore. Get rid of a bunch of them that use DPR register pairs and just use the real instructions directly instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152045 91177308-0d34-0410-b5e6-96231b3b80d8
* MCRegisterInfo-ize getMatchingSuperReg.Jim Grosbach2012-03-051-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152044 91177308-0d34-0410-b5e6-96231b3b80d8
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-051-2/+4
| | | | | | | Used to allow context sensitive printing of super-register or sub-register references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152043 91177308-0d34-0410-b5e6-96231b3b80d8
* Shrink and reorder fields in MCRegisterClass to reduce size of static data.Craig Topper2012-03-051-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152019 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper2012-03-051-9/+9
| | | | | | static data size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
* Use uint16_t instead of unsigned to store registers in reg classes. Reduces ↵Craig Topper2012-03-041-5/+5
| | | | | | static data size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151998 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Trailing whitespace.Jim Grosbach2012-03-021-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151926 91177308-0d34-0410-b5e6-96231b3b80d8
* Grammar-o in function name.Eric Christopher2012-03-021-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151875 91177308-0d34-0410-b5e6-96231b3b80d8
* Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it.Benjamin Kramer2012-03-011-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151821 91177308-0d34-0410-b5e6-96231b3b80d8
* Move TargetRegisterInfo::getSubReg() to MCRegisterInfo.Jim Grosbach2012-03-011-1/+15
| | | | | | | | Allows us to de-virtualize the function and provides access to it in the instruction printer, which is useful for handling composite physical registers (e.g., ARM register lists). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151815 91177308-0d34-0410-b5e6-96231b3b80d8
* Make MemoryObject accessor members const againDerek Schuff2012-02-291-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151687 91177308-0d34-0410-b5e6-96231b3b80d8
* On ELF, create relocations to the abbreviation and line sections when producingRafael Espindola2012-02-281-2/+2
| | | | | | | | | | debug info for assembly files. We were already doing the right thing when producing debug info for C/C++. ELF linkers don't know dwarf, so they depend on these relocations to produce valid dwarf output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151655 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM BL/BLX instruction fixups should use relocations.Jim Grosbach2012-02-271-2/+4
| | | | | | | | | | | | | We on the linker to resolve calls to the appropriate BL/BLX instruction to make interworking function correctly. It uses the symbol in the relocation to do that, so we need to be careful about being too clever. To enable this for ARM mode, split the BL/BLX fixup kind off from the unconditional-branch fixups. rdar://10927209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151571 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove 'if' from getSuperRegisters, getSubRegisters, and getOverlaps that ↵Craig Topper2012-02-231-7/+3
| | | | | | were added in r151038. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151246 91177308-0d34-0410-b5e6-96231b3b80d8
* Reorder some members in MCRegisterClass to remove padding on 64-bit builds.Craig Topper2012-02-211-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151043 91177308-0d34-0410-b5e6-96231b3b80d8
* In generated RegisterInfo files, replace a pointer to the end of an array ↵Craig Topper2012-02-211-3/+4
| | | | | | with just the size of the array to avoid relocations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151041 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge some tables in generated RegisterInfo file. Store indices into larger ↵Craig Topper2012-02-211-9/+21
| | | | | | table instead of pointers to reduce relocations and shrink table size on 64-bit builds. Shaves ~24K off X86MCTargetDesc.o git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151038 91177308-0d34-0410-b5e6-96231b3b80d8
* Generate the correct EH frame section types on Solaris, this time without ↵David Chisnall2012-02-171-0/+2
| | | | | | breaking other platforms... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150819 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r150814. It turns out that there is a good reason for this after all...David Chisnall2012-02-171-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150818 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo in comment.Richard Osborne2012-02-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150815 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't lazily allocate eh_frame. We're not lazily allocating things like the ↵David Chisnall2012-02-171-5/+0
| | | | | | | | | | LSDA, which are only used when the eh frame is used, so this lazy allocation doesn't really make sense. Fix the type of eh_frame on Solaris so that Sun ld doesn't fail to combine them (thus making it impossible for the unwind library to find them and breaking exceptions). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150814 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for implicit TLS model used with MS VC runtime.Anton Korobeynikov2012-02-112-1/+2
| | | | | | | Patch by Kai Nacke! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150307 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the EDis tables const.Benjamin Kramer2012-02-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150304 91177308-0d34-0410-b5e6-96231b3b80d8
* Put instruction names into an indexed string table on the side, removing a ↵Benjamin Kramer2012-02-102-10/+14
| | | | | | | | | pointer from MCInstrDesc. Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150245 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the Name field in MCInstrDesc to the end, saving 8 bytes of padding per ↵Benjamin Kramer2012-02-091-1/+1
| | | | | | | | entry on x86_64. No change on i386. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150170 91177308-0d34-0410-b5e6-96231b3b80d8
* Value initialize MCRegisterClasses. Not sure how could miss this during the ↵Benjamin Kramer2012-02-081-12/+1
| | | | | | MCTargetDesc refactor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150076 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable streaming of bitcodeDerek Schuff2012-02-061-1/+1
| | | | | | | | | This CL delays reading of function bodies from initial parse until materialization, allowing overlap of compilation with bitcode download. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149918 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-053-5/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149849 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which isAkira Hatanaka2012-02-032-0/+13
| | | | | | | | | | needed to emit a 64-bit gp-relative relocation entry. Make changes necessary for emitting jump tables which have entries with directive .gpdword. This patch does not implement the parts needed for direct object emission or JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149668 91177308-0d34-0410-b5e6-96231b3b80d8
* Add assembler dialect attribute in asm parser which lets target specific asm ↵Devang Patel2012-01-311-0/+1
| | | | | | parser change dialect on the fly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149396 91177308-0d34-0410-b5e6-96231b3b80d8
* Better diagnostic for malformed .org assembly directive.Jim Grosbach2012-01-272-2/+3
| | | | | | Provide source line number information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149101 91177308-0d34-0410-b5e6-96231b3b80d8
* Add simple support for keeping MCFixup source information.Jim Grosbach2012-01-263-2/+19
| | | | | | | Can be used to issue more user friendly diagnostics for faulty relocation constructs and such. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149092 91177308-0d34-0410-b5e6-96231b3b80d8
* Add SourceMgr to MCContext for backend diagnostics.Jim Grosbach2012-01-261-1/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149090 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2024-10-23 18:48:28 +0000