external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	Update aosp/master LLVM for rebase to r222494.	Stephen Hines	2014-12-02	1	-0/+2
*	Update LLVM for 3.5 rebase (r209712).	Stephen Hines	2014-05-29	1	-0/+2
*	Update to LLVM 3.5a.	Stephen Hines	2014-04-24	1	-8/+40
*	Even more spelling fixes for "instruction".	Robert Wilhelm	2013-09-28	1	-1/+1
*	Mark the x86 machine model as incomplete. PR17367.	Andrew Trick	2013-09-25	1	-0/+9
*	Support BufferSize on ProcResGroup for unified MOp schedulers.	Andrew Trick	2013-06-15	1	-0/+1
*	Machine Model: Add MicroOpBufferSize and resource BufferSize.	Andrew Trick	2013-06-15	1	-3/+5
*	MachineModel: Add a ProcResGroup class.	Andrew Trick	2013-03-14	1	-0/+5
*	MIsched: add an ILP window property to machine model.	Andrew Trick	2013-01-09	1	-0/+1
*	Added instregex support to TableGen subtarget emitter.	Andrew Trick	2012-10-03	1	-2/+11
*	Machine Model (-schedmodel only). Added SchedAliases.	Andrew Trick	2012-09-22	1	-1/+32
*	misched: Generic tablegen classes for the new machine model.	Andrew Trick	2012-09-14	1	-7/+291
*	comment	Andrew Trick	2012-09-14	1	-1/+1
*	Added MispredictPenalty to SchedMachineModel.	Andrew Trick	2012-08-08	1	-0/+1
*	I'm introducing a new machine model to simultaneously allow simple	Andrew Trick	2012-07-07	1	-127/+15
*	Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary."	Andrew Trick	2012-07-02	1	-9/+10
*	Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."	Andrew Trick	2012-06-29	1	-10/+9
*	Make NumMicroOps a variable in the subtarget's instruction itinerary.	Andrew Trick	2012-06-29	1	-9/+10
*	Use "NoItineraries" for processors with no itineraries.	Andrew Trick	2012-06-22	1	-1/+2
*	misched: Added MultiIssueItineraries.	Andrew Trick	2012-06-05	1	-1/+20
*	whitespace	Andrew Trick	2012-06-05	1	-4/+5
*	Comments about operand cycles and pipeline forwarding pathes.	Evan Cheng	2010-09-30	1	-1/+17
*	Add support to model pipeline bypass / forwarding.	Evan Cheng	2010-09-28	1	-3/+15
*	For each instruction itinerary class, specify the number of micro-ops each	Evan Cheng	2010-09-09	1	-1/+8
*	Make processor FUs unique for given itinerary. This extends the limit of 32	Anton Korobeynikov	2010-04-18	1	-2/+3
*	Since tblgen bug was fixed (thanks Jakob!) we don't need InstrStage2 hack any...	Anton Korobeynikov	2010-04-07	1	-8/+5
*	Make use of new reserved/required scheduling stuff: introduce VFP and NEON lo...	Anton Korobeynikov	2010-04-07	1	-5/+10
*	Initial support for different kinds of FU reservation.	Anton Korobeynikov	2010-04-07	1	-1/+10
*	Fix apostrophos.	Dan Gohman	2009-09-15	1	-1/+1
*	Extend the instruction itinerary model to include the ability to indicate the...	David Goodwin	2009-08-17	1	-1/+3
*	Enhance the InstrStage object to enable the specification of an Itinerary wit...	David Goodwin	2009-08-12	1	-5/+14
*	Move target independent td files from lib/Target/ to include/llvm/Target so t...	Evan Cheng	2008-11-24	1	-0/+72