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* Remove the TII::scheduleTwoAddrSource() hook.Jakob Stoklund Olesen2012-08-131-8/+0
* Allow legalization of target-specific SDNodes, provided that the target itsel...Owen Anderson2012-08-081-1/+3
* Added MispredictPenalty to SchedMachineModel.Andrew Trick2012-08-081-0/+1
* Minor cleanup of defaultDefLatency APIAndrew Trick2012-08-081-1/+2
* Revert r161371. Removing the 'const' before Type is a "good thing".Bill Wendling2012-08-071-13/+13
* Constify the Type parameter to some methods (which are const anyway).Bill Wendling2012-08-071-13/+13
* Add readcyclecounter lowering on PPC64.Hal Finkel2012-08-041-0/+3
* Try to reduce the compile time impact of r161232.Bob Wilson2012-08-031-0/+25
* Fall back to selection DAG isel for calls to builtin functions.Bob Wilson2012-08-031-1/+3
* Add new getLibFunc method to TargetLibraryInfo.Bob Wilson2012-08-031-67/+71
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-021-1/+5
* Add TargetRegisterInfo::hasRegUnit().Jakob Stoklund Olesen2012-08-021-0/+8
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-021-0/+11
* Typo.Eric Christopher2012-07-301-1/+1
* Revert r160920 and r160919 due to dragonegg and clang selfhost failureManman Ren2012-07-291-11/+0
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-07-281-0/+11
* Remove support for 'CompositeIndices' and sub-register cycles.Jakob Stoklund Olesen2012-07-261-15/+0
* make all Emit*() functions consult the TargetLibraryInfo information before c...Nuno Lopes2012-07-251-0/+2
* add a few more functions to TargetLibraryInfo:Nuno Lopes2012-07-241-0/+14
* TargetLibraryInfo: add strn?cat, strn?cpy, and strn?lenNuno Lopes2012-07-241-0/+12
* Fix a typo (the the => the)Sylvestre Ledru2012-07-231-1/+1
* Make RegisterOperand a subclass of DAGOperand so that RegisterOperands can be...Owen Anderson2012-07-201-1/+2
* Remove tabs.Bill Wendling2012-07-191-1/+1
* TableGen: Allow conditional instruction pattern in multiclass.Jim Grosbach2012-07-171-0/+7
* I'm introducing a new machine model to simultaneously allow simpleAndrew Trick2012-07-073-127/+163
* whitespaceAndrew Trick2012-07-071-2/+2
* Add an experimental early if-conversion pass, off by default.Jakob Stoklund Olesen2012-07-041-0/+50
* Target option DisableJumpTables is a gross hack. Move it to TargetLowering in...Evan Cheng2012-07-022-6/+17
* Extend TargetPassConfig to allow running only a subset of the normal passes.Bob Wilson2012-07-021-2/+7
* Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick2012-07-022-10/+13
* Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle CompareManman Ren2012-06-291-8/+11
* Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick2012-06-292-13/+10
* Make NumMicroOps a variable in the subtarget's instruction itinerary.Andrew Trick2012-06-292-10/+13
* Define DAGOperand, an empty base class for RegisterClass and Operand. This a...Owen Anderson2012-06-251-2/+9
* TableGen: AsmMatcher support for better operand diagnostics.Jim Grosbach2012-06-221-0/+5
* Use "NoItineraries" for processors with no itineraries.Andrew Trick2012-06-221-1/+2
* Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from aLang Hames2012-06-221-10/+30
* Add DAG-combines for aggressive FMA formation.Lang Hames2012-06-191-8/+8
* Move the support for using .init_array from ARM to the genericRafael Espindola2012-06-191-1/+5
* *typo: Cyles changed to CyclesKay Tiong Khoo2012-06-131-2/+2
* Convert comments to proper Doxygen comments.Dmitri Gribenko2012-06-092-7/+7
* Removing strange "using" declarations form TargetInstrInfo.Andrew Trick2012-06-081-4/+0
* TargetInstrInfo hooks implemented in codegen should be declared pure virtual.Andrew Trick2012-06-081-6/+26
* Continue factoring computeOperandLatency. Use it for ARM hasHighOperandLatency.Andrew Trick2012-06-071-0/+9
* Revert r157755.Manman Ren2012-06-061-8/+0
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-051-9/+31
* Add a new intrinsic: llvm.fmuladd. This intrinsic represents a multiply-addLang Hames2012-06-051-0/+8
* misched: Added MultiIssueItineraries.Andrew Trick2012-06-051-1/+20
* whitespaceAndrew Trick2012-06-051-4/+5
* Remove the "-promote-elements" flag. This flag is now enabled by default.Nadav Rotem2012-06-041-10/+2