| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | MC: Add TargetMachine support for setting the value of MCRelaxAll with | Daniel Dunbar | 2010-05-26 | 1 | -1/+11 |
| * | Add StringRef::compare_numeric and use it to sort TableGen register records. | Jakob Stoklund Olesen | 2010-05-26 | 1 | -0/+4 |
| * | Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in | Jim Grosbach | 2010-05-26 | 2 | -3/+8 |
| * | Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by | Bill Wendling | 2010-05-26 | 1 | -1/+17 |
| * | Eliminate the use of PriorityQueue and just use a std::vector, | Dan Gohman | 2010-05-26 | 1 | -13/+5 |
| * | Fix indentation. | Dan Gohman | 2010-05-26 | 1 | -2/+2 |
| * | MC: Change RelaxInstruction to only take the input and output instructions. | Daniel Dunbar | 2010-05-26 | 1 | -4/+6 |
| * | MC: Simplify MayNeedRelaxation to not provide the fixups, so we can query it | Daniel Dunbar | 2010-05-26 | 1 | -4/+1 |
| * | Replace the SubRegSet tablegen class with a less error-prone mechanism. | Jakob Stoklund Olesen | 2010-05-26 | 1 | -11/+17 |
| * | MC: Eliminate MCAsmFixup, replace with MCFixup. | Daniel Dunbar | 2010-05-26 | 4 | -47/+20 |
| * | MC: Simplify MCFixup and increase the available offset size. | Daniel Dunbar | 2010-05-26 | 1 | -29/+14 |
| * | MC: Use accessors for access to MCAsmFixup. | Daniel Dunbar | 2010-05-26 | 1 | -2/+8 |
| * | MC: Eliminate MCFragment vtable, which was unnecessary. | Daniel Dunbar | 2010-05-26 | 1 | -12/+1 |
| * | Temporarily revert r104655 as it's breaking the bots. | Eric Christopher | 2010-05-26 | 1 | -14/+1 |
| * | Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism." | Jakob Stoklund Olesen | 2010-05-26 | 1 | -17/+11 |
| * | Change push_all to a non-virtual function and implement it in the | Dan Gohman | 2010-05-26 | 2 | -10/+7 |
| * | Delete an unused function. | Dan Gohman | 2010-05-26 | 2 | -3/+0 |
| * | Dale and Evan suggested putting the "check for setjmp" much earlier in the | Bill Wendling | 2010-05-26 | 1 | -1/+14 |
| * | Replace the SubRegSet tablegen class with a less error-prone mechanism. | Jakob Stoklund Olesen | 2010-05-26 | 1 | -11/+17 |
| * | Start adding mach-o tls reloc support. | Eric Christopher | 2010-05-26 | 1 | -1/+2 |
| * | Drop the SuperregHashTable. It is essentially the same as SubregHashTable. | Jakob Stoklund Olesen | 2010-05-25 | 1 | -17/+1 |
| * | Print symbolic SubRegIndex names on machine operands. | Jakob Stoklund Olesen | 2010-05-25 | 1 | -0/+9 |
| * | Remove NumberHack entirely. | Jakob Stoklund Olesen | 2010-05-25 | 1 | -5/+1 |
| * | Make sure aeskeygenassist uses an unsigned immediate field. | Eric Christopher | 2010-05-25 | 1 | -2/+2 |
| * | Switch SubRegSet to using symbolic SubRegIndices | Jakob Stoklund Olesen | 2010-05-24 | 1 | -2/+3 |
| * | Replace the tablegen RegisterClass field SubRegClassList with an alist-like data | Jakob Stoklund Olesen | 2010-05-24 | 2 | -6/+3 |
| * | Avoid adding duplicate function live-in's. | Evan Cheng | 2010-05-24 | 1 | -0/+4 |
| * | Add the SubRegIndex TableGen class. | Jakob Stoklund Olesen | 2010-05-24 | 1 | -0/+8 |
| * | MC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches. | Daniel Dunbar | 2010-05-23 | 1 | -1/+7 |
| * | tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses ins... | Daniel Dunbar | 2010-05-22 | 1 | -6/+6 |
| * | Trivial change to dump() function for SparseBitVector | John Mosby | 2010-05-22 | 1 | -6/+10 |
| * | Implement @llvm.returnaddress. rdar://8015977. | Evan Cheng | 2010-05-22 | 2 | -2/+15 |
| * | Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit. | Jim Grosbach | 2010-05-22 | 2 | -2/+11 |
| * | Add a new section and accessor for TLS data. | Eric Christopher | 2010-05-22 | 1 | -0/+7 |
| * | Fix comment and whitespace. | Eric Christopher | 2010-05-21 | 1 | -2/+2 |
| * | - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs | Evan Cheng | 2010-05-21 | 1 | -9/+18 |
| * | Add MachineInstr::readsWritesVirtualRegister() to determine if an instruction | Jakob Stoklund Olesen | 2010-05-21 | 1 | -1/+11 |
| * | added an assertion to MCObjectWriter::WriteBytes to catch misuse of the ZeroF... | Nathan Jeffords | 2010-05-21 | 1 | -0/+2 |
| * | constify accessor. | Chris Lattner | 2010-05-21 | 1 | -1/+2 |
| * | Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a regist... | Jakob Stoklund Olesen | 2010-05-21 | 1 | -11/+1 |
| * | Use MachineInstr::readsWritesVirtualRegister to determine if a register is read. | Jakob Stoklund Olesen | 2010-05-21 | 1 | -1/+11 |
| * | If the first definition of a virtual register is a partial redef, add an | Jakob Stoklund Olesen | 2010-05-21 | 1 | -1/+1 |
| * | Currently, createMachOStreamer() is invoked directly in llvm-mc which | Matt Fleming | 2010-05-21 | 1 | -0/+46 |
| * | Add support for parsing the ELF .type assembler directive. | Matt Fleming | 2010-05-21 | 2 | -1/+2 |
| * | Removed scaleNumbering method declaration from LiveInterval (not defined, not... | Lang Hames | 2010-05-21 | 1 | -4/+0 |
| * | Allow targets more controls on what nodes are scheduled by reg pressure, what... | Evan Cheng | 2010-05-20 | 3 | -2/+15 |
| * | Rename variable. add comment. | Devang Patel | 2010-05-20 | 1 | -1/+1 |
| * | tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor | Daniel Dunbar | 2010-05-20 | 1 | -0/+3 |
| * | Add a hybrid bottom up scheduler that reduce register usage while avoiding | Evan Cheng | 2010-05-20 | 4 | -3/+21 |
| * | Fix build by actually declaring the variable. | Eric Christopher | 2010-05-20 | 1 | -0/+4 |
