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path: root/lib/CodeGen/LiveIntervalAnalysis.cpp
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* VarInfo::UsedBlocks is no longer used. Remove.Evan Cheng2007-04-181-2/+1
* Don't populate TryAgainList when coalescing only physical registers with virt...Evan Cheng2007-04-181-6/+6
* Copy coalescing change to prevent a physical register from being pin to aEvan Cheng2007-04-171-77/+76
* Re-materialize all loads from fixed stack slots.Evan Cheng2007-04-041-5/+12
* Trivially re-materializable instructions have spill weights that are half of ...Evan Cheng2007-04-041-6/+6
* Ugh. Copy coalescer does not update register numbers.Evan Cheng2007-04-021-2/+15
* Bug fix for PR1279. When isDead is propagate by copy coalescing, we keep lengthEvan Cheng2007-03-301-5/+10
* Move rematerialization out of beta.Evan Cheng2007-03-281-7/+1
* Fix for PR1279. Dead def has a live interval of length 1. Copy coalescing shouldEvan Cheng2007-03-281-3/+5
* Fix for PR1266. Don't mark a two address operand IsKill.Evan Cheng2007-03-261-3/+3
* Fix for PR1257. Bug in live range shortening as a result of copy coalescingEvan Cheng2007-03-221-11/+9
* First cut trivial re-materialization support.Evan Cheng2007-03-201-5/+26
* Remove -reduce-joining-phys-regs options. Make it on by default.Evan Cheng2007-03-191-3/+1
* Minor bug fix.Evan Cheng2007-03-191-1/+1
* - Merge UsedBlocks info after two virtual registers are coalesced.Evan Cheng2007-03-181-23/+30
* Joining a live interval of a physical register with a virtual one can turn outEvan Cheng2007-03-171-0/+54
* Debugging output stuff.Evan Cheng2007-03-151-4/+4
* Watch out for cases like this:Evan Cheng2007-03-031-4/+5
* Dead live-in detection bug.Evan Cheng2007-03-021-2/+2
* Oops.Evan Cheng2007-03-011-1/+0
* Track all joined registers and eliminate unneeded kills after all joining are...Evan Cheng2007-03-011-22/+42
* Joining an interval with a dead copy instruction. Shorten the live range to t...Evan Cheng2007-02-261-20/+46
* Fix a couple of bugs related IsDead back propagation during coalescing.Evan Cheng2007-02-251-5/+10
* If the liveinterval of the source instruction has been extended, remove the I...Evan Cheng2007-02-251-0/+6
* Handle cases when joining live intervals of two virtual registers.Evan Cheng2007-02-231-7/+17
* Remove unnecessary isKill properties if a live range has been lengthened due ...Evan Cheng2007-02-221-1/+24
* Allow for live in registers for eh landing pads.Jim Laskey2007-02-211-5/+6
* Out of bound reference.Evan Cheng2007-02-211-2/+2
* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-191-54/+135
* For PR1207:Reid Spencer2007-02-191-134/+54
* - Changes how function livein's are handled, they now have a start index of 0.Evan Cheng2007-02-171-54/+134
* Use BitVector instead of vector<bool> which can be extremely slow.Evan Cheng2007-02-151-1/+1
* Allow any MachineBasicBlock (not just the entry block) to have live-in physicalEvan Cheng2007-02-131-39/+33
* Eliminate static ctors from StatisticsChris Lattner2006-12-191-15/+6
* Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, areBill Wendling2006-12-071-2/+2
* MI keeps a ptr of TargetInstrDescriptor, use it.Evan Cheng2006-12-071-1/+2
* Detemplatize the Statistic class. The only type it is instantiated withChris Lattner2006-12-061-5/+5
* Unbreak VC++ build.Jeff Cohen2006-12-021-0/+1
* Match TargetInstrInfo changes.Evan Cheng2006-12-011-2/+1
* Converted to using llvm streams instead of <iostream>sBill Wendling2006-11-291-68/+68
* Don't recompute getNumOperands for each iteration.Bill Wendling2006-11-161-1/+1
* Added a new method "CreateNewLiveInterval" which, given a list ofBill Wendling2006-11-161-0/+49
* A register def can be partially dead when the whole register has use(s) but a...Evan Cheng2006-11-151-1/+8
* Add implicit def / use operands to MachineInstr.Evan Cheng2006-11-101-8/+1
* Remove redundant <cmath>.Jim Laskey2006-11-081-1/+0
* Enable improved spilling costs by default. This speeds up viterbi on x86Chris Lattner2006-11-071-12/+7
* Use correct value for float HUGH_VAL.Jim Laskey2006-11-071-4/+4
* Add a new llcbeta option. This speeds up viterbi from 12.34 to 8.76s onChris Lattner2006-11-071-4/+19
* Proper check for two-addressness.Evan Cheng2006-11-031-7/+22
* For PR786:Reid Spencer2006-11-021-1/+1
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