| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Kill off more cerr/cout uses and prune includes a bit. | Benjamin Kramer | 2009-08-23 | 1 | -1/+1 |
| * | Convert DOUT to DEBUG(errs()...). | Bill Wendling | 2009-08-22 | 1 | -55/+67 |
| * | Use setPreservesAll and setPreservesCFG in CodeGen passes. | Dan Gohman | 2009-07-31 | 1 | -0/+1 |
| * | More migration to raw_ostream, the water has dried up around the iostream hole. | Daniel Dunbar | 2009-07-25 | 1 | -1/+3 |
| * | llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. | Torok Edwin | 2009-07-14 | 1 | -1/+1 |
| * | Removed some junk code that snuck in to an earlier commit. | Lang Hames | 2009-07-13 | 1 | -5/+0 |
| * | Convert more assert(0)+abort() -> LLVM_UNREACHABLE, | Torok Edwin | 2009-07-11 | 1 | -3/+4 |
| * | Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the... | Evan Cheng | 2009-07-01 | 1 | -31/+0 |
| * | Add a bit IsUndef to MachineOperand. This indicates the def / use register op... | Evan Cheng | 2009-06-30 | 1 | -0/+11 |
| * | - Update register allocation hint after coalescing. This is done by the targe... | Evan Cheng | 2009-06-18 | 1 | -2/+8 |
| * | VNInfo cleanup. | Lang Hames | 2009-06-17 | 1 | -3/+3 |
| * | Part 1. | Evan Cheng | 2009-06-15 | 1 | -12/+13 |
| * | Move register allocation preference (or hint) from LiveInterval to MachineReg... | Evan Cheng | 2009-06-14 | 1 | -13/+17 |
| * | RALinScan::attemptTrivialCoalescing() was returning a virtual register instea... | Evan Cheng | 2009-06-04 | 1 | -3/+9 |
| * | A value defined by an implicit_def can be liven to a use BB. This is unfortun... | Evan Cheng | 2009-06-04 | 1 | -0/+18 |
| * | Remove a #include of <iostream>. | Dan Gohman | 2009-06-04 | 1 | -1/+0 |
| * | Removed more testing code that snuck in earlier. | Lang Hames | 2009-06-04 | 1 | -20/+2 |
| * | Fixed warning, removed some temporary validation code that snuck in during my... | Lang Hames | 2009-06-02 | 1 | -91/+0 |
| * | Update to in-place spilling framework. Includes live interval scaling and tri... | Lang Hames | 2009-06-02 | 1 | -9/+132 |
| * | New Spiller interface and trivial implementation. | Lang Hames | 2009-05-18 | 1 | -2/+24 |
| * | Teach TransferDeadness to delete truly dead instructions if they do not produ... | Evan Cheng | 2009-05-12 | 1 | -8/+23 |
| * | Renamed Spiller classes (plus uses and related files) to VirtRegRewriter. | Lang Hames | 2009-05-06 | 1 | -4/+4 |
| * | In some rare cases, the register allocator can spill registers but end up not... | Evan Cheng | 2009-05-03 | 1 | -17/+35 |
| * | Code clean up. Bye bye PhysRegTracker. | Evan Cheng | 2009-05-01 | 1 | -26/+83 |
| * | spillPhysRegAroundRegDefsUses() may have invalidated iterators stored in fixe... | Evan Cheng | 2009-04-29 | 1 | -0/+9 |
| * | Determine allocation 'preference' with right register class. I haven't seen t... | Evan Cheng | 2009-04-29 | 1 | -8/+10 |
| * | It has finally happened. Spiller is now using live interval info. | Evan Cheng | 2009-04-21 | 1 | -1/+1 |
| * | - Remove an arbitrary spill weight tweak that should not have been there. | Evan Cheng | 2009-04-20 | 1 | -5/+26 |
| * | Added a linearscan register allocation optimization. When the register alloca... | Evan Cheng | 2009-04-20 | 1 | -56/+189 |
| * | Fix a bug in spill weight computation. If the alias is a super-register, and ... | Evan Cheng | 2009-03-23 | 1 | -7/+34 |
| * | Fix PR3391 and PR3864. Reg allocator infinite looping. | Evan Cheng | 2009-03-23 | 1 | -2/+6 |
| * | Convert VirtRegMap to a MachineFunctionPass. | Owen Anderson | 2009-03-13 | 1 | -3/+4 |
| * | Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. N... | Owen Anderson | 2009-03-11 | 1 | -0/+1 |
| * | Change TargetInstrInfo::isMoveInstr to return source and destination sub-regi... | Evan Cheng | 2009-01-20 | 1 | -4/+6 |
| * | Make linear scan's trivial coalescer slightly more aggressive. | Evan Cheng | 2009-01-20 | 1 | -6/+6 |
| * | Tidy up #includes, deleting a bunch of unnecessary #includes. | Dan Gohman | 2009-01-05 | 1 | -0/+1 |
| * | - More pre-split fixes: spill slot live interval computation bug; restore poi... | Evan Cheng | 2008-10-29 | 1 | -1/+1 |
| * | - Rewrite code that update register live interval that's split. | Evan Cheng | 2008-10-29 | 1 | -1/+1 |
| * | Committing a good chunk of the pre-register allocation live interval splittin... | Evan Cheng | 2008-10-23 | 1 | -0/+7 |
| * | Fix command-line option printing to print two spaces where needed, | Dan Gohman | 2008-10-14 | 1 | -1/+1 |
| * | Add an option to enable StrongPHIElimination, for ease of testing. | Owen Anderson | 2008-10-07 | 1 | -0/+3 |
| * | Re-apply 56835 along with header file changes. | Evan Cheng | 2008-09-30 | 1 | -2/+3 |
| * | Revert commit 56835 since it breaks the build. | Duncan Sands | 2008-09-30 | 1 | -3/+2 |
| * | If a re-materializable instruction has a register operand, the spiller will c... | Evan Cheng | 2008-09-30 | 1 | -2/+3 |
| * | Next round of earlyclobber handling. Approach the | Dale Johannesen | 2008-09-24 | 1 | -95/+4 |
| * | Teach coalescer about earlyclobber bits. | Dale Johannesen | 2008-09-20 | 1 | -2/+5 |
| * | Fix PR2808. When regalloc runs out of register, it spill a physical register ... | Evan Cheng | 2008-09-20 | 1 | -1/+4 |
| * | Make earlyclobber stuff work when virtual regs | Dale Johannesen | 2008-09-19 | 1 | -8/+26 |
| * | Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis | Dale Johannesen | 2008-09-19 | 1 | -2/+71 |
| * | Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. | Evan Cheng | 2008-09-18 | 1 | -8/+6 |
