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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9496 91177308-0d34-0410-b5e6-96231b3b80d8
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Header files will be on the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
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and TargetInstrDescriptor::ImplicitUses to always point to a null
terminated array and never be null. So there is no need to check for
pointer validity when iterating over those sets. Code that looked
like:
if (const unsigned* AS = TID.ImplicitDefs) {
for (int i = 0; AS[i]; ++i) {
// use AS[i]
}
}
was changed to:
for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) {
// use *AS
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8960 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8095 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7916 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7906 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7823 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7591 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7588 91177308-0d34-0410-b5e6-96231b3b80d8
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slots created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7584 91177308-0d34-0410-b5e6-96231b3b80d8
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* Add a lot more DEBUG output, which is better structured than before
* Fix bug: Jello/2003-08-04-PhysRegLiveFailure.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7583 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7533 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7503 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7497 91177308-0d34-0410-b5e6-96231b3b80d8
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Fixed spilling of %fcc[0-3] which are part of %fsr.
(2) Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.
(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6109 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6002 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5326 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
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* Convert to use PHIElimination pass
* Don't spill values which have just been reloaded (big win reducing spills)
* Add experimental support for eliminating spills before TwoAddress
instructions. It currently is broken so it is #ifdef'd out.
* Use new "is terminator" flag on instructions instead of looking for
branches and returns explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5219 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5200 91177308-0d34-0410-b5e6-96231b3b80d8
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* Use new FunctionFrameInfo object to manage stack slots instead of doing
it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5195 91177308-0d34-0410-b5e6-96231b3b80d8
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Only spill and reload caller saved registers that are actually modified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5145 91177308-0d34-0410-b5e6-96231b3b80d8
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strtol to not miscompile, and fixing bug: 2002-12-23-LocalRAProblem.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5132 91177308-0d34-0410-b5e6-96231b3b80d8
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* Add a new option to eliminate spilling of registers that are only used
within a basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5106 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5099 91177308-0d34-0410-b5e6-96231b3b80d8
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Move X86 specific alignment gunk to X86 files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5096 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5093 91177308-0d34-0410-b5e6-96231b3b80d8
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* Implement register alias set support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5082 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5078 91177308-0d34-0410-b5e6-96231b3b80d8
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