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* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-1/+1
| | | | | | | Patch by Howard Hinnant! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
* RegScavenger::enterBasicBlock should always reset register state.Evan Cheng2009-11-121-5/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86972 91177308-0d34-0410-b5e6-96231b3b80d8
* - Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests andEvan Cheng2009-10-261-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg around. - Relax register scavenging to allow use of partially "not-live" registers. It's common for targets to operate on registers where the top bits are undef. e.g. s0 = d0 = insert_subreg d0<undef>, s0, 1 ... = d0 When the insert_subreg is eliminated by the coalescer, the scavenger used to complain. The previous fix was to keep to insert_subreg around. But that's brittle and it's overly conservative when we want to use the scavenger to allocate registers. It's actually legal and desirable for other instructions to use the "undef" part of d0. e.g. s0 = d0 = insert_subreg d0<undef>, s0, 1 ... s1 = = s1 = d0 We probably need add a "partial-undef" marker on machine operand so the machine verifier would not complain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85091 91177308-0d34-0410-b5e6-96231b3b80d8
* When the scavenger is looking for a good candidate location to restore from aJim Grosbach2009-10-251-5/+27
| | | | | | | spill, it should avoid doing so inside the live range of a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85026 91177308-0d34-0410-b5e6-96231b3b80d8
* The spill restore needs to be resolved to the SP/FP just like the spillJim Grosbach2009-10-211-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84792 91177308-0d34-0410-b5e6-96231b3b80d8
* Adjust the scavenge register spilling to allow the target to choose anJim Grosbach2009-10-191-3/+2
| | | | | | | | | | | | appropriate restore location for the spill as well as perform the actual save and restore. The Thumb1 target uses this to make sure R12 is not clobbered while a spilled scavenger register is live there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84554 91177308-0d34-0410-b5e6-96231b3b80d8
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83467 91177308-0d34-0410-b5e6-96231b3b80d8
* grammarJim Grosbach2009-10-061-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83378 91177308-0d34-0410-b5e6-96231b3b80d8
* In Thumb1, the register scavenger is not always able to use an emergencyJim Grosbach2009-10-051-9/+15
| | | | | | | | | | spill slot. When frame references are via the frame pointer, they will be negative, but Thumb1 load/store instructions only allow positive immediate offsets. Instead, Thumb1 will spill to R12. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83336 91177308-0d34-0410-b5e6-96231b3b80d8
* replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()Jim Grosbach2009-09-301-2/+3
| | | | | | per customary usage git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83137 91177308-0d34-0410-b5e6-96231b3b80d8
* Additional check for regno==0Jim Grosbach2009-09-291-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83103 91177308-0d34-0410-b5e6-96231b3b80d8
* Moving register scavenging to a post pass results in virtual registers inJim Grosbach2009-09-291-2/+3
| | | | | | | | | the instruction we're scavenging for. The scavenger needs to know to avoid them when analyzing register usage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83077 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR5024 with a big hammer: disable the double-def assertion in the scavenger.Evan Cheng2009-09-241-39/+4
| | | | | | | | | | | | | | | | | | | | | | | LiveVariables add implicit kills to correctly track partial register kills. This works well enough and is fairly accurate. But coalescer can make it impossible to maintain these markers. e.g. BL <ga:sss1>, %R0<kill,undef>, %S0<kill>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def>, ... ... %reg1031<def> = FLDS <cp#1>, 0, 14, %reg0, Mem:LD4[ConstantPool] ... %S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill> When reg1031 and S0 are coalesced, the copy (FCPYS) will be eliminated the the implicit-kill of D0 is lost. In this case it's possible to move the marker to the FLDS. But in many cases, this is not possible. Suppose %reg1031<def> = FOO <cp#1>, %D0<imp-def> ... %S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill> When FCPYS goes away, the definition of S0 is the "FOO" instruction. However, transferring the D0 implicit-kill to FOO doesn't work since it is the def of D0 itself. We need to fix this in another time by introducing a "kill" pseudo instruction to track liveness. Disabling the assertion is not ideal, but machine verifier is doing that job now. It's important to know double-def is not a miscomputation since it means a register should be free but it's not tracked as free. It's a performance issue instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82677 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify RegScavenger::FindUnusedReg.Jakob Stoklund Olesen2009-08-181-30/+6
| | | | | | | | | - Drop the Candidates argument and fix all callers. Now that RegScavenger tracks available registers accurately, there is no need to restict the search. - Make sure that no aliases of the found register are in use. This was a potential bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79369 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace RegScavenger::DistanceMap with a simpler local algorithm.Jakob Stoklund Olesen2009-08-161-68/+47
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79195 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up the public interface of RegScavenger.Jakob Stoklund Olesen2009-08-161-19/+0
| | | | | | Remove unused methods and make others private. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79194 91177308-0d34-0410-b5e6-96231b3b80d8
* Refine EarlyClobber assert in register scavenger.Jakob Stoklund Olesen2009-08-151-1/+1
| | | | | | | | | | | | | | It is legal for an inline asm operand to use an earlyclobber register if the use operand is tied to the earlyclobber operand. The issue is discussed here: http://gcc.gnu.org/ml/gcc/1999-04n/msg00431.html We should perhaps let only the machine code verifier worry about these finer details. EarlyClobber operands are not really interesting to the scavenger. This fixes PR4528 for the third time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79122 91177308-0d34-0410-b5e6-96231b3b80d8
* Track pristine registers as if they were live-in in the register scavenger.Jakob Stoklund Olesen2009-08-131-14/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78913 91177308-0d34-0410-b5e6-96231b3b80d8
* Rebuild RegScavenger::DistanceMap each time it is needed.Jakob Stoklund Olesen2009-08-111-23/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register scavenger maintains a DistanceMap that maps MI pointers to their distance from the top of the current MBB. The DistanceMap is built incrementally in forward() and in bulk in findFirstUse(). It is used by scavengeRegister() to determine which candidate register has the longest unused interval. Unfortunately the DistanceMap contents can become outdated. The first time scavengeRegister() is called, the DistanceMap is filled to cover the MBB. If then instructions are inserted in the MBB (as they always are following scavengeRegister()), the recorded distances are too short. This causes bad behaviour in the included test case where a register use /after/ the current position is ignored because findFirstUse() thinks is is /before/ the current position. A "using an undefined register" assertion follows promptly. The fix is to build a fresh DistanceMap at the top of scavengeRegister(), and discard it after use. This means that DistanceMap is no longer needed as a RegScavenger member variable, and forward() doesn't need to update it. The fix then discloses issue number two in the same test case: The candidate search in scavengeRegister() finds a CSR that has been saved in the prologue, but is currently unused. It would be both inefficient and wrong to spill such a register in the emergency spill slot. In the present case, the emergency slot restore is placed immediately before the normal epilogue restore, leading to a "Redefining a live register" assertion. Fix number two: When scavengerRegister() stumbles upon an unused register that is overwritten later in the MBB, return that register early. It is important to verify that the register is defined later in the MBB, otherwise it might be an unspilled CSR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78650 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove RegisterScavenger::isSuperRegUsed(). This completely reverses the ↵Jakob Stoklund Olesen2009-08-081-32/+2
| | | | | | | | | | | | | | | | mistaken commit r77904. Now there is no special treatment of instructions that redefine part of a super-register. Instead, the super-register is marked with <imp-use,kill> and <imp-def>. For instance, from LowerSubregs on ARM: subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1<undef>, %D1<kill>, 5 subreg: %D2<def> = FCPYD %D1<kill>, 14, %reg0, %Q1<imp-def> subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1, %D0<kill>, 6 subreg: %D3<def> = FCPYD %D0<kill>, 14, %reg0, %Q1<imp-use,kill>, %Q1<imp-def> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78466 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify RegScavenger::forward a bit more.Jakob Stoklund Olesen2009-08-081-65/+53
| | | | | | | | | | | Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78465 91177308-0d34-0410-b5e6-96231b3b80d8
* Back out some of recent register scavenger change by John Mosby. It broke a ↵Evan Cheng2009-08-071-27/+14
| | | | | | number of ARM tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78421 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of RegScavenger::backwards() before the bitrot spreads.Jakob Stoklund Olesen2009-08-061-64/+0
| | | | | | If we need it one day, there is nothing wrong with putting it back in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78337 91177308-0d34-0410-b5e6-96231b3b80d8
* Reg Scavenging generalization (Thumb support):John Mosby2009-08-061-27/+52
| | | | | | | | - start support for new PEI w/reg alloc, allow running RS from emit{Pro,Epi}logue() target hooks. - fix minor issue with recursion detection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78318 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up the handling of two-address operands in RegScavenger.Jakob Stoklund Olesen2009-08-041-12/+3
| | | | | | This fixes PR4528. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78107 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't give implicit machine operands special treatment in the register ↵Jakob Stoklund Olesen2009-08-041-5/+2
| | | | | | | | | scavenger. Imp-def is *not* allowed to redefine a live register. Imp-use is *not* allowed to use a dead register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78106 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR4528. This scavenger assertion is too strict. The two-address value isEvan Cheng2009-08-041-1/+2
| | | | | | | | | | killed by another operand. There is probably a better fix. Either 1) scavenger can look at other operands, or 2) livevariables can be smarter about kill markers. Patches welcome. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78072 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix issue in regscavenger when scavenging a callee-saved register that has ↵Jakob Stoklund Olesen2009-08-021-1/+8
| | | | | | not been spilled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77912 91177308-0d34-0410-b5e6-96231b3b80d8
* Scavenger asserts.Jakob Stoklund Olesen2009-08-021-2/+11
| | | | | | | Allow imp-def and imp-use of anything in the scavenger asserts, just like the machine code verifier. Allow redefinition of a sub-register of a live register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77904 91177308-0d34-0410-b5e6-96231b3b80d8
* Ignore undef uses.Evan Cheng2009-07-221-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76799 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bug in RegScavenger::scavengeRegister().Jakob Stoklund Olesen2009-07-151-1/+1
| | | | | | | | | | | | | Reserved registers are not candidates for scavenging, and they were removed from the candidate list like this: CreateRegClassMask(RC, Candidates); Candidates ^= ReservedRegs; However, when there are reserved registers outside RC, this causes invalid bits to be set in Candidates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75847 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix assert(0) conversion, as suggested by Chris.Torok Edwin2009-07-121-3/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75423 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more assert(0)+abort() -> LLVM_UNREACHABLE,Torok Edwin2009-07-111-2/+2
| | | | | | | and abort()/exit() -> llvm_report_error(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75363 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove special handling of implicit_def. Fix a couple more bugs in ↵Evan Cheng2009-07-011-22/+9
| | | | | | | | | liveintervalanalysis and coalescer handling of implicit_def. Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74601 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves ↵Evan Cheng2009-07-011-1/+7
| | | | | | the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily restore the scavenger implicit_def checking code. MachineOperand ↵Evan Cheng2009-06-301-5/+23
| | | | | | isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74519 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a bit IsUndef to MachineOperand. This indicates the def / use register ↵Evan Cheng2009-06-301-26/+8
| | | | | | | | | | | operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing. This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8
* If killed register is defined by implicit_def, do not clear it since it's ↵Evan Cheng2009-06-121-5/+12
| | | | | | live range may overlap another def of same register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73255 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix pr3954. The register scavenger asserts for inline assembly withBob Wilson2009-04-091-4/+2
| | | | | | | | | | | | | register destinations that are tied to source operands. The TargetInstrDescr::findTiedToSrcOperand method silently fails for inline assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very close to doing what is needed, so this revision makes a few changes to that method and also renames it to isRegTiedToUseOperand (for consistency with the very similar isRegTiedToDefOperand and because it handles both two-address instructions and inline assembly with tied registers). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68714 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
* Silience unused warnings.Devang Patel2008-12-231-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61390 91177308-0d34-0410-b5e6-96231b3b80d8
* Initialize the ImplicitDefed member, to avoid getting staleDan Gohman2008-12-191-0/+1
| | | | | | | data from a previous block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61237 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo in a comment.Dan Gohman2008-12-021-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60434 91177308-0d34-0410-b5e6-96231b3b80d8
* - Register scavenger should use MachineRegisterInfo and internal map to find ↵Evan Cheng2008-11-201-32/+62
| | | | | | | | | | the first use of a register after a given machine instruction. - When scavenging a register, in addition to the spill, insert a restore before the first use. - Abort if client is looking to scavenge a register even when a previously scavenged register is still live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59697 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the same change to RegScavenger::backward.Evan Cheng2008-11-181-9/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59566 91177308-0d34-0410-b5e6-96231b3b80d8
* We also need to keep the operand index for two address check.Evan Cheng2008-11-181-9/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59562 91177308-0d34-0410-b5e6-96231b3b80d8
* Register scavenger should process early clobber defs first. A dead early ↵Evan Cheng2008-11-181-23/+37
| | | | | | clobber def should not interfere with a normal def which happens one slot later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59559 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-7/+7
| | | | | | | isReg, etc., from isRegister, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor const-correctness fixes.Dan Gohman2008-07-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53196 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some constructs that gcc-4.4 warns about.Duncan Sands2008-05-271-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51591 91177308-0d34-0410-b5e6-96231b3b80d8
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