| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and | Bill Wendling | 2012-06-28 | 1 | -5/+5 |
| * | Emit a single _udivmodsi4 libcall instead of two separate _udivsi3 and | Evan Cheng | 2012-06-21 | 1 | -5/+7 |
| * | Fix a bug in the code which custom-lowers truncating stores in LegalizeDAG. | Akira Hatanaka | 2012-06-02 | 1 | -2/+3 |
| * | Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall | Justin Holewinski | 2012-05-25 | 1 | -13/+25 |
| * | Fix use of an unitialized value in the LegalizeOps expansion for ISD::SUB. N... | Owen Anderson | 2012-05-21 | 1 | -1/+1 |
| * | When legalising shifts, do not pre-build a list of operands which | Peter Collingbourne | 2012-05-20 | 1 | -10/+14 |
| * | Register DAGUpdateListeners with SelectionDAG. | Jakob Stoklund Olesen | 2012-04-20 | 1 | -7/+8 |
| * | Make the code slightly more palatable. | Evan Cheng | 2012-04-10 | 1 | -1/+5 |
| * | Fix a long standing tail call optimization bug. When a libcall is emitted | Evan Cheng | 2012-04-10 | 1 | -7/+8 |
| * | f16 FREM can now be legalized by promoting to f32 | Pete Cooper | 2012-04-04 | 1 | -0/+1 |
| * | Add the ability to promote legal integer VAARGs. This is required for the PPC... | Hal Finkel | 2012-03-24 | 1 | -1/+33 |
| * | f16 FDIV can now be legalized by promoting to f32 | Pete Cooper | 2012-03-19 | 1 | -1/+2 |
| * | Make it possible for a target to mark FSUB as Expand. This requires providin... | Owen Anderson | 2012-03-06 | 1 | -0/+10 |
| * | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng | 2012-02-28 | 1 | -6/+7 |
| * | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar | 2012-02-28 | 1 | -7/+6 |
| * | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng | 2012-02-28 | 1 | -6/+7 |
| * | Rename getExceptionAddressRegister() to getExceptionPointerRegister() for con... | Lang Hames | 2012-02-14 | 1 | -1/+1 |
| * | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-05 | 1 | -14/+14 |
| * | use ConstantVector::getSplat in a few places. | Chris Lattner | 2012-01-25 | 1 | -1/+1 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -1/+0 |
| * | Return an ArrayRef from ShuffleVectorSDNode::getMask and push it through Code... | Benjamin Kramer | 2012-01-15 | 1 | -7/+5 |
| * | Added FPOW, FEXP, FLOG to PromoteNode so that custom actions can be set to Pr... | Pete Cooper | 2012-01-12 | 1 | -0/+18 |
| * | Fix a bug in the legalization of shuffle vectors. When we emulate shuffles us... | Nadav Rotem | 2012-01-10 | 1 | -1/+3 |
| * | Fixed a bug in SelectionDAG.cpp. | Elena Demikhovsky | 2012-01-03 | 1 | -6/+50 |
| * | Revert 147399. It broke CodeGen/ARM/vext.ll. | Rafael Espindola | 2012-01-01 | 1 | -39/+5 |
| * | Fixed a bug in SelectionDAG.cpp. | Elena Demikhovsky | 2012-01-01 | 1 | -5/+39 |
| * | Initial CodeGen support for CTTZ/CTLZ where a zero input produces an | Chandler Carruth | 2011-12-13 | 1 | -3/+15 |
| * | Remove dead llvm.eh.sjlj.dispatchsetup intrinsic. | Bill Wendling | 2011-11-28 | 1 | -2/+0 |
| * | Add a couple asserts so it will be easier to debug if we accidentally pass in... | Eli Friedman | 2011-11-16 | 1 | -0/+4 |
| * | Some cleanup and bulletproofing for node replacement in LegalizeDAG. To main... | Eli Friedman | 2011-11-11 | 1 | -57/+59 |
| * | Added invariant field to the DAG.getLoad method and changed all calls. | Pete Cooper | 2011-11-08 | 1 | -20/+25 |
| * | Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn'... | Eli Friedman | 2011-11-08 | 1 | -3/+19 |
| * | Revert r144034 while I try to track down a crash. | Eli Friedman | 2011-11-07 | 1 | -19/+3 |
| * | Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn'... | Eli Friedman | 2011-11-07 | 1 | -3/+19 |
| * | Reapply r143206, with fixes. Disallow physical register lifetimes | Dan Gohman | 2011-11-03 | 1 | -515/+257 |
| * | Revert r143206, as there are still some failing tests. | Dan Gohman | 2011-10-29 | 1 | -257/+515 |
| * | Reapply r143177 and r143179 (reverting r143188), with scheduler | Dan Gohman | 2011-10-28 | 1 | -515/+257 |
| * | Speculatively disable Dan's commits 143177 and 143179 to see if | Duncan Sands | 2011-10-28 | 1 | -257/+515 |
| * | Delete #if 0 code accidentally left in. | Dan Gohman | 2011-10-28 | 1 | -17/+0 |
| * | Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW | Dan Gohman | 2011-10-28 | 1 | -514/+273 |
| * | Move the legalization of vector loads and stores into LegalizeVectorOps. In some | Nadav Rotem | 2011-10-15 | 1 | -183/+4 |
| * | Add support for legalization of vector SHL/SRA/SRL instructions | Nadav Rotem | 2011-10-11 | 1 | -0/+25 |
| * | Add support for legalization of vector trunc-store where the saved scalar typ... | Nadav Rotem | 2011-10-11 | 1 | -13/+13 |
| * | Cleanup the trunc-store legalization code and add asserts. | Nadav Rotem | 2011-10-11 | 1 | -68/+87 |
| * | Moved type construction out of the loop and added an assert on the legality o... | Nadav Rotem | 2011-10-01 | 1 | -10/+10 |
| * | Revert r140463; The patch assumes that <4 x i1> is saved to memory as 4 x i8, | Nadav Rotem | 2011-09-27 | 1 | -10/+1 |
| * | [Vector-Select] Address one of the problems in 10902. | Nadav Rotem | 2011-09-24 | 1 | -1/+10 |
| * | Some legalization fixes for atomic load and store. | Eli Friedman | 2011-09-15 | 1 | -1/+1 |
| * | Split the init.trampoline intrinsic, which currently combines GCC's | Duncan Sands | 2011-09-06 | 1 | -1/+2 |
| * | Revert r131152, r129796, r129761. This code is currently considered | Dan Gohman | 2011-09-01 | 1 | -52/+43 |
