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path: root/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
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* Add a VT argument to getMinimalPhysRegClass and replace the copy related usesRafael Espindola2010-06-291-1/+1
* Use `llvm::next' instead of `next' to make VC++ 2010 happy.Oscar Fuentes2010-05-301-1/+1
* Fix some latency computation bugs: if the use is not a machine opcode do not ...Evan Cheng2010-05-281-1/+12
* Eliminate the use of PriorityQueue and just use a std::vector,Dan Gohman2010-05-261-7/+18
* Delete an unused function.Dan Gohman2010-05-261-2/+0
* Change push_all to a non-virtual function and implement it in theDan Gohman2010-05-261-5/+0
* Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.Evan Cheng2010-05-211-1/+1
* Allow targets more controls on what nodes are scheduled by reg pressure, what...Evan Cheng2010-05-201-2/+4
* Add a hybrid bottom up scheduler that reduce register usage while avoidingEvan Cheng2010-05-201-25/+92
* Three changes:Chris Lattner2010-04-071-5/+7
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-7/+7
* When the scheduler unfold a load folding instruction it move some of the pred...Evan Cheng2010-02-051-2/+10
* Remove the '-disable-scheduling' flag and replace it with the 'source' option ofBill Wendling2010-01-231-14/+56
* The previous code could potentially cause a cycle. Allow ordering w.r.t. a 0 ...Bill Wendling2010-01-061-2/+2
* Only check the ordering if there is an ordering for each nodes.Bill Wendling2010-01-061-2/+2
* Add a semi-primitive form of scheduling via the "SDNode ordering" to theBill Wendling2010-01-051-0/+12
* Change errs() to dbgs().David Greene2010-01-051-14/+14
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-3/+2
* The ScheduleDAG framework now requires an AliasAnalysis argument, thoughDan Gohman2009-10-091-1/+1
* Silence comparison always false warning in -Asserts mode.Reid Kleckner2009-09-301-4/+4
* Fix integer overflow in instruction scheduling. This can happen if we haveReid Kleckner2009-09-301-4/+5
* eliminate uses of cerr()Chris Lattner2009-08-231-4/+4
* remove a few DOUTs here and there.Chris Lattner2009-08-231-15/+16
* Split EVT into MVT and EVT, the former representing _just_ a primitive type, ...Owen Anderson2009-08-111-5/+5
* Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ...Owen Anderson2009-08-101-10/+10
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-2/+2
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-2/+3
* Instead of passing in an unsigned value for the optimization level, use an enum,Bill Wendling2009-04-291-2/+2
* Second attempt:Bill Wendling2009-04-291-2/+2
* r70270 isn't ready yet. Back this out. Sorry for the noise.Bill Wendling2009-04-281-2/+2
* Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want toBill Wendling2009-04-281-2/+2
* In the list-burr's pseudo two-addr dependency heuristics, don'tDan Gohman2009-04-161-0/+10
* Handle SUBREG_TO_REG instructions with the same heuristicsDan Gohman2009-04-161-5/+7
* Minor compile-time optimization; don't bother checkingDan Gohman2009-03-241-1/+1
* Add a pre-pass to the burr-list scheduler which makes adjustments toDan Gohman2009-03-241-0/+120
* When unfolding a load during scheduling, the new operator node hasDan Gohman2009-03-231-3/+6
* Fix canClobberPhysRegDefs to check all SDNodes grouped togetherDan Gohman2009-03-231-14/+19
* For inline asm output operand that matches an input. Encode the input operand...Evan Cheng2009-03-201-1/+1
* Fix a typo in a comment.Dan Gohman2009-03-121-1/+1
* Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodesDan Gohman2009-03-061-7/+7
* Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what...Evan Cheng2009-03-041-25/+54
* Oops. Last second clean up messed things up.Evan Cheng2009-02-121-2/+3
* Replace one of burr scheduling heuristic with something more sensible. Now ca...Evan Cheng2009-02-121-18/+4
* Fix a comment.Dan Gohman2009-02-111-2/+2
* Don't use special heuristics for nodes with no data predecessorsDan Gohman2009-02-111-8/+9
* Delete the heuristic for non-livein CopyFromReg nodes. Non-liveinnessDan Gohman2009-02-111-11/+0
* When scheduling a block in parts, keep track of the overallDan Gohman2009-02-111-4/+4
* Factor out more code for computing register live-range informationforDan Gohman2009-02-101-22/+42
* Fix PR3457: Ignore control successors when looking for closest scheduled succ...Evan Cheng2009-02-101-1/+1