aboutsummaryrefslogtreecommitdiffstats
path: root/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Commit message (Expand)AuthorAgeFilesLines
* Revert Christopher Lamb's load/store alignment changes.Reid Spencer2007-04-211-7/+5
* add support for alignment attributes on load/store instructionsChristopher Lamb2007-04-211-5/+7
* disable switch lowering using shift/and. It still breaks ppc bootstrap forChris Lattner2007-04-141-0/+1
* Fix PR1325: Case range optimization was performed in the case itAnton Korobeynikov2007-04-141-4/+2
* disable shift/and lowering to work around PR1325 for now.Chris Lattner2007-04-141-1/+3
* Fix PR1323 : we haven't updated phi nodes in good manner :)Anton Korobeynikov2007-04-131-0/+1
* the result of an inline asm copy can be an arbitrary VT that the registerChris Lattner2007-04-121-4/+21
* For PR1284:Reid Spencer2007-04-121-1/+6
* For PR1146:Reid Spencer2007-04-111-13/+13
* apparently some people commit without building the tree, or they forget toChris Lattner2007-04-101-1/+1
* No longer needed.Jeff Cohen2007-04-091-1/+0
* Use integer log for metric calculationAnton Korobeynikov2007-04-091-2/+2
* Unbreak VC++ build.Jeff Cohen2007-04-091-2/+3
* Next stage into switch lowering refactoringAnton Korobeynikov2007-04-091-19/+340
* For PR1146:Reid Spencer2007-04-091-13/+17
* implement CodeGen/X86/inline-asm-x-scalar.ll:test3Chris Lattner2007-04-091-2/+9
* Fix PR1316Chris Lattner2007-04-091-4/+4
* Fix for CodeGen/X86/2007-04-08-InlineAsmCrash.ll and PR1314Chris Lattner2007-04-081-1/+1
* minor comment fixChris Lattner2007-04-061-1/+1
* Change the bit_part_select (non)implementation from "return 0" to abort.Reid Spencer2007-04-051-3/+5
* Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic.Reid Spencer2007-04-041-0/+5
* Properly emit range comparisons for switch cases, where neighbour casesAnton Korobeynikov2007-04-041-71/+181
* For PR1297:Reid Spencer2007-04-011-24/+31
* move a bunch of code out of the sdisel pass into its own opt pass "codegenpre...Chris Lattner2007-03-311-483/+1
* Scale 1 is always ok.Evan Cheng2007-03-281-1/+1
* GEP index sinking fixes:Evan Cheng2007-03-281-40/+35
* Remove dead codeAnton Korobeynikov2007-03-271-82/+46
* Split big monster into small helpers. No functionality change.Anton Korobeynikov2007-03-271-190/+285
* SDISel does not preserve all, it changes CFG and other info.Evan Cheng2007-03-271-1/+0
* First step of switch lowering refactoring: perform worklist-drivenAnton Korobeynikov2007-03-251-176/+249
* Implement support for vector operands to inline asm, implementingChris Lattner2007-03-251-4/+16
* switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner2007-03-251-4/+4
* Change uses of Function::front to Function::getEntryBlock for readability.Dan Gohman2007-03-221-1/+1
* Minor bug.Evan Cheng2007-03-201-1/+2
* Use SmallSet instead of std::set.Evan Cheng2007-03-171-1/+1
* If sdisel has decided to sink GEP index expression into any BB. Replace all usesEvan Cheng2007-03-171-22/+37
* Turn on GEP index sinking by default.Evan Cheng2007-03-161-7/+0
* Stupid bug.Evan Cheng2007-03-161-1/+1
* Sink a binary expression into its use blocks if it is a loop invariantEvan Cheng2007-03-161-0/+92
* implement support for floating point constants used as inline asm memory oper...Chris Lattner2007-03-081-2/+7
* make this fail even in non-assert builds.Chris Lattner2007-03-081-2/+4
* Refactoring of formal parameter flags. Enable properly use ofAnton Korobeynikov2007-03-071-24/+27
* Enumerate SDISel formal parameter attributes. Make use of newAnton Korobeynikov2007-03-061-22/+24
* Unbreak VC++ build.Jeff Cohen2007-03-051-1/+1
* Lower eh filter intrinsic.Jim Laskey2007-03-011-1/+4
* MERGE_VALUES unnecessary.Jim Laskey2007-02-281-12/+4
* track signedness of formal argument, though we have a fixme here.Chris Lattner2007-02-261-0/+8
* Fix for PR1224.Jim Laskey2007-02-251-35/+50
* optimize duplicate ValueMap lookupsChris Lattner2007-02-251-9/+6
* Deal with cases when MMI is not requested.Jim Laskey2007-02-241-0/+14
generated by cgit v1.1 at 2025-01-13 12:06:36 +0000