| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Rename getExceptionAddressRegister() to getExceptionPointerRegister() for con... | Lang Hames | 2012-02-14 | 3 | -3/+3 |
| * | Don't reserve the R0 and R1 registers here. We don't use these registers, and | Bill Wendling | 2012-02-13 | 1 | -0/+6 |
| * | Add register mask support to ScheduleDAGRRList. | Jakob Stoklund Olesen | 2012-02-13 | 1 | -11/+49 |
| * | Fix a bug in DAGCombine for the optimization of BUILD_VECTOR. We cant generat... | Nadav Rotem | 2012-02-13 | 1 | -2/+6 |
| * | This patch addresses the problem of poor code generation for the zext | Nadav Rotem | 2012-02-12 | 1 | -14/+29 |
| * | Put instruction names into an indexed string table on the side, removing a po... | Benjamin Kramer | 2012-02-10 | 1 | -1/+1 |
| * | [unwind removal] Remove all of the code for the dead 'unwind' instruction. There | Bill Wendling | 2012-02-06 | 3 | -7/+0 |
| * | Add additional documentation to the extract-and-trunc dagcombine optimization. | Nadav Rotem | 2012-02-05 | 1 | -3/+8 |
| * | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-05 | 5 | -22/+20 |
| * | reapply the patches reverted in r149470 that reenable ConstantDataArray, | Chris Lattner | 2012-02-05 | 1 | -17/+15 |
| * | [fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too. | Chad Rosier | 2012-02-04 | 1 | -2/+2 |
| * | Handle all live physreg defs in the same place. | Jakob Stoklund Olesen | 2012-02-03 | 1 | -43/+46 |
| * | The type-legalizer often scalarizes code. One of the common patterns is extra... | Nadav Rotem | 2012-02-03 | 1 | -0/+34 |
| * | fix cmake | Andrew Trick | 2012-02-01 | 1 | -1/+1 |
| * | VLIW specific scheduler framework that utilizes deterministic finite automato... | Andrew Trick | 2012-02-01 | 4 | -1/+938 |
| * | SwitchInst refactoring. | Stepan Dyatkovskiy | 2012-02-01 | 2 | -9/+9 |
| * | Revert Chris' commits up to r149348 that started causing VMCoreTests unit tes... | Argyrios Kyrtzidis | 2012-02-01 | 1 | -10/+7 |
| * | remove the last vestiges of llvm::GetConstantStringInfo, in CodeGen. | Chris Lattner | 2012-01-31 | 1 | -7/+4 |
| * | rework this logic to not depend on the last argument to GetConstantStringInfo, | Chris Lattner | 2012-01-31 | 1 | -4/+10 |
| * | Remove the now-dead llvm.eh.exception and llvm.eh.selector intrinsics. | Bill Wendling | 2012-01-31 | 2 | -91/+0 |
| * | Remove the eh.exception and eh.selector intrinsics. Also remove a hack to copy | Bill Wendling | 2012-01-31 | 2 | -53/+0 |
| * | Use the correct ShiftAmtTy for creating shifts after legalization. PR11881. ... | Eli Friedman | 2012-01-31 | 1 | -7/+9 |
| * | continue making the world safe for ConstantDataVector. At this point, | Chris Lattner | 2012-01-27 | 1 | -1/+1 |
| * | eliminate the Constant::getVectorElements method. There are better (and | Chris Lattner | 2012-01-26 | 1 | -13/+4 |
| * | use ConstantVector::getSplat in a few places. | Chris Lattner | 2012-01-25 | 1 | -1/+1 |
| * | Use the right method to get the # elements in a CDS. | Chris Lattner | 2012-01-25 | 1 | -1/+1 |
| * | add more support for ConstantDataSequential | Chris Lattner | 2012-01-24 | 1 | -2/+19 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 6 | -21/+5 |
| * | Add a RegisterMaskSDNode class. | Jakob Stoklund Olesen | 2012-01-18 | 4 | -2/+22 |
| * | Fix a bug in the type-legalization of vector integers. When we bitcast one ve... | Nadav Rotem | 2012-01-18 | 1 | -2/+4 |
| * | Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstr... | Pete Cooper | 2012-01-18 | 1 | -7/+12 |
| * | Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT. | Nadav Rotem | 2012-01-17 | 1 | -4/+35 |
| * | Teach DAG combiner to turn a BUILD_VECTOR of UNDEFs into an UNDEF of vector t... | Craig Topper | 2012-01-17 | 1 | -4/+8 |
| * | Changed flag operand of ISD::FP_ROUND to TargetConstant as it should not get ... | Pete Cooper | 2012-01-17 | 1 | -2/+3 |
| * | Refactor variables unused under non-assert builds (& remove two entirely unus... | David Blaikie | 2012-01-16 | 1 | -2/+0 |
| * | Changed intrinsic ID operand to a target constant as its not used in any arit... | Pete Cooper | 2012-01-16 | 1 | -1/+1 |
| * | [AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits. | Nadav Rotem | 2012-01-15 | 1 | -5/+22 |
| * | Return an ArrayRef from ShuffleVectorSDNode::getMask and push it through Code... | Benjamin Kramer | 2012-01-15 | 1 | -7/+5 |
| * | DAGCombiner: Deduplicate code. | Benjamin Kramer | 2012-01-15 | 1 | -24/+14 |
| * | Truncate of undef is just undef of smaller size. | Craig Topper | 2012-01-15 | 1 | -5/+6 |
| * | DAGCombine's logic for forming pre- and post- indexed loads / stores were being | Evan Cheng | 2012-01-13 | 1 | -9/+44 |
| * | Added FPOW, FEXP, FLOG to PromoteNode so that custom actions can be set to Pr... | Pete Cooper | 2012-01-12 | 1 | -0/+18 |
| * | Allow targets to select source order pre-RA scheduler. | Evan Cheng | 2012-01-12 | 1 | -1/+2 |
| * | On AVX, we can load v8i32 at a time. The bug happens when two uneven loads ar... | Nadav Rotem | 2012-01-11 | 1 | -5/+23 |
| * | Teach the X86 instruction selection to do some heroic transforms to | Chandler Carruth | 2012-01-11 | 1 | -0/+23 |
| * | Add 'llvm_unreachable' to passify GCC's understanding of the constraints | Chandler Carruth | 2012-01-10 | 1 | -0/+1 |
| * | Remove unnecessary default cases in switches that cover all enum values. | David Blaikie | 2012-01-10 | 5 | -13/+0 |
| * | Fix a bug in the legalization of shuffle vectors. When we emulate shuffles us... | Nadav Rotem | 2012-01-10 | 1 | -1/+3 |
| * | Replace some uses of hasNUsesOfValue(0, X) with !hasAnyUseOfValue(X) | Craig Topper | 2012-01-07 | 1 | -4/+4 |
| * | Add some DAG combines for SUBC/SUBE. If nothing uses the carry/borrow out of ... | Craig Topper | 2012-01-07 | 1 | -2/+51 |
