aboutsummaryrefslogtreecommitdiffstats
path: root/lib/CodeGen/SelectionDAG
Commit message (Collapse)AuthorAgeFilesLines
* When isel is emitting instructions for an x86 target without CMOV, the CFG isJakob Stoklund Olesen2010-09-303-1/+24
| | | | | | | | | | | | | | | | | edited during emission. If the basic block ends in a switch that gets lowered to a jump table, any phis at the default edge were getting updated wrong. The jump table data structure keeps a pointer to the header blocks that wasn't getting updated after the MBB is split. This bug was exposed on 32-bit Linux when disabling critical edge splitting in codegen prepare. The fix is to uipdate stale MBB pointers whenever a block is split during emission. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115191 91177308-0d34-0410-b5e6-96231b3b80d8
* Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMPEvan Cheng2010-09-291-17/+17
| | | | | | | pipeline forwarding path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115098 91177308-0d34-0410-b5e6-96231b3b80d8
* Removed a bunch of unnecessary target_link_libraries.Oscar Fuentes2010-09-281-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114999 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't try to make a vector of x86mmx; this won't work,Dale Johannesen2010-09-271-2/+4
| | | | | | | | and asserts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114843 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.John Thompson2010-09-241-0/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114767 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of pop_macro warnings on MSVC.Michael J. Spencer2010-09-241-3/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114750 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 114634 for now since buildbot claim it broke Clang self-hosting. I ↵Evan Cheng2010-09-231-4/+6
| | | | | | doubt it but it's possible it's exposing another bug somewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114681 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix VS 2010 build.Oscar Fuentes2010-09-231-4/+4
| | | | | | Patch by Nathan Jeffords! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114661 91177308-0d34-0410-b5e6-96231b3b80d8
* Follow up to r114630. Do not optimize away unconditional branch following a ↵Evan Cheng2010-09-231-6/+4
| | | | | | conditional one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114634 91177308-0d34-0410-b5e6-96231b3b80d8
* SDISel should not optimize a unconditional branch following a conditional branchEvan Cheng2010-09-231-4/+5
| | | | | | | | | | | | | when the unconditional branch destination is the fallthrough block. The canonicalization makes it easier to allow optimizations on DAGs to invert conditional branches. The branch folding pass (and AnalyzeBranch) will clean up the unnecessary unconditional branches later. This is one of the patches leading up to disabling codegen prepare critical edge splitting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114630 91177308-0d34-0410-b5e6-96231b3b80d8
* A select between a constant and zero, when fed by a bit test, can be efficientlyOwen Anderson2010-09-221-0/+29
| | | | | | | | lowered using a series of shifts. Fixes <rdar://problem/8285015>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed pr20314-2.c failure, added E, F, p constraint letters.John Thompson2010-09-211-6/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114490 91177308-0d34-0410-b5e6-96231b3b80d8
* Rework passing parent pointers into complexpatterns, I forgotChris Lattner2010-09-211-27/+35
| | | | | | | | | | that complex patterns are matched after the entire pattern has a structural match, therefore the NodeStack isn't in a useful state when the actual call to the matcher happens. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114489 91177308-0d34-0410-b5e6-96231b3b80d8
* If only user of a vreg is an copy instruction to export copy of vreg out of ↵Devang Patel2010-09-211-0/+23
| | | | | | | | | | | current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. Testcase is in r114476. This fixes radar 8412415. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114478 91177308-0d34-0410-b5e6-96231b3b80d8
* correct this logic.Chris Lattner2010-09-211-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8
* Reimplement r114460 in target-independent DAGCombine rather than ↵Owen Anderson2010-09-211-0/+14
| | | | | | | | | | target-dependent, by using the predicate to discover the number of sign bits. Enhance X86's target lowering to provide a useful response to this query. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
* just like they can opt into getting the root of the pattern beingChris Lattner2010-09-211-1/+5
| | | | | | | | matched, allow ComplexPatterns to opt into getting the parent node of the operand being matched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8
* finish pushing MachinePointerInfo through selectiondags. At this point,Chris Lattner2010-09-212-16/+7
| | | | | | | | I think I've audited all uses, so it should be dependable for address spaces, and the pointer+offset info should also be accurate when there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114464 91177308-0d34-0410-b5e6-96231b3b80d8
* update a bunch of code to use the MachinePointerInfo version of getStore.Chris Lattner2010-09-215-34/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
* Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON loadBob Wilson2010-09-211-1/+2
| | | | | | | and store intrinsics are represented with MemIntrinsicSDNodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114454 91177308-0d34-0410-b5e6-96231b3b80d8
* eliminate an old SelectionDAG::getTruncStore method, propagatingChris Lattner2010-09-215-83/+63
| | | | | | | MachinePointerInfo around more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114452 91177308-0d34-0410-b5e6-96231b3b80d8
* eliminate last SelectionDAG::getLoad old entrypoint, on to stores.Chris Lattner2010-09-213-22/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114450 91177308-0d34-0410-b5e6-96231b3b80d8
* fix the code that infers SV info to be correct when dealingChris Lattner2010-09-211-28/+53
| | | | | | | with an indexed load/store that has an offset in the index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114449 91177308-0d34-0410-b5e6-96231b3b80d8
* propagate MachinePointerInfo through various uses of the oldChris Lattner2010-09-216-261/+245
| | | | | | | SelectionDAG::getExtLoad overload, and eliminate it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
* continue MachinePointerInfo'izing, eliminating use of one of the oldChris Lattner2010-09-218-192/+192
| | | | | | | getLoad overloads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114443 91177308-0d34-0410-b5e6-96231b3b80d8
* convert dagcombine off the old form of getLoad. This fixes several bugs Chris Lattner2010-09-211-16/+18
| | | | | | | with SVOffset computation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114442 91177308-0d34-0410-b5e6-96231b3b80d8
* simplify DAGCombiner::SimplifySelectOps step #2/2.Chris Lattner2010-09-211-55/+53
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114437 91177308-0d34-0410-b5e6-96231b3b80d8
* substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.Chris Lattner2010-09-211-85/+76
| | | | | | | no functionality change (step #1) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114436 91177308-0d34-0410-b5e6-96231b3b80d8
* a few more trivial updates. This fixes PerformInsertVectorEltInMemory to notChris Lattner2010-09-212-15/+13
| | | | | | | | pass a completely incorrect SrcValue, which would result in a miscompile with combiner-aa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114411 91177308-0d34-0410-b5e6-96231b3b80d8
* reimplement memcpy/memmove/memset lowering to use MachinePointerInfoChris Lattner2010-09-212-29/+54
| | | | | | | | instead of srcvalue/offset pairs. This corrects SV info for mem operations whose size is > 32-bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114401 91177308-0d34-0410-b5e6-96231b3b80d8
* add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take aChris Lattner2010-09-211-18/+47
| | | | | | | | MachinePointerInfo. Among other virtues, this doesn't silently truncate the svoffset to 32-bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114399 91177308-0d34-0410-b5e6-96231b3b80d8
* simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a ↵Chris Lattner2010-09-212-6/+6
| | | | | | MachinePointerInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114397 91177308-0d34-0410-b5e6-96231b3b80d8
* chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,Chris Lattner2010-09-212-12/+4
| | | | | | | eliminating some weird "infer a frame address" logic which was dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114396 91177308-0d34-0410-b5e6-96231b3b80d8
* don't implicitly drop the offset of a machinememoperand when legalizing atomics.Chris Lattner2010-09-211-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114395 91177308-0d34-0410-b5e6-96231b3b80d8
* force clients of MachineFunction::getMachineMemOperand to provide aChris Lattner2010-09-211-7/+8
| | | | | | | | MachinePointerInfo, propagating the type out a level of API. Remove the old MachineFunction::getMachineMemOperand impl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114393 91177308-0d34-0410-b5e6-96231b3b80d8
* When TCO is turned on, it is possible to end up with aliasing FrameIndex's. ↵Owen Anderson2010-09-201-2/+13
| | | | | | | | | | | | | Therefore, CombinerAA cannot assume that different FrameIndex's never alias, but can instead use MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing. This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll when CombinerAA is enabled, modulo a different register allocation sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r114312 while I sort out some issues.Owen Anderson2010-09-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8
* Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,Owen Anderson2010-09-191-1/+1
| | | | | | | | r114268 fixed the last of the blockers to enabling it. I will be monitoring for failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8
* Invert the logic of reachesChainWithoutSideEffects(). What we want to check ↵Owen Anderson2010-09-181-7/+7
| | | | | | | | | | | is that there is NO path to the destination containing side effects, not that SOME path contains no side effects. In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little to no branching, so "any" is effectively equivalent to "all". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
* Check bb to ensure that alloca is in separate basic block.Devang Patel2010-09-151-7/+9
| | | | | | | This fixes funcargs.exp regression reported by gdb testsuite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113992 91177308-0d34-0410-b5e6-96231b3b80d8
* If dbg.declare from non-entry block is using alloca from entry block then ↵Devang Patel2010-09-151-2/+14
| | | | | | use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113967 91177308-0d34-0410-b5e6-96231b3b80d8
* Use frame index, if available for byval argument while lowering dbg_declare. ↵Devang Patel2010-09-141-16/+20
| | | | | | Otherwise let getRegForValue() find register for this argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113843 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."Michael J. Spencer2010-09-131-7/+1
| | | | | | | | | | This reverts commit r113632 Conflicts: cmake/modules/AddLLVM.cmake git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113819 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence more warnings. Two more unused variables.Eric Christopher2010-09-131-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113771 91177308-0d34-0410-b5e6-96231b3b80d8
* Added skeleton for inline asm multiple alternative constraint support.John Thompson2010-09-132-45/+252
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113766 91177308-0d34-0410-b5e6-96231b3b80d8
* CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally.Michael J. Spencer2010-09-101-1/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113632 91177308-0d34-0410-b5e6-96231b3b80d8
* Add DEBUG message.Devang Patel2010-09-101-2/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113614 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach if-converter to be more careful with predicating instructions that wouldEvan Cheng2010-09-102-9/+8
| | | | | | | | | | | | take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
* implement rdar://6653118 - fastisel should fold loads where possible.Chris Lattner2010-09-051-1/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since mem2reg isn't run at -O0, we get a ton of reloads from the stack, for example, before, this code: int foo(int x, int y, int z) { return x+y+z; } used to compile into: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx movl 4(%rsp), %esi addl %edx, %esi movl (%rsp), %edx addl %esi, %edx movl %edx, %eax addq $12, %rsp ret Now we produce: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx addl 4(%rsp), %edx ## Folded load addl (%rsp), %edx ## Folded load movl %edx, %eax addq $12, %rsp ret Fewer instructions and less register use = faster compiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a missing check when legalizing a vector extending load. This doesn'tBob Wilson2010-09-031-3/+5
| | | | | | | | solve the root problem, but it corrects the bug in the code I added to support legalizing in the case where the non-extended type is also legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112997 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2025-10-21 15:19:52 +0000