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path: root/lib/CodeGen/TargetSchedule.cpp
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* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-6/+27
* IfConverter: Use TargetSchedule for instruction latenciesArnold Schwaighofer2013-09-301-2/+5
* Mark the x86 machine model as incomplete. PR17367.Andrew Trick2013-09-251-1/+2
* MI-Sched: handle ReadAdvance latencies as used by Swift.Andrew Trick2013-06-171-1/+4
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-151-44/+14
* MI-Sched cleanup. If an instruction has no valid sched class, do not attempt ...Andrew Trick2013-04-131-0/+2
* Change the default latency for implicit defs.Andrew Trick2013-03-161-1/+4
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-2/+2
* misched: TargetSchedule interface for machine resources.Andrew Trick2012-11-061-4/+35
* misched: Better handling of invalid latencies in the machine modelAndrew Trick2012-10-171-2/+10
* misched: Handle "transient" non-instructions.Andrew Trick2012-10-111-17/+23
* misched: fall-back to a target hook for instr bundles.Andrew Trick2012-10-101-3/+4
* misched: Use the TargetSchedModel interface wherever possible.Andrew Trick2012-10-101-0/+49
* misched: Add computeInstrLatency to TargetSchedModel.Andrew Trick2012-10-091-0/+24
* misched: Allow flags to disable hasInstrSchedModel/hasInstrItineraries for ex...Andrew Trick2012-10-091-6/+12
* Enable -schedmodel, but prefer itineraries until we have more benchmark data.Andrew Trick2012-10-041-52/+51
* TargetSchedule: cleanup computeOperandLatency logic & diagnostics.Andrew Trick2012-09-181-6/+16
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-181-0/+140
* Revert r164061-r164067. Most of the new subtarget emitter.Andrew Trick2012-09-171-140/+0
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-171-0/+140
* TargetSchedModel interface. To be implemented...Andrew Trick2012-09-141-0/+32