aboutsummaryrefslogtreecommitdiffstats
path: root/lib/CodeGen
Commit message (Expand)AuthorAgeFilesLines
...
* Add an ensureMaxAlignment() function to MachineFrameInfo (analogous toChad Rosier2012-06-192-3/+2
* Add DAG-combines for aggressive FMA formation.Lang Hames2012-06-191-0/+43
* 80 col.Jakob Stoklund Olesen2012-06-191-7/+13
* Implement PPCInstrInfo::isCoalescableExtInstr().Jakob Stoklund Olesen2012-06-191-3/+19
* Style: Don't reuse variables for multiple purposes.Jakob Stoklund Olesen2012-06-191-8/+7
* Move the support for using .init_array from ARM to the genericRafael Espindola2012-06-191-8/+40
* Allow up to 64 functional units per processor itinerary.Hal Finkel2012-06-182-7/+7
* Guard private fields that are unused in Release builds with #ifndef NDEBUG.Benjamin Kramer2012-06-162-1/+9
* Remove final verification in RABasic.Jakob Stoklund Olesen2012-06-151-20/+0
* Print out register number in InlineSpiller.Jakob Stoklund Olesen2012-06-151-2/+2
* Accept null PhysReg arguments to checkRegMaskInterference.Jakob Stoklund Olesen2012-06-152-2/+3
* Remove assignments which aren't used afterwards.Bill Wendling2012-06-151-3/+1
* Use regunit liveness in RegisterCoalescer when it is available.Jakob Stoklund Olesen2012-06-151-13/+21
* Make machine verifier check the first instruction of the last bundle instead ofAkira Hatanaka2012-06-141-8/+8
* Make comment slightly more helpful.Lang Hames2012-06-141-1/+1
* misched: disable SSA check pending PR13112.Andrew Trick2012-06-141-2/+4
* sched: fix latency of memory dependence chain edges for consistency.Andrew Trick2012-06-131-13/+21
* sched: Avoid trivially redundant DAG edges. Take the one with higher latency.Andrew Trick2012-06-131-3/+20
* misched: When querying RegisterPressureTracker, always save current and max p...Andrew Trick2012-06-111-2/+8
* misched: regpressure getMaxPressureDelta, revert accidental checkin.Andrew Trick2012-06-111-8/+2
* Allocate the contents of DwarfDebug's StringMaps in a single big BumpPtrAlloc...Benjamin Kramer2012-06-092-5/+6
* Register pressure: added getPressureAfterInstr.Andrew Trick2012-06-091-33/+80
* Sketch a LiveRegMatrix analysis pass.Jakob Stoklund Olesen2012-06-093-0/+296
* Also compute MBB live-in lists in the new rewriter pass.Jakob Stoklund Olesen2012-06-096-89/+32
* Reintroduce VirtRegRewriter.Jakob Stoklund Olesen2012-06-087-78/+121
* Start implementing pre-ra if-converter: using speculation and selects to elim...Evan Cheng2012-06-081-6/+15
* TargetInstrInfo hooks implemented in codegen should be declared pure virtual.Andrew Trick2012-06-081-13/+13
* Fix Target->Codegen dependence.Andrew Trick2012-06-081-0/+200
* Move terminator machine verification to check MachineBasicBlock::instr_iterat...Pete Cooper2012-06-071-11/+11
* Revert r157755.Manman Ren2012-06-061-1/+0
* Properly verify liveness with bundled machine instructions.Jakob Stoklund Olesen2012-06-061-13/+34
* Move RegisterClassInfo.h.Andrew Trick2012-06-0611-143/+11
* Move RegisterPressure.h.Andrew Trick2012-06-064-258/+3
* Round 2 of dead private variable removal.Benjamin Kramer2012-06-062-4/+1
* Remove unused private fields found by clang's new -Wunused-private-field.Benjamin Kramer2012-06-066-8/+5
* Remove dead debug option -disable-rematerialization.Jakob Stoklund Olesen2012-06-061-4/+0
* Stop leaking RegScavengers from TailDuplication.Benjamin Kramer2012-06-061-3/+4
* Move LiveUnionArray into LiveIntervalUnion.hJakob Stoklund Olesen2012-06-054-47/+54
* Don't print register names in LiveIntervalUnion::print().Jakob Stoklund Olesen2012-06-053-5/+2
* Suppress -Wunused-variable in -Asserts buildMatt Beaumont-Gay2012-06-051-0/+1
* Simplify LiveInterval::print().Jakob Stoklund Olesen2012-06-054-48/+19
* Add experimental support for register unit liveness.Jakob Stoklund Olesen2012-06-051-0/+130
* Implement LiveRangeCalc::extendToUses() and createDeadDefs().Jakob Stoklund Olesen2012-06-053-2/+103
* MachineInstr::eraseFromParent fix for removing bundled instrs.Andrew Trick2012-06-051-1/+2
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-054-99/+100
* Add a new intrinsic: llvm.fmuladd. This intrinsic represents a multiply-addLang Hames2012-06-051-0/+21
* misched: Added MultiIssueItineraries.Andrew Trick2012-06-052-5/+5
* sdsched: Use the right heuristics when -mcpu is not provided and we have no i...Andrew Trick2012-06-051-13/+12
* misched: Allow disabling scoreboard hazard checking for subtargets with aAndrew Trick2012-06-051-6/+12
* misched: comments from code review.Andrew Trick2012-06-051-3/+3
generated by cgit v1.1 at 2025-03-15 19:56:21 +0000