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| author | Andrew Trick <atrick@apple.com> | 2012-06-14 17:48:49 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-06-14 17:48:49 +0000 |
| commit | 42120a2c5546f0eca9fdedf860b6a222e279971a (patch) | |
| tree | 09ed9a93c05bb8dbe59a78e29e5489ee8cf7829f /lib/CodeGen | |
| parent | cba91230c0beef79e5042d8e983198b26aac5616 (diff) | |
| download | external_llvm-42120a2c5546f0eca9fdedf860b6a222e279971a.zip external_llvm-42120a2c5546f0eca9fdedf860b6a222e279971a.tar.gz external_llvm-42120a2c5546f0eca9fdedf860b6a222e279971a.tar.bz2 | |
misched: disable SSA check pending PR13112.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158461 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
| -rw-r--r-- | lib/CodeGen/ScheduleDAGInstrs.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp index 24b9cd0..110f478 100644 --- a/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -413,8 +413,10 @@ void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) { // SSA defs do not have output/anti dependencies. // The current operand is a def, so we have at least one. - if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end()) - return; + // + // FIXME: This optimization is disabled pending PR13112. + //if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end()) + // return; // Add output dependence to the next nearest def of this vreg. // |