| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Handle register masks in branch folding. | Jakob Stoklund Olesen | 2012-02-15 | 1 | -0/+8 |
| * | Fix library visibility problems with VLIWPacketizer. | Andrew Trick | 2012-02-15 | 1 | -6/+19 |
| * | Make LiveIntervals::handleMove() bundle aware. | Lang Hames | 2012-02-15 | 2 | -4/+16 |
| * | Use 'getDataNoRel' for the section kind. | Bill Wendling | 2012-02-15 | 1 | -5/+4 |
| * | Fix assertion condition. | Lang Hames | 2012-02-15 | 1 | -1/+1 |
| * | Modify the code that emits the module flags to use the new module flags accessor | Bill Wendling | 2012-02-15 | 2 | -38/+38 |
| * | Don't expose DefaultVLIWScheduler | Andrew Trick | 2012-02-15 | 1 | -1/+1 |
| * | Remove overly conservative assert. | Lang Hames | 2012-02-15 | 1 | -1/+0 |
| * | Generic "VLIW" packetizer based on a DFA generated from target itinerary. | Andrew Trick | 2012-02-15 | 1 | -0/+147 |
| * | Revert r150565 again. Appears to be a stage2 failure with dragonegg. | Andrew Trick | 2012-02-15 | 1 | -6/+8 |
| * | Reapply r150565 with the typo fix properly merged. | Andrew Trick | 2012-02-15 | 1 | -8/+6 |
| * | reverting r150565. Premature push. | Andrew Trick | 2012-02-15 | 1 | -6/+8 |
| * | Move PostRAMachineLICM into MachineLateOptimization. It now runs after PEI! | Andrew Trick | 2012-02-15 | 1 | -8/+6 |
| * | Allow CodeGen (llc) command line options to work as expected. | Andrew Trick | 2012-02-15 | 1 | -52/+114 |
| * | Added TargetPassConfig::disablePass/substitutePass as a general mechanism to ... | Andrew Trick | 2012-02-15 | 1 | -6/+42 |
| * | Don't emit live ranges for physregs live-ins that are dead. | Lang Hames | 2012-02-15 | 1 | -2/+3 |
| * | Disentangle moving a machine instr from updating LiveIntervals. | Lang Hames | 2012-02-15 | 2 | -13/+9 |
| * | Added hook to let targets custom lower splitting of illegal vectors | Pete Cooper | 2012-02-15 | 1 | -0/+4 |
| * | Fix global live range splitting regmask accuracy. | Jakob Stoklund Olesen | 2012-02-14 | 1 | -1/+2 |
| * | Fix details in local live range splitting with regmasks. | Jakob Stoklund Olesen | 2012-02-14 | 1 | -6/+16 |
| * | Handle regmasks in findRegisterDefOperandIdx(). | Jakob Stoklund Olesen | 2012-02-14 | 1 | -0/+4 |
| * | Use the proper clobber check in handleLiveInRegister(). | Jakob Stoklund Olesen | 2012-02-14 | 1 | -1/+1 |
| * | Dump live intervals in numerical order. | Jakob Stoklund Olesen | 2012-02-14 | 1 | -4/+15 |
| * | Don't create a new copy of reserved regs - we already have one handy. | Lang Hames | 2012-02-14 | 1 | -4/+2 |
| * | Add code to the target lowering object file module to handle module flags. | Bill Wendling | 2012-02-14 | 2 | -0/+64 |
| * | Update MachineVerifier to check the new physreg live-in rules. | Lang Hames | 2012-02-14 | 1 | -0/+22 |
| * | Tighten physical register invariants: Allocatable physical registers can | Lang Hames | 2012-02-14 | 1 | -9/+43 |
| * | Fix PR12000. Some vector operations may use scalar operands with types | Nadav Rotem | 2012-02-14 | 1 | -1/+5 |
| * | Turn push_back loops into append/insert. | Benjamin Kramer | 2012-02-14 | 1 | -4/+2 |
| * | Rename getExceptionAddressRegister() to getExceptionPointerRegister() for con... | Lang Hames | 2012-02-14 | 3 | -3/+3 |
| * | Use convenience function for consistency. | Lang Hames | 2012-02-14 | 1 | -2/+1 |
| * | Don't reserve the R0 and R1 registers here. We don't use these registers, and | Bill Wendling | 2012-02-13 | 1 | -0/+6 |
| * | Don't recalculate the size of the vector each time through the loop. | Bill Wendling | 2012-02-13 | 1 | -2/+2 |
| * | Add register mask support to ScheduleDAGRRList. | Jakob Stoklund Olesen | 2012-02-13 | 1 | -11/+49 |
| * | LiveIntervalAnalysis does not depend on MachineLoopInfo. | Andrew Trick | 2012-02-13 | 1 | -4/+2 |
| * | Check regmask interference for -join-physregs. | Jakob Stoklund Olesen | 2012-02-13 | 1 | -0/+8 |
| * | Fix a bug in DAGCombine for the optimization of BUILD_VECTOR. We cant generat... | Nadav Rotem | 2012-02-13 | 1 | -2/+6 |
| * | This patch addresses the problem of poor code generation for the zext | Nadav Rotem | 2012-02-12 | 1 | -14/+29 |
| * | Add support for implicit TLS model used with MS VC runtime. | Anton Korobeynikov | 2012-02-11 | 1 | -1/+10 |
| * | Add TargetPassConfig hooks for scheduling/bundling. | Andrew Trick | 2012-02-11 | 1 | -3/+41 |
| * | Allow Post-RA LICM to hoist reserved register reads. | Jakob Stoklund Olesen | 2012-02-11 | 1 | -0/+11 |
| * | Handle register masks in local live range splitting. | Jakob Stoklund Olesen | 2012-02-11 | 1 | -0/+25 |
| * | Don't read PreRegAlloc before it is initialized. | Jakob Stoklund Olesen | 2012-02-11 | 1 | -6/+6 |
| * | Add a static MachineOperand::clobbersPhysReg(). | Jakob Stoklund Olesen | 2012-02-10 | 1 | -7/+2 |
| * | Add register mask support to InterferenceCache. | Jakob Stoklund Olesen | 2012-02-10 | 3 | -5/+42 |
| * | Remove unused variable. | Jakob Stoklund Olesen | 2012-02-10 | 1 | -2/+1 |
| * | Put instruction names into an indexed string table on the side, removing a po... | Benjamin Kramer | 2012-02-10 | 2 | -2/+5 |
| * | comment grammar | Andrew Trick | 2012-02-10 | 1 | -1/+1 |
| * | RegAlloc superpass: includes phi elimination, coalescing, and scheduling. | Andrew Trick | 2012-02-10 | 12 | -101/+144 |
| * | whitespace | Andrew Trick | 2012-02-10 | 1 | -11/+11 |
