| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | InstrEmitter::EmitSubregNode() optimize extract_subreg in this case: | Evan Cheng | 2012-07-11 | 1 | -1/+2 |
| * | Rename many of the Tmp1, Tmp2, Tmp3 variables to names such as Chain, Value, ... | Nadav Rotem | 2012-07-11 | 1 | -100/+104 |
| * | Remove unused variable. | Benjamin Kramer | 2012-07-11 | 1 | -2/+0 |
| * | Refactor the DAG Legalizer by extracting the legalization of | Nadav Rotem | 2012-07-11 | 1 | -422/+434 |
| * | Only apply the SETCC+SITOFP -> SELECTCC optimization when the SETCC returns a... | Owen Anderson | 2012-07-11 | 1 | -1/+2 |
| * | Require and preserve LoopInfo for early if-conversion. | Jakob Stoklund Olesen | 2012-07-10 | 1 | -0/+17 |
| * | Teach the LiveInterval::join function to use the fast merge algorithm, | Chandler Carruth | 2012-07-10 | 1 | -14/+17 |
| * | Run early if-conversion in domtree post-order. | Jakob Stoklund Olesen | 2012-07-10 | 1 | -49/+60 |
| * | Fix a bug where I didn't test for an empty range before inspecting the | Chandler Carruth | 2012-07-10 | 1 | -1/+2 |
| * | Improve the loading of load-anyext vectors by allowing the codegen to load | Nadav Rotem | 2012-07-10 | 1 | -1/+1 |
| * | Add an efficient merge operation to LiveInterval and use it to avoid | Chandler Carruth | 2012-07-10 | 1 | -32/+132 |
| * | Teach LiveIntervals how to verify themselves and start using it in some | Chandler Carruth | 2012-07-10 | 1 | -0/+33 |
| * | indentation | Andrew Trick | 2012-07-09 | 1 | -1/+1 |
| * | Teach the DAG combiner to turn sitofp/uitofp from i1 into a conditional move,... | Owen Anderson | 2012-07-09 | 1 | -0/+36 |
| * | I'm introducing a new machine model to simultaneously allow simple | Andrew Trick | 2012-07-07 | 4 | -6/+9 |
| * | Whitespace. | Chad Rosier | 2012-07-06 | 1 | -3/+3 |
| * | [fast-isel] Tell fast-isel to do nothing with the new donothing intrinsic. | Chad Rosier | 2012-07-06 | 1 | -0/+3 |
| * | Fix PR13202 and a regtest. | Alexey Samsonov | 2012-07-06 | 1 | -0/+6 |
| * | Add some comments suggested in code review. | Jakob Stoklund Olesen | 2012-07-06 | 1 | -0/+7 |
| * | Optimize extendIntervalEndTo a tiny bit by saving one call through the | Chandler Carruth | 2012-07-05 | 1 | -7/+7 |
| * | Finish fixing the MachineOperand hashing, providing a nice modern | Chandler Carruth | 2012-07-05 | 1 | -47/+47 |
| * | All cases are covered, no need for a default. This deals with the | Duncan Sands | 2012-07-05 | 1 | -1/+0 |
| * | The hash function for MI expressions, used by MachineCSE, is really | Chandler Carruth | 2012-07-05 | 1 | -3/+8 |
| * | Use the right kind of booleans: we were emitting 0/1 booleans, instead of 0/-1 | Duncan Sands | 2012-07-05 | 1 | -9/+17 |
| * | Remove ParentMap. You can just ask the domnode for its parent. No functionality | Nick Lewycky | 2012-07-05 | 1 | -11/+8 |
| * | Allow trailing physreg RegisterSDNode operands on non-variadic instructions. | Jakob Stoklund Olesen | 2012-07-04 | 3 | -14/+30 |
| * | Print SlotIndexes when available for -print-machineinstrs. | Jakob Stoklund Olesen | 2012-07-04 | 1 | -1/+2 |
| * | Allow multiple terminators to read virtual registers. | Jakob Stoklund Olesen | 2012-07-04 | 1 | -33/+29 |
| * | Make sure -print-machineinstrs applies to the first pass as well. | Jakob Stoklund Olesen | 2012-07-04 | 1 | -3/+3 |
| * | Reverted r156659, due to probable performance regressions, DenseMap should be... | Stepan Dyatkovskiy | 2012-07-04 | 1 | -8/+7 |
| * | Reduce some code duplication. | Eric Christopher | 2012-07-04 | 1 | -19/+4 |
| * | Fix some ascii art in a comment to not have trailing backslashes (inspiration | Matt Beaumont-Gay | 2012-07-04 | 1 | -5/+5 |
| * | Add an experimental early if-conversion pass, off by default. | Jakob Stoklund Olesen | 2012-07-04 | 4 | -0/+594 |
| * | Part of r159527. Splitted into series of patches and gone with fixed PR13256: | Stepan Dyatkovskiy | 2012-07-03 | 1 | -7/+8 |
| * | Revert "IntRange:" as it appears to be breaking self hosting. | Eric Christopher | 2012-07-02 | 1 | -8/+7 |
| * | All glory to address sanitizer. ;] | Chandler Carruth | 2012-07-02 | 1 | -2/+8 |
| * | Target option DisableJumpTables is a gross hack. Move it to TargetLowering in... | Evan Cheng | 2012-07-02 | 2 | -1/+2 |
| * | misched: allow NULL InstrItineraries. | Andrew Trick | 2012-07-02 | 1 | -0/+1 |
| * | Turn an assert into an error to make it a bit more friendly. | Eric Christopher | 2012-07-02 | 1 | -2/+9 |
| * | Extend TargetPassConfig to allow running only a subset of the normal passes. | Bob Wilson | 2012-07-02 | 2 | -8/+37 |
| * | Move assertion with TargetPassConfig's Initialized flag. | Bob Wilson | 2012-07-02 | 1 | -2/+2 |
| * | Consistently use AnalysisID types in TargetPassConfig. | Bob Wilson | 2012-07-02 | 1 | -61/+59 |
| * | Add all codegen passes to the PassManager via TargetPassConfig. | Bob Wilson | 2012-07-02 | 2 | -49/+54 |
| * | Added assertion in getVRegDef of MachineRegisterInfo to make sure the virtual | Manman Ren | 2012-07-02 | 2 | -5/+8 |
| * | Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary." | Andrew Trick | 2012-07-02 | 1 | -2/+2 |
| * | IntRange: | Stepan Dyatkovskiy | 2012-07-02 | 1 | -7/+8 |
| * | Now that RegistersDefinedFromSameValue handles one instruction being an | Rafael Espindola | 2012-07-01 | 1 | -14/+4 |
| * | Handle implicit_defs in the register coalescer. I am still trying to produce | Rafael Espindola | 2012-06-30 | 1 | -27/+40 |
| * | Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle Compare | Manman Ren | 2012-06-29 | 1 | -4/+5 |
| * | Clear kill flags in InstrEmitter::EmitSubregNode(). | Jakob Stoklund Olesen | 2012-06-29 | 1 | -0/+1 |
