| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | modify per review commentary | Dale Johannesen | 2007-04-23 | 1 | -2/+2 |
| * | make EmitAlignment work the way Chris says it should | Dale Johannesen | 2007-04-23 | 1 | -1/+3 |
| * | PR400 phase 2. Propagate attributed load/store information through DAGs. | Christopher Lamb | 2007-04-22 | 3 | -36/+112 |
| * | X86 TLS: Implement review feedback. | Lauro Ramos Venancio | 2007-04-21 | 1 | -1/+11 |
| * | Revert Christopher Lamb's load/store alignment changes. | Reid Spencer | 2007-04-21 | 3 | -79/+36 |
| * | add support for alignment attributes on load/store instructions | Christopher Lamb | 2007-04-21 | 3 | -36/+79 |
| * | Allow the lowering of ISD::GLOBAL_OFFSET_TABLE. | Lauro Ramos Venancio | 2007-04-20 | 1 | -1/+1 |
| * | Implement "general dynamic", "initial exec" and "local exec" TLS models for | Lauro Ramos Venancio | 2007-04-20 | 2 | -2/+22 |
| * | VarInfo::UsedBlocks is no longer used. Remove. | Evan Cheng | 2007-04-18 | 4 | -17/+2 |
| * | allow SRL to simplify its operands, as it doesn't demand all bits as input. | Chris Lattner | 2007-04-18 | 1 | -1/+7 |
| * | When replacing a node in SimplifyDemandedBits, if the old node used any | Chris Lattner | 2007-04-18 | 1 | -1/+8 |
| * | fix a pasto | Chris Lattner | 2007-04-18 | 1 | -1/+1 |
| * | Don't populate TryAgainList when coalescing only physical registers with virt... | Evan Cheng | 2007-04-18 | 1 | -6/+6 |
| * | Increment use count of new virtuals created during PHI elimination. | Evan Cheng | 2007-04-18 | 1 | -0/+3 |
| * | Fix a bug in my previous patch, grabbing the shift amount width from the | Chris Lattner | 2007-04-17 | 1 | -2/+2 |
| * | Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. | Chris Lattner | 2007-04-17 | 1 | -5/+52 |
| * | Copy coalescing change to prevent a physical register from being pin to a | Evan Cheng | 2007-04-17 | 2 | -86/+98 |
| * | Add a register allocation preference field; add a method to compute size of a... | Evan Cheng | 2007-04-17 | 1 | -0/+9 |
| * | Keep track of number of uses within the function per virtual register. | Evan Cheng | 2007-04-17 | 1 | -0/+1 |
| * | SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits | Chris Lattner | 2007-04-17 | 1 | -1/+6 |
| * | Fix problems in the PartSet lowering having to do with incorrect bit width. | Reid Spencer | 2007-04-16 | 1 | -3/+5 |
| * | Removed tabs everywhere except autogenerated & external files. Add make | Anton Korobeynikov | 2007-04-16 | 4 | -47/+47 |
| * | disable switch lowering using shift/and. It still breaks ppc bootstrap for | Chris Lattner | 2007-04-14 | 1 | -0/+1 |
| * | Fix PR1325: Case range optimization was performed in the case it | Anton Korobeynikov | 2007-04-14 | 1 | -4/+2 |
| * | disable shift/and lowering to work around PR1325 for now. | Chris Lattner | 2007-04-14 | 1 | -1/+3 |
| * | Fix PR1323 : we haven't updated phi nodes in good manner :) | Anton Korobeynikov | 2007-04-13 | 1 | -0/+1 |
| * | Make sure intrinsics that are lowered to functions make the function weak | Reid Spencer | 2007-04-12 | 1 | -2/+2 |
| * | Fix bugs in generated code for part_select and part_set so that llc doesn't | Reid Spencer | 2007-04-12 | 1 | -35/+44 |
| * | Fix a bug in PartSet. The replacement value needs to be zext or trunc to | Reid Spencer | 2007-04-12 | 1 | -3/+7 |
| * | the result of an inline asm copy can be an arbitrary VT that the register | Chris Lattner | 2007-04-12 | 1 | -4/+21 |
| * | fold noop vbitconvert instructions | Chris Lattner | 2007-04-12 | 1 | -0/+9 |
| * | Fix weirdness handling single element vectors. | Chris Lattner | 2007-04-12 | 1 | -5/+2 |
| * | For PR1284: | Reid Spencer | 2007-04-12 | 2 | -12/+199 |
| * | fix an infinite loop compiling ldecod, notice by JeffC. | Chris Lattner | 2007-04-11 | 1 | -1/+1 |
| * | Fix this harder. | Chris Lattner | 2007-04-11 | 1 | -12/+19 |
| * | don't create shifts by zero, fix some problems with my previous patch | Chris Lattner | 2007-04-11 | 1 | -3/+7 |
| * | Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often | Chris Lattner | 2007-04-11 | 1 | -0/+29 |
| * | Codegen integer abs more efficiently using the trick from the PPC CWG. This | Chris Lattner | 2007-04-11 | 1 | -4/+18 |
| * | For PR1146: | Reid Spencer | 2007-04-11 | 1 | -13/+13 |
| * | apparently some people commit without building the tree, or they forget to | Chris Lattner | 2007-04-10 | 2 | -2/+2 |
| * | No longer needed. | Jeff Cohen | 2007-04-09 | 1 | -1/+0 |
| * | remove dead target hooks. | Chris Lattner | 2007-04-09 | 1 | -19/+0 |
| * | remove some dead target hooks, subsumed by isLegalAddressingMode | Chris Lattner | 2007-04-09 | 1 | -17/+0 |
| * | Use integer log for metric calculation | Anton Korobeynikov | 2007-04-09 | 1 | -2/+2 |
| * | Unbreak VC++ build. | Jeff Cohen | 2007-04-09 | 1 | -2/+3 |
| * | Next stage into switch lowering refactoring | Anton Korobeynikov | 2007-04-09 | 1 | -19/+340 |
| * | For PR1146: | Reid Spencer | 2007-04-09 | 1 | -13/+17 |
| * | implement CodeGen/X86/inline-asm-x-scalar.ll:test3 | Chris Lattner | 2007-04-09 | 1 | -2/+9 |
| * | add some assertions | Chris Lattner | 2007-04-09 | 1 | -0/+13 |
| * | Fix a bug introduced with my previous patch, where it didn't correctly handle | Chris Lattner | 2007-04-09 | 1 | -7/+9 |
