| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier | Evan Cheng | 2011-03-31 | 1 | -3/+10 |
| * | Add Neon VCVT instructions for f32 <-> f16 conversions. | Bob Wilson | 2010-12-15 | 1 | -1/+2 |
| * | Code clean up. | Evan Cheng | 2010-12-05 | 1 | -6/+6 |
| * | Making use of VFP / NEON floating point multiply-accumulate / subtraction is | Evan Cheng | 2010-12-05 | 1 | -13/+13 |
| * | Add some missing isel predicates on def : pat patterns to avoid generating VF... | Evan Cheng | 2010-11-12 | 1 | -1/+2 |
| * | Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten... | Evan Cheng | 2010-11-03 | 1 | -0/+3 |
| * | PR8359: The ARM backend may end up allocating registers D16 to D31 when | Bob Wilson | 2010-10-12 | 1 | -0/+2 |
| * | Nuke it from orbit. It's the only way to be sure. | Jim Grosbach | 2010-09-30 | 1 | -0/+14 |
| * | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng | 2010-09-10 | 1 | -3/+12 |
| * | 80 column cleanup. | Jim Grosbach | 2010-08-17 | 1 | -3/+3 |
| * | fix emacs language spec's, patch by Edmund Grimley-Evans! | Chris Lattner | 2010-08-17 | 1 | -1/+1 |
| * | cortex m4 has floating point support, but only single precision. | Jim Grosbach | 2010-08-11 | 1 | -1/+3 |
| * | Report error if codegen tries to instantiate a ARM target when the cpu does s... | Evan Cheng | 2010-08-11 | 1 | -2/+5 |
| * | ArchV7M implies HW division instructions. | Evan Cheng | 2010-08-11 | 1 | -3/+3 |
| * | ArchV6T2, V7A, and V7M implies Thumb2; Archv7A implies NEON. | Evan Cheng | 2010-08-11 | 1 | -11/+10 |
| * | Add ARM Archv6M and let it implies FeatureDB (having dmb, etc.) | Evan Cheng | 2010-08-11 | 1 | -31/+35 |
| * | Add Cortex-M0 support. It's a ARMv6m device (no ARM mode) with some 32-bit | Evan Cheng | 2010-08-11 | 1 | -0/+5 |
| * | - Add subtarget feature -mattr=+db which determine whether an ARM cpu has the | Evan Cheng | 2010-08-11 | 1 | -4/+10 |
| * | Change -prefer-32bit-thumb to attribute -mattr=+32bit instead to disable more... | Evan Cheng | 2010-08-09 | 1 | -0/+3 |
| * | Add an ARM "feature". Cortex-a8 fp comparison is very slow (> 20 cycles). | Evan Cheng | 2010-07-13 | 1 | -1/+3 |
| * | Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/pack | Jim Grosbach | 2010-05-05 | 1 | -3/+8 |
| * | Add initial support for ARMv7M subtarget and cortex-m3 cpu. Patch by | Jim Grosbach | 2010-05-05 | 1 | -0/+3 |
| * | Some bits of A9 scheduling: VFP | Anton Korobeynikov | 2010-04-07 | 1 | -1/+2 |
| * | Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. | Jakob Stoklund Olesen | 2010-04-05 | 1 | -17/+1 |
| * | vml[as] are slow on 1136jf-s also. | Jim Grosbach | 2010-04-01 | 1 | -1/+2 |
| * | switch the flag for using NEON for SP floating point to a subtarget 'feature'. | Jim Grosbach | 2010-03-25 | 1 | -3/+10 |
| * | need to fix 'make check' tests first. revert for a moment. | Jim Grosbach | 2010-03-25 | 1 | -10/+3 |
| * | switch the flag for using NEON for SP floating point to a subtarget 'feature' | Jim Grosbach | 2010-03-25 | 1 | -3/+10 |
| * | switch the use-vml[as] instructions flag to a subtarget 'feature' | Jim Grosbach | 2010-03-25 | 1 | -1/+10 |
| * | Add substarget feature for FP16 | Anton Korobeynikov | 2010-03-14 | 1 | -0/+2 |
| * | Add ARMv6 itineraries. | David Goodwin | 2009-11-18 | 1 | -8/+10 |
| * | Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,... | Anton Korobeynikov | 2009-11-02 | 1 | -2/+6 |
| * | Remove neonfp attribute and instead set default based on CPU string. Add -arm... | David Goodwin | 2009-10-01 | 1 | -4/+1 |
| * | Restore the -post-RA-scheduler flag as an override for the target specificati... | David Goodwin | 2009-10-01 | 1 | -5/+1 |
| * | Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post... | David Goodwin | 2009-09-30 | 1 | -1/+5 |
| * | Checkpoint NEON scheduling itineraries. | David Goodwin | 2009-09-23 | 1 | -18/+9 |
| * | Allow a zero cycle stage to reserve/require a FU without advancing the cycle ... | David Goodwin | 2009-08-11 | 1 | -1/+1 |
| * | Make NEON single-precision FP support the default for cortex-a8 (again). | David Goodwin | 2009-08-07 | 1 | -1/+1 |
| * | Disable NEON single-precision FP support for Cortex-A8, for now... | David Goodwin | 2009-08-05 | 1 | -1/+1 |
| * | By default, for cortex-a8 use NEON for single-precision FP. | David Goodwin | 2009-08-05 | 1 | -4/+4 |
| * | Initial support for single-precision FP using NEON. Added "neonfp" attribute ... | David Goodwin | 2009-08-04 | 1 | -0/+3 |
| * | Add fake v7 itineraries for now. | Evan Cheng | 2009-07-21 | 1 | -4/+6 |
| * | Add a Thumb2 instruction flag to that indicates whether the instruction can b... | Evan Cheng | 2009-07-08 | 1 | -3/+3 |
| * | Latency information for ARM v6. It's rough and not yet hooked up. Right now ... | Evan Cheng | 2009-06-19 | 1 | -42/+52 |
| * | Separate V6 from V6T2 since the latter has some extra nice instructions | Anton Korobeynikov | 2009-06-08 | 1 | -2/+6 |
| * | Add placeholder for thumb2 stuff | Anton Korobeynikov | 2009-05-29 | 1 | -5/+10 |
| * | Add ARMv7 architecture, Cortex processors and different FPU modes handling. | Anton Korobeynikov | 2009-05-23 | 1 | -1/+10 |
| * | Use CallConvLower.h and TableGen descriptions of the calling conventions | Bob Wilson | 2009-04-17 | 1 | -0/+2 |
| * | Move target independent td files from lib/Target/ to include/llvm/Target so t... | Evan Cheng | 2008-11-24 | 1 | -1/+1 |
| * | Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 enc... | Evan Cheng | 2008-11-06 | 1 | -3/+1 |
