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path: root/lib/Target/ARM/ARMAsmBackend.cpp
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* Sink ARM mc routines into MCTargetDesc.Evan Cheng2011-07-231-516/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135825 91177308-0d34-0410-b5e6-96231b3b80d8
* Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ↵Evan Cheng2011-07-201-1/+1
| | | | | | ARM MC code from target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM movw/movt fixups need to mask the high bits.Jim Grosbach2011-06-241-3/+6
| | | | | | | | | | The fixup value comes in as the whole 32-bit value, so for the lo16 fixup, the upper bits need to be masked off. Previously we assumed the masking had already been done and asserted. rdar://9635991 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133818 91177308-0d34-0410-b5e6-96231b3b80d8
* Move ARMMachObjectWriter to its own file.Jim Grosbach2011-06-221-14/+3
| | | | | | | Just tidy up a bit. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133638 91177308-0d34-0410-b5e6-96231b3b80d8
* Also recognize ARM v4t and v5e variants.Evan Cheng2011-06-141-1/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133002 91177308-0d34-0410-b5e6-96231b3b80d8
* This actually starts at offset 0, not 1.Eric Christopher2011-05-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132246 91177308-0d34-0410-b5e6-96231b3b80d8
* fixes target address tBL and tBLX and sets relocation typeRafael Espindola2011-05-201-2/+2
| | | | | | | | of tBL/tBLX to R_ARM_THM_CALL (ARM ELF 4.7.1.6) Patch by koan-sin tan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131748 91177308-0d34-0410-b5e6-96231b3b80d8
* This fixes one divergence between LLVM and binutils for ARM in theJason W Kim2011-05-191-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | text section. Assume the following bit of annotated assembly: .section .data.rel.ro,"aw",%progbits .align 2 .LAlpha: .long startval(GOTOFF) .text .align 2 .type main,%function .align 4 main: ;;; assume "main" starts at offset 0x20 0x0 push {r11, lr} 0x4 movw r0, :lower16:(.LAlpha-(.LBeta+8)) ;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8) ;;; ==> (??? - ((16-4) + 8) = -20 0x8 movt r0, :upper16:(.LAlpha-(.LBeta+8)) ;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8) ;;; ==> (??? - ((16-8) + 8) = -16 0xc ... blah .LBeta: 0x10 add r0, pc, r0 0x14 ... blah .LGamma: 0x18 add r1, pc, r1 Above snippet results in the following relocs in the .o file for the first pair of movw/movt instructions 00000024 R_ARM_MOVW_PREL_NC .LAlpha 00000028 R_ARM_MOVT_PREL .LAlpha And the encoded instructions in the .o file for main: must be 00000020 <main>: 20: e92d4800 push {fp, lr} 24: e30f0fec movw r0, #65516 ; 0xffec i.e. -20 28: e34f0ff0 movt r0, #65520 ; 0xfff0 i.e. -16 However, llc (prior to this commit) generates the following sequence 00000020 <main>: 20: e92d4800 push {fp, lr} 24: e30f0fec movw r0, #65516 ; 0xffec - i.e. -20 28: e34f0fff movt r0, #65535 ; 0xffff - i.e. -1 What has to happen in the ArmAsmBackend is that if the relocation is PC relative, the 16 bits encoded as part of movw and movt must be both addends, not addresses. It makes sense to encode addresses by right shifting the value by 16, but the result is incorrect for PIC. i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case. This change agrees with what GNU as does, and makes the PIC code run. MC/ARM/elf-movt.s covers this case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131674 91177308-0d34-0410-b5e6-96231b3b80d8
* First cut at getting debugging support for ARM/MC/ELF/.oJason W Kim2011-05-101-1/+0
| | | | | | | | | | DWARF stuff also gets fixed up by ELFARMAsmBackend::ApplyFixup(), but the offset is not guaranteed to be mod 4 == 0 as in text/data. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131137 91177308-0d34-0410-b5e6-96231b3b80d8
* ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows()Daniel Dunbar2011-04-191-8/+6
| | | | | | predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129816 91177308-0d34-0410-b5e6-96231b3b80d8
* When the architecture is explicitly armv6 or thumbv6, we need to mark the ↵Owen Anderson2011-04-011-9/+15
| | | | | | object file appropriately. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128739 91177308-0d34-0410-b5e6-96231b3b80d8
* The high bit of a Thumb2 ADR's offset is stored in bit 26, not bit 25.Owen Anderson2011-03-231-1/+1
| | | | | | | This fixes 464.h264ref with the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128172 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps.Jason W Kim2011-02-041-3/+6
| | | | | | | | | | | | | | | | | | | (yes, this is different from R_ARM_CALL) - Adds a new method getARMBranchTargetOpValue() which handles the necessary distinction between the conditional and unconditional br/bl needed for ARM/ELF At least for ARM mode, the needed fixup for conditional versus unconditional br/bl is identical, but the ARM docs and existing ARM tools expect this reloc type... Added a few FIXME's for future naming fixups in ARMInstrInfo.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124895 91177308-0d34-0410-b5e6-96231b3b80d8
* Completed :lower16: / :upper16: support for movw / movt pairs on Darwin.Evan Cheng2011-01-141-5/+40
| | | | | | | | | - Fixed :upper16: fix up routine. It should be shifting down the top 16 bits first. - Added support for Thumb2 :lower16: and :upper16: fix up. - Added :upper16: and :lower16: relocation support to mach-o object writer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123424 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. Support ELF pcrel relocations for movw/movt:Jason W Kim2011-01-121-1/+5
| | | | | | | | | | | R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC. 2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum. 3. Add support for 3 new elf section types (no-ops) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123294 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the MCObjectFormat class.Rafael Espindola2010-12-181-12/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122147 91177308-0d34-0410-b5e6-96231b3b80d8
* Move some data to the TargetWriter.Rafael Espindola2010-12-181-6/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122134 91177308-0d34-0410-b5e6-96231b3b80d8
* If The ARM WriteNopData() gets an unaligned byte count to pad out, fill in withJim Grosbach2010-12-171-5/+13
| | | | | | a partial value. rdar://8782954 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122078 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle 2 and 4 byte data blob fixup values for ARM.Jim Grosbach2010-12-171-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122075 91177308-0d34-0410-b5e6-96231b3b80d8
* Stub out explicit MCELFObjectTargetWriter interface.Rafael Espindola2010-12-171-1/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122067 91177308-0d34-0410-b5e6-96231b3b80d8
* Move createELFObjectWriter to its own header.Rafael Espindola2010-12-171-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122064 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/ARM: Use aggressive symbol folding (important for jump tables, for example).Daniel Dunbar2010-12-171-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122044 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Target: Remove HasScatteredSymbols target hook variable, which has beenDaniel Dunbar2010-12-171-6/+2
| | | | | | superceded and was effectively dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122024 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Mach-O: Lift some MachObjectWriter arguments into the target specificDaniel Dunbar2010-12-161-4/+9
| | | | | | interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121981 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Mach-O: Stub out explicit MCMachObjectTargetWriter interface.Daniel Dunbar2010-12-161-1/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121973 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Mach-O: Move createMachObjectWriter into MCMachObjectWriter.h.Daniel Dunbar2010-12-161-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121971 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Move target specific fixup info descriptors to TargetAsmBackend instead ofDaniel Dunbar2010-12-161-0/+40
| | | | | | | the MCCodeEmitter, which seems like a better organization. - Also, cleaned up some magic constants while in the area. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121953 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove fixup_arm_thumb_ldst. The code was never calling the "fixup" stuff forBill Wendling2010-12-161-4/+0
| | | | | | | it. I.e., it was always an immediate value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121932 91177308-0d34-0410-b5e6-96231b3b80d8
* Add fixups for Thumb LDR/STR instructions.Bill Wendling2010-12-151-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121858 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755Jim Grosbach2010-12-141-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121798 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions.Owen Anderson2010-12-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121784 91177308-0d34-0410-b5e6-96231b3b80d8
* Trailing whitespaceJim Grosbach2010-12-141-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121769 91177308-0d34-0410-b5e6-96231b3b80d8
* Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ↵Owen Anderson2010-12-141-0/+20
| | | | | | | | | much later, which makes the entire process cleaner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121735 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r121721, which broke buildbots.Owen Anderson2010-12-131-20/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121726 91177308-0d34-0410-b5e6-96231b3b80d8
* Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. ↵Owen Anderson2010-12-131-0/+20
| | | | | | | | | Provide correct fixups for Thumb2 ADR, which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121721 91177308-0d34-0410-b5e6-96231b3b80d8
* In Thumb2, direct branches can be encoded as either a "short" conditional ↵Owen Anderson2010-12-131-2/+24
| | | | | | | | | | | branch with a null predicate, or as a "long" direct branch. While the mnemonics are the same, they encode the branch offset differently, and the Darwin assembler appears to prefer the "long" form for direct branches. Thus, in the name of bitwise equivalence, provide encoding and fixup support for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121710 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 32-bit types for 32-bit values.Jim Grosbach2010-12-131-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121709 91177308-0d34-0410-b5e6-96231b3b80d8
* Trailing whitespace.Jim Grosbach2010-12-131-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121708 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to get Thumb2 branch fixups working properly.Owen Anderson2010-12-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121593 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixups for Thumb2 vldr's need to have the effective PC aligned as well.Owen Anderson2010-12-101-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121587 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb unconditional branch binary encoding. rdar://8754994Jim Grosbach2010-12-101-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121496 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb conditional branch binary encodings. rdar://8745367Jim Grosbach2010-12-101-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121493 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 ↵Owen Anderson2010-12-091-1/+2
| | | | | | | | | branches. This is still not perfect, but it gets many more of them correct than it did previously. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121414 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an issue in some Thumb fixups, where the effective PC address needs to ↵Owen Anderson2010-12-091-2/+2
| | | | | | | | | | | be 4-byte aligned when calculating the offset. Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing this. It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic adjusted accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121408 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename CB/CBZ specific fixup accordingly.Jim Grosbach2010-12-091-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121404 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix Thumb2 fixups for ldr.Owen Anderson2010-12-091-4/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121350 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo in Thumb2 branch fixup.Owen Anderson2010-12-091-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121342 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to make the bit-twiddling readable resulted in the binary value beingBill Wendling2010-12-091-8/+10
| | | | | | | overwritten. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121337 91177308-0d34-0410-b5e6-96231b3b80d8
* The BLX instruction is encoded differently than the BL, because why not? InBill Wendling2010-12-091-4/+25
| | | | | | | | | | | particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0' always. Going through the BL fixup encoding was trashing the "bit 0 is '0'" invariant. Attempt to get the encoding at slightly more correct with this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121336 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix Thumb2 BCC encoding and fixups.Owen Anderson2010-12-091-0/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121329 91177308-0d34-0410-b5e6-96231b3b80d8
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