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lib
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Target
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ARM
/
ARMBaseInstrInfo.cpp
Commit message (
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Author
Age
Files
Lines
*
Remove the isMoveInstr() hook.
Jakob Stoklund Olesen
2010-07-16
1
-42
/
+0
*
Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
Bill Wendling
2010-07-16
1
-1
/
+1
*
RISC architectures get their memory operand folding for free.
Jakob Stoklund Olesen
2010-07-11
1
-217
/
+0
*
Replace copyRegToReg with copyPhysReg for ARM.
Jakob Stoklund Olesen
2010-07-11
1
-77
/
+36
*
Automatically fold COPY instructions into stack load/store.
Jakob Stoklund Olesen
2010-07-09
1
-1
/
+1
*
For big-endian systems, VLD2/VST2 with 32-bit vector elements will swap the
Bob Wilson
2010-07-08
1
-2
/
+2
*
Represent NEON load/store alignments in bytes, not bits.
Bob Wilson
2010-07-06
1
-6
/
+6
*
Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversion
Rafael Espindola
2010-07-06
1
-4
/
+6
*
Add a VT argument to getMinimalPhysRegClass and replace the copy related uses
Rafael Espindola
2010-06-29
1
-0
/
+5
*
Change if-conversion block size limit checks to add some flexibility.
Evan Cheng
2010-06-25
1
-0
/
+18
*
IT instructions are considered to be scheduling hazards, but are scheduled
Jim Grosbach
2010-06-25
1
-1
/
+13
*
We are missing opportunites to use ldm. Take code like this:
Bill Wendling
2010-06-23
1
-0
/
+101
*
Allow ARM if-converter to be run after post allocation scheduling.
Evan Cheng
2010-06-18
1
-0
/
+28
*
Rewrite chained if's as switches and replace assertions with llvm_unreachable
Bob Wilson
2010-06-18
1
-35
/
+55
*
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
Stuart Hastings
2010-06-17
1
-9
/
+7
*
Next round of tail call changes. Register used in a tail
Dale Johannesen
2010-06-15
1
-6
/
+7
*
VMOVQQ and VMOVQQQQ are pseudo instructions and not predicable.
Bob Wilson
2010-06-15
1
-1
/
+4
*
Reapply r105521, this time appending "LLU" to 64 bit
Bruno Cardoso Lopes
2010-06-08
1
-2
/
+2
*
revert r105521, which is breaking the buildbots with stuff like this:
Chris Lattner
2010-06-05
1
-2
/
+2
*
Initial AVX support for some instructions. No patterns matched
Bruno Cardoso Lopes
2010-06-05
1
-2
/
+2
*
Slightly change the meaning of the reMaterialize target hook when the original
Jakob Stoklund Olesen
2010-06-02
1
-10
/
+2
*
Clean up 80 column violations. No functional change.
Jim Grosbach
2010-06-02
1
-5
/
+5
*
Remove the TargetRegisterClass member from CalleeSavedInfo
Rafael Espindola
2010-06-02
1
-1
/
+2
*
Update the saved stack pointer in the sjlj function context following either
Jim Grosbach
2010-05-27
1
-2
/
+2
*
Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums
Jakob Stoklund Olesen
2010-05-24
1
-32
/
+32
*
Implement @llvm.returnaddress. rdar://8015977.
Evan Cheng
2010-05-22
1
-0
/
+37
*
Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.
Jim Grosbach
2010-05-22
1
-0
/
+4
*
Added a QQQQ register file to model 4-consecutive Q registers.
Evan Cheng
2010-05-14
1
-13
/
+41
*
Bring back VLD1q and VST1q and use them for reloading / spilling Q registers....
Evan Cheng
2010-05-13
1
-29
/
+69
*
Use VLD2q32 / VST2q32 to reload / spill QQ (pair of Q) registers when stack s...
Evan Cheng
2010-05-07
1
-5
/
+39
*
Use VSTMD / VLDMD for spills and reloads of Q registers instead of VSTMQ / VL...
Evan Cheng
2010-05-07
1
-9
/
+15
*
Remove VLD1q and VST1q for reloading and spilling Q registers. Just use VLD1q...
Evan Cheng
2010-05-07
1
-9
/
+23
*
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
Dan Gohman
2010-05-06
1
-4
/
+2
*
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
Evan Cheng
2010-05-06
1
-2
/
+4
*
Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coa...
Evan Cheng
2010-05-06
1
-16
/
+35
*
Revert r103157, which broke test/CodeGen/ARM/2009-11-30-LiveVariablesBug.ll.
Dan Gohman
2010-05-06
1
-4
/
+2
*
Revert r103156 since it was breaking the build bots.
Eric Christopher
2010-05-06
1
-31
/
+14
*
Fix an obvious bug in isMoveInstr. It needs to return sub-register indices.
Evan Cheng
2010-05-06
1
-2
/
+4
*
Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registe...
Evan Cheng
2010-05-06
1
-14
/
+31
*
Cosmetic changes.
Evan Cheng
2010-05-06
1
-7
/
+7
*
storeRegToStackSlot has forgotten about QPR_8 register class.
Evan Cheng
2010-05-06
1
-1
/
+2
*
Frame index can be negative.
Evan Cheng
2010-04-29
1
-1
/
+1
*
Add sizes non-floating point versions for the eh sjlj intrinsic expansions.
Jim Grosbach
2010-04-28
1
-1
/
+2
*
Add ARM specific emitFrameIndexDebugValue.
Evan Cheng
2010-04-26
1
-0
/
+10
*
Educate GetInstrSizeInBytes implementations that
Dale Johannesen
2010-04-07
1
-0
/
+1
*
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
Chris Lattner
2010-04-02
1
-4
/
+4
*
Teach AnalyzeBranch, RemoveBranch and the branch
Dale Johannesen
2010-04-02
1
-1
/
+14
*
Fix VLDMQ and VSTMQ instructions to use the correct encoding and address modes.
Bob Wilson
2010-03-23
1
-2
/
+6
*
Rename some instructions to match the corresponding NEON opcode.
Bob Wilson
2010-03-23
1
-2
/
+2
*
Change VST1 instructions for loading Q register values to operate on pairs
Bob Wilson
2010-03-23
1
-1
/
+1
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