index
:
external_llvm.git
replicant-6.0
Unnamed repository; edit this file 'description' to name the repository.
git repository hosting
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
lib
/
Target
/
ARM
/
ARMBaseRegisterInfo.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
Clean up 80 column violations. No functional change.
Jim Grosbach
2010-06-02
1
-2
/
+2
*
Rename canCombinedSubRegIndex method to something more grammatically correct
Bob Wilson
2010-06-02
1
-8
/
+9
*
Replace ARM's getCalleeSavedRegClasses with a simpler solution
Rafael Espindola
2010-06-02
1
-3
/
+0
*
Teach two-address pass to do some coalescing while eliminating REG_SEQUENCE
Evan Cheng
2010-05-14
1
-0
/
+9
*
Change the Value argument to eliminateFrameIndex to a type-tagged value. This
Jim Grosbach
2010-03-09
1
-1
/
+1
*
Updated version of r96634 (which was reverted due to failing 176.gcc and
Jim Grosbach
2010-02-22
1
-0
/
+1
*
Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in
Bob Wilson
2010-02-19
1
-1
/
+0
*
Radar 7636153. In the presence of large call frames, it's not sufficient
Jim Grosbach
2010-02-19
1
-0
/
+1
*
constify a method argument.
Chris Lattner
2010-01-26
1
-2
/
+2
*
For aligned load/store instructions, it's only required to know whether a
Jim Grosbach
2010-01-19
1
-0
/
+1
*
Generate more correct debug info for frame indices.
Jim Grosbach
2009-11-22
1
-0
/
+3
*
Make the MachineFunction argument of getFrameRegister const.
David Greene
2009-11-12
1
-1
/
+1
*
Infrastructure for dynamic stack realignment on ARM. For now, this is off by
Jim Grosbach
2009-10-27
1
-0
/
+2
*
Add ARM getMatchingSuperRegClass to handle S / D / Q cross regclass coalescing.
Evan Cheng
2009-10-25
1
-0
/
+7
*
Enable post-pass frame index register scavenging for ARM and Thumb2
Jim Grosbach
2009-10-20
1
-0
/
+2
*
Add register-reuse to frame-index register scavenging. When a target uses
Jim Grosbach
2009-10-07
1
-2
/
+3
*
Do not use frame register to reference fixed stack objects if the function is...
Evan Cheng
2009-08-15
1
-1
/
+1
*
Leaf functions which do not save CSRs can be frameless even with -disable-fp-...
Evan Cheng
2009-08-14
1
-0
/
+2
*
When fp is not eliminated, instructions with T2_i12 modes will be changed to ...
Evan Cheng
2009-07-30
1
-0
/
+2
*
Give getPointerRegClass() a "kind" value so that targets can
Chris Lattner
2009-07-29
1
-2
/
+2
*
- More refactoring. This gets rid of all of the getOpcode calls.
Evan Cheng
2009-07-28
1
-18
/
+2
*
Refactor. Get rid of a few more getOpcode() calls.
Evan Cheng
2009-07-26
1
-4
/
+16
*
Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...
David Goodwin
2009-07-24
1
-7
/
+4
*
Fix frame index elimination to correctly handle thumb-2 addressing modes that...
David Goodwin
2009-07-23
1
-0
/
+7
*
Get rid one of the getRegisterNumbering. Also add D16 - D31.
Evan Cheng
2009-07-22
1
-6
/
+4
*
Let callers decide the sub-register index on the def operand of rematerialize...
Evan Cheng
2009-07-16
1
-1
/
+2
*
80 col violation.
Evan Cheng
2009-07-10
1
-1
/
+2
*
Generalize opcode selection in ARMBaseRegisterInfo.
David Goodwin
2009-07-08
1
-1
/
+4
*
Push methods into base class in preparation for sharing.
David Goodwin
2009-07-08
1
-6
/
+33
*
Start breaking out common base functionality for register info.
David Goodwin
2009-07-08
1
-0
/
+113