| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Rename the narrow shift right immediate operands to "shr_imm*" operands. Also | Bill Wendling | 2011-03-07 | 1 | -3/+5 |
| * | PR8053: Fix encoding of S bit in some ARM instructions. | Bob Wilson | 2011-03-03 | 1 | -1/+1 |
| * | Narrow right shifts need to encode their immediates differently from a normal | Bill Wendling | 2011-03-01 | 1 | -0/+7 |
| * | Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps. | Jason W Kim | 2011-02-04 | 1 | -0/+2 |
| * | Add support for parsing and encoding ARM's official syntax for the BFI instru... | Bruno Cardoso Lopes | 2011-01-18 | 1 | -0/+2 |
| * | Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step | Evan Cheng | 2011-01-13 | 1 | -1/+1 |
| * | Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755 | Jim Grosbach | 2010-12-14 | 1 | -0/+2 |
| * | The tLDR et al instructions were emitting either a reg/reg or reg/imm | Bill Wendling | 2010-12-14 | 1 | -1/+3 |
| * | Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ... | Owen Anderson | 2010-12-14 | 1 | -0/+2 |
| * | Revert r121721, which broke buildbots. | Owen Anderson | 2010-12-13 | 1 | -2/+0 |
| * | Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provid... | Owen Anderson | 2010-12-13 | 1 | -0/+2 |
| * | In Thumb2, direct branches can be encoded as either a "short" conditional bra... | Owen Anderson | 2010-12-13 | 1 | -0/+2 |
| * | Fix encoding of Thumb1 LDRB and STRB. | Owen Anderson | 2010-12-10 | 1 | -0/+2 |
| * | Thumb unconditional branch binary encoding. rdar://8754994 | Jim Grosbach | 2010-12-10 | 1 | -0/+2 |
| * | Thumb conditional branch binary encodings. rdar://8745367 | Jim Grosbach | 2010-12-10 | 1 | -0/+2 |
| * | Thumb ldr reg+imm offsets were encoded incorrectly. The scaling factor of the | Bill Wendling | 2010-12-09 | 1 | -5/+1 |
| * | Rename the encoder method for t_cbtarget to match. | Jim Grosbach | 2010-12-09 | 1 | -1/+1 |
| * | The BLX instruction is encoded differently than the BL, because why not? In | Bill Wendling | 2010-12-09 | 1 | -0/+2 |
| * | Support the "target" encodings for the CB[N]Z instructions. | Bill Wendling | 2010-12-08 | 1 | -0/+2 |
| * | Add support for loading from a constant pool. | Bill Wendling | 2010-12-08 | 1 | -0/+2 |
| * | Binary encoding for ARM tLDRspi and tSTRspi. | Jim Grosbach | 2010-12-07 | 1 | -0/+2 |
| * | Add fixup for Thumb1 BL/BLX instructions. | Jim Grosbach | 2010-12-06 | 1 | -0/+2 |
| * | Add a post encoder method to the VFP instructions to convert them to the Thumb2 | Bill Wendling | 2010-12-01 | 1 | -0/+2 |
| * | Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADR | Jim Grosbach | 2010-12-01 | 1 | -0/+2 |
| * | Add correct encodings for STRD and LDRD, including fixup support. Additional... | Owen Anderson | 2010-12-01 | 1 | -0/+2 |
| * | * Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same as | Bill Wendling | 2010-11-30 | 1 | -0/+4 |
| * | Add encoding support for Thumb2 PLD and PLI instructions. | Owen Anderson | 2010-11-30 | 1 | -0/+2 |
| * | Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost | Bill Wendling | 2010-11-30 | 1 | -2/+4 |
| * | Rename BX/BRIND/etc patterns to clarify which is actually the BX instruction | Jim Grosbach | 2010-11-30 | 1 | -4/+4 |
| * | Correct Thumb2 encodings for a much wider range of loads and stores. | Owen Anderson | 2010-11-30 | 1 | -0/+2 |
| * | Fix the encoding of VLD4-dup alignment. | Bob Wilson | 2010-11-30 | 1 | -0/+2 |
| * | Provide Thumb2 encodings for basic loads and stores. | Owen Anderson | 2010-11-29 | 1 | -0/+6 |
| * | Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the same | Bill Wendling | 2010-11-20 | 1 | -9/+21 |
| * | Minor cleanups to a few llvm_unreachable() calls. | Jim Grosbach | 2010-11-19 | 1 | -6/+2 |
| * | Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the ... | Jason W Kim | 2010-11-18 | 1 | -0/+5 |
| * | Clean up LEApcrel instuction(s) a bit. It's not really a Pseudo, so don't mark | Jim Grosbach | 2010-11-17 | 1 | -0/+8 |
| * | Fix comment typo. | Jim Grosbach | 2010-11-17 | 1 | -1/+1 |
| * | The machine instruction no longer encodes the submode as a separate operand. We | Bill Wendling | 2010-11-17 | 1 | -4/+4 |
| * | ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding. | Jim Grosbach | 2010-11-15 | 1 | -0/+4 |
| * | Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+o... | Evan Cheng | 2010-11-12 | 1 | -5/+5 |
| * | First stab at providing correct Thumb2 encodings, start with adc. | Owen Anderson | 2010-11-12 | 1 | -0/+4 |
| * | Fill out support for Thumb2 encodings of NEON instructions. | Owen Anderson | 2010-11-11 | 1 | -0/+2 |
| * | Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. | Owen Anderson | 2010-11-11 | 1 | -0/+2 |
| * | Add support for Thumb2 encodings of NEON data processing instructions, using ... | Owen Anderson | 2010-11-11 | 1 | -0/+2 |
| * | Encoding of destination fixup for ARM branch and conditional branch | Jim Grosbach | 2010-11-11 | 1 | -0/+2 |
| * | Encoding for ARM LDRSH_POST. | Jim Grosbach | 2010-11-11 | 1 | -0/+2 |
| * | ARM STRH encoding information. | Jim Grosbach | 2010-11-11 | 1 | -0/+2 |
| * | ARM LDM encoding for the mode (ia, ib, da, db) operand. | Jim Grosbach | 2010-11-10 | 1 | -0/+2 |
| * | Add encoder method for ARM load/store shifted register offset operands. | Jim Grosbach | 2010-11-09 | 1 | -0/+2 |
| * | The MC code couldn't handle ARM LDR instructions with negative offsets: | Bill Wendling | 2010-11-03 | 1 | -11/+30 |
