| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -1/+0 |
| * | Fix assert. | Eric Christopher | 2012-01-11 | 1 | -2/+2 |
| * | Match SelectionDAG logic for enabling movt. | Jakob Stoklund Olesen | 2012-01-07 | 1 | -1/+5 |
| * | Use getRegForValue() to materialize the address of ARM globals. | Jakob Stoklund Olesen | 2012-01-07 | 1 | -10/+0 |
| * | Use movw+movt in ARMFastISel::ARMMaterializeGV. | Jakob Stoklund Olesen | 2012-01-07 | 1 | -29/+50 |
| * | ARM target code clean up. Check for iOS, not Darwin where it makes sense. | Evan Cheng | 2011-12-20 | 1 | -8/+8 |
| * | VFP2 is required for FP loads. Noticed by inspection. | Chad Rosier | 2011-12-14 | 1 | -0/+2 |
| * | Tidy up. | Chad Rosier | 2011-12-14 | 1 | -1/+2 |
| * | Fix 80-column violation and extraneous brackets. | Chad Rosier | 2011-12-14 | 1 | -8/+9 |
| * | - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function | Evan Cheng | 2011-12-14 | 1 | -2/+2 |
| * | [fast-isel] Unaligned loads of floats are not supported. Therefore, convert ... | Chad Rosier | 2011-12-13 | 1 | -7/+32 |
| * | Add bundle aware API for querying instruction properties and switch the code | Evan Cheng | 2011-12-07 | 1 | -2/+1 |
| * | [arm-fast-isel] Doublewords only require word-alignment. | Chad Rosier | 2011-12-06 | 1 | -3/+4 |
| * | Fix 80-column issues. | Bob Wilson | 2011-12-04 | 1 | -4/+8 |
| * | [arm-fast-isel] Unaligned stores of floats require special care. | Chad Rosier | 2011-12-03 | 1 | -3/+18 |
| * | Move global variables in TargetMachine into new TargetOptions class. As an API | Nick Lewycky | 2011-12-02 | 1 | -1/+1 |
| * | [arm-fast-isel] After promoting a function parameter be sure to update the | Chad Rosier | 2011-12-02 | 1 | -2/+4 |
| * | Silence wrong warnings from GCC about variables possibly being used | Duncan Sands | 2011-11-28 | 1 | -2/+2 |
| * | Guard call to getRegForValue with isTypeLegal check to avoid unnecessary work... | Chad Rosier | 2011-11-18 | 1 | -3/+5 |
| * | Add TODO comment. | Chad Rosier | 2011-11-17 | 1 | -0/+2 |
| * | Dead code. | Chad Rosier | 2011-11-17 | 1 | -14/+0 |
| * | Don't unconditionally set the kill flag. | Chad Rosier | 2011-11-17 | 1 | -1/+1 |
| * | Check to make sure we can select the instruction before trying to put the | Chad Rosier | 2011-11-16 | 1 | -6/+6 |
| * | Add FIXME comment. | Chad Rosier | 2011-11-16 | 1 | -0/+2 |
| * | Remove some unnecessary includes of PseudoSourceValue.h. | Jay Foad | 2011-11-15 | 1 | -1/+0 |
| * | Supporting inline memmove isn't going to be worthwhile. The only way to avoid | Chad Rosier | 2011-11-14 | 1 | -16/+9 |
| * | Add support for inlining small memcpys. | Chad Rosier | 2011-11-14 | 1 | -2/+63 |
| * | Fix a performance regression from r144565. Positive offsets were being lowered | Chad Rosier | 2011-11-14 | 1 | -3/+3 |
| * | Add support for Thumb load/stores with negative offsets. | Chad Rosier | 2011-11-14 | 1 | -16/+60 |
| * | Add support for ARM halfword load/stores and signed byte loads with negative | Chad Rosier | 2011-11-14 | 1 | -8/+15 |
| * | The order in which the predicate is added differs between Thumb and ARM mode.... | Chad Rosier | 2011-11-13 | 1 | -10/+16 |
| * | Temporarily disable SelectIntrinsicCall when in ARM mode. This is causing fai... | Chad Rosier | 2011-11-13 | 1 | -0/+1 |
| * | Fix comments. | Chad Rosier | 2011-11-13 | 1 | -3/+3 |
| * | Add support for emitting both signed- and zero-extend loads. Fix | Chad Rosier | 2011-11-13 | 1 | -32/+91 |
| * | Add support in fast-isel for selecting memset/memcpy/memmove intrinsics. | Chad Rosier | 2011-11-11 | 1 | -10/+60 |
| * | Rename variables to avoid confusion. No functionallity change intended. | Chad Rosier | 2011-11-11 | 1 | -18/+18 |
| * | Add support for using immediates with select instructions. | Chad Rosier | 2011-11-11 | 1 | -8/+40 |
| * | When loading a value, treat an i1 as an i8. | Chad Rosier | 2011-11-11 | 1 | -0/+1 |
| * | Add support for using MVN to materialize negative constants. | Chad Rosier | 2011-11-11 | 1 | -3/+17 |
| * | When in ARM mode, LDRH/STRH require special handling of negative offsets. | Chad Rosier | 2011-11-10 | 1 | -1/+2 |
| * | For immediate encodings of icmp, zero or sign extend first. Then | Chad Rosier | 2011-11-10 | 1 | -5/+5 |
| * | The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12. | Chad Rosier | 2011-11-09 | 1 | -5/+13 |
| * | Add support for encoding immediates in icmp and fcmp. Hopefully, this will | Chad Rosier | 2011-11-09 | 1 | -12/+64 |
| * | ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this. | Chad Rosier | 2011-11-08 | 1 | -39/+39 |
| * | Enable support for returning i1, i8, and i16. Nothing special todo as it's the | Chad Rosier | 2011-11-08 | 1 | -1/+7 |
| * | Add support for passing i1, i8, and i16 call parameters. Also, be sure to | Chad Rosier | 2011-11-05 | 1 | -28/+16 |
| * | Cannot create a result register for non-legal types. | Chad Rosier | 2011-11-04 | 1 | -1/+2 |
| * | When materializing an i32, SExt vs ZExt doesn't matter when we're trying to fit | Chad Rosier | 2011-11-04 | 1 | -1/+1 |
| * | Enable support for materializing i1, i8, and i16 integers via move immediate. | Chad Rosier | 2011-11-04 | 1 | -6/+11 |
| * | Indentation. | Chad Rosier | 2011-11-04 | 1 | -1/+1 |
