aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/ARM/ARMISelDAGToDAG.cpp
Commit message (Expand)AuthorAgeFilesLines
* [ARM] Use the load-acquire/store-release instructions optimally in AArch32.Amara Emerson2013-09-261-42/+114
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-221-1/+3
* ARM: use TableGen patterns to select CMOV operations.Tim Northover2013-08-221-215/+7
* ARM: make sure we keep inline asm operands tied.Tim Northover2013-08-181-1/+4
* Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patc...Silviu Baranga2013-07-291-1/+1
* ARM: implement ldrex, strex and clrex intrinsicsTim Northover2013-07-161-0/+29
* Add a comment to this change, requested by Eric Christopher.Joey Gouly2013-07-081-0/+4
* PR16490: fix a crash in ARMDAGToDAGISel::SelectInlineAsm.Joey Gouly2013-07-051-0/+6
* Remove unused variables.Eric Christopher2013-06-281-4/+0
* Bug 13662: Enable GPRPair for all i64 operands of inline asm on ARMWeiming Zhao2013-06-281-10/+23
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-17/+32
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-061-15/+15
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-251-26/+26
* Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.Michael J. Spencer2013-05-241-1/+1
* ArrayRefize getMachineNode(). No functionality change.Michael Liao2013-04-191-48/+40
* Don't glue users to extract_subreg when selecting the llvm.arm.ldrexdLang Hames2013-03-091-6/+4
* ArrayRefize some code. No functionality change.Benjamin Kramer2013-03-071-3/+1
* Re-apply r175088 for bug fix 13622: Add paired register support forWeiming Zhao2013-02-141-0/+141
* temporarily revert the patch due to some conflictsWeiming Zhao2013-02-131-141/+0
* Bug fix 13622: Add paired register support for inline asm with 64-bit data on...Weiming Zhao2013-02-131-0/+141
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-6/+6
* LLVM sdisel normalize bit extraction of the form:Evan Cheng2012-12-191-2/+107
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-7/+7
* Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.Silviu Baranga2012-11-291-0/+9
* Rename methods like PairSRegs() to createSRegpairNode() to meet our codingWeiming Zhao2012-11-171-40/+34
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-161-43/+51
* Add LLVM support for Swift.Bob Wilson2012-09-291-8/+13
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru2012-09-271-1/+1
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-271-1/+1
* Fix Doxygen issues:Dmitri Gribenko2012-09-141-1/+1
* This patch introduces A15 as a target in LLVM.Silviu Baranga2012-09-131-8/+7
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-09-041-0/+32
* Remove the CAND/COR/CXOR custom ISD nodes and their select code.Jakob Stoklund Olesen2012-08-181-120/+0
* Add missing Rfalse operand to the predicated pseudo-instructions.Jakob Stoklund Olesen2012-08-151-14/+20
* Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARMArnold Schwaighofer2012-08-121-32/+0
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-08-091-0/+32
* Clean up formatting.Jim Grosbach2012-08-011-8/+0
* Tidy up.Jim Grosbach2012-08-011-11/+4
* Make some opcode tables static and const. Allows code to avoid making copies ...Craig Topper2012-05-241-173/+219
* Test commit.Tim Northover2012-04-261-2/+0
* ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach2012-04-111-1/+2
* ARM 'vzip.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach2012-04-111-1/+2
* ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-061-8/+7
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-051-45/+37
* Remove unused variable.Duncan Sands2012-02-231-1/+0
* Optimize a couple of common patterns involving conditional moves where the falseEvan Cheng2012-02-231-3/+115
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-2/+1
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-1/+0
* ARM updating VST2 pseudo-lowering fixed vs. register update.Jim Grosbach2012-01-101-1/+1
* ARM NEON assmebly parsing for VLD2 to all lanes instructions.Jim Grosbach2011-12-211-3/+14
generated by cgit v1.1 at 2024-07-05 06:25:55 +0000